From 988827b85a9b09f1164e101ea2520562dd31634e Mon Sep 17 00:00:00 2001
From: Stephane Smith <stephane.smith@titansensor.com>
Date: Wed, 13 Apr 2022 17:34:09 +0000
Subject: [PATCH] esp32/modesp32: Properly define RTC_VALID_EXT_PINS on S2/S3
 variants.

On ESP32 S2/S3 variants, GPIO0 through GPIO21 are valid RTC pins.  This
commit defines the valid RTC_VALID_EXT_PINS for the S2/S3 variants,
otherwise, it keeps functionality the same.
---
 ports/esp32/modesp32.h | 37 +++++++++++++++++++++++++++++++++++--
 1 file changed, 35 insertions(+), 2 deletions(-)

diff --git a/ports/esp32/modesp32.h b/ports/esp32/modesp32.h
index d76b3a49a2..a685b7b38f 100644
--- a/ports/esp32/modesp32.h
+++ b/ports/esp32/modesp32.h
@@ -1,7 +1,38 @@
 #ifndef MICROPY_INCLUDED_ESP32_MODESP32_H
 #define MICROPY_INCLUDED_ESP32_MODESP32_H
 
-#define RTC_VALID_EXT_PINS \
+#if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
+
+    #define RTC_VALID_EXT_PINS \
+    ( \
+    (1ll << 0) | \
+    (1ll << 1) | \
+    (1ll << 2) | \
+    (1ll << 3) | \
+    (1ll << 4) | \
+    (1ll << 5) | \
+    (1ll << 6) | \
+    (1ll << 7) | \
+    (1ll << 8) | \
+    (1ll << 9) | \
+    (1ll << 10) | \
+    (1ll << 11) | \
+    (1ll << 12) | \
+    (1ll << 13) | \
+    (1ll << 14) | \
+    (1ll << 15) | \
+    (1ll << 16) | \
+    (1ll << 17) | \
+    (1ll << 18) | \
+    (1ll << 19) | \
+    (1ll << 20) | \
+    (1ll << 21)   \
+    )
+    #define RTC_LAST_EXT_PIN 21
+
+#else
+
+    #define RTC_VALID_EXT_PINS \
     ( \
     (1ll << 0) | \
     (1ll << 2) | \
@@ -22,8 +53,10 @@
     (1ll << 38) | \
     (1ll << 39)   \
     )
+    #define RTC_LAST_EXT_PIN 39
+
+#endif
 
-#define RTC_LAST_EXT_PIN 39
 #define RTC_IS_VALID_EXT_PIN(pin_id) ((1ll << (pin_id)) & RTC_VALID_EXT_PINS)
 
 extern int8_t esp32_rmt_bitstream_channel_id;