From 8f1eced69da2275b70f0c6426290a5370cd250f2 Mon Sep 17 00:00:00 2001 From: Dave Hylands Date: Thu, 30 Jul 2015 09:50:58 -0700 Subject: [PATCH] stmhal: Add STM32F7 support for USB serial and storage. USB serial is now working for F7. Internal file storage is now working for F7. The flash is laid out a bit differently to the F4 - 4 x 32K, 1 x 128K with the rest 256K, so the internal storage is 96K. Added more pind definitions for STM32F7DISC board. Made USART1 be the default HWUART repl. The STLINK usb connector also looks like a USB serial port which is attached to USART1 on the STM32F7DISC. --- stmhal/boards/STM32F7DISC/mpconfigboard.h | 25 ++++++++++++------ stmhal/boards/STM32F7DISC/pins.csv | 13 +++++++++- .../boards/STM32F7DISC/stm32f7xx_hal_conf.h | 11 ++------ stmhal/boards/stm32f746.ld | 6 ++--- stmhal/flash.c | 26 ++++++++++++++++--- stmhal/storage.c | 6 ++--- 6 files changed, 59 insertions(+), 28 deletions(-) diff --git a/stmhal/boards/STM32F7DISC/mpconfigboard.h b/stmhal/boards/STM32F7DISC/mpconfigboard.h index 0856200f15..dee42cb689 100644 --- a/stmhal/boards/STM32F7DISC/mpconfigboard.h +++ b/stmhal/boards/STM32F7DISC/mpconfigboard.h @@ -30,17 +30,22 @@ void STM32F7DISC_board_early_init(void); #define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_6 // UART config -#define MICROPY_HW_UART6_PORT (GPIOC) -#define MICROPY_HW_UART6_PINS (GPIO_PIN_6 | GPIO_PIN_7) -#define MICROPY_HW_UART7_PORT (GPIOF) -#define MICROPY_HW_UART7_PINS (GPIO_PIN_6 | GPIO_PIN_7) +#define MICROPY_HW_UART1_TX_PORT (GPIOA) +#define MICROPY_HW_UART1_TX_PIN (GPIO_PIN_9) +#define MICROPY_HW_UART1_RX_PORT (GPIOB) +#define MICROPY_HW_UART1_RX_PIN (GPIO_PIN_7) -#define MICROPY_HW_UART_REPL PYB_UART_6 +#define MICROPY_HW_UART6_PORT (GPIOC) +#define MICROPY_HW_UART6_PINS (GPIO_PIN_6 | GPIO_PIN_7) +#define MICROPY_HW_UART7_PORT (GPIOF) +#define MICROPY_HW_UART7_PINS (GPIO_PIN_6 | GPIO_PIN_7) + +#define MICROPY_HW_UART_REPL PYB_UART_1 #define MICROPY_HW_UART_REPL_BAUD 115200 // I2C busses -#define MICROPY_HW_I2C1_SCL (pin_B8) -#define MICROPY_HW_I2C1_SDA (pin_B9) +#define MICROPY_HW_I2C1_SCL (pin_B8) +#define MICROPY_HW_I2C1_SDA (pin_B9) // USRSW is pulled low. Pressing the button makes the input go high. #define MICROPY_HW_USRSW_PIN (pin_I11) @@ -55,5 +60,9 @@ void STM32F7DISC_board_early_init(void); #define MICROPY_HW_LED_OFF(pin) (pin->gpio->BSRR = (pin->pin_mask << 16)) // USB config (CN13 - USB OTG FS) -#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9) +// The Hardware VBUS detect only works on pin PA9. The STM32F7 Discovery uses +// PA9 for VCP_TX functionality and connects the VBUS to pin J12 (so software +// only detect). So we don't define the VBUS detect pin since that requires PA9. + +/*#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_J12)*/ #define MICROPY_HW_USB_OTG_ID_PIN (pin_A10) diff --git a/stmhal/boards/STM32F7DISC/pins.csv b/stmhal/boards/STM32F7DISC/pins.csv index 1b8afd5203..37d0edaf3a 100644 --- a/stmhal/boards/STM32F7DISC/pins.csv +++ b/stmhal/boards/STM32F7DISC/pins.csv @@ -25,8 +25,19 @@ SW,PI11 TP1,PH2 TP2,PI8 TP3,PH15 +AUDIO_INT,PD6 +EXT_SDA,PB9 +EXT_SCL,PB8 +EXT_RST,PG3 +SD_SW,PC13 LCD_BL_CTRL,PK3 -USB_VBUS,PA9 +LCD_INT,PI13 +OTG_FS_POWER,PD5 +OTG_FS_OVER_CURRENT,PD4 +OTG_HS_OVER_CURRENT,PE3 +USB_VBUS,PJ12 USB_ID,PA10 USB_DM,PA11 USB_DP,PA12 +VCP_TX,PA9 +VCP_RX,PB7 diff --git a/stmhal/boards/STM32F7DISC/stm32f7xx_hal_conf.h b/stmhal/boards/STM32F7DISC/stm32f7xx_hal_conf.h index 19e6660690..5c6b22dd02 100644 --- a/stmhal/boards/STM32F7DISC/stm32f7xx_hal_conf.h +++ b/stmhal/boards/STM32F7DISC/stm32f7xx_hal_conf.h @@ -47,6 +47,7 @@ /* Exported constants --------------------------------------------------------*/ #define STM32F746xx +#define USE_USB_FS /* ########################## Module Selection ############################## */ /** @@ -157,7 +158,7 @@ * @brief This is the HAL system configuration section */ #define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ -#define TICK_INT_PRIORITY ((uint32_t)0x0F) /*!< tick interrupt priority */ +#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */ #define USE_RTOS 0 #define ART_ACCLERATOR_ENABLE 1 /* To enable instruction cache and prefetch */ @@ -415,14 +416,6 @@ #define assert_param(expr) ((void)0) #endif /* USE_FULL_ASSERT */ -/** - * @} - */ - -/** - * @} - */ - #ifdef __cplusplus } #endif diff --git a/stmhal/boards/stm32f746.ld b/stmhal/boards/stm32f746.ld index dbba1be039..dccb5e0e97 100644 --- a/stmhal/boards/stm32f746.ld +++ b/stmhal/boards/stm32f746.ld @@ -6,9 +6,9 @@ MEMORY { FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K - FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0, 16K */ - FLASH_FS (r) : ORIGIN = 0x08004000, LENGTH = 112K /* sectors 1, 2, 3 (16K each) sector 4 (64K) */ - FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 5-11 7*128KiB = 896K */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 32K /* sector 0, 32K */ + FLASH_FS (r) : ORIGIN = 0x08008000, LENGTH = 96K /* sectors 1, 2, 3 (32K each) */ + FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 4-7 1*128Kib 3*256KiB = 896K */ DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K /* Used for storage cache */ RAM (xrw) : ORIGIN = 0x20010000, LENGTH = 256K /* SRAM1 = 240K, SRAM2 = 16K */ } diff --git a/stmhal/flash.c b/stmhal/flash.c index 670c4cd3ad..54f5f85c69 100644 --- a/stmhal/flash.c +++ b/stmhal/flash.c @@ -34,6 +34,21 @@ #define FLASH_FLAG_PGSERR FLASH_FLAG_ERSERR #endif +#if defined(STM32F7) + +/* Base address of the Flash sectors */ +#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 32 Kbytes */ +#define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08008000) /* Base @ of Sector 1, 32 Kbytes */ +#define ADDR_FLASH_SECTOR_2 ((uint32_t)0x08010000) /* Base @ of Sector 2, 32 Kbytes */ +#define ADDR_FLASH_SECTOR_3 ((uint32_t)0x08018000) /* Base @ of Sector 3, 32 Kbytes */ +#define ADDR_FLASH_SECTOR_4 ((uint32_t)0x08020000) /* Base @ of Sector 4, 128 Kbytes */ +#define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08040000) /* Base @ of Sector 5, 256 Kbytes */ +#define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08080000) /* Base @ of Sector 6, 256 Kbytes */ +#define ADDR_FLASH_SECTOR_7 ((uint32_t)0x080C0000) /* Base @ of Sector 7, 256 Kbytes */ +#define ADDR_FLASH_END ((uint32_t)0x08100000) /* 1 Mbytes total */ + +#else + /* Base address of the Flash sectors */ #define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) /* Base @ of Sector 0, 16 Kbytes */ #define ADDR_FLASH_SECTOR_1 ((uint32_t)0x08004000) /* Base @ of Sector 1, 16 Kbytes */ @@ -43,11 +58,16 @@ #define ADDR_FLASH_SECTOR_5 ((uint32_t)0x08020000) /* Base @ of Sector 5, 128 Kbytes */ #define ADDR_FLASH_SECTOR_6 ((uint32_t)0x08040000) /* Base @ of Sector 6, 128 Kbytes */ #define ADDR_FLASH_SECTOR_7 ((uint32_t)0x08060000) /* Base @ of Sector 7, 128 Kbytes */ -#if defined(FLASH_SECTOR_8) +#if !defined(FLASH_SECTOR_8) +#define ADDR_FLASH_END ((uint32_t)0x08080000) /* 512 Kbytes total */ +#else #define ADDR_FLASH_SECTOR_8 ((uint32_t)0x08080000) /* Base @ of Sector 8, 128 Kbytes */ #define ADDR_FLASH_SECTOR_9 ((uint32_t)0x080A0000) /* Base @ of Sector 9, 128 Kbytes */ #define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) /* Base @ of Sector 10, 128 Kbytes */ #define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) /* Base @ of Sector 11, 128 Kbytes */ +#define ADDR_FLASH_END ((uint32_t)0x08100000) /* 1 Mbytes total */ +#endif + #endif static const uint32_t flash_info_table[26] = { @@ -64,10 +84,8 @@ static const uint32_t flash_info_table[26] = { ADDR_FLASH_SECTOR_9, FLASH_SECTOR_9, ADDR_FLASH_SECTOR_10, FLASH_SECTOR_10, ADDR_FLASH_SECTOR_11, FLASH_SECTOR_11, - ADDR_FLASH_SECTOR_11 + 0x20000, 0, - #else - ADDR_FLASH_SECTOR_7 + 0x20000, 0, #endif + ADDR_FLASH_END, 0, }; uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) { diff --git a/stmhal/storage.c b/stmhal/storage.c index d0567b4fba..64e810e8f7 100644 --- a/stmhal/storage.c +++ b/stmhal/storage.c @@ -60,9 +60,9 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k // The STM32F746 doesn't really have CCRAM, so we use the 64K DTCM for this. #define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k -#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of DTCM -#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1 -#define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k +#define FLASH_SECTOR_SIZE_MAX (0x08000) // 32k max +#define FLASH_MEM_SEG1_START_ADDR (0x08008000) // sector 1 +#define FLASH_MEM_SEG1_NUM_BLOCKS (192) // sectors 1,2,3: 32k+32k+32=96k #else #error "no storage support for this MCU"