diff --git a/ports/pic16bit/Makefile b/ports/pic16bit/Makefile
index 970e75d1fb..8a931979d2 100644
--- a/ports/pic16bit/Makefile
+++ b/ports/pic16bit/Makefile
@@ -6,7 +6,7 @@ QSTR_DEFS = qstrdefsport.h
 # include py core make definitions
 include $(TOP)/py/py.mk
 
-XC16 = /opt/microchip/xc16/v1.24
+XC16 = /opt/microchip/xc16/v1.35
 CROSS_COMPILE = $(XC16)/bin/xc16-
 
 PARTFAMILY = dsPIC33F
@@ -29,7 +29,7 @@ CFLAGS += -O1 -DNDEBUG
 endif
 
 LDFLAGS = --heap=0 -nostdlib -T $(XC16)/support/$(PARTFAMILY)/gld/p$(PART).gld -Map=$@.map --cref -p$(PART)
-LIBS = -L$(XC16)/lib -L$(XC16)/lib/$(PARTFAMILY) -lc -lm -lpic30 -lp$(PART)
+LIBS = -L$(XC16)/lib -L$(XC16)/lib/$(PARTFAMILY) -lc -lm -lpic30
 
 SRC_C = \
 	main.c \
diff --git a/ports/pic16bit/main.c b/ports/pic16bit/main.c
index 4a61c5ff53..47ba00f48f 100644
--- a/ports/pic16bit/main.c
+++ b/ports/pic16bit/main.c
@@ -39,10 +39,13 @@
 #include "board.h"
 #include "modpyb.h"
 
-_FGS(GWRP_OFF & GCP_OFF);
-_FOSCSEL(FNOSC_FRC);
-_FOSC(FCKSM_CSECMD & OSCIOFNC_ON & POSCMD_NONE);
-_FWDT(FWDTEN_OFF);
+#pragma config GWRP = OFF
+#pragma config GSS = GCP_OFF
+#pragma config FNOSC = FRC
+#pragma config FCKSM = CSECMD
+#pragma config OSCIOFNC = ON
+#pragma config POSCMD = NONE
+#pragma config FWDTEN = OFF
 
 // maximum heap for device with 8k RAM
 static char heap[4600];