stm32/powerctrl: Disable HSI if not needed to save a bit of power.

pull/5598/head
Damien George 2020-01-30 16:29:45 +11:00
rodzic c96a2f636b
commit 29b84ea798
1 zmienionych plików z 11 dodań i 0 usunięć

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@ -44,6 +44,13 @@
extern uint32_t _estack[]; extern uint32_t _estack[];
#define BL_STATE ((uint32_t*)&_estack) #define BL_STATE ((uint32_t*)&_estack)
static inline void powerctrl_disable_hsi_if_unused(void) {
#if !MICROPY_HW_CLK_USE_HSI && (defined(STM32F4) || defined(STM32F7) || defined(STM32H7))
// Disable HSI if it's not used to save a little bit of power
__HAL_RCC_HSI_DISABLE();
#endif
}
NORETURN void powerctrl_mcu_reset(void) { NORETURN void powerctrl_mcu_reset(void) {
BL_STATE[1] = 1; // invalidate bootloader address BL_STATE[1] = 1; // invalidate bootloader address
#if __DCACHE_PRESENT == 1 #if __DCACHE_PRESENT == 1
@ -155,6 +162,8 @@ int powerctrl_rcc_clock_config_pll(RCC_ClkInitTypeDef *rcc_init, uint32_t sysclk
return -MP_EIO; return -MP_EIO;
} }
powerctrl_disable_hsi_if_unused();
return 0; return 0;
} }
@ -390,6 +399,8 @@ void powerctrl_enter_stop_mode(void) {
} }
#endif #endif
powerctrl_disable_hsi_if_unused();
#if defined(STM32F7) #if defined(STM32F7)
if (RCC->DCKCFGR2 & RCC_DCKCFGR2_CK48MSEL) { if (RCC->DCKCFGR2 & RCC_DCKCFGR2_CK48MSEL) {
// Enable PLLSAI if it is selected as 48MHz source // Enable PLLSAI if it is selected as 48MHz source