From 3641c0d1032975d7f5896346d73faa2531e05969 Mon Sep 17 00:00:00 2001 From: Andrew Leech Date: Mon, 26 Jun 2023 11:53:28 +1000 Subject: [PATCH 1/8] ports/esp32: Add support for risk-v and esp32c6. Signed-off-by: Andrew Leech --- README.md | 2 +- ports/esp32/boards/deploy_c6.md | 14 ++++++++++++++ ports/esp32/boards/sdkconfig.ble | 3 +++ ports/esp32/esp32_common.cmake | 6 +++++- ports/esp32/gccollect.c | 2 +- ports/esp32/machine_adc.c | 4 ++-- ports/esp32/machine_adc_block.c | 2 +- ports/esp32/machine_bitstream.c | 2 +- ports/esp32/machine_hw_spi.c | 10 +++++----- ports/esp32/machine_i2c.c | 2 +- ports/esp32/machine_pin.c | 6 +++--- ports/esp32/machine_pin.h | 2 +- ports/esp32/machine_pwm.c | 5 +++++ ports/esp32/main.c | 2 +- ports/esp32/main_esp32c6/CMakeLists.txt | 14 ++++++++++++++ ports/esp32/main_esp32c6/idf_component.yml | 5 +++++ ports/esp32/main_esp32c6/linker.lf | 1 + ports/esp32/modesp32.c | 2 +- ports/esp32/modmachine.c | 10 ++++++---- ports/esp32/mpconfigport.h | 8 +++++--- ports/esp32/mphalport.h | 2 +- ports/esp32/mpnimbleport.c | 7 ++++++- 22 files changed, 83 insertions(+), 28 deletions(-) create mode 100644 ports/esp32/boards/deploy_c6.md create mode 100644 ports/esp32/main_esp32c6/CMakeLists.txt create mode 100644 ports/esp32/main_esp32c6/idf_component.yml create mode 100644 ports/esp32/main_esp32c6/linker.lf diff --git a/README.md b/README.md index f5bc6d78f0..600cf04c41 100644 --- a/README.md +++ b/README.md @@ -108,7 +108,7 @@ track of the code size of the core runtime and VM. In addition, the following ports are provided in this repository: - [cc3200](ports/cc3200) -- Texas Instruments CC3200 (including PyCom WiPy). - - [esp32](ports/esp32) -- Espressif ESP32 SoC (including ESP32S2, ESP32S3, ESP32C3). + - [esp32](ports/esp32) -- Espressif ESP32 SoC (including ESP32S2, ESP32S3, ESP32C3, ESP32C6). - [esp8266](ports/esp8266) -- Espressif ESP8266 SoC. - [mimxrt](ports/mimxrt) -- NXP m.iMX RT (including Teensy 4.x). - [nrf](ports/nrf) -- Nordic Semiconductor nRF51 and nRF52. diff --git a/ports/esp32/boards/deploy_c6.md b/ports/esp32/boards/deploy_c6.md new file mode 100644 index 0000000000..d8e567a1cd --- /dev/null +++ b/ports/esp32/boards/deploy_c6.md @@ -0,0 +1,14 @@ +Program your board using the esptool.py program, found [here](https://github.com/espressif/esptool). + +If you are putting MicroPython on your board for the first time then you should +first erase the entire flash using: + +```bash +esptool.py --chip esp32c6 --port /dev/ttyUSB0 erase_flash +``` + +From then on program the firmware starting at address 0x0: + +```bash +esptool.py --chip esp32c6 --port /dev/ttyUSB0 --baud 460800 write_flash -z 0x0 esp32c6-20220117-v1.18.bin +``` diff --git a/ports/esp32/boards/sdkconfig.ble b/ports/esp32/boards/sdkconfig.ble index af2d4b133e..02247f8610 100644 --- a/ports/esp32/boards/sdkconfig.ble +++ b/ports/esp32/boards/sdkconfig.ble @@ -7,6 +7,9 @@ CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME="MPY ESP32" CONFIG_BT_NIMBLE_MAX_CONNECTIONS=4 +# Needed to enable esp_nimble_hci on ESP32C6 +#CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE=y + # Put NimBLE on core 1, and for synchronisation # with the ringbuffer and scheduler MP needs to be on the same core. # MP on core 1 prevents interference with WiFi for time sensitive operations. diff --git a/ports/esp32/esp32_common.cmake b/ports/esp32/esp32_common.cmake index 89e46f9cfb..c91b3b1841 100644 --- a/ports/esp32/esp32_common.cmake +++ b/ports/esp32/esp32_common.cmake @@ -161,7 +161,7 @@ idf_component_register( set(MICROPY_TARGET ${COMPONENT_TARGET}) # Define mpy-cross flags, for use with frozen code. -if(NOT IDF_TARGET STREQUAL "esp32c3") +if(NOT IDF_TARGET MATCHES "^esp32c[36]$") set(MICROPY_CROSS_FLAGS -march=xtensawin) endif() @@ -200,6 +200,10 @@ foreach(comp ${__COMPONENT_NAMES_RESOLVED}) micropy_gather_target_properties(${comp}) endforeach() + +list(APPEND MICROPY_CPP_INC_EXTRA ${IDF_PATH}/components/riscv/include) +list(APPEND MICROPY_CPP_INC_EXTRA ${IDF_PATH}/components/soc/soc/include) + # Include the main MicroPython cmake rules. include(${MICROPY_DIR}/py/mkrules.cmake) diff --git a/ports/esp32/gccollect.c b/ports/esp32/gccollect.c index 4b6dd8ab61..74d354471f 100644 --- a/ports/esp32/gccollect.c +++ b/ports/esp32/gccollect.c @@ -61,7 +61,7 @@ void gc_collect(void) { gc_collect_end(); } -#elif CONFIG_IDF_TARGET_ESP32C3 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 #include "shared/runtime/gchelper.h" diff --git a/ports/esp32/machine_adc.c b/ports/esp32/machine_adc.c index 0ac9f5d266..2f276836fe 100644 --- a/ports/esp32/machine_adc.c +++ b/ports/esp32/machine_adc.c @@ -44,7 +44,7 @@ #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_9_10_11 #endif -#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32S3 #define MICROPY_PY_MACHINE_ADC_CLASS_CONSTANTS_WIDTH_12 \ { MP_ROM_QSTR(MP_QSTR_WIDTH_12BIT), MP_ROM_INT(12) }, #else @@ -87,7 +87,7 @@ static const machine_adc_obj_t madc_obj[] = { {{&machine_adc_type}, ADCBLOCK2, ADC_CHANNEL_7, GPIO_NUM_27}, {{&machine_adc_type}, ADCBLOCK2, ADC_CHANNEL_8, GPIO_NUM_25}, {{&machine_adc_type}, ADCBLOCK2, ADC_CHANNEL_9, GPIO_NUM_26}, - #elif CONFIG_IDF_TARGET_ESP32C3 + #elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_0, GPIO_NUM_0}, {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_1, GPIO_NUM_1}, {{&machine_adc_type}, ADCBLOCK1, ADC_CHANNEL_2, GPIO_NUM_2}, diff --git a/ports/esp32/machine_adc_block.c b/ports/esp32/machine_adc_block.c index c610233900..6afdd6f87f 100644 --- a/ports/esp32/machine_adc_block.c +++ b/ports/esp32/machine_adc_block.c @@ -35,7 +35,7 @@ machine_adc_block_obj_t madcblock_obj[] = { #if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 {{&machine_adc_block_type}, ADC_UNIT_1, 12, -1, {0}}, {{&machine_adc_block_type}, ADC_UNIT_2, 12, -1, {0}}, - #elif CONFIG_IDF_TARGET_ESP32S2 + #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32C6 {{&machine_adc_block_type}, ADC_UNIT_1, 13, -1, {0}}, {{&machine_adc_block_type}, ADC_UNIT_2, 13, -1, {0}}, #endif diff --git a/ports/esp32/machine_bitstream.c b/ports/esp32/machine_bitstream.c index ceb1e6ad14..b4e58c51f4 100644 --- a/ports/esp32/machine_bitstream.c +++ b/ports/esp32/machine_bitstream.c @@ -42,7 +42,7 @@ // This is a translation of the cycle counter implementation in ports/stm32/machine_bitstream.c. static void IRAM_ATTR machine_bitstream_high_low_bitbang(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len) { uint32_t pin_mask, gpio_reg_set, gpio_reg_clear; - #if !CONFIG_IDF_TARGET_ESP32C3 + #if !CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 if (pin >= 32) { pin_mask = 1 << (pin - 32); gpio_reg_set = GPIO_OUT1_W1TS_REG; diff --git a/ports/esp32/machine_hw_spi.c b/ports/esp32/machine_hw_spi.c index a0531b95f8..c4a1da5e43 100644 --- a/ports/esp32/machine_hw_spi.c +++ b/ports/esp32/machine_hw_spi.c @@ -38,10 +38,10 @@ #include "soc/spi_pins.h" // SPI mappings by device, naming used by IDF old/new -// upython | ESP32 | ESP32S2 | ESP32S3 | ESP32C3 -// ----------+-----------+-----------+---------+--------- -// SPI(id=1) | HSPI/SPI2 | FSPI/SPI2 | SPI2 | SPI2 -// SPI(id=2) | VSPI/SPI3 | HSPI/SPI3 | SPI3 | err +// upython | ESP32 | ESP32S2 | ESP32S3 | ESP32C3 | ESP32C6 +// ----------+-----------+-----------+---------+---------+--------- +// SPI(id=1) | HSPI/SPI2 | FSPI/SPI2 | SPI2 | SPI2 | SPI2 +// SPI(id=2) | VSPI/SPI3 | HSPI/SPI3 | SPI3 | err | err // Number of available hardware SPI peripherals. #if SOC_SPI_PERIPH_NUM > 2 @@ -251,7 +251,7 @@ static void machine_hw_spi_init_internal(machine_hw_spi_obj_t *self, mp_arg_val_ // Select DMA channel based on the hardware SPI host int dma_chan = 0; - #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 + #if CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 dma_chan = SPI_DMA_CH_AUTO; #else if (self->host == SPI2_HOST) { diff --git a/ports/esp32/machine_i2c.c b/ports/esp32/machine_i2c.c index fe42d2e8c2..94273d7d24 100755 --- a/ports/esp32/machine_i2c.c +++ b/ports/esp32/machine_i2c.c @@ -49,7 +49,7 @@ #endif #endif -#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C6 #define I2C_SCLK_FREQ XTAL_CLK_FREQ #elif CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 #define I2C_SCLK_FREQ APB_CLK_FREQ diff --git a/ports/esp32/machine_pin.c b/ports/esp32/machine_pin.c index 1e7b86baeb..5985714aee 100644 --- a/ports/esp32/machine_pin.c +++ b/ports/esp32/machine_pin.c @@ -44,7 +44,7 @@ #include "modesp32.h" #include "genhdr/pins.h" -#if CONFIG_IDF_TARGET_ESP32C3 +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 #include "soc/usb_serial_jtag_reg.h" #endif @@ -153,13 +153,13 @@ static mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_ // reset the pin to digital if this is a mode-setting init (grab it back from ADC) if (args[ARG_mode].u_obj != mp_const_none) { if (rtc_gpio_is_valid_gpio(index)) { - #if !CONFIG_IDF_TARGET_ESP32C3 + #if !(CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6) rtc_gpio_deinit(index); #endif } } - #if CONFIG_IDF_TARGET_ESP32C3 + #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 if (index == 18 || index == 19) { CLEAR_PERI_REG_MASK(USB_SERIAL_JTAG_CONF0_REG, USB_SERIAL_JTAG_USB_PAD_ENABLE); } diff --git a/ports/esp32/machine_pin.h b/ports/esp32/machine_pin.h index 53f9c6bdad..46c294b95b 100644 --- a/ports/esp32/machine_pin.h +++ b/ports/esp32/machine_pin.h @@ -71,7 +71,7 @@ #define MICROPY_HW_ENABLE_GPIO38 (1) #define MICROPY_HW_ENABLE_GPIO39 (1) -#elif CONFIG_IDF_TARGET_ESP32C3 +#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 #define MICROPY_HW_ENABLE_GPIO0 (1) #define MICROPY_HW_ENABLE_GPIO1 (1) diff --git a/ports/esp32/machine_pwm.c b/ports/esp32/machine_pwm.c index e5d8986c8a..b823e3f08f 100644 --- a/ports/esp32/machine_pwm.c +++ b/ports/esp32/machine_pwm.c @@ -241,7 +241,12 @@ static void set_freq(machine_pwm_obj_t *self, unsigned int freq, ledc_timer_conf // Configure the new resolution and frequency timer->duty_resolution = res; timer->freq_hz = freq; + #if CONFIG_IDF_TARGET_ESP32C6 + // TODO don't know if this is appropriate, compiler error suggested it + timer->clk_cfg = LEDC_USE_XTAL_CLK; + #else timer->clk_cfg = LEDC_USE_APB_CLK; + #endif #if SOC_LEDC_SUPPORT_REF_TICK if (freq < EMPIRIC_FREQ) { timer->clk_cfg = LEDC_USE_REF_TICK; diff --git a/ports/esp32/main.c b/ports/esp32/main.c index 62dd7ae3cc..c8705093a7 100644 --- a/ports/esp32/main.c +++ b/ports/esp32/main.c @@ -72,7 +72,7 @@ #define MP_TASK_PRIORITY (ESP_TASK_PRIO_MIN + 1) // Set the margin for detecting stack overflow, depending on the CPU architecture. -#if CONFIG_IDF_TARGET_ESP32C3 +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 #define MP_TASK_STACK_LIMIT_MARGIN (2048) #else #define MP_TASK_STACK_LIMIT_MARGIN (1024) diff --git a/ports/esp32/main_esp32c6/CMakeLists.txt b/ports/esp32/main_esp32c6/CMakeLists.txt new file mode 100644 index 0000000000..307c0f3218 --- /dev/null +++ b/ports/esp32/main_esp32c6/CMakeLists.txt @@ -0,0 +1,14 @@ +# Set location of base MicroPython directory. +if(NOT MICROPY_DIR) + get_filename_component(MICROPY_DIR ${CMAKE_CURRENT_LIST_DIR}/../../.. ABSOLUTE) +endif() + +# Set location of the ESP32 port directory. +if(NOT MICROPY_PORT_DIR) + get_filename_component(MICROPY_PORT_DIR ${MICROPY_DIR}/ports/esp32 ABSOLUTE) +endif() + +list(APPEND MICROPY_SOURCE_LIB ${MICROPY_DIR}/shared/runtime/gchelper_generic.c) +list(APPEND IDF_COMPONENTS riscv) + +include(${MICROPY_PORT_DIR}/esp32_common.cmake) diff --git a/ports/esp32/main_esp32c6/idf_component.yml b/ports/esp32/main_esp32c6/idf_component.yml new file mode 100644 index 0000000000..5bbab6d8c3 --- /dev/null +++ b/ports/esp32/main_esp32c6/idf_component.yml @@ -0,0 +1,5 @@ +## IDF Component Manager Manifest File +dependencies: + espressif/mdns: "~1.1.0" + idf: + version: ">=5.1.0" diff --git a/ports/esp32/main_esp32c6/linker.lf b/ports/esp32/main_esp32c6/linker.lf new file mode 100644 index 0000000000..31c5b4563c --- /dev/null +++ b/ports/esp32/main_esp32c6/linker.lf @@ -0,0 +1 @@ +# Empty linker fragment (no workaround required for C3, see main_esp32/linker.lf). diff --git a/ports/esp32/modesp32.c b/ports/esp32/modesp32.c index f363939483..32fc65dd70 100644 --- a/ports/esp32/modesp32.c +++ b/ports/esp32/modesp32.c @@ -29,7 +29,7 @@ #include #include -#include "soc/rtc_cntl_reg.h" +// #include "soc/rtc_cntl_reg.h" #include "driver/gpio.h" #include "driver/adc.h" #include "esp_heap_caps.h" diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c index 759455a59a..5f94a77f22 100644 --- a/ports/esp32/modmachine.c +++ b/ports/esp32/modmachine.c @@ -90,7 +90,7 @@ typedef enum { static bool is_soft_reset = 0; -#if CONFIG_IDF_TARGET_ESP32C3 +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 int esp_clk_cpu_freq(void); #endif @@ -101,11 +101,11 @@ static mp_obj_t mp_machine_get_freq(void) { static void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) { mp_int_t freq = mp_obj_get_int(args[0]) / 1000000; if (freq != 20 && freq != 40 && freq != 80 && freq != 160 - #if !CONFIG_IDF_TARGET_ESP32C3 + #if !(CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6) && freq != 240 #endif ) { - #if CONFIG_IDF_TARGET_ESP32C3 + #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 mp_raise_ValueError(MP_ERROR_TEXT("frequency must be 20MHz, 40MHz, 80Mhz or 160MHz")); #else mp_raise_ValueError(MP_ERROR_TEXT("frequency must be 20MHz, 40MHz, 80Mhz, 160MHz or 240MHz")); @@ -118,6 +118,8 @@ static void mp_machine_set_freq(size_t n_args, const mp_obj_t *args) { esp_pm_config_esp32_t pm; #elif CONFIG_IDF_TARGET_ESP32C3 esp_pm_config_esp32c3_t pm; + #elif CONFIG_IDF_TARGET_ESP32C6 + esp_pm_config_esp32c6_t pm; #elif CONFIG_IDF_TARGET_ESP32S2 esp_pm_config_esp32s2_t pm; #elif CONFIG_IDF_TARGET_ESP32S3 @@ -146,7 +148,7 @@ static void machine_sleep_helper(wake_type_t wake_type, size_t n_args, const mp_ esp_sleep_enable_timer_wakeup(((uint64_t)expiry) * 1000); } - #if !CONFIG_IDF_TARGET_ESP32C3 + #if !(CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6) if (machine_rtc_config.ext0_pin != -1 && (machine_rtc_config.ext0_wake_types & wake_type)) { esp_sleep_enable_ext0_wakeup(machine_rtc_config.ext0_pin, machine_rtc_config.ext0_level ? 1 : 0); diff --git a/ports/esp32/mpconfigport.h b/ports/esp32/mpconfigport.h index 0afb12f85c..df1ed5dde2 100644 --- a/ports/esp32/mpconfigport.h +++ b/ports/esp32/mpconfigport.h @@ -19,7 +19,7 @@ // object representation and NLR handling #define MICROPY_OBJ_REPR (MICROPY_OBJ_REPR_A) #define MICROPY_NLR_SETJMP (1) -#if CONFIG_IDF_TARGET_ESP32C3 +#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 #define MICROPY_GCREGS_SETJMP (1) #endif @@ -42,7 +42,7 @@ // emitters #define MICROPY_PERSISTENT_CODE_LOAD (1) -#if !CONFIG_IDF_TARGET_ESP32C3 +#if !(CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6) #define MICROPY_EMIT_XTENSAWIN (1) #endif @@ -164,6 +164,8 @@ #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-esp32s3" #elif CONFIG_IDF_TARGET_ESP32C3 #define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-esp32c3" +#elif CONFIG_IDF_TARGET_ESP32C6 +#define MICROPY_PY_NETWORK_HOSTNAME_DEFAULT "mpy-esp32c6" #endif #endif #define MICROPY_PY_NETWORK_INCLUDEFILE "ports/esp32/modnetwork.h" @@ -299,7 +301,7 @@ void boardctrl_startup(void); #if MICROPY_PY_NETWORK_LAN && CONFIG_ETH_USE_SPI_ETHERNET #ifndef MICROPY_PY_NETWORK_LAN_SPI_CLOCK_SPEED_MZ -#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 #define MICROPY_PY_NETWORK_LAN_SPI_CLOCK_SPEED_MZ (12) #else #define MICROPY_PY_NETWORK_LAN_SPI_CLOCK_SPEED_MZ (36) diff --git a/ports/esp32/mphalport.h b/ports/esp32/mphalport.h index 9a7c39487d..e5e9549109 100644 --- a/ports/esp32/mphalport.h +++ b/ports/esp32/mphalport.h @@ -73,7 +73,7 @@ void check_esp_err_(esp_err_t code, const char *func, const int line, const char uint32_t mp_hal_ticks_us(void); __attribute__((always_inline)) static inline uint32_t mp_hal_ticks_cpu(void) { uint32_t ccount; - #if CONFIG_IDF_TARGET_ESP32C3 + #if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6 __asm__ __volatile__ ("csrr %0, 0x7E2" : "=r" (ccount)); // Machine Performance Counter Value #else __asm__ __volatile__ ("rsr %0,ccount" : "=a" (ccount)); diff --git a/ports/esp32/mpnimbleport.c b/ports/esp32/mpnimbleport.c index 669aeb746a..4e6eff9189 100644 --- a/ports/esp32/mpnimbleport.c +++ b/ports/esp32/mpnimbleport.c @@ -32,7 +32,9 @@ #define DEBUG_printf(...) // printf("nimble (esp32): " __VA_ARGS__) +#if !CONFIG_IDF_TARGET_ESP32C6 #include "esp_nimble_hci.h" +#endif #include "nimble/nimble_port.h" #include "nimble/nimble_port_freertos.h" @@ -46,13 +48,16 @@ static void ble_host_task(void *param) { void mp_bluetooth_nimble_port_hci_init(void) { DEBUG_printf("mp_bluetooth_nimble_port_hci_init\n"); + #if !CONFIG_IDF_TARGET_ESP32C6 esp_nimble_hci_init(); + #endif } void mp_bluetooth_nimble_port_hci_deinit(void) { DEBUG_printf("mp_bluetooth_nimble_port_hci_deinit\n"); - + #if !CONFIG_IDF_TARGET_ESP32C6 esp_nimble_hci_deinit(); + #endif } void mp_bluetooth_nimble_port_start(void) { From 3e772f6a229ab059922bab8a4b202b1a0ba6749b Mon Sep 17 00:00:00 2001 From: IhorNehrutsa Date: Wed, 27 Dec 2023 17:06:02 +0200 Subject: [PATCH 2/8] esp32/esp32c6: Add ADC support. Signed-off-by: IhorNehrutsa --- ports/esp32/machine_adc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/ports/esp32/machine_adc.c b/ports/esp32/machine_adc.c index 2f276836fe..11f7f3b070 100644 --- a/ports/esp32/machine_adc.c +++ b/ports/esp32/machine_adc.c @@ -148,11 +148,13 @@ static void mp_machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_p } static void madc_atten_helper(const machine_adc_obj_t *self, mp_int_t atten) { - esp_err_t err; + esp_err_t err = ESP_OK; if (self->block->unit_id == ADC_UNIT_1) { err = adc1_config_channel_atten(self->channel_id, atten); } else { + #if (SOC_ADC_PERIPH_NUM >= 2) err = adc2_config_channel_atten(self->channel_id, atten); + #endif } if (err != ESP_OK) { mp_raise_ValueError(MP_ERROR_TEXT("invalid atten")); From 53c34074082b9fba3b92226fdb5c39976adfba03 Mon Sep 17 00:00:00 2001 From: IhorNehrutsa Date: Wed, 27 Dec 2023 17:07:38 +0200 Subject: [PATCH 3/8] esp32/esp32c6: Fix timer clock configuration. Signed-off-by: IhorNehrutsa --- ports/esp32/machine_timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/esp32/machine_timer.c b/ports/esp32/machine_timer.c index 5e249e46e6..0dbedad883 100644 --- a/ports/esp32/machine_timer.c +++ b/ports/esp32/machine_timer.c @@ -157,7 +157,7 @@ static void machine_timer_enable(machine_timer_obj_t *self) { // Initialise the timer. timer_hal_init(&self->hal_context, self->group, self->index); timer_ll_enable_counter(self->hal_context.dev, self->index, false); - timer_ll_set_clock_source(self->hal_context.dev, self->index, GPTIMER_CLK_SRC_APB); + timer_ll_set_clock_source(self->hal_context.dev, self->index, GPTIMER_CLK_SRC_DEFAULT); timer_ll_set_clock_prescale(self->hal_context.dev, self->index, TIMER_DIVIDER); timer_hal_set_counter_value(&self->hal_context, 0); timer_ll_set_count_direction(self->hal_context.dev, self->index, GPTIMER_COUNT_UP); From 7e344a3b9aa0bca338e30d1933cd7484478b8466 Mon Sep 17 00:00:00 2001 From: IhorNehrutsa Date: Wed, 27 Dec 2023 17:09:30 +0200 Subject: [PATCH 4/8] esp32/esp32c6: Fix deep sleep gpio hold. Signed-off-by: IhorNehrutsa --- ports/esp32/modesp32.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/ports/esp32/modesp32.c b/ports/esp32/modesp32.c index 32fc65dd70..dd1893ce8d 100644 --- a/ports/esp32/modesp32.c +++ b/ports/esp32/modesp32.c @@ -138,6 +138,7 @@ static mp_obj_t esp32_wake_on_ulp(const mp_obj_t wake) { } static MP_DEFINE_CONST_FUN_OBJ_1(esp32_wake_on_ulp_obj, esp32_wake_on_ulp); +#if !SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP static mp_obj_t esp32_gpio_deep_sleep_hold(const mp_obj_t enable) { if (mp_obj_is_true(enable)) { gpio_deep_sleep_hold_en(); @@ -146,7 +147,9 @@ static mp_obj_t esp32_gpio_deep_sleep_hold(const mp_obj_t enable) { } return mp_const_none; } + static MP_DEFINE_CONST_FUN_OBJ_1(esp32_gpio_deep_sleep_hold_obj, esp32_gpio_deep_sleep_hold); +#endif #if CONFIG_IDF_TARGET_ESP32 @@ -199,7 +202,9 @@ static const mp_rom_map_elem_t esp32_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_wake_on_ext0), MP_ROM_PTR(&esp32_wake_on_ext0_obj) }, { MP_ROM_QSTR(MP_QSTR_wake_on_ext1), MP_ROM_PTR(&esp32_wake_on_ext1_obj) }, { MP_ROM_QSTR(MP_QSTR_wake_on_ulp), MP_ROM_PTR(&esp32_wake_on_ulp_obj) }, + #if !SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP { MP_ROM_QSTR(MP_QSTR_gpio_deep_sleep_hold), MP_ROM_PTR(&esp32_gpio_deep_sleep_hold_obj) }, + #endif #if CONFIG_IDF_TARGET_ESP32 { MP_ROM_QSTR(MP_QSTR_raw_temperature), MP_ROM_PTR(&esp32_raw_temperature_obj) }, #endif From 2a3a8f8f530ac36009ecc95dd2ce229326a0a9b9 Mon Sep 17 00:00:00 2001 From: Andrea Milazzo Date: Tue, 12 Mar 2024 09:45:19 +0100 Subject: [PATCH 5/8] esp32/adc: Add support for v5.2.1 calibration api. This new calibration routine exists for S3 in v5.1.1. It works for all platforms in 5.2.1. Signed-off-by: Andrew Leech --- ports/esp32/adc.c | 36 +++++++++++++++++++++++++++++++++--- ports/esp32/adc.h | 5 +++++ 2 files changed, 38 insertions(+), 3 deletions(-) diff --git a/ports/esp32/adc.c b/ports/esp32/adc.c index c5886624ec..7c9e0cfad6 100644 --- a/ports/esp32/adc.c +++ b/ports/esp32/adc.c @@ -28,6 +28,7 @@ #include "py/mphal.h" #include "adc.h" #include "driver/adc.h" +#include "esp_adc/adc_cali_scheme.h" #define DEFAULT_VREF 1100 @@ -63,30 +64,59 @@ void madcblock_bits_helper(machine_adc_block_obj_t *self, mp_int_t bits) { adc1_config_width(self->width); } for (adc_atten_t atten = ADC_ATTEN_DB_0; atten < ADC_ATTEN_MAX; atten++) { + #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 2, 1) + if (self->handle[atten] != NULL) { + adc_cali_curve_fitting_config_t cali_config = { + .unit_id = self->unit_id, + .atten = atten, + .bitwidth = self->width, + }; + check_esp_err(adc_cali_create_scheme_curve_fitting(&cali_config, self->handle[atten])); + } + #else if (self->characteristics[atten] != NULL) { esp_adc_cal_characterize(self->unit_id, atten, self->width, DEFAULT_VREF, self->characteristics[atten]); } + #endif } } mp_int_t madcblock_read_helper(machine_adc_block_obj_t *self, adc_channel_t channel_id) { - int raw; + int raw = 0; if (self->unit_id == ADC_UNIT_1) { raw = adc1_get_raw(channel_id); } else { + #if (SOC_ADC_PERIPH_NUM >= 2) check_esp_err(adc2_get_raw(channel_id, self->width, &raw)); + #endif } return raw; } mp_int_t madcblock_read_uv_helper(machine_adc_block_obj_t *self, adc_channel_t channel_id, adc_atten_t atten) { int raw = madcblock_read_helper(self, channel_id); + #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 2, 1) + adc_cali_handle_t *adc_handle = self->handle[atten]; + if (adc_handle == NULL) { + adc_cali_curve_fitting_config_t cali_config = { + .unit_id = self->unit_id, + .atten = atten, + .bitwidth = self->width, + }; + adc_handle = malloc(sizeof(adc_cali_handle_t)); + check_esp_err(adc_cali_create_scheme_curve_fitting(&cali_config, adc_handle)); + self->handle[atten] = adc_handle; + } + int uv; + check_esp_err(adc_cali_raw_to_voltage(*adc_handle, raw, &uv)); + #else esp_adc_cal_characteristics_t *adc_chars = self->characteristics[atten]; if (adc_chars == NULL) { adc_chars = malloc(sizeof(esp_adc_cal_characteristics_t)); esp_adc_cal_characterize(self->unit_id, atten, self->width, DEFAULT_VREF, adc_chars); self->characteristics[atten] = adc_chars; } - mp_int_t uv = esp_adc_cal_raw_to_voltage(raw, adc_chars) * 1000; - return uv; + mp_int_t uv = esp_adc_cal_raw_to_voltage(raw, adc_chars); + #endif + return (mp_int_t)uv * 1000; } diff --git a/ports/esp32/adc.h b/ports/esp32/adc.h index ae5c0d3c37..61771255d3 100644 --- a/ports/esp32/adc.h +++ b/ports/esp32/adc.h @@ -30,6 +30,7 @@ #include "py/runtime.h" #include "esp_adc_cal.h" +#include "esp_adc/adc_cali_scheme.h" #define ADC_ATTEN_MAX SOC_ADC_ATTEN_NUM @@ -38,7 +39,11 @@ typedef struct _machine_adc_block_obj_t { adc_unit_t unit_id; mp_int_t bits; adc_bits_width_t width; + #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 2, 1) + adc_cali_handle_t *handle[ADC_ATTEN_MAX]; + #else esp_adc_cal_characteristics_t *characteristics[ADC_ATTEN_MAX]; + #endif } machine_adc_block_obj_t; typedef struct _machine_adc_obj_t { From 02463d4d1ea31a1869a61f77ffd49b4e704bc5ec Mon Sep 17 00:00:00 2001 From: Andrea Milazzo Date: Tue, 12 Mar 2024 09:46:12 +0100 Subject: [PATCH 6/8] esp32/esp32c6: Add support for LP_UART. Signed-off-by: Andrew Leech --- ports/esp32/machine_uart.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/ports/esp32/machine_uart.c b/ports/esp32/machine_uart.c index 50c9a19bef..e82267bcad 100644 --- a/ports/esp32/machine_uart.c +++ b/ports/esp32/machine_uart.c @@ -358,12 +358,18 @@ static mp_obj_t mp_machine_uart_make_new(const mp_obj_type_t *type, size_t n_arg self->rx = 9; self->tx = 10; break; - #if SOC_UART_NUM > 2 + #if SOC_UART_HP_NUM > 2 case UART_NUM_2: self->rx = 16; self->tx = 17; break; #endif + #if (SOC_UART_LP_NUM >= 1) + case LP_UART_NUM_0: + self->rx = 4; + self->tx = 5; + #endif + } #if MICROPY_HW_ENABLE_UART_REPL From 74b2c9bbadc2f0086e46dd2bbbc3f0f88574d3db Mon Sep 17 00:00:00 2001 From: Andrew Leech Date: Wed, 24 Jan 2024 14:03:17 +1100 Subject: [PATCH 7/8] esp32/boards/ESP32_GENERIC_C6: Add support for esp32c6. Signed-off-by: Andrew Leech --- .../esp32/boards/ESP32_GENERIC_C6/board.json | 19 +++++++++++++++++++ .../ESP32_GENERIC_C6/mpconfigboard.cmake | 9 +++++++++ .../boards/ESP32_GENERIC_C6/mpconfigboard.h | 12 ++++++++++++ .../boards/ESP32_GENERIC_C6/sdkconfig.board | 7 +++++++ 4 files changed, 47 insertions(+) create mode 100644 ports/esp32/boards/ESP32_GENERIC_C6/board.json create mode 100644 ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.cmake create mode 100644 ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.h create mode 100644 ports/esp32/boards/ESP32_GENERIC_C6/sdkconfig.board diff --git a/ports/esp32/boards/ESP32_GENERIC_C6/board.json b/ports/esp32/boards/ESP32_GENERIC_C6/board.json new file mode 100644 index 0000000000..963d9515be --- /dev/null +++ b/ports/esp32/boards/ESP32_GENERIC_C6/board.json @@ -0,0 +1,19 @@ +{ + "deploy": [ + "../deploy_c6.md" + ], + "docs": "", + "features": [ + "BLE", + "WiFi" + ], + "id": "esp32c6", + "images": [ + "esp32c6_devkitmini.jpg" + ], + "mcu": "esp32c6", + "product": "ESP32-C6", + "thumbnail": "", + "url": "https://www.espressif.com/en/products/modules", + "vendor": "Espressif" +} diff --git a/ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.cmake b/ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.cmake new file mode 100644 index 0000000000..31ec4f4ad9 --- /dev/null +++ b/ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.cmake @@ -0,0 +1,9 @@ +set(IDF_TARGET esp32c6) + +set(SDKCONFIG_DEFAULTS + boards/sdkconfig.base + boards/sdkconfig.ble + boards/ESP32_GENERIC_C6/sdkconfig.board +) + +#set(CONFIG_BT_NIMBLE_LEGACY_VHCI_ENABLE "y") diff --git a/ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.h b/ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.h new file mode 100644 index 0000000000..b5b06b955b --- /dev/null +++ b/ports/esp32/boards/ESP32_GENERIC_C6/mpconfigboard.h @@ -0,0 +1,12 @@ +// This configuration is for a generic ESP32C6 board with 4MiB (or more) of flash. + +#define MICROPY_HW_BOARD_NAME "ESP32C6 module" +#define MICROPY_HW_MCU_NAME "ESP32C6" + +#define MICROPY_HW_ENABLE_SDCARD (0) +#define MICROPY_PY_MACHINE_DAC (0) +#define MICROPY_PY_MACHINE_I2S (0) + +// #define MICROPY_PY_BLUETOOTH (1) +// #define MICROPY_BLUETOOTH_NIMBLE (1) +// #define MICROPY_BLUETOOTH_NIMBLE_BINDINGS_ONLY (1) diff --git a/ports/esp32/boards/ESP32_GENERIC_C6/sdkconfig.board b/ports/esp32/boards/ESP32_GENERIC_C6/sdkconfig.board new file mode 100644 index 0000000000..a67a13abfd --- /dev/null +++ b/ports/esp32/boards/ESP32_GENERIC_C6/sdkconfig.board @@ -0,0 +1,7 @@ +CONFIG_ESP32C6_BROWNOUT_DET=y +CONFIG_ESP32C6_BROWNOUT_DET_LVL_SEL_7= +CONFIG_ESP32C6_BROWNOUT_DET_LVL_SEL_4=y +CONFIG_ESP32C6_BROWNOUT_DET_LVL=4 +CONFIG_ESP_CONSOLE_UART_DEFAULT= +CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 +CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y From a282fefb0d653113de1cb880e378522011f6c563 Mon Sep 17 00:00:00 2001 From: Andrew Leech Date: Fri, 29 Mar 2024 06:35:05 +1100 Subject: [PATCH 8/8] esp32/Makefile: Only set port & baud for jobs that access hardware. In idf v5.2.1 if the port flag is set it's validated even on jobs that don't access hardware like clean. This causes the job to fail if device isn't connected. Signed-off-by: Andrew Leech --- ports/esp32/Makefile | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/ports/esp32/Makefile b/ports/esp32/Makefile index 3df2af4716..d79adf7772 100644 --- a/ports/esp32/Makefile +++ b/ports/esp32/Makefile @@ -43,6 +43,7 @@ ifdef USER_C_MODULES endif IDFPY_FLAGS += -D MICROPY_BOARD=$(BOARD) -D MICROPY_BOARD_DIR="$(abspath $(BOARD_DIR))" $(CMAKE_ARGS) +DEVICE += -p $(PORT) -b $(BAUD) ifdef FROZEN_MANIFEST IDFPY_FLAGS += -D MICROPY_FROZEN_MANIFEST=$(FROZEN_MANIFEST) @@ -59,7 +60,7 @@ endif HELP_BUILD_ERROR ?= "See \033[1;31mhttps://github.com/micropython/micropython/wiki/Build-Troubleshooting\033[0m" define RUN_IDF_PY - idf.py $(IDFPY_FLAGS) -B $(BUILD) -p $(PORT) -b $(BAUD) $(1) + idf.py $(IDFPY_FLAGS) -B $(BUILD) $(1) endef all: @@ -78,13 +79,13 @@ clean: $(call RUN_IDF_PY,fullclean) deploy: - $(call RUN_IDF_PY,flash) + $(call RUN_IDF_PY,$(DEVICE) flash) erase: - $(call RUN_IDF_PY,erase-flash) + $(call RUN_IDF_PY,$(DEVICE) erase-flash) monitor: - $(call RUN_IDF_PY,monitor) + $(call RUN_IDF_PY,$(DEVICE) monitor) size: $(call RUN_IDF_PY,size)