stmhal: L4: Add board definition files for STM32L476DISC.

pull/1917/merge
Tobias Badertscher 2016-03-15 10:15:01 +01:00 zatwierdzone przez Damien George
rodzic e943a407f2
commit 0b6e28c999
6 zmienionych plików z 810 dodań i 0 usunięć

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#include STM32_HAL_H
#define MICROPY_HW_BOARD_NAME "L476-DISCO"
#define MICROPY_HW_MCU_NAME "STM32L476"
#define MICROPY_HW_HAS_SWITCH (1)
#define MICROPY_HW_HAS_FLASH (1)
#define MICROPY_HW_HAS_SDCARD (0)
#define MICROPY_HW_HAS_MMA7660 (0)
#define MICROPY_HW_HAS_LIS3DSH (0)
#define MICROPY_HW_HAS_LCD (0)
#define MICROPY_HW_ENABLE_RNG (1)
#define MICROPY_HW_ENABLE_RTC (1)
#define MICROPY_HW_ENABLE_TIMER (1)
#define MICROPY_HW_ENABLE_SERVO (0)
#define MICROPY_HW_ENABLE_DAC (0)
#define MICROPY_HW_ENABLE_CAN (0)
// HSE is 8MHz
#define MICROPY_HW_CLK_PLLM (2)
#define MICROPY_HW_CLK_PLLN (40)
#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7)
#define MICROPY_HW_CLK_PLLR (RCC_PLLP_DIV7)
#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2)
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4
// USART config
#define MICROPY_HW_UART2_PORT (GPIOD)
#define MICROPY_HW_UART2_PINS (GPIO_PIN_5 | GPIO_PIN_6)
// I2C busses
#define MICROPY_HW_I2C1_SCL (pin_B6)
#define MICROPY_HW_I2C1_SDA (pin_B7)
// We use an array of baudrates and corresponding TIMINGR values.
//
// The value 0x90112626 was obtained from the DISCOVERY_I2C1_TIMING constant
// defined in the STM32L4Cube file Drivers/BSP/STM32L476G-Discovery/stm32l476g_discovery.h
#define MICROPY_HW_I2C_BAUDRATE_TIMING {{100000, 0x90112626}}
#define MICROPY_HW_I2C_BAUDRATE_DEFAULT 100000
#define MICROPY_HW_I2C_BAUDRATE_MAX 100000
// SPI busses
#define MICROPY_HW_SPI2_NSS (pin_D0)
#define MICROPY_HW_SPI2_SCK (pin_D1)
#define MICROPY_HW_SPI2_MISO (pin_D3)
#define MICROPY_HW_SPI2_MOSI (pin_D4)
// Joystick is pulled low. Pressing the button makes the input go high.
#define MICROPY_HW_USRSW_PIN (pin_A0)
#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL)
#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING)
#define MICROPY_HW_USRSW_PRESSED (1)
// LEDs
#define MICROPY_HW_LED1 (pin_B2) // red
#define MICROPY_HW_LED2 (pin_E8) // green
#define MICROPY_HW_LED_OTYPE (GPIO_MODE_OUTPUT_PP)
#define MICROPY_HW_LED_ON(pin) (pin->gpio->BSRR = pin->pin_mask)
#define MICROPY_HW_LED_OFF(pin) (pin->gpio->BSRR = pin->pin_mask<<16)
// USB config
// #define MICROPY_HW_USB_OTG_ID_PIN (pin_C12) // This is not the official ID Pin which should be PA10

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MCU_SERIES = l4
CMSIS_MCU = STM32L476xx
AF_FILE = boards/stm32l476_af.csv
LD_FILE = boards/stm32l476xg.ld

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PA0,PA0
PA1,PA1
PA2,PA2
PA3,PA3
PA4,PA4
PA5,PA5
PA6,PA6
PA7,PA7
PA8,PA8
PA9,PA9
PA10,PA10
PA11,PA11
PA12,PA12
PA13,PA13
PA14,PA14
PA15,PA15
PB0,PB0
PB1,PB1
PB2,PB2
PB3,PB3
PB4,PB4
PB5,PB5
PB6,PB6
PB7,PB7
PB8,PB8
PB9,PB9
PB10,PB10
PB11,PB11
PB12,PB12
PB13,PB13
PB14,PB14
PB15,PB15
PC0,PC0
PC1,PC1
PC2,PC2
PC3,PC3
PC4,PC4
PC5,PC5
PC6,PC6
PC7,PC7
PC8,PC8
PC9,PC9
PC10,PC10
PC11,PC11
PC12,PC12
PC13,PC13
PC14,PC14
PC15,PC15
PD0,PD0
PD1,PD1
PD2,PD2
PD3,PD3
PD4,PD4
PD5,PD5
PD6,PD6
PD7,PD7
PD8,PD8
PD9,PD9
PD10,PD10
PD11,PD11
PD12,PD12
PD13,PD13
PD14,PD14
PD15,PD15
PE0,PE0
PE1,PE1
PE2,PE2
PE3,PE3
PE4,PE4
PE5,PE5
PE6,PE6
PE7,PE7
PE8,PE8
PE9,PE9
PE10,PE10
PE11,PE11
PE12,PE12
PE13,PE13
PE14,PE14
PE15,PE15
PF0,PF0
PF1,PF1
PF2,PF2
PF3,PF3
PF4,PF4
PF5,PF5
PF6,PF6
PF7,PF7
PF8,PF8
PF9,PF9
PF10,PF10
PF11,PF11
PF12,PF12
PF13,PF13
PF14,PF14
PF15,PF15
PG0,PG0
PG1,PG1
PG2,PG2
PG3,PG3
PG4,PG4
PG5,PG5
PG6,PG6
PG7,PG7
PG8,PG8
PG9,PG9
PG10,PG10
PG11,PG11
PG12,PG12
PG13,PG13
PG14,PG14
PG15,PG15
PH0,PH0
PH1,PH1
1 PA0 PA0
2 PA1 PA1
3 PA2 PA2
4 PA3 PA3
5 PA4 PA4
6 PA5 PA5
7 PA6 PA6
8 PA7 PA7
9 PA8 PA8
10 PA9 PA9
11 PA10 PA10
12 PA11 PA11
13 PA12 PA12
14 PA13 PA13
15 PA14 PA14
16 PA15 PA15
17 PB0 PB0
18 PB1 PB1
19 PB2 PB2
20 PB3 PB3
21 PB4 PB4
22 PB5 PB5
23 PB6 PB6
24 PB7 PB7
25 PB8 PB8
26 PB9 PB9
27 PB10 PB10
28 PB11 PB11
29 PB12 PB12
30 PB13 PB13
31 PB14 PB14
32 PB15 PB15
33 PC0 PC0
34 PC1 PC1
35 PC2 PC2
36 PC3 PC3
37 PC4 PC4
38 PC5 PC5
39 PC6 PC6
40 PC7 PC7
41 PC8 PC8
42 PC9 PC9
43 PC10 PC10
44 PC11 PC11
45 PC12 PC12
46 PC13 PC13
47 PC14 PC14
48 PC15 PC15
49 PD0 PD0
50 PD1 PD1
51 PD2 PD2
52 PD3 PD3
53 PD4 PD4
54 PD5 PD5
55 PD6 PD6
56 PD7 PD7
57 PD8 PD8
58 PD9 PD9
59 PD10 PD10
60 PD11 PD11
61 PD12 PD12
62 PD13 PD13
63 PD14 PD14
64 PD15 PD15
65 PE0 PE0
66 PE1 PE1
67 PE2 PE2
68 PE3 PE3
69 PE4 PE4
70 PE5 PE5
71 PE6 PE6
72 PE7 PE7
73 PE8 PE8
74 PE9 PE9
75 PE10 PE10
76 PE11 PE11
77 PE12 PE12
78 PE13 PE13
79 PE14 PE14
80 PE15 PE15
81 PF0 PF0
82 PF1 PF1
83 PF2 PF2
84 PF3 PF3
85 PF4 PF4
86 PF5 PF5
87 PF6 PF6
88 PF7 PF7
89 PF8 PF8
90 PF9 PF9
91 PF10 PF10
92 PF11 PF11
93 PF12 PF12
94 PF13 PF13
95 PF14 PF14
96 PF15 PF15
97 PG0 PG0
98 PG1 PG1
99 PG2 PG2
100 PG3 PG3
101 PG4 PG4
102 PG5 PG5
103 PG6 PG6
104 PG7 PG7
105 PG8 PG8
106 PG9 PG9
107 PG10 PG10
108 PG11 PG11
109 PG12 PG12
110 PG13 PG13
111 PG14 PG14
112 PG15 PG15
113 PH0 PH0
114 PH1 PH1

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/**
******************************************************************************
* @file stm32l4xx_hal_conf.h
* @author MCD Application Team
* @version V1.2.0
* @date 25-November-2015
* @brief HAL configuration template file.
* This file should be copied to the application folder and renamed
* to stm32l4xx_hal_conf.h.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_CONF_H
#define __STM32L4xx_HAL_CONF_H
#ifdef __cplusplus
extern "C" {
#endif
#define USE_USB_FS
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */
/**
* @brief This is the list of modules to be used in the HAL driver
*/
#define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED
#define HAL_CAN_MODULE_ENABLED
/* #define HAL_COMP_MODULE_ENABLED */
#define HAL_CORTEX_MODULE_ENABLED
/* #define HAL_CRC_MODULE_ENABLED */
/* #define HAL_CRYP_MODULE_ENABLED */
#define HAL_DAC_MODULE_ENABLED
/* #define HAL_DFSDM_MODULE_ENABLED */
#define HAL_DMA_MODULE_ENABLED
/* #define HAL_FIREWALL_MODULE_ENABLED */
#define HAL_FLASH_MODULE_ENABLED
/* #define HAL_HCD_MODULE_ENABLED */
/* #define HAL_NAND_MODULE_ENABLED */
/* #define HAL_NOR_MODULE_ENABLED */
/* #define HAL_SRAM_MODULE_ENABLED */
#define HAL_GPIO_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED
/* #define HAL_IRDA_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
/* #define HAL_LCD_MODULE_ENABLED */
/* #define HAL_LPTIM_MODULE_ENABLED */
/* #define HAL_OPAMP_MODULE_ENABLED */
#define HAL_PCD_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED
/* #define HAL_QSPI_MODULE_ENABLED */
#define HAL_RCC_MODULE_ENABLED
#define HAL_RNG_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED
/* #define HAL_SAI_MODULE_ENABLED */
#define HAL_SD_MODULE_ENABLED
/* #define HAL_SMARTCARD_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
#define HAL_SPI_MODULE_ENABLED
/* #define HAL_SWPMI_MODULE_ENABLED */
#define HAL_TIM_MODULE_ENABLED
/* #define HAL_TSC_MODULE_ENABLED */
#define HAL_UART_MODULE_ENABLED
/* #define HAL_USART_MODULE_ENABLED */
/* #define HAL_WWDG_MODULE_ENABLED */
/* ########################## Oscillator Values adaptation ####################*/
/**
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSE is used as system clock source, directly or through the PLL).
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal Multiple Speed oscillator (MSI) default value.
* This value is the default MSI range value after Reset.
*/
#if !defined (MSI_VALUE)
#define MSI_VALUE ((uint32_t)4000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* MSI_VALUE */
/**
* @brief Internal High Speed oscillator (HSI) value.
* This value is used by the RCC HAL module to compute the system frequency
* (when HSI is used as system clock source, directly or through the PLL).
*/
#if !defined (HSI_VALUE)
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value.
*/
#if !defined (LSI_VALUE)
#define LSI_VALUE ((uint32_t)32000) /*!< LSI Typical Value in Hz*/
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
The real value may vary depending on the variations
in voltage and temperature. */
/**
* @brief External Low Speed oscillator (LSE) value.
* This value is used by the UART, RTC HAL module to compute the system frequency
*/
#if !defined (LSE_VALUE)
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief External clock source for SAI1 peripheral
* This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
* frequency.
*/
#if !defined (EXTERNAL_SAI1_CLOCK_VALUE)
#define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI1 External clock source in Hz*/
#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
/**
* @brief External clock source for SAI2 peripheral
* This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
* frequency.
*/
#if !defined (EXTERNAL_SAI2_CLOCK_VALUE)
#define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000) /*!< Value of the SAI2 External clock source in Hz*/
#endif /* EXTERNAL_SAI2_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/**
* @brief This is the HAL system configuration section
*/
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
#define TICK_INT_PRIORITY ((uint32_t)0x00) /*!< tick interrupt priority */
#define USE_RTOS 0
#define PREFETCH_ENABLE 1
#define INSTRUCTION_CACHE_ENABLE 1
#define DATA_CACHE_ENABLE 1
/* ########################## Assert Selection ############################## */
/**
* @brief Uncomment the line below to expanse the "assert_param" macro in the
* HAL drivers code
*/
/* #define USE_FULL_ASSERT 1 */
/* Includes ------------------------------------------------------------------*/
/**
* @brief Include module's header file
*/
#ifdef HAL_RCC_MODULE_ENABLED
#include "stm32l4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_GPIO_MODULE_ENABLED
#include "stm32l4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DMA_MODULE_ENABLED
#include "stm32l4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_DFSDM_MODULE_ENABLED
#include "stm32l4xx_hal_dfsdm.h"
#endif /* HAL_DFSDM_MODULE_ENABLED */
#ifdef HAL_CORTEX_MODULE_ENABLED
#include "stm32l4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_ADC_MODULE_ENABLED
#include "stm32l4xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_CAN_MODULE_ENABLED
#include "stm32l4xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_COMP_MODULE_ENABLED
#include "stm32l4xx_hal_comp.h"
#endif /* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32l4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_CRYP_MODULE_ENABLED
#include "stm32l4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_DAC_MODULE_ENABLED
#include "stm32l4xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_FIREWALL_MODULE_ENABLED
#include "stm32l4xx_hal_firewall.h"
#endif /* HAL_FIREWALL_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32l4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32l4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32l4xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32l4xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32l4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32l4xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_LCD_MODULE_ENABLED
#include "stm32l4xx_hal_lcd.h"
#endif /* HAL_LCD_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32l4xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_OPAMP_MODULE_ENABLED
#include "stm32l4xx_hal_opamp.h"
#endif /* HAL_OPAMP_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32l4xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32l4xx_hal_qspi.h"
#endif /* HAL_QSPI_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32l4xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32l4xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32l4xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32l4xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32l4xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32l4xx_hal_spi.h"
#endif /* HAL_SPI_MODULE_ENABLED */
#ifdef HAL_SWPMI_MODULE_ENABLED
#include "stm32l4xx_hal_swpmi.h"
#endif /* HAL_SWPMI_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32l4xx_hal_tim.h"
#endif /* HAL_TIM_MODULE_ENABLED */
#ifdef HAL_TSC_MODULE_ENABLED
#include "stm32l4xx_hal_tsc.h"
#endif /* HAL_TSC_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32l4xx_hal_uart.h"
#endif /* HAL_UART_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32l4xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32l4xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32l4xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32l4xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32l4xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32l4xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15
,,SYS_AF,TIM1/TIM2/TIM5/TIM8/LPTIM1,TIM1/TIM2/TIM3/TIM4/TIM5,TIM8,I2C1/I2C2/I2C3,SPI1/SPI2,SPI3/DFSDM,USART1/USART2/USART3,"UART4,
UART5,
LPUART1","CAN1, TSC","OTG_FS, QUADSPI",LCD,"SDMMC1, COMP1,
COMP2, FMC,
SWPMI1","SAI1, SAI2","TIM2, TIM15,
TIM16, TIM17,
LPTIM2",EVENTOUT
PortA,PA0,,TIM2_CH1,TIM5_CH1,TIM8_ETR,,,,USART2_CTS,UART4_TX,,,,,SAI1_EXTCLK,TIM2_ETR,EVENTOUT
PortA,PA1,,TIM2_CH2,TIM5_CH2,,,,,USART2_RTS_DE,UART4_RX,,,LCD_SEG0,,,TIM15_CH1N,EVENTOUT
PortA,PA2,,TIM2_CH3,TIM5_CH3,,,,,USART2_TX,,,,LCD_SEG1,,SAI2_EXTCLK,TIM15_CH1,EVENTOUT
PortA,PA3,,TIM2_CH4,TIM5_CH4,,,,,USART2_RX,,,,LCD_SEG2,,,TIM15_CH2,EVENTOUT
PortA,PA4,,,,,,SPI1_NSS,SPI3_NSS,USART2_CK,,,,,,SAI1_FS_B,LPTIM2_OUT,EVENTOUT
PortA,PA5,,TIM2_CH1,TIM2_ETR,TIM8_CH1N,,SPI1_SCK,,,,,,,,,LPTIM2_ETR,EVENTOUT
PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,SPI1_MISO,,USART3_CTS,,,QUADSPI_BK1_IO3,LCD_SEG3,TIM1_BKIN_COMP2,TIM8_BKIN_COMP2,TIM16_CH1,EVENTOUT
PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,,SPI1_MOSI,,,,,QUADSPI_BK1_IO2,LCD_SEG4,,,TIM17_CH1,EVENTOUT
PortA,PA8,MCO,TIM1_CH1,,,,,,USART1_CK,,,OTG_FS_SOF,LCD_COM0,,,LPTIM2_OUT,EVENTOUT
PortA,PA9,,TIM1_CH2,,,,,,USART1_TX,,,,LCD_COM1,,,TIM15_BKIN,EVENTOUT
PortA,PA10,,TIM1_CH3,,,,,,USART1_RX,,,OTG_FS_ID,LCD_COM2,,,TIM17_BKIN,EVENTOUT
PortA,PA11,,TIM1_CH4,TIM1_BKIN2,,,,,USART1_CTS,,CAN1_RX,OTG_FS_DM,,TIM1_BKIN2_COMP1,,,EVENTOUT
PortA,PA12,,TIM1_ETR,,,,,,USART1_RTS_DE,,CAN1_TX,OTG_FS_DP,,,,,EVENTOUT
PortA,PA13,JTMS-SWDIO,IR_OUT,,,,,,,,,OTG_FS_NOE,,,,,EVENTOUT
PortA,PA14,JTCK-SWCLK,,,,,,,,,,,,,,,EVENTOUT
PortA,PA15,JTDI,TIM2_CH1,TIM2_ETR,,,SPI1_NSS,SPI3_NSS,,UART4_RTS_DE,TSC_G3_IO1,,LCD_SEG17,,SAI2_FS_B,,EVENTOUT
PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,,,,USART3_CK,,,QUADSPI_BK1_IO1,LCD_SEG5,COMP1_OUT,,,EVENTOUT
PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM_DATIN0,USART3_RTS_DE,,,QUADSPI_BK1_IO0,LCD_SEG6,,,LPTIM2_IN1,EVENTOUT
PortB,PB2,RTC_OUT,LPTIM1_OUT,,,I2C3_SMBA,,DFSDM_CKIN0,,,,,,,,,EVENTOUT
PortB,PB3,JTDO-TRACESWO,TIM2_CH2,,,,SPI1_SCK,SPI3_SCK,USART1_RTS_DE,,,,LCD_SEG7,,SAI1_SCK_B,,EVENTOUT
PortB,PB4,NJTRST,,TIM3_CH1,,,SPI1_MISO,SPI3_MISO,USART1_CTS,UART5_RTS_DE,TSC_G2_IO1,,LCD_SEG8,,SAI1_MCLK_B,TIM17_BKIN,EVENTOUT
PortB,PB5,,LPTIM1_IN1,TIM3_CH2,,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI,USART1_CK,UART5_CTS,TSC_G2_IO2,,LCD_SEG9,COMP2_OUT,SAI1_SD_B,TIM16_BKIN,EVENTOUT
PortB,PB6,,LPTIM1_ETR,TIM4_CH1,TIM8_BKIN2,I2C1_SCL,,DFSDM_DATIN5,USART1_TX,,TSC_G2_IO3,,,TIM8_BKIN2_COMP2,SAI1_FS_B,TIM16_CH1N,EVENTOUT
PortB,PB7,,LPTIM1_IN2,TIM4_CH2,TIM8_BKIN,I2C1_SDA,,DFSDM_CKIN5,USART1_RX,UART4_CTS,TSC_G2_IO4,,LCD_SEG21,FMC_NL,TIM8_BKIN_COMP1,TIM17_CH1N,EVENTOUT
PortB,PB8,,,TIM4_CH3,,I2C1_SCL,,DFSDM_DATIN6,,,CAN1_RX,,LCD_SEG16,SDMMC1_D4,SAI1_MCLK_A,TIM16_CH1,EVENTOUT
PortB,PB9,,IR_OUT,TIM4_CH4,,I2C1_SDA,SPI2_NSS,DFSDM_CKIN6,,,CAN1_TX,,LCD_COM3,SDMMC1_D5,SAI1_FS_A,TIM17_CH1,EVENTOUT
PortB,PB10,,TIM2_CH3,,,I2C2_SCL,SPI2_SCK,DFSDM_DATIN7,USART3_TX,LPUART1_RX,,QUADSPI_CLK,LCD_SEG10,COMP1_OUT,SAI1_SCK_A,,EVENTOUT
PortB,PB11,,TIM2_CH4,,,I2C2_SDA,,DFSDM_CKIN7,USART3_RX,LPUART1_TX,,QUADSPI_NCS,LCD_SEG11,COMP2_OUT,,,EVENTOUT
PortB,PB12,,TIM1_BKIN,,TIM1_BKIN_COMP2,I2C2_SMBA,SPI2_NSS,DFSDM_DATIN1,USART3_CK,LPUART1_RTS_DE,TSC_G1_IO1,,LCD_SEG12,SWPMI1_IO,SAI2_FS_A,TIM15_BKIN,EVENTOUT
PortB,PB13,,TIM1_CH1N,,,I2C2_SCL,SPI2_SCK,DFSDM_CKIN1,USART3_CTS,LPUART1_CTS,TSC_G1_IO2,,LCD_SEG13,SWPMI1_TX,SAI2_SCK_A,TIM15_CH1N,EVENTOUT
PortB,PB14,,TIM1_CH2N,,TIM8_CH2N,I2C2_SDA,SPI2_MISO,DFSDM_DATIN2,USART3_RTS_DE,,TSC_G1_IO3,,LCD_SEG14,SWPMI1_RX,SAI2_MCLK_A,TIM15_CH1,EVENTOUT
PortB,PB15,RTC_REFIN,TIM1_CH3N,,TIM8_CH3N,,SPI2_MOSI,DFSDM_CKIN2,,,TSC_G1_IO4,,LCD_SEG15,SWPMI1_SUSPEND,SAI2_SD_A,TIM15_CH2,EVENTOUT
PortC,PC0,,LPTIM1_IN1,,,I2C3_SCL,,DFSDM_DATIN4,,LPUART1_RX,,,LCD_SEG18,,,LPTIM2_IN1,EVENTOUT
PortC,PC1,,LPTIM1_OUT,,,I2C3_SDA,,DFSDM_CKIN4,,LPUART1_TX,,,LCD_SEG19,,,,EVENTOUT
PortC,PC2,,LPTIM1_IN2,,,,SPI2_MISO,DFSDM_CKOUT,,,,,LCD_SEG20,,,,EVENTOUT
PortC,PC3,,LPTIM1_ETR,,,,SPI2_MOSI,,,,,,LCD_VLCD,,SAI1_SD_A,LPTIM2_ETR,EVENTOUT
PortC,PC4,,,,,,,,USART3_TX,,,,LCD_SEG22,,,,EVENTOUT
PortC,PC5,,,,,,,,USART3_RX,,,,LCD_SEG23,,,,EVENTOUT
PortC,PC6,,,TIM3_CH1,TIM8_CH1,,,DFSDM_CKIN3,,,TSC_G4_IO1,,LCD_SEG24,SDMMC1_D6,SAI2_MCLK_A,,EVENTOUT
PortC,PC7,,,TIM3_CH2,TIM8_CH2,,,DFSDM_DATIN3,,,TSC_G4_IO2,,LCD_SEG25,SDMMC1_D7,SAI2_MCLK_B,,EVENTOUT
PortC,PC8,,,TIM3_CH3,TIM8_CH3,,,,,,TSC_G4_IO3,,LCD_SEG26,SDMMC1_D0,,,EVENTOUT
PortC,PC9,,TIM8_BKIN2,TIM3_CH4,TIM8_CH4,,,,,,TSC_G4_IO4,OTG_FS_NOE,LCD_SEG27,SDMMC1_D1,SAI2_EXTCLK,TIM8_BKIN2_COMP1,EVENTOUT
PortC,PC10,,,,,,,SPI3_SCK,USART3_TX,UART4_TX,TSC_G3_IO2,,LCD_COM4/LCD_SEG28/LCD_SEG40,SDMMC1_D2,SAI2_SCK_B,,EVENTOUT
PortC,PC11,,,,,,,SPI3_MISO,USART3_RX,UART4_RX,TSC_G3_IO3,,LCD_COM5/LCD_SEG29/LCD_SEG41,SDMMC1_D3,SAI2_MCLK_B,,EVENTOUT
PortC,PC12,,,,,,,SPI3_MOSI,USART3_CK,UART5_TX,TSC_G3_IO4,,LCD_COM6/LCD_SEG30/LCD_SEG42,SDMMC1_CK,SAI2_SD_B,,EVENTOUT
PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT
PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT
PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT
PortD,PD0,,,,,,SPI2_NSS,DFSDM_DATIN7,,,CAN1_RX,,,FMC_D2,,,EVENTOUT
PortD,PD1,,,,,,SPI2_SCK,DFSDM_CKIN7,,,CAN1_TX,,,FMC_D3,,,EVENTOUT
PortD,PD2,,,TIM3_ETR,,,,,USART3_RTS_DE,UART5_RX,TSC_SYNC,,LCD_COM7/LCD_SEG31/LCD_SEG43,SDMMC1_CMD,,,EVENTOUT
PortD,PD3,,,,,,SPI2_MISO,DFSDM_DATIN0,USART2_CTS,,,,,FMC_CLK,,,EVENTOUT
PortD,PD4,,,,,,SPI2_MOSI,DFSDM_CKIN0,USART2_RTS_DE,,,,,FMC_NOE,,,EVENTOUT
PortD,PD5,,,,,,,,USART2_TX,,,,,FMC_NWE,,,EVENTOUT
PortD,PD6,,,,,,,DFSDM_DATIN1,USART2_RX,,,,,FMC_NWAIT,SAI1_SD_A,,EVENTOUT
PortD,PD7,,,,,,,DFSDM_CKIN1,USART2_CK,,,,,FMC_NE1,,,EVENTOUT
PortD,PD8,,,,,,,,USART3_TX,,,,LCD_SEG28,FMC_D13,,,EVENTOUT
PortD,PD9,,,,,,,,USART3_RX,,,,LCD_SEG29,FMC_D14,SAI2_MCLK_A,,EVENTOUT
PortD,PD10,,,,,,,,USART3_CK,,TSC_G6_IO1,,LCD_SEG30,FMC_D15,SAI2_SCK_A,,EVENTOUT
PortD,PD11,,,,,,,,USART3_CTS,,TSC_G6_IO2,,LCD_SEG31,FMC_A16,SAI2_SD_A,LPTIM2_ETR,EVENTOUT
PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS_DE,,TSC_G6_IO3,,LCD_SEG32,FMC_A17,SAI2_FS_A,LPTIM2_IN1,EVENTOUT
PortD,PD13,,,TIM4_CH2,,,,,,,TSC_G6_IO4,,LCD_SEG33,FMC_A18,,LPTIM2_OUT,EVENTOUT
PortD,PD14,,,TIM4_CH3,,,,,,,,,LCD_SEG34,FMC_D0,,,EVENTOUT
PortD,PD15,,,TIM4_CH4,,,,,,,,,LCD_SEG35,FMC_D1,,,EVENTOUT
PortE,PE0,,,TIM4_ETR,,,,,,,,,LCD_SEG36,FMC_NBL0,,TIM16_CH1,EVENTOUT
PortE,PE1,,,,,,,,,,,,LCD_SEG37,FMC_NBL1,,TIM17_CH1,EVENTOUT
PortE,PE2,TRACECK,,TIM3_ETR,,,,,,,TSC_G7_IO1,,LCD_SEG38,FMC_A23,SAI1_MCLK_A,,EVENTOUT
PortE,PE3,TRACED0,,TIM3_CH1,,,,,,,TSC_G7_IO2,,LCD_SEG39,FMC_A19,SAI1_SD_B,,EVENTOUT
PortE,PE4,TRACED1,,TIM3_CH2,,,,DFSDM_DATIN3,,,TSC_G7_IO3,,,FMC_A20,SAI1_FS_A,,EVENTOUT
PortE,PE5,TRACED2,,TIM3_CH3,,,,DFSDM_CKIN3,,,TSC_G7_IO4,,,FMC_A21,SAI1_SCK_A,,EVENTOUT
PortE,PE6,TRACED3,,TIM3_CH4,,,,,,,,,,FMC_A22,SAI1_SD_A,,EVENTOUT
PortE,PE7,,TIM1_ETR,,,,,DFSDM_DATIN2,,,,,,FMC_D4,SAI1_SD_B,,EVENTOUT
PortE,PE8,,TIM1_CH1N,,,,,DFSDM_CKIN2,,,,,,FMC_D5,SAI1_SCK_B,,EVENTOUT
PortE,PE9,,TIM1_CH1,,,,,DFSDM_CKOUT,,,,,,FMC_D6,SAI1_FS_B,,EVENTOUT
PortE,PE10,,TIM1_CH2N,,,,,DFSDM_DATIN4,,,TSC_G5_IO1,QUADSPI_CLK,,FMC_D7,SAI1_MCLK_B,,EVENTOUT
PortE,PE11,,TIM1_CH2,,,,,DFSDM_CKIN4,,,TSC_G5_IO2,QUADSPI_NCS,,FMC_D8,,,EVENTOUT
PortE,PE12,,TIM1_CH3N,,,,SPI1_NSS,DFSDM_DATIN5,,,TSC_G5_IO3,QUADSPI_BK1_IO0,,FMC_D9,,,EVENTOUT
PortE,PE13,,TIM1_CH3,,,,SPI1_SCK,DFSDM_CKIN5,,,TSC_G5_IO4,QUADSPI_BK1_IO1,,FMC_D10,,,EVENTOUT
PortE,PE14,,TIM1_CH4,TIM1_BKIN2,TIM1_BKIN2_COMP2,,SPI1_MISO,,,,,QUADSPI_BK1_IO2,,FMC_D11,,,EVENTOUT
PortE,PE15,,TIM1_BKIN,,TIM1_BKIN_COMP1,,SPI1_MOSI,,,,,QUADSPI_BK1_IO3,,FMC_D12,,,EVENTOUT
PortF,PF0,,,,,I2C2_SDA,,,,,,,,FMC_A0,,,EVENTOUT
PortF,PF1,,,,,I2C2_SCL,,,,,,,,FMC_A1,,,EVENTOUT
PortF,PF2,,,,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT
PortF,PF3,,,,,,,,,,,,,FMC_A3,,,EVENTOUT
PortF,PF4,,,,,,,,,,,,,FMC_A4,,,EVENTOUT
PortF,PF5,,,,,,,,,,,,,FMC_A5,,,EVENTOUT
PortF,PF6,,TIM5_ETR,TIM5_CH1,,,,,,,,,,,SAI1_SD_B,,EVENTOUT
PortF,PF7,,,TIM5_CH2,,,,,,,,,,,SAI1_MCLK_B,,EVENTOUT
PortF,PF8,,,TIM5_CH3,,,,,,,,,,,SAI1_SCK_B,,EVENTOUT
PortF,PF9,,,TIM5_CH4,,,,,,,,,,,SAI1_FS_B,TIM15_CH1,EVENTOUT
PortF,PF10,,,,,,,,,,,,,,,TIM15_CH2,EVENTOUT
PortF,PF11,,,,,,,,,,,,,,,,EVENTOUT
PortF,PF12,,,,,,,,,,,,,FMC_A6,,,EVENTOUT
PortF,PF13,,,,,,,DFSDM_DATIN6,,,,,,FMC_A7,,,EVENTOUT
PortF,PF14,,,,,,,DFSDM_CKIN6,,,TSC_G8_IO1,,,FMC_A8,,,EVENTOUT
PortF,PF15,,,,,,,,,,TSC_G8_IO2,,,FMC_A9,,,EVENTOUT
PortG,PG0,,,,,,,,,,TSC_G8_IO3,,,FMC_A10,,,EVENTOUT
PortG,PG1,,,,,,,,,,TSC_G8_IO4,,,FMC_A11,,,EVENTOUT
PortG,PG2,,,,,,SPI1_SCK,,,,,,,FMC_A12,SAI2_SCK_B,,EVENTOUT
PortG,PG3,,,,,,SPI1_MISO,,,,,,,FMC_A13,SAI2_FS_B,,EVENTOUT
PortG,PG4,,,,,,SPI1_MOSI,,,,,,,FMC_A14,SAI2_MCLK_B,,EVENTOUT
PortG,PG5,,,,,,SPI1_NSS,,,LPUART1_CTS,,,,FMC_A15,SAI2_SD_B,,EVENTOUT
PortG,PG6,,,,,I2C3_SMBA,,,,LPUART1_RTS_DE,,,,,,,EVENTOUT
PortG,PG7,,,,,I2C3_SCL,,,,LPUART1_TX,,,,FMC_INT3,,,EVENTOUT
PortG,PG8,,,,,I2C3_SDA,,,,LPUART1_RX,,,,,,,EVENTOUT
PortG,PG9,,,,,,,SPI3_SCK,USART1_TX,,,,,FMC_NCE3/FMC_NE2,SAI2_SCK_A,TIM15_CH1N,EVENTOUT
PortG,PG10,,LPTIM1_IN1,,,,,SPI3_MISO,USART1_RX,,,,,FMC_NE3,SAI2_FS_A,TIM15_CH1,EVENTOUT
PortG,PG11,,LPTIM1_IN2,,,,,SPI3_MOSI,USART1_CTS,,,,,,SAI2_MCLK_A,TIM15_CH2,EVENTOUT
PortG,PG12,,LPTIM1_ETR,,,,,SPI3_NSS,USART1_RTS_DE,,,,,FMC_NE4,SAI2_SD_A,,EVENTOUT
PortG,PG13,,,,,I2C1_SDA,,,USART1_CK,,,,,FMC_A24,,,EVENTOUT
PortG,PG14,,,,,I2C1_SCL,,,,,,,,FMC_A25,,,EVENTOUT
PortG,PG15,,LPTIM1_OUT,,,I2C1_SMBA,,,,,,,,,,,EVENTOUT
PortH,PH0,,,,,,,,,,,,,,,,EVENTOUT
PortH,PH1,,,,,,,,,,,,,,,,EVENTOUT
1 Port AF0 AF1 AF2 AF3 AF4 AF5 AF6 AF7 AF8 AF9 AF10 AF11 AF12 AF13 AF14 AF15
2 SYS_AF TIM1/TIM2/TIM5/TIM8/LPTIM1 TIM1/TIM2/TIM3/TIM4/TIM5 TIM8 I2C1/I2C2/I2C3 SPI1/SPI2 SPI3/DFSDM USART1/USART2/USART3 UART4, UART5, LPUART1 CAN1, TSC OTG_FS, QUADSPI LCD SDMMC1, COMP1, COMP2, FMC, SWPMI1 SAI1, SAI2 TIM2, TIM15, TIM16, TIM17, LPTIM2 EVENTOUT
3 PortA PA0 TIM2_CH1 TIM5_CH1 TIM8_ETR USART2_CTS UART4_TX SAI1_EXTCLK TIM2_ETR EVENTOUT
4 PortA PA1 TIM2_CH2 TIM5_CH2 USART2_RTS_DE UART4_RX LCD_SEG0 TIM15_CH1N EVENTOUT
5 PortA PA2 TIM2_CH3 TIM5_CH3 USART2_TX LCD_SEG1 SAI2_EXTCLK TIM15_CH1 EVENTOUT
6 PortA PA3 TIM2_CH4 TIM5_CH4 USART2_RX LCD_SEG2 TIM15_CH2 EVENTOUT
7 PortA PA4 SPI1_NSS SPI3_NSS USART2_CK SAI1_FS_B LPTIM2_OUT EVENTOUT
8 PortA PA5 TIM2_CH1 TIM2_ETR TIM8_CH1N SPI1_SCK LPTIM2_ETR EVENTOUT
9 PortA PA6 TIM1_BKIN TIM3_CH1 TIM8_BKIN SPI1_MISO USART3_CTS QUADSPI_BK1_IO3 LCD_SEG3 TIM1_BKIN_COMP2 TIM8_BKIN_COMP2 TIM16_CH1 EVENTOUT
10 PortA PA7 TIM1_CH1N TIM3_CH2 TIM8_CH1N SPI1_MOSI QUADSPI_BK1_IO2 LCD_SEG4 TIM17_CH1 EVENTOUT
11 PortA PA8 MCO TIM1_CH1 USART1_CK OTG_FS_SOF LCD_COM0 LPTIM2_OUT EVENTOUT
12 PortA PA9 TIM1_CH2 USART1_TX LCD_COM1 TIM15_BKIN EVENTOUT
13 PortA PA10 TIM1_CH3 USART1_RX OTG_FS_ID LCD_COM2 TIM17_BKIN EVENTOUT
14 PortA PA11 TIM1_CH4 TIM1_BKIN2 USART1_CTS CAN1_RX OTG_FS_DM TIM1_BKIN2_COMP1 EVENTOUT
15 PortA PA12 TIM1_ETR USART1_RTS_DE CAN1_TX OTG_FS_DP EVENTOUT
16 PortA PA13 JTMS-SWDIO IR_OUT OTG_FS_NOE EVENTOUT
17 PortA PA14 JTCK-SWCLK EVENTOUT
18 PortA PA15 JTDI TIM2_CH1 TIM2_ETR SPI1_NSS SPI3_NSS UART4_RTS_DE TSC_G3_IO1 LCD_SEG17 SAI2_FS_B EVENTOUT
19 PortB PB0 TIM1_CH2N TIM3_CH3 TIM8_CH2N USART3_CK QUADSPI_BK1_IO1 LCD_SEG5 COMP1_OUT EVENTOUT
20 PortB PB1 TIM1_CH3N TIM3_CH4 TIM8_CH3N DFSDM_DATIN0 USART3_RTS_DE QUADSPI_BK1_IO0 LCD_SEG6 LPTIM2_IN1 EVENTOUT
21 PortB PB2 RTC_OUT LPTIM1_OUT I2C3_SMBA DFSDM_CKIN0 EVENTOUT
22 PortB PB3 JTDO-TRACESWO TIM2_CH2 SPI1_SCK SPI3_SCK USART1_RTS_DE LCD_SEG7 SAI1_SCK_B EVENTOUT
23 PortB PB4 NJTRST TIM3_CH1 SPI1_MISO SPI3_MISO USART1_CTS UART5_RTS_DE TSC_G2_IO1 LCD_SEG8 SAI1_MCLK_B TIM17_BKIN EVENTOUT
24 PortB PB5 LPTIM1_IN1 TIM3_CH2 I2C1_SMBA SPI1_MOSI SPI3_MOSI USART1_CK UART5_CTS TSC_G2_IO2 LCD_SEG9 COMP2_OUT SAI1_SD_B TIM16_BKIN EVENTOUT
25 PortB PB6 LPTIM1_ETR TIM4_CH1 TIM8_BKIN2 I2C1_SCL DFSDM_DATIN5 USART1_TX TSC_G2_IO3 TIM8_BKIN2_COMP2 SAI1_FS_B TIM16_CH1N EVENTOUT
26 PortB PB7 LPTIM1_IN2 TIM4_CH2 TIM8_BKIN I2C1_SDA DFSDM_CKIN5 USART1_RX UART4_CTS TSC_G2_IO4 LCD_SEG21 FMC_NL TIM8_BKIN_COMP1 TIM17_CH1N EVENTOUT
27 PortB PB8 TIM4_CH3 I2C1_SCL DFSDM_DATIN6 CAN1_RX LCD_SEG16 SDMMC1_D4 SAI1_MCLK_A TIM16_CH1 EVENTOUT
28 PortB PB9 IR_OUT TIM4_CH4 I2C1_SDA SPI2_NSS DFSDM_CKIN6 CAN1_TX LCD_COM3 SDMMC1_D5 SAI1_FS_A TIM17_CH1 EVENTOUT
29 PortB PB10 TIM2_CH3 I2C2_SCL SPI2_SCK DFSDM_DATIN7 USART3_TX LPUART1_RX QUADSPI_CLK LCD_SEG10 COMP1_OUT SAI1_SCK_A EVENTOUT
30 PortB PB11 TIM2_CH4 I2C2_SDA DFSDM_CKIN7 USART3_RX LPUART1_TX QUADSPI_NCS LCD_SEG11 COMP2_OUT EVENTOUT
31 PortB PB12 TIM1_BKIN TIM1_BKIN_COMP2 I2C2_SMBA SPI2_NSS DFSDM_DATIN1 USART3_CK LPUART1_RTS_DE TSC_G1_IO1 LCD_SEG12 SWPMI1_IO SAI2_FS_A TIM15_BKIN EVENTOUT
32 PortB PB13 TIM1_CH1N I2C2_SCL SPI2_SCK DFSDM_CKIN1 USART3_CTS LPUART1_CTS TSC_G1_IO2 LCD_SEG13 SWPMI1_TX SAI2_SCK_A TIM15_CH1N EVENTOUT
33 PortB PB14 TIM1_CH2N TIM8_CH2N I2C2_SDA SPI2_MISO DFSDM_DATIN2 USART3_RTS_DE TSC_G1_IO3 LCD_SEG14 SWPMI1_RX SAI2_MCLK_A TIM15_CH1 EVENTOUT
34 PortB PB15 RTC_REFIN TIM1_CH3N TIM8_CH3N SPI2_MOSI DFSDM_CKIN2 TSC_G1_IO4 LCD_SEG15 SWPMI1_SUSPEND SAI2_SD_A TIM15_CH2 EVENTOUT
35 PortC PC0 LPTIM1_IN1 I2C3_SCL DFSDM_DATIN4 LPUART1_RX LCD_SEG18 LPTIM2_IN1 EVENTOUT
36 PortC PC1 LPTIM1_OUT I2C3_SDA DFSDM_CKIN4 LPUART1_TX LCD_SEG19 EVENTOUT
37 PortC PC2 LPTIM1_IN2 SPI2_MISO DFSDM_CKOUT LCD_SEG20 EVENTOUT
38 PortC PC3 LPTIM1_ETR SPI2_MOSI LCD_VLCD SAI1_SD_A LPTIM2_ETR EVENTOUT
39 PortC PC4 USART3_TX LCD_SEG22 EVENTOUT
40 PortC PC5 USART3_RX LCD_SEG23 EVENTOUT
41 PortC PC6 TIM3_CH1 TIM8_CH1 DFSDM_CKIN3 TSC_G4_IO1 LCD_SEG24 SDMMC1_D6 SAI2_MCLK_A EVENTOUT
42 PortC PC7 TIM3_CH2 TIM8_CH2 DFSDM_DATIN3 TSC_G4_IO2 LCD_SEG25 SDMMC1_D7 SAI2_MCLK_B EVENTOUT
43 PortC PC8 TIM3_CH3 TIM8_CH3 TSC_G4_IO3 LCD_SEG26 SDMMC1_D0 EVENTOUT
44 PortC PC9 TIM8_BKIN2 TIM3_CH4 TIM8_CH4 TSC_G4_IO4 OTG_FS_NOE LCD_SEG27 SDMMC1_D1 SAI2_EXTCLK TIM8_BKIN2_COMP1 EVENTOUT
45 PortC PC10 SPI3_SCK USART3_TX UART4_TX TSC_G3_IO2 LCD_COM4/LCD_SEG28/LCD_SEG40 SDMMC1_D2 SAI2_SCK_B EVENTOUT
46 PortC PC11 SPI3_MISO USART3_RX UART4_RX TSC_G3_IO3 LCD_COM5/LCD_SEG29/LCD_SEG41 SDMMC1_D3 SAI2_MCLK_B EVENTOUT
47 PortC PC12 SPI3_MOSI USART3_CK UART5_TX TSC_G3_IO4 LCD_COM6/LCD_SEG30/LCD_SEG42 SDMMC1_CK SAI2_SD_B EVENTOUT
48 PortC PC13 EVENTOUT
49 PortC PC14 EVENTOUT
50 PortC PC15 EVENTOUT
51 PortD PD0 SPI2_NSS DFSDM_DATIN7 CAN1_RX FMC_D2 EVENTOUT
52 PortD PD1 SPI2_SCK DFSDM_CKIN7 CAN1_TX FMC_D3 EVENTOUT
53 PortD PD2 TIM3_ETR USART3_RTS_DE UART5_RX TSC_SYNC LCD_COM7/LCD_SEG31/LCD_SEG43 SDMMC1_CMD EVENTOUT
54 PortD PD3 SPI2_MISO DFSDM_DATIN0 USART2_CTS FMC_CLK EVENTOUT
55 PortD PD4 SPI2_MOSI DFSDM_CKIN0 USART2_RTS_DE FMC_NOE EVENTOUT
56 PortD PD5 USART2_TX FMC_NWE EVENTOUT
57 PortD PD6 DFSDM_DATIN1 USART2_RX FMC_NWAIT SAI1_SD_A EVENTOUT
58 PortD PD7 DFSDM_CKIN1 USART2_CK FMC_NE1 EVENTOUT
59 PortD PD8 USART3_TX LCD_SEG28 FMC_D13 EVENTOUT
60 PortD PD9 USART3_RX LCD_SEG29 FMC_D14 SAI2_MCLK_A EVENTOUT
61 PortD PD10 USART3_CK TSC_G6_IO1 LCD_SEG30 FMC_D15 SAI2_SCK_A EVENTOUT
62 PortD PD11 USART3_CTS TSC_G6_IO2 LCD_SEG31 FMC_A16 SAI2_SD_A LPTIM2_ETR EVENTOUT
63 PortD PD12 TIM4_CH1 USART3_RTS_DE TSC_G6_IO3 LCD_SEG32 FMC_A17 SAI2_FS_A LPTIM2_IN1 EVENTOUT
64 PortD PD13 TIM4_CH2 TSC_G6_IO4 LCD_SEG33 FMC_A18 LPTIM2_OUT EVENTOUT
65 PortD PD14 TIM4_CH3 LCD_SEG34 FMC_D0 EVENTOUT
66 PortD PD15 TIM4_CH4 LCD_SEG35 FMC_D1 EVENTOUT
67 PortE PE0 TIM4_ETR LCD_SEG36 FMC_NBL0 TIM16_CH1 EVENTOUT
68 PortE PE1 LCD_SEG37 FMC_NBL1 TIM17_CH1 EVENTOUT
69 PortE PE2 TRACECK TIM3_ETR TSC_G7_IO1 LCD_SEG38 FMC_A23 SAI1_MCLK_A EVENTOUT
70 PortE PE3 TRACED0 TIM3_CH1 TSC_G7_IO2 LCD_SEG39 FMC_A19 SAI1_SD_B EVENTOUT
71 PortE PE4 TRACED1 TIM3_CH2 DFSDM_DATIN3 TSC_G7_IO3 FMC_A20 SAI1_FS_A EVENTOUT
72 PortE PE5 TRACED2 TIM3_CH3 DFSDM_CKIN3 TSC_G7_IO4 FMC_A21 SAI1_SCK_A EVENTOUT
73 PortE PE6 TRACED3 TIM3_CH4 FMC_A22 SAI1_SD_A EVENTOUT
74 PortE PE7 TIM1_ETR DFSDM_DATIN2 FMC_D4 SAI1_SD_B EVENTOUT
75 PortE PE8 TIM1_CH1N DFSDM_CKIN2 FMC_D5 SAI1_SCK_B EVENTOUT
76 PortE PE9 TIM1_CH1 DFSDM_CKOUT FMC_D6 SAI1_FS_B EVENTOUT
77 PortE PE10 TIM1_CH2N DFSDM_DATIN4 TSC_G5_IO1 QUADSPI_CLK FMC_D7 SAI1_MCLK_B EVENTOUT
78 PortE PE11 TIM1_CH2 DFSDM_CKIN4 TSC_G5_IO2 QUADSPI_NCS FMC_D8 EVENTOUT
79 PortE PE12 TIM1_CH3N SPI1_NSS DFSDM_DATIN5 TSC_G5_IO3 QUADSPI_BK1_IO0 FMC_D9 EVENTOUT
80 PortE PE13 TIM1_CH3 SPI1_SCK DFSDM_CKIN5 TSC_G5_IO4 QUADSPI_BK1_IO1 FMC_D10 EVENTOUT
81 PortE PE14 TIM1_CH4 TIM1_BKIN2 TIM1_BKIN2_COMP2 SPI1_MISO QUADSPI_BK1_IO2 FMC_D11 EVENTOUT
82 PortE PE15 TIM1_BKIN TIM1_BKIN_COMP1 SPI1_MOSI QUADSPI_BK1_IO3 FMC_D12 EVENTOUT
83 PortF PF0 I2C2_SDA FMC_A0 EVENTOUT
84 PortF PF1 I2C2_SCL FMC_A1 EVENTOUT
85 PortF PF2 I2C2_SMBA FMC_A2 EVENTOUT
86 PortF PF3 FMC_A3 EVENTOUT
87 PortF PF4 FMC_A4 EVENTOUT
88 PortF PF5 FMC_A5 EVENTOUT
89 PortF PF6 TIM5_ETR TIM5_CH1 SAI1_SD_B EVENTOUT
90 PortF PF7 TIM5_CH2 SAI1_MCLK_B EVENTOUT
91 PortF PF8 TIM5_CH3 SAI1_SCK_B EVENTOUT
92 PortF PF9 TIM5_CH4 SAI1_FS_B TIM15_CH1 EVENTOUT
93 PortF PF10 TIM15_CH2 EVENTOUT
94 PortF PF11 EVENTOUT
95 PortF PF12 FMC_A6 EVENTOUT
96 PortF PF13 DFSDM_DATIN6 FMC_A7 EVENTOUT
97 PortF PF14 DFSDM_CKIN6 TSC_G8_IO1 FMC_A8 EVENTOUT
98 PortF PF15 TSC_G8_IO2 FMC_A9 EVENTOUT
99 PortG PG0 TSC_G8_IO3 FMC_A10 EVENTOUT
100 PortG PG1 TSC_G8_IO4 FMC_A11 EVENTOUT
101 PortG PG2 SPI1_SCK FMC_A12 SAI2_SCK_B EVENTOUT
102 PortG PG3 SPI1_MISO FMC_A13 SAI2_FS_B EVENTOUT
103 PortG PG4 SPI1_MOSI FMC_A14 SAI2_MCLK_B EVENTOUT
104 PortG PG5 SPI1_NSS LPUART1_CTS FMC_A15 SAI2_SD_B EVENTOUT
105 PortG PG6 I2C3_SMBA LPUART1_RTS_DE EVENTOUT
106 PortG PG7 I2C3_SCL LPUART1_TX FMC_INT3 EVENTOUT
107 PortG PG8 I2C3_SDA LPUART1_RX EVENTOUT
108 PortG PG9 SPI3_SCK USART1_TX FMC_NCE3/FMC_NE2 SAI2_SCK_A TIM15_CH1N EVENTOUT
109 PortG PG10 LPTIM1_IN1 SPI3_MISO USART1_RX FMC_NE3 SAI2_FS_A TIM15_CH1 EVENTOUT
110 PortG PG11 LPTIM1_IN2 SPI3_MOSI USART1_CTS SAI2_MCLK_A TIM15_CH2 EVENTOUT
111 PortG PG12 LPTIM1_ETR SPI3_NSS USART1_RTS_DE FMC_NE4 SAI2_SD_A EVENTOUT
112 PortG PG13 I2C1_SDA USART1_CK FMC_A24 EVENTOUT
113 PortG PG14 I2C1_SCL FMC_A25 EVENTOUT
114 PortG PG15 LPTIM1_OUT I2C1_SMBA EVENTOUT
115 PortH PH0 EVENTOUT
116 PortH PH1 EVENTOUT

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/*
GNU linker script for STM32L476XG
*/
/* Specify the memory areas */
MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 0x0000800 /* sector 0, 2 KiB */
FLASH_FS (r) : ORIGIN = 0x08000800, LENGTH = 0x001F800 /* sectors 1-63 (2K each = 126 KiB) */
FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 0x0080000 /* Sector starting @ 64 */
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
SRAM2 (xrw) : ORIGIN = 0x10000000, LENGTH = 32K
}
ENTRY(Reset_Handler)
/* produce a link error if there is not this amount of RAM for these sections */
_minimum_stack_size = 2K;
_minimum_heap_size = 16K;
/* Define the top end of the stack. The stack is full descending so begins just
above last byte of RAM. Note that EABI requires the stack to be 8-byte
aligned for a call. */
_estack = ORIGIN(RAM) + LENGTH(RAM);
/* RAM extents for the garbage collector */
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
_heap_end = 0x20014000; /* tunable */
/* define output sections */
SECTIONS
{
/* The startup code goes first into FLASH */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH_ISR
/* The program code and other data goes into FLASH */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
/* *(.glue_7) */ /* glue arm to thumb code */
/* *(.glue_7t) */ /* glue thumb to arm code */
. = ALIGN(4);
_etext = .; /* define a global symbol at end of code */
} >FLASH_TEXT
/*
.ARM.extab :
{
*(.ARM.extab* .gnu.linkonce.armextab.*)
} >FLASH
.ARM :
{
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
} >FLASH
*/
/* used by the startup to initialize data */
_sidata = LOADADDR(.data);
/* This is the initialized data section
The program executes knowing that the data is in the RAM
but the loader puts the initial values in the FLASH (inidata).
It is one task of the startup to copy the initial values from FLASH to RAM. */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
_ram_start = .; /* create a global symbol at ram start for garbage collector */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
. = ALIGN(4);
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
} >RAM AT> FLASH_TEXT
/* Uninitialized data section */
.bss :
{
. = ALIGN(4);
_sbss = .; /* define a global symbol at bss start; used by startup code */
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
} >RAM
/* this is to define the start of the heap, and make sure we have a minimum size */
.heap :
{
. = ALIGN(4);
PROVIDE ( end = . );
PROVIDE ( _end = . );
_heap_start = .; /* define a global symbol at heap start */
. = . + _minimum_heap_size;
} >RAM
/* this just checks there is enough RAM for the stack */
.stack :
{
. = ALIGN(4);
. = . + _minimum_stack_size;
. = ALIGN(4);
} >RAM
/* Remove information from the standard libraries */
/*
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}
*/
.ARM.attributes 0 : { *(.ARM.attributes) }
}