2021-08-11 04:26:23 +00:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Jim Mussared
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/mpconfig.h"
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#include "py/mphal.h"
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2022-01-11 06:21:14 +00:00
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#include "modesp32.h"
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2021-08-11 04:26:23 +00:00
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#if MICROPY_PY_MACHINE_BITSTREAM
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2022-01-11 06:21:14 +00:00
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/******************************************************************************/
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// Bit-bang implementation
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2021-08-11 04:26:23 +00:00
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2022-01-11 06:21:14 +00:00
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#define NS_TICKS_OVERHEAD (6)
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// This is a translation of the cycle counter implementation in ports/stm32/machine_bitstream.c.
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STATIC void IRAM_ATTR machine_bitstream_high_low_bitbang(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len) {
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uint32_t pin_mask, gpio_reg_set, gpio_reg_clear;
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#if !CONFIG_IDF_TARGET_ESP32C3
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if (pin >= 32) {
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pin_mask = 1 << (pin - 32);
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gpio_reg_set = GPIO_OUT1_W1TS_REG;
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gpio_reg_clear = GPIO_OUT1_W1TC_REG;
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} else
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#endif
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{
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pin_mask = 1 << pin;
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gpio_reg_set = GPIO_OUT_W1TS_REG;
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gpio_reg_clear = GPIO_OUT_W1TC_REG;
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}
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// Convert ns to cpu ticks [high_time_0, period_0, high_time_1, period_1].
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uint32_t fcpu_mhz = ets_get_cpu_frequency();
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for (size_t i = 0; i < 4; ++i) {
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timing_ns[i] = fcpu_mhz * timing_ns[i] / 1000;
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if (timing_ns[i] > NS_TICKS_OVERHEAD) {
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timing_ns[i] -= NS_TICKS_OVERHEAD;
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}
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if (i % 2 == 1) {
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// Convert low_time to period (i.e. add high_time).
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timing_ns[i] += timing_ns[i - 1];
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}
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}
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uint32_t irq_state = mp_hal_quiet_timing_enter();
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for (size_t i = 0; i < len; ++i) {
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uint8_t b = buf[i];
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for (size_t j = 0; j < 8; ++j) {
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GPIO_REG_WRITE(gpio_reg_set, pin_mask);
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uint32_t start_ticks = mp_hal_ticks_cpu();
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uint32_t *t = &timing_ns[b >> 6 & 2];
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while (mp_hal_ticks_cpu() - start_ticks < t[0]) {
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;
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}
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GPIO_REG_WRITE(gpio_reg_clear, pin_mask);
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b <<= 1;
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while (mp_hal_ticks_cpu() - start_ticks < t[1]) {
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;
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}
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}
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}
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mp_hal_quiet_timing_exit(irq_state);
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}
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/******************************************************************************/
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// RMT implementation
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#include "driver/rmt.h"
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2021-08-11 04:26:23 +00:00
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2021-11-11 12:36:27 +00:00
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#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 1, 0)
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// This convenience macro was not available in earlier IDF versions.
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#define RMT_DEFAULT_CONFIG_TX(gpio, channel_id) \
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{ \
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.rmt_mode = RMT_MODE_TX, \
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.channel = channel_id, \
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.clk_div = 80, \
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.gpio_num = gpio, \
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.mem_block_num = 1, \
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.tx_config = { \
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.loop_en = false, \
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.carrier_freq_hz = 38000, \
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.carrier_duty_percent = 33, \
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.carrier_level = RMT_CARRIER_LEVEL_HIGH, \
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.carrier_en = false, \
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.idle_level = RMT_IDLE_LEVEL_LOW, \
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.idle_output_en = true, \
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} \
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2021-08-11 04:26:23 +00:00
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}
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2021-11-11 12:36:27 +00:00
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#endif
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2021-08-11 04:26:23 +00:00
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2021-11-11 12:36:27 +00:00
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// Logical 0 and 1 values (encoded as a rmt_item32_t).
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// The duration fields will be set later.
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STATIC rmt_item32_t bitstream_high_low_0 = {{{ 0, 1, 0, 0 }}};
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STATIC rmt_item32_t bitstream_high_low_1 = {{{ 0, 1, 0, 0 }}};
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2021-08-11 04:26:23 +00:00
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2021-11-11 12:36:27 +00:00
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// See https://github.com/espressif/esp-idf/blob/master/examples/common_components/led_strip/led_strip_rmt_ws2812.c
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// This is called automatically by the IDF during rmt_write_sample in order to
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// convert the byte stream to rmt_item32_t's.
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STATIC void IRAM_ATTR bitstream_high_low_rmt_adapter(const void *src, rmt_item32_t *dest, size_t src_size, size_t wanted_num, size_t *translated_size, size_t *item_num) {
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if (src == NULL || dest == NULL) {
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*translated_size = 0;
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*item_num = 0;
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return;
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}
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size_t size = 0;
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size_t num = 0;
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uint8_t *psrc = (uint8_t *)src;
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rmt_item32_t *pdest = dest;
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while (size < src_size && num < wanted_num) {
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for (int i = 0; i < 8; i++) {
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// MSB first
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if (*psrc & (1 << (7 - i))) {
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pdest->val = bitstream_high_low_1.val;
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} else {
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pdest->val = bitstream_high_low_0.val;
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2021-08-11 04:26:23 +00:00
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}
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2021-11-11 12:36:27 +00:00
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num++;
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pdest++;
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2021-08-11 04:26:23 +00:00
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}
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2021-11-11 12:36:27 +00:00
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size++;
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psrc++;
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2021-08-11 04:26:23 +00:00
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}
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2021-11-11 12:36:27 +00:00
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*translated_size = size;
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*item_num = num;
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}
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// Use the reserved RMT channel to stream high/low data on the specified pin.
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2022-01-11 06:21:14 +00:00
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STATIC void machine_bitstream_high_low_rmt(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len, uint8_t channel_id) {
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rmt_config_t config = RMT_DEFAULT_CONFIG_TX(pin, channel_id);
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2021-11-11 12:36:27 +00:00
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// Use 40MHz clock (although 2MHz would probably be sufficient).
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config.clk_div = 2;
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// Install the driver on this channel & pin.
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check_esp_err(rmt_config(&config));
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2022-01-13 04:16:16 +00:00
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check_esp_err(rmt_driver_install_core1(config.channel));
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2021-11-11 12:36:27 +00:00
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// Get the tick rate in kHz (this will likely be 40000).
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uint32_t counter_clk_khz = 0;
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#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 1, 0)
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uint8_t div_cnt;
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check_esp_err(rmt_get_clk_div(config.channel, &div_cnt));
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counter_clk_khz = APB_CLK_FREQ / div_cnt;
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#else
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check_esp_err(rmt_get_counter_clock(config.channel, &counter_clk_khz));
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#endif
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counter_clk_khz /= 1000;
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// Convert nanoseconds to pulse duration.
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bitstream_high_low_0.duration0 = (counter_clk_khz * timing_ns[0]) / 1e6;
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bitstream_high_low_0.duration1 = (counter_clk_khz * timing_ns[1]) / 1e6;
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bitstream_high_low_1.duration0 = (counter_clk_khz * timing_ns[2]) / 1e6;
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bitstream_high_low_1.duration1 = (counter_clk_khz * timing_ns[3]) / 1e6;
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// Install the bits->highlow translator.
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rmt_translator_init(config.channel, bitstream_high_low_rmt_adapter);
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// Stream the byte data using the translator.
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check_esp_err(rmt_write_sample(config.channel, buf, len, true));
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// Wait 50% longer than we expect (if every bit takes the maximum time).
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uint32_t timeout_ms = (3 * len / 2) * (1 + (8 * MAX(timing_ns[0] + timing_ns[1], timing_ns[2] + timing_ns[3])) / 1000);
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check_esp_err(rmt_wait_tx_done(config.channel, pdMS_TO_TICKS(timeout_ms)));
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// Uninstall the driver.
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check_esp_err(rmt_driver_uninstall(config.channel));
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2022-01-01 23:30:37 +00:00
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// Cancel RMT output to GPIO pin.
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gpio_matrix_out(pin, SIG_GPIO_OUT_IDX, false, false);
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2021-08-11 04:26:23 +00:00
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}
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2022-01-11 06:21:14 +00:00
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/******************************************************************************/
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// Interface to machine.bitstream
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void machine_bitstream_high_low(mp_hal_pin_obj_t pin, uint32_t *timing_ns, const uint8_t *buf, size_t len) {
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if (esp32_rmt_bitstream_channel_id < 0) {
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machine_bitstream_high_low_bitbang(pin, timing_ns, buf, len);
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} else {
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machine_bitstream_high_low_rmt(pin, timing_ns, buf, len, esp32_rmt_bitstream_channel_id);
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}
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}
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2021-08-11 04:26:23 +00:00
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#endif // MICROPY_PY_MACHINE_BITSTREAM
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