kopia lustrzana https://github.com/micropython/micropython
44 wiersze
1.4 KiB
Python
44 wiersze
1.4 KiB
Python
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from machine import SPI
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# Regression test for DMA for DCache coherency bugs with cache line
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# written originally for https://github.com/micropython/micropython/issues/13471
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# IMPORTANT: This test requires SPI2 MISO (pin Y8 on Pyboard D) to be connected to GND
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SPI_NUM = 2
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spi = SPI(SPI_NUM, baudrate=5_000_000)
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buf = bytearray(1024)
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ok = True
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for offs in range(0, len(buf)):
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v = memoryview(buf)[offs : offs + 128]
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spi.readinto(v, 0xFF)
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if not all(b == 0x00 for b in v):
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print(offs, v.hex())
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ok = False
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print("Variable offset fixed length " + ("OK" if ok else "FAIL"))
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# this takes around 30s to run, so skipped if already failing
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if ok:
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for op_len in range(1, 66):
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wr = b"\xFF" * op_len
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for offs in range(1, len(buf) - op_len - 1):
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# Place some "sentinel" values before and after the DMA buffer
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before = offs & 0xFF
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after = (~offs) & 0xFF
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buf[offs - 1] = before
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buf[offs + op_len] = after
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v = memoryview(buf)[offs : offs + op_len]
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spi.write_readinto(wr, v)
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if (
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not all(b == 0x00 for b in v)
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or buf[offs - 1] != before
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or buf[offs + op_len] != after
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):
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print(v.hex())
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print(hex(op_len), hex(offs), hex(buf[offs - 1]), hex(buf[offs + op_len]))
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ok = False
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print("Variable offset and lengths " + ("OK" if ok else "FAIL"))
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