kopia lustrzana https://github.com/micropython/micropython-lib
re-commit after black
SquirtleSquadLeader
GitHub
rodzic
ce4a579b6e
commit
1f37df5588
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@ -34,16 +34,22 @@
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Q unsigned long long 8
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f float 4
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d double 8
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"""
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from machine import I2C
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from struct import pack, unpack
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class RORegBit:
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def __init__(self, i2c, dev_addr, reg_addr, num_bytes, bit_location, endian='', fmt='B'):
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def __init__(
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self, i2c, dev_addr, reg_addr, num_bytes, bit_location, endian="", fmt="B"
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):
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"""
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Creates an :class:`RORegBit` object which allows read only access to a single bit within a register.
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:param i2c: I2C bus which connects the host system to the peripheral device
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:type kind: machine.I2C()
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:param dev_addr: I2C address of the device which
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@ -126,7 +132,7 @@ class RORegBit:
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__check_reg(self)
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del(i2c, dev_addr, reg_addr, num_bytes, bit_location, fmt)
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del (i2c, dev_addr, reg_addr, num_bytes, bit_location, fmt)
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def __get__(self):
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"""
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@ -135,8 +141,11 @@ class RORegBit:
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"""
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return __getbit(self)
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class RWRegBit:
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def __init__(self, i2c, dev_addr, reg_addr, num_bytes, bit_location, endian='', fmt='B'):
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def __init__(
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self, i2c, dev_addr, reg_addr, num_bytes, bit_location, endian="", fmt="B"
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):
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"""
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Creates an :class:`RORegBit` object which allows read and write access to a single bit within a register.
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@ -222,9 +231,11 @@ class RWRegBit:
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__check_reg(self)
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self._premask, self._postmask = __calc_mask(bit_location, bit_location, num_bytes)
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self._premask, self._postmask = __calc_mask(
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bit_location, bit_location, num_bytes
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)
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del(i2c, dev_addr, reg_addr, num_bytes, bit_location, endian, fmt)
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del (i2c, dev_addr, reg_addr, num_bytes, bit_location, endian, fmt)
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def __get__(self):
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"""
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@ -240,8 +251,11 @@ class RWRegBit:
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"""
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return __setbit(self, setting)
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class RORegBits:
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def __init__(self, i2c, dev_addr, reg_addr, num_bytes, lsb, msb, endian='', fmt='B'):
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def __init__(
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self, i2c, dev_addr, reg_addr, num_bytes, lsb, msb, endian="", fmt="B"
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):
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"""
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Creates an :class:`RORegBits` object which allows read only access to a sequential set of bits within a bitfield.
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@ -334,7 +348,7 @@ class RORegBits:
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self._premask, self._mask, self._postmask = __calc_mask(lsb, msb, num_bytes)
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del(i2c, dev_addr, reg_addr, num_bytes, lsb, msb, endian, fmt)
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del (i2c, dev_addr, reg_addr, num_bytes, lsb, msb, endian, fmt)
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def __get__(self):
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"""
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@ -343,8 +357,11 @@ class RORegBits:
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"""
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return __getbits(self)
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class RWRegBits:
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def __init__(self, i2c, dev_addr, reg_addr, num_bytes, lsb, msb, endian='', fmt='B'):
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def __init__(
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self, i2c, dev_addr, reg_addr, num_bytes, lsb, msb, endian="", fmt="B"
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):
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"""
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Creates an :class:`RWRegBits` object which allows read and write access to a sequential set of bits within a bitfield.
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@ -447,7 +464,7 @@ class RWRegBits:
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self._premask, self._mask, self._postmask = __calc_mask(lsb, msb, num_bytes)
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del(i2c, dev_addr, reg_addr, num_bytes, lsb, msb, fmt, endian)
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del (i2c, dev_addr, reg_addr, num_bytes, lsb, msb, fmt, endian)
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def __get__(self):
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"""
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@ -463,8 +480,9 @@ class RWRegBits:
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"""
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return __setbits(self, setting)
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class ROReg:
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def __init__(self, i2c, dev_addr, reg_addr, num_bytes=1, endian='', fmt='B'):
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def __init__(self, i2c, dev_addr, reg_addr, num_bytes=1, endian="", fmt="B"):
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"""
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Creates a :class:`ROReg` object which allows read only access to n number of sequential registers,
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where n is specified by :param num_bytes:.
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@ -551,7 +569,7 @@ class ROReg:
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__check_reg(self)
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del(i2c, dev_addr, reg_addr, num_bytes, fmt, endian)
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del (i2c, dev_addr, reg_addr, num_bytes, fmt, endian)
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def __get__(self):
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"""
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@ -560,8 +578,10 @@ class ROReg:
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"""
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return __getreg(self)
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class RWReg:
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"""
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def __init__(self, i2c, dev_addr, reg_addr, num_bytes, endian="", fmt="B"):
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"""
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Creates a :class:`RWReg` object which allows read and write access to n number of sequential registers,
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where n is specified by :param num_bytes:.
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@ -647,7 +667,6 @@ class RWReg:
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print(device.my_reg2) # prints 240
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"""
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def __init__(self, i2c, dev_addr, reg_addr, num_bytes, endian='', fmt='B'):
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self._i2c = i2c
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self._dev_addr = dev_addr
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self._reg_addr = reg_addr
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@ -657,7 +676,7 @@ class RWReg:
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__check_reg(self)
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del(i2c, dev_addr, reg_addr, num_bytes, fmt, endian)
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del (i2c, dev_addr, reg_addr, num_bytes, fmt, endian)
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def __get__(self):
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"""
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@ -675,43 +694,57 @@ class RWReg:
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"""
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return __setreg(self, setting)
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"""
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*
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* GLOBAL HELPER FUNCTIONS
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*
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*
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"""
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def __getbit(reg_object):
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if isinstance(reg_object, (RORegBit, RWRegBit)):
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# Retrieve register value and unpack to int
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value = reg_object._i2c.readfrom_mem(reg_object._dev_addr, reg_object._reg_addr, reg_object._num_bytes)
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value = reg_object._i2c.readfrom_mem(
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reg_object._dev_addr, reg_object._reg_addr, reg_object._num_bytes
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)
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# Unpack byte
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value = unpack(reg_object._endian+reg_object._fmt, value)[0]
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value = unpack(reg_object._endian + reg_object._fmt, value)[0]
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# Perform shift followed by _AND_ operation to determine bit state
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return (value >> reg_object._bit_location)&0b1
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return (value >> reg_object._bit_location) & 0b1
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else:
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raise TypeError("incorrect object type - must be RORegBit, RWRegBit")
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raise TypeError("incorrect object type - must be RORegBit, RWRegBit")
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def __setbit(reg_object, setting):
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if isinstance(reg_object, RWRegBit):
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if setting in (0,1):
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if setting in (0, 1):
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# Retrieve register value and unpack to int
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value = reg_object._i2c.readfrom_mem(reg_object._dev_addr, reg_object._reg_addr, reg_object._num_bytes)
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value = reg_object._i2c.readfrom_mem(
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reg_object._dev_addr, reg_object._reg_addr, reg_object._num_bytes
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)
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# Unpack byte
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value = unpack(reg_object._endian+reg_object._fmt, value)[0]
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value = unpack(reg_object._endian + reg_object._fmt, value)[0]
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# Assemble byte
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value = (value®_object._postmask) + (setting<<reg_object._bit_location) + (value®_object._premask)
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value = (
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(value & reg_object._postmask)
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+ (setting << reg_object._bit_location)
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+ (value & reg_object._premask)
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)
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# Pack to bytes
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value = pack(reg_object._endian+reg_object._fmt, value)
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value = pack(reg_object._endian + reg_object._fmt, value)
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# Write to I2C
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reg_object._i2c.writeto_mem(reg_object._dev_addr, reg_object._reg_addr, value)
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reg_object._i2c.writeto_mem(
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reg_object._dev_addr, reg_object._reg_addr, value
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)
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# Return True for success
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return True
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@ -721,63 +754,83 @@ def __setbit(reg_object, setting):
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else:
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raise TypeError("incorrect object type - must be RWRegBit")
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def __getbits(reg_object):
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if isinstance(reg_object, (RORegBits, RWRegBits)):
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# Retrieve register value and unpack to int
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value = reg_object._i2c.readfrom_mem(reg_object._dev_addr, reg_object._reg_addr, reg_object._num_bytes)
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value = reg_object._i2c.readfrom_mem(
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reg_object._dev_addr, reg_object._reg_addr, reg_object._num_bytes
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)
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# Unpack bytes
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value = unpack(reg_object._endian+reg_object._fmt, value)[0]
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value = unpack(reg_object._endian + reg_object._fmt, value)[0]
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# Return value of bit field
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return (value & reg_object._mask)>>reg_object._lsb
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return (value & reg_object._mask) >> reg_object._lsb
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else:
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raise TypeError("incorrect object type - must be RORegBits, RWRegBits")
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raise TypeError("incorrect object type - must be RORegBits, RWRegBits")
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def __setbits(reg_object, setting):
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if isinstance(reg_object, RWRegBits):
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if isinstance(setting, int) and setting <= reg_object._mask:
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# Retrieve register value and unpack to int
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value = reg_object._i2c.readfrom_mem(reg_object._dev_addr, reg_object._reg_addr, reg_object._num_bytes)
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value = reg_object._i2c.readfrom_mem(
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reg_object._dev_addr, reg_object._reg_addr, reg_object._num_bytes
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)
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# Unpack bytes
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value = unpack(reg_object._endian+reg_object._fmt, value)[0]
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value = unpack(reg_object._endian + reg_object._fmt, value)[0]
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# Assemble
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value = (value®_object._postmask) + (setting<<reg_object._lsb) + (value®_object._premask)
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value = (
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(value & reg_object._postmask)
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+ (setting << reg_object._lsb)
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+ (value & reg_object._premask)
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)
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# Pack to bytes object
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value = struct.pack(reg_object._endian+reg_object._fmt, value)
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value = struct.pack(reg_object._endian + reg_object._fmt, value)
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# Write to device
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reg_object._i2c.writeto_mem(reg_object._dev_addr, reg_object._reg_addr, value)
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reg_object._i2c.writeto_mem(
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reg_object._dev_addr, reg_object._reg_addr, value
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)
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return True
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else:
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raise ValueError(f"value of setting exceeds max value of bitfield: {reg_object._mask}")
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raise ValueError(
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f"value of setting exceeds max value of bitfield: {reg_object._mask}"
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)
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else:
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raise TypeError("incorrect object type - must be RWRegBits")
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def __getreg(reg_object):
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if isinstance(reg_object, (ROReg, RWReg)):
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# Retrieve register value and unpack to int
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values = reg_object._i2c.readfrom_mem(reg_object._dev_addr, reg_object._reg_addr, reg_object._num_bytes)
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values = reg_object._i2c.readfrom_mem(
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reg_object._dev_addr, reg_object._reg_addr, reg_object._num_bytes
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)
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# Return Tuple of values
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return unpack(reg_object._endian+reg_object._fmt, values)
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return unpack(reg_object._endian + reg_object._fmt, values)
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else:
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raise TypeError("incorrect object type - must be ROReg, RWReg")
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raise TypeError("incorrect object type - must be ROReg, RWReg")
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def __setreg(reg_object, settings):
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if isinstance(reg_object, RWReg):
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if isinstance(settings, (bytes, bytearray)):
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# Write to device
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reg_object._i2c.writeto_mem(reg_object._dev_addr, reg_object._reg_addr, settings)
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# Write to device
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reg_object._i2c.writeto_mem(
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reg_object._dev_addr, reg_object._reg_addr, settings
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)
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elif isinstance(settings, (tuple, list)):
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# Where our data will go
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@ -785,20 +838,23 @@ def __setreg(reg_object, settings):
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# Pack and append to d
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for n in range(0, len(settings)):
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d.extend(pack(reg_object._endian+reg_object._fmt[n] ,settings[n]))
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d.extend(pack(reg_object._endian + reg_object._fmt[n], settings[n]))
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# Write to device
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reg_object._i2c.writeto_mem(reg_object._dev_addr, reg_object._reg_addr, d)
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# Assumed single int() for single reg-op
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elif isinstance(settings, int):
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d = pack(reg_object._endian+reg_object._fmt ,settings)
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d = pack(reg_object._endian + reg_object._fmt, settings)
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reg_object._i2c.writeto_mem(reg_object._dev_addr, reg_object._reg_addr, d)
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else:
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raise TypeError("unsupported object type, settings must be int(), bytes(), bytearray(), tuple(), or list()")
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raise TypeError(
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"unsupported object type, settings must be int(), bytes(), bytearray(), tuple(), or list()"
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)
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else:
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raise TypeError("incorrect object type - must be ROReg, RWReg")
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raise TypeError("incorrect object type - must be ROReg, RWReg")
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def __calc_mask(lsb, msb, numbytes):
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"""
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@ -806,25 +862,26 @@ def __calc_mask(lsb, msb, numbytes):
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returns ints() pre, mask, post
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"""
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# Check input types
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if lsb.__class__() == int() and lsb >= 0:
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if msb.__class__() == int() and msb >= 0:
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if numbytes.__class__() == int() and numbytes >= 0:
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# Check for detectable errors
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if msb>=lsb:
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if msb >= lsb:
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# Single bit mask
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if msb == lsb:
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pre, post = 0b0, 0b0
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# Calc post masking
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for bit in range(msb+1, numbytes*8):
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post = (post<<1) + 0b1
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for bit in range(msb + 1, numbytes * 8):
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post = (post << 1) + 0b1
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# Calc pre masking
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for bit in range(0, lsb):
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pre = (pre<<1) + 0b1
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pre = (pre << 1) + 0b1
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return pre, post
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|
|
@ -835,12 +892,12 @@ def __calc_mask(lsb, msb, numbytes):
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pre, mask, post = 0b0, 0b0, 0b0
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# Calc post masking
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for bit in range(msb+1, numbytes*8):
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post = (post<<1) + 0b1
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for bit in range(msb + 1, numbytes * 8):
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post = (post << 1) + 0b1
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# Calc bitfield masking
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for bit in range(lsb, msb+1):
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mask = (mask<<1) + 0b1
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for bit in range(lsb, msb + 1):
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mask = (mask << 1) + 0b1
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# No bits lower than 0
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if lsb == 0:
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|
|
@ -848,7 +905,7 @@ def __calc_mask(lsb, msb, numbytes):
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else:
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for bit in range(0, lsb):
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pre = (pre<<1) + 0b1
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pre = (pre << 1) + 0b1
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|
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return pre, mask, post
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else:
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|
|
@ -860,11 +917,24 @@ def __calc_mask(lsb, msb, numbytes):
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else:
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raise ValueError("lsb must be of type int() and 0 or greater")
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def __check_reg(reg_object):
|
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|
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# Alowable struct.pack/unpack formats to check for
|
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fmts = {'b':1, 'B':1, 'h':2, 'H':2, 'f':4, 'i':4, 'I':4, 'l':4, 'L':4, 'q':8, 'Q':8}
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endians = '@><'
|
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fmts = {
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"b": 1,
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"B": 1,
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"h": 2,
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"H": 2,
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"f": 4,
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"i": 4,
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"I": 4,
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"l": 4,
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"L": 4,
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"q": 8,
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"Q": 8,
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}
|
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endians = "@><"
|
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byte_count = 0
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||||
|
||||
# Take in only register objects
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||||
|
|
@ -880,12 +950,18 @@ def __check_reg(reg_object):
|
|||
byte_count = byte_count + fmts[reg_object._fmt[n]]
|
||||
|
||||
else:
|
||||
raise ValueError(f"unsupported format code of '{reg_object._fmt[n]}'")
|
||||
raise ValueError(
|
||||
f"unsupported format code of '{reg_object._fmt[n]}'"
|
||||
)
|
||||
|
||||
if byte_count != reg_object._num_bytes:
|
||||
raise ValueError(f"format string accounts for {byte_count} bytes, _num_bytes value of {reg_object._num_bytes} does not match")
|
||||
raise ValueError(
|
||||
f"format string accounts for {byte_count} bytes, _num_bytes value of {reg_object._num_bytes} does not match"
|
||||
)
|
||||
|
||||
else:
|
||||
raise TypeError("format and endian must be of type str()")
|
||||
else:
|
||||
raise TypeError("incorrect object type - must be ROReg, RWReg, ROBits, RWBits, ROReg, RWReg")
|
||||
raise TypeError(
|
||||
"incorrect object type - must be ROReg, RWReg, ROBits, RWBits, ROReg, RWReg"
|
||||
)
|
||||
Ładowanie…
Reference in New Issue