# Example OpenOCD configuration file for ESP-WROOM-32 module.
# By default, the following configuration is used:
# - dual core debugging
# - support for listing FreeRTOS tasks is enabled
# - OpenOCD is configured to set SPI flash voltage at 3.3V
#   by keeping MTDI bootstrapping pin low
#
# Use variables listed below to customize this.
# Variables can be modified in this file or set on the command line.
#
# For example, OpenOCD can be started for single core ESP32 debugging on
# ESP-WROVER-KIT with ESP-WROOM-32 module as follows:
#
#   openocd -f interface/ftdi/esp32_devkitj_v1.cfg -c 'set ESP32_ONLYCPU 1' -f board/esp-wroom-32.cfg
#
# If a different JTAG interface is used, change the first -f option.
#
# If OpenOCD is built from source, pass an additional -s option to specify
# the location of 'tcl' directory:
#
#    src/openocd -s tcl <rest of the command line>
#
# Note:
#   For ESP32-WROVER module use 'esp32-wrover.cfg' configuration file
#   ESP-WROOM-32 and ESP32-WROVER have different flash voltage setting


# The ESP32 only supports JTAG.
transport select jtag

# The speed of the JTAG interface, in KHz. If you get DSR/DIR errors (and they
# do not relate to OpenOCD trying to read from a memory range without physical
# memory being present there), you can try lowering this.
#
# On DevKit-J, this can go as high as 20MHz if CPU frequency is 80MHz, or 26MHz
# if CPU frequency is 160MHz or 240MHz.
adapter_khz 20000

# If single core debugging is required, uncomment the following line
# set ESP32_ONLYCPU 1

# To disable RTOS support, uncomment the following line
# set ESP32_RTOS none

# Tell OpenOCD which SPI flash voltage is used by the board (3.3 or 1.8)
# The TDI pin of ESP32 is also a bootstrap pin that selects the voltage the SPI flash
# chip runs at. When a hard reset happens (e.g. because someone switches the board off
# and on) the ESP32 will use the current TDI value as the bootstrap value because the
# JTAG adapter overrides the pull-up or pull-down resistor that is supposed to do the
# bootstrapping. These lines basically set the idle value of the TDI line to a
# specified value, therefore reducing the chance of a bad bootup due to a bad flash
# voltage greatly.
# This option defaults to 3.3, if not set. To override the default, uncomment
# the following line:
# set ESP32_FLASH_VOLTAGE 1.8

# Set semihosting I/O base dir
# set ESP_SEMIHOST_BASEDIR ""

# Source the ESP32 configuration file
source [find target/esp32.cfg]