Update Femtofox configs (#5646)

* Delete bin/config.d/femtofox/femtofox_EByte-E22-900M30S_Ebyte-E22-900M22S.yaml

* Delete bin/config.d/femtofox/femtofox_EByte-E22-900MM22S.yaml

* Delete bin/config.d/femtofox/femtofox_Heltec-HT-RA62_Seeed-WIO-SX1262.yaml

* Delete bin/config.d/femtofox/femtofox_Waveshare-SX126X-XXXM_AI-Thinker-RA-01SH.yaml

* Add files via upload

* Update and rename bin/config.d/femtofox_SX1262_XTAL.yaml to bin/config.d/femtofox/femtofox_SX1262_XTAL.yaml

* Update and rename bin/config.d/femtofox_LR1121_TCXO.yaml to bin/config.d/femtofox/femtofox_LR1121_TCXO.yaml

* Update and rename bin/config.d/femtofox_SX1262_TCXO.yaml to bin/config.d/femtofox/femtofox_SX1262_TCXO.yaml
pull/5271/head
noon92 2024-12-22 01:04:18 +02:00 zatwierdzone przez GitHub
rodzic 2fd5a4848a
commit fa1a1fd869
Nie znaleziono w bazie danych klucza dla tego podpisu
ID klucza GPG: B5690EEEBB952194
7 zmienionych plików z 62 dodań i 59 usunięć

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---
Lora:
## Ebyte E22-900M30S, E22-900M22S with no external RF switching setup
## Will work with any module without RF switching, and with TCXO
Module: sx1262
gpiochip: 1 # subtract 32 from the gpio numbers
DIO2_AS_RF_SWITCH: true
DIO3_TCXO_VOLTAGE: true
CS: 16 #pin6 / GPIO48 1C0
IRQ: 23 #pin17 / GPIO55 1C7
Busy: 22 #pin16 / GPIO54 1C6
Reset: 25 #pin13 / GPIO57 1D1
RXen: 24 #pin12 / GPIO56 1D0
#TXen: bridge to DIO2 on E22 module
spidev: spidev0.0
spiSpeed: 2000000

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---
Lora:
## Ebyte E22-900MM22S with no external RF switching setup
## Will work with any module without RF switching and no TCXO
Module: sx1262
gpiochip: 1 # subtract 32 from the gpio numbers
DIO2_AS_RF_SWITCH: true
DIO3_TCXO_VOLTAGE: true
CS: 16 #pin6 / GPIO48 1C0
IRQ: 23 #pin17 / GPIO55 1C7
Busy: 22 #pin16 / GPIO54 1C6
Reset: 25 #pin13 / GPIO57 1D1
RXen: 24 #pin12 / GPIO56 1D0
#TXen: bridge to DIO2 on E22 module
spidev: spidev0.0
spiSpeed: 2000000

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---
Lora:
## Heltec HT-RA62, Seeed WIO SX1262
## Will work with any module with automatic RF switching, and with TCXO
Module: sx1262
gpiochip: 1 # subtract 32 from the gpio numbers
DIO2_AS_RF_SWITCH: true
DIO3_TCXO_VOLTAGE: true
CS: 16 #pin6 (GPIO pin 48 1C0)
IRQ: 23 #pin17 (GPIO pin 55 1C7)
Reset: 25 #pin13 (GPIO pin 57 1D1)
Busy: 22 #pin16 (GPIO pin 54 1C6)
spidev: spidev0.0 #pins are (CS=6, CLK=7, MOSI=8, MISO=9)
spiSpeed: 2000000

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---
Lora:
## Ebyte E80-900M22S
## This is a bit experimental
##
##
Module: lr1121
gpiochip: 1 # subtract 32 from the gpio numbers
DIO3_TCXO_VOLTAGE: 1.8
CS: 16 #pin6 / GPIO48 1C0
IRQ: 23 #pin17 / GPIO55 1C7
Busy: 22 #pin16 / GPIO54 1C6
Reset: 25 #pin13 / GPIO57 1D1
spidev: spidev0.0 #pins are (CS=16, CLK=17, MOSI=18, MISO=19)
spiSpeed: 2000000
General:
MACAddressSource: eth0

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---
Lora:
## Ebyte E22-900M30S, E22-900M22S with or without external RF switching setup
## HT-RA62 (Has internal switching, but whatever)
## Seeed WIO SX1262 (already has TXEN-DIO2 link, but needs RXEN)
## Will work with any module with or without RF switching, and with TCXO
Module: sx1262
gpiochip: 1 # subtract 32 from the gpio numbers
DIO2_AS_RF_SWITCH: true
DIO3_TCXO_VOLTAGE: true
CS: 16 #pin6 / GPIO48 1C0
IRQ: 23 #pin17 / GPIO55 1C7
Busy: 22 #pin16 / GPIO54 1C6
Reset: 25 #pin13 / GPIO57 1D1
RXen: 24 #pin12 / GPIO56 1D0 # Not strictly needed for auto-switching, but why complicate things?
# TXen: bridge to DIO2 on E22 module
spidev: spidev0.0 #pins are (CS=16, CLK=17, MOSI=18, MISO=19)
spiSpeed: 2000000
General:
MACAddressSource: eth0

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---
Lora:
## Ebyte E22-900MM22S with no external RF switching setup
## Waveshare SX126X XXXM, AI Thinker RA-01SH
## Will work with any module with or without RF switching and no TCXO
Module: sx1262
gpiochip: 1 # subtract 32 from the gpio numbers
DIO2_AS_RF_SWITCH: true
DIO3_TCXO_VOLTAGE: false
CS: 16 #pin6 / GPIO48 1C0
IRQ: 23 #pin17 / GPIO55 1C7
Busy: 22 #pin16 / GPIO54 1C6
Reset: 25 #pin13 / GPIO57 1D1
RXen: 24 #pin12 / GPIO56 1D0 # Not strictly needed for auto-switching, but why complicate things?
# TXen: bridge to DIO2 on E22 module
spidev: spidev0.0 #pins are (CS=16, CLK=17, MOSI=18, MISO=19)
spiSpeed: 2000000
General:
MACAddressSource: eth0

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---
Lora:
## Waveshare SX126X XXXM, AI Thinker RA-01SH
## Will work with any module with automatic RF switching, and with no TCXO
Module: sx1262
gpiochip: 1 # subtract 32 from the gpio numbers
DIO2_AS_RF_SWITCH: true
CS: 16 #pin6 (GPIO pin 48 1C0)
IRQ: 23 #pin17 (GPIO pin 55 1C7)
Reset: 25 #pin13 (GPIO pin 57 1D1)
Busy: 22 #pin16 (GPIO pin 54 1C6)
spidev: spidev0.0 #pins are (CS=6, CLK=7, MOSI=8, MISO=9)
spiSpeed: 2000000