From fa7909d9f800f7bff2b2109991f571c3aafb69dd Mon Sep 17 00:00:00 2001 From: sq2ips Date: Sun, 17 Mar 2024 12:25:50 +0100 Subject: [PATCH] gps stuff --- code/Core/Src/main.c | 52 +- code/Debug/Core/Src/main.cyclo | 20 +- code/Debug/Core/Src/main.o | Bin 673576 -> 674360 bytes code/Debug/Core/Src/main.su | 20 +- code/Debug/radiosonda_m20.elf | Bin 883000 -> 883308 bytes code/Debug/radiosonda_m20.list | 17339 ++++++++++++++++--------------- code/Debug/radiosonda_m20.map | 736 +- 7 files changed, 9144 insertions(+), 9023 deletions(-) diff --git a/code/Core/Src/main.c b/code/Core/Src/main.c index 0c1c972..4d1b0ef 100644 --- a/code/Core/Src/main.c +++ b/code/Core/Src/main.c @@ -24,7 +24,7 @@ #include "adf7012.h" #include #include - +#include /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ @@ -83,9 +83,12 @@ static void MX_TIM21_Init(void); int main(void) { /* USER CODE BEGIN 1 */ - - uint8_t onebyte[1]; int count = 0; + int countb = 0; + uint8_t onebyte[1]; + uint8_t header[4] = {170, 170, 170, 3}; + uint8_t data[58]; + bool dt = false; /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ @@ -146,18 +149,39 @@ int main(void) /* Infinite loop */ /* USER CODE BEGIN WHILE */ - while (1) - { - /* USER CODE END WHILE */ + while (1){ + /* USER CODE END WHILE */ - /* USER CODE BEGIN 3 */ - - if(HAL_OK == HAL_UART_Receive(&hlpuart1,onebyte,1,10)){ - HAL_GPIO_TogglePin (LED_GPIO_Port, LED_Pin); - HAL_UART_Transmit(&huart1, onebyte, 1,10); - HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); - } - } + /* USER CODE BEGIN 3 */ + if(HAL_OK == HAL_UART_Receive(&hlpuart1,onebyte,1,10)){ + HAL_GPIO_TogglePin (LED_GPIO_Port, LED_Pin); + if(dt){ + if(countb < 58){ + data[countb]=onebyte[0]; + countb++; + }else{ + countb=0; + HAL_UART_Transmit(&huart1, header, 4,10); + HAL_UART_Transmit(&huart1, data, 58,10); + dt = false; + } + }else{ + if(onebyte[0] == header[count]){ + if(count == 3){ + dt = true; + count = 0; + }else{ + count++; + } + }else{ + count = 0; + } + } + //HAL_UART_Transmit(&huart1, onebyte, 1,10); + HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); + } + } + /* USER CODE END 3 */ /* USER CODE END 3 */ } diff --git a/code/Debug/Core/Src/main.cyclo b/code/Debug/Core/Src/main.cyclo index 009b5d1..415b412 100644 --- a/code/Debug/Core/Src/main.cyclo +++ b/code/Debug/Core/Src/main.cyclo @@ -1,10 +1,10 @@ -../Core/Src/main.c:83:5:main 2 -../Core/Src/main.c:168:6:SystemClock_Config 4 -../Core/Src/main.c:224:13:MX_ADC_Init 5 -../Core/Src/main.c:296:13:MX_LPUART1_UART_Init 2 -../Core/Src/main.c:330:13:MX_USART1_UART_Init 2 -../Core/Src/main.c:365:13:MX_SPI1_Init 2 -../Core/Src/main.c:403:13:MX_TIM21_Init 4 -../Core/Src/main.c:446:13:MX_DMA_Init 1 -../Core/Src/main.c:464:13:MX_GPIO_Init 1 -../Core/Src/main.c:558:6:Error_Handler 1 +../Core/Src/main.c:83:5:main 6 +../Core/Src/main.c:192:6:SystemClock_Config 4 +../Core/Src/main.c:248:13:MX_ADC_Init 5 +../Core/Src/main.c:320:13:MX_LPUART1_UART_Init 2 +../Core/Src/main.c:354:13:MX_USART1_UART_Init 2 +../Core/Src/main.c:389:13:MX_SPI1_Init 2 +../Core/Src/main.c:427:13:MX_TIM21_Init 4 +../Core/Src/main.c:470:13:MX_DMA_Init 1 +../Core/Src/main.c:488:13:MX_GPIO_Init 1 +../Core/Src/main.c:582:6:Error_Handler 1 diff --git a/code/Debug/Core/Src/main.o b/code/Debug/Core/Src/main.o index 89f018b211d25664baaa1bfd6e24cc68da8a472a..8327ab80d0adca8b9fdf8fd4f4f8338ec1d78fc0 100644 GIT binary patch delta 86089 zcmZs@2UrzH)HlBUw%vR878Mi}6npQzm)N4l-jbMTqKQV0E%pm2Di$o)f(;R{A<}Gs z*c(z*#NM!h6|jq9`Tx#>@BjP0=k*DD=Jc7}DQC{i&Ca0e39GBG@N%y3F*5ikHlim} zjd{hqWLT6&<8KW9sQefH{w^tx1sqpW{s(Y;NqGX`#FFyAfRjqflL4ocl&1ntD=Gg6 zIGtgfnu8fYW|lB!0nRQd&jFlUQg#CRmX!Sf{Y%R80OyyK0{|D4lotXnDk%p7E-ooA z0bE*AUIzb6Pzkaea79UZCE%)(vI}r^NqG(6+LH1*z~GYddcX}O<&A)wO3Ir7LrTh9 z07Fa4TLHtUOsxvXUj!le+lIgGCFLD}J4?#D03%Dvy8)w0%6kB#OUf~Tu_fg=!1$8# zUch}N<^6yMO3DWToe3pKB4AQU`4C`oN%=6~k&^OJz+)xlxDPIG;UQ)gRc(bH@ z3-ESH`3~USl5#fSy^`{Mzz0mb;@AEV$fFWQ4qz_+`t@($x4#j6V*i?0CWfh0G>WNo zXjHpOMQ#(immTo~AXBmIL{}T$%QciQ@BFzdQ_-FI_TlR{-%7XGp6Qj_T&FT>-xXYIy(OsVw?Yk*8KmWHR;x*hg7k+a-Dpd zyEp1;ti)END)Z&vXHpev{f`EbJmMh|D%iHF9q z4G)c~eXsa6eRT7JDM2&U+|v`~7FzlHi*vu%3FgX9Z&&G~ThX{Q7~ar9$t)Vj*OW3z zhQ-UJmoDBbg59D~EbJDIq6+E%r$XBwM@B~SjKK7%xOaw7U2=Qsj;V}c1$;iHg4ZyH z@l>KE=J9-2lCgrb$7YF{RLaL+WG0tN&*Yd{rFN!C%-m94KZ}f$KlUTEc<;p$!}2@M zN({$e?g0YNd&2==AJdb_dw%2@iRW6djE*lgi)9Ra>A@^x#=>v-ATU-w>JO1|@K2n_B&IaqbtuP_;fIvv88_Z1k73;ToL@MmEI+@c#FXRj zcVZY1enMqboH4S}&$~oM%&LxRjOJ^gN#ZL^u|iEZ0aJyM)!(=U=bU)$4y49@6B(ho zdwJq;x|xFo#wdtFn8b)az0iQ(?#=!tmY~Z;1&n&}QV$(~?rArX@e;(p#!n$$-|p}c z8_F`Go4pYJ+=f9%+?x%8kHdztX&e!z)!-Sio}(5K=HOus#3KZMw*GjqjLFqrZaBs@ zPGb1E8c$}|6XMhmmHlA?%kaJ$;$XiV7Z~2pOm^H@-3cK68scH@-+7noRPea)2A)r8!UEfHI5bad zh@S18VLkw>M$F18~@$az~yi?;k&C-3!y%-7?ZgmPw@UN##HXG53otan1ge- z0GnKlxpDU%L2n9cb<$V!;Qnh27gLLwUYv6sM5h&FK3w_9cwPS$W7W9Sp5RR{#%gi; zAJE1b#aKOV>IGPtS&TK}D%61FtYWMg_u&$(%r3@SaixtqhMxnh65O}rmNrE1o?Fc9 z#C=PJQD-sMl~a6On=IuN&j9HAvwV*B=1y7K_P1bZiCWFG_fKfd zvF`?RI^gXc|8CIfx~MkoTGSJ?Gpv>Ra6K-y4&=`kOElsJxS>TU#aJ_LC}HP{u~yu# zgryc^?YJF3x_Vp7vddh5Tgxfo9;oRBmfxpUZI!jXx-SM!ZWarx+Kr znXiEtx;sB)Aez94%U?>2t`?sTp@*W)DS&;6^o&C==4K++)EwizJHq{V4n~x~l)IvjK*5jzam|AOy$~GPXPCE_3!hy=0I%_vQG)a11L(oV6Yr1GscZnMl-q ze7?wZHBH=Yf~=2K$CxISqcX!PA2`M|#hqFtu;~a3Ow-(HRQRyJB%u-0%YOl z3(_;u%piNj6ASdm)(RlK^`j4aiU%_ zo3~qH09SqyPnwS?` z2H#B%&=4QC_5yGMHL+@JGFD(YNaNIEuVAYtJA*Z>9=qWtSRoqHh%Mg$NVtYHV-0CQ zc6!j8X~l@ib6_u$cL3At<$cxB7uZAh1x7xgi8JirF3F;8wms-7IXy&EWOqsDH>-)|)y=AC5YRY-hdc zllJGrUA5iZoVmY3!VBFI@;VB)^tF^aJ5|-x1`~seE*jJ&EgrQM1Uj6zpN?Q$auvc!u!1vLzYYdivZp5jD@6p1dW0annoEMw%k!6(L z8sftaoCKx58d8lB7r0)!m2n!YBQ)Ztg>o1}_0V}aUg{14-?Jr}&wpr$!Oyq$$3nzE zoQx(h;>8?Pa3nt%Z8ELF!#zA#Usr3Szig;WZUm*tX zr5<|%5vMY-JfhELOd~e!Ggy<#PsiJ8!u}JC3Qy7Gnz0!jQQ>JMhcWYshuCyYtPR`J zb;RAhak3tyxfST+bY(vm!Kkl>^wdVO;$L3-P})dV=9k}!iu}ZeyX3M}oxfoIR@U&_ zLDDZp&|i zHN9#MtE<9lm;n+I+Dm6x^(hQ(FCJ}zHbl)kHI|+o_y)R>8iK`Bjs_ORzlJ3@GNad< zPmUyW@vq?hv{Jkj|2ZBtKC2<<;?K$mjQKp@4q|R3TRc~qbGM+(PwYpr!IZyYf}atJ z(a!Pru`2NVM2t%)|5HWBm|yTyAZsFp66MzyNcok4A_OZWSw21#n<+*NdW>eh=VM8p zWJ=^eeErlR=77CCz?0$mE0lh~G-(0cfYC5~ON0k^uU@$DnEN``9EpBIa zuxC)vMy0t7Ta}RFL1}hltI&56I2z_=ceYAf@Z7ko7-r_OY}GVi9@-E!d$3jL%Qw@8 zsM(XPvKwBTb74K;sXSZdIV4+f>>1ZEj|NWDEntS;iC{Hn`JO=ZUY0uJZFo`L+w+X& zdxz-!2}lR+`v~mfH!Nf6T=L}t!vw}syjaQFFt-#BIF+?v{91|!oP+H*lVdE!)2AagaugMIWb5I+s^VypT>r(}9}EZ7VlWniBeIQ-bBOCruswwJE{! z6k^R8X0SFVSe|QgL)l-iq6K-Hh2d=Ec{nPlPzR1iu=zECyz*%aWE7^373JMK($r!3 z;7L=*L~ZJ@eAJLB+SFkw@}v$loy}|p%`e`b(45T`B;k#-tcLkw!hcb|wzE|b-a~1Y z?*s|#;ko8KAWhq%Sl5p&9s#4uP_oflK2oj7&+C|)~hThuX7C}Fx>T@ zmrq5xa|bNHy@b*vtCogr0m)YW=V!#sJ0yGQ(yqf^<#@T)NY^bdcTOJddhb=Cyxi?G z*z1cuEG8{_Fgn@|$OW#3-afp1W1VZLH|o^M<@EMq{am5mWhxgqB*tc_T;_YdOUM7n zGxkla)a?H!`MGX;dpM)h!C1y>O{ki91mS8I4x1%>4g9g2mO#GRL*$Vti9~;FcaCQ~ z{9iH56TB6Md4VUpskIwEV?qOtdB!@*Lz7!MybM(oWF{RZENyiXQ^4}H)^jTdGiBYb6>jrD!Pdz_sSJg(alMv*WWdIGUcb0XlSP1d}nmU_^;Q6W6*c;uND5-P2=FT zJhg$mYvMP*i%)@g&QyWft%*lz;-OUcecL4_o-Ipj1-EjHW!okv$LwXx(K^7b9Km>= zzQHrtc;nwhP02GCo0Q)*!iZu*dZLJ66lG?(MyNh|9x79aUW`czbaqoA9I46yiTPHR z!Yyv)M5e}qQ^>F(6^4I>_+vMx_7g; za%b(XOrMq=8zD*5!kcYrYHsRg=kWflEZfb_LdWI})w&q)b~|e_X{z1^VmSUUown|K zdsmKRtsv?l^gniLyFON_%oe&TR2{_?@~(iYy?=i34B3wIcCqx7b0~P?9pfL;A9~So zz5fq;0`KE3h*hgap~BS~7Bj@UFE>N3RU^^# z*43njH{04ZxJG*?U#>+lAK?pTMW)?-1gp%MDTL0bjU*~lY6|v(Ovmm-A98?X+K(o> zTM?DVCsWzGER~a5Qh81|60FSJeq=$Ph$x3yMFB8lenc`~upo;}=oXSGzesWdcw`fD zVhgbo29sz)9mL4YrfOtjLp7pwsYR5!n3P1O>JKFOvM!k(C6LSCT~rn>k?F{2dJgd* znNKQd{rn?oHGfCe!m-^DnG4vVq3V5+EfJaZh_ghdXdaek1zZ<|LU?m7d}vqTkz2TIpB@;Mhv?^8|9R4x3GpdAE?t69XXn9lM6)jRtD# zRwQghCf1L%?yMvEa|pRarp!E|=+2Q=n{0YU)goQzGRKko2TkbNaumIlJ3jQBJDBXG zdXa_3&e2-!C_Tc=IYMeV$oPs(8j`#sQ&D^2H(C<+_d!IzPHQ>i9zt62c9O602br5t znJ9BOD(`Ae^fE2TLXKAT@gqprV*%0UPa~OaP041%R!&m8J(i5t(&}3$pD2H0qCywj zLqc)`qC~!-=iMwanzV)tjm#t&T@%tBe1VL5mZ48@G=?a7xg_&P1(IJrk8}qvA^HTQ zctxh|9HQU2inC6U33yG)tNn@8KbMS#Pa?{j<)jvigF3u4Gnu=FoQcSkt4waPrx91w zll+#7WVB^pl4Kmjosdi1M_oyNn%1d18px)SPIi`u5`E=KmiqtNhNLE7pMi85j)yQw zlp|$1hn`-$h`z~Q&MCHp`i(BL5L1cQTlAW3y*~w{5 zl(yQ(YIuUGHS-BkwrW${8zf~g-#9yvi5IE#Y=mrq$duM5U2Y5+@+%;rt6Rw2tbgeF zQxQGa4j}n!I7t&3Nt%ia)xKBw`BA0heQ{HsXY8=qAxu~x(z~| zq&EL|dUh{Iq;)q)`4Xa1)Lna}OSGZFVOK6P*7iiNu#?O!k0i>j8Km2%9F>!*(%YI6 zN!*e7M2Xd=?Oza=qXz_QbUG(v?rAH+lWIseViMRvMz8)#LSt8v+JSmx=l~97Fi+hj z%C84W+4_wn)2ET7+dAS_(cVgf$|Q4Ad-*+(Sr-`}hN{KRkVQMoBLC+PnPB9V#^9AXqqq$iI+5U)u4 z(l`5)a^gICt}Y;>QQ8RpQCl6R;Xq$xD)%A_U3QZ0_;pm?wu`F%MMv`IwaLxn0&yGF zr>YNlN7fcpBwc3_B3XQC4QZT4<>k*w^u0EM%Na-AS@GjvBBkPA1(&J*b?YK+nARN}BuNe=>W!aA;lly|`N!O_X)en)gD2eEs5dvXIFD34O z+ev=XZzS`16j5@^Itg)T3e^vj+QI1px(<(gi^TLVhvCIsNvHDUD0;R&!s2;o35VzN z8aP2>BCv`}%y=9sNlZ^1luJz5MS8ZZMY_LZNJ~ssFOpCDgUX9TsS-84sFBC=5#USA z7)1Xfv!@?bC3FFq`-&Zs$b5T1-*RykQr_hvwd**Qmzex7#8pyBa*{wYp5usHfUp$p z(}J*YEaei@<`B;2nY^atcv=tAt)nCQHf+2krs;H!!T8U@vLP|U-qUk579NQ?e2t!4 z9b_(|8CC9aH+pu~dT&Y!wJ)?Hnf5_5RbXYm|0vpNioeL5YCDaH6d3+>Ck7&aXVJ?ZI~-|QaoqG+Y+KNN++!Hm z4dnVgy-@82wb5t9hAYsC#YVAp@N8@t4?&U>62?MK`tva4bOTrz*Uv#NRy0iORN~lM z#)ep|wk!yrd>-4h96Zlwk0KQyEn;64LNt)=hJZ<0%nlBQsU@tlaTWBS5cVupX$yOw zu5El^BRazydUg*pIoT*3;u-uC;rn3C%gEtgOSO@cM|@DSTdWn z0oZvqq8s}m-icKmxPogzVXVDDM>|z&?ns2xR(H4#W1*Kzh z6Fj?rrMS3nIU4Cdzeg>^F>U^Y*1zmQ7@BUU-IE`i(hbNWHiJgLiw#+TCaq(yhJqNz z>Sz+&!&b!*7Z0#M;b>b*V71C8I$5pyNvu}?L#)<-WL9gzVV0^bonW<=oMfpf#V;Y0 z`f{nY`(WL@ZXo=Z^Hbr%TTMl|@^lI)tIj!%n$&*t8j|&w()O@nG>*u{<^u;orghOM zl-sUsMDa(b*;#mY3uN)^6>mT@`^o6gnyWI02EvKwu^FINDjkP%^>U9NV< zKZ28Pw>@F3A7Ua#^kw5I-1K8dwgb(dow*gnVAiiTY_DgB9tUv)+mQhXV~1l;Iz&4^#B#~{p0@jk)7qsI!#R_L3a+>Yg7Q8cT z=}-_av%Q)_K2XP&D`#rE=Zr^1%+|Ko*C}Ia^?+9x@4sbnd zL+>CL^a_#*T&0H)Im4}`#q=z(*1 z?np47b9)<5O}XQzAmYnUL83zp;5Ub&zDxO6)qpMIFO~)f=1V^VaXo*_1`xr|qG@Iu zA3)JV952#zAJ30k1P{mga2jSO_+;c6@P#q{ylxExrP7kl(DB(m2+zvt8|Yi&zYc!G zP=k(rUV_@GiVo&}@Vkt1&mu$&nnc;32126xbez|TwJux*v2NWxkZ3TyJ<5%{VU-k{ zjlT#=%g60dZj+1qE@Jz!Dk{^dO?xMho&#|+L+pQbC4`2DhNG>cs<}|5ai`r;o=`C! z&q=eX2Og9j(@L8lWp#vXqJ)VY9YH#ejGCA#jlByqm!ysP05_!ew?ItSx%Yv>8{M{l zOQs}erMX~7v3WQvL2q+@Dh06^cKj{WHlF=Q4{R?RXNTQ=?DXH^^B(){C`9kG)3*XV zWS`JZ@DaO|R-9b6bya}JY%N-;p0Zh3GsS0Y{Am!2*unq8^=CH69k0g4CC>nFHTSLs zcx$;-^0$r~<6I8vdhP}VT^qQdk#N6>D}|E>aWj`rd#^3rq;s$x%6%FFEQ}j;162#> zmMak1&-nyG{Q&pu1w<0K@w8=2dLleJpHPTSiZ(I|^UZNjAiqZuByhj6w2Jor4FDx$L4^p0K5&tCtAdsIuACgP> znzX%G%AcVg9mG$eS}f;pA@eG(aaWn5t(R>Ks3b%a4Fn&A@@^F4lHTd1Z&%6ZQPJUW4BqMnjtya7F z*W)3who5-^Mx*(k&j5?%7t!t^j*qAc;$Hp%u33uv_^R0;9^_YF1D3$Ae^2vI5`X9y zcsj%jG+`d*l`g=J@ISc&JI>Fde9j48pbh>hem13~PV-U)m`UOH(a1l?*P~hSKELBI zBp>j#cSG+HpFv?}4zEKbCqCv!z?1ldZ%i}iGk)cL@SgKGE1(w6e17s(XcX{)5%Bw( zAK(V&8$JzpX2kcrR1Gp8_<#m*@sZ!)2Wy{rZ^|cp=CdC{NXz0rVfku^91xQJKrIdmIlloU z39V_Tc1S2oyQIUy^Nzrd2rkNg9TT=2p>SMqCQ)rp3WwW6qFG{qHr3QUByd+qYWyPCFD~M^@@;!i+kc# zVaUG#Z-i%*3@H*O(id4IHld_ypqS?5!CWlv*bA^k++Q2iWulSxnL%Pi1%TyZ%^zTG zl~{%LbS}|t0*L#?dDBsu1L72%`ilp}kO*K2V#sD-iQ;^BC?tu0jRtl|ENBG1WN}MH zYQ0#k3OpPYISN~kiP;UEpq>-EJc4MdC=G*|46$DZn3-aee_-a4c$-$DEb-C`C|(yA z)0XyzxOFd#-W07gVs48wIEdU4ySFcylf8bYd`88>!7x{86*fzvPp2&qsT{c&&nf|N zXhPKkby2S7GR6!oja`hrq7md16xiN{d6`oSrX zZ!r8vP#Tt{RyQi3e&6`oHPD*`oq)@x9Vy+>>{l9j&42tGloo6@WLh@BT>`PyiZE!k z?&73*tnEbs&f4Wu$k+b%Lx^^G6OD4mCKOh7`b3d#k7g%9AKdaNBuCG@4$AaUUzGjX zz1a6)L*SbSvm4l3x$v=tZCL;;f^EJ9O1sz{6a_`ICq9-0Q15t85lSEU45tWAAwO{- zz(;;Y4(xv7Cw_(UXMTGpG~gRwVGW4B0;Xq7j>1J2it~hib>L>c5RV(KVu0|nKNJ=S zGp|5$p>UU`o<+jpbpV0F`PKl7gja7XDF@}YI^{~-cJDt7N$i&Z@q9d7{)dT`)FWq z6i(7^bd%u!Clo@2IGWtH2&1v17DI(L*b<6ch1Gvk{wGXGruZ~mIDZk;2tmT#NlXZV zIOoBH@E4^ycL_V*0z?WkCPRO>u#ozDl#tOF#67}s>JrgHliP3@E3~E+ElxO}3tqe+ zVe5@qLiB^eK4B8B)L{x3N+Ih}VSG!<{~r??J;6IUF7){d{S(3r+8Ue`{MN$#DItpX z7pH}3GP=nbVGC_x&I(VeKtDy;L9^RA;q62iO%pOGfs`&R!WAz}58qAzJ1=ls0WJu) z+W}k@8pc39Q|NmJjxGri6QShF2{RtL}%A-!} z#rWO;8$@Sh4=^{1L(}mRHi;`_C~g*$ng9zC+ftCSMa)|WqoLwV5pQ;@c#i^!Fwst3 zew$c}#_vw?OB57#iR=`(h!iJ}gWhg&t}i5`L?2oV_K1!Fkc<|uQED+pRI7m)E2g9W zqqm5iOhDtsZsXu-FER_TwohzHQ`3I&aV#_rh;H|R9TW{Xy~9+ScM>9rVwWXQND_~Z zMP&|&(`lAT7XR)H;!!b|7K0OF!fzm+6kF~DI3?;jfOlG4$DlH2#76HZ{y8gF-w*v1 zk*y1vb7CF?PpM*C13;QMvIESdi-D^FGQ@jyT6A9IkHX9ak=+ILi{g1&-ZRC6>%qGu z&Z`Y9OPqcI#;%GV30xBwt$^fpu|EZ@H^j8wP`@b-cun!oEwQl;inm3ULXJCPTgu+u z6<3pDwpflPp?hNeGBA2y%oqpoK%7mZ>Y>=PF7zIWFQ-Ep1jIM>3pD()Jz;A&#CIjH5c$E?Yuf(Lb z5PdDKq{#4%SZfx{ycN9@A@WZAhluaRzxIRpL7YjOt3vU{d+2=>>mGpLPvZ1mP%jc^ zQ%CwNmZ2W>1yzIIS2%{G^BZ!@VERfP>tWPS`oV&x`AdnkJj|1ZZUt|?^kyos0I3h1 zVl9xCKv~gK1m8$@eB@)&zOtaG8`@mZ!*;!yg(pB6Z6IV*^ zbab&=3Z@#aaY{RARIZhpQ;K(;6hKQ_ur!#~-u2QsT0S;Nd6fFxD4n&z?41q#&AFwn#<_;zFhJv^;N>t}KV`FsXo2IpLDC9e5E^681~tHfcEpf!n1OkAdxw zoH6ujc1lwh1MHFl7J(TlHLn6}x71)c{KiQ8yg-bV^g}?5lR|0p8!tI2J-t_YLbJy{ zX@?yZJt+140WD0Bn)2|QDD|g>F-hu#t&ezE%B0Zjh%{m*B#%nAov?CD`oW1Tk9b@v zqzU7MRD-CerA0U3>5SBDFL-CAmNZkONK>mr@tm|}EF@E<&V5k*G^uBG@Y1Cy+N@_t zuEB7BUP}K7>KCLj$V7@4B|{}tG*cSj4UtRIuOmUslDd_F-eu`Y0gb;a($rYUT$QFB zhvGG<(LQ*(E>->&qBo>26tLZtZq5RBOR7(;xGhCf3~@&a>;}ENk~`HYTk1$TvwMC2as+b3I1(DGbU&Ylj7v8a$!c-6Zti1BOI)7p{v-fYAtDX#vD-y5A{@vt3up8wxvgUzY*w z)csNjymrXrwH~J-Sm%VJ%ws1D*E9=(bjcXsoVWSrFrN zv*`dgUYFkq#J#!+ltJF7n=%@<_v><=!`cB|8y#F6)H%JOkf7_;3?fOofS%wT((Sth zVzQ2>-R)uBWa@!Obk42Ep>b5V&;z!Q>3)=e9oNOtyEvh%&Y~74b%WP}cuMzk9u!aO z5-S0m(Oslu-dSA$1@bAnG&&?Zrz=M_Ox1NXLoZF&oOUYdx^0yF$k6#lLGQfo#UB6{ zba}KUU)1?Kzd+YD&Z7m0H+9cx#k-@MM4O?zx+@BJ*}4zYz`Lj0{sy(bue(zQA`f&wr-S!UcZ?>X zN4lZ4oIrDQLmI$nuC5mCC?D(27Q*in-N;_Rp6d)0_P^0h%!K4yozH1t?{p6*f>)@E z#VLnaq#L>tywAD{wc-AY?&)r*f7Sii1UA3v22xP!t5*j=&rd%r89aY|b_x{c>6b30 z`zQ1D*D0+RppPj;6&L99T0>)@elqQ07U@e-q#LNO=z_>%{iB({mg&uO77?VMEy2uk z{kS_&Sf!7^T^`Y;=c)Cp^?&{Y_09TiW+;T{A5#8ti+)*s5Vz`A)0hs^Prg%2dIG`Uy{la-rFHtKJ^gSt) zl&GK41fog$NKeQd(synEnPmO)TOc0RkEayS5q(&1wCSi`PrPILezd^8zoRom&gsv#f$3Cz(Hej>r@qQ>V5aN0SAdxeeUBVq z=k+s2K=gvX?=x2Y&yGNR zpsz_A)#v)kbOiiDzm853^7NVSAepbvp}awXexe%`Ug{^{j-L2RpH2hswSFlz?Tvmv z?v{#g^>1nbd#7JJ2(^E&KYbFCAM|&uFjlCa>7;|@kNQwrc|Pfv4e4K@RCBsd4{@8p)lX@V-=_e7;4gz zv%s)_0z54=?27|&k-;k;Aka`6x5&iBhCol8|ACY%x599#Sli5eW+nB9bs%W{A>a- z%n&^se!~s7N5Msep@syo&2X$Hz;;9S8A$FhoSg-1ry+6yTDZ&5yB_o+4dX*#dbi;c zZQi2{*>q^I$H4VOouUna4Qc-uW2k)(8nK3scKD4m_)xSHZi(}q>n_M4jU#7hTkKG zue4)3ZaDB6yc33FGI-9DhLg1GK4s|F9^kY=r9+i7hGn!2o;Bo5f=r6x(>7q|3_sfd zQVrX-Kr+oRVLv3(4L{>Y#$twHOIZ-l8%_s6;ew&@5lCJ%cn(J+G7TRl1G{ACO|xZ| z;lovc%Z6EWR&&K^@T2tZRm1o|n7L+%oeI(GhPP{B?S{ddl5#f<-gMf3%TWCcY~MEM z{)6Nl!`ThcziVht+vRM7qb0C=2B{eo?i*^+b&v;!E04~9QzX)ZLR^aS?N zFu+OC;U~iiPkZ-zaz@cA0EJA&tDoJD6@{>Evo z;Ax)m@(Sq9H(IQ)9bjxv2T2QzU1vjKp;3|{xyX2lqVGWCrQ-mLjpJ!rUt%17mDazd z#xz<@ml=~N&JQwvrpR%*F~T3#Rv1n65?2~o$~mku&Y_)%%h>o5Bv%_#DNVZ0IJ^OB z7;FrsZT@=W>Y*^U!MJWPz(ykur!mxw59zyZHoj^M5MrF$4ZJPJ+wExlg&Ie02X(8l zM>;^5QN?ks7;bc*3{Mfp0-El&8Qp14*>3cvkZ*^vQ)PJCY1~HRc9$`GA9#_*-gDt; zx3S;^h*8F0DI2rLXrs+!v~l_XD8w4W=$InT_<$Dic%v_N5>9ciaf3UU`-~T;dmS*2 zrVP_TqZ|w@!FcaJK%#N%N*GNt-rETG$;K1(@(&w5YNFXkjL~!p<*0EX#l**q!`?#u zgz*y9@T9Sy6X29ls1Ltqjr(XyN-_S~7YgT$ztL%|6TfbJ05rq+AO=Ry8x6D!W*P_6 zLChuNcuM_d8U3l3T{Gg&F9wG(^ALD9j1iFlH;qdvK)7X$pegCL@l}0D-Z8eJi->oP zRa%0WZH%Fo-81%}Zh7BWI261G#wKUr@1fIp_7a$njMwR6YL2lT?Lu>n!SuNv8=roH z!zV^JIxl!?3~UU^XU2rj5P5DKa}0jp8rS{-;ydGTTDaaDyVIWZgR%TY5DSfm%0c9# zv2iC5KNXn1abGET_+oT6BJ``V;dAJJGkzEk4PVnBH#FPNG-(zve^XV; zfz313tO0AggNp^G(2XE2G^u^jrbVXbW#B2$RR27Pi%k>nLw$+KOyhQ` zDVbK4Wu`331O%D3QI2xC$=7)XGAm4{=v}Tf{kj^=RVHuR3%g9YFM+K#~Ubty7Mg0+`AE^4_#z z?lK*u**4Pj-&)w-Z93ZkyeQLgN|o#}oxTi_Xww!O^kPg~Xr7BT)w}{@aVCH2o$)5g z3b%VrQ#@$@x6kBt7R>#o47xIUz+|MsdC=5&5wHYPAk{n3luwgEl1WEV%OO)8ngx> zImI)kjWlbXH60oRGv`dBX)m2>I!ed8X{K`mM9-TR)6{aoH1{7^yJ$L1N#sn^kVPO~ zGWj2ZNR~;Z0PwQuBVEV3Vrsh@#H*$`v@~Bc1=0rjx~V$FOgBsgui@{esrpS2owrO2 z=qTj2Dft7y9aB(MfV-y8Z=s)Ul4z#5XNr!7?fa&Ts_^^3)b0XA9-6`_9r?&qf%2|7 zreQQHa!uhhZ9Fy^euaxCrp5IDo|>*9$s;~9b=?S&=cXEzFnwYAlQI{1PSY%^cfM)E zet0S{<>?^$(j>nCcx4L6g#K$&JKBJ~F*XOgXRN>9c9pQRsa!?X3YvxC(@@3l-=puEtVHk25*VH zjJo_%IqNI1W%58=+Yp1~+YexRxon`@L@VUIJ5aTias%fwh^~_VUJukIM^nykwd{Ed zifiP*Xb-VgZbG}*b@FC9XbYCp=p1Ri>^>USHpmmG3v84VoUKW~?9G+XbG&(H>Lr|jnkPrKwBl$nZ@ z7gCOMx4e*SN69%w0DI(Qq%Op0`9lIkVq{O;$`fPdVRWG^PM%L&_;`5*WeN7m9Bn4| z$#MOF?U(EIMx74GlV$)MlzW?L|Cb=2qWyiMJU$Q9B>6CHq7TUfsk0`__2|05Vfhe6 zQb*)?ifxa|n~s2ZOzuNJP&h7U9zY9E$aY%XPRhqVK;)GC$5vpcWgQKiGx8@M#?H!b zDcPMO*Pvteb8`9F48~uoT&X(^HMvbFT9GafD}ZQ*Jc@evc{z}_3m0T22}Uokjp6^6+y2*X6P_3~$JBUjc5))oA~A zOTO0znDe&0ISev)WJC$_U2&TlWWoUy)W-f1o44z7Ws zZZ;HO$!F*?|7&@kAED13C)& zBpX{puShmhkoQ^MLofJ?JSz}9U!})406!&|uJQRRNk;(YDZg5wFkf;0#lUEQBGBG) zfzrws)P>58ThL#m^tQoTpwiMl8o8WMX5>X1orAop`=q*#K(2;47GKS)@>*Dpz)cxJgN)J-}vVD(#0tlm#*1ZBb^>ZKF`d$N<}_bflblnDT57h~dg0 z>Q50$SDNm&DNpIGZ&$3F;C_daK{3cqrFRsqf4h_}eV`wyw5LlnyOr^@az!c6K7hAJ znUe-<(F#kWDn{A!2KupzLg%t^N?8iT;+5mHU)`(tP>{Ay`Il0E`;|C4BRHT`}Ds3ykOs3Mj5S}h6*A0-#Qsg}7Usg(g0d_^H_z!26^$wWFp*%1G*EpOx#{?nr6W9wJ|rdA~v7 zo03!=4t>qaB2>oDJf6-n{msLc0n9T`r`I*#+=~W$fH}hqg$3q0U!kzj?Cez$8jH*- zB`^cce-4A_V)G9)Z!9rirJD~+%@zLzZ<%=$RV~Q8y)qP*n|IN+cZIoIA+VL^FPp(z zWuCJEdM@*v3$U`<{Np`1R%jYhcar3=BGO$l4Nc~2j_>(r)g?P zHnTlo`mnjpS@4dS_fTYT)LfVjaLin{21JgVLl@Ke-wE?B6`oF-Gjsr_%zIx!=Ct_= zWv|YdGkyei*1VqXf~A=A8v>j&H=>MMs`)eh6d}!gdOY;f%}Ztg%P{*;^7y>@i~%k# zm^13Z{YCRN3ac{BooS7_WPbZ2h*@UoBCUUy%}(l`SIhyFp15kxpxX!6%pW>|c-?%d z8^8_ow^%s5X?DYeEuzX z56lfIMf%V@3crvQADKPq93aQsnPvfJt~rK=_+#_$a{->1E7Sh(sks!r#AoKR?V<79 zJjV;*h54s{z{@jt5n(Og?Ee6jDKN)JgZR=s?>Q7+nb{k#^4dHz9=tc^v~}RUHLq4d zd}sdl1;qE}$RT(aAIwJ@z-FP-ys|pp*GF>-#S)**${2`#F;Aj^_p5n0T{-$@?vn#i zUrSs)5dAD=D7y2voTqU+&yq_gEb}du-ot2sr2_>I3oIQdd%Mu`=OZXAvcy&d2(*;> z0g{U?7yg5XC6*|PYnED^gHoWe%yNY`xVJ(M^bKu=M&J zyp5LRY!EkDdhG_-Y*|SIKE(2krspk|g+m}2YH9u&p0-*BIKd0E_#Fc;-12V&*o?4b zmjl>laU_7a-BQcxi)!q!RGSXPot7(|LEU8u9tdKjWk_e#X}87l2^!Is$&{0gv23MH zaIEDMou$TEf@ngIw=|NVx7SjMhWI|qVP9bTEw;l@IAEz>3*ew-T0U$hSo8@HNwipL zy-u=td~iblkmUk>`(%rQvV?~%hi~BpAF)K*;OVGkXaO{iS)!>U9=G`Y3o|Dy&whgB zNlRJUww|)2=wRivW$GW$J7cj9g2GvgPgj5x%k~G*J7;lG*GshwqXc4_#bXpC(=Bh8 zQ~o8xvVsDe^On!_E-qNUJ%iDUmWO|Vm}x2h6yUOD?+6gDSe6e&ovvEi4+QasWdc?7 zrezOh!f#osRfFxjmM8Qpm5JppRSWUv^=Q>kw=y^ii>hA&FQrEiRIA`wEuf* zDWWX>Gt1GTu=d>2X)E+!SgHj8%d`ANDa(9Ij|zC*1(qeWM|){$LfeE_mey{-UR%1n zMz!BqMvMUV&hqp*c<(K5C>`>_a_a$jg_hj;z&=_+n!w5@OTz+SMV3qPFzx(onGpl@ zizSt=eSNhYo&xaAl0OH)SKU1hJU{g=-PZM2cOC_pr+!@qqx03K9(V}>YJ>}5fhx8I zSg6`Mz~~~CrJJaM>JM?K%u=;FU4vPsMs9>&kUEX}>PmIpRYQYzrho{x* zHW^@z`m#KTYgIp*g4e0RacEkw+MBL4tXI#HnGLG#C5&!Vui@8P;wH7nPte<}zUT;r z5Y;~p#4YN+0!W6c&uQ-5s`fhxkuWus_J-l=zBCXcRA-CTu)R&KR|B=#uC_k`{T=F1 z`pi4kI&^@(TW#wN(I~anOn^OVNB|V}tBt$D%mMWZ-2ynMmhOp$CaAyd1Tj$^Y=LBw z`ibViLuw_$lGQa8A$eGp6qr7u>fVERRQ<_$5iX9Yr)cgyuC{m&a6+BC05T`l;nc!Y zYD-#VPOCQ=_&uXmod8c~)vF&MlA;b%VDy~I?Sf>gdV)^+)6^XLm07ylk>ceHHG-}m zpI58Wj^Kjoq)V6=)h#r=W~!-Iolv}_<~@a(EVV4nK9|+z$pBZ>XBFY;s#=#$NUo`m zrvtmLPN5vh4V7&N{hO+VF8bV3vnBxCR()>3{T=lz1*~_~F%)lStLk(}-cy%TNPb_P z(g(x`>Hvy;9;&nLH2xl`3MIdC)L8o2POf@}diP`1dK&G0qQ0cv(Nnc~2l#!ah6RE6 zT(whr{DpevJcxPfifItZSDVwDEl}@g0=!f$17YQr`kvAXuhqU|q3}lK?*hD4>+9j@ zoq80={%5o6>pbo_UDNig^cdrNbQJqLR-A`&${D?#>QXkM_{#h;O3-CoRviV{HE3s0DP?{qhQp}s;)qL{jEz&!S6h)nglT4dgBI&3$4}Z=y{Q~%5c~Wv{s}% zlXJ0kun*u8YcR!5ORXjv2g|H8sm}&kCq9Paa_e{n*b3`-o zw^;AfrJ7Ky|4is_wccKhnub{u7l9XU^`gCWgf)h;ZQHCfC|cQWZA!`99oCoS;CH9> zBps6NvW8HiHqx576(YN>t7E~7vM#3N#vbd+ny7ZPH8>t1#+pJK+*qsAPU~)*^&3U~ z@zykNV0*3d2!MUo@T-v7Z>>*Z`vGf(9!K9Ozg)4_r!B!%Yd=aPUb7DC3*vR_ zssm8GVNE^*;!W!zPguKUb&CS=wza`ExVU4@`WeK#*2R?a&$cEuh2A}DE81Y+x1OpA z7Z0p`b@(t3t-({F@W|TZ4AgV1y^;A4bFE(gY4=~Of6>nEi8Y+6_}nUO0`rCSInBL! zR$D4G@~xS)M=P*4n*kRuty#YUyt0N;(DK@PX#jX{tYau3dTSj(gX5jG+(p=YZ?#>4 z`Uh(@`sqrcwd^y9e6-%33F0SfBV0psibYlrngc&uf7%DdFV;H01AMjCxPi)ivzDc~ z%-2?xc9VWKt{go1+wRhiZ=S6zWu52Sj?wNYz;=X=c^BATeg61`skCrz zxAi^^u){W;PAYcVnydlXWg9mJej{yTH=_2tZJA*JQMTYqaKFbUUxcw}+kf?8EXFpO z7V%hHsj~oaHm5%w+{fEGQht1|ZFoMc?Xw-D9Or&pVlcn~TWSEz9JHN02asUvPn)wu z+rr6E$^fL;0w@u9&K6BaXQ{S#F96bPwgXU1w}nt7m0`2dm4x#) zg9)B4*tXNcbz9` z{_nbNpAQso*j`!S;-)QN_Pw!Nb;^p0&Q9ZlY~)w}^-w$1YrtlhJ1r3*s$ zZE@7z2ewsoYWmRTO)An z-Iq4Oi|u*e;Ax3HbtpuZ+AGo?YnlBu9kB=5{rv%!+k4TX=3HU_N*Rom_QTB~y2@Uj z_RB8&z2RW4w&NlkhMIjh-Kt(|f0GH`I(uRl=m*<_=@!9y`w9x_H`r(P0oZ6S(-FK) z_H??6yV>5+2%91HQb)ksY7co0M`3mw-OmlTH{Ap*!fB5l3XN^{YHc91-M*EAo*niE zA<*AxpQi(Fm%SNHX_5Bzqfm?8b|Du=qwMP%g1E=NiOxi#?f9QDV{qBO(FKQC`=D$X zi?iD}Sc$g>QA&5OJ%N+qVWtus@)PCea>Gv2l`p z0WCR)?Dr2qG}%6tj2^a^r78G`y~nR;{ZV_HP2e4~hwlYAX+NTe$SHfn%V^IhKiUHz%igyG)Gyn=QY!310lQ}ZeH3`t?ZfM! zYB%f)Hh_53KFuB2Eqe&9$+zvSjq;y&?EPt}ylW4ZQQ>U+BwrBk*#i@yf8XAs3y2Tw zqi7sFv^Sdu-Xr^~Wzf&D&ou+&+GEP2YLD$Pl%#lK|K~D9p4!{eWc|!uk&+b8?J*JX z@WOtC?)l`|&ry;h-)=rm`OgA-`gC}DY0squ*(-bP4ZvR8J3oZAH}<1TVf(FpE1i(M zvlsM(NTGee5$J!k-%f;!Pj+9*#1+{aKLGe_53B~sFZPP5;C;2XoeSbO`#-_Z^L319 z4n04|I~pqfjvWZHoZ>u37ae5gJ0fBr6W|C5M?)7lEH3CTbgZW&$s)(Y>Znto=o?z{2A2sj`Gy!HaNOA1K8-O+Y4qkIV#hpaI>ST9vUHz`Lxn* zapciaL8xPG8fNj*z;)eV?N% z#nk&9Khrgs1CAIncF?i$4Ac`Gsj(m?I{y0sSdzm@k>(*sqbVSsawJl$cG}@=Oo7}P zydi+Ij_9tCNpZx*1Dta#91CKqm?j+Y?-=N+HvYh7@BrcCKY z$LRxbpXqp!1%*qFfd7DHIie?`_Lm($QtWfZF{nJStBysqj9qhtIcZ+M?il?X;D#fY zlKeLvU+6~CEk~&#(75fe_lAo*4)-G<-gS%&2gr6LQmW*hL!?~AeFuYo;sZymC9v|) z;TH#m|Bs~WfQst)`T~MLuuD;@ z3W$h+(yIc}n-q~Qf(R(z@8&zlQDaV9#A9yfM&Gm(|gb z9COjI@%fFp*Qn1Jv%pIPKQ79C6&hmm_77Z?qzmS<$fRYqcKSCXDZ*vM|gmFeGt4r=9&Xk ze+gn&G;<4O1ZSB0(g4h7nNQEc z%mro$E&UgnA5=mA67w0wff39%DYcDcc2VIbiYcH)ESi}@UAfClo(g(bm@@(a;+XMo z0K_xjpu{hM`6YFd5}7r>!q`>jH?1&sjrrjQfa}bFPhc~N$)UU=+00x?^C5+qv>IEn}{xLeo8FGws6n@e?P|FK4Q$V^G2Tg>vai=8OVZdBE%!fLF!*A4R&= z%v){nTf?;Qhk7mZ4_k=TG2^MlSI@Mig{^_P-nR{E+G|L(H{A9cHfSfW|ZChxuTRFl~MYc+M1NLu8a$ zBL_Cdoc#4~0V3_F_0J zVcn&?q?C2`5Qt?gw^blkv!Z7M)Ue`6vX(V@7DO6Y+uT5GWPSE4h)pc>I;ui7vrdn| zXbbDdSK;>|>)#_7VmqtV5yTGG;#nX*V#S<BWwu$ljY>VSlNSWv3aS5XW9aw=14q)dGhJ>^1a~Pa?bfCcsrTs?B&v+4Ek-m0f3h ztc6|@`?nhKlGzLbDQpW4)n9I~gV$qhscg%4;rAw6K_$F2_QF;ey~S=)fSAtqaD|!M zY?mOI$zV7A3cs1`%nC@}Wv9^!p3SzV+I0^52il|Z*xh%4<+JBJho=IzB_&sd?CUQ9 zirDvQOeJimVPNJ`_IBzVl(9{b0QcCRdzkjqGun08Q*b%7q=)_64S+s&4!z9S z&+cx5(E;{qD$+k;o5|Q9`!+S;p0bb4fZhgzfR6z9S)IA3;fKy)%Y%gaSmB0^h-cbMqa+aBMKn>#P&I3Kj zSxcdLC?}K3>xVeK_W_P_)>9?@7-tO?Zo)VWA7JM=Gihl!&*`SL=mO_|LhvqfgtSv$ z;utprL~wrj0mMko=~93wPQ@UI(VX+i81`k(?C;?A3a2%X^1m3)y?5X#mQ&RXERHkn zCy2&#GIl{Gfs_6{utd<3D}gI;iEA#F;|TY%-@}A8e;^67?Y7;LP|5>Zu$pwOwv< zx~Z;~#`!J~lD9aX)R0Q&?CJxS!;w6L>3q)m$29*6IPR4gR3WF-4%Uh|<$Qo*&dzSg zlyC;O04wF_IJnRs)!>2f*inFr` zqp0B=pwle1oXzxhKpm&e2E2NX99M0&Zs6>_3uYr{9uLeGPTl~(L(V!{E?YUb<^!~G z{BA>|ofA#X$PP|uBRoCg^ic)AlXH;{Qg(47s1e=G@o9l%59bcu=U$E*rRjZ~;Ue(* zIZLtOS`To3rtb6;&e4y7nFl#_*KjdIoUF+h#W2T6U65y-XY}ZfaDu6J_nfmN2G&M7 z^J$eHl)hoR@eJxygnPwtNQfq8Mo1^{nv2R$A> z+4scT!0R(ct zr>1@o_xo`u1anIsK_rBGl!D=d+^;EYKE&PN3vigbZYv~@a1C_XN4dOV5RY-$)aVG~ zo}iOV=eg!l+Ey-bZ!jQpk$Wy0Ad>rsA4UvgciB%+c+8CmhS4tW3koN@xgQ(>v4?w6 z28CYk$GuSRjnqW-;;ATw_vT%H0d-$qAH`~ZyxmlT z_UE;=ffvAwr;6u(-mOU>9^hp(W4wX9q#YodgLuwVy9?%hauC!I-ta=)=YzcFeh?4w zQs{X+%v)#$Pe*t<`e2Uoo>NGFj5nP!iZI>?h2+P10$RLI@aBX9oaFtf1~|=IFN2jc zyf9iA&+;bGF_v?@rIye;&%00#kqc(tnNS$L#9RFes1dv(y0ekI1S(cU@kSg$jOP8a z67FMo=@!6Zd5+YgkK>h51{BZRNM+CjUg>Y}l*n5`2Ys&bex!QBbzXT0^pbd46hS5P zoalH{3NQ33)Khu0>65(4Gbb&CMjG!p)o*U|#;HG*!J9?lN+$0!DO}v)byExZF7L(> zfIQyH4N%DEJ)xkdfH%bwSRt>B;=m%Fo)1vWo3Q}I5?=i^h?Maz$uXFFJiPCXN0zsp zLiuvuA2k3KyesBP$W-#)_ydX$cujO*r-~PV!hm%(?{)?h>v#=R465f@Du6Zc+)c3E z$lFeZz$V^*KabJElcdAiLte8Odab+}24HPG)(61ac{Oxqql5QK5ELHqk~RZ$@{Ur} z@R(OMYKH9|-Z`?}%ZvRBqJ2E|w~*=QX{mZOz_X$D))U^tH!=J{-c4EzhIml{5E^UN@cjc*)!MJ+KL0#15)| z?%{_lfQ&nTl@3e~{$l}vC%>P9CNKU*+H1V|-4wC<@Dr#A<;(BA3!)!?GfjVg{?Csf z8NmNL0@yx2i*~d9{Ih|ua)7_{edq=9=S>1Jh<}-mngsLXXumzkH=$~5whrZo(@uMc zzvd2%9_If}JI@jR#a{u!_^y<99_MeR0O16GZ3RS5^2c8V@f3dpN#+;t!!@PwTj(Ra z!I!XLC6&LGmYtjYG}RNsfE9o2k?-8&;`VHe%iMX>EO?$d+~_B@(<{B z^53DG@Rp!+o=HFf?Ddc`Use`(D({2{04nLLDV2H zf5Ac8#{vYBH(`6PU=y_p_6ag)gScPddj>8J2#WrM=|F+}C5S7$0 z^n6H=vY*bs92U&91oenOMbYe0!8;G(;)Ecu4~i!R;S5+iC8+rZ0}dCIP)p~u;PQOv zpAp1a0y`^sj~2Ldg1n=^&I_hf>T^k8qV+sVFiwrtXu)@s+g%oXLk9}42#RR+i4i<2 zrthDK6+}=$Ax_{#U*!`oP_KcR1VIp$9uftelpkCbd>syOP4JE$#Os2BCSXZ|cblP? zEVz3ULrW2OQ{Cr=K=V65s^B9E5N-;7rZz&F;7bpHTY@PxvFZ1n1^} z*Cyzr^s!wKaTp>Ug165BJQCE<0iRBRC>nkr3nu8RExH8eFaHO$Tkt)_RXqX~EzG@w zmA!D-C%BgnGyQ_mtKba?ggk&Jf(+X42L;7`a5yZOJp{>T0vC#zMg%h{_kS*!MFGaB zz?}CSnBlN!k;4Zvuu7DX2;UW!yr?86pJYK@C2w3wL9w>*5 zpYR>35bYH%rdVR1(Bcft>=&kg1IYuzcj>@(pfK$Lh8-kq`V4-9g>k9ig$QRhK=Po_ zV;exI(4QWiL&CD%7}H_l`-frdi16-oilUDS{b#|JW^xvsJVKbtG;R+!{%7m}e8g@_kCROR~ z3&krTQZAI!^fgxqcU^*LrSOb9zyo2-28^Og=-vxvwJ?$nuGI-Yrb=GD@a<~=4MMv* z5F3St9WdG?TuIaSp>Wz|=(P&3)92GB91jMsU6@1#wGQElx50ZPtfK&~Q@Dm&Igf>o zlmT^_g-ZrO?G|>v35_0MbS|j9!a1~?4hRRQf%sH7i7K>1!s2+C85Rc834v$A-OFKS zMEDC1(ON$jF5U)(QQ>0x(S-oz?cq;=KKxf5z$-brGQ68 z)2PmMOf>I9U}2(n>Fu85q9j@{PKZuW5`9u+I0A>KME6g@Ot{GB8m{-WXjVRWXG9lh z5jiVbW`$9l6PYPGJ1^QseYgvv^O+F2C>o_vToSoZZ8So3eiL|+qB~nD|BDhaDSwO> zo%jPrFN38G5OrXJ3MNOY|D0_vxZt)LXbMIzEa^$`E-i0x?r`>^SXzcSR0ALo{2o{B_9W zh)!+?$QA9q3(-8$h9HO*iT+s#VzDTY_WKeMe-xlp)GC8snP{mBlI5bgPvEygG(y{N zrD!cJ_76l;DE6rmB~TPwEqXiwP%9G9K2j(82kC{`x?Z$2AGRArPid!a6nU1yT9Zh6 z6qnsB+Dh*Xw20pN9N?j7lQ$IGL^C%-p=*mf193oH z_Fw%)TuKRJkT{&?U$EFhNzc02{1qe*igPLJ4i#^T1UMvi&4jVT;=-x$bVMwp6!ECI zmnyW!#DZ!^KK!2b>mvPdnxr@v1EF z&WhcR!u>h16V+eNi!ab=-3#KmQeY9{25K55iZ>pD!b^U5fa~ zTL3r2E6pB|Nfmq2fNzQy`e86>;IQq3SwyqLP5`QkzfI19x69v~KqE0IlNPw3)Ywbvt0DUA%2EjCP1$*@jU(5}&4!uTwlH86uCxZ+{D{OT3F} zQQhJ@+d%9QSI!0K70-4AuTLCbg%S3PH+>1e1LB3pKzt%z9#8epLGeRc5}%3}tOs*Q z{QE0V92Te2+Wk!Yb^(YZViuKOpNsFDg8NbNHCi9X#5R=pjf;oB19%};^uzs2@m8uJ zOo$&5Z;xay)hgU2-@FaXL$ZAXYq;SVPI8A5?DLX;sN{b^vVv;g7bRb30J|hv zNCSsKTjsN@(UnNLR=VkL{|#g;fpryq#% zl0Rbs5+qaK#kdnC8hW6vN*=3$U6V+Egzf8+O)`iiNjfF4nJoEq4X_l+pGN_1NH$M` z%~VO$7!+lDFmqG)d0W)731wb{jTZB-<(ceJJth zq55a5&v7|Hxye`Q>3V*vLUhja| zBl(+-QuIoS>8Ny{WS$+Y^h?CFN)Jdh)Z2R^*+VJUpk$L3h)*S+>A;30ue?G1_hHE< zioTyo)_x9aBa%2hu;-GQk03fK38Px_m}JTV@Wv&P7T~>*L|ee&OGz5V)Dx0_x8R!g zNY|_Z<}Tf50MA1@Mx7*Y>G3QOeWWL;RN^aLZ3&*Aw95$0UwW0QR^|X{`6JlgFWs;l z%mdOB>!1-RJ-#2r5b5M6aClI9nCj}G(i*CG9+Iwz0XQsODgZblokBP0sPub!P34&M zRtkt=QeHib9hbi3!O98gZ#yA!QYxcE9;c+54?ql;dWQp?HcOK;A$mr-h~5T1E3KkZ z*g5GsiV)6AH_$Y`Al)?qa8df%2sAE9GiiN{koM6Q87bX88N?{5;VY;|OC9KAx-7ku z2XIB|{uV|bBmGDWELOUSx(RX8oeQ8IFZEsxVuIBC7lrMKQb&5#;i~i~7tCu?+ZP~S zm&VX;nj|fMfE$%8ouH$dp_e8#P~q~H^kW8y>C&(N z2JyBu{Va$X(iSQ7GNs;Kz_O&@QF?zzT4X*Aqj#mxX#35UDt-nvNBS8H`nl3;bOIz# zy15)!zEoX|;TK3V??R+dYAAuVBB}RlAQnsCrAMzsTKE@urP5=$AeKoVv;y3dzC{n| zeW~wq@XDp9skvPt-AkEBm2@ze_P=WBLkiDoq&E@3TGvW_%)siTsi(lJmku1q&>E!g z`a`i%x{&T{ll19a5Syhzl&`i(UH%8+L+K$ZD6~qm(*W9};gmVGOLtPOqC@(S>P(NM zdtZm?PN|q4oyXFEg;f9SlCEZh*)5gOt?7~KsY2W&(m5tbj!122(R?mlFbLkLG;|5Tn6!t= z~ zF$c;PGQbRyU8TZluxC6T;8+QYCUDlWkPf4=>UNTLVeL)%f$0L-uH7IO%Fen2E0U#~yKynaGW(@KOJu9*o|MWQ z_CTXd7D#2^don(CU+&8!vw)S$^z8r@vXodjtdvFh!`cJcd+Q)lB^#g^qE=QK0FgRb zV>Ed6vW`OV8f5F|fY&JdjY{dyJeTjeUEIw0iaiQlZ^GrLW*I! zU$$sHumRZunp;m~Z4q!gC_Dd*;?JkDZV_(jknAMAF*q#qFNW>sGR;$HjLItLMvcj~ z(tCI>WgCA5HX)PH4zNf5Aq5fc^1o>H@sLN-VMk9np9?Eqa=|QM-twOl;m}8Z*#ela z{32BX{N(Nb0{F`tkvyBN1LQ4K@YyR@kK-!#$yd--?3WKG13Ms}n+PmW&WgmCg5)(< z0fOZW89<2KpMv2-@&USehvgcYBS+)|tDtvO{>^b<$K*?_AQC2ja}eV_E}!`uh$rOB zD5pFrAEJ3+J|&m;!CJU{AP+L9<-K1(=8W8#3Tx-(ZWKFRkpJ{5G%m{bQ7P<_{5Dmz zBjl2EAV$h()q@x%AELxOTJCKP?6Q1x5^P_QCkkLXMn35RY{tsJr1pKB+_?nAc=_yg zz!J=I(>gE{<;heIy(&LW>Gn0bkpXaB-WLp`Npg2;yClmiKL;^IzJmHDH{@@90{5x% z{3wXrlvmTPlqL_o2i`3?Rt?M_c|;EsZp&4)i)P4eOmLJbzeCwkmi#B0jd$eceo7AS z%I%R0SZB+%bc!HH&RGv@xpE2hLi6NdRCdaj7x_WIK>mmeqlI$cnE*v{7Xi!^%TvAv zD3M#P1t^vGQi-NaUOtXd+>@`Ry>gBYGJW!g zZ$hJAUi<;94aiIATlSvFqmO|%BoAB(Ff8X&V(?7<5fybtMKBYfXsm?(UPXc(ME5B) zbfJNYTO-g2Qsh4b2v#UXuokND_XqEg!kO~q!-`8}^q4|RE9!a0dFokRQan8jkqAXs zH9(|d4oOBSx_^L&XocPga9Pof$iQrUMUg3hOpGG#CT>lv0#h4LsltiU^>~Hz2^dXK z9N3NlCn~N7K=P^rzwd>IR3V^n|GHvbC9ovLS3v;D3SSDOQWVbKP`IJ^mkO?_ig{EM zx~Yh&0G6hxqcX}Z#r5M*H>WFNXm`4;7(55t843Zl|1%Wf0MBE{oUSSeN*)@`BO$Ao3n7a$0K~c(uu|`EkI6O5e{-PE|v%-a*z!t^jeDEGBUfl#Mt%`S6 z1GFj33$B9Mt|-w$qeG!efy^Vtq=m57sTlbN*keTyCH6gvjoBDsuY$pXLZ8CvHn4uh z?CluEfMOD*Tu&6MUV+}AB8QgXrwX5+Kpavy9fp-*MFsUeo+-SkkT9Zf@r0G#{{{9^;r9-(35CHOl6#cdE->n@#IKs+c~*MTTW+4p z=`_>5l$Mk`cq>zB#`q}H`a$$nPTvSm0m>)TKHRHp+W<%Vls!7|0+sCz)PE0B8mZTn ze4bI3Q6c@T@(pTfo>N}?9j4DKKd^(93(Aj$02h_B+cB6+O1l7>e-X-c|3E)dx#KxB zqLdj_#f?^mw!!vgFH!W} zs(kes^xBkziEz}eeAflM4&~CP@b}29ETCprr?UJ2(8o%PPcZH-rAq-syOsa`ivjm2 z_wNVRuM~wsWI(x;lFBE_n$Lj^D#I!1f2!<5E^R%ed`Ag|VP({(;5}1bp(CavN{=$| zo+~Ss!O^I)mg*Q|%43wX>`|E;Xg_jSRd0cehw9(~T!p9VLk*aIs!de*^j9U)0vDi~ zLe-ePDr;(_1*vijz=BmB!??5%)eCCS98^8!!PrsN7gUHpruvs6^Dvdt0tzQp-wZ+I zl3bHFG|&bE?-UA3Cp!i37Nx`p_M`iz=57VeOJC z{xU#>YJ3xjS5&XR2P{T4MFAJFs?{ID=v9@C47_Wq*~>w^uJXQvD@#?4Q9=8rDl7yb zO*L2wkg0lOnDW0Y)ikQM-BGzyBRfa6g1T$Ds?N_Llc#$1G>G}C;+p^kDuilSSXH`J z;1#JZbO9??Eq)UUC90S6K`d2mqwY(YY7N!C@2Sqx>hnN#bP_yNsV3bAs8-oiX563> zzE1DIH>y6T8g`S4{|iLhRDLC3wySbqfzb|?)pr2hs?<7MXpd?$t*^bRIrQibsG8pf zc%nK$Rn0+F@JTp)s>)af7elHEIz2wDigbnEGnIJ{^hQ+Nbcj4xwep}as)|O*9q+%Z zMxDVNSA9ZL#$DYu88RN~g<tA!LxA5p(bH~*;m_xk`R)DC~a=1KKL2SiS(?Kl`(xH=~QLo=UNf8hw~8TByj zac9*lsGx98y;uS>=hZvD0d_$>av0#E`t(U?TvGQ@surRCTLkx!>P;1}9i?t70~W2G zn+B1~>NE7&T~W`cg)K(?oQ{RWszXu$;?#RSg!_2)G@5A%X7&DH_`R;)t$=8fns*k= zWc4~{j44IEn6lp+>SqiXO;xYxg8of)z)nbJt1r;0vOIN;6Nvfh<)I)JsLvFGSg77c zhokXrrHeo;R)0nAOVk5Y3occ=QmR&__N3C?J+=87g;4j^)3f2CT)p-TK!v*02FyzJ zI0YCF)LT^m)oR-SDAuTJD7>mwS1p3kI(6y`NY<+dDU57Xm#+k|NxhKr)n@g?J{Wtb z-trfSt?Cn08E#V_r|7v|y_?$E9qJ|KD7b&D-bX=vmpYnufNu2=)!cj4Ts$Aved-r< zptxUsn@*(+sFU6X?}=JOVcnp*_bIR;_0$ExhSgD&Z9G%^{|#(Z{SV3u)?@0e=b<;Q zzDMEF3-y72VDqJVG3AsK>VF1lopjgaJcNdarj$xzo|*;Nq(?NlWkEU-E z%=l^QC@1yTxZ8plpoxkGwojv?g3W%--_7TktDqbJeOwdvorYW8da9k7r5TYkEr)EO&q-HUF z-~K6$GX>h=n%i{O&T2C0DLJQkn|6TnnkX;mUC?|_-;;V#GliNrmo!T`7)*plMCo#* zChKR|jMC)1LFZqhHO^GlzpSx(8{mp2sTMLZniZbFVl}Ow1B=tF-vSV?k<aJJh}{UP4jRvh}SiH-vCI`e6<%KS#x^?dMTPfTF7r`wq?U+s>YGJR5vx; zK8)9#rs?Pa^_IqsKG<~4c^^=3Yn}_Bn4uY=ATd)DtOYSkGe%vXJDU4$uy$87gKB=c z8u2+0^E9p0u+P_24nmAE?mm*$s_KP4a2*9%z1915l;;dM27^IA9Z+V44+sv|FBm=%HOR9eSSH0~D)yX=QYL##=kz7a~5|-@RbW zS9{?@IP}+kz8P46_6+r6_G+7d2H2-fq*Q#rHggrtzXRIK*I_0|`ztLb!P?5NVJ$>^ zoO+U>+K)E?JEV190_?EXht`WD+EssocvQQTy5eElQUTPDYke;OoY0CXQ9Y^sj%L#- zt&X;_aP52p6wYW(6l9&%%1Qm4*5MT^%)j&6tSpFL&<=)xc~RT^2Q(tI1;2n8sonn) zqEXtfX|ssYuBEqCVzsZ?VEA#`FQ^C{ulvIOyZfo5yLNQZ& zi8k{rZPZc_?`VItgYCQ8QyT%Ywf&*c%h3vG@ypdR=+P z0Ah_cXgNTw_7R26b=upsFxG4Lbc5KaZKv-bXwu$7Xl>oB?Q{irsC|!$4XxUO=Wx`f zopTtH?OJQPGaY8FU@J5_wF=7W9&24@VNhM#S9b&J)=r_lu}2$0W9rq4C?4zA9`6Gf z(1yJN;uCEXWvGMN`E(@csn(lHjzd}#RYRX?n`w@WXdk={@Lcr7Nj}hPO_&5~4mjTl!HKU!8!KD?i;I#Pip6 z)nOESbw4fwZ=Wu(2-tp|7abx$pnILtu|OSulo3z0u4)Ug5S<6b_Xl z^^oq3WLP__8`VSch;Gj?m|?mvXxTchYo;*ggf4)l=t-S^0FtM48wy}1T&I}@?6j^; z1>PB*q!&Xwt2<8x$aA{4_rvdbT|M=)F6c(*!^%b7@gYcF(rKt^8=<@NKFz;Ko%ioh zjM6RV!)Uawy$3Rvb#rJ}yQ1sFE@2&`bD)}TtnP9R%*5#?>43%S)-Hiwg6?%X1(2w7 zY6NywH>!rnHC@IqtX$X4qDnxLF2Vx}$-0Aw0aA1}v}oSY&Gx7BXQ?{>=b+xy{Yv9b z)6Js$bz5i1giMAm%K>*bQ}@;(5bx@Wsji-_yGa3hjxLr8a``%&$p8hqTN>~RbsxM6 zhb6iJN`y*vYWjT2bU)C`J>|Nkt>9JYZmNM*>b4>7G+S5ePEk9(Mpt5jXszzmKOxhg zW3R)VZPeM*ZrY^treN!#uKERdt-8#Aq2H$Sqy)QNH_#4Vhpyu|h>vuasJ`8)dqh=+ z$2tpo1*Th9OY2*YZYDj|y*i8cpwOpVH5roTeq9I^UIujIbo%v)E^G&|L0!oRz_9KH zO^0VX8`|hcbZ^trKc=gqiy7Co(U@N7PQMB4rOuKDGofpth-8o6OnqT@{bs5Jc8H1$cCEkOPz5YN@8=9pd-cCj$hS}b{RBk! z>km%?@qj*6jG+bUPc8)r($D%8BEkCftuPv*4>|#GP=A>kaH0D4Y2Y2!XV7zeM6dc0 z#G`t@d${al`XXAq!t~~_7BG+Nuh71GLSGOLqbK$L^f{f<`$&O>>tlDreT?2|0vfUU zZ0fPc>3?m))yM129^fVDr>BCKsE?*M0Iuq}l-ym@zxx0p*Yywo!kCiuOXtB@vfic~ z#1#F?w;^&vpJJwZMykG*5}KQO92CG4sE>{W@s@u58W7X35 zp+5B>&9Nf=mvq3WSpN?dd`k2mQOmqk|9CBUWqK_w2KV#>8^F7-PZq*cx&C$fNtz1% zSKY8ysbAj+;sbrX99Wh9U^B34eJdqyHTvUA;I~$_o1Fq4)?8k!)L(S^nH3rw(Bo`24aWaDHGNn>3^V= zxKn?WBGt$G5Gq=C>4Rwl>DKS0Hc^lM3o4lQ>VKkDwoe~Ri(kL~+cJtj2lO{6tb3xD zXh9v+cRhu*r~2Eop*Wm=Xspz_6ei4)+=+CZMp-P-24qe#5#VU=AJ794WLQY0 z&S1meR2>X4)Jy|*(9lGgSEzwOanT`zyBn~>W>t;RxOQV}_-)(}o!; zZDI7d;nofCP8f7lcRguXOozHp87w)F3^(*pEPmRMOKI;JLk7jIXAPCKTAnk^-v-`! zgY+oC1p_|@#x5Fup>^t#p*9Uzgu%RxmXAn7B{j673<309MH@c40sYH{Z{NbzUoo8B z4PK04=@{I{8Z0TWi8Ji*0Ejn4d4QK-NTWzM(GWr>nXVdk=wLI+kUJG1*>I}>k|~DK zFkm+fZo2?d4a)yP;if@veiIsLh9Bt3zh%ht1(t5OL(P!ehR;3)$S^#jK5eGK@il-f zLmqv;cMShfJa^adrZw(UwxRqnK#pNCg%r7lNGU*`;R%_}H~hXGo(c@pj)7Qc7^atj ziwt`fLcQ3KIoFKqEiwH364X+|5~}%?8EP&;^qyf2ZAbSFTWOsuH`pA6NQI$I4PvEX zaSXr%gB4{WRR%Scu&WIZD5kD4Ecg;wt)W{E_jQH^$?#Nfm_${&2E)(A;58b0wUBHw zu!pGr(rn0m1cxn#SSnjRG_0oc3ay4NUpQM#V-ba-T_O@~OQ;p8i@ z_SoRn3tpFD2`v=ehM(!&OpoEsNVxAcRNsbVpW);KfPRC4I_3k0Z8i{jV)$tEzw>7X zJF4(LHN4dgjUhukjWpsKYX57^6DMxFL{(fxa*d&_49iprqt` z!VvxsYzGESw_ zKgq`FTzE<`Zl?wAhH*Kih^fXeCv7Socw~eho0Lw5M zWDv?7EHN6H&?_}wq-3_tShNkid&Uq-r|uhzB;b`BM@X{5 z_>w-!N@FK2-4Bf4XF{RMxIu0Pwc2=W5vVoB2Q%QJ)_AxYigm`H3IOVjH|-(XU_2g$ zo6u;q$OLFI4&DT>**Kk!>$Mm!-+|skW4Q{Ft;TaJ!D};)P%Qq)n0pbXJB@|b;5|0} zNuP3;@w*imXt(k27&?E}V+^E6zSsD}Wq>~8@=h4-H+Iqu9xy&NL-C2RkHVBeV>E4? zPmKm@zzrF#KL>Hx_?&wC&y4jqAvt2~r*!JM@rV$-QRA7pz{ZUA6c>#fZJ)#M3*&xg zD7-XUESQA-Z^F1H3DiBNNA!N0yUF$sD0-OA%meT=O`_hum#HWfBHpG+?eObklD&jA zU(=f& zY4Z`&)=?-PHN8SL=rg9q-+-Mp8UKdpInyLM5_{gnmEc}nFn!sBg;5F-XL|E>c!)Q3(Mg#E({!4YiDuKa z>0n+n?GS-_-DIX0S(8k^MgzNHYNgLG)l^3PnwzFyD9TDR{rVL~c*_*s4_>-y3dISx zO;f4XkzqQAV!w5!X=E)#vP^|7z_LwK&H?0@KI#X^H967dlxO;k0r&YP^DKI13rx)^ zuw7`fIfwgIZ1SdUzr-|c6=X_HWjlbCnNA#m|PPTIUA8ji#R{`tCLL$AH&oa*l!NC#I$51Tcq8IT|oWOi8qQ zjhQYRq3Gr6xf`|vTt7YuEXcLK2)s~Nj{{IV>UxqI4<}r8bnZLc_2=2(opm+L1i0vG zwHpeNuI~F`^Rnw#K>!J^{0SIKa=rT(^lrLZe-6oX*MrY#{$;xEp_`EHTJsld=ef$M z?_cO@e-T5gb4`!{G`l*}n?r4`^_1g1c6~nq3caq$YoIXbnp^~t5!W?z&h~|?BUN!c z+&-lr>+y3-3xkLKZr@O=AjB;QA)oajx34FlaMbOyaH_wYa2uu?%^9~ODo9*#OQG#7 z%FUPRMzL;dPr_lMn=d^c$!@pifS2Z0Mir(Ew{NLWde`m7Jm}@Ry-!`P0yig`c(raj zr$e&Nt;!lA^=>uvlr*>{Qm?Dg?I%BgCb#Jw6n{3mm1IG`#qCR)GHq^^AA{NMcKBmx zbhu^E(*MXUl}=K1x>eFCsmE@s=wa(}TZrsxk~RKawb(|@usari905Pu;*^mFWbyrG z_|CToECjL8qLBiKVvAsF+?G-cZ;J8DEv}fqfMSD%&soSkvN*LI)F&2dN<4-vW({B@ zBNmswu=#&CtSLX@54i(<=88ByWR$xy;6n8-?S1MAda!4QZ^i#_scAcT`yGmK=S(if z-*d;J@c;kDsQWxGha~57--E9Cos;yezx!!6L>K%;8N_==TK5;S<3V54LOapo2sZwI zKbLaL5B6UL{lkYZAipHxEBw8*M}fbWCGlWxx%&qEz2ei?ApcP!Rex3nQ>*LaRVko+ za+)5uRYqEpSDR>|`PA%cfY4{RsGjioO}f4>{-Cw)%V9tKzh*1#YikSQ@b_2$9)Zl) zp427!Ce9Z0Z%^gJ==c15(0}NqbARi4s71McN*}lzoW8{WKYrTXEJ-{KN64_KU`QyhU7-}-_WWWlFb5kf3N zDU>{9aql#Iov@fmhigw+oKypZTSVP}yVDl?XbzmQ_(B7>XD#Z4kUVE`;W5Aki@6B^ z7cJT-(79x`*hF6}5n&NQ(>v0_h3d#r7OWg#(H5_~1?;j##8nu*V(};K)d?2MD49vL zc$yE8Z1EbMJxj3&PlnM{3#*^t@TSG(k3h__I6&3P`xfgyhlg?tXL_Bn)8bF+fsa_& zHpAwqg*j~oJb7CNz73|2d1NcVQOjB?KqXtg`we(0mP52)-mv_^8w#nG_YMKOY00?&ku=Lip%A%c zxz0>MLb|0tr8c)MgQ#?yVd+chN2cXx72suA?x1k|j^$2z2<}==qh}Q#z>3#`&V04TKjiX!$Rs|$IsS!`9jh4Swb ztMM%8ms)Kp1t_yRMK}MRmHq?p?prNifKilNHB)`E!s>rd0V=H$qoDu5>Qf5hs;pvL z0IIEGz5=MRnw*9a)>`Q)D5D~vw28ovWxmsP-N z5WB6mjY6cyDr^d{UMs^D@cOI<==epy)vF6Z9Iz^(Wa5dH-wHbaH)u7V1@x)aJA1$! zvKpbBbJ(i;D$G2y%AwgiVs$7TyysS%V=$&sD|H}l$(U8V64hf7b%~On$l<)_f-~ z-wA!c$@l4yf&b)MT7?59f9(jccXEdeVBh3Csxj}M{1@#SA(QvhgM4suQ6bdtPJU+v zh}n}hv~J`~-nY$p z`*w%N~t z4ccy}Y+%SXF%pu)wgTM!Bel>7va9?ML%V2qnEHE{ z?CLULJHoE!3?w7%HunRIvg>#Rk!ZUqT8!zk-F#XFuGkIHIg=Q>#j640?S6OxzX^8l zQLQJ@Zj=KLSMAEEpJBdkr=*=H$xh!0Ysq%{RA4D~o#X8;NIKT&Be(SDT?lGp4FRJ^!u zUuc$snr#1+its7+C3M+k_8ZiAyH`|vGr+iV{tr3QJ6 z{hQMP9@@Xff=sLZI31d4vp;AFtlhqvz7?RuUP06Fk^Sno!0WVc-UEfl_J!1W>9U_s z_oCZ=oW54S$DVZsdcF1=Hh|Y}KW7-&fPE*WtWWG0oCI;u-ZdB4Q+xGYI{!ChzqcPU z!}f1Az{NBB&8Yw*_V*V+bkzP2>Q;=|-=)WL+fz4@xPw~hx+>d4&sea z3~+cxef_--#=DR?;NVC_#6Sn`J%B`qFMQ$YszVdKU3JqTr3?yb4lAaDcgvxA7i_0H z#LxlD36o}n%=-CLHcO8PR0Lyl0K8?ZTIJ_SY%$(<-;{xV8Fe%0?a2RL? zD0H}ZA2P)b-#G!4I(WCiTA4!@h2C`z4pzYG9WJH=G&($?Y24(1jR~KR1D|HqfW!TT z08bp8D6<)KNTLG8Q-^!>?%t5Y#rYWTutVJ`5TBVH{+$PhBMyUK;wC(IQ0u`Qb&%4! z;pO;`CG@==Z_|NLAID|1E%-WKr$T|B<406o@^@Uj3s`{TA}UPob>ve*u-~!d2M`Z9 zt{Q`}K*tyRKn!wxJ|F7AjscVjgg7p<132ht?xnmm)G^B$`iC69p_<@f$E@$*@QC9U zN+6CoCQZR$!W`eE2jaM6r~}NLaLl6fs3#rg(_IU9{D*o6XB=n#3cYiVVd)^AcbxeE zrY|^_P|fC&yEOo0a6^F&^nds_%_|dn~v6$Wu`f1JAik~(f=9-n(p|W8%A;4(KP}i%yazq zCt&%G8z&%A;P}-eV1C_&8hfeO< z;I%qc7DBSa$@np>J#rek1+2%Zr2rzmPCYr$+vD6c0nFX`S5E*B=U06o>FLZHgI_Oa zORA!II}3Y3^l^TU;-MKorMc4$ib2i;dtfctxr0Lb5NAiq^h2Fa7G*lmwT8_s=f_RJ z?l`};5mxRx|4H2fbGCCnMVvX#KU1eS*ZG$K_|0>^a}HR(^L0A+RN(vprGbUcH$tIN z=F_zci3L_X^b+}QHjIH$UQ52(MK6ufLJqJO&%ow5I;|gQU7J4y^ zRT^Ni3kP+-z>*mE2}@?oSVQwK zg<-7%$YS^OfTbADm3*mrcrt_!1$C-mp@@xQVc)Hs9g%|DdWUqfFVW+ zm1c$+Z&$+MGe*%17#m?^Z-V3~gL?pAjB#}qZi#uE@qdJUcUTnH_qWq_*#(UowzI%u zqDGS#HEQe{jhblG#G1rjVu?M8nizFyDpCb3G-=YCbWpm5CW@kfC`u6pL_|eIk@9{{ ze)<0WJ`c~FJ^jq=%)RHFduNFs0kmge7$r@;12-=P=o_fn2Ssbyd`h8gWK$>?x0S6_ zf@mkZ)C$}7GT{vLkI3X^;2o1yry(>4*-<$Zj?3E40&|o}XzkreCS457S*D?_BrdW{ zYGAm^hMa)0GX|NAs#q^sIB9sx>=r@8N4Ac3Oq`SXt$<9348>+Y{NuL{8pOh6pV7|B za9I~Un-MagQ8^ub-H6@r@cXpl?BlSij&C~Ko9@;Eg5?8GV}Ft zn;$3-w&CEKtEf!>q-Erpf)GF!?hs%1Uvfjy9|UI5-h*`Z;;YGlpFsUcV^v!>;? zI@zTl7_FCy9Ra#NT=5k=b$_@#8@%2R&mMpoYtu%$No`FtUcsTgX+kq3kD89(2@wa= z#WpbJZ2Hx6@H|ZyO#tt#sVU9g0j9HP42v=~q0%(f^e~-un(6fIwEs5UbR;c%T`;{) zCF(`ft9poLn2w|*;;LzPJ2di5jlPE8V$;1-5q^p3lPM6nZhE8_yc?!J4~1l@>4;e% z-ZZV$BG6l=$LVG(Gc{2{@3!f0tKi{|>BA)e<)&JC!YfQgc9efsnz}52eyyoLbt>yj zU!4cmX4<+2iZ4uW+QQl^)2&plx0_zP0^V!WVk&()On;mXg-+A&h5*>g-A90DCofzD z1sAz1O((AMkgoyUsEL&@QJ`5s?j@$wQHEfeGeI-#B@ zH>ce$N%E9HM4v4GYz&O0$a8xkk}6m10x!)VPZYs@x_lUQbT7zfr9<(ed~Y2bX2{hS zLClob(*~d{`EJ^Bo-Ln8rFf3~)-_08lHa1id3lRbCtfkS}j&gh+vW z$42l9<+0z&p7orCwd~Y|60T%WY1;eYgDi8xVWs zH@}B|uY8F$K%aazjmy@G<{;R%Q7oe&%~lcm8kn7;o1(W@jQV$&RCJ1A<*4G@ez18= z5lr262Sx9Cn*WX~2KYe3QL%14m`;jO0mQT#M6qS{*XMQ$o&G2ycEh<5WN*S2_X6? zx__kgA74fOVwmw$I1hy4S%u^pFn`5F>T?As`b~gnpkgi!o-l0Dppfc8Kts*+QQDhCL=Py>V z;%A7)DF!BjdR}pwRwv>WPiT!OK{4wvutbILN5GO4V`y7zvcmia5K|OI%?Kt{ahWQ% zG{q)=xKCH)QkHZO|fz+h$V{QwC&@%V&6hwHxyluV60TJfVMH*R8&x+e9NFXJP6D(Ma4iwb6fG} zB7i%J&4sXCu1LNKP@z~%Lt&-jgbLVQh4)&3D#bldSi7fS0|D+UGN_=bR{RhR@Idi= z9&A5UMA0%rjpE%qV6}=<&4{p0F^$^!^@`|)z#b_K>z{zxpg6k^K|NNiZ36X)VlM3n zYgAmNWx^)K=n6P&R;>CJyr+sWMR3@ns1675nL;-glC6paHF(bzqj~_^6d%z$X)hH1 zL*VJ9Vs0I}||%di>ug>;@r{&F@a9aTDhDmV;g1H830@5yv^X*DSPPQ zuvZq-D?~?>>xY7PRJoHztz*iSf%N=2DCg0l$Z=)b6Bu<=zNhsICuNy20(Mr0(<_rM z%ANbcb5(}Y1$I+zmMMZL$_=-m zcSdQy3BXI4SPI~+wEuJBgBYe<_ySnCatLLk5y~N<(2G>=UjY!M zO!ykaXyxoC%0FY2sUARMmCu}@7^gJKgW`GRSW4aEmHYpJMuKw5F%T1#j}#y#DGM?| zOjdqL7a>LYHOWhqBi zK*W%(4BZZ9jjYhYKD*(T7xs=P*Rr+j5!E<6<| zi>Mb|s1&Y1uSgkj0t&^-0fQiUP5CFK-6hJ0<=|ac-l5X+hO*QN#8PE_KZx8kC^cHZ zTguoQ@8g>tAR{8lR4;-G(5*+-*omGWFEMD8h* z=sn2$N~5a))ykBm@bo|#w*kRCR65KAu|{b}`$=n+HPmaUQFM>GL4+OnH|2>aEJ< z6w`BMK_7^1N(E&NFOR~T{tJCs-UK=F+-pDM;q zr6aZXj;Ypk0&`FWUIRF;3Z`+xQT3RfbSKrp2LR5hxfGL&Dv@RYSCvE!;HK)P6^9e5 zXEf!wtA6+cL=ROmHC#PacZz_WRBcTHIHl^$GJtwoC7ecxXH;&M0A8wPwA|yZx=kBQ zd{m>UKkchJScM4vRF<^FcviKV>OX(gZOZHeRO_g#5~x~X2azCE73EyPsu0@wdQNq1 z6oLs+1$_X?P}SrYkPK5zr=l)gHE%7gKSZcx)Sie`^;-;Pln>QBq+ zu_{G7K%DBR1lG>0PSKnmuaeP#oS>RONm`=n3EetLs^`>`O;$xxuRcXpVGfa0)fCD| z(o{ZOAf~Hs{R5E;s$c%3=kKCwDcvm@D*ZixOcg^Tah9t1DKxTG!>C%xQB9{?H&?a$ zD}-|=mCmV zrQR@oO=aQ)bwi2DmTIl*Dz~iwH&nCBAycXnXz;wLN~1aMmdcYxuQHX%Hu$}*T20%; z?x=pGtwQChtep_4P-Q%X(Mr{tcZmM3>Q4+U_!l|zq_A>Nb&z(3+*eJx1Y))718OTg zP?gbY&%SUG^9I;lhH9W-ZkqbH2Hs7+J=uIffwA8}JhI70G- zI$%05clEiMz&zCbUeL4QsqUq0@TB@rH&9Qhb=1Z z5Pj4SRs!=?|5gj0pW0(Nh-cM{D-gZE`ZG#G1JvW)00Pz7v>qFz{*{)vgVk?71o51D zls~W#b>#|5Eko7&s5lD4|7wAmaP>&4=OfgybQY0n4_cRvQjdv(r)c&0QeZJ^$Lmmt zReMnSDI*HPn zVzt9>2p%UJ*=>fh*vy6b8~1h5-wix7yEsxxkbcvF4tFuWK%o z-U*GE$^v&y?OmLpho;~r)IBxJ>2K-o&9}KA25E+Mz)G-Y|7u8{ z(|k|O^$?BK8Gukt!Cer;Gz%ze4c8RRi1Y*2~?ZBxeXwqo}Ow>%Ep*~5|cNdb$nljofl%jd}5LQw( zcWA^;(@bmwmag$cQxX5rr%XYu&5N2*0Wg}OX{8w>Q?oz^#VpPKuVF1)b7urZb2Ndp z*qW>PWCJAgG*_oV#_f#!$LVY5)C)WLEtql2|anqm&T2F=G_u=ZH9dp#7M zXf|j88a2QAgV&@{`2jR*3Kh_Ms+qS3R$4SorU1`0-T@%CYKo5md#)MW0MMp!nhRqu z44RTgz?YiCl?eZp=I0oQwrfUFqWW5Mr3IoLnmBs?-e~qtg=DA3Yb>z0nonkf_fGTO zBY-Z=!HwX(*BDI()~$KA9_l@sAuhmrHGk3D4SkwI%EYa;YTEEAy7Fb(ewlD_TU)Xa#5-Cs4JPH<&!{4< z&>A%YRBAox$+@dNO1vuVDq4WLr#)l|+xN9!knL)%#UBuPpnXOe^+T=0TS(SuSEzv1 zY8MRvsMFrM0|i69cGyC|N7_dZ02;LWs8jM-`-vGeo@nhyz;>fHgl^U*?M>?5G;5zK zKzyqG)fAE~+V(dfKGW`|BEMDp3l%=kwFfCNZqxb|L*#|F_5+xHsa-+2)+=pWI3(M( zWp8o1uMOIDv>U8LTf7fJz0v+YA6Tb$!8b7TR*M7<&zSbBFJPui8%cT5d+j0_^t-jg zN5MspHaZ%_UahhipijHB77Es84+a9*m^oARXlpj>Elk^)xlt7MX70m5JYv>T2%AUE z3}fgUJ!Tek089t7`Vc4{H*-*d>1d{k1#mJuNLR+$YzHlVxR{-L4iQ(g^c^6&ndOB; z{e+o}1`2nx*qC~X3otXM)Hu*=>5uRmWL8JJKZDIY zW<&3sSrxU5Ld-sM05Q}|Prb4*vlmnpg_|uM3u1&>1MMA%G!v+th%)o?r`Afe*#jkl ziZNS3*+Z;Z9BrJ8Gh0^;{qttO)9@Z|c8MDA31(Fn0TRthXnagEyR{4;*=%D56jIE7 zY6maXZ2Awt(#!(q!gRXX%HLr6f>|34-51RUUj~+8)CCDk~mbWIHaXLLoa0N%QUC-l?)KDswEVB1gk!M`nj-4ZG= z{dLB+IGF(5&r}))>Q+f`)q`{mu}}=w9UTslbGmyph=u5Wc@8X0_tgh*7_Qqg843|P zJuN~+>AHAWiPm{h9v7pV_$?G-bxU4@7pJ>NThtBbb!X_th}S(F3^YOan0AFE>WcCK zl5`_>K`~ipPA}r7=+qbBB2|}hA0SQFvlbv-XYnm~7jz}GvVT!`n0^E+L$|RNHZygb zsTGu^yW$3sY~3z7L~?Xr=Ye=tH;DsQXwV%YSfqPFiwVU#i4_#D>B856SfbMmhvIeJ zwb#II=xV43RH_?6o#0!#TAF#vbj?)J-qyXP2HYK83=P5MI&b=I#R^@sHEdSuhFu5o zuI@}JB&&2yIZ(f+Q^^7D>kP3}YgOx*6L9fB$D9IqsEedAutvAyFoLPorPFL$rxWPz zuGc-L2Erp<5Us^G=sp<-@K|^JHYA_uWVDy2QI|x^$xS-j=a6jH`O$3nRJYm-ycXTq zX^?!TJ75EmR$ZKdR_LGWE<6RbO?P7=G+yY^=79N1S44MNyDsxMB7CiTMZ3N`bT#zA zzR_(k0kKnelv?#~bumSde5Xs;g9y8H(=P&huXFwflHI!P%OKLDTTLC3UfmQL-}-bH zX#%k}Pb;D4&&Iq)1FEe#lLcUJEI?WiX1SMlXI%4xRk3IcnG)_6$f zSnQ+BFV|x7W`OG!<3j;%T7)ZM?6$?Z4k%PuxY|Lo%HjmwWDhNL8^Nowus8&wq1NKZ zez09{Kk1e84!{`%>R+^O>Ehc>gg(iz-97LKec9_A% zQ;V6a09q^>C>3e7C?}iGEe5^^=&|@h4A5&~PR&yr%Pq9U#MbipSP<rRAXM@O#&C5iOimS>9X=+xIMIyae&SWx{BHYRgUZP(HNGj|Hf)TtPWR zon^^DU{5VazJ#$B%jkzN_RMlFC9JKM4{TuNx#d5!lG0|`nhWfOrC~kY5ic!u2s*} zZ@n@eJp8wUkMX7Z>dVV;qJH`cDz*Ie#H_^n5th`52I=N?2GW5t`BH~wF~+<+PRUTx7rQAnfggyP{`763Ixd3n^QfL zqmQF&n5(}-Ls_1FQv|?e{U>z*SM)<~!Sq%A_azimzW(|r00nxREKm#e))!#3NFUxG z;TP*2-Qd1Nzup8Q*Y%FO;r@pHc?^i9`p>=v@ut3*b}-%2r_mi)rnjKYjkooY!2sp@ zvHfAJLcg6B!|&=}eFkEcUVak9I{oN5)PJeh8w>E;pr891Mjz`B(FV6h{SnILoAnnd zZ+@!RP!7|gk1v48Gky7bfL8tKYtVbH@9zg|ZTitPCcMz+(w@wh`fLfnEB)WJH>6!Z zh+3kr^{c2i^G08F0iaJmXgbY*)>gCq5SxuvY5`o>T2FcWT- zH@_cb@Hg~2{Tj(9Vbm`h{xPj%+cEkvI178m?GFl=`Kc1vQO4~I#m!VchZzSZl4h>s zjJg{lj?5Hy@C;5&Au2GDFB3tVCQ_J^C@7{f#WbR)G1d%->C7bhW-c&3G~irhLe4-W zgV{wjbtd!L5m**el>=Tj^9{XQnZqn(0CE|bH9#H{LmL7wF-gvFf0@zm!^vD>j!uK# zH3PHg0^3j2$jrKk^Rj2n_kekXeP#@Blnt2zjbm&tb;can2>Qji>{dNPOxtDaJsWrg%I&z-;WUW!+YzWGztAgcUZ%x z=tzi;a;b;FbmH8jxqc#dE{G=O)7+u}nDOOmPScl(zlqnA5y+Hx4){E6&rukke$xRW zGg7vKzWgcqSu^@ELfDqR4DmJy*KCLlnC|2*q)~bR^Axe`h|1@;`%jK-88g zqssCK^B1*Sk1`uw;o}%{mpVeO%m`{3xH11wUf|AD(9R!EX81c`rL}O@<<8baJ&bcY z4PH1mS`K17cclg*37m`JTfjtaD0M26xTaqLGPzP(;LhR>(cF^F*>9w?=gi(Brb4cZ zQja2T+)S7$=5h#JC$Q>?}x=rPrAGPQ!xDn-a5xDjmh}`93Xd$GETS9g5J#I1; z;`h0pIO<p$?ci%a5e4xX^HtX}6(RFLI$Si zyb+C`PxViy$eyy#ccQkDQ0x+or}65&NTP#Gw}@Q~&?DMD6agO-A0G_`2k}jMo$|QY zG!l|d;@LJ3aTYI0hZPs`ixY_AjM)7Fh+blw4*|Tzu?5ic6>r{;VEn|7>1H`A?rfm` zL$tW$9Asj|cC>RSRxF(lGjZZYroiIGA&=l9L2OwBVxo9jGO#4^ng%H3iO)}lnM>kt zXgTV#czrvtE8>|G;XYq{)eE3Nym}4%7K&dcAo?P4+%;IK5ceMe^-8f~KK0+L#J?Sc z(R<<;+OXdwuG;~PX0f>=K#N%C3!~4(186r!m$-$7_xEBQ4RGD!{gD7YVjF5d_KM@5 zf!8OVI~7E0qw9eHHbx?PtJ%%SJs!qR7&To6(cNhD7yu6=Jji(dJdHTIX-*og7zmkD zMp_HRecEU|ZQ%|v+LZt-)F_1Jp)jMv)S?JC+W#>mQ;eo$0;C$PJ_7YLqZl`Ubfe%4 zP`G7eMAKls(J1OaJTjV;4#{UmJ1FbzHX3&vB6gAk_n>gjAbCuQPnjhC8!+EUwwwdi zPP(QHC*vwTOE*oRG@F+2Fpd&K zA=UWZNLaaVd}1Xe>y6jan^(_`n`xn~%Xryhx?IKvyH7#2H(~#Vdnc2Z+aT&@^3NrJ z7!$@9o^nlg4+F2%WCneQ4^4VBPNKr@g3V0!`+8<6LSi?ME>Fml*@Gh`1)V;gN4x@M9GT6*tfn8zOQ1kIBJBWS>AfJ6? zfMfy7dc$-nJJ=cECVR4o#{XMvHud?-*um!!)IIj*H?V!5ojw?#nw^~s(Us2Db4!rxKmOSvPMH@xXcpy^sfLJ3c84Srf(WnU^J`(--D{ME2 zI&MJkv1lyqI&2gjr`=0UBBKC+7SY%*AlWMVizfRvQ6zQBUWl3ugJA8Y$g~2WU9=(( z;dh9P;vmy0`eYlhx1x3QOWyB9O)C(^dr`Xte!E2vTVX9$9NPtAoOtmVC}fI7o1l;- zUP!x4vc;8@JLiZWQl6SC9`-9hp15!)99nm@92i@$sUYd6Gy(r6QGG;0Q|oHNQ}ArfL# zMbB`kkuQ~wVMY$00Yn&0w*`nantBHwqKx)EqOC>IMlS225o5IU6{xlnjC?dcy{7i; z5y_TJL~&GN+6P5%iD4{&kK`!DsPY(O=H_m=;lsy0gU*T=x3 zB~8>?kCp78bTv*gjuGm*g?`P3hZ*%CSB$HmgF zC^#&UKCFVs4e2HNwo9dR$Kg8Nl$LLXl``ovTEVy@wcZB33h8qWpi;V*(u2Fw@hreS z>DKRIx>|bkH548iq|zCHHPWfnjjNUBErLwF^wBMNYQT&BAU=_P%EMu!w1b}QCTZCK zh`f_#(g55i-ANs~BgT&N5rvcSyg3l@Fz%rZE#Ah)bO#0+hf`r0W_)lSti%{^pbl!P z@e5n3UpxAAk5f0HKCVJWe7H(3o3Q;7O41EP+mPr`3{R&K8 zQBhQ8(i9AlYLf>uL2NYH;RNiZ$?XnUN$&4Y&Hs%4uPECt=s!&jM`isr7-0Ubcjd$X z#0SGKt9JmbFz-c-E8Q1Ef7O>xkX-GY3i_Ie?{Hi@Z8FpnBsRJx z;rQ#am!NO*XF%V4RSWqo4LzW5wVsBcw%wtOYu8UXu)jy#isN1*Igb09hT`~_VdiS6 z9V$D9qYV>&6@HE|2k7M;2j(~}uQ)S#IWXYD#8N8n%B;?Zq#JX=6~K#G^E=#mGf!zP z+=nR)0x_7mwiehq#<3jkLzsy%h%S^Ve-12;=~6=EJfomxnRw=my#dTbW~>?-=}ZN+ ze#@BrCBSYobE&Gj!vxqtv7GsPEhHuZ4O1 zJM=o3Z3$55VxCel*TXEMd!Ubb=?h@PHqN0_Vwvl-wbz%O8^S>oe~J{kMSo(az~z>Y zLLs!ZqYa;bYohsJ+aQ_+x9j&KgdHEOMXWoswfMYi-~veQj-fnxPb5{1zYnBd>mQNd z!P=j;G??$Tqa~4j189ucuU!brUrB%BXgIV=2Ia$>O~7zu>OX}CC*}neEY8e~CJK|8 zsDc@EAEhhb zS>pkRtqijfpo3XMm%N9$Q1xGjNYU{n=#M4e|ND(d?o(~nDEW+*pPMAZJrGv2WgqBiAjY4ffyPO1=E_$P_F=|Vz?m;IxCcZ(X4n?! zoMl$^!fYK=OhZaN(`5kh5yOc=Y+&k-L+>#o52pUx6GpiU)JA3=t*16IP z;3>0;l9(3e01f)j7?CR^TbWhnF#4QXNyAPXQ*sC*FPXB1FzU=su>|JAj@JUXvbKkz zaGG_d1;sOL$uCd{V4Lp&1hVCaX#FXI9q>28k7Uaaz-SbEc`y_c*$*vXEs6bx7Wi;E zcLB>}W9eqeVvl|UaFuO(3}QYzJp$?l?441Fu#ior0qPbzZ62^PwwlWG+w2?~UhlKs zblTPIp_5R5z)qkH(D0CzT0pdhO(9RUY|w|eck0-+v?5r~-lHk+5o=Sr3-+}m; zowpMTPgpBc@ETcHYL7Otf6z)-GwVzD(^GcCD#X;n{!GMYZ2CrkR`vv~=sjmm&caw5 zySEx5*ngUO4Q5`l94!*PV$*GawX+9fAoH57bBFB?Hh(w38+K>}hz?xdB3N_de$)V* z=5$n1M{@knu$IGVCLsE9E}9b87S4lKZmjtyV(?t~k{Q5!_#wFJLKyEtzm}iK8@d~z ze}R8T`zYG^?mb|3^39ZozT*pNTSGVRnhRbZ-#rx?cEZo=VC|SNG#f-mVa6Bz;0k|= zA8JAPrL6)gD<2+({<_3)9M^lj0%gN@G+OL1rQv<&*N*tStE(Glv)eG;4r+gyQStHj znQ2h4VU}b-%9a^H8%iA+&kfLbVp8e#0#C-5R$NaqAJ2xQA5*sgYG;|!b+8f2y!Hkb z#uVNL7S6QNFc-nNPJwzP^AoK}MKJ@H!gVxr=@~r4FlXn}{1eMePXjfM@ub4`JhPIP zw&I!nROBZx?E|2g$k@|qCNcBq9!+LeQi~#mX&(eEl}V@Vd}++0Z(uZ?ne!bKE-;I! zp1#P~?1E$lbC=djGMVV>u$jet{56baGhyf=8n9SVL)R~t*_Q&1LPl!^nIh&5&7#GO zZx_HdCOZ8%J^JT*{u;S0IrD+YX_U)YrW(eE&0sMxu$xQ%J?1WG-6WB#7=`7f_D}mi% ze?I)*5UAKw2)mD&9e=>m6UK!G=tib-JFq4uMgn^+%*JwnXUwctSZHOc?gD$kJUR~S z6~m1KXlJgpQ~mv#Sr8AOoyO z^z&H-?LIAFW2h1=Vvot8P|RMW%C(wZM~V9bwu`pSJY+kT0@Sk`snPV5&2NEZ3)|nL zAFls1_5eNdt?a8-$UJ9_2LNkhWk`C37wq;#fS0U$GopCKmQhyU&hA(T+ppQEb@1E4 zj;#miWY;Z)$b0s~RS@ZB1GfPj;TBf{9OWu#m%}mc9gW%!+#K4$dxG<({XGVEPDhoM zH&-qL(}$}(3=Ll{uo!3I$6X%|+aa9jK8T^*oD-0Y<#xD$7sq`~o$WO4m+xUMof}Mj zvOKPw(xOY;KALhba|K>dzry`OjqR)4XLRxMxgP`&3pmaJB83J{M{5;D+!~scin)OU z;Nlv$eyPNMm59_|}WSPV<_1@N|a%m6CNY{(~r}d-G280*eoyLP?-6 z|LJ)EKi+}9`w+gP8SX>*P};N*#_J8#Y7OV*)b5Vp-Kgmj$=e?V7R7f_*Cd)B@+A~w zc(*6OlKI2bwM*f@zmIdu;#Ff|JDZPx3XsE3-wfLYJo5@zDL>c)*iBwl1Y>vk7jXbp z{9z{$@A1Wy%-!b|FR7rc=EqR}`+yG_4#kJO-$#&n!t2igH1Y!vz+n?VpZb~2{QN1v zp7L`hL!pIV5R90f@o_ZrwDC77i+2(>I>5H4kU9szN07z>gb4vuvL*;!l*MNV_o$S* zDohKe=dVN<;0Uxr@U4c68X=v!HBSU<8kk=Q{blNPifOtfdOG&x2DDygb z5`8@f>OrC=nik_lD`>X4Aewy@4ljwU7J_$8Vl`>f+!j#OMpU zgJX<_OoPL8qoMr&Qmq>+AU(2~8d~E;)K8tz*Nx8;Pd&nMQuaw4C;v#>rly>+g`ug3 z=-N)3{0_#ybD>IXm2)qStHbD~+Oew!GW(NoU6H$D&*Hefa}O-#Cbsiz?;hg6vy<+|T;{$l)Gsru zuR#3@^Y#?n7c%XM@K?kf45sSNZIIz`O;03cev{rJCwWD!5gnc_6 zyim5=@IBBl)_y*$g|o+~H6OwL@eo)fTiqWrQS5zcGDPDiIKYcxKNBI|Sav-v_{On^ z20`*XyW}5$c(&#sj3uyVrh}KrZl&gFH*5O=tn{!Wj{@|vLuuwc&Q+TObK<(X=>Bu& zmeoSkh5IQE`mUUqc3Ze{n`x2Lo2#LYfe-i9WPlLvOS%Z5-0ptBFa=RwaGrBzU@e1t zunxouF0li8mE4#`0JU5T?O~|nRt|(@H}^e#4L#f=D+-2N+(hF~AD8+Qj9T+AJHfQ! z$GwE2E#E}@0qpp{sp_-mt>*$e!pmfkJjx#tL-H8EiYj{t{xn^#<9whNJV*XK)d5a? z${G-z`GV~LmHa+Bv%CB*3;3<&CtjtP_`pwS{;%iDe}{~t@DsT|DJ(q-Gd@DEAFx1S z^>=U|CX`Yo8iQ6Ph>3zVUG8*Yk`m8JwlH}Tz!h|+0Imr^HsF;Dhx^mbia*61YRZH% zG4%7PVNBN}d^h3DQyN_&m`~cN{~F1BLe*##GkqK4ie}bNL$EQ->+MjCWqwHpNMP39 z2k$&P%@QD<)!c$e0_!jYdWr0wZeU65Z5o%7*)cR$USLzGCw!50qvq5l*7g#Jm)Vuw zP`JjX(I`~HF5u{=weGMVP?k~7uB8#bf_+W{TP3?0PaHNcM3LVrb}dcb_t;>X4eql` zYT@t^dw`Oh2KE~Lr`cz0u&tlLareQX46y*b96q>9af z`wd$*47eE=&}ik(bvITe*I z=eT?Ca55p>%nb-8luOtT5X*@!LNboKvICOmxy(+0c&@&Ot{OLSF|b7LI<4LqlDKLA zPVC$Y>XW5#i#s8c%8eQZqiLLsnnUT_ed;7$;G!>pcaeK3X49^=z4Lo$dTfc};c%y0VxAeFD7aygs-?N@*+2L50c%oOthdH-wS zJg0pgU&Kei(8$oga2$VzYJrKDpCE`ycRq*O*HbAiopDVD)o(}Sfiiy_71~QOF5>9R z=xIgDpV<`+ERY#?f!9I@EKjt_kxcz z-1Q0T^}y^!-+hbk*jdy>C9In$>H_Sa6gl)lHSi^xDXl5UL^eY`4JY-yLZL z`eP`SDt{gf#^=2mU*YqPG{XbDp)|xqaAD9i}LAi`0v-KAMCnin_q9;>EweCr# zAPg?gGELuu=g*|R2Nu9syn?47=9`ZJqM5bv;KeXc7XidE!@oyd@yu-6>5#yf(+HZ# z3>^()WsIv1yyuJ|VmL(KFv0!7>|x?)<;RZQFagZt?3V99bYs1!;dY8$7X}x;?B~?l z4`L@#!##ri+zP}v)^;|q6n5Wn*v??jQ3{pETGP9M1?&iW*u2d;Q@i^vo5Mlm5j)x$ zpp~6qhz7Ndm3qOibZ{mC3kI204q_^fM&0nG`Bq zau_YmWVuX-95LrH8&*R967w^S5SN*wU%~th<`PZ0rAz_U>6Od{a{$9#CNu#0RZR43 zFzcAHH2l^xHz?VE%2d<$-oiN1Hk5WoMw!8D=C_Xk@cw)TT=X!8w*bA2)*Qs6tekSY zW9$sdNF3Om^e`W12l&9fBfE|gOefZOA0(YwyVVeJF|gC_0-j z&5oiijX7*fHb5?0@&Nww*kROUuVxMFXb@{=U(;5x4mQ*nGB%u!uCoWn(7o@?eM7y# zK<<%%YZ1$>G{ae3xvz6)sCoE+Q%#1k25yBvKnrK#0=@U#@4blk7@sXb z(vANs5q{6`4sW0kz*`!2gBr?5(v%a+Z$Ke};^u=@aFNBkJ%i#^KG`24H+c0q7_H{N zplqapA1?;>jQ66KA71kocVM)e-xm$cR*3rYf4TG5l!82G9iIZUv5qt{bh0h9y788c zTn1n74D5wMz%I7Q3(WUy@le?9W<`5J>|s9~hOm0sAi8J!SW8!UvF3Kp0|ID2kIC9E9btj_}+NM=FYW-0C;eQ09sA( zl zkqf7+KZ&!T6g`>i$b!vG?kp9vS=_fiP{`(*%n)x5H^CpgTux@V2GK%pJjGqaIZ@N0 zn7i^TM9Vl4f!kb68*Ja_#z~-2%}MCtdCV332+1d$wUuk=Ihwz=_}R7v+DRd=Sm&C;6A#AbN^#GzWH;-<^V( z{Q0MA;3!6q9(96Ohc{OR1ll$rsN7 z5%&_^VA=cuUw|C`G&RR^dHXC{|1IQa+yJ$RUrr$w^JT{XuJO&M;kSg(cmdnj`Kf8} zTh2=od-##`7+8~%Lo4`xC173RkRoD-B()`SQScY(zSksIMKR@inH z3UTIbES=LjF|9v10(BkeZJM4(gz1&<(2f0kD%8f z^_dEu;hi)m7x2BbW*(?E#&6XSwKpE=1L9HRH;~v27>>q}MvZ8Jv)K)D$0QzcYn&Q_U*a-Ui@2IxiP&*0q zjVHY!|LgS%oZF`F0>RxJ@F_lTi82TGx4SA>*s);&=(`dtA^C^lBYN`oUZ65z-?(0| z|KjMeJs|A?``|hn#}0*3`|CWjJq<`QGxLZ4oyWZzn7+hrBZVuh@+NHLv-2s@FJxQh zf>+G`LkU$0`+_7(Sr00nZm~7)0Qb;Qq59)K8+;Y|)$AIoxE`>3lA!;P{p=`$tYLRk zwpPowH32+hm#jtvC~>WUVWq$nppDHM0)G&XXE60o)9#@B+ER4iJgpX49}5 z$%PGoNCHma1rL z{w1YaHhd|K2)4YN9YpN-{_Vh=csV7B&b%vC<}UoxDRA$~m%RqhjbBbx@Cn{<`W~P= zKlU3$>cNkg2h5Xipe--Hyjd$SKYsmY=!fvTH^Fu&KZ+*rSpEs6JaPPQT@Xp-$J4%! zG=AS8fE=Ft3NCW__$R;$`Q{cFE8^ojf!*Sr{9&w&FQk#=9)H|GBYrhMcs!VodC&O} zeZsrZw#DbX3H2`8_<%sT=;V8;_0h*)rXs)^KiUXA8$m-YR!1SH93oCaCS`h_LK)2z zeu9?Lp->@+OveiMF2h)wuxK6Jrwaz!6m&uGzfJo>FA5i?Loq}6$sNp0p|=anEMXZ< z1KIcuMnsw;T%(R{t}u&sPvr@(DbPzoEv-Ua7QA}k;))PKE74bl@Ni)H_)$Jc76|S1 zVt%2p<5QR}5@yqYQY`#X1aM9G;x6^y>V_nZ^ zJarNceh7f&2N{5isDiGut0+4SE>4S@J_a}=+DZ)=FHsaVIub<}tN=1aYGYWrExKKT zZ>vi5hF*^`)QE;GhsI;k?qbNah&pr>x2WtV#N;Yor~?QR&z}v&O!3T*a7ik~HkJ@+ z5r@&z?h&IgOQG&z)J*5(Wwe66Nq?g=AHi6N(N%g>qKpcvA#%a!`e-PW7|lBazcohV zl#qO7Fj`~)JR(s%2Gd!RnGeiUaxNP(-V$3%g@Yt7Qvt#yODW%sm3({)BFU0VR83_| zY-xcdUsAIVSgGVZt%2T?oR|cxPBPpQpjk3<7}Q@%HnRxkouq?@6+7wlzoF+OHJpuw zCl6`93s4`a=Out(>46x4DCwO#h$c!$Pk@<=(w0>?`%BV!w7ulI^ciIm)zSnS=NhD2 z=<$6f-8Tt(ucgN+L+qA5zky)vjR)JpgNt#r9wMiVH&FBJtnum&NQN5EHjDy{HC{(s z0#c3hj?lD%KgHL>p)}{+Oc?t19Zdz_T_}Udk0I0(Uv$0?5mhpVRbael3uy?6R@Luoqf>GWbXI^Tw_+Zz-|d+{Wm0UGkXo6gL;Qq<_+{dvq=k$YG$+&o*ps3 z(No&M%>N1)dLW;J_l&XI1@N93JqGT(nNR2v+p*jO0DD&SA&5?F8_iPAtjGkO+}TIJ zK>ZZk5C}&;tdugwbL?(E3Wl92H6ZTW>|Y;3znTqqhsG1OvJl`ETPgeRLQbA^6znO@ zZ7@4^ZULCn9BEXUo<$YY*RS&7V1{)cxHH{plj1jTsW&w%lfJguqp0~cC$$mWZ)@8j z`P~$HmglAzfj)1kVG>T~d(905K7T2d;tQmdKQ2r=422)we2ULMhVf8Xv|%Q=iwh@# zzT`b6|4YSG!7P)WfraHuY3J5YX%?{a^VETm{AKG5=&rD**RZw(xrzs@FN@;kf<+O-vi|AK~-HH%}q->&9uIY|6O=%I5G*_`F3;58c)U^mPBW zWC3)q9>_P4Zudq-R>=sSC*IQv~07eU$GLUYHScUN%yeONAn_~YR3|21R9#nf3h zm`Nyvp#ydU`Ske;xE&F04%J7j*Z+MRGAJPRcuP&vHuiH$6JN0tuEJ9XyWkDNdCMNA z8Qq<$9}CQvt3-D4??W{ImM;kF?@(T|!I!qf^m1EiRoI3firM~O8AB~|WC-3leZrie zsrM=4P4&@RrjbhPZbnW+yB)iAI!@_0TSM*8)9e&l5e#OP&;GMvIjsbK^j*~CvuZhm z&x23Lz}TmUCm`lo9KBij-Gfxn=l=d!^nZRWPac4T)ma0rY7O$-^nW4$_Zskjuj7jD zu>ZfeWB)yeQPMhi9$m8@VSTBihi=?_TFIPXm<}HkPmcp-@(9WarttZoPklQRK};Jc zfNPi$mI%_!{#5IIqZPG=BVS0EAYjBtU4*<47F08B?~qJ@_){yFdIAls%Vj z;rK@>t^V#^HV?5zOKc@S+$Cx*MVyf2t2+n4nR>s+hxDVEPG@nGTUg<{Q-Cv}5N4b#R-R%o+sq zl==5{;THU2I*8Ah`NN>!#+>ee{tIRll^Jgsh6;#Mwu*Y~b?hGMku+t(|iEh z*mdau9c=In=)GsB9)ZJdHo*#4){gs)l2m(6HjUoDa^l<`!>BuVzzrIqTr?$0`P_aQ zZ40<|ABf)I@@R#)l>2~I5zDyHF~F+1W-8Mka2J=uXd`!@2Bsd)rU43l+(~LQ+3?Zd z!HO-viiSda{txOAyYk=CZhQ~E!Vx^fY5t!GP`&vJb8!}D`NO{f3*Z-7gL#R!T?>%U zXV64g%(qg7af2V*i9pNv$@3st!AA`O@g9G6Du@sHzM+tO%>PZ@*(dyZs=*uiGCN>R zyr~ByoB3swL-q2ftRdNF;79z8fZc_UDT6&DSZ)I5BOG1~89!moa$Ji*!6g#5gN0@~ znK0oDWnGbi>k}A_7AA{9JTLeTg-C)Rru|w;XlOtrO<4FXj1>y;^yn1{N&l~{D}l?R zTHj~3kMA2m!3_jV7I%?NR50;^3WADAYGrDGf~jThS*D_O+aejAx!8^}+p7WmfEHiV?nIUO-9MuMV0`7$NgB#_Y z)Jm(e;pQuCTLj3nT9F6&FKRW_O%dJ1T*eD^#| zxx9fUs+&vYTCI?Ai~Q*4Fk9t6Y0mPYydnWPK9Wz<1AVvLfnGoEk$0nM@mAqR4ic9u zaeu??REFcxX1108PfKwUltt5|u>8jO-Rc7Vr!i(5>{jv&xcE%DH3H^@a09SHY6eZ6=c!{m zpo!+IwHg2|P$L&WS*E&A!^=YT_>(}3)cW5e!(z25EyI_nq4Z>4s&1i2_A>R~i)jCq zt5YhFW4St#8hnMiW*~}xL%l<{<(2BZPhnQ6mub6gwc3q7;$Nda6$z(nRZe?%9IKYnfxBz%%+t7br-IuN`KSTY^KziHqT#| zPSfj*h0?rrFkIRd1#c^*!5^c5wNe;eXKzZY=vBvhDL4seqg0gvv`I=E4KEeaReG1U zS!zYSwN+|EFHE*cg_9BMcIl&<$goRFp$YeGHO^dr|DpbxfYjyMp>P!OzP6|c=$y8b z9^B`(8T94v1ud2ypcl31XW-^FR|dU2oa35DUrdy_7Sf${xhrg+)#?ozheI6oOKq@C zB54xY^!#gZoiwyF6sg$RR9K*!Fkq{^D2d_E~olcH2f^DtSJ zls!ghjQxH02P z3WgLtH@2jpXiP~#amkQj&zBTOCK?mwDqqy{&(7#k&?hH1Gp}zSBYUlq7Rvkgb2lQ+PC-9U9a!n(lO6l+K8a#6R^Wz2? zbFL}9Uv*KLDBIIcI+~W#27Alyr@Q4YnC|>%zE6h0P(i-I$S}$#khv$uu>l<(M)B1Y&_LD9TpW06g z<5zAYiu;4KMe+RhZaJ9$m8S(58yDdpFf+ET)0ThYU(mZxmri+kJqofT`SyRwVMbxG zYfmjc^Pt+!NSolQ>Y^4Dbjjcc6t#iTZ;$Ir4dd}+uInLzU3=x^74*vKS@2k9?@S~2 zd)M#~&1_$uaapdzKc3|B7!U5cj_6#|k=Ubk5E! z=#tYrqf?K}$b`N|R+3+spR1st^JD#b@zIB+5WaS(;^Eg9NjjgF>bH~6G%$qy6eZZ` z-rn!fazC@ z=Js=!`SY?xTBwm*;!f(qr@rHksEwU6mQf>MhB8Z@FJ;sy%n0-|w!PziR^lxx+|hhM zh5J+~U0Kyfx9U@zDXcrgRcSlA(?7?|;Fev(FPZgc;TFcHufY8nW;`Z8z{L5C(n*hJ zHTXQ1ZQ(*#ne{GZBqRa$qL9#+4YM#dJAj`sFa1*_Fpuuu6Voaz*AZZ@slVw{<@(O( zL_q)#SEw}4%<#KUmghSY8S)(&@=bjopDN#XCiJ}>`rf7&Vd8 z%rMj^!$y|vP|zX|*FdyTxlekBu&4RUTip$#ifoD06DZksD6E9<{=nUk{sPQ)C=9#IwnH(8M|Fb2o~;Hr zQy9LqwH*q>w8?fT49{KLp|G(wg#4v!{KE-sf&*iR&UPs5WgDUZCOa_JlD0!((`<kf=PL))RS1vW$lE_C3AAqSZAVu&NudsC1 zh@MtB=ou5ty0GRJo^9exmh=$LVyPCUhg2}@%Cap?x9?y)x_VkT-NZSpFR+AjdeGKl z-Amb1mH=ri2tR|p0-V>v!|DYGKih#9Iq-4^u5jS}4`I~*^g{`Zeeb}(IPgEfR0G`% za3Irb;>0?r0*^RwiUW7EV`~2a_5|Qz4qWQM^BnjM2j1+!haC8t4cDWHCHiF@bXq59 z!-+la8i^A|B**y{6mdzZamhuAgHuw5l(cD^T2wqJr8uE=QewN};>5P8DM^EiS|=OF zkGdaVDbBEc&2-FPqRHZ=e-pBG8N>Tmrq^REj%)~HSadNxl(DvCF_7Dn4Py*D9ZU~r ztS4DrVl;Ws{UtWY!lNwvf|WjnY=FdGC0mM<`BuU*%i?_r(*q^8i7XuLvhY3&|DT1w zuyCb?f3z^ob}0W{3)9?;Fun>g{n27l2WSRcs^c|vdrLsOrdSs58_bO6WH6Yq zo4_(YS^Ax}EbvjXcxizOl$r^Zlz@Hi zAIOGC=CwtR=|a{+C00fj8O;`{FR`5#K1deWY!UF^TG(s}U}^~&J7npUj%w3|PkyM2 zr~+9i-z3bw13`BJs-fA3;gWf0p$tPQ9cxE#jU$06z#e2HEIo9?31eqw3|ZhgWFL{( zA`6$p%Gf7tM7W{ETF^D6M^-yF#{dSAIR;?OCWGBWI@pV3qtO1;HL%EP+APZsw=7;Y znd#VfG_4!?pp3gEDXX*^OO zKU?@3Sp;ORl8_%4y%`u?f$|jNd_(>Cgt?=LUYJ^0a6@oKKC${pkkZ zK{UnYrKbz}l%S;;(4%bh3_(Z6n7Q+bo^7LF74#@UuOqtLM$Z=XenJ06^e!7cN61B;g--(UE;wIo@7m3Wh1U-%D z1RK3X(B*nd=lMkAb%T%o zx1dJ}dL7Y`HhQC=_Y3+rqVWxlFZU)v2Q@dHXEXNO}s%D3V-*#M@Yd z`8<*whvWyoB@rFaq0-H0L{bbT{1RB#j+Tr~(fPjidQ8A~Zg$6t@EO6zw`D9*;%kz? z-gL83R_6^fS*@@g=A5GNgf@C`z%6tyJd^ilgYy=nAlS@0Eg@eO2vzp2+?u z6kFZ=c^ZOXX$eT#7YKGeW^9dJg8kOR@GYXrE)?uhtUAgh-m@L@Uh%L>tLVjoeF|%d ze_4V3WLXUlcB~Jr$Vt8ie#Y>w_HflEy-uRRR%f$3U3F{ z;DW&00iO#We(faIM))xAS5Tx_E{^blol#E+hAHCG2}KLzVMYV&n8>~!%k-e?T14o+ zC+BfKq7woDZv{}9i~u0;25^#J?;-^DT0-Eh?#!OeC! zXba&noD+(a4wCogZ?+T^k(T0usc`jy zVuE!ssE_EryW=HM(==aGm_wprbyHmC4N_3kYJsSRO;IIE_!E+@RtXnD&$dS0_dJ){ z5?@$)pFMOvM^%rhD|}uirT~Rdr1|r$nRq(P1?`e0u*h~CgrXC~LtKiXD zdJ}m-1@8tMcoAxEgZ#=TXF|JAx#;!4m8e^}Cz2qVwf)s^o2OA=G1X00? z9Yqu?Vi&t&FNh-Y|DA=r|L^;rH&56zr_bz8Idf*NDNAc?39qrl+nHa%#Na=nAw8Mu z%xmTq!=f}2f1~h6<{uj_$QuYO$UsCo1^e-s~04^vg2LdiEDF*=tmy{O) zhLn^;$zoUu5)Qbyq`U+$qNE%N=qf2M1zc8AUJkgTq`VSvRY`d@U{pyt8gNZXc`e|& zlJa`M4OFHU#o%uvA^3~M-=>ms9N^}X@)p3YCFN~^+e^wj0C$#@;{kV-loJ3GOUkNQ?*iT{Dc=XoVZ4i9`vV{k@zKk`i(<$t)u(f<$U z!Bd7$vI#z7nP7KJ6%5PcRWar3{K_z%p7A1MUf}94m3RKSMr8hW`_WHe{&5?7QOC@2 zbDa~Jf8Bi@NjGk*b zhh>ah>47X`;+9SEsqhn+)b%w|&+&>rKmRs|gXRKVY%{jOuma?#C2rW}{kfnhwjNmWpBMrOqcTLnhAQUlc(#nnWUgd$8` ze62D(hN8?GuH9l8Sts1N11bL^f#I9Fdl5&c|7{@8$h_c)5y9z>2K01qGL~4pemg24 z8-#zl=>hcVT?EFP7sgDSO1z<6;bX^omJ!O>^Wm?|uh0>8-2RfO-u)AGrmD;+6yq$1u9WjRM2*tR}m_x=sAg zRhz|dHR(TBg9D*HxfqjmPEYWr6k`@$d}UyN7h?{cn;F#Z zW9+y9X8c(0vGxLoT3Yw@#A?FD7YkT)1G|8~s~B_WUQ|Sd5{j`hx(ZEzB^F~Iy8K?i zb{AvbjB))7m`P%}3V8h%*9S`#vpYIAcc@svpj+gsX07h&{R`@L^gn|g+TtZ1`_G`C zYrOTx&V##wcAB+P_pYZqSO@ZH#S#s51IwVDXNs{Vy59&pTa2~P4JRzU7;B>wySs9& zWou0A3*z}=Vt278-o%As1aBh51NF~jxjkBi>)6^_y2iux&0+zI&gk!Q+WP!)yCcMM zSniF;Fp8e$5iw!E9&OF43<@{8EsJIfsWy=jleqO@$OgXkI=)0!U+o>q9x}rT*Tu|Z zs;uvgvA|VcjhZpSY}XI=($4J$d=2gbrXZMl`&Gy28*zouGgu5a{xD#I_-(Ps7;ee* zP8c>WmuC!jHH2puTXl>fM?)|cZ?cTxk%q{OAkPsP!xOF|3>X?3a=((HmHqXM;Z=#D zu5F?FR-QKiW_k8f3da~elvsM-A4++}me@$*e9;gK`|%ijeA5tz?!Xyvcvi#8=z>B~ zOMNlsp?lxe<>e^n+`j|0Ftgk^xVJbA4t9VM?XTMjR!S9%GP;*7V8*=|<8?dxz_&*+ zX3&kg1YY@KOx6WF2CrfbZT?RMr#tm)= zjH!u6dnKp}RGYeQos;4P2tXN%Sqy`$ovlC}y(fmSKC`hx^^v0@GQVyj_Cm4vU_V{w_ylhTZ;2$4FD%spdR;6KlRS-Mth(b!FE3 z0BSqas}P(j>_>DIX?EEJ=u~HeR-?9aJ&ptMVZ+;oqly1&SUq-2McDS$kcRAo-(k*A zLz=J)U%^5^S(L&9cQo;q(wR%NCsK1V~|m~qgYks|6b+5 z%Rv5nl|Jhc2sGASgaKg+B7eCFmrc5zXSQ7@S-+%7WmaE)bQU$Sucmxef4M{h(AlQpCaJJS=$G&@Zr9&EW&(3zzn zo@{!5*!I=LyxIIF0wXWbkjm_d0C0jevFdCFmQp!fbYhyZ$CvYc-@H zTl52vjT+K~ZH-kz-r_-TrUfJPo(p^1I0rC;LEckCL7R`{APCy0i8Ji=b`UtAAv_~g z8-`k@aw5bk<{?@iA{$xDN?85p z(%V(WmZx&@U{l6>QR8`bC&F)KV)&EA3qV4!%w)#jER26H&i34MDg6 zRGMeh3tSucDDx*C#h+SzvJPd=+K1M5zp?PoO~Ztu;~ru9=Qwcz_79ApR@F1=OKvJe zO(b8U`#zI&7i&xYW(;b!BX@i~c2A5j>nR$M$0d*g36&^(DIRV~d{Bcynos%6-!^ig;n zjeOOet=byAGP>&+W@=fs+Bskz+Nf1M*sAoIn`om}^<=AVhtsCI1Kr@si>;aq$!0qC ztn0H!eZA=xFk>@UJx_;oYio`%|M$6Tdl?9 zk(vm@{`e<+j4Sbe#&z4%-RZL%CZ=g53ws4yEAvbZaj*&JAv{Mz%CJc-f&8l>9_-U8 zK;~~3&6{_;pVoC#0 z-2HylF+t`V101M34Se%0PbwD=eDfWTi7?Ew;l1z@?s-uQD{HfWImdGd#JX#Z z%>uo&S-||*gJyx=+ALsx>PeGDUu_mJKZjUTh8d{M0_I#zZZP|67FzI1voM71d>)S8 zl&=FvL)m+^fV`{R8psIN!{t-ny**6~=FgrqF-+Db2J;sUnW{|;<^oUZF*DiYO`us= z!4sNubyW`HjkBzV`RW$Bg38x+b`8gSD8+IeAc071*pD1zFTfzLZI6Lz0sWp~>~3!a zrmkZ;+F3&QmMb##{!c>gc%J#ePHRSqMA}x4X<%Q14qig|YUPHB z8hU%yu6|NrEbl70;RR#KVwiHj#qx~hZL9wXJbg&*!Bjr!`q#TsGigIljFPLOog#cE z$qk|hl^A_y~#}FKNhlyq0rL$HrsRxPCgV9qkEOpC9 z_`JHf4ikx|J*Y8^o+5Fn<2M*vRV=WG1n9x&X}2JKa%EPi%t@1$yYebj(n&*HkW>Xpy^E3bUZI$Thmn|3@s+;4hV>wQD%l{gc{TQ zVf;Q#AeipJV59Tl$l9xRHbqE7=%(hbWfw_o7 zPDlIxJhQzN^#v|si_7REKTt&Z*6$=0a1cntK;} z3wM?Ve`Q9JT1lMhI$x!Edpj#hnnVR7F|91y#ZCoV1=y&IVQz1TTu`$LY;&op)WzP~ zT}Q9r|Dq*ztGbPKiPfvHqg_7LN9dmET#?m#{`TwzG80~Qq15EFD0rg9_z$THgWwo) z6$yuOdZASNa4hAXVlgWiTTD%6LMg%f=wJv}EX^6q2&MrKu#HFFP#l8ki8Hthr3ziG zYSd@Px~9}9&AxC2*Qm($ckQULfxYeex#p;5k&Q%#*G!c>xiU6R=iqtHy|z%U&J`H( ztRooS_CtEdRJT}=lj;e&vaUBZE7os-TrF3(!vAHUas^(fc6uACUA;juL#WHFghvYU#kM!#`RaNwoZg3nE03$IS4_Svr`G3TpNi{X6oPA@-ZFI;{;~ZK9Z@3U{GMn z7f?C&5S1&GrE*krDu-=El9UYI-9JrK58&iey5DN*+rc(3?&hH{h_7jrnQJ&u02 z5TZ}7L^j*aBl7n-28<6@Ek-{Dh2#{Y|9ca8f&hLo9(=u9CT%NR0^0p~~c@ z)imN73?v_iy^O$g=}nSBcH;JVLfnkbBp;x4>efcGnSYM#M6M@#*a^~F-hi}TI$IH` zG>&)#W&`44bRXofQM;`~uUv+Vrj#dzhP}yzBb&-I$I`R9R_XIvr?X!t`I$>dCY6#! z%#_#U_**7fuJi*@>XjnOXr$f*re+jLURvlR2Gfj4b4Jp$TWxYV`%hx?&q?8gHiYI4 zAqQ6w_an(Row((HA>EVSBol+A2u4IzqEEU;&ymO_3QXTQzQJSTbQL~Qh zbU@ltVD4)lYs_(~*6+`V5~EFVSL+icqa9gTbXG_Gzaeq}=*iloTXr-VdWU60U~a4< zbN^1DXWs&Pj_OBhH*p$<3HTC~zi7kt{27w(<08s197th6ek7Zd9}?ZJ4d%ijL|=T8 zblYKPDKOE)@pLlv%MqzjHYs05;D+y{z0y!^sH9CGy0tCQ>uw=)wYL)G*eo*9wj7lY zR-?BSu#LFvE28}3L(YaF^acf4Lp%yv|8(c zUGETOSu!b?DI(F#=_DDyj11M#-b$q^BonW_{GXBk#)QLAwO(jref3K!|Jj4+op4%- zuC0yxo_}kNsZF};oJiXtMYxSfceE*XPcvdfd?e-01E?MQwS{Myj>-{*B-wZpaecKx z<@!XGPVPW#Gjrs-;lzJ401V8TO9&$*o`^hXU*sq(w(w`%I&vM)uTj`zfH3nQznzR z*XmK#CwwAnffb2voI=mm6>%{FYUcZ~SUfj{ z=N>@qu`;hK%3~7;x{h8!%{6%H&bySIr^3=%RF-AnD z55jP?|6m`g*Tz6HS9KA+BHcs!mUF6-Q0quidyA8Gk$F)_TuVAh_UB1v?pWf!M@)** zuLWUoSjv$&KZx^n=GBknctAJOt*a;craDBaFq16jVAViHop}U)!NMalzh=>Mhl9)= zYC^Ru>O#-jTJKFdL+xu-flOCJcN3W;gqI>SwI#iSk>iM-tP-WiB%&NeT32KuF{DN2 znf6wSrcnb<|EV?DK_4joM{WL}5kqd2vc&FDsKuj<;J%sWxoTxypjPjNU6j!1;VqOK z`-bD$q-qqnt=$kC3vE`>(%bg@E|_eWnGH&NX%u8S+@>X~<2{Exh=TSled$uD$BAc-TBD>jkzoH){vHk+E zJ!}hHjKG`2Ya0I^b{l6^hURD^4ugd;uXaIX>`8jt8lI_xXQR>+O9c6OtbnNy*0U-)&{}qTK7Idn>{GgW@tKY7 zh-wwGIXL1M7U=pIA-YI6^)G;Bx|}dbuF`ev3rFj8%jrYy(pBFNEL9irFGSAiS|DK5 zT4wHpGfbgu9)11_zx07j-9t1LwDf)gwLS@7QJ&z|A2Oj%))&b-d?)=#h#g`JRs*}h zZn%v4ePrJv@X{=r9IK&Ysa+Y3sI@`Dkn(AO_)V-$X(_SJC>$>8>eB5GvEHvO^^Ew# z6fA3E{po2i+8`anPH0$)qNqk`)b$$cPoObBj>HV$6q+P<0;%bmI}mNwV+yL={%T`9 zyFRD5xOWlK@xpIkPzz!7nh{W&Qn(L>W`4g5?tJ!a7a&1wJdJ)A8x)8(tza*&2Qh}- zgz<^~R0l&`*vIxYqt+>`R{8y`R{I0&FelajAgeXt5UaJ|FiX`IkF#1!PO#LJ;+N2> zBK*5W?tyjppMv4P+&l|hR4735N2oHBBFbt>r%;pH*WW|(hftbl8+13K+;rjq$g~{% zC(5n2Hbl9@s4I9nyKG2I1?^yMi!QMaz&>4% z+R#hZ&3XsP6x|OGA#z$5M~i8iER&s$aKwQP$wE@I(<7t}N z#063GkjT}h>3%mim-fNOxN|hjj&muA+Pvx(m++9UPq)C)**dG!#e#g0-;BzMn#JcBc&96VREy|6$W0e$| z$eExt&uoKotFyo0+1B5J%5umln*gM$l{Q&W7t{bFwv2$-ZQQO_@7z5BGHpLFRd)PU{;qyNGf@1p|bY*~tNWcR; zVrS5b^8~#I;3;dSmFhX0i#1bt!LGrXu~5J!PlD@j>;#J5T)O00;4RfD&B0r)%f1DF zD|B-fgSbjJyNMp_&uU$tKjA)Fw}#RtYjlrj@3l@h?JR7s*V(9p#OV6mK-D(trYR8F ztNSq+`ulXRUP2^AXQnONeqH%KAb!$iJ%@`tT>NyVcUy-gUVlQDn_ZOuJ{5X&L5M97!<36nr$i1RGQxMl+KR__&41i<^mqA&f zQ0^)PvEkeds>NdNIg+441Q#+9^^N4RXvi<+!jO{{mT?JpA+mytcm?80&Oker)m*eU z{5hkzH@JW!tl?ye=GSsvaSK+6;l|P+-^hhlhv;VRugl zllvWcS|OerbQ)L!H;Z-;iCnv?ASQ9|aaB^-!=0kNOfu)Z4lIR>&V!W$+*zcVg@aD6 z8BLgnIi(ZOBV1p1V8^(dU7>%RlW2o~lAG5a;1u`S3uex6(e0ssmh+)mF^3B|49N#v z%k9v6#QjNO=3{QtHAp_?{v=P&xF$4nzTl?ifS1d?FOOQh=C)=*;SJ|p5evWXxeukl z{J>qneGegz^QsP+&s<=AxcI^a%!jqFTwTg1eB&Nacv{G*v_>uCBLkqflE3=_BCGi7 z2_Q!CPkRH4=5J#W71r{ttnjps-+l$^F?vhfU<`Q#_Q!kK>`YhyRQAy!&`}S{Rf04nqMB@Rew% zc95@5yQIT>XnSBs_zjf(I?BhGpm2;oLzOwfd$ghW<0OB0GhCeJk$}L2$4Mj zdP8Wv8%A#mHX1Rv1z#OR?g+KomdwfC3=$ebMav+Vt27szC82Vgbr7j?nf5hRU5RKy zwdA@eS2ud2Tw~{ET#OfL<^;oBEm4A+&l=ht*LE9>3f6J=1*Ps08rSvWj-qluEIk9| z`eS>5(!i5i-LQ!IeWNSaL2vAH3@(5Ch0+~OCeg@iY8wkmGyOftH1BEzrG+a7S}lEO z8f!g~qxq*zsVFG7o&5l!?cT(r+`cJ=l^yOGcmf~m*s5=U#j?qc1n?U@L0rHa`avO(pLY$C z3;9f%dV+Y@a)4kywI#qJ{twFHgz)`o&lJkfj0Q1`_h=2haNdGklv7y3H>!f#MDW3> z@Egf@qZF)*7pSW&<-aThwv1o)8x)uGZXUo^@T>x`l9x9^Zxx@3dj-O3egzHeDE>6< zMx*(kMnYjN|CA=Tb^PzxQ48z&?${Cv8~7DtAriw6ruEvnk-vQr)L1_DE6`1Ra2a56 z{F$k+y_FC72(XQx`VaKC^DC&o@8EqJg1D3aOkE^VM>5=a?*4cz3y^ziUFunYW3nuas^=B)uP z@^yDX{Sx2rG#p*#!zV-i3g7oIuxq@t6(vZscztD5|2n@h7+5y{{w)-5@`aQWyu}Zt z;Qlt>ibA$Kd}&%r@A8c)rFxI=xEb z-cgm4R3N4VO!0goVAVii5CnlpZ%Y?gYz*{c-{s(v~guf~Kvr@3rva?D^ z?+LJ4n9~isDB-sZn*O7OIuaDu2r-R;trdDukg^UbZ5UlI3>ENZHwftzNW=)W`a*w` zV50$ybmUGbY!zxug^O*%{PED+E{yhtXN;TpZ} zXTrO65P2@R(@l*RLU|UFxk7An@LmeiK{$FPbgYF>@!BaY{s8oiFycJGTj2oZDBcOb zwub0?VJSt1AB1LeVCJLXxgR2*gvmtA6K3oM@v{&_+nRjga31u&2(9M=g6AE#vDijK(`$6wJCPPRT3F;r<`HIdCt6+4#*xrn$`H6>UdGHrUZvZnu%$o*m zf%wY^hy;pDUIAMudQXIYkT`^*i(oN`HZF_AinO^85#zMLRGhg7yfE<#eeG~@1}=mN z5n}Ljyo9CV7OLSgF_i}8ad7)?iY31X>1ASQ|lwE5jF`cZm1 zNqkPz#~yK`9TiO$KXgJ1Q^ac&>g*T$(ZYB@?1-(8a9FHIq1h3!>ugA-iWRrO%2Ba> zA$Z5c0aIxF9T%Gs^^~~$20Wb>8zzC7CibD3;*2=51{BYV-^ajAx>&Urs((%#Q3JdT z@hWZB&x;KQ!uI-q-O4Kb^^ipB;rPz%E%va)?W58aEJ$s^|Z$$TzAifp*`$O`b*tZ72d(k}| z);@^7%fb67=1l?iNnEu6AW!7ipcbFSn5E9Rtrn@!=FNQnZ6+< zj+X1IJp)*wZ$KS+r9O#5kyZL}Zm3g?K8rR78}-pCFdD1(7||bbz~CzqkX4N&4xOLEfY9Hww1*>M!QP+CF`2JzON~Cs%+%ioRzPh#b(b=?>mO zeQ!FbJES+!?)I=ggnHl+ee5wPr0N%X(D*y5|A9KxF@4XI5IwF>D*`y7|8+TtC-s9~ zLGhISXeEHt`ssLX{(6^`L$9etS9nia= zfAtqYrhYfA$rtq_iy(PP?|oW_@poD8dldRt^dYz>DqPjG&meP6|0BKUEPc5V;9b{G zDvNq&>y_qEyrK7K2I5V92CaB^^b=__bXWfmxxc3uW`K8Jzx4xZpQFED8X^z$Z8N}o zs6RoI&?Ei3n!q0Gr_`tQ?}@%H?I@q>|N0ES&-9(>SSwdwn!^4M`o46z0QNI#N-QeT5tKj_Ujd^rG~pWy_4 zZy@*^qA9r-V0c1VJ?8>LT0W{6Xb@U~y3k;yJxq|HupC?j8|t|rv&istHn1>5<4AZ4 zHva7z$( z7=ma4+i6(u11#QAuDRL!u{S4jLNQhs+_vvRfb?HU!d!?ucPQPt-fr@P!(4)X{$ll2g8iLz&;v2)&%y+Fk=8}pJ%vo0+OE%pR6#JZzxCS%3loe$LRd$tDzo#emn=^L~bz`Njt2!1FV{rBKn|X!#Ke0mepE zp}xRahc40t8qZIHr-jDkL=c0Fm0kk`8CqzPwaSiDHO{mfD3Thf=>`$>` zxbbQ-n2U{8+OjP%j@$$@5ysYE!HYEdYz5{rJ|f#ojq&GDwPi*}B}gte9;V#$3ZvT~ zxL9d?ONrT4Mjr~oR~xg>ffr@mPqSsTal%s=TVoVk0&}i4zCR6_b;bmm?AIGd2cn@H zj0HvzV~o3oKy;(=@CdkwHP#jZHW`y^0mK>Sor2_M+HPwGH#oAKYZ zu)Wr{`e^%&{V6~=V0=K!;6bDBc3_8$JO4zT4jca& z2){>+ataiV8CQP;@3`@V4BiRjFxqsVG&*;;20Uey=}_ggF^rbMG~?;NA#=uPhy!-k z_?rzN-Pn9BB+nVg?S*89aS(neESxvCq&qtojM)pIkZEjx1dE*S+nG`(!> zO|#_{(;#^v-&RpGkv$TWy%8yC^#iW|ntv@5%5Jnn%O-ZK7i z8n$m6>&}4W9pm-Y(7$VJMBC+iMjuKm-#5Pg5ehj*&vNkl!1(Yoj6F0KQP+87^rBld zkB!N+uYY13N0&~X8Yfb(erEjpIeB_+Trw6eUKn$Fz-X><6D50J8bejMe`PG43XRvs zofMJ0F{aa2?X6M&5!T)r{~81Az40a8`1xQ=bU^*1u?8)CpNwh*K%Q{}ZKXdO`_s~# zZ>-i0*cW5VN^twtI8(d-R$#Q!mhGD{h4R9M#)d(#{oOcnrdP(bqZmoeVL$!o5trtX0a*U57w5L-03AonB3_~Q>4k4b|Nm*50@di)U=(_ zq$^B?KcI#yO%b%sUuF6*5Jp#<^7;crnQAYFWVGoWeb+UncZ~qnn(q7r-a6BrHsGx{ zO`+c9++Z4%0T^Sl;J8-UX!7_6o?=Z`Xu8{EVrfo^GbL{Zw%OFE3OsEw9d3a-Z8bgE z1Ku{%jDKNmyXod}5O^IGcfan3!^wn^G$TXB*{$bPMnrQYBQzC`dsix`_ z6CX8wc@OpDrV~`d6Q-6a=`jtQ`=;L1EptqV2ZQ&(RF-DDho-{I;5{;JavlKs*fg4Up-)V4 z^tqmzu6~8XXC{u$3!aS%Z3p64(^&di1*X9?b$>JMaf63KQwPGno9gD0ev#?xL}>U*_e!JL^QCEX zfcZ()DF@~+)v5)J0I3-z)fY%CeV;%nJ_^KzQqC`EQ;-x~3Z8j^E^$_XH z5x5AI9?_~2CS9RSK)AHL859;v{-+_bL>j)8;?D?a!cs6JrH1~n?UG)-1-4Z3r!aJx zG?Owe%cbA{2DU<)O1qSmk~c+3tE7OI;H{Qg&`C;^G^7ED(UP18D{G_$Gz`~D>P}$m zq`Ln=WW6M|1GYg5qPHC*HEl=tA2v!8De8}v`cd^aNpmbP8Ydm6S!A9kT%?fWU5rx3&f++f&NfGCS}t>?r~}EC-6>4#zDK&KgJ0(q}Gp*B7 zU=}3PoYL9>FmqNKO|fFSG?b2a&q*0PWG+Z^XllunLMOo5Md=kKkuOQ@gFw72r5uFF z6)C>~)UQe_@8{I;qa!U+ywEK^q5XUZcEPf zp8@YkK9rcdD>wfx2U6ush&+_y%0T3i#8KY$u{3~2#S>{C zb<3wxg+JipnG{nG;JNgs2*elCWXkX7O2PG@@KPE@nTuD_pA@&gmbN(e!qXe+tsbIp zrMWKw-bs@$LI1tfo;F|~r1E1S@=@v;1>Ps=@6~8po^+fNT%V<_Qz4QsT}uJ+i^R}2 z@T(M#I~78Kl=B{*zDbFcvn!O6YQV~OX)H|!Mba6{wD`)yw$c7?zFfX9fSrr1!H1%P$_l^kP}2+eAy`E^(+@gxoF+l94jAlJYMuxjStMmdcfGL2;SftS7ML@{hEO zT_Mk>gSM6OcsfT~C082-Ypdl!)CHpC>Xg!omfKPww?@{N16V7M35SbyvIh<3_3|8A zOgG4NJ3t{;9&;4fCfWZOusE5+WbG6-%W1TM+ad?dho`ObQ%X&3ll`}XxLsaHws*+q z3IKM>J1KP$FAMu2vP*Wytvn$?9zz$(66J}sh2Jf^7Q#xBygm=u9(idWV0-1oJy558 z@}(I7$?_=Lho#7S%R>nTt^F6WWt33>Zxh@6y1Zvb{m&Ub^}Y56M$V`=g!%66ZT-wX#hEBnj^ zFhE%{O_V7KL+F%Y>U zJGXU5>+j0>G-2G6S2P9lzFdmFZ;rf=-tz-_DBTNqD4Qtod?e$SBN%w{GCH$*Cja3E z_s``XZDH+&tj+~7S3b54Hebq#y#QXxKglrmS`MlLy*IKqP1bMaviG3(PQL4;%lz-< zi20y?kiB!E@lig|7G^%lffoSsWX~8VewOPUfQx*&AI14!FNvWLS@EH z=m#mUEU*@=^v(rwk&+$_hapNk2Z*7{{y(7@rnLGM*20w$6pt-d3hDT9iBjzv6e1L9 z6+omC)*i-O$_P5YU8*D^*Down{y7V5xzdN$+ZD>Id364}Qfby0wpS^eXckzlyrBJZ zlroN9VzhE&6NqaRJB5>LmEc|Aty5+-1#!Ldx(LJ#N;S%v$0+$bLENbHq5c%BY^LdM zlk$SzdYn=r8tykMk%QrWi_(p9LR*y@y(s^=O{qqEwe8ASTDf*8Pdqoq9;cNCTKTz8dWG|k>q{31cTuLOldAxAlX9}XWVgIF3( zN^3e6d!#tWuYmi<%5;1S;feCv9WqaqvK;iEDeEXz`dm5E3T9p?FX(zeu3~!y@KU*l z>wLm1Wqm!^eyyyb^xhjK?+f(aDpM)7^iILQT7$8r7>@$`pj`L_D<2i56R=N8^my>{ zlvF28%%7E%{Q&vO+i{TjqIkuE`Bh1^p{51OPYkN|O?js6j+E|gA@W`6JPZm&%E0Py z=&O3uQQdrXE}doisbj(b{M9-1x&qW8G~gGgXH_T!s>8lRVWHZwA{2tu_}dhy2diU# zh3F#n4t4nu^*Y^r2vy}N;DxEp4giF!YpOtFvAT)2y-U<#`M@I77&_06RPC#v=Tdz$ zVP&b>i#GPl)aWs&=yG*5<@{Et9-Bd2scu{ay;Z7{!j#qOvziotMybPZf*Gx z>h(8JT(7qH7sL(fF`7JM)G&Ye-Kgf%#e`Tj>J1#j9s92Rema>aiV=Nl=@T(L~iqE!?eI zXyHs!FVH-6#EZrY0={c3e%cz>)KWii|G?mwN6UsHfBwl)XBw#`gf0rY6!| zursPi7dFqTLPvN?SD)heR5+)eo(R1Rb>l2x=hahmVs}AJGr~otdcGdqUsP{WSanJ5 zM{Cq&RrfQ9S5(JEfUD{p>Ydk|Y7nI-vea9tpk7z=JAj(4Ug-jGLtV2A4sWXayiuoH zYM2U<+iF`%h~H6J`pkFLEFajur+)VW@xJQ29axTf=_7a#)V7o&eW;Er1>PgIJe>nP zR_oC$@I>wL5~iQ3&hGyLK2uxL{_nY3hF;hIVdcGQNd)hMdTRxEAJrum5I?C83qj0NLk8hpd{$HI!)Cr( zzXo2{7d632vBWp^@+gQFs?#Xo{jUD>8u~?Q_s0w(p8*dc=EW4Pgqr_41BEd2 z^xvJRM!31mewbNo*3o3Y#C-4s%tV;m-Gt0)bKT+KMVV9Xff#M>x*cGRIhF?eT5|zS z&+E*~20?PY*^{ojY%uqtH8sXO?633JL8fRpAkdYCz74*Lswr_Gc5 zK_SiT-wEK1IpzWM&YD+K*Go75N(sbs=7u96nPK*zE%AACD8)6-3+5tv8JXra&tdeU z`Oz3qFPY0e2e@jUITXZe=E?n0rz~^3{vh5k52lLVG|#3?_$_nw>acy+oJU{uo_XL> zDBL$!r|TpS&4JY*^2oe|;-bgqMs!;H%zWx6@SdB0*bVT)X}&%f)^g3gH$eZTxy=G# zugo)&fxR}r^up_YW1d8Nw72G~=b``3e2aGb@6BD_quL+LslNmJWM23JygYLrr9(cO z?>+!8-~1&2*cWr_#<23$yzvdN0`vXdF#XLOybD;N+4;Z(hu_WDrUDe1#eV^OEuoa< zn{UaZ+q!-hS1N$Ng$;+%081+myo3do3>QG4MQjbQ&|+%`qd}G!`rTQuS zg9)?jjDlXc z4H(J)612NWeF%qUXS?blK{a>7=<#Fh5wlt^Dyv0(N4$!w-22_CP4oipG06Q%W z1E8_j;@KHy_F1mcEr4XpQ`%UhSVn9Cald7<8IlJqrX2tWEzJo#WLZ`bl7}ru1*VT! z-ct~eYUyzi9*$blT=e_jW0sbA&_8a82!zZD%TI41bJ9|Y7MW9)nMH7M+G3pqkY;)P z86syazbY_#)?(WV$#lyJI_W=W38ZvnhNTn5%jYdV?!YcsYSNA%)8b8+FfUqSXnMV5 z*-NR1%a)JN8H~RxmR>0^det)N5WqFdt%~rJWw}V{*Xx!`Gl6AW{-7Mm4a;+i18-V9 z>7vgqOU@*K+ZOK|aDT^gjRMxY7LnrZdlvglNZz-sp^!Ys(vc2}A6TkV?DNp#Pv=9A zEXG^_=VMDE{cPunWdv=4pIScA+WgGIY(!Mk+ z=UeSd&|W`lD5dxOtzHKJ0<5=hfVj}w_AROwWKE+V4Fy~0Q=Vy&HLoH-h}Bt#Vy95+ z%RZ0^vqsW-A8!5UDHIo50~KIPtclc-Bdo{9!F{ClGxaN%HH$|2QtPS30L!fSH)Jtz ztfwzQZ~E? zpv72wE(CL6W38!_ZQEq^rEn$AnoY;}o2^gF!S5F9RyrixYTZPM+HKao8z8dX z8k+##4y*S{SlMaytA%RETN@_=?6U5s4Q_(9pc+gkS_|?i|GC?mQ~_v`)jSknkF_mb z{n%?QM`8OuYwd2ZootPwi6X^XlSO6rTmSq7y#v-;FTgu!-KY&U>pH6FVQX_*oQ_ym zQ!Jip{k8|hqtRt-}t~v+PgxJW2lce|Z8B`9S+lP~ z|BUr2B?Qh|b+lbbx4xqN)H&-Ex-pw!JvAB%=dEAK=ml$`A9$J8fOudRtvM&5cgZ?) z5v*Lco|=YQT(NdO3hb)2Y8v#eSv@cr;QouXKP3{cTYY+inr%I^4~jResg$CXoH<&{k0}sJg_#=8IB5v~hDjvo@tF=2{)mV7|0IrMdT&wR1W&UR$$illI11 zaTZ*>wXXaF;GMNCW#`{p@Am`mgLMoAL?5jm9)b7C>U9xD^Q@h(LH)B;rJt_kTT8uw z$QSF4*&u$kUZZPh1=cb&2Yz!}-|U8Bq4fi8Xuez38>mc?^&tIX*4K9G3W)PdXAfs4hqSrl9@vE8DuFv9j1bbYzO?IvDDU+R*+@3 zqRjxyZL8?t1Xy89p=94mTmB(nt8CFUTduYlYXd~td{pqFZIdZLUt^1l>5l!(}6`<)i?1RIkEkZ22|bNk)4 zPS@!CFUd9#sV!lT?F!{M_u4X60_?NxSpYN1wqa)gQf$L%bGF~MXgCxO*d~qvIBd(O zi#kVao*iH`)wY{5L`Q7{DJOKy)_*>19=Ekmg8B(tpRFLCv?X{z@06`AEhndK7faFo z^EBJp(hxmk8$*e}v$iZcI!m{`dkJvP=1ntshOGrfQs-@MbS2?}O_ty(({`H{u8X!S z)XOf}R=tJ7Wn1uDIJ{z0C`)kF)}awRU9)|r`)66U?sU`Tx@|#aVA-~QmGz7(cCyv^ zPbJ{DZTS>=-my)k)5yEFrZ?dDp3QI>2JYKhGZ4wKJ*6f-u({}<^r6j@!iGn-a|KX% zY;#tH$P?S+>Ck&>`(%axXSOy^z{dz*di&7^UW4d{khO~E&{~wwxI2>Qe>+_3yH7YLIYvG{gR1dAV2&2&(Qa`k4{IM z0_?MCL0Di_~U_thgS=?RSP zum?2&ai@I^9fQQ%i&6o0*_q}53HHD4!CIodrVh2(ZI7lbZj!wN4wi*I_CFp1?6sG! z53tX!_Jv5YeGnzoQ|#v{hS_gFngs>t0edj5G6(G&_d)cK-Jgsew(~UW9O>o*?^+#Aqvk&S5aK_$v8r09)hn|9Dy8S*K zgPgNJw*kwr_wIw*pSNey>GlPueZpZ-Gwla5K)q|T_Y$h9Aig^QQ=jAH<=>=!97@!IY|*c*G=OgMUL|41pZ zclMU6fxWjsbmqX?2YY5HY=5*z;#5TVWH0OknSA>%N1*@3zIH!ce6_Enm3d0it7f)!lRIkaa^E|ywTwn0FhY7 zg`Xg@$JMB*HOQPnm((&-#;i(^||5VtzYP;9%yp_>A*)6t2R%6LbkW|RZi<%ozz zZ4w+E^8pea_h|On?U+Joq$Ecl>g#(PT`I%VUdJH1`LfTEM%I!YO;5p0isN(wi2EI# ze*$*EF{(QB4myTR1@WXKjl#22j>Z(aop!9I1IskW^3D)BxQgZa7FB<^vIR+eu=zYh=X8<`42LA~U9IZoO=Ak1X5eknS6KPR@?3hXi@J}4l&j3#y z{$)UX=5V9+_qk&;MOiN#)wTfSI!@Aste1`?%22&>IA6Yl=xfJE$_T!3q){#2I*Pi( z#XHCH6llD6TxbX42gjqQ03RK?bs&CnyrO(ao+GFM)IU2o3XJj{5$l0{aVUYP=vT)F zx~);*a4!w;&GCh1;zCCYDK~O{Z4D=}LbE;?f zvz$M%z$Sq8;Y_fBEZ5h74`OYnNjsPo=>cE}Yr`d&9AhzQH9gMiroF%k)+p`#PO_HL zA`{B0rk(jI*0a~aon{?R1{cOULz{pztn3Vsv#euh;N=2qCr$m~tPk!09>EF}Qx7vzF54<0flTHB4@?a;edi!-}T)CYR;^Hhkx? zBG-eR3_t5x1VD^9HfL2+poy)Cb?ZBjW>#$vNE@r<6#&{+?eB##ol=zk)tt+2z9KDXU%qZk)CHZ`eFzoqPeO&slEY z0yx3C+X3AR)+SHflHKfa;@sJ}pJ5ap?AIH>?P34Hg3gn@@)N+l*az1@xR-sCnxXsH z7Fv1sv%jx{&YPV>kB$%fl!bo!=Kwo%9+U^!cXmMO%XY{IImEWm$?L=H@zuclvA;Tk z5guVb8iw#FTSwp2@Mrr_S0jMkOQ}pCyQ2bw31WZwF#y5r!4?QZ*q+#4O+LmBJprG` z*}m7|H=Tzr zg+22%+`Lrw|6Tx|#{QJ{T8K92wT`U7l3PJzcmV1Q9Oy3+vr3)-FxvKe_0K4MqU zXFN8T<(6OR5AO<;Z9!;m=tUj8Oz|7SmQOm}7aLrppkHeh+*f<9ySHfX6xO zr$TvxlYIqoPjY_Af}2pzm$|S!#aTgRk<*;#i4cZyGS7iK!^ztM-C0iY40t)mnf)e0 zoafA(0Q>^yC7Kb#ISsS}ir_SQ0T9XIKS!V_PJ+cBHqo3qI=B4=E?l1($Y}vu6!(*ErMapiAalx&xBJ z@uq`?shogy7+M;K|3Ab{=NPDHm%&+lkNQQ|Ib%vlGdT)ZnBL&b^Mji#&fC8sZZ@Z! z%D6e48k)j$Id&s(lgHUgYg7TJ{}#AHPCY$WMI39|T@`aOCO}F!tEq!s#+g0>uAH;w zZTPI<=%YX?ISFgwx{9+ZpK5S5oHb@hZ*z9ghO?Hl^A?nMI8W&PtK($Rwy1$qO*f&D zQ~wMB?{aGC41N>mXfANgoYnLKv~Z5neyEMJ@D~iGo#R4>3GQ)}Ghun3)8+`*9h^Q1 z01r5AwA^=b0+3)^CUj%9LHCrCe+s&Bjz8t% z&p2VXFha|7&X1I3O>kbK$?pZ{(SOrBH<5}$d${q`;`HRYz6OLBSFFI8_HtwC)85Cu zv<|ra-1n(w=*_+J1Uet?G%CIw;J(rX_#tjH6`Buo_s}t4KkkjQ;QYA@DiA1u`#GIA z543PAt3X4z`c?3DjJuI)HOIM6y}+I0zDiTWdG1{m$OZ0OBIv@oCR!;YxF2i+iRAA7 z9>OT@rE-vH?hQJt62py1#;`AP`QIXLEVrcqL%YO%OZpDj zByelL1DnV-Uw};#x01SS*SPCH0+-BfKM3C`+#&;nsoa@cfKTJjp>A_Jx0Y&Y8Qf7{ zSYGEU=}Rb?+;959<#A_^!gV3HrW>S)>veMvx#K$8|J~z?$mTxxzzrZexDnKU ze87FR36VOvesu1qiyJ{_Cm(VTX2Y_F>)i&+UTz-U=RU3#ZPWX?^(D{^a2L>mJIMW$ z8q$xre}4jQh}(Sy*D}m)n1oS`a1YYFJj%T@gZ6)8+!QL;J>f3B1aD8duh29-&h2^( z(`Ve)DG2|Z%b*p0f}6Dgz!zMP5jgeWouf+N9^NM(g7f6DjUZmUQF=V~^0KL;w2$`= z75(<})_n)!&2w4;*FL;2sn&3S7me}_z5~Pi=wmqb<$X1X5Qlha^Fa>texp9VAMd4c zAdc`7J7IE^=S|75Kku0cTp;h67f29q$7Wat^E7nXA-oAXJb#SGr{2bKo+mY}&hzYi z;PV16g9(#xULx%sqIjqGV-%KX-jZCzH;><54+@xGi2-4&kdUjVN1!ao9cjrYaph?~q?M3YDg?^h~p zrSjf>43jk8o8|D5Zs8dZfX(22y9nN{^KOR#n8`cQ4W~DF-+qI*Sv>zG&}H)`eunTS z&;2WKw|J&B;B$Cy-UZ3!>E8t|j~6onXZgJU5xjtBdkOGDUP1!6B3?x(EQ@)*G?)@z zxjnd2p2cn&fMq=AV<6?cm*@+16}(KEf-8AbzXh<0=UWM`n)mWu_^##c9D}f)cP19X z2Hqeg+Ks&TUk3ax?_(!$O}zJQVA9NU*MYS1e)|KuHeLwbymsCf{)l^zS3@U!?(=q9 z=nGdJyy<>0eZb3Hf;-g7vsr>jUA$RafavDEQ$3IV}Q;zVz^@s2%KllUOW`BOp0PX(*`33Yq2Jv+^ zh!o5>(I*qapVA1^WBm7MM{%70I3G?=@P#yco#ZbH014&)r2z@!+sNSi4F3d8jA!}J z?tz@+|6mQ=d46IwOfK+~0^l=(|Fa8(k^F0PW25+&P^-WhL_X6A(ir~A&!r41nLnLQG^Owh zlK@ZSzd@g5I{(@S0A%okseE&T|0*pLITe|-bMMt&<*gYNQ&$W0U9-3;H&{2f#XY~la+ zM=#p=lQQA0oqtCH;5~j3HQVm8V~pqKL9%UIh#Pb_^(se(9Lgn3fH~- z042CSzVlzO?B~z?1||c1i;AjOgZx93Ej{9o&%*GB_@`+y80II_v^BzSr-g46A1t^r ze!30tPx!A70r!-jfnPkFJkH-mmGEc$22Tv;IsYjg^O)fO{2jO#{Ht5R?G{A82NQR} z3OzUvLAMZOk6_3`Nt36*mev|CK__Lbdj&z)5n`X<;4KLE3zpLB?=9HY2}>UVGXmT} zffX%hzJmC}aC1oT$A`cj7JT*+gnoi_I$m-_kVp%zzhEYvnG6t2?S(K<@PsN_L4waH zX9^aa*+%*2alvP_?>r$WqGj-;;As_XLIpO{AUq|=p@RBpf$kc7hY8mI3gH>Sr!*IZ z3;uT$z9R%S)IW$6tX>PtD8W{GH=_k_Q)M_t@TMBNO9CG@?o*uL`>!F47X&N^cUiE) ziq^jb!KyB}NfZS9fx#pR&VPsSR|L@$AXf!31rS~nNI!x}vY_H1t|>+EE`5fnf=K+G zg2`!uEi~<<3rc9o$PjeX^LBKGCHw4a9PRtU#W&$o-kVz|DjzFNG{4-zh zPb}C1!4r}e3f|j{;TH)ygdoL&@BatiC4vMxhgK@Ms|LPIAUXrfazVfb2rC4ADx~Rf1RPLaPNu)WxU~i1{G51wFkmsTFLXEa#43empGe1Z&M0p`~81glgCgf*d*= z&?xvf8#Z?ZldWLWBv?TWwPwLFsv@-sT=^jF0?+9Xb_h;=1Cs}WlYau&DOmd_a9x7s zbQ8J-{yg}8D44knx*owiDpmFh*8cYb2oCImuwO8~3V;ENU{?+hgMx#!{d^>_&~i2; z=m|rJ$AWEBU^*;#uMhYU!R~i(F{6SF)EyfWteyt^6TzGn;GPQhQ06x-@TS%5nP4wv z^v?x;t$^p> zC&UYf=y=Fwp?)>IBnVHXQ~f1TD9OiYl7zpU2Du`9*8t&FVMPnLYr+g51}t-gVQb(sSNP-+ zba}!|sy62fx7bq;xIieM1-4Kqy#P`qbbW|`#lj^w;jKjY@<+gz3U3%7EE6`o1~=tG z(LLxYgwtudsuT{^D< zxIj+tUxRR!D@+@Ol3e({E9_bYe3P(qJBHsZEcS$Hi;zWIr&gipEOc$c1M{G}FMLD| znhs%k5KJBjXPpD-6#jY)mR-Vhs(p70!~QE73Kzcxu17eZ(yCtJ6q=X&gr8G8&C)Nd zDTJE=p&uQh9~7o>K^_S+XuTg2cF;G{MuhJS!*o>0p`>X{Se*)QPlWR+!FVb>NO}Hq zVTuoM6T*}{=w1kg)4}Z)z4#50+(p4P@Zur*S_`sAG(c@0Pf=eaoOxM9zg5F@zbI@0 z$N|xPDab)l_-VND71geV=^@bv^)Njw8mfgiKT+Rjhr@n%7T@;=h2?Fj3|T=+1}|eg}6}q@cwuT=e%!xQP&1Q8pSWn*Rj47|{i4e_RwP z=-XSdq8=)IUJ@~>P#Y)G^+6Xe3bdscKomz+f&@{mr54ge(Kt16l0-@WfV(1k@H5C& zQAan1c1<+#F#;xwep(2UBC@5dB~|ndZ9mgQ9?`H&7kxJy-ZDh*(!q@DA}uYSnWFFM zc*qUWzHs2OM2G1-O15YNbx zNHiV_VX-Kk7N-)?S5+XTqVReIEE64}qhIBsSt6KJh-T9qRw*ipgzqZR0G+$57G=@v zTO;zJBOJFyaqb|sqPX=K#T}8Pm(JkVi7wJvwMNnFc>vxORnUXjBywzouvz4^6;4}3 zYw7)M7nv>scu#bTKA-!dsYjvf5cyI??SUwCE_9uuW=i0?MBAv9(=FoD4(Oq1=@5iH zqQY4K^ommQA?y>qjm6Y5c~DgS3Z#!k-TUEYSX6i!Zbn3*bVOiO6tom>#zddex!EV8 zML)yMQ&Hz4+_iC0RtqejiP9Egyw63=YH$;x(^PPMA^Pzo$ZqkCPvFH}tj+-3L%e_i zZjV??=hr;NN2xMp@e*I9gSLCc4uJ^2PkfBdxa}9ury9!vF`v$39u!Zf?fPNyiZ6ih z6aRP|zK@8_bll;nxVj%WfAPS4m;{I&sm>fI{`>^S6eOPY4}`&D!4i-V@vBtkIwqDb z0(V^8PW$>37V$?kVVo52q&zZIJdd`$r^J7S!p&*1_Z3`knD`eukab2JM6<|QF(yPT z1Y!|oXXnMgP#^AsxIP;u;o=6mPZ44{)kY)57dAo{C2ph*a~5N3HDc+&~#gjd+}v-`nB^G}+gRIh6a{ z5ig@GwobgCGPeeCYBxxu*q^o+cf}tT!gZ6lo)+q6@rH6ZYZ1GK(E8UZUiKVpoA}r& zkaqE>RQ$Rxp0x>x4)I6^5D&zg0uZoM{BSNJb%_t#0rybMeIHzpxQC|TUhztLRr!oCV+6aq+bH!F3GKj&_kl5F?mXCo`QHu3SR+W zuOyGAvV9WSJBYhqvS}T3-VzlSzR3q9F=f<$KPWj&Yn89Wo1Tb6l8XQ8FOqiJG5Sfa z(ffBqau&y>CLfi&{}n9#CA0gX3y}OB1rjKEH5=Z7B%7QODOlpZ4J1Tzn0~+FnB?D| zz#W&UsJd`MvTHLePf8rb2ox%Dj|Q=vlB7iIVNqze|$rTm#E1k~@?rUzI56vrCbLyaAFbS?d9l zG>JcrH(laN^Gt?hC=hWv{dUal+@E>RU{emfUsDipp~OUqLO0tr4kA4 zh07#SFA$+zVtHvZXoY0{p8!@$md(R}t0dp1!lqhM{Vqt2WEoBUw^J$SQZE7j#%Bv+|+)+*s2 z1-U0VXraaYzQnW@ZaO5+3*hvD0SDPNalQ8G-rCC4c@eJEK=wWuCR<_o$9PB>9_W#K#i5boPb4=^A^cOxD*C?HxP(m`zh@HX??9eQGy@1fAvv3iNG~LdQvu&C zeTQll?$ST!!o)*b@&kl>q}@)i^puL5;LJ<<$u$JrD}68w%YD*WzeBfQdM%XlPj6|J z1aW<&Qz&ITARTdq=|QO-Ep@)q>+R6_NiUaz9FhJ*FWymU9<>Plr9XavfC19_mw*eD zE~eQwNXn(kMX>bcQ-~BIwYd+#G3k@np*t?k+6ylyr0>&a|D^OU)Ko2#L#1mj!}OGN z9Tk&KOF#Ps-om8(8*p<*x|PmXoRuD@V&OSyBW0$N(pFl(EOFB5X$TlEb@7Juvh?>j zkOb-IyBK$(bl)q`B}pqa;I2rmH^BE*>92B_T$9#I;WSzL*=lep(y$PaROvGM-NiI% z>^K1F(qptQ$&g;8XZ*T!j7k8R(xD-Y;)ZlPrM+1e>8_Wd%$9~|!QPZw#(}sco!SIp zj&#-xgvga{HNt70G>G;}`O+L}H55pvkAf?dPHY0MNcyxAT(MNs4PA*;MtkT|X~(Mw zSSG!H7^GbK9VLKO(kV0*R!d!IYN(M~c5VfGTe^@kxLRoxRp9SPJ7^nOC!I(6YrXVS znxGn_3)X`)N(UVId+oY4I!_qF5_Q3L< z^h@eE+?PhsqSzsAjfd`mw8U}Q zl%h|%I;fT8C9~XwaIdV2N+tVb%dMf?FKaV_^Oj{()yhX!-U-*fvRO-^J0u(b z4uHe5o4)k^9hFUagn<6CVmjUtAnT@zXP|8DC6FN54?>V&8G~+6h|Gq5yz7`ODh0yh zvSjL`pO8%!!1qbnufM}2RAx)3JWk1U3n4r$b3Y9dCR>#S%QG?~egF5YY=BB(=VaE{ zXj&$pm+hk0_=4;^I?Ng_`*aM52-)W}K}O1a=^$j3%xe;a(XtXchY}-mq>t&M>_!1d ztZd^O82u&LXVhDall@KIgm_uiyMSMo?Oh3Bf-H`*_C#59HJl~MUZ*YI6`AxogqEu^ zF|DT8WNo#$QOPpv3-FdA>--bIRGCi(5NWbl%iyg<7CH^WQdv74%rBGG{|#Na%rhUt3VgmGm9n|?kXFe8 zmqJ%9+e_W;8kvmF3*3=e(Qctm=1$pJy-ctK!Uox|7I2L+OTj59@5&yZz}T8(UwQ-B zEPI#kY>TY%O$b|Mk+flLld;}{uwC{Vtu^;#(HS83W&3F7)FJz)1=ssP)jECf3sb36pZpsXqd+#}f% zDgg}1#7y8H%VyBs83E2r+;9tn_6U}&=o#e{h%YpiI|8{?#r>_sFNw2Fz2wfEIHvc?iwD zd*$!Yx03eB+aus~zkHaQ`rh&~Y9;x|Gia?jAYb7La!|fF8~|VWE*jw>`O6dVa#;Q$ z6FNV6Jk?E)$e&Gv@TmOc81>)%<)IsJg#q%5%U}~I-%gKwkX%O^=5xlRV%DfvGcuskhyrutf#{B!yw&&k<)pgS*j{t&J&$X}(mB2xYp zAGj#F9VIQ%^3yu%Kg7rzDDA!||Ce5_Sou7vMa9db_5yfWzEBG;LH?Krk|;lX1eQs1 zg*&(_a(}AZT$S&ymU;5) z))3~)OgQ1nm!;yj97iv%yu%=X8M7$UnY>fVbt9-tbl{U+@D=?#LS`iD-~F`M{)6-Vg)b zU3qsgbWQSA^Pp>%`%>wlMIKJ&s#bZ^moRCQt7gJkyIe@ks(bQRegXWx+_HhTA{}!3 zy^ubT|8Ne7PWioG!F9?1qOC-?JmCPihw^kfI@u!+qVT=)UI&mqc{X|Lmv1kH?*X}H z9k@Yx9lczSSj#H zcW(ptLheQ@z;4BIN+R49d|LQC6cyXR?NK=L;KoxSnhnlNVVi(}dliXR;PxpZs1mSW z;Y^=_w}MrK2tJBpD)<~w=%3*t4l3r*MffV7BwN59QZ&%odRU>1!l3*Vok<`^6ihkD zQH2jB!-0xrboYW3_VkVfE2>uj7oym50^BjhCpIuSu8R z9-LC>`{C@gqOkxbVT!UZU~)#`Qcv&SdBx|HJ6%vXxd0Ka_>)Ru5sGiAq8+KYdIrKM zh2k!R(TYLZn8zqWCxg4F7m|PIeGO8k$Xg9k zuGmf`nhHh3GmN5AVOjuTmEr?Bg<7r9QMOZ~h^Hy#wqnM0aJ7oMf8qL$!h>pkb&BHu zfvdMDmQktYu42nX)TXc3eQ+bRQryEL}^KhM|oI&mXY~^qB=>5B?-0&{gTgrK_!Zb(ukn;RoWvv>f zdCE0Q;U-`CXD&#AvSbc~h049O=`T{I|AxU7E9ZU$u0&Z=4lkuj*EN8bDSy8MUAb}@ z%@-BQ32F>gD!-<~3suU`sAzp#nT&PbGPzdi^bEf5C|{-JtWG%*1ZBN)Ha%Aj%I)_c zY*gM)19w+Bdk09966ZAVkScGTMx++y8BauNRWj)bY*VHdLf5X;Z-ke7$}d)e+*iJx z1YL*nnht;m${8sz=~TA94`-GxrR_IhyOrB$W8bT^&A|}+lpHn?{mPi@;0BZ-n=y(( z<--wpd!+o#1;8O?GEKpcm8Z5qIII)|!OMtpTQr2DN;MS{#+38+z{?Y56CI&=sysv+ zgK?$r>#%&L6tLjsxkXv96YPX?k;Xos#g!)VO3WXeEO*lQqBE{Y8jP= z0#y7K_zYB8<_3ceQr)GN!7){QFA&F7QB>hQp=y-@cuI9I3Z|!3S82WqQ~kOLzR#$d zsgizHrKX( z{_EJOrf-Dqsw#tW#A_+e1J^*Q|_0;dkP^~xx*Vk1eAJG0U zQ}u+Zzc*A{zJTv6mHTOsY}HIEP~TLQ3Se?eb@~xVj%rCIEK5|y??6|o+D<>uP^K!N z>AhU_Su-M4s04xFDpgzP@v2e@S`n#QB@~0JQ9WP)ep^*U?`@sxtzhau)T>TVLe`)P zI|9>2)hARUx~n?>HoP^d#;E+$tn$AA(xS@p18G$)E{Cp7wUTC!cGWq`zVE5xhk?7V z(j_5Mhw7v0&^=In`WOK_Ri)JI>Qc2G0@tlN`w52qP_+n|fn{=!YT6DAxK|bC3*dmt z7yz3=)u((oeWdFA9Ndt~i`u4-Rpm2bGOTJ=05GCTUIpE#YAGedW2)o|=$@#OKSHFZ zs@ieD$5qE^&$3&cOUseFI`t=*c&N`E!bR*+FV;e5*{^1-1>Rd7M-!Znx|&K_2h@|P zk>;oVn&!|WYA?F9qv}>_(DDfKlfJDpZX z?|{!R^+H;q&!~UC2rp;V;&;HEQ;TUobl#%A91nUyJ;NQ!aJ6v}yhW(9E`mg=vo=B) zt6uazxJ&9ON`#10uUZ7BN$OEb{;#MPEQRo@I_(xNElu4x4%b{!IZ~p86ANuH~yOg`dNwKz)rK$U^nzG>{@Say3k>YKIljm8dU11Xrqd zodrahy7?Ul%hk?Qy{b@uOSSJxbv(^Jwd&I^A;cZ^vr3RU^+wtmH>oGn>(H!zLM7}L zweB}q-dArfgRVneWpRP>f!g+4kREk-BQCU8y@}@6K6QNy1~aIxoD1?u{V7#7hty|6 z5%94(`y+%HR)0;k#u0UvD{!M~-`&8CsXxwy$rE)AAAqOolywk}tDic9JX1gZ6r*t0 zbWVbahvviM^aStG;0Zv+s`;k^#9L!a^>`nRz!SQ|nyXca)q5zahM*IXMGf z?rRb$d+yL2q;~cL&FW}`@7DZDIs8M-LRtZOG-Fh9@3Uw$^nCPdnm&fjfac~@kU`Dq zxllgR@F}eu(hNQZH>`Q-J#ZtM%e31V)ol9*+*6GU<<#Sv9p{02rg=)~(R0nof8ldN zqhAi(3(YQSzPfAIwE^IvEvAat9_R*vR7Na5pMQt+i6egt=(w{ zp^r8>2HZg{lPWg8T5dSVA?+LVsvXuQO^41;+c|_$9MO6nhO?vE!MAXs0a`cO6b5Q- zXipiW&C7x7VC^QVU598}XevCejkCN4dO{mWy_}QUtFOZ}R9i-m-YKn`67AF47`km| zwK?>ZoYO9*72v!!!xOj*S{wRl)NpO*DsU0nC0q<9Qahiv%TZeS7WjBV4CGA&xs8JKAz5hAbcISN7-*QL^T#dxOr;cGm!{KyTeO>QMUV zYN;1N-HkS_Hqy!h$1(_C^y*Y`D?9o1Q4s3{qs+q52Rpst_1 z1?hrl!U)!F{tLno-AB|FKdvhm0)Ijmcmd?3ZZd6DLv_LQI-SzZq-E^1?sFpmXLM%D zvd-$}68xMlYAS|yUiXB~Q(e$m`9l}3yZ0vmk-CeP-yn_BZJU5;wC)#LEH3Fb(brYt zbW?3H{CM3;Dgs~D{cR6ng6=X^ER%HlFW~fwuA&V?vF_bhfGg4UQ$MU!*EfivmFe<%;3{wjgELt3Ub;oE>eL5NCV*|QV{UC$7AQuQ9>BeY>I;1l+fIQZ@ zQ^|2ycgqh$8`WjgJ2IwAo(u9s_oV~KbKQ9zbQ3ybG+e*Xby87tw|;gOaPE4xH(c-0 zf3_IJ;;FA`1j0){V>wLs>Z7Rav`??6`D(v@C+WQP-c-gpptqY3-9f#n7@V*Emn|TN z^hf^d<>>9G0C_||i>9li`s0+~`|AUQ2pFKR@_{f=|5GxY1?e9efD6{|7=iA%Mc+@; z)(QPxN^?%?yS9M~)xS3g(^LB8MR0RkZ$BGcn0}86x-)uBABJ{TA4UbpbNaV@5%;`4 zhZ#4qUW;y#PLA^o6}Jxv00OX;q8W*V8I- zN#Ab;(>Q%(J>10WJLzG)tlzX4zy$pwF@TABK{L1{{kR4uSM(P~;O44+4pjoK>0_wj zpR5lG0!h(}Y0^y9FQGC@n*QJu2-EdjXxJJ0xpcd3=sA{b*ktLWsHvE(e=`u$9DOFG z*17sT%Fy%l2~?0P)OXu}6zSu%&=u>Ky^Mfm`p2{pD%a=KLs+5zcM_ac>p#2)U5&n4 z1Mar|XG%Ql^lwu)y@1hB=SN{qg>&bokuJ-`w$3atA z4(QLGgK$vK@P)}E{l8nm4e1|@(fOAVeI>mQqxwP0zQ^=+)bkqG575Ot(|6LCp6iom zft%3V(_mic2Ph-iZIDu5*xlejl>iUJe9GMR7{2%hI!{CGpCDd_SJHsnXBY{GZoeU7 z2`s%0%sb$G44%%^|2trCpjG^!;lmd&^)(!Q3E>YJ5+oSnVZ*K^Aby76tuQ%aDA^3B zM-8V=g7_OEsR0*Y_`nUiAj4-=gAO)4q|!r(!IQQi#|%el@;YwV)dt-OgCniGCk+j! z;WO0WMIV#plwqd~>}f;ZE`+~ihgMVX8*9@k&;Vju;Ukzc3;gh*ANj0=mIU~*BL0j>3!+qLZWf&r& zAiQod=&72TX;^n3>B%*!gaCX$Wf3I!z)^!~OR9IFxj zp5eesaQ6)z2AFmjB0hugfkBWBZ=HsNRYp zH@(mB6HT-IhO0FB4HzcMfEzTVQdalKAk#rOWbht>@UcNMo6f%s8!pj|JYraV3CdB! z@{=HAhQH{*z!O6_J@Vs*QA*pN8MfKuc0V_4q@Es+WFAQ7h(c5i&kDd~DWRJ z!37!9OE9!xmmP8wxYcMUa`(V^~BMkg*z zPaF4mK^JD+NIj%8#tI~^lg}FKXtq3OJWXfJ&Ks`Qo zaqV7knZ_^a1jr4G@ha8xvy8>mr_DA-yMWv@#?t3|%ji$}T#oUr$@pM$jpf}SdB#PQ zQsf(t$Uq8=%U=he(D)f0axOB?I0j*{@ezF)xWpLp0pO*^@2RU+X52ghVY$&bAC?uy zyAiOgG+I8R^{C4D5zTYeMzcR`YK*rv5Z*T4r-D(f@jQJk{El%Z)v)V~k(5){8<&3x zuEFRdNBBmgIT?}e8ktn3YclRCg|6Aytb=8Xkw1(`t;QlMOSBpDsA|=2Tt~+h?ir_9 z_9NhZqlsSQ4r2_ZR}YLw>2>Hdy4-+Gmod}@-nxyu`=EPhTtE{=k1>SK&GZ^eA`rgM zIF-`weq&WF$bfM=b<78izuUs(k#WXTm<$=CslfZ#DDD9_Y|Nys%ZM>1lve*y<0<;0 z|5KxumeFzJ2-Q)Z86&tD>2ss~WRM9Xn>ODsjA#FaZx0iXQrtbJU6jOonp(#o^fEoC zQ~G;N&W90VpJ{>~hy$ibYq&mWdP+@dUsLxZ=nk1!wCg==8n&kXgP&n8E<$nN?X4*)5@O0DJ zB{0n}ecc88b<=g~4Q871sRVw*l=D5fER#qMlWbGM3*c^=-l2x!Ez{3^(B+u=qd;;^ zk!vB$Gp#rdFZrekN>d6<3HP8Yw3vPl0$XG%q4lKLFP|!=0jL- z%AbJ<4W@tUfNL~aJ}m;hYsz52w8<14jhoPHdQK}yi|Ga(z-%?Grt^AjrbRaaY&WH= zVR_GFy$rhhrXb42J59I4;k(NeKN-4i(|7bSKQ#UQF$UUW;?nHiYYL@DzR$GvB1pe! zQ5Sp;m{Kitg9lBcREK@pqelrD@&Wyx|YvJj^e> zMeE-l^BJmjc$$;bVB=+eMybeNvu*;weP($Xg!|1rYUg>IqwT=?n3t4*J7Ato%h4fo z+CGpY<^dlBJZcvIgc16i_4ITGnNz7k6m0&Cjun`gg@5SPvFbW$e4ETES%(H#C7bXUw%DbQ7O1bvV7n%O>@`hTfr5Bdz#%y+0? zlWvZrEGxr&;42LAx_MzgbeZP$vjDtdj-}damifF2mf2<|ncOtzw}Hzw+nfW*GcOqc z$v3NLaVjvoDZv$*m(e3zWaiK@zhd+BbGTilX2m5qvy_>qufPz?&1qY~R+uja!?e<@ zWFlaVdC@|c-Zl?W<>Zbz)eZPMvxyJOdUFkx9PgU{r6jM(yv_}gn$0^Y`|dNpM6YkZ z+2s;kKQe!q0Nt=TPYd0cxtAudadW5%I8Tc!Zzp{FxQ?Cx>*qR+lmV_@hX4$5y+VzL zldeT{^y9Sa@;T6*b#;0jB;2)kCje2dhiOM~(e)=kkObEkw2EGHz56$C>8>4graRL$ z<_So)YY5$hTqX9zKh&q1kg3O{Xqq)Mz@B^FuChCXEuaQZda+<)$I1$evlTo3gr8fTisG`0^a8K zCA~5C-BLb*uETA38NGiG+$w15?{xcu7O5_`)CUlDyFH?Z?V($TehMJ?FUjg(YKGmi za-vKt*XpW?24wZ#Cd4kZ+ExrR$)1K2}qyn0CNw#a4JZX!RX6lYFf**U|4^9kNOa zg6Uza@ApCKXT_$kA{?~}rc^S}swE7uPFlV4JA|jK0yH3}t-@0gF3jpMy#r^gM%4&= z)~Zni%X3y2yFo5kElvOlx5}kVC&KDu`dx`gt0p>w5@j{92ZM>WT9QZguNW)qH^5%B zI-dlmu~z@mVx3^Mjy5xiR?USV$yV&&AWX4}O@`AntM7hBz;vs_RO!BHb&{%;RaTSf zi(A!JkE)>SvigRaeq&aXTH*7l)u|bX>t)?H2fDr18)%00vu4kLiRFm3J?$TkT1V0+ zWq1p){xBQDKx>{gh8AQ!XAOkG))zK|gjlyx0V>&g3U$p=tS5&6mumflUe+}0 zwm@*{*6Ir|$*>ms!{oZPHRTAI*1KtEbHjQ&Rc^DaeQ5iUZLywP1LaNY-zguzW$j51 zL5}s?^pNCPYoB5G`PPB-6C(xIx8{J$v&pvuKHuge2}prWGd1Q4Z9b%2xyUArc3s6b z6O^%+*hChSSn3a+hkLLvc_iB zW02c6SEGTiwfTaQxH~opZ6I|vm%jq3w|O}OBW$oK$OgR8CSe~&c-Ll)6Ld{BGpB)T zwt0y%;1-+cIk0TCSxHA$+ibM|<^ML(R35!&^P`1&;rDGm_ycT*%~~pnJg~WBM)*z} zz8&ygHsX75+HEs-3%Z9kuBRdFvGIBelU|#kDd75Sw6W0j+tkwWivgSV_aPj#DWc89 zBb$vM!*a-G0UO+78^dnshHb`Z%Q<2rze2C-sLgYFd&g{Eqo%_Xn}050Oiyhxd~r+0 zZ3Gc}|3*fvlnai4Af zMhs@Z?PaR&dfR%YK<8s?oq$NkZLiRilxsU!4qcw@Dk>i4+s3!kU~Ge5!d)x0y+XUZ zBHQ`2xh=MBISgkdw(F>WYALmi`v}r<+sz>uRE6ysy1|vUE;qnc*?QQ3RNLO947kSj z@+=JIwr$ZnAhouuE<^WliiTFwo+)2##wdEHL{M+HZ%QVehUlNNpE8w!DaRHf(%_VL zDerkSW$hb?x5rLE#Q;x>-53vUeC>Wc2k9X@6|J3z?QXb%^RpAU!RDA<@kex_cGGC% ze!?!rjDRQYj;)06Q+AuP!JW3_TY-ex{YF1We%3CQo`iFDiS)>xx6@E&b-`}$AiPA` zIn$CBZP(rfF2>H{{~YwPU0ftgv+eR<0q~|>ni-L9*@gT7(;Pc-2Dm&s2NOtv-K<=U zu+Z*<8vqp9EuiP3*iOZQuEZ{m=As(Ax;T*AcAZP%y4LPu9sqaj9;U&h&TcK0`x@+4 zvVd!}bGL}W-nR>ELEH{InK#G-yA^zpPP;#+;9|P%YN-tN(5{`Hk{&ycIskg@7Sn#E z-!9w>AqMO&Qkwb5u89(@A-i8_H!y6sJQ9{8cD<_+cg$|a0gUOX-7mC>8MoW%3cxeF zFde;re)cn|d>3wiiTZmH_RU%F9cga~gK3og&jaA1?Tb2L5@R1p$38CF->2guvG#WU zfM2rLt^~Pkzv(&RCfKi`Vo##I6%Qej?0+)@aMgY_tvuK4&CPI@Z2xTHsG z2VJRs&=_=O_IvJutFZr?j=)sf56l3(%D(+mkZSuv>cro+ulN-3TKmOZs(;B&FOI7z?JdV!Jm5`^K5-XxerFj`ha7s+V*8F-wRr70K+ z=w`%ELcoWNRw+z+7@^3AC-*YcvB32)Hm-+mfU#l(+#q9swycjB^FtvVV!TPmh95H& zIq*5m=ox^?2;=o8aHEX%X&_^aG|PK1eai5nZpAoboSw^Pj2Tp*e9pK_@7M(6Xd}oA z#=EOFiP$ZN$+U9hIQYkc%XJtG!(j3p7M})J;4qVB*+K^{ zrIIODi<8-V8= zLo*>f@5rYUofjN`rTiqq@q2m?q8ttFATf@C|G?y;W5zs?SjTa1z~datc>r8?{6PvX z$>J!Yh2)B32rbH29UstMC&h7?CaN^Y<8Q$<-O-kInHi4R4$xh9%)EkuW;*`uhEd#b zd@~XwEO7j53%Ei@+X*Sg$sy9NXGb$UDxmgk%- z8UGE@={BW&u}<}r;9qijdkGM6PSJxP@lHZoGcG%Qv>&=FPRIU%o2yRM{{y+^w5A0l z*~x}BYN<}v8hA-_`g<Kp*?JAXiHT!-^5JB;uF{g?Ij^-SFs1)QaKYU)a`15*!8g6ZJYPpO#q zXzCIw{tr#PN+%v3Pkp->y5XtCv?ZRHiocbG50>di9n5{qd9p*OQ)Gsbk1 zsicBTDD!vPoS$N@c?Oek=0+>{j9@Nm#05q&k2c~yMOm1P1R$cBz3)I7!#qUCb1pJ% zSAoPbk4*va5_5$XTpZJhZbCeBkPgdSW}dzZHwnzLUtp5R+_D(quP~nrFs7@_sqNsd zG5-pI>tv=soz+QUo>PL{WL~FJ7`K=&ia>IhmWKakYvwLGd6&mLL4Ku;+8N4lh-&73 z+6vS#lYWEAZRU#~Kx&y=XpOnU++f)VWgT-VwUO$XTeaXCm|Hf0G%~kRN&YVLK5cfI znD5hK+|1;UL)gMxQw5V&Cie~K+L-&Oiq_6#Er!#3OczQ+JDALe&^=(T?7)~hnSJr# zx|kI-YjrahP}cB}`CLKummX#SrG>rB+8J=u$Bd*xQ$MqkPD~6kKcUm*kC;8X;CqPK zxCGo|X6OQtVP+APW=5D>ZzJF+Gx0f`jWG|rGzrS2p2!v^F+G5k%910E~q@B-l#+uk;1`rVhL{L#c=?IEcQB_f9jOOpD9C^)rVSiBXnA;5m zxNH75bqnvA=UG9qz&vac6pPG%9tIcp&3~T>qYuoNZ^S?!ns2AQc8|<;eIQb7Zn_Lu ziTR>w;5|0q)f?Co^Hx{bEH$@ByA40mmK6+}<>rcg0L|Tut%KmHwcCm`Fx$Je(soUI ziw?R=9WCa)f7HSh>OKE2Uv5rD5wSRpvCt?z&mcyMmJla#RQtePFa*t zi}sv_1D$q~#avnj&sz*X2lWehw;28|TBO)QGTCB)k%EXU3%^EaWLwydf@q$_mf;xw zb&H%~khx*eou=8F7NdGWGT)-hI1q1HY^EUMw#9ndw{*v%hZ=f!Ew(Lyi+dKevj7S# z1bV~^EgBpFiYzuvgL|S%C{XbeOwttdyxZ_r#)dTPMudc9UhPgRyLMk+#$+qjxZCd?9v6IVafr0 zfrTq;$y%)PZ+~EM$_kn-_-LN3(8UFp?6WayQ~wQzhvb!YRjZ3oBxGIs&dqLm`PL4qf|UydE**HGnL8o z`Ce8otcSHL%Hk?m%Tg{50?1aDRzW03xnVhYSC!F&pqH!cpa3CHY1j>$H`B%2?~^hHUKMBexZSxBBf-2i&Ety+J#Z3yuS#% za%IdF@SZ9!e+H~V89_^3y>i)RfCgnjI6O5f_fWX-T6wS@lJAsH>B=-I7r4XNdu8{B z03VdW6nQlpm9Z3Iw#f)5740ur+L|4RT&K14yxa2N^?{N zzX7&e#Z?1yQjPdHO{%(3d(c@mwi9gbRb6xe=Av4#1nRD;L4Hu!r|P*BJU3NBE_m)L z;}6~8&_ku7q;$XP(iEJir)uC*fCH+3Xvy+YEwF)xx5`Eh$%CrMi2#RGd#KrXShbWg zARm=a03?s7=1|?{sH#Uah`y@)co6+mzy1WGzv{@(uyRc0*%f-nRS~(s0#w6{RObp* zX@@{GNL53VXRvDcrx;9#O7#|sp{ih-sKQh)Zvup?E>mcHLUosj5vtXrU?x(v#2(m5 z)kKOaPpPtXa1o`tH3_Cqt77^DvX*FajNGoMxgPkpZ^7#pxWIX z*csJe+SZz=>iZLjXH{9xF_?3zY)aXZRIRjvoL60pbcRNbDzG~=uBv>#0hX%@%!G?P)t40FUQ>-74&rsy;v!%-RP!iKxT$*l6vpyZ z(`XyRE!Ay$4sNSfehS_lRY_M2=B{epCF zKhuFdRjqyoUWF=Z3&vEbYJUdeGu0&85oWAXU7|K&waTgx4xg(&T><6`l{Oa+YgDxn zAl9n-OoC{gDntw3OI3agK)p(ChU?Uza;E(NuT&M`AU3K#p_KTw%9GZSH>#xWAihSNTta8ny!m}0>0>Iw8hlZSfaRxtOgBk2Nrs&`HT?|`~5-4|YJeK{O@ zt2?NSdQd(14tR&u2Plj^tR7B@g^zmWZRj0Q@1>&5QT5q;0AIEDeE9WKzoHt6zxv7z z5Ra*s#bZpz)gO#Bdj+Wb4~Mltb+r`+9Hg#R0Si`NtpOIIjv4^{Q1!wAPz+O#rI0>c zt@sSY6Y97IU=iw1DH@Gb4+@9gNww#%0H@Rmqd<&O&#H#xY4u}oVA1MkH()X9;ndNL zRgXDq1RAII+zE|%^{Ty~Ca9mPKs=*PNC7cXJ((`TS@mdIlh3Igi@-}#+hOY*eurid z6|FC*4Gth)R9D`|c$3xrX^l%!2d2STs#;kH5&RAf-vE;NHaewBvGPTA^~40y^>$5Ji$s``g3P|Q^iryC+q-SbmOUQ>^w zu=_eZfpISNM6{@?~z;BV-gEGeZ>cw<{AE@K=A@Wc?gPPxu)F-GQP^>=p3p|ymJ1@mx9;@e# z0r81?0@Y?p)sLvyP^P|60$#bAs|R?hzCjg)3iUUgAyTO>^#_LEzlk@4!z#7SPI#(T zZ>2i(bM=?BmF0!{9HsI#>h6;vQmc-R#qjIYIrWfysm|*Fv0mMsqJ{=_U|;ZFsVgI( z(5TK{1mbITM>#ybQGcN5`K>y9BlO;>eb>6m@%iHO7tgaN(z!L)&87VVdJzAQ`S1(E!O4n#XqFMQEli z1{SI5EyCDI%~RTWa7t4~-#!$j>22%=nbVrC)K-tyeDN9}M&luewOCCkt?6-^-ZUY{ zYo<_;mY{h<_s$v39jeJDYLci{e^&F-3L@t;-%>=9qzP^Y@x12VPKaF4to|F=Ma^uw zS&}t|hX5&>E;JLTYQC?b{zIB3JprRg*Q};nH$$_8zS-fD#+%mGOijrgn7OREVGofj znrlw*l%=^m2w1kJ;5|T&CY-X@tD04mk>_eYvjxc0l>5T;HBA>cs9)D;T_AEp^Kuoy zP0i>6h~#UQub}V$zop5iHSV^?hi0!kn%jTC?_JGw+9!5Tvwb^63p54mAX2Eg^cY5q zG%G(~`1duAG_^d?JU4;ShZ_AmC_K_k&IGYo6CDq%M014NJ&!fDqw#@0(WE{HR;r2b z4N#^@z^Y=zFXjxT>c~^g##aCpn*J0oRBFs<>VKwL#X+%3GoD6RttsW;>A5DDa{m{a zxBK9!Ml*rt$6Cz@>Uq^^YI^~^)NC%quQj>nm!@0ZLe*iGMj_;BIO5;+7I3!?$&-yPlc0qD6Q;!w7qCcm9tU%Gj-SY zYKvBb>Z092H?pf%u@=OA+82WkM@Gr+lP6#v(+14}@wj$&A%-8I?Lx6>p!Nq(fFNxl72AWgOQ`c5qGc8!hHAeE02Zbl zG#?JbwOc7=I-zZ$q&-4wPFa4WHiJ&$q;?CH`cG-^7^z7Yr9GGr^t9HQwm3y=2kC*u zXeX_Q(O9iSadVv3XEn^kYh7f}PteX<0Fg7=Jo>_dM6E<2%vo*M5Qv=9293czlcZfS z86xMk$+Q?>(2lMJc2RrF5g=K6dOj3Vv;%FZ|B$LR(3=!#+99;PJ6)Sb`~NbuKT`SV zl6Dh?gPB@4Ur1ioI#3(ping5Qi!ANxbHK8-dp~ZB&>kp--c_y5Ab?!$DT;RTv_5}e zOxLsn#sOT{IMhKK=!PzYWT@1!oCCZSV0!yVX+(v7Dz^|Y>MD@3Ao zMmtZOOpNaHF%XT_O`xuPoUWa6%XnQ7O^gXT1FZmObe-wSBwult1yil@g6@F|#EZI7fv}mZdra#{imsL(s#M*gQ81RKyZ0p|({-UnTAMR; zBbPz+lCB3`p-kOh-7t#Fy17?j=8EoLy4+d1oa2zp*7@%MFGn}(3mCns8$i3{a&=bw zfaU3WQziSFZb&<@>pII=fE&7)LV%mP*-kKxPBraOzonZr3fOI3R&SbZ@90K0!S-F< z3VNyKp04l&TomYH?Z7M4)zY?-BAwZIjPSm0D$ODfbT`T2LtPM+H6H2I)afYJEum+- zL|06urN_EYG{Bzdo>s$jsjiI{>N4FY5#W{Ud<`)6R2Re3{@V&&vk$CQ>hc#uCcjG$dc^R#Eu+Mt7|Sl5cgsAD_Q>x|PEr+N6sch(W#AeLfz{54t%| z0h)EAXbVP*&SWUCR^5%I&~MXy>jA7?x9mI=I&`HJpxf&|{0^RjzJ)Hnqy8zS(!2GE za$rvSeXUT~qtB&C$XTCd4s5T!o_5R{UG$Uba=Yq#)B^0&x6T69O`l99ba(ykOb|Wv zN9d{AuTQ3Zw4VC%KL8HsXU_uBOTU2bRd4;*R3bg7Kj;T=NPi_1V>+zYQF`H{zt;?r zBYMsaHjnC?955zd{TGzv_!;$^?nA?0|Mw< zM%BS!{VW?uhUtG<1!A~fkp$Zj`fJo}iqs1;pm$Oqkq^mJ`lX*iBuby40r9lnNFQ&s z-ufDdG5XPd0I_rT;MItgQ`dhg$$o~9o<9=vq@L_0Xbj}OH{;gWv( zTktaV2}T9rWxYu=6tCz%9|mTY-h_TdGF$(y1sXZ}cFLEp>c83wkgGpJt5Tlc?kpkMtU{U98vr1(6bcH3iy_^`7q``9wcO z1FTd(?Gu19{f&E2DA)Iy4)9d}qy(TszmV!DmHN*uq3}%q8FkaE^rJf{|Et!oJP!BI z^_x_nzR+)=SfWN>^bW*Yy>tMePQRM+p_lsF7jR#%56pu|gTAT@Y`@a)reLd4zvl!b zU+Yuf<9y%fr_dg;xBA2_7}GobzNx^P^wY+|%6okjm5n~=ZN8%K|7g~qqQIy{-#}|k ztKRe*xMJ6Dusrn=GW#trtOeE6 za?uIsAF$NYOyOl|HU}c!mWOU)Xa_Abr-69LvU3xNhbV zzk(HCOAm^R{4AsBTT}ckr%@UTz1CQ|Jz(z1rK!IPH$dx4#@{E|M< zD9dU!#&p{9FA5%_El<&Q${5Qj#ZZs6+)lH5oTV|13i9!m1s4GlEV(R*p0P}r4UlNb z(LHM+ta|twTq=YfZus}}pT(DusX()ym*7bo*sG*t)pJ9dtFM*vfeBT8QBMkOK zp%H25PQ8g!1}4HxlwlCHR8Jeep8$nu!<;wZ#Ta(>$LM1Xeso{N8I1HsLA>D^?G;Hd zWMu=KF?djVk!Y~~f%*?;4bv{b#W};JM*vBN$BO~Z8*C;(^nxMhZ(tV z78yF<0P()TktX{G2In-WKQx#q0UjBWDc34CC=bA4i9vZ7;IZMyWbmFC7XFLDlp1_# zF*TMM3a5cuZg@|1g{OuK)T6I3j2r||X>h*_(PxIY&G1xZxaJCCwV{#1jpv4=v>LuJ zyzv3A#$Yu9lC=hJ2Z+=erqde$FAXU#K&&^!eh-BPL;jE8H5#JnCVOqjbHxbX7!99O zo$Rfll%CjkhGk};HW?041^>O_099c>82mS4gv|!-BCr-i;!a4m8g|TvNSk2`6;9d> zzt9BNVYo;Oh`p8nbx1l`HR(Wfw5m-3aI!kS6U04MHrRHza-c0M9#)H}tKey+8-%ksV6|X8G`y_x?16b(4RnH;gI1G&0(Qu%ZW?U+ zSUsR!3rDQR_5<&zmFg0BzE%ekLG-g)ITAzjx4Q5Tz%eW9hcI^BYOs;E#s*kjrk6MZ zt&;CRG03WWylNO06E4RbIPFtxW!Hc$PYzG!&b%P$NSgW790mNB7+C}kaycMH5b)0ntm3>pK zpMM9@bnERD`DIv-SOsvy`iF3UTh`-Luy)sa)Eg)iTA$br$p_YG2oTi){Fj@O$580kzW}*c@I=`>!9`%zp*yBO7n(Ko{HmOY{0;n?l;t z^TcK)1rcR7`CWm%uo?Uc)@p2g9>ZF#%~A?j>uho;o_lGth&n9wHg4&_8f-4n4e`pR z7kO&7X{Wwpi_JND((qFX6e>E~PR)if<6c|q)ev>DHK+2At8K?BP~B{Ie+d~6+n(3J z+i&{`MM=K4J>tOgv)xADq~>pX`wmX@nC)#Up#|99qrOL=?eo6@Vr_MEK#aHjotDo8 z+srM%&e+<_2S~K7q8|A<+waR^Gs$Rs=_34|xAm`wwF|aBw4o!})_xuQrr1t93XN3T zEkOWjw#hNDoo?$%7cs;3EX`$?Y_~)LT(vFWz$MY;p; z*gmDs%w5}Q!2kuecWFi}w4F*l^82<=>4|$_d&(QcGFz{40Ohu(BK%g^4txWfmA2Nj z@2$#qHHGreZO>8I{K7WLNHI)}t$z+=YHjP50@T@tU4!CF+fYB4skfa^b3%h{SQfBX zw!fJGG}$8?{eC2P_I9%=33jlXl?@M$b`LY)cemZ# zI*2&g>8C<(kKL&OMu_gU+jGahunS25FVL=OD?A0+ElP(%uw5&C`$>r1W=hpU?bd7tG0e{EB_zY` zZqjOY!tSfi^!!EGeJ%##xSO$WaT-o6=`R{F+fT(pXBK#b z#?3ZU+U>&DQE$_gDd}yQeQc^1cy25X8JOhHGH5HsSyp@sdgoXSP3TGNCJ%oU;$14ck`7)P8}}J(r?c4%AcGCD2e`x{X`f&wJ5B|S z%dGnrT$3wo)d=WaV+~1MC#j14d=aPR#My2HZx2^z3gFBg9tMTI9K(HO6kWK9^u8N?c>6A(0AhoeT|X2b03nR@4@NfLEO(-{|ZGCZx(X3*&f+Vn zlN88(SuJ*w?s2)eGLkcYWfypEe6Le{C&`PCrA66?Z#oVu{=Do6K1)2jc#-Z_BE~gL zMl0e7S7#U>dC>(jqtE{i`kb5OXVG_+7{Z!evq9hS@+2g8MNz(Q&pIfC^JJ@j2IkGq z{|og@R)i(@<45}Cb9zF)9!}BuH$!QP>wkVRjsxCPeeGN0Zxo>qeD8$gpbG;*8qDwa-m_5pX=lI@_(aG@5#+=4+k&U2tCZ~jb5J%8)_9;4V09g5@DmalN! zo>vLoozhxJIw39G%i5ox*Y$i8h8P4hkw~B7Ko7_on zc*^IF^#HGkYupBKpZk3-96sQJt-&kjTCJe)lv_gqUj@guLhl9Fd>-Hp*Gk2%w_JT+ zczDO1rcb+x8}lb5jqkaoJ%N7U7J9>IGq;u!r`^1cHWE7VSqwZ6zJy%t=gnv$JiseY z!Du)iRSx|V{1R&UM({(FAja`IPaqP{Z=L{$iLbCCzR8*iSIRc3%H0E=dO;O1GrFu#jrM4uVy0@EnDCRE@_w zUpGK>60+Vw-9rd8f%<+SXD)c2f+NlJzC!CG06!ssvI>78$oLjA$Al%c)#JF}NgF8w z1fDj71q$aXAQ~i?%>pr4_=VQ3Q$k7xtVIcpw9H2fL%P9JtPnz-wiIFFOz={L!c>4X zp^>7KbRm->(+nYcF+_5OlpZjhC%Dk#eND)BrTW8lp>h$x4dDefdu|GUP{})Am~a+D zyd{i10PK;VnnRaVs67f$B50|?`B;em6Qh43c+ll474B1MvrHJ74ZWvAJgvx0LOH!> z@m}an8^t~dUfFQeEGPzGOf5oDMkhRfZNmNzh_(xzC!~6~kwBVg zOC`5-u?IcH*Tpzwl;}T;o9I_zije_9rUEf0%+!gqdO`H1X#5uL>%}jIK%+r4H-oh{ zaS}xd?c#V!PVA+vJE7+w=}&>^A#I?PW53k(Pv{+xoVLJ`udPs5Fa$$#}_&wsRy%Eu8_*NG{0`O_Xj$!qZu)fi^;%lXR!S zOOir513NE$`2bj!^a`s0UdCHUGkuOUjU=y1kG_N70%=nbtQ1Q2)QKsQo>Llg-zb&b zhGMyNoT`vdr5Z|JE2LkBL%&k`WEqH6(wszyR!j4-w2058^QF*#A^q?IdatFyR4sZV z$<_h9mA>f>y?4@)$q;FhJSqD8Al>>Jdd-rKrmGf7Zh%Ou)b(e8Hp%GJ3j^LOtET17 zMYeG$+`G!UpMxEGqkp-53cvR-l4Zv6Cl>!t? zW;re^uYk=c*~3tXoR;;VFPDgx)ltPDM)t59usGSNr|=Lj`_z~VYJzNYBG5CkwH45~ zBnzT<6EbC$l>1(mb!r55MK<<(xX+f=9Rz6J0$F}Z=k95j*W zo;hUlfhMoRCU({swvWkAw6QzPWKBG#TdorK%i-gL|UsZE3*CoR;K9J0sR+>kk4F8_qW@nI%@n(z1@p2f|C-KM^s54vCGNWgkRuMII{j7gO#pbg;>GL0^2DELoxLXJ z!~k3uxsSV+Mb-d?o1*P>3?^Uv@jfJPi?;@2gm=Vu^oiUR|HJ}E^S@UjPP9PmLGyp1 zcz!%aQ6!G1PvpMni-bpfAddb58V|*Y3}BB$%^X-O7N7Y+q(mG|S>j_c<}bK^A~sSS zS}HEofLA6iegK>0Vg-dmMbaicOh1q;c7yjwvZLOPu~=FxL8C;nZUgm+l=vA$%cM_- zfcR9JxdOH;qz5;lSSele0;rPKmH<>s0aWCzk$O_FTPGQ5wXc^v=w-A9srpkGdnMTw z0=$;SU&83$NQf0r;=94tpS`WBLm%XDnHA6OP1;8a);W~KAl*#DIUX~sE1|nBv-AbXJEj!Z# zHgjbEw1aq6HhT<2a%Iw0_{)Z-#5V8O_?LjHX$bCN5f30 zNh$}CFq2|>h{H{ebp|+LvY{V9q{$dZfRiSl-h+!%CflC^i!zzH6bh$JhBSicD96l4 z)6-#E;P%LWrkb3yTy3OHT)y&E0|ETxt~4lrxy@9Z=rQ?>k4dh4`BRt)kmu0E5-1;d z79v6NCaMPo%ZG%)cBs5dZyK8X+yh|Y@-JzN(+RoeIY5M5H54FHz7p9G-e#5u(Fo=1 zdjN})SG+dj)S~4(=`oCv51#^~vGN^_(1?>yo&_vkUS0=~AlK1NdPZ)t1|U&Bdj`N+ z`4nVXc)2-{GVUb#Y)b#n%NKQmiwp8Q^8hZ&JEKiLGFGXHMnP;l}hXClM$$Pj{ z{+p+0I|YZ=6}1l_b5rqlp ze&7HeD!!*>uUL`z1`3ZAzmEiXqL}@$7^euC36XNev)gb~p*YFG!!t!+p%b3JD#a^$ zwyPBdpFrk=qLC)x4#h?)(d{wqOFN?7OsD(^5pUCW+R@@`8cgY1kg3aXh@3FpHyOh| zZ7NU&^_;1*19%yx-jr)(o8A?GT{rbig}+bU4_!wGPM4rb-;QJn4nw zwqF-QYuAgtI6APCPf681Hjs)31a5-d{0_B39vm!56bl^ioV2@@XhOV=pH` zv4&M|g5p~ykAp%pdqmk>8yigbKnG*T035jdAL*R9E;pdy&y|MofcR6Lr#p1+5_%ze zbZ)Q~rje{(57l?7j`wLXS90eeu=YXzDj3XW zc~|Ohw8&+YOzu{kq*}F;VpSRR_bAj}I3H(4*-8-iDlEPP(M3_24@pmRoxhAdZ{c6{h0316v@M zz^!qE+!^i_-J^+Idp3AyIUnlEpW|Nl#?X^E3yS;BbIH?zUEq3}Lh>TFi)yUNTs>9F zQn&(Y(xq}1G&!enr;9;M=N@Y){?FjDY%vpm{FqB=qV#3OgCXt5h7`h?KeKBC@fcIA zhSG7?(h9p}ESu((a`u)In5V3RVweinNDaD5b|DDZGuCN6Koy%u?bK>!ng_|}>@8Jb zU$9XW!_=@{Mw;|%S%U{e>)3KD7=6ipqiLs}E&T^Fuh@&}FzU`dvI6G86>0(YbASE| z1s|>tbrg?q59dQ6kZXDf5X9Zu1)Gta`F4!{B-geBHcxR&dO$CM>thXLXSkWskWAz( zHc&UP}eJKPRR&+l@JXnuXf z#nWjQb8d&AUcwbo1o)U^){uO{T_#VZTyIJ{%eZaS5iI8lX~lcWosua2t>DZjfm+G+ zTL+D2+~*cxR&ndc0juWBsnhkGJ4rXx3vT5CjH!leqLz9sw`(~-9Tz|?y_Z~wKhCh8 z+g1#b1}@&2@`{$Q$mB7fiq9A~sO``;JRJ0jdk{JrmYE`O!K6 zA6}x2`Xn!#2W#p4MS5krfWJVIYYo4PS~vDWl?=T7Ld9rceu5oc^%KIE21q6de$SwO zK{#>(;I&Y)5xgeh9>t*_gk0Ly&?@w!5*FgGT;Wgk z@-YbWYYL(B+dF3%Sdtlm%6gmwoKeGN`*T>Qg%8-SA704kK9XId&!qgO!@$wlV0 z9+JsyJM~Lan9mIuO=Ues!B`p-7eFMPJ)z5&!ORkYU1k04Ad<^I&?1`00-6D?v00HH z>wnB92M%wrxKdCHm^bb0Dr7%ChJFz{`Tzk<~~q_lf#+* z2$0KpE1{9coukyXn43$HdkOcBw#_`|-u(hl&TXPf(+e)Q29h5_#qj%<)0G1>aoc}^NDF7X z03xki48{L@_$AbncjmX!Hiy0ZTbi|9_%CP&?*ZPa7z&gr!i6tiY!03uU->T-{Q2Rz zIEiEY8md}{@ybUu|A+IF4nQ=TpF@*y3@`l-ki@sp6LFsJONFvad>w^Fnfz8-axe1> zjzIqkzlkc_S$sdbc-j0*9>g5JuM0%3^50UcB9~uGYf>I>{s}x>O#V;*~!+ZSm4qyd*AkTmWS zdR+t6UFc^D^ssRMA}}AJbrL)s5&oiR{iqNg34LE-e*=hqLLfEV{e|3UfMbFWefD9( ztLJbZE=1C%g%d*eB7g|tJw-o}LIf3EP73-xz)lI>s7fCt^c(=a(?(&(GoXor!wqPh z6=pudIi(6F17SN&nD!hXT^O|rwsVBQ24MNZRBvFngqEwYc3*Ig26!Nxa0Bt75Yq=091>l^_;DySYJ`O$ z7*nm_Ni$EqaErotH?i3nwhxLbs*m`IL9~>d5R)injTh4w!$q=KMyXVm_(KS6UKb7f zfE9{Iih(^5XWxLxGw~0am>Wc%ri>=h#TW->yXZqf#U3e)qH=dB=mvR`M*Rr=U@4cD z#W?9VT5T>!-(8xUVhr=~%nS=!SK4^FZ+ z3c-)alD)x;l)b(TELzqliRQmJS?q4eoRQhygPHTP^rcWtmi4s-mL}^%vs$4n;0$cH z%4VJfZ;y$~bm+O5_-zL8GI>YOkH5)YH539&R#Kfh#N<^BJcXHP=mtJ*(sKkHo;NWS z{ugP*{tDr*_Zq37^_@iZ)FH=P@c;J%D3$o(&_NuBEM*dPD@ z(KLge|25Xff&BS?BP_3-=!4_B4yr(}SC56Y4Ugy^-uPiHWOg2+8R8$!d>sGPuYsfo zE6WD(VJBWg>Im!p8L(is@Gc}m*p5X2QLKdKywfa)eor!*l~E5RhM7_(5zCD4ZbBoD zb*9fVo(-f@e*(KfQ`i|6dIrQq7DVOzv&_K*ymYpX?#2xE(h>TX+59U|zryw(g8Qq? zD;^GW**=Qlud}n^(7V9~(ZtZmMuY)tWm^h>d2-H{kPPHFBVNe*&!zf&C`|NTJsR}B zAy?q4-;j~`f6(&xpnvy0#T-9OS3-FBEehaA?zg}I#=h|deeyA?XHH#O2+8UE7|`d8 z{TlQoY0F_}c@ecw*0vtR|LgwEfbPyjd&vCLX)x74j4>-=^cC}80np5RM!`r63w{OZ zR<`&uKpXpcAmrQG^D9u^%T2ik;KDsg1uullr(Q`Y=SuT*829`;@WQ#0DZox}Pbb4z z1Q$z{`ABZgV_+w_`<)?jihE2ohA1QFKpp1O+*k<%j^@Tw!#9Srw1a3YcV;_49QW`a zSc~V3Bf(4H9H_?E%Kh5~X4*KtGeA4%Oe?P|f5Qrx8_!yBF7EuOQb>C6t0{-u&o{mX z=E-OO21#GONe#@8H%_NyDvTdR7a^Q?p^QI<|MWL##Pa(XtR?ermw;Hv`@Dr>5r6O} zfKvWI0C;8mBH9?$%Kt_mLmPk3jt0X|uf{2L@K@%-roB+y1fGMSe+4~9A(!?8>=rgt z(&r>BF-`)yM=&>ssIzcf2GPAjiw>eL!VbD#u0oI=ynVs}$^+a4CGCT87kaJ%C=#6M z)b0z5t>G69(91L?A?R}`lndW(gvdT|47oofE^`LaPyFOKupn{KM7Td8-r7L*zti}} zM^F>QCv>^bc zO!v5GYOoY=lW4{-|@DSJoZi$f=?}uDCEeDUd`K569lyjjVr-J*F zCX8Cngl?@muDc6F-g0mH0=(n4zK32rw{;A#4late-t6U%P{!uMo6wdGSN=Piti1U5 z)B*P9YbdBa$k)FEc8Fhd09YWuu?&L= z=hL?WMDrXKWMcT7wUCVE)0+U|_~tgcYP{9Yz!Lae>fW5;`+Qv2`43bkJIk+Wg2*|3 zVsF??;tfH`+O2^FIJ-LhdqvD}tW#s64^{(*G(rg%mq|l@B!W@AJ+7P+NeDeU0Q-j|r*_ErNQ+A`fTL0#B~HGQz7`sOlIaIX9+PgGgLho&`Vu1vl>Ve`5W!Mw z2}DArywwnik{;3$8ZAA+H#`34iHW6|XVex-&!^v`D)Y=^zfk>eNpdETr8V>jEDNP& zd--S7HC^#*GL9?LZiBvRF>NVX9YION#y_p`|E8~K2Ks9{r7C~h1>^tCDTDF<7GFBU ztyd`(v}Xq%0dZj76w2&lTjv9~v9oFr53&uZRR21}icY}garSNsm;o%f1y~@nYlNp@ z)~^RZ6k8Vu-f8xJCO`~xrCqFX>_^(^fHjk5&;+LKk0IP){Vc(I$s+qe@*TU_8N4=j ziaI~Lxy-@fxpMXsLGHE*la*JJI zJDCfm80r$YlHLu>;buF*=v~f_%H8+5WF8_%0-*e=SfYglN1 z>VLdub`%=CVUFDaT3I07>ut=c380I3hq;tnu;Rn5q-J~o_X7%Th&rZh05O7Fi$~OmYdwi(wm5D* zS&QeY3t=XKi=gwp$Yl+~$s}`+Y42MKmrWp*TR|aT8aImeG^TTQ=>Qqr!xA{W#0{n@ zdokBRbJ%mvY&)#HcJ(xX!>^rvv7Likn&tXA-)mml5;{qDhN ztFS2wn4{=D;D5pMJPJWxa+_ZO)N`9@W@zHvslD-@Gx-J1K5)k=J!?Fo(NcNKt`z=u-Qe}=cA5IvE9kP4$I zd^BaVseIj0D5UYXEHU16KK~ea8GPq!ki5!wr(x&vf67)A{E+a|ACNpOJhlRMT(CcjF$D;9i{L0wFs_;fW{~jc z3s574zu!Ueq%f4Cq1fkOy3Zu8I$0*K+scoUnu-Y6Z>Of zTtA3D5u|L4qEz_o9C&5If?ME~3tj60o(hY92B;8Jy#XqPpH{=~GvP9|-l_!aA#hPI z1keQ1AZ(8Y_DTrq0?;TNo&d?$LIT|^Ey9hP6#umfD=6P+6AD8C+J&98qq0Nrp%vU- zoJezxgE)cC-cg)K)AMfedS_rx;wB1o-Ni8!1$l@DDqZXskEa57id{;een7lB8{nvT zVIxF*MbmxI^TSWtg6J>SMA7?yp`x17nlQ0v5vZrdeaqo6T3mM=8ZqJw2Y^`7dJ}j_ zVnrdqd2#qOn7JS}}~P+5_Z^ zk24^0OU&O!`+siZ8^u7qBYvWQ-@Bs8GPrmo-lw8;vFJyOTZ!0CMcc=s^QXX`h-;6) zcB%N=3`mxV$G(GPxi}&kycgmEdYEg(1iC=AV$yJk)QRfZ@bFSxw*VsbV%JZ>YY;=^ z@MnA_zNH>rqv(ieNNg5Mc0#5_^r0}LRW#iUtWCVR68i1p7!q-oMpNFsSGu+pJQr!( zb?{uJ0cIe2N#j2O(OX)(43d7*lW`cfzjSjIh{vRp&*AX6bo_6C0I7Ksh=E3F+s6=8 zI${cqU}*4HvIu zVe}>5_9n5k%(t|reiqh%y{M}Hzr*D|bS6u9g0T(FdRYB%~ zB5@aFiWSG{0zFX-Q^07sqU}0BrNZYlc+VAU=$@-nh`V5=QSn!I=)F~Z7z*A8MQ8>< zi=u8ahz_P*b&zy2&885=*|dyC=wf=Of#UyzrUxHG-`BK=Vw3>WD5`S=nU+t5OsJ_m zi!PMuxio-Nrh$}_o-zH7ruTEE>IoQHis{I{kW4oI%zJLC`>53nLHk)3fs$Hw8*EWE5)3OB+bu#l#2DZ;^ zw=MJ!n2nqR_daIZcEI*Av!)*bLd^Oo{}*7Z8er(VuPL4wYUT+2VM8b4IN~Dp{6;RI ziGR#N3h~GFFM-+dtNT#=^=nC2s4bYg1B`|4w8Ss=UJlWvUr=tj?CKAoFHiA>!V10! z=eBZQ5V)&+`r`l9-d5oLk*k4)wL7PQzCNZ1l7C&HCvWqdZm_WBUMslU6!g^YklMig zr-P=kU1w%c{29v>=YS=$3hev;Pn25v1g0~&O{8&!Yone!tOsv5?;8Vk zC;rM=xOeAS888n%HVVA`{5HxhefTSd07rNys?P-S!zsZF;(c7``bY8$X<9wWpZo+e z@q7hgXZUV=fSu)c)1;Hc`{08?TrqVgh?n>svqQ>fbsD+h!f4*|S{!Z8@A zx8N}m*g>I+w!HWY9ksxY2^&^H-54g!pxp%F!soPjM+=5LfEZy~Gi1&Qg;cai5>|Z* zkSLyiSqcL9u{VieutW z6b^-p-efykEW8YBN#bHkxzCG^v?=I<=yw;yi{kB(&`TCqdV!ZBvKH`C#d)+0q>1CH z$doP`uT#Y~LwrW>fnE}eXr!6qGwMQI76;LTb47F=2P{h*N4?x^QAxkxmm}8Gi}_c@ zwS8ebSFFebFHd}#18`03dmp@VY&VAFQ}MHR7)6D+jDFIpQtX%k@JuYEl1Y`g%1Bdg zwU}%Vndf4!ov`*od{1Fbjc7;Hd7ZeEc2?Aj&wL=+AP%6a{wsXVGO!Qg?hR0A7B^9C zu0>280Aj27hT`%z(RmiIcKkRg6gtG~1t8i>(|!l$Aa&4O z&BI+vHwW;L%pL&jm#!zlg^yI-1K@}>g9w(lr zug5%*zMTVwO6dgMPc>4Bfrc#|nTs*)myI+41j|;8r{^z4RzaCdk?eOH$kfPAQfqgQ z$>?98?``ss&grPhU-VH1nC$NkYhflmD91TvQcw($3npj#L*cr~Uq{HV$uu=28%_S8 zGutEAR)Xg)kH`jgP#%~D5nuUX3WbB^y^^T^A0h8c@n*EV%WcRc%A+ZpN|PU;f_%2T zX$!D?`9wcM z1ZM(-C|phhoKkEmg=B(a(hyiNUR1a*z}aUi`qB218wwAKB#ISPG|yEidNK9XTTy=FB24~1fOO9?AanaNcUE7<9Qz-o-l z@e43(+4A)OEv)~yaNo-M(k0%_NhJVIoYW0OH!hJ@DR<7=44%BW(et2xm@5r}CqK@V zBF0eeD0X7qYAU(V6=5RxMPmeCdIM7v>9~VdHUSO_aA}dkF%bEJK+kIyC+WdfrUva zCZJCq^aIXjN-x?^HFX!I;?rJMLuPvLzmWgQqYwU{ktRUiICJ?Juz$Yr0~oU`D7O8j zt_{c8R!3lB&RW{KH8;r`hUSgy3d#9bM?(46owQo~77_%l1?d#GEu4N1+(k|@$S;nX zf)iNcaS6wzVYDtS%YBOfmp8tE%!+?TfU+_(6O>iP^p!wX^YqaDK8~L5KhDgAgEj5z zar{#%g6Xws(V(xZpo_Xb_aZ189BA>_SaJo&O*v^8#9ub(hkcA*WUHyPZfQn~MX&c% zYUo@4E8Kn=VFiJwT;zW~jc%JjtL2P04?&`y`3zX`DLs16 z9#dxB$}}{y@8%REWtjh5xo1=l_2GV@AR&ZnuKBMGn?4k5+m=(2&#vVN{{O6B6s+}K zKLleQ7e=pEPOLiz`lJPw(trHgyxs;0yD(~MeHy&-KO_F{Yry|~9as9l-;Ra<|JUoW zAJ5^N&Smi2KVvC|HK6TJ90v`gR_2h$!{Oumt%E=rI-X*JVX|z{hrb_#L5zr@eGsEh zCV(==gmS&H-wuMzv_AAY(TskdKxX0OILIv88A+eXD4 zH&(I{lJ3m?IYjoe5&j^0vKY!lyqK{(AIyVn2<3=j>`&4UXP+T6M^mYQ=J^Pw?gJ3X zmW6?LiVdQ>A&Lc4esG#y_y*VmW?T*1&sgJmh*Yt}8h~ncgbKLNS>6*2<^}uswr~xr zl0d9w1A9Zgo;eubLcf81L21T27D)4DK37Gx_A>5QDw1F$+<0KsT$Ud|J-7Zmz+3L( zXy~u^)mv%S5mV#6#o*Mx@H{PuhHobTkPbh@*5fmq7^FyeKmBYXDgXB&A zcDNB{^7(GmMZCkOehaLapZ5Y-3I8j-V^zgx)5O%qJ5@lVgAb!ZlY^k3GLECLnWjP~ z!OaR_ztEd@<9iE#x`O8;xJ82KE9{$u!5kNS{s0yzR8wY~DU>Y)$QI_6QvD@QxP1%g zO<`ygMtVn>H5sCX!USr;KE&=g5FZN-yca?-N34alazKm7uHb> z)h-zAA=x2(vmN905;G})JtBU(5}2Rp^D{(_iHqmpS_FyyCn^385hu{eoDdIE)OAuk z^bAI$@Ujbtv7&!3xQ`cC&Ifh|^$Cb1iGwG=+Ep=w9=%-g8uhgD#JQQ^-4shr;4ojz zoB%8L#2f>7_wo7~)Qd$cn$1eZQaYtF@gI5yjOF5si2ux7(x-V;gY0zzd#XM@e@f>~ zz||k0Wz8C7+(i9J55)T&upKCSRxSre}ur>hrNs8`QfMFy-p!v{2otZlig5 zmm2z4nBD5fv}8G~z8i%EU#b`Ae*TpjuhaVDh&lpIi?<3dk`Y>_^`v+A`?dPGwK3Iq~?9v;%Da^JS;eE@|8BshL?ZQp3Z?etNoOP@Qd0O8VcWObKXW1+}6JT z5ozvf@xKFmp#5bqJb9$$WWw1eT5&Et3NF|GMW5jn=rOc(Ua2>t-vTYvo3(`cNRRpm zQH%6C7m!V{es>JiD&3}s+|_yqdJHeoL+Q@^v3{Ix*`@lnRfx&;cXz;);jIHQ`=h>d z0*YUw|4P&HCwkGJVb5>K1HQ#0u|#HKZfM9B1(X`nOC$DtN8@6r-v zPBR*%^9pJ6b^bM4U+0YMf_#>g(PXwX=vNezr`)8K*?Y&y=9B#fB{vZm0WyXyVs4tB2Nl@P#tLeU7Va%crf3HRv z-RTB;&1gFv+5DI1CcQo_@TAix6Gfi(#ZYCQL)eLDPc6o9>D$u>DyrFt8E_1t2)o1- z!xL+0(Y$zw5*iw$)tzQ|vJE4A;dH|@Uww@!N=@XgTuD+UDV6-qBxRAZm0wFz`YNY+ z(_|$^eW>!$$;u#QHUDF>k`{7IQw(k3vHvub0r`CTx`vyeW(@T^V<#s`|+P^PPbl(6_=jDkIzzrdFjT0*X%Kc+WLmJx>4&N%+vY>q}ekM zYYoGBOpkzIKB9}(-adO(dltYqtT8KA-nafX)vt^0cux|5abzo6ozWHL;5;v?j_Iz3{puAR|6AAw6?ApH!+h_6#4D znfANi+XD=I9?ys6=)L*F=bq;FMAK-K%zp^igS=4`AuO_6l$|@mSm@=Grx+3ZXppCl z9X!q$>b2jSVr=Zn8%{Ta?f4S>(J-D^qJ-HUJ~hft@clCpdT*-dXhR-h8sT=uBG0Xa zR_XEanQ=*j5>w$t^5Dc&Q9$oeud~d|ggCy@qqnrL9rfI;*ED15oOzk)Ju-)+CI1Go z7G#If*&zG)8PB7pR#IF_W=8Vx#NUjvzq;d@)s&CCuXf@KinQ140WUmtBI}7{$*Gy? zi6av;?B#6&4%Q1y9!ZHZhsTY~NKEG!a?B>Y=$u}U7i}>@_`q>yKYMJCfJOoQh+xdgd`HlF1!&)1A z;W%?$9e&~mt+(B6y4f*-kK19kRA(qWb*I_NF56*FRMc3;@9#9D0!D6a+qM?4Z<7YVWXH>_kF3Jhf*yvjEv3)$+ zNl;#$V085vooMKQ+69bp;`gqORpXk7Kh_n0tP}q{^@wwf^_`H7Mgikp38?>S4vpc) z>vw1@lMmTzhUQN83nV|Mxbz*DzUR`@T)L*o2xx4Ui_fmDbJ^V50nT`<3DOvD|9*$Y zvi%el@Rmz2a_Pk`ol{F=;jy$3+Qor@Y^>FRfAtjJGM z4Oh8ziA$HdbeT)ziOuiO*jhh@k*l%wegUM*U3!yCZ+7V|F1^*Ix4Se=A@V@^C~&t= zI#y$QU3$MuA8_e|E`7+Qu~PCoGGd}H< z4+qZr0vxNc^DceSr7yemw=R9fr7K+en$&nXONYj8h!go!W0fv_+okW@_5t&W##ih$ zTk(^J%m((oL*{KQ_s2jHaXd^Ai)TMcO;<$_OJL4@3g<#6vVeLbev-onvnEoHar6+@ zLh4vYC$R`TI2f;a_F3&_E5m>`kz-EGwa!PzcF7axl~UJOK+-{g`JCrWE(Tqge-nEC)<>< zR%C-2YfZKpW9`TSb|8z@Okc7A3X3I+RZFVWG}0)1vJ9U^7Vp#-2%F0m%Yb}oi^y6E zD_}n4U(>u`kvI!r2a)})R9?rP*JjV@o57-3UM-sA{(f% z0aA~LRf8DIB8xGBXIrNJn}#jo;mZoAC19hZev2$#_AVuhXYH+IvAefd>eFOVs^chl zCF$JP6n2MB@BmGnLmAV>XJIejX$eGhYL4CC{S*#O)0+kD)Et^72hvWBp{d5|D<-<4 zsp701DP0DIqXL5|KEkPsatYAYOf{qkRDzb10my?seE?GDhDRn2ZaFBKR{X28A zCryUUUXX1Uw6+GT#sh>eg*H~GHwD3U@$Uiu7bK5u>!9$qR%qZ9 zAA-#nDT@T2PdLX9FB7;@;6D+j$~hUszAtc8J16s?cECIR@Ct$R1fE2gE+${<0)fv9 zypJ%AJRkm0;IQ^i=1P0uXMVU);CTX%AWZG%OI;-Jae+4yrkTfwR|(u8(#iY@;r@QO zMBpre<064G{BWtjdj&2gJlhYKIk@z7C+}NCm-*2(B5|6)-ChT#3(4o%T7k<2ewXk8 zKfGSx#{ypsB)r)V?-#g1XD9O~glYfG*X9QV&JsATGw@|Ud{E%M0v8jm^23K5T-wFS`xa3h zn{vLqzZ8kn1n$-am|jTw@DaYN3nuSK{=Z$U_ApPXO;aA#71MbnkL&7?;;vRxo+pBE zPLU4_b4wU+loQwu#)v`@Gx&rkD?06L<(<1xDi0sp4QMkE&5?xC_!2_TJbVqIBYr5Ie*>gs@V|Al z+6P|tBN@D9cO?2cfcNc=L{&gZGQZJ$4xxD_FCY|s&UEh6RMZ%Ll+aF-R}e}7%95$Z z^1vQIWft$y!)j-2!i2t(kLqDXbl!|uE3oRO3?|^8j(@mKuzWNK{;NK^wqfil{|re~ zt35xBTmm~?uW6ht{*nq<(4IGs23iJ`hP0IHWIjCF3NemjOX(_~6O9JH47wHLgXk2# zvai*`=zuxe;*Vmjh`N;~`&l|PjjuyePcuyI-4uQ-+G-t`{m5kVWM|C~c<39L_!+O) z6N&#}GP)a4&a(tv1RBZsfc~J5(b1C57PK6+H4|B<07ptZSKt%Cg%W22mrFd)!A4py z#zyd%URImBPih)_0S_F6DuHP}r$K!qEL-Hf8E(#!IdA?EeIRpwi!Vt;VmxWxRCv9< zaQZ2{l8v=U6#Ed1+ZKF6PZayyWMMMpVv(^IpWXOslnv~wQI5bJf%h<8*vo3?y&_XC z6{rHJLYK|_Pq<`=hRhTAKrCaSvO+I@t?7k)fiJ}|mXyz1^?}PTO;(B9AoapBK|^p~ zo91ihRbFS`hVc6WzYAQ{lfR-aBpM?UuMji{YvpX&8t1)itL**)hZ^tw%Gh{5VIW%L zLQTdW@?AsFj$pe@zMIg*58!d6AFEx>V3RShVIdeuLh`LzJ70C`< z?@;`$K7~!?4`Y$>Q#dROEf+~6uzrs8^)7Ih^mvoN!?2v*q4K3MDEGOSg<nq>9V;XD?eMz1kvZ>re&jYB8>!{Zi9KTODjH0sf2!QvdzxWrw6&+XZYLrm#F7 z(;x7Kmz|PM?Gzbr3Rm!4C@%b$-s&lLH@`j*T@MJKoJr#asL!drBJG_BJlF)t!H#iJ zhDncVv|p4v8=pp<s zR`o1+NF+@J9PDdmVBfI$Qs57I;3)>XjFwYmV~fQ~`n8}}LD9-i*MkO2dXle;M=JyN z^i7bUnAMzSJSEb$dqZI}HE|h$(%pp``LuBAqds`Z6dpITs&8Xw1l$1FgukRo4$xQX zS$;hMmk5}w4VbSs=S7)61Nv&yyvC!8BHK=VsZ3|?1Z*JPz06}MTd*-=B!bP8>|2qr z1h7!FAYi$KS45eu`zfr2uNgut7AA28AD)Cp0)1O{dI_j+0=wo^#=yE7?dwbiEo*9e zgLlS_Kqn~N^<$OJ67HFi*f#jd;>VJ3&wSRZW*pw(4}p!) zWQ8^7fyua?_u0m~CtK~*yls3eY+yoYP4({cmC3lRAK%Wm1J$eAZnDSNf~Z3EUcu#L ctGVae5roy}uad3S!FQ09*2BI7E;+~l0}~Gm!TRSj4;ZGBZ4A5B8no4qeAIA ztB9^5>VkNn2!zGwBvsfwg%C5AG_-74c%o7W`dA1NLgJtP6n&MPXgIG}+2bBrx$;z) zQe7Pr_BwnT?k5=7QN zAv>#CmFo}6BK+*|OZkM6FHhFDI$M;E7A0_mf`I6JkCyV1dPSm%$Ls%}twi9N8)Rq&^jodxb+*ZFE!k8dp zs{E$M*KZSBMXTdgqSez?<*knAEE7ster zbMT4ac>q2a{a)YdEV;4OexGbfnO%0`<#>rW()*A4R{822Hw%l9q5X3DXvt-(KJhXz z+Wc|m*c@@{=+skZ@bAP^Q~7t?sVV$haf;GR8j~wxAiI#$gg|w_9Os6e$6=DgM!R8W zA}lVB9EC9V%VBQdI7a-Q!v?uw!#L~<4(sQJ_2aM)Pxh|pJ=TxX7)NeDHoSGe+@7O@ ztz=8%$V2}&ihg^GD3`h^N=}fZ@|TK^E#7>(reDY4#{+V6<4gM&K3(%pPOu=a_URhg zOijzmTI~`AxBjjz)MW@NZ@+Rkz(_}|^ z(~eJ0lYOH8uf_?{pBX5d}DSzQzm=*<#^|pp>n;v*ST((JX=;cUk#I=sEN635pkzXr?O`m_$uk+eiIcm(O!-RbZpMv4S9*$3U_m`gOQ-;sC`232` zANaH#A?yr%=-2xc;rY$Scg(Dm8IS%&DJ9Qy45bdre>>kQb-8@snP;df)uorS*HF3g z$sGp`Wy|z$a)s~-Y2J-~t9Z>cAqwMY*Q#~L9aAi^ICE%)B`(g~-bRSaGcP*R5-Tzf zjI%`C_-qjRJ0l1jX}sc0@Tu(hS7ny)8}nOO!ZKcIWr={%p`|5)#-CnBg%}I#{UU7K zGuaXm<9ZN^8b>ZSMXGVO@|}3m zC(M4iMHHi~#`_ErG<|&y#9YwP5T^5RvFhMd_*G%MPz`W=ixBGTno)}9&=vSfy$)Y@ z;*&N7Us8me8~mzA{5q7zSizBDxsHH112Nf%@*DLGWXS7>0=P1T2<6E21gvDBAZ5xV zVO+&nCGswcSj7>oTKL*RR#vI87twBl?pYX{jZx4<`Zcf;=Dk zZ|@IN%?f${8N&g6%8)68?ExHMz?SE?1@I*UVd3k7Hf0|)T7rVz)Bf&vqBQ<&gnjQ) zTG#==5tq&}PP1 z1V*K?5UkQO>5_nd;|3mc$R^%>@*C(9tL8v7I_W4$UugC7~&1=WgtiR zo}L8gZKI0#WdxlUQ&f8IAC{m4>B|_Vd<>Np9Ke7rRVIKz420#{b^wMj5EH&nos_8R zo4*Z#p{^V#E!>W{1O_ZH%t+UWhL2$s(;g08bWwIN!!p zi+DX$Aw1R1E?poxG0e;M*_N<6SbDJ`vSO*@!HE2Xm9vN zjwzM#d;qsG&{bxm{NXzp=qWRaz&#A~mA_J&%>`8YGT}RfPAt5|$N*&9;m0~eAd}l6 z@9-0hE=I}&y#VcG$P~U?po`&W4L|T&wnr~DBOH*i+W;x5;c!T{BtWQ=azGK;;&%`> zRnR#-P31?azQgIV1y#`$wcS~krn<8xN4y#!ZH#y|@Cx!4>CK$cH>08={TK+#igC_? zG?f#7_)G+P8u|lzqeul~6vzN_6RBjNMBa@mh@8$qYq_2V+DQzw7rt+yPLV0bW5~4b z;3Cu4r=V-wflf*ozHZbbb_9+x=0n#E<6xF0Ok)6)!e<65=f@}2E9q-!s4ySKvx-qtRuBWG}88zXDkM= zxM(SW-trgdSEP>7`pQKZ^&?A)YWlOPo9MP9OBrvFd|(uS%YxT~QMufj4PZF~!)1)n zRuumkj7H0oPPYt|n?e;5Sygm5axzhFccx{icJZaic4WPAAHwX6l+Fh!`*&Vqi4?Dn zK14f9@#^R>@|EJ%(HW?)l>RK*uXY zA!G;CQObScD_WpTrleMvvYDf7*&gFd$`(yl_%=DknW*|*l#3T5dVqNnrA~Q?0qE#B zlr-gaqZ~YP=HN?LY|25{lENrO3lzqdT&mb`YpU4&=)??TDcTj%jzwLk95(8J8X|l* z?ayye+K%X!g)tJCa)j|JT8R?AAE1IMzZu&o0U@~wPMo3yYtcmrV;QPg8rPxLl?beX zcvAp=P6?djnW}X3tKca_;Cc{D2}>h26+=;ZN{0M99=KVhWXpC0=w_9YBimA~n2H)| zO0H}>7;!mjkh3UD0hX^Ldua zn6VE^7xgOlXNWaAlx1zot57G=5pFH)83I5L0AWc(LsYk@n4E-uHL6=whJ2+IfbJD@ zcq2E+xQ}ML(xk(EGGAq09eXEhRj8ML@#F`N6v%nqAM6E zkba0TdL;uT@?&UT)a@08?;2EPbhU9=8s?}!qJpB2q>*ZbQqvKTik>0*iVkQ=0i~I7 zguJUmdLSfs9rW|s=!a)!xQ#WszmT4FV~u`Na3Khrax}1_pB4F#qBXbN=z+o+K&#}I z8~vhyTJ8jHxzVo*sO3)LmK*)LkQ(?DZn@EKfYwilX_8uQ^gG6zF4tcL;CrSpL%xcR zC;DS?XE2&27pw*FQ|rM1s^kOC$2lr@7`5i;(L!p?weloY+A#*|WcE%&M2{EJG;OJr zP=@Hq7KKQymMN`9YZ`6+cC!LQADUQFma{4rp2#9|B`-#WVY>gK!|dr^4CR#jTx1Yjn`*mF7*Y>*rf$@m|6_;tX~Mo;me+!z%0LyW(X*kw$$#CDlSV~=X6jvno5iAQBV zjS#9~mM9#9db(P6MVeYpQ#c5H&usZ-K-jZ%z@H%Da#@Ff85|Jr5XGEJ{yS1*WA?;oasO5iix-wKr>^!L7o-C?lqhVJ()*cP$`7F{0 zqhWJAb~olPFBFje7!7OVqT^fWA?0M>I51i6107}-e~1X(UTcXn{1l@aYGT)+=Qz`a zs$i`270k1*M; zhn-I_;WBJ!I8N9c&<}lw%7O}Yy5)2Xb8GVr(V2P+xKD0?;%WEEyE81YZHW{sAq4tc zhc0JB4yMY!uK=l$^c`d8N{pQ=F?O!R*trs8=Za$Iiel%AdgTn~(;}5MgS{(?y(@~n zD~i1-a>VbkvBtm-VC$2qqDMwdJmq8X)RTy>`yKV<+&&fa#6t7zz&NXgIpBKb5R)N zqEHDJMd%Ob(^l%Qa7*0Kn%xrbv{pUjT*qpoMzAYFd9DZpu80|JR0UiS_q9=NW|Awy z_ox92$8$x5*%je$w;Dl;T@i|15sFmX;*|f+3C<$ zl~mF6#7ee~tz_%iO16$I&pI|g1p{lC@g#@_O6<;Yv`k5+vhB@{$T+dRiSMV*!);Y= z?@QrlvfWv(d^iU{xjT)aJlLLXLe{hGST7)*`N+gW{H`S4C;WMI>MlK;_X##oUG?Svh^IOWo&Id z2QEoRcjH>mfn^M6>p8&IvuivDl8xuUb&RHs=RmUY97r~v18h7`g&juLb0FDz4s0%< zqLvAhtmnWM;~hY)*cuMN8g7qCkU`dP0M;-8!XS$;0BiUujIO2;bZR=d)^NbHhK=pc zh7PVZ9Q4FT3K#UmN7iuAv$V(>4klT{e{^uI;h?8+WDN(Ct>Iv@H5^Q~hJ&6pY?3t` zoMH?|rga+&PHzJPUa>W-*cw)B4J)>W6Iub zISyEzgA0o3S*vrfrs!i}YHK)nVew!9+8PcfTf@O*YdBcPXxbVMHnWC<$<}c2vS2NH$qc_3=8KKTgDEnj$C;Vq* z4JZ6(WDSSBIwEU0lxz)$JZsn_YdAF6Czg&tOATu_3Co9cupIOfOXh8EkPXwm6lxI74fkHKnSrYh{MW$_&BEEQWobQXa~X z@8W^gH3Tb@0IjZAQ))}4H4U;dL$ET(Auh)lea^8?DxGc5aFgws*V(l_!^yU1INA0LC)=LkWZN^GY}MBE_4`wQt=H;C{j1tcwP zafUxDN=Hg{1HfG4{PGhn-!zWvGMAGF3 zS)5^5oCMXQi+iVw>U26;oMBj;lMvX3>_(ZNcRhO0+@+Ww{`@f5Scf48k$*nmF={nB z_&pRzY(y@Zia))bK+1i^IlZgO?MKE>N-ux@xN|H~!D#}p*matM7eFXo7E=I!vF+u* z6YDkwcQ|)Q>1iu?Tvat%d8Bx%>N_M4Z)let=e?X7Ze+A|OIUG9#${F)U z4|9R+>|v(oBIQ^nr;#2dq_s{-H@qMMwLx?!#32$B$Iw#c4$8BYPhj$l%c2y9ItdXE!5 zavRilq(^4l9rcyD8H~@|4D<6z#w&(Vz<6hN(0H2fSqZ-TfJzMgK#WeFh4Ri$6gTgP z8_Btu)0CTbPlAga;;%=1d*&m87-`A+IO<2IwPqS*_at&m*2gPApugk!LNqwK=sZ6+!bw253caQxDaV=g{U}jUZ?a{Yek?5azyXdh*=&&7M5>HG8SyJohy* z_a$Py3^%Qps+fKYCeP*pc^(!KExrC08VCem_aZ1^v(+?{R?~dF3_l_QCH~HL;FqVN z{;uICkVLQ8_lb_xzkYpKn{!XG}K?tKn8p2{KFW~i#Yz#44{Wx?2PHHTIy-2 zyNJWnQ2$hQKe*bj;wzn}q5j&dVa0Jb%{U$G=8>41WIm5aGWSsDTWtvmdLYJX%|x>}a&MJlWA`ZS`hp*pfzTt3LzU zcWt@i6g*m6gNCKyM%)@SX*KFAlRjpTN(0PXfu0+EsWI!XpgXkv6{-NJ;D~o>JI_IBMdi{l_%R( z0kc4nW6&y)ZK;y_DzX(U4B(@IsolgD2JltDgqv6{-O$e+z^#7rE1-}?wULJM z@c?c=l13S~AD{pl!0lIbz)lLl0DgIYZveMH{1KhBHqiDL(zD=}VSiFU;?e`S{aMkU z0q6nTK2Z28(DVRqe^KxkB+)Ko`>TRS0BD!7{dM6ED4ZU^?Qa-OdyMVx7%i>`aQl0X z(k^5B$Kt<(ksiS9pIUzaKo8*dFTnuDSUrH-|6)K7;P%nN?O>$6$o4S?v=`YvUP!v4 zy~y^-7LS9P_9A18Lko*QawD%BpgN79K^-gRA0sSEV|xEQYKc+u6A#Ew0p}?Bf6MZ& zgM!5t%mngL-#7$^=}Y(tBle{u%T!i81+o5V>T-&uoQdr52npOF{nV z^2i|!!ZcRM#>hK}xaZ9#xCP?ZKiLFN2VB1yFotm8r#=Aui|+)CVS?a41D_tybEFShj=%U2`4}90B`iy#PhVp+4 z;7R~D5fB86l>lx75PQif8LV2zuLb+8+kpj_qxA`ZRvM_WRsiU#fokhl0OcB}5^3uI z$=m$`8z;3OL@_8(xt@jeW#^8_2Y6+ltBW=mzp}m*MJANDfRf8apE=7K$7S#5mi+-F zT!}qJ$(}u%J$p8L_H6d-+3eY~*|R6vvnScJCtq=5QAHEnpaf7pW zxN3XeO(0*Vx)1@Lj~+vA=BNMuYWmYTF8Lgxa+pk~I;X!Hd}QN7^y`5|HI^7A`%nVaaBgVvJWGs_ znS`hs=7&yz{79LtW9JEfmpCNSzo{UuL>>fMH(lwaY1m=FwT}6zcE5X9=hRg_xqbTn6Su-@rtUd^fX zPDk^alxa}j(je9bR#Sp<+U6J%=Cvu+2&a9Hr&aLEz_bbsFu}RbvI~`;y$~)>Ksr4rvqcmB;prRT~RIk$9SBEzYNBfoYmEW30Oi&01PC z1K8SJu`bJt0YjTB*7Aau0JOPctzbY~D^@)N+FG$zGN7#$YgHZzQ(G(6HTms8fUK2I z#=1^(YmGV&>;hrCb2Z}FX^u&?mIXP@vCN=l@rTpD(%pq-k984f7n(iUMIfg+X3&JK zccEbhO@Q8oX3u6o??SWZGN5;%*|iL4Ke~NM`e@XR-i2l_V?g`S?RrA|oDdFu--gwnI>rSwms;IftAwh^ziOku~l<`>mp>8nvXBi}MM#m!? zPXv}{dA-nwz*HMJup=R0UDw!$-u9^g_XaeYMVA4-6EiSu4#NjCRCJAO@ZA~cM4TuM zIb`k*WN{SISd$PQ-37X9k8Ipd>5#2BV#;;CY782uaspfnRJ7FHklTm0m+*B?_^q1|5&e?W z?YEoKy#|rokx2I@r=zXJ#1IjElhXASe{M<`dk73Kv$-yi$Q=nQy_A>PojnQ0b~&XJ zuqs6aYm$QBL{X1g>0Xu#&>PFfk39lMtwEYVmDIM(1y)`gF z>PyT4;2%jKZTFCJEw>u$M9Blll)S}H%>(u>W$UPic8kAM)2cCsfZuvQ3uiFY#E^hD zXqa|c#3rH=SNao`m<3|8u?6M?ESQ!4L?zk}I&u=0%cv4N`TJ=4Ra_Tc{BB(=680Ws z{T-iIrL01+`r=+%~1`r)ME<>oTi)Y45s>?FG1C!aQj`5zPo3F z_N|=N!yfIseQs6gJl)fj+P>J?>*aicuUXC~C1D*xj*gjL&i63&%ixS456fGz0&Thf95izSV%M@nAdWRa(KP^1JC0)d{r=t=kXd}2I)M| z={kW7{v9zBbP5@y13?pY5*eg3K$GME=21{F0lTDR+Svpd!uj+JHMZXm$ix(BUJr#$ zZ$C%UK^`>~VRPj*2omajke(;6#Iva;AiSENZFR_*eWq%aOJ|f8$x9HO6PY}E0vu&O zfkJ`0(7E$W)gp5`QZJSU9YIQu?UMtbRO(IVU8H2U!Y9lmEMnwT_*5FCbmZn^LPyeLL|FfZ1g+8PE(6C5Q?migMz|2y;v*a9 zB6CJrwUcs|YMWJx$cY?T%8`#!aBLM=B)E8d{7x-}&h*w8DEwA;K>^`~Y+esv;u}KF3%V2x-YgF2PvnC&XhN zJ+!p9fc7n7MG2$a=AnGs&O^x<0F+OfQ+n1z`^04!2S;*L>?XXKIl|6kat8_TY^2}a z*2{6rY{=Ev#={aBV5|v74~@0RnCqN48{VjUot88B zXY>r!0nlO%-8Mt@ov{lPdNPG}5Q(PnmFnj4$y|nY21Kk zW!y-LZWNHPg!vhQ{0r42pn8jo@mP0Ml()P{&jQvt(CTujpo!&0l1pNFu>%MsmKXaV zO=5Ym0)V#HvAjq?Vs(*##Ofje+FsAb@*>r8VtH{qqR3$HIIC%S@mlb+CL8DEozJD`hB{S^vR4=bN$Qxas#FFiX|P6Z1C0t}z6PsB zAP;aC!=1`H`(~-g09wlHlAtF7!-3Mu$fEk8KkdxSMGwlHTN(Xb&LZ%&Q*s_m79#MT z8lr=1R1f6fJ#`*cm}*$)CtuzNDw7nI`piH_kl&=z38ue|_{hd5J@T8>;AA?R)VVGl z_2+L4q`UZe!fdEwviCAs=gITjr5*T+{Y&z&69KegwxVC;EDu+uE=~XaP?wR)n|b>0 zLtaLCV66xp1N@ovvZf7&#U7c@4D%f3z^u?Tn^<5`$iVP7LUtz*~iN)N$xS(BsntrG54eFRU=_NC;UPuj8jz4SuSTzsVhX^?X&#ryQ{(`BpGDeRN(IJCX^oeRN(IJCX?q`{=wbb|e!3 zht#LeNAp#e_D`Ugzv($p1|no*5jC%eIkXe?TdHA+$QxPXbgNdG{VDuw+1?A!SOfU) zGM%zXe;5ftfi~r<_c^9JKR48s6_yvzak!+)BRIvz(WG|8yPH?2Y29hO`g@-;jwG1R%cwnvb!ucvSPG^p= zEc0$Y&c2|MAxf~wqO3Kxa;awB1)Rn*iU83xB6_FhP?ts|@6td`8g(EWHBc)uUncq1 zz;8h_kwY06U3n&wbAeXnD1?adLx^GLVv zJJHWcXB>WLk@&)eswhq?g}y_nkAQ}$XsOWm4Fk5K#X{e=41^Ue7y7@)5dm%yfkcadikBJ|kfOLPfPB8n zy)ED`BqMeIa5!Z@4HJNq!|eeaV8B-HWdRfu7ID+PEuark!fgRj(h&Ey08PogEkIK` zjB2%iaVgzPJN18KAgtUA1PCpr+zSK<$dKLz0tDqq?*ajW3Z&fNv|p5TgFrp95u+Of zYJ8BHcY^@o3S5+O{vwq>E>;Gv#Zt4ChYA6;)DSinc-IOPAbB(+(BpahrcF5iLJ{c2 z3522(1%bW{nCda-twm^6)L{gMa2RzM*lrORW-LR}Vp?4dVtJKvP(peiNR!sDh)L(K zV|Wrls^1`S;`O#*gG{H&%Y^QyQ##So^HUR)^Zf#!*yW2fcJ#Ijw3<&lGO$0%UyCqp z#^p}95DsRdE~@a6jhBO(MaP@g`nuCI+NRZwaZbn0Cje_jkYpAl9=Y=o(}q*e;< zQlIC%S*tR}Jq(S@@e$ha1iQR*5g6vcoJ3&j{RouO$0SVzqdg)g8OIR(w8^1QI^8Z( zh4EhzvfIocnrQ9Dj|}E%aE6hJ*1Ov*(O`|Shhy7oaGLQtz-LUBJwfVLZ*_dhiZ*A|L4=b`!oH`_&X|@2J9^hJO-GnmFG<#~gqpg)3U8%w0#uWf( znHf||*bJJvZ^L3$pt3qRMT@aPvl7f`@@LT2(5p=!^$@CI0+g4I9iC-yeVT2BeG_+g zmk@iZi?fU}T^ChWcW^(;n5NmyVt?J)hFhu{gXT9gj7(As%%VgF9afy6)ud~&m~X#} z`hiuBj?bbKZ4+dFsxg#`2~E=KO`<&)vYhOJGng(WCYtWq#s`R<>cv(Ybqwa~JXK|G zaEdQh1qIVu3412A!nhMzUaYcy<RQCm-;PU#xa>5!exqvX{CKfi)+2fHVI)sJjO58j5R;G3 zHX=PwJ?^Me9no{XROihgj&sN9d)OeCmC~M@D0Q6vc54vwzpbpIzb!T90V!NyJ^VX< z4Z3#3+R8(oFzDJ5YdZrtWP+~1+Qoov(6uAhvkZidINdv9?O`Zp(7hwpiwtBKbnl3@ zmw_B%(!C?r+r|bkvZ1*p3Sz%(MXKoR6wsx2e!yUE;( z5IG{>fQG=5!$&p-E=E{Thm6)C`%!Ht^o|bQr38LK$dTkd9$B|K11?p0@k2&as(u(jAJxCo#LqLG+9@ zHBQytqdB%t4hkFvt6hr zbf;6iRAm*9&&8TG&m4;Cv^H*Yweg&lLdT2XpcW$~|<>YUtmc1&Es;SJN+ib9p;2B_)8_zn=U+%gku#eyvs0W`%1h={L zQoHj-P#7*Qb`&I}M>`6%@aP)1Yfr>v=nW4yiw-K%0RAw0;O zE@!}DNQz6g+wLum|N>zubjWn`tG+n9o*Lqe?OxHUTN`W2Y$&`I$#qud|RtjnBq32v2R z+?N^mAmh%Uz^+6SU8uruNRBKbk(VF=dj>hjN3}zE@2HQ|6}=>C;0)wrUkb(7 zqao)1CaeY-B_wrG0CZ-J6^lBt6fKE)AOhU$dPIiW#OiY=p!748K6pwtJ z$Sy;Pi&Ln+=hIEr7HMCuLXD#lo|7>o8GFsWE%aDrc7@Y@$g zyqL{Mv;~2Y_Jx~}z6QU?l8|T%0wX;Z9+aT8$~kbQ%IHOva7j||Yhciy(>})xhCqcR zIkozS`%tT;2C~*UZKcZZNDbh;u%R0Owp#!n_xu2*5Lz|ci>QHWf8o@wR2gMN=2)nS z3|JozWw~0zb$BA=DKj?&YA72?huhUU&#i>|66H1?##J~4LB-e^8k~%} zD+zTXvb34W>&-@MJo1~pqU$VeNlH_VG#irAJmaO=5bB%E=QgCN;m(z6>4(L&dz7O_DPV{3iQ8CmX9tk!jx)|_d zkh2gEG2e|I-^YTk%%LKX`4i1a>`0Jk-ch|C3|om#G`ik-V-*?sNPkDLv#T2-`aa~p zE|^8bA^mCR|F6WDFxLh9dzhgRdiWa7o!;k=izdZLHAzS}LCdEnAr117rU!cyr8qi% z5ju|P>X;;~IUd%S;J^gGC!v!4laQ|UkopG)B#?eb{hpSDL`R=FQ>P^%-3PhmX(Sxf zLxsNWVdVw;B}o0^$ZJ%_LMnDJ*e4PE1WNQf+Bs%{oVEZBh&lWoNFcQug1pLg0TdA3 zH#%0?_?CyZE>Nmz%}@)FkA^^^_q@)jzXrSJ(FFhO{_ezY$24H=47fE{^&hSOZ(hVK z%+24~u-fhI=LcB2)Q9Xvg`OYCq`^crEE3UjRNLf0x;MC#BZsoF2S#cx#NH%nYdI%Aj7+DPtmzU+GHmN zm0O(ytF;{dSgo?BQCHL<;Evx^%-azVak&XWaxAUatGxa8DzYPG(DuD zJ`=gU!kVMODoL9oR#<&ELhPzxw(9>pGFfls=;5|j6(T!VS~=AG;CW}ct+YJ3g>4}J z&W&2wac9VNZf%Dww^i0i+A$WgDm>=IEo7agxy@s8k>=#!452@}A9B6X@0G5eh5D{n zx{ZFfg=q#G{bM`^apJJiKRublCV#UGALmveqHUmf<^F`?O<)#ta4MMI6JOLfJ6Pw1USs!On}4vIaDqzKC%FB*7>o22i=c+UWsY- z8!G``c0TgC9f2t=haCOcv*Tzm>Z%;IYok(Xq2x;5V7Bz~fb{vJIvy@r69{-Rwoz zsP2%#Z5~+1(z@Mr>*HdskBhi0&4;SFKDWKkKq0@P4$$z*NC%x{|*mhK4nCJAYohxCnfZ71xU{1R2Z8`rxN zEpJ_KlZUul_VUJv*5e0F$4EC=vXU2c#u<55a#rxcvWJH!wzktA(Y+XO^VtXWkLB72 z)j~HG@zR|_oaYqXs5W@}Xf}d%!udo1IiKFRvFXe_BjDbJj!tkLpPApWj?c`WT*qhT zyWOM)#%VP*)(wgM?e0Qx{zqRDj+(Ix^l~6+{O->aezGsga(zh;A|ec5QaNhG^Ci*D zkbOzyN+Q5yS5hT>NdzT)NdzQ(NdzQ(NdzQ(NdzQ(Ndy!KYq8U>;Xiyymg`HZL{3s` z@m1uVNg?OA=S-sKgfodUop2^m5fjd&<%mf*le!{J!kIJ_fagpqD|u6t=Cm?qpyqYy*xrL3D(=NWXU9`2fX&RylnR(*;>0IZzmifC>go zyIPCO$y@wsl|ddjSJvWAVPE(I``V`9dY z%K%g}kRhy;dO!;dIz%6i*^BPOufb_AiV$O=)7H5x&aQ{g(Z1B>!IUmz02%CmnX~a0 zWbi?ve-(!ckTu;C{24Y70D*@chK!&k~sI6xp$7n~H zy^VnaqxNzDcQ8;QEJ;QDv$4bH^uATadeaTN_Prb_47y?0zK;RZpj)`?%?#KEU9f9! zVE`rA_`;s8Ej0JOg&+MgRg z5^bW%-GO}&^9_JY&2KNpn8&@zu0N4vocPQDof`M*t>u=)@rIj00pLTSIlHE^| zV=0C1S?|8wHrmakQgxkI&~NY zUgR;v9rh@o zMTolu!*d>pxl%in_(m?$L(E~7$Kl52CAzVBiEd0TQ725En-{4e z!GRgx?16Zx&m8B9KVj+dMe4@$M$!fMFyZAkR9zr%;wc7aDOzj}h|9(|Jq{(g=)-gu<{%d( zxu;VUx>t1}G`pooqfP|qj6?d{2#j)0wNEra?i%tsMsxd6e~zwDk#?o#W@+uJ6X_43 zw7-+1Pjuzd4UBt4bYQyKN#A^bchxL=tQZ`mbddy^Y32 zf5b^PzC%n%;;&_oqh}hi0}dlpC|NXx2i1IyZG5=Em&N8q=&3!THVw zcd6WYL}5b`h0>MqE&L~impuw=vxg;k4TT1+{7=lEJYbt_C!n(kBK7kWsyX7=_}+CLu?o~x6PZt{?>&MYS+ zc02oXp;}8am!s8bQjdFBOEUW=NKFLN{3KEzc}Vj!$0U&MMQfOrS(Bi2%0rr#IW&RP zA8oTjQ=%m?tXq;Rh{{)yIV^#-1C6AA=8OcX3J}3tV|$X=pl8~<|Jah^%@iX+T!(AumtPrB8RvTVEvZX@QGmF8A|jogoF$x55* zl95C;JI$RXSIL3knVmL`686RLFVDnSo|86EW8;tzPC?|PxwAKuOP<%1hXA3O&pC_k zb=&(_sjfE6V76bSPSAv=G24TweKa_Q*&a-tOl+~=khvaAUEp$MHiuH(qRz(!4-nbv zRIjKfShU@+@s5kSTJuDEuVF5$J*HX%uJhQcSFuF31^z-JTLk^un#f2Q7pN2Z zZ!XZ*nA@RfA#ROL)TFf#x5fHuPz!Ne>@1y;xR&C!Sgo58mg07gGo<(fn3g1%>UMOu z$Fw9iLYIDqq@({Ov3V2)FRC01VYG<3^Z6-q23lu}n5z*Jm`N*QQb^dBs`b$3*0HRA z@kFFb1kS+((JYBO8}D;l*RsDJ(r@$L?zpKZ1f_cnn#Oe)QrY8kqvC83|{3-xZhRb6DiFo zolF^-oWDO(n)L#riBRU3=U@>d<%KSIStRG}Z7*--DWz`P$8i%3?!QI6LJVibAj}Ug zMEtji%e#)V{aa+b76y8Wndn}+Bogl8)_#MRuuCK%Qz~wkh}UVza!xi|x3ela3Sier z9}UiublX7J$mnY!8`U7xSxXV!J>pG8)D|?m9v-+vnBSsqe+qk<&*03z=;h(3us4=) z-hT>@OXNLzrSt4&xB8uMLcEk!C+rrnS`qWx!_Aog$pgXs1L)n%1oM5|WG2J9X35PA zdjlskpBWyLV16a~yCA1?rapij2h_<1!)|Y^Cu6~|+Z*dlggvg8vIHU?xCG-ZCLO== zHUT}Ic-_muZ=wEP9s3o!(65t_e({jL4)y&#$QB-U9ON%|zJI_K%C3+*79xBHG-OQ3 z6LL8V`N{&foMS?6IjgvpjtR}8C^Fl~V^SIN22C~*$9Z5aTXEw(5GLXf8vF9munp&` zE!ea`LNP)K<)bEVgqoCZ9Ax-r(96?WmVE{qJj?#gpsRdU+*Q08bd_%w*XY|pw?-GS zFyHaO3!zRJz#e9*PS%5N%{&}TjFXg!hl5SyWKY2LiA>aRCN_DQs1Ldl)S0Lcy0ZzL ziIpB#or$YF@Iv9g6(!eO913-nzT}at33@su{CQV6e|u1+_a`}>6YS?zwfQWRvipDJ zDHGNb3#NO}YZ1cS>ZClRa^_R|9|DOYUWVj91e%KYE*ji50Z-1l?r-(TT@!FsOe^g* zfeNkTdYHR5(9~1D=iC5hHN@;Y+bx7n^quWCjA~xV`p!Pb>lvsk_|CpScLlS#m;B!L zNV0bQV0&{XMJCG;+pSo%O|jHTec09Idu>-dn&Z9p=;UnPm!K)kZ5C17wM!m(kl|Rx>Hs&x!{P7XUh4HVGe(Yt+NGMxt4e&4_UoD zCGrg-;G}0X&(uYGJu4?Da6s&b}L9nL*Sq@i*&4FY$YwD67^b{wh5$ zsp3&)iNAZYYAyA9B)R^U`8^Q|({b(w2kwzN`78WS*y9RE%!KTm~NKvtln=t5@%oHOVp$PSJWe2T;^e=v~o*1 z&(|}dED`8kSt3VTS^9X0Wxl5VYroU=5nP``)hQAM6y|jpgYGgtacX6`-%Ed&*{oLX zGMm-P-KHl_tXnK|?taAW7Nps%5~S%>0&9yj=Ok;3GP@;fi zQ=4T!yR|Elod%bbEd!ct>@=G7MZ1iqtSXFfa}sp40zK)`nPW67@f@RBiRUKBaPHW=5qXzF6pQK3I$&gf~)l^*4vRZ|ypGsfeWl_yKBHCsHymsL|2GY9IjHi1|V zs&ImNh-+2v-vizx=Wb{3qbjGG^lPf}hCN{xVk#d?5YU%nO={~FHl`Ae0ov*mQ8cyTH=~n&O(rb!+c>|Ed+c75UN^=B z-|!CSAYqRyoUI@@h6p|-6Xg%u7-DX2B1rj>jXCYy{NF6S0gwsa+C(8%GEs%*YBc-`*}QhH_Yf7+SZ`HM4H|7B^myo&At%EP%@xR|&^k1(nx@f1j;;#PV zwMBRB^j6&e^R-2$jF?gR*Z5DP2rBp?0OB6<_T zd5EL87F9m&uDH`n58ecderplE^dO9O#BVLS`st>Z9$bKQ`46Ez$u%;aG@JhV<0Bg< z1D_qLW%Pum7~2E9u_QH`bXchfEqE0N*X1NmS&e1&ZJd(sP)eoFXi}w4T9Zm|p`1L8 zBH-&tJO6Sl`%Tr9>e6U(dPaimdSqIZ4$y7>8%(oXa+@D;oo@5zyKR2od&s9#ze}Bk z3kE*grKa^;i2b8xSqAyDvtqu#;a+x8Gz_;L4>i9>%QHpA8rBod^auw;P;*Q@V*mD9}D7Lf1RJ@cl|AW7B`@|R|Ir` z=BDc-gYFdpOA!*`D*_^XML>kF2#Dw_0>ZS-3s(e80g}e=-bnbo%`2iWL<-Y3FRPca z3K3a&H$^UlW4UkZdkI;=@xBRG8`_&hkZIA8LAwtFwnaw+l5oV0 z!g4G+ABeYC5Kth(i=DdXR7?G``-r}0IPAWzuMOB{R^Y3IdlS3XfZABR6J&8dJqruh z48QT5%IQs~0dbyeDv;Y)bQ%yZ=d*#)-lEfhcsUf= zH}R2-%Pcw!h&S;S1Ebt})|v1(ysu-o6aSkkl~R%0*FdKutMF_`s;|N%Lxg()2s~rZ%TB_ngPjvd zs9&-b`0za>=UNHuFQjLx6(E07KyOwtEqbkU;Iksy2-(`AlY@Z+g&zT}(xQ`tfiL)d z8xt%#I2ib0;5^hg0%pCYP}mkl|?Vv3j7lM5nQV+dT)E+Ukub(bmlN{w6H4})mkT=!_T`f z*$SL&F&#;l2k9kS0f{S$0o4b$J1t&Nol5C_9Dyvk2VptCf@m%s(+=X8_DjfpE*;M~x;0F<`&efM zQmXQ?&K>xT&u}RK&81L{BBbo0Vg(_N1<~#()^;w|GSn0oYk{sEyzk5&k64mj7;(&R zvByu#kK##U2!0Pm)#bpOsJR$3#?&NYeYR;8KUIL5jARg`#36Ov1o{F$-+=$0y26)OSC#)qk}v?ZY;T1E{DOI!wN z=GbVquF^UYy9R3CiPMyFngd>%PR-MFNlMe}DI}t|Eef%M6J?@}F{5KCeUlj-PibQG zqEoxqJ>T|HbF5dAu%23l`9z9|@^xm)S9p}SrSwXsygeyR9aQ&P&dn-L^M;q^+LX>Z zO%)e=4bsqiYoWVF7Wk}9DdtyNHPjkkLQQV)z#0*oiuO92Ne*R_26ifN0cWT5NX|x8 zQZ`m18*MmESMF?%rnza_r1YdT+z}L#{M#i`QB89w@|ko(_QN6&2yBQppAFhqmVzL<$3p?56E!S{1kD8SqZ^755A%D zeAI88aL#*AWjUX}p(b)SbSmO=j=Y3!sPau!G4d@``UjD+3Sqy@Id}+*)7+Fki1gIz zG~6DJSZYddfD>!?N0DY-(eMgq|C=g*>LlP%*%AFXP+cXSrW?(LO_7P#gp=_u>A_&j zr1yKIb;DUw;f#F?ZDW<28qsZl>QboEq&GH2x)IfAkK0_*O!o7LPj_Ovv!OW3DT3=j z&TWsQb$fiKDYC)k6@q$IYGxlfN8VCdJzj)fyv(&Qn&mbSi`Fc+mp!>v@#LB0#yNO3 z;&lB`Wjf>ERuz3WAoaQkjf?cBeQ9rD>6j_3iwtrlZ<4QLU1U7X2vkG4`I_^_+vxM( zaSp%Dsx;#rcWBuiF?5~&^Bv5T-*8IbRk>xPlrtj(lWEP2j7!kM>~&`392yyohG(b+ zX`Q_eE4f zB#fVM6C$=33g;%CqBSfB(xsds(v6q~D0&0Le|^}$Z3NC3a96a1#R92ZAMWbP9{WQv zV|_40^4nYvGEf}Zc+5k5Fw~n7oqv6x(&AqM^{?Jp<(bC)=pDC)@@Z>5Ze=p|gWa}} zE8ba!i|5vfM?#rIST!s#IzWN9d$D-ymml3oJjC-e~;S&JeMy#-Mb0jVrOMJ$Sn zyC}YkiVMD{qK}6>#RUNcMHWFR3W$jE`<~29JNWm1`|0F?<_;3OMo5S5?dbUKeAi)d7B!Hjo|E=C5ENw;jOHIi-F-z>~B+ zuN~Ff;Wv~TL)-Jtu+kVC?Z484;*qcTr2HTh5fP=Uk*Z7CgEV?XL`3PnN|lb93Y&c) z(i`vCXG3i#V7X1=ygO7%u$ud3>cJJq5?@KI3wy2$Ij_?j1?y}Ki|u*8LJ45hll-W{3krZU^2 zMt4W{b%!s0zX{ogN7}2=onYgTX}gzccw~;3iGCe9JhIT4XU{cimSY(ARJ9M|{fHz) z&q&WY7&Z5TU#CcII&n(}Kck^5M5oAtDpA{``=$9)HS4-X@9D>yi}(n zs(C#RB_4{fXXhCqSF&SXvP0F((x#8c^7DmY;JIugNN=OWj&UqJC3 zZ9P(3D7*ylYmS3@)L9Df2FY)DO1tSOu_z+OY2NFDd%HTec4%Xl$8?WJp60Pvjr|6h z52=L+vM(Vu4Iw1b_DqzQVc#fdbaR;O_L$t{Fd^fvxftEl|GvR{>1uRSXAy>4A_MV3 zI+xE1;*;U>$$=5kCU=&{XNSXw5>P(G3#8FEdr`g`ua2R~d|oxRA*e3rwIRnAkFBPv zESb^>CGcVk{#^BC{fsSyUn70WB85+$>ZvV}Xgu2}hwai})!8z2I# z>gr?Kv|l*}u7!NDYrJi1RUPt z2R>L=@3(+r-$U!Oe&Btsdj&@H{wfw{7-{tNcCJS659pbNDBn^o^RM6!m7e`U&m@aZ z>)>N2$UVbnLbeyq@F`h&kgcGKajIr~xV_7`AmG~ZLcO}{A8=Q9rQ(<>{E^qwRUR5} ztGwh#K3LyNXQ*9gaWDPpM@+W6V=~Y*P&FC&Q&;}|4sHQW1NzQ)jka&aL=uwE`bmrY zjS~z!%WsCrZ=OZh_*FHmYULF1!zmg@fmq_X!>Z=l^tJT#_{@mL}!IkujD?&r*X zppVwSpz4pS)xWqr`bc+%!qU6ZE#dSJAZ(lLzA_72g=5F)w+jNKL9RBiK9jk(p- z#h_{ng?$vq=C8_DN6+KQ>t&rSV~eS^pJfF1=ziI@vn%8l)9sf|-M5&%{dM1Bj&z08 z3!E+HjqWX0gkjyDG;Jqwsc3-~e#*3I3lm#*dPi}q>Fi#HFwLen13hheH+~~(L?KR4 z(IUOm$q07SB5m_T>SnsL6i1|P=0LyRx|v0Ok-C{P{UYU=wVlL{Ncm>%c_HjekW3^) z_i7nxjz;g<#C_AGFFXM@ad*oAlc|woVJ-Zr{_s-W&)uy@%!?nxyaG?-VNpS!MfhhM zo8hKR{h$UY*Lm~7s2|nhi+E^&x^6trb)(IjZX!6K0vUPvJo7n>zj$8kRBVP3)e$5A zRpzmGZURrZ>_PCPH4o!v@hU5D^5JJ${2s-A#WN~Y+6-1bjjwEl6B0DPM5uqO7MJD_ zy4yBp?!IlQ(J~DM8N}ac-4k|{-@#G{i8g0ZG%sVii4EfssFmFB zG&xINo;1=h>ff@$@x?XM504tgInIp1>ZM=#EBbv2aI?J&M$RdmaI+DhQ#kLqRPAQd z2@C-@+iRD2L6v)rqGRg7y=MOg+ptEB_^sN#_9ePjq~l(T?}~I*S{la$;Q#jqZsEGu z1QI#vGx||_?Ouy;+-t&huXO;yhI?%{LhYEZI{Mvnul-Y3$aSv~2r}2bMj)Eqsv2Cb zcCS&Ka|VffIDE1p=BgVmd+xOe$Gs+8_u76G8+{3vB-g$6GJ2o()d%O+qwfZTd+mkG z)$TPDk&b5`?zJ$0^GY|I~0dmZ%E6A(gwF&pyyWr=z;o)A}ixlLBPyb!J z*T(-|?Ovlw7|eCA5iptSULz1>u6vC@G;`f+1Y(%$ULz34T=yD*ME0Ee;`eIz8pRnn z>^^YCJ?tLtHHU-iUUN9O?lp&l>s}+^9Ci=)8Ug39d$`vKG%V$V&SCd(q!DlqyN4s~8x-Umb|3MZ2F_vk5x>`` zQQ#bQ58qk@xGk#V`PM9gWp!RwZ~wvD^l_bQw54nZBin8Qdv*vzKeC-xGFlEMCDM6q zyUEDzMP@~KY#jnL zoY7K-`5|%{^=NacQ=oR=s+d^XNXpR3imD>(kyYO(1K6{3Gd6w_VzGYC8<~596WjO{ zh@32EKhc$#^YX5xoUJ50f~rOL*;->EatBeL9M1HK!$01Y=H=`l`Z+oAE7g5!>{UF! zMGTMe0w;Q?J|XcKA4)BZp9*o>emKTUo&XzOK0wmXIgax>R7Y$%>iu<^C+K;XCDtt# zb=3Z=uzAbZH4ur{6KlnL_*pA{gP*nHll-h7{5#g`7Kush;KMc@9J8G{7QLQ`_Csynky;ABzK}FssL5?7Z>gl|LJYT^#Iq$i zAY-}vHuC9`?$mhpP2I{wjpSHp{3NSQI-t)){IiYaG|#}E(`F{(G0EJ)#3bH*g{sd* zqTXuyjODvh`;?{za4{+LBN}=W^Vm5nh}&^b(oMaI^>^~k&@H`*-RQJ*iEfGt<~GHx zTExvvcWH7_)}92e3#zy}LcZ#8UBCu7Tub?|SeI#Xe|UyF+JrX+>Oo_QULehIO-FZySSwrP5-0HO_8MM18cL~ zn#Pqaz%NpJI}%Nedlv$(9pj*qxD1rLu8o6=o6)fzOu4l#HPWi42lQss=HB#xQX4J2 z=>Z|p(wiP=TDXN24S204MpRU{D1jD=>S)l}=>fKtf|nrVj38#(gd?06GVDWGjQDnuctJ8kyk9i<9KymVya^iNGK92x zEVZ2@9}uNKV{zq1NduS`jmtpCqTJYuaEFe8okv()!${F5JyG0J{O_!31eX!OClCJx zF=}}$kzBGKW8Ptfw*&^!^Nm#q$=t1V@g_IiijX?|4usH|vCj=px*?+UrwOjy*n(O( ze2rKY*;*uLmgagf(Kz;xmf(^_ng{-Bq~d08zry^UDKXV+1e+lT=Ty`!BqdtCP8pBvkTdg*tnX>COst5oG} zMM6vO%suY}Kku|Z%AHCVe1iBNpQt`*D@qD}LTfm6^bS>`6g%mH&jU_ikQMMwr1Flm zA`%^-bxU2fFkR$C{Wi(tv|sH?7YPyG0Y8`3(R9%!RDZfhr=0W)KAZuekAU!wnD9=z z@D9P)(E@LBLOSmd4)2T(?*I?tQw%zNO7QQUBjTMgq6xS_RR)hXR?hPT*s30EC;CUn zFYqFg+lGH`C;rW%kF4~f3ev;xW{ACv{acl1iW}Kl^;@P$%l3XpO}xpBct6qhe$Va2 zdp{NT@S+ZCbVuWQBCiJ9=PUJ zPeAXh;^%{4NV%LcqqrDyJ*?C4#9cm+z z%`)#BTdlTTCyMHBMFcsRJdac&oLc0to7!8o%t9Z|>7)8)iMHJAs}^R7X0hJ$8s6h5 z6>3|SXj*&jubxOG>k<54RHw2;Md*^Sw2fgFnV4nV(iXZk3BEdskgQd*UCd47-Sp^vNn1Nz%*~m1oYOUs@?TDqV zh^1|ar7ei1?T4kUhoxi*pRc!&Q92cBg8PBkFh1 zXKOmOUZmMKv9z7Aw3V>5jnMI_`Wm!g9cJc;0enHCdMiiNP0(YXS$gO@eD-q-1OIG} z$f&0e#F9GacANDs%hvvdW>pN<|ttW4n?BzX*H*pUunwq+9g`m zA@v}25@#DIghNZV1n5A}g7il$VbM4cldr7LD4I+@e9dk6YTK?+CQk zX{>h~E%&xCjLibkjD~UR0+H-IcEv0`ikVfRMik&Sb1@t$5R+@N0qXl3L<=6(QN;`u zs{uC;6^#JH?+q10{tR91hu@IaZ!3d&WAG(1-D*`6hklBvc9O5{i5RoJwSr=-m-O`) zeNBsDhG?82TXm)+=?$%}h%l|WbQMh+nlf#5dl2x(xr4P4CDS)x86$EsWmMya_+qy; zMU950sM*m9okjwY*wAA5ow6zFb&`Q*;AvU~gsla*ibmI2%QQMd=yj20&BVE^rnOvO zSpp(Qb+!@^npPXSih9{rDSn${nrKBsT3H!*-nrf+w7X18Y>jKH9*uBqd$JDR8Y;iz zbB6*Q=bIZNIKyAZv)b}3Ki31n&-_d1M_%B&@vySI#P9Bfpj?Q-2p$%v>Y^u63H>({ zhl$7W#Ic;zs3Wd_isKY4Ht))G(;Q)c;%neIyRQ=nKd|^Z2rh+K)b$9juwLB}+{s@Y zjo@DXImWkK&!cdnk9>?jnd9N7P$5-rp$f*I}F#p zdyrDgmhui(VzObU6kHoUlH|k&9%gUgfUv*`wRfZ$t>TB7jY5F}q{z69YS`gLx^~*x z71z#BP(`wvk(fD+sp4JFldRoVB;cBR8=laX-6h5J*iE?#5-81pH%H+*cq~cJp*{%acOw=H+EKx`1&8Ch@FzU1EN{=GVwSMS zV07hD_AE8uU91VAdsuXR1k2fF(#n0T3pMZxc3m2RRqU>O1oyLNsO)lf0KHPKVV_b_ zTUY^Qe}cVu1A-@6C}|MFr`QS#wz7C?_h;AzLeH|E*fEjMv4;sAU>{QP$5|;QIl=BF z0Z+1?)MTev842?P`x3`t%G2y|()t;8Kh@_fTSuL!k|i`naFP8&z4Bu|fK+jm&kwaj zc!KXDt)ArDsVkl3d#9>J8Js-#B0qEl#3CR?+G!C z(EH+PQv3&E7%5?|I8GhrWAQx3m;6M$OLaLU#**}h#kescgeSx&r1L*S0`-Nfq6>yC z`mjMgc8NKYdgD^_pKuk(Ri>g2@qoDkTNZM?nMR%NL33+M1do_qNu`gPm#F8xYhwID z7_%4E_an2i3xd67>jnruF&9$JJ~ww|(n$QuOr_d?ZO&?r;Cqu%5y#Enfoa6Pcx3RcGYZ3x+s?~QxQtONUimdRK$Cu{1zrhR>e z$7w=?Z1wg?vq5k<#0(ta)71AP&8DFtRN4dVX^LFS+I`9)B^yjb?+rGB)cOvaP4)Va zedMu?ZBFrZJ^^oC438mk8h0gSG>xa$N}ECBujNAe-uenvr0s4}YP%}EVY2G`8k zvABjhH5rZ|Yai*Q%LS@X*UhM;X54>zUEty|Bw{(corn+dRBDfh`47}q8+j?I?h*bN zwbdqGa|nV*`MMDZDtHWO{yE-}EW-1=9SQvcpG1m$jn}3Ic%82dkw9cr!Zc-6% z@_~s6Hi+w~JH0HDFu=8Xqhd(zm^;ac*Ihuvug&GruBdN_%}o&To;XM2c(0I22tE<- zQImclKI?_xTd|Es!1v-UqMa5m&>#!_B(g~8bK-NdG5455DOhf{CT=UuJHa30;uo?5 z_nSF1*jAgvNq}+jzA2i>h z+C5~(P#ZrSGT)?dqxll4=Mi)2CNOfbEt-oo6pcV z{!~t<$o=wjLZ8WpsK0$KS5aesAvaOEU&`GNKjct!JXsbPKslBKE|B7n23oapHQ(b=5^`{mlrsE9bO)zT zrjb_dBr-2`vcOKqj(LpqGPW1VHSPqN+R*qE(sc1UB20LrF|HHS>)|?SKQSoz2gyG9 zMbgTYA=KAyTt@1fT1t&K?PD^fH;*Ot%wA67%?Z}Qbx{UMeESJf=^bB^F)U;IXhht_ z3>v`qu}HEJykNUj%HZ)*D&Sx=JnB{qvh*uf5xMt?ECrD|L-%ZSScd7kv~s+>tZ@PO=oy)}xO zB!<`=l+#G4Lvlaq^WMPtOa#jV??KOUbs)7ff(?PU+_50*U!XD@#**O8>QU9xIQ7nq zB~T1>&F>F)9%o)=?DueH5yGgO$6*FWb0@ww+vZF1YG4 z!r}U}i1oN|#2geA+k6hl-?D$rcIh94&3Wb-#vASp|6EG4d>KA`3&J*6??u8_SmIp> z{>i4@jUde8??LbyTeu9t>n!I^m&v*C`2}WnWUw=K?*!Zf>gac7yn1oH8KDYSnX#&( zuMDo=YDTH9ePyF?;k)MNTxI-WZU{%*W41M$&nqpNIBV97wo~;Ek7S1AizHr!{HeiY zpj*1M+sVj6DF&&2_n9e!<3;2Y8MQ>(4Q0*w=m0R^vR+$RXH=oAnLc0Ex=|*Mkxg@C z%t#rVE^Bv{@%?0-Zn9Q?X=lhNabqd3L&v02DW%vU6z`~e?=!~+XbCSasnhqF^8&Pv zM|{Z&vtxi(^Wt0e=n6ASuj$2ILVdl$>>8k@y?9nNTxs@8rS-k|Treqe-x?)ZH;(O8 zrwCf}i<4@_N^^dFTKJ3iO=fZ_#0QJoO4iV1GQ!{{6Fb8VR+)zbyv$aAtThwZR#j)6 zIfNJ2P}A0#Pq3Y;=6bUbzR~cw^=5)KmKOTr1L#L&I1Jjs>*^Ls%YX3&Xqt0IHGy^n z#Bqalbyp^2WP6xFwPd3r7V-(M}WP`PKv~I?BP!ajE37^qH zrBk@5LwH!e951ke5Pr2l-o$xkrfSqn&c>pAO)nUL^Qv!enarDa3{UMXJ6U{c$8g0! z`HBTEba>bZm~d!Gj*@S4BTKzMN?v7q!talkjiT9e;ZsxOe!*wwskf)gzPv0?McpL( zven_?H_2QR6Y+exi9WZV$vF@D(1)*>YX`wGzgb8p4dyBnu7`d)ZXFabLFcX z8+YMH=F9z@mi+S;$X|IzUp3=4Nr!|+EX4h%BK+J!nHb3~-t*p4iT?opE&K=ZAA$c! z{6~e~TN>S_v6wn}Linerq7xz`$p)nsb;mVqz8rlcODQU%sG`!j^CuTgnJ{DCe+)}WnQg^ z>gWwewHQ*!)-X76^tGOfNw!DIJmB8yT((_1T$XGP;~c9 z4eewm^^T-Yt5W;fF={o{XmumVu`}KXW|F>A)Q(2>BG{sijqNe8MdgiAyxx|idx!nlHNj-!R8h^7n zs2kPc=FsmB^;>hhF*jSO1}*HmQtw=itamnxY2f+Bs71 zWslJ&m;IL1KQ(mXhxWD?N$q-2gL|NfaL{pYG+2d-?PK4M zeap>#Y=wJ6A>6-eR~|;ipni6cCl-cB_p>|U_y7;bWt-1->c_YmSC{{VYntXEAq6O7Lh zeO~1cw6EfMll(!bou@QX850iFvnjR!v4Utflqh^@O(@P$GUhk z@XeS!l8c$>&m;UF=*2F57jS#m)lBrg44#|KuFshwP+jt#R0%)=(aaP9J`TME1$da~ zG+XsBHZdw&*b+hBQ6* zW15@$G2Jcwm}cl6CIR;NF!3WtpPzoL3gi4NN2!|TA%`*@0@>550!ic6}-#Gj@w9zDsx^A+TPt&X5)FRJm= ze^UUtX1(-Oz?KHpm7R4jjAyvtMFl>Z)|!keWwo--Dq|# zojk!5?OEm0=G7SdLk9VX{RvjLsKz7!IgkDH?LJI&ax44kl`X3=(P>TTr^orQRy0lM z{0VY=m>AG3&rhG~!$hZ9pP#x+LHL8dI_?u>? z38P1k#q?z*UiQBg5i~HUG@3tp^d_LUAa}KoPH)!t=$!=g-_dl>X9znO&5?{nWP-E}o4PBZTJ8{l!Gp18De&BD?lSAL1ey0zU z0OaHM==!!wQ)@4RYOou>pYbqdp!v3kiM|EDbn)<05a9d1&bwf!$#wvD0Dc(>2=4~& z+Q)el1YzPw&l9-$L;7}AfCm&jh6j;Bf*CwDvh{u33(91MDObiWZ$iqaZ#fcx&;>3^X$qGNFcLWhuy~o*!?4p`5 z4z_?6EMB74&Qe4}uOlY<=p@7-AI|=p^u<0p2|2@u^Z(!U6O9sI0?IJkhqWZ`g#_vi z2Gt7*%NPY*y@CiBH(!JCMsLDu!gxD9^fcy~^z>&fDE~=B(`<<<9*d>LcHlYa4fMcW zBhdE%--dfxXXvX0?tJZQ(gLxz@DOG3~BrZ{2Fe8^!OwdNUs(2 zSAY&>T?~ykck{O?K*aB;K_@pN57=AX#ehLC;Aq33@}QAOqd)NTFd6h?b}C>3@Mmgp zF;@Kfwba~VdwjmXy!{}*$#L=|$-}vE6nIV@+Angl{|ek6Hr{JtxRZ^iRqO;iC4WAa zaF;x(5M6|7*L5*Gz{b6peV#$zofrP4;iv7=ebKt5QCn* zfLCiX9@s|z%K}5{e@%dCd4S&v=mF3Uc(HE)^a4irOrJt~=8pN#HU*q*iuuW~Ahz*iQ)UJtkdM!WoBBko)#DW4X_&H>xnf{%6~A)CL%%Lw2rMxdT=*b7aD8+;J+9I1A~BwJ;Z93Gs3bil1Gho{p z{8^D0m+RVNHsxj*f&`XZV`4B0_;!g7>e9ypM=-}?Q$MG}1=jh-?E>I&K7rQ&{}1#; zS0h`188nPQ3;1FP-){DG#aDqRV8uPwE%1G!`xu@C-V6p)-5Om0jzA5YxR_x-^;WDJ zy!>&%evLH&zTL;KXU<;|4Ezf&0>-{V>PQqoV_`DzG)#_Oa%*rO@M~($WP4zKPgFF| zjXwAnHa`Nlcb^9*#a;!*2OW{vG9wzs=V`^Jz`meoHkyK-dCI4^$so`1S@=c3XY=heNqdQB6uSlcpXXK6 zTM$FG`@9;A7)kffOY}8Ct-i%R#A{16^H#f&TrP!ir&@O_ww+^Isn>6{n_(CB=&i_{ z-BTD{mAwF&Z~cd9OjaH7HE?LTGzwR$@e8nt-8@k(SztHg?fR={C|uoNeWLMHbs1q| OSJWXHs_;JE*Z%|cYPh-p delta 55759 zcmcG%cbrs3_BUKr_jcdgX}Txp07H}^=RD*zWK@!fFv18Uj5s6-Js<)iDx<=6bygAA zjDm`y7}v1s3hEjb1EzIF#Du%2crR^SpmN&&;R0@2NU5W@sIA?a)N7O!tN%7XtT7wdGo^R3L)rYAw&p?fBIAORZ?AlQL$Q4@$mZfXTy~0 zUr}M7#i#y`g18SbA<Lpx+oOAy)qxa^?b z8ngYVEW*!zzm$&~`A?p%E1eR88kh)b^E<)95GeK(3>F0+(Gu+%;_Y5*RLBv#f-DB(b zianxq)ogL%&NJe~1OE{x9{pLIxDlVbPKgu6_`HeF8GO3_Tvs|x?kxStC!15o`ksEZ zM4b4~nYz+^HNfT8`E*^p^ds4Kq~vm(!zf>!=`|)toIQEr*`EA6<7^N9J^yTX{+)cb z4r#iM&J{6`ZO>^Af$T@JgBw=LVJ~u6TQ@A1!=B`@7H(J+VR3O{4+j>zfj&mOi^KBV zuwQZB&5aX_|6>%L{0n6u#l`>Pm);`6vFgP0oL$R} z`Rgx#`%0K%Lh}+K_T zc1E8gTa6ibT8R)umMc~*=sTP0uus*hsxv3kIXqpgnw$OEQwws0D9sgFqebbNldY0c z6d=4%G#Bl}nUg;|Pn{!&N!yX_7uIJraR3|a3i9V$Oo&3|>K43kr3ul)}WlXvagilEG4)hwuTc!$8*bc2q zwP-hYiY1n09v^9m%QGKoDa5MG!t*V$Hgo$}OT>*E2cWkx9-nLpX)JXn_*8cMcl|8k zH)c1pgk`)?YKef+ytyTU#x1X+PK_}pF; zV_G@GOcAzy-9A_Nv6?MZqQvxFvZz*sogscz+B#SbJl|rZ@pZ~5!*g&AzEZEo*KPQu zO~IEGLFZb(>KgBlvKnhSGAxG>5N9AJw?jHc9RnG1;9vmjQixEF97Vu-1`1N9OcKVG zj8!5hQ^W?2XdyqL^jC3A8+if6Y)q*}e_xg|6iGI5M0r%srRy5#(NKv9oGb+Rs5F}Si1eL7wO3Acri9cmIoG)*q|xd`yD8;G%To< zGQJoEYQpz6wACsz4kFr3&?O6FnxUYl!uTG!mcp0P6-eEUGYGO{_6HXNL1v-_*&l_e zW`&$_-cUfFFl0)j4S>%Xu;rXq0RGNESojX3#o0%V=AdAAv%mS7DE&MgVc)rwrnLod z!X>oRSrbvYJ-7Bj*eMQ+$vavCIL$zY`h{Xl$xx1Z4r*vy8Y)nuokI~-&@wg#fl+BJ z1gltvogvQ;VEV8b6=!E@RG})IloXY(Uh3<#!*Bdk$lh)NK>^b)2t4>Ieq{)<3+!P| zLOKv<;1LE)`8Y%vc$xuQUWs}LJjXy-ehwWCyud(Aw&)AsWd<^26~r4j$UqL-+$2D6 z8Wdaz$Kv-VY8o(e1V#2q@Nr|dn`S&3( z)QJOyJUt#jR|ZUZgL6?7{bM_46@ChcM`#E~<;Vl`0E}dyK=|^Uy-`)#`y@)BjAf*G z!uJMLCUmYk7)00bBffGMqqiIxs(By;`FxK?7g~}}&qBUC&&LuNZo1qm&XMo&N znh-$fioCtRXd{oK35He|ya1p~zJrPjt!1E-e0dsxItIGQf93#K&pka?Sfvgy%32lP^Nr;foo_kS{`+!!-=# z$W16pcxn2RXg3A&!t(&EWS~%9(E~sop~XdsJZCtdt2j{$nbixx)r{9hzAzfVbsSSB zD0V9vH&g^G&wW*{ujR5+if zshs#Uw5^Dzp}W8`GKw(@FGKqmU!nXqz5}9J`L#A~H z7n#021zp=+=%j@4N+;?O52K!xF(0~S7)P@#VH(|_6h7mZcpi=V`|%BMT^CTAYfMGz zAd$#D2c6#3NY%2atNxJ%#q><-56tSK3Lu&C_vk|-i;DLk1E@8$`$$a@jkMjQS^{86 z(Fy=PaxS^ggnJ@dn6=BLG|xyatTQ<(_N+s~H$7Um~=% z#lHumk@8`ubB4-Ip$ds?D7phVnJDKuQ!`ZScp0)C*>2p8Fgqiq!%@oq=%toO@#^SW z5K8gt=u6})#jB$rDlDZBi#9BeqbgJSGk~t=c~oD@K%)WF>{!aKjxkWZ2U1M=17ir; z9Ceg(cX&-Rl*yFT>Qe6IC|iC3$)?<|$qL^EPH`rxzJ_w~azqa>vr+1lR~UefN_5aE zZy4p^kuw)xx?)p~-i~MEeN?zG?$4!)^|hdiy?zK)Y#G`W(w;VoO39Y33DC_dB}cZRS}_$h)RbJ= zY9QirR8MDdmdY=pI!!5*tsVe_-fCPOpd#7o8=&-2A1-(9%~GAM;70%hyPVImRL0D$ zXy8$=a_@#%qk~!2rd*9Wi4JpXVc8%6dH@JZ8XBUyMa85a{c2RVs0?{c835fY=E&L3 zglyF;rFkEO&0{)32Ap`dY85XU}`!7UM3>1>44@GP?i}-$h$hE zD?)N7LO(Z0KR7?bZLHCc3h7xl*67Cti$K_vS-^^ZTI55D7Tj{9pBK&qS_QY<=obal zawl-hjec1`Eq4;P+~`+@)WD~3%Z+{wwBABYmDF;h-!R^EIp|6N-!X-mawA5f=nusm zz-YG2+6v&u76SoP%8AaA9F;qST66SdA+_cj`7i;e7^s!m2MiJYrI4m+E94L8#-eAM z6(Z?sHJ3y#B|~-SetYGr_VLM7q%3I+1qv(&2bM+pdkAZvz6-Q{MjP0u=~tqLJ7z3H zNqxo!3V0n_-^mRKO9VWCs_C455JRiaxQPOO*V__Z)3-rSeZ~<=O8bU>M_t6b z{&bqa#tCs6ebJM!`a<_Z-BF5^z8c|H4?%>EPjj~BsobK_BUJL&eN5mDil;AOQ7J=P zofq>|i{_y@H1v)$vxrG73phUzPRpsV8ti-g=~=fqfqa!eBXj}-cHl0HX^ka3`VtmR z4MWG#3D~#jd@Q0k{^E|yqS}A<&nwX!aWlIq`heLWTM{ck%DJ&g=QA zLkAsepA#$4)37`ev~WKvKUWr%{DB1^m_ z{}UAUw-Bpr=ntPj^iycc+cKjFDOLT7x|$VSs{uRxsjaeBQIhkrbjjC)Si`3Bg_4` zWYtJs^gn<@bGJa|2ow1Mj1o=ZpPn9?4Cz=d5g@Wu}9TcMW4jreyhx<5kl3^ z7KOh;n3u|(0b$p0n!6~zOi7k+6NB`GmBqNgkDF(IzLE{;FdA02D1)7;i>vs zkvanpqycQ6V=_Ggqq5qXZ-@@mnBn_a4ZYC5kGh$b*t<-M^~fXrjY5yGFb6YP-Y zaQcq1XC%g+k=P?eE#Vr8v1=s8t`Wtq5yh?%wbbcftg>gaYecbYM6qi`v1>%JYecbY zM6qi`v1>%JYecbYM6qi`v1>%JYecbYM6qi`eK*0`TddBovq2?08&tBhK_xpIRI;-{ zxz2_NoDC}3*`Si04Jz5$pj>A|1kMK4#Mz)4oeh1Pv9sZlX0EeAB|95bqqE@;%~XdN zIUAJcY%sq&$N5_`^&T7vPc&B*vJZI>l;=S($b$e^0Q(bi4Dui-&x2r)2SFt~2%(eC zfEMZ@cn!X5!Cr%|Emc>U>&$PdhOwtWd7c6To`R=as!{M1_*xuDS+X?Y;QQX5-ebS%4PG z#;v_1pPu!E!LH4v{Fyu$+skrE5-lXn%}%i;+f~yY}jWbpW)vYp*Tn zOOUpA?K+Oq_O8920d4Qv$@Z?jF@Gb{kiFZxjcf1PTht%HFAxrNcm;86?*=@Hk-Z!6 zBzDr-(MC0ELo@F{vb`Ia%n~yt*}DNfvxB|seA-6k#>u!1BpbJZ8phVfZD46S>cll} z11lNO#%+L&Ti3P?B-^%us~Jt(wt-~ZHjr%F2H3Ve7iJO}w}E8iHgInN6}6u*$+!*N zZ@dGjl#SH@jMX-nqZnkY24JibAPh3d0x(ve#NcNdhI6p3Ype!5W7U}F{JX7dtOh;t zk-`N%@sY6_^b8>~R)a~#>a25IV>Re$92u*@WMeg$Y^(;8jn$xMteRx32B#Q9k!jt= zg40{VzE*6kDmGRX8>@%srZ!fCi;4#V(8g*o*;oxG8>_)uM$^V>u!*r6Og2`7R|NCHNE@rc)eLB3 zHMq98Js6R(`cOO9SPgC{>Wu7?vHD&+*H{g1H+mo}kP+&zjIvM0YQnum#%jX7MaF8# zt0OX2L&?T!$TL<=GFC$ajWSTvat2(^=5oH3CC00-pp*Z-b1$5RAZ6KKWg4 zE<$@tV>&_uCE*UM$mq|O2qVIEkrfE@ zeP>z+mCmMNxY0DcqJwK1hLcUhaI$F_PBsn0$);gA*);SVW-tk08iqF+o5^G*(=e<} zL%SFgKa)(uur>|tP83j<=@fTV(Ks7~;SVl`y}}J5{81r2>jn}2xPYXk4Z`rJMd?VX z4Z`r}g$sbD4Z?7;K^RUp2*Y0$QX|p^VVDd;&mIhGdvKyQ2*b$+VfcsQeqf{x!tjqR z#sYvrI07a3XD|+~RqXKz|BHcY_V|QP7E&XEjp+Q^5k6fq2*YQZwL{X?1{s857=#4X zp^NLXSutBm;9h-)d!KwvWyAX`797YDW_JXJrXkZh&aGDBftg{_n~6UbzS6q2#i zN%}lHNo4vjfHV*zU^FA!Z9psQG0^(4Jw0-+H$YaICc<{U6@gvR8rhN!H+YCU+iAoK zw$FBXEQ^HGrwf)MW~U?>KrgzCr-0yL5UeA{6PWR1M31ccx_0!)jJu$|GN%CV{2VZT zg7J!B6foZTZ8e_eJ1xO?Bv7fSejr9C&qjIYB#N6i+l^#%Y;I$2T33RL9OOR%E3^&s z5kZW!WPKd@sL1+w4G8r2SiTVRoNis!qr6~ezLfd`LiK{3`7#5vV5hpN zc07kR4{8KKbLjrv)Naguk9Xs_Z>R1&_pR)%hVtCk#N3yN@haI9-PNe+BhU+&pUaD| z#%JkCZ>T>Id|is5giRK^Oj_*nbvOKo2$c9c+=^eGhWa~&A4d|spyKb!04=D@=;2O7 z{rx#C#?w%LIRhE&Nb?V2K(Dd*M>2pOGS9ichia~;q3#+BPec9Zs(ZlIejQ)wJPq~N zTm>tRyD9&Ye0tX1l)pBY@~5Yv{$;sT8a)m5uP8bUKu<&cSLAI$8a)m5uP$f+pr@gJ zOhXCM(@=jMN9k#(e?0?w8tUJWM*`K$F8+=AcOVT-LpSzR9pbd?;@_fcfC`EnBWQ1&`L&K;vnU=329k_5nnO;82@kYZE%2dUoQ-u+G87}!P*MT2f!|++{%y_ zLYvuPYhkP=Ks#(LjMY?D?Xa~lR(}8p4qJGUtUTGe5|{;w{B~A>Y(lIjsfl5wXb5Jg&x7}O-35Z$0NA?a2jRYzK;TE1h-$)0S71m zBlt&syb;{~;0N^5+CuxNke+qZus<#!ap@7<{GTctnyPCNwf^QT9S;o;$_*y2Wmg=~n#0pE!Q84o@L zczc^h*bk0%Ie;;S13&d##9y8Q7~=%NqX5q{8Lr@fb_h8CR}8$=%D|vM;1NFo)(ONx zbmcU_+<>YK@c=UgENFo7^T02}xKg;coWcFo2D#07rN1hc!=10_=RU_8po-Q0Sx%b) zst0xwT{u8})ra;>`0od^c-RM_ixU5z@m-hdGfs>_E{+3O2S8wJlRpR+>jBsRVwXF0 z167N7H?Yt89kAe}v#thEs)1_j8~~j(P-X1|P_BVWk=7TG{GGohAqY_n3RJF#Abol4 z9OMJMUIZEy?HfX`D?^b9<$0jwa?yjct+9;I+b#Rtc0!zw9YM*iJ)2#7HoNw0-t=U% zXU}HOo@CFSWY3;l>eQ5bo;}H)J;|Ou$(}vQo;}H)J;|Ou$(}vQo;}H)J;|Ou$(}vQ zo;}H)J;|Ou3D4da*TRH&Vj+Ii+cJ( z=lj8`A3THYhNz${BYg~8|3Nx`>j`Lul09>hJ#&&hb5eWethdj1E*h$`2CheGD&_si zUQnJyZlqj8-@^JBK~_&=Ca9#w=2~Kn%%TjX#*kpGWZ9;ky2yEasOmh77G?q`{67IV zNM=BgB+p->=vCkce$pWrl60ss4AR=FsF@1vF+^K6dOKyqRI7{n0lijrBmz7ky$iXS zt3m|RpYA!*ry_I!WQFb-AK7pn4R!-SbAamRB~5Pt+@6t280k?)avmLqy?A=E z`=`L|pwxK+4(6{Q=Fdmyi~ki`?OcW=)1QT09{#V$8; z(5JB=u0+m9XlGsN4XM}xz~l|;;akbb3WT)akY?K<9Ql17QI8?CibLN)Hkxk-1^Im^ zU94)6vl5tx5iNp@lS9_PK|FSM14`FXkse8u2pv31)PmNw%S3;ka?hqf$oI*wG? z#g$Xr#Lr(OjFl83goRL^IBS-iv6~F`)M% zn(I>h@J{YA6J@bYVB+MHE$h=7%t;#&}h7s7j89Q3_>Fqk| zJE7cuZL_3wMk;^nI6{2f8~C_4@NsY8OZe%X=SQo|e(aa`d4Bn>7~HxW*C1t}#OhFj z0gjCtOw36h+NiPYF){=aBrg@t4^cZ)Wn6;v4Ca|@^VqK9J1BNzOtknh00ceB8 zTFZd8SFAb)w7p`jXF%I4)`mQirnXnCjrpxXfb5n26|URd+M+H3yFl3PP=z>ln`2h3 zg+Xp}EHr3goOEufaJPxsV_XE06QH+=*>f1s+r;dP8PMCr z>>38NC*59}J`$Cqw~5&+8PJ||yN=MjZDN=+6K%as%)XlOv@6}dj$`yTG5cl)^fod3 zHU_jO-M*6ny-m!%w}49DPp~K5zTc%@mNx*SI_f8os9@&^Lm;h3wHxkG*IOPxE82rsh2=*AJ|^PH#p&OHz6W=C#Um`2Qm@qaK46m@cE|AC_3M;&nSJ)jq3C60NtrM^=MFgvpf>)!cC#`fZ%LV9; zWy2AVz)5R>CQzw1FybtZs-JCSA;+hzOiHKfmm7~EAHP^`fohEAKtAn()xsh*x3{*! z8G$;Bl6;ndji$^h7gfWhth4&Lc~!Japw61kQP?J6QKO2yf_fYaQDRiZM>Y)c5{|Wc zc!iAo3)z4_B!N`rA@#HdF;X106nP6+a8xF+uJy3mSp5^Ewt*i!BnhNPJfvL9t;SkW zaxTg#Z}e01fWb@II_aU^=r7Z>s*Uf!Z@Zs`GZ1QGJP3G)hG`o_>JsGo|=9o*F{IaTNjIQ90XZ^$LCck?Piw^dpvUQ_*`wO zRQU+KfRg1#yI*`7jTY~mYoYikV+IRTes?d45voW<@ z?37J*b3Vb>B(*PMKcLUtsE2z#YqiIA!*AC8~0;@#~a1T4%LNWnD(#EDct2 ztNg`Gv@W|70iv{wQM|QdCHD{)?+#K(cWjZT8IyJ_}DEk#2SS#!soY)kV zGmR=^kl8i4GKQE5vDu^0P|g}&k?!Rpm1B~|MLKJAOHL;n(?t%?bk0H;TMi-3+ zA?SoDUH2BO0IF1m8(>}Rp$SdL4EdIHB5an-x+?Ms!*TJcWydQwTqXa zJfmeRDvgR((W*#0Jez7Fo+~)KPTh~^u^hf3_!RKRX?z)^13Tk&0vTKatO+`W4AP06 zi8_f4(jlEmvM=)}7&QUgm}J@vf(+pdIA4wFeG7)i}*z`7YC7rZU5@8q1jR+EI zJxI@!>+o!<)6lajezw(3&I{+O(p)-3v{)`hbWUXQ$O-V2{Rj#LD$n`#eAO(|kJL+~ zL1%>0WADqpP%5?B={6N(JoyzqW+q_~Bd@|I(jcWv&j_ongm)>@rYN0@)v!{cigOW} zG;R`B59rxeYk-r=&tWC;oW{>F5&I8{kgkjoAmq~%^un0cF+h`5^M(poS#ioUwl$(i zT`!>0nLi>)cY5@h>(IgXqDQ}(3#xtS(K0vTu^&C!<{{t?pvQpuK0?dsF=!6M<6wFW znGb;OP?%t5#ioAHqi7bA1VvH8xTX{uG$`-q&# zk!2kDC`I1x+&>NOh)1iOPo}As8J)n-=%meD^p7A>a-NetUA0ahkCkL2Q?{c*(yXD` zKdYRH)6ohmMj*m3+kOvp45}id9ddMvWr2|9Ok^p>LO&s%YUiP)tpVC`#EKF|x!FTG z-r7US_zF4xxGAOQJhYEphH-EtPsKBY_eQp`^O)RG!n45QnO0too4-hf+snfqdIFR! zjn+W##G{*se8h1!?`+}aA&pi*Z+r-JOE}2@59P*EjWTPwNFy)Gl^cL_4&$uxaIS3W zlJVaH)>n4ZIjQmQN4c&Xr=e<5`gcUiA~TNy`hm(wrg9&s7|Wd(W~jM6Np!Nx=;`Gu zvIdw@KU$8p&Q$J4XI!HD(S>Ln^yi-h zhpe;p0=4r0WDaLIA3UzYPWdbqiqqaXtoxDb!seiZdgdYH9Y8_Td@~cmk;MxU_7}zg zP837G`L=Nu7;cNS$z=Amt^n@;cnFTSw)x78HbBz&U1|tl_3cJNOfsRdE=Uf5Al3!H z!>_k4NCRzRU624Wq4z$)CUo(It_h7rK#EE%0usO`^pp$#heg0sU=c1vx5kx%>=))xuT_IfrJ z7^#*M3yk9sMF#sdvl|x}H-n!w84;OeyIHR7mNlQsIm%$y+)T=N!^^;7OKgdPlu<^1k~$`<>KP;&WlYjwwVKJ`d<|BKz@H$mj)psxb$VT-B7JEwuVaE9e561r zHL|FF=udkybJ2q`=Tf7O%UJ|&bm}gG$wCC)Q-gGHwfYn+-%}S+g{k_5esbm=R+*%z z)Mo|`gZwU)PB8uL#78zf;gR2^1}4+lr7m>osNa8WAl>CJ5@vlRll=peb#msoYddnN z@*mB`UIfsF*@}LVvpiIlxitNg!F;&#W}f~@$m$3WtP!ER0DmgItZ9Q`iAUyBIl#-B zWW0+=Z&5^=md258rIvD~|E7(W_*^EqkP-Sf4+NJmGVus=nTpI_#{#(D1CEA zw@)@oj*NcH{V03y=U}SO3BS+@;}q2`IpsBtDMKkpIVn-DgPf3j5GqK6dW@|YlnPzM08Znhjv$ec5 znPyv$=5mokJ9XsYgt9!%IsYqi9wRP?yXykiid@>B1D`8o6A{NSu$*AbSWjnirD|Cm z!PXHy4c?5_LJLlBq4m&TmswbscAQG}c=tb2k9#C_CqixC2m(H4Anf}a0iQ4svnNav z=BNCeAxsQ77pt9JXf>pzq?GV*<{&`Kh)3uP=BL8^vn6Gn2#Z1Px4J* zZu;mzE%qc6VEgDmE%qc65cbi5TI@+C01l}wPM<2(vCSNm?B9A0lz|A@P(;mZ8i%&0 zeoNIa6M6qw=+sxK%sv$Um2BgMXY>I4Cz(#!q(6*=pl~fwSkEzC__@AXO>;i0Ql+he zShIaV`WF-lTYHxN>ft^hTQ}miy#!U(2}pgIU><2W5xh~h(nz%+cM?-LJg~-Tu|TE9=}-{XWrpVCa0)6Jq6CX9%34FIOEqgUa2oni1c;^) z(c3hK+B710y9TP$r~}!lff|wdD#^DRehZq39L~V#$}^FduxLW69EA`ueh6`-!hPqHhB`R8sO&~MN5dj?-?jiw20{Yfq@cS@j#?c z7=t15SeZ}pmL;jGorTrv8JXj>y;Kdr5@FS)s+o-UM$!Ba8np4oo$h4Qt|qH>JCrrR zEh4}zBET&okZ2K5@iM~#QWVGe$>*!wvzMp>wXuz}b_w=qJ`K_|`!i^F=vAhV zx(HQ20oqFk1E(2Wp|vfAy^Z_3rNo~qW17)VS4O4v2`XcnF;(-M%?`U6hFh#^gC;mL zjZD%DOrt~w9VeWi^<-y}m~X#}3W8aVp3kB)XA@)}sxlOd2~E=aO|lJv&14Up$#gL@ z(R61RS0eUYFSg1kVK86ksWQ{=#4lF`1+O+2_AID{F&YwEqOyMC;bO56txi`v`!83` zr_eO+GcWI{?}5taE>xLHCHY&TAP|=BtgCU#P@9c^2UY5a>+1($0%my6E*nl)E`DR2>@a#8;@S;{Lf|FlyN;R$vo%-7& zDKH~OXa4r`b54v-{5{Oi1u;7B_Xt0ih@z9u=qs?tj0SwD?W<^j0j;*F{XxXvIva)k zAJx|H9^LyVl4<-dr1-w%9RhyZ_KY0@rHDu`u{zN1C4)}iVTS;9Xu`l@sOhwKmuEo6 z4e(xCJsGf#?fC%uFc3EAL>~6;5?ail6M0rS0~rRN3LL^fjzK5#u#te!3WPt;8L`Uq zg18$A{B$A@8wp-QPSTFyE63ePunS!dADF>D0(#cxWvtp<%Cl+kHrr*nRKgYp@3LJ{ z^b>%V23&|qi5lK{#Lx_|~d3v7Zq881(BPOMTn`SYk{Z^)x+>Sxe> zGuTM*EHKKAg-+>e*DryM1gAhf_#z^>&83&w9WH~yaB;DvAR#^4QlN!LN6G9S4A{mh zblG-q2ExV}aIyO_5X&4ld9ttvGLT`=O(;0dNCa{WI$UOt(zFWPtWy;oq@i4LksMVLm5(e3s0|XUTkgmdwXz$$Wg4%=b$kl)LMz=Y0$kV_M+l?K9Jk*0@17oXU*jMvMci%;xjga?t+?Fl$eNoWI%iO!)lDz`gbi(s!UeiKwj z8gwm!UB^HL*So#Gi0XX;*So!;=w;+&BF??!uT`yk(!D44cH_?o%Oc;xd5T)id&qf& z$l=O7nE&T;;PJ-56ldjHRoc>q`3a<__BLr%-$yKG<-DwKPrq{S=otx)b~*k{?ZR zlh-175f&p?a&qk?r~@u%ZDmTAcx9OQ3!vGF_*d&1ZX$L>7LAJ`{WJ znC8ckK{|FS)BHH%W?XPiKaIG8s8(sHiO(VlF?B_Se(r%#f`x#ejbMdRh~Zp_cfCS9 z8|lp+FRZSZt~7(20?`+IkozPds3^V2GYyfvR>u4qXuwM*w76C z+bw{Pi+F(Y8d}U8FQOW%eZBJ*c=aPPr$UWn!1|X^ma8>fho?iHGIK+qhO(1%_?^X0 z$(2xFqTJG>Tm{Ny2>1dk@8*Q7?*ysaor^ZYc}>L*274xg z=b%JCqn%?C$Y~4EfSAM2fdo?NcgTjkK7azE`$oqq8~);r-TnLkijsni#>4Y&h1m2((U zM_g_~(7+`dHlQ}R01>;JCtoUgw2>*zFJc~-8ddHb0+%>-t{ZK)bFKP~csF?wm0aXyg}#3z8h-vq0cKZEq`Mvz{}2uKDQ^(CH~Mi(#sAN_(R`R zx4?0h=@DO(5_fh>JO(*m>r0flj9Ik8S`?Rft*=R~t@SmjwY9z`wN}@Z0~~VnXQ#wb zZCg#R5IdlAaC>C99JZPRv`nY4Qf@WJ>OxFlrQB*>sKE+W%B|*Qx=f>a4tTBEP3t5a z-w@RGW{!@X!vf!Cx&n_^vdY$*uEZDe(079uU9CQWLf`CxwJfdQnQnbt&h>E_m!;`g zb+ONF?=w-zdT9Lt!z&{lb&?I6-7>}z<8^hc{0EF-x>U2dR0oW6b-rhDsSX%CJ;q&N zoX_VBw-2h~j6H9-)wq~5Mus8&?Cq$=K!X1P=HC&wsZlM)5##o9mCQe23{U1CFwRTn zA28fWzvdtE_}4K1u*ZKn%RFL)b=pOood?L4(;Za8u(>^MxPrnYE%Y)vUD{jWjZIVB zOd`;=Y%ti;H345IA+7X~zLu`>gsqd?pjOY|hIXRmE$r>`5TB9Vy)mN2xZ~u88Yo%G zx3@*?3U`;sizm-GN4!tf=PqeeVm5={-+mqe~40!(%#Rlt`-P{Nl)K*E|#+PKdzN8A|B((-#Mc$zla(;WxBzjIblPJ>(XA%`L z;Y?bMn1nN_6VfD{NrM4+&ZK??1d%fdexo`Dx*2qxG0v$_OfSQAFYN@=gnMZOV#vL; z>;~0gCY`H?dubi`1u75`&agY&gI|L#z=3Cp$}0>yQV-7(0j5Dm>fu=;z&7Yez1@d_ zutB%A;-V~yi3#iZ9XG0+o;TAKS;ILDn}&$!CS-Na=?R{L1P#>LA4T+A^sqy0(%RSaYZ>j1W9*b59gMjwvZi|@v- z!D%mx=yGz}T9<`Y2bZJ0+~vWPu3!KeJi2nnO~~K*ME*(+6h_+>05-ab6`GWNwVQSX z!)&p{?) zJ?I8p`wtu`47vf=zMBElpli77dl|3|x&YU{p8*u$0_Vt0n6h*w{*St8XAtn1oA#P3 z0PJ_uzCby9Ql~XmP&xII18O-!QO_DTq3cNb1Yb~~cY0$4G3Jdx#Cxt_f2PtLX23Ll zUI*X<0%kyiCQyBS#8F|R8R31*0BAcz`!nMQqD?fpGq8_hmLYt6jgpVAQS$LMNC}*oix~(IHXR$XaWMn67}KUplx$qgkczk*yQg#C4)+oz8+R~3 zw%7_zmnhk|gMqGZ>to{*rN4n;Yq~_q?k&l$ltLG+oZ{7NwB!dX+W z>^N&X^4mK$oKKXuGpO$!`Tg9yF^!v(X#9wVvyh9om1!*TXe?~ZWE=2Z*qF(SKyhLI z6fcu)p*7WBo@c8|P=rOqfce*|n^A_v9z$#ayA_%4%M9z7;om%leVa1u+mvD7rVRTv zWjMfNp!p3<@CQR5G8D_lB}8^5GaN#W530aeepjyosf4lo!LE=b6)BcK!!4ouGumca zQx54K2nHLF_!wU?|)79KC7Zai-|T|f^5Ud}|- z1@b1IWpK8lrRGpxCbd&oG_1SEYOqYWjX|1;t^RU403Ge3w&rm<2(=y_JLtZ z?&&TVH^Cq-8{YCbl;olh(_PpQA+!XMuYgesEp96)DAbWUTUC1`xdIgw^` znV05xPXFXI-zKG5i~i)jBu006Y2M4}ot&og;l@OntFjYj zPLH8aXV3D+soT-?pUp156Etb>bTEc8+@GCIV?F(4;3FGGlb43*+@C$l;}IN!lsmJt zXx2i1Iybc*=FaSq8q=&5!F1;kax#x7>`0>UJ|;|Ce@o$2kHXgMAqigJLo?U^7V{q- z=KAcR3CtsFoQj>80TQnjNfefX!lK_&7*4(z!d#R+%%k8RyxtNw!4Rd%J{5kUhjdeB z4^O52>6q|bm4vj-L%J%noRHY-?0*>|T9)}OTAe2Kn1{72vsZ%D86eG1BK4t%G(U56 z0%-zT!_>?p2})-@q^X&M6G%saG)hyV6)`MZk|T)9H!5>T0&6ZBNuSJv2~u>GH6!)O z?3+LuiDup|^XUZAA`hvZE+1)`|1$`oASvfJdPoJCo!qenSiMlok<8r*QcrkTk<0-e zzu-J4b(hMGQC^?S=&$Pny6W`VrFwGcbs0llWQkLeyHp#l;dvQ@5}^>|yo`(W7=}%G zx1qv^XQb00Mt|M#!65+XGnaLEMt_~KT6RNy56`IZ8U%ICBQp}co=I2f?`AS)XY`)z zdq_c{hcTVq>0I430i+w$cc)iU9QB?wh(46wWDwnx?vlmObv-8k=7}}VrFX*KqGF$u zKG4fi0QJ}|ef%Yw63=?e(%p^1l}xxpg0Ki22c_T(5V9{lQQFa5+Iv8NbLmU(=ZUF| z5y$A#V%cZ`#x}>mF$djGq$P^;SE$L;Y2!VyP;s73^NNFw>kxNVnkU^VNLe;q2B#78 z%Sv;rzgli$ymMVLlBi~#c_QLQl4UFYEY5g^}kaV;pC(WI`nOyR` z#ykWF&8&9b{Da%xzf5(tVJ5TvGIfF`G?m#NP3@_{Da`h0>SSVz-GK1jrFmHm$Hl=z+JWv+Iux~+2k?R8gR8oXSpzoQOlplJUUur`#d_I z$3}S7Pa^v~cAm~o6;u6N%$122+23NbD4{2@FJc4YZsu8JUwDbN$i9pvsx5FAi7X%b zwI`90eq5mT=)bu@dtz>fqJ_98Hc^w-Lfjkcr9myky|HOJBXKRoy|EfMBP_*7JkF5f zEnr%bV5-~E9Ujw?*f3rCnUYTam&E2#6nv=iB=oac%$?6qkv0^jS!;)zJ52wZ>(qIq!bj(glj_E0pT-^6E6bcCLGR&gWS8||TUuN&DT(S+R0 zpD-+riF$Q6l6!$km69jv&ZG=a&fl*oO*#S5NGNmL1z5pI>DE!$Z*kt<_VQMqQsy>&VP1_w{5#?m zVkjd9VSR8R;{T4gylXkz|Bj5)!ayexL>JjHk??75?ALk;J4O;RrQ&vsczuTa77eFk zWR7lTmGYkeJ4JeGaJHno20BGXZiZ}BJx+wQ0Fy2eZziJ719n#rTqevNsM;UHUgk46 z^DldO_%ZAaC7kyk!($V9f2z(YzR#_GC!7#3Wz`A0MXXZ9{CD9d%y02PFuxLNH!H#X zeQq(6VO+E1W`(_RlbO#7k4`Xek3lHN>72*z!+rzm=!0RmGuCslVA$=9btb|d*X1mM zhzBmiaEmed-@Hjc&nDjRGVt$EAFq!64}rs1Nl5?nkiH7_`Z>r39`+l&vdS5Izblld zL+((B@VU^C(IHRBo ze6zVm-wwJpx|oIejt4G+I$b^NgTcfwNtt*s*f>mn2DmPfiE7ToE-w>x zL05u06Lmp%GNCiE-s7q>ais??68>_OTyJnF)K&V5N3uHT>6GyQX|>aAw@U9ra=IYc z+pB7GA(XPqZ}OB0V~GXRCFr#XVa{+C?N&MSDgF0>L=jsd`S*dwBG#e7Z47vF)^&fA zM{Z-lRWYr!8v~=Xj_XlwbD*)OT<3fTX4S;(8`~{}PV|lKHjFA>#`?y-!0Q>PEBMB~ zRCfh)xR?CS_DHgJeQ$eHCq)*^3EQn$w9Vbioy#6{b@>mrD;~}95BA99Y~G!qDa{CA`0`(N@9_gD#A#=O}n+@o@) zQsrN6dF2)6W9SCc66v*Sb!+ApFwJVBC25wYC9DS-mZt~8ta7de^_fI{slQ1ly43G= zqO4j={grxJQpuytGJlt3)mq{ANOJwH^m`%{<`75j_3F#tLE$k4qKp3(cYM`FfOU!orUJE5p_ZJCFa zQtFm+p08U%S)Rm1uU{fZT3LE}i2Zzx{nsXE+rzj#hpJN~3MkC(7=vy%J#lJfxyMU? zyV;~xZa16M${nUBPGRm_;mAkaZUOI4O>RTd^eTb1MVfPywMCholeNW6&}41#nT^_V zFYMm~hL=;DWk08dE0O~Smy`_ynrs{}n)F3a8;x0g2qWCw1RbqFPk40Z8cj+(*Jx7W zixXrxck_(K+-*nuA8t5VkE(R;`iC1{MREr;+-U580zl15WI!uX&z5dMvWzAjP?pi8 z1IqC@!qQ*jY@RD)#K-YH^~|6lg?IpSK-#R)9utgo-mFoJ88{sn>dZSIh4|=@5T#D%$NzucdXoKL zH-YZh&l@%#+|L^}{<&Xu?VZ~nr;Of|XHi)9&~KnKJ-4R&JpOmD?{Y4D!n+nU@w%?A z@VIn0W+5frY4T6}{@=ON9EVaml{wL7t(#H0Rg6TUur-=;-v-zBwlJjKumZqHK1!wgSPeJ z)kKwEd278KAq*k$%G;5`dW9ie+CuNVwcar10WX)3xzeqpFX8dOUt9EFZ!P-E0dKwi zw{I;vd%#<7|Lt3gIy|Mk^>%)15nhDQ)rZ3}<#-XoS9s9dX0YB)fV*!7>+K{T{n8?O z5yC}?qn8%#e#%{Mr*|H_1r+_#B6{aR7|n=ZTJ$9t@=J^G%7aUhE`KVTliVWHNwev% z4?ePCGVs}*+K-;l5@U;iH-@A}a}FyNp#@Lkl#`sqDc{Fx?p{tw7bvAtUo@#gC#_DU zcSKH}N)d2%q-CzcqTjiiQf(T|P0ve^-HuF)vc9^>zmHjVb8hlqZPrcx61U0U@E#72 zJD)wRrr~yhKF_GBy|b}*)a;i*-t4TH?~k~ZT@($$9po>*gAl9lR5ZbtQt8>W=meqf zWd>}k)_MIIcN3TIphgg3Y~u1it9s)KfbwT?69B*N#D~|NQ2JO9ull?0IeyjO`_JL} zGxvUgw$R*keO%DJA7BMSB78qUEn6`M~et;=J()e8(2%oojMf7b* zVcOzlbvHI3A`5S($c1n$_ho&rAS=ScaX}n;?iwb@wCK2?-ID>^qT_uU+NnWOMk!o7)IV?b>z-UqTI zpPq$I?3RmIL!ROjrSD(+jHA z%+fKyTk2Av7cB=?xD@C`%Yjuc1$xnPU@Zd$7QJXWu#SNei(a&hSM(9179vb<(+X_D z4kpyjolf9IRnql8n=I6S6q+t04_}4*q$0z%K&K;}HbNAUj4Lt65aG`e5qQ?1cb$Y^ z9^lMGLj8`dzz6RkIoC?yqe6P7S^@IM1@vMS)1sFy2R<#LO^_`tIyM;iyzoPyRakUv zFz^MxZDWE(rv?LG7CeLWlPo$l82GBNI|xj%=+t1~Yet)D(W$|}H;guMx{Pr2WumSOZ%3l4@T@Z{rAL$rlio^Am{X(h=<-j%dGv z+~?Ba?H~?sGZ1nMWm(V(}8s?Ej1nH0EP7oy{++!m@#oO;OC<+Pln{g$gW=MIHt+ zI#tlcwLkc*M8{^toxi-S7R$IZ=uiCf@SjvQprTjQ!tNbG=6S3)dpzF8+!Z`1u=42nYX`48 zv!6vQl_QKe=C{P-r{zcSR1O5chob6o;62e?jDw@96S4mw!DyMz6n-k?vBsos#B3Dq zgv*ebE%lgbp-~($L+~Kv$7NQjnf*G-kq1%YJh#L^a>-sP1OY z%?3{Mrk7@ON(Y^$l8e0sY3Q}J&|TvNG{~(f#r#IA`Wj;!TFtc{SS?}_(Q}yOU?yo` zp8^+fPD% zBd#zjAQ&g~mdf){zj506<9jO0DSt~%j<*6t4@O}e6eBb~l~QTgY-06Z!?q8|gQtHe`vqxqyU zGSQlZebgmA5Nw(BM;>Y2aE^|29sue1Pi|^Nw*;z7p;D8MxvdM4ZbTK@V@Yy*{4CHf*1NnyP_GKjY_v1sZI#vaGU&ytTni&vZvC-j&2oFy zlUpTEo=I+8u-7BbwhvUM^U&LBRIkBEeSL(+Mf%gOw7+2Cm?>Nz8Q@CZBv;4vk#RI5 zQ1#{JI;Z11==0-F#XGD@Pru_1Ezd*@U8jTJ#Y}mXv-Mq-+mDoTR-}J2tyz(=30j!F z&Wc<>BcoCOEVUr5vsYt%7drd-yUbzYd#tR_yr<^IZ-z4Eai-rNA?&w-FB@LRawcaw zFEYgKeM~xJo)?+y4jN{EObqfOm4i@N96~hd{Cj?+myWG6>2!R4q(Xz(H25*5U+;xU zGMk4BTOSmgkWWm?QJnX}eTfUbd!FwBIvnO19*tWs0iA?>d7dlqqv0mw)=R^kPydSX z$cx}FDYq5&kA2D<3L zESCmX`_EqbDjwx#IR}t1UhO7CYa&fJAIFw0*Rs90vJ;XlZ#p0b`kDybEhj@O5yz=b}vZ1uV zRgQS52R);jaCjX8OS=TDhb<0ej{`IMYk`k!sPXU@hlXhUYJ)ZoT;?&VHHIUTOFXbf zq+RH=`#|NEk*W_4_4cHY_ShEe+X?YxlF095@;kAH2VHe)K2UjRL)Uzu7IFvK)sY{e zgG~JpO=r6^<3p9p{dsz5q^388s+jxp-sq*#HtIj*MsemtHFwZH2qF;TVw5nKgTUby z5eTuaQlUc`5YNAYUVDd|4W+#Z<~C*L4ls8+>WN2?kGDTkqtw}rPT>)iol6D#JUB{c zME5A&kQ$j7dqmBZEuDvtsN6KddMY>~QT#pYog+uETtea7gTuY>=q^ZaV~{gTRAfWE z#Leu+U>_ID{17GD7##h->iQNqovQW!cdfP8yWhENW*Bo}4C8(sW{h#0E2B*ALgY4> zkX%McIx>__lw1l+k|d;(6neWz>YUR>l2a;59h^ys8YdN9_ej_$k)fDN{;UA@~Xh8Ch15P$4oypMt?^>VJ5H_K7HQOjMlPz1M~E^IR=CxUt7$vf)vv zdE~3Tl(~=k0zubFNKI1+iL^cwD;HqjC{*q-dCxGp&1FK$U2`eVQ<*35O}hDcsz1Vt zbsit2^Y|0R9 z2P0Hm~l?B!MQ@nn5 z6HG}G1gSg@m%srx_@1cXz>raeu74jNa?+~s!YN)aNH*)>kZUY8{x2V*BZh?3Tc5ys zdIS;LioH4HS+Szhvunp9WRkz{vEQK8KRU-tI*ox6U0%)NJfjwUt-aTx%Y)jo5GyxFWc~&G(WL#q)0X6$ zZqV+$Mo*mQ(;!=o3w%Q7^N_8$nsGzT_^V8hadFVo<9+n%u5Zv=-OUm!)b z1wZKEg&+7-h+Mx4L*ps6u!^TNq~5ZF-q65?5UoF>{1U!a+mAXrEyWo{eU9t7J zEosXs^yi9&^o(Wh{DGL5J~%%` zi_|_R5X#pgy=X+rw>&e&6)E59?{Bw!Ym8r{d~2Ftq(ZBH;Sv&r&#{Pn5RH(EmEMmvMge~yKn&0A%?i*V;Rm|{f%)E`; zS%FrcpkRDav!0-vbnExQ9w>|W2ijc3q~`Nk145$hV?I zrPuzoDA&IxJpWn;5FGf|-b1K8^VKK68~@tNxP;BgFTv9y$+Dn+=+F2jEy&nBvpW#{Kw}^kuLZs`O zhkq>$;JW7FUwa?GbAV2)_-?V>i-)|BB8dV~| zJpUR2i+TPv0wL!4*9gQi&%Z_>j(Pqy0tw9XuMtRQrK;2K5&s&+(OLHse)rD0hkwoG z;Q7~F4xWF_<>2|(2)Jk6!@owrJ?kF+H3Chbf1BXOcfWSzi>Er{|L$4$v42+uo?RbI&dM~T42UvH*F{W2p7`!+^;MkI{WtaMRh*KrRvo>HSF()%jJhkHw%9rZX*#2)@Yoe{ z1?ti6Qcke;4b?I6w3C#jlZ~m4tVde?unc0;&db<%5X54=-On-i0w=cqX%IPS&fX%A znDdo+v-tB6vA4L1szvwNS|Q*LqCR6d^%d@0T3>>zr(Iq{O}Jhk^4p5G#dmAu%E z9<0wttmK2Khw-KmC!3{`mu&$XzOtXB*Evq}I#fsOIqD5|vJ%FE=S&=8T zuhG;FB&&E79le1WcJ315Zrqb}S8rf_-F#DYPj6ro-JUMfU9pjQT`@Y)m&X6_ZY5svVJbtS)9e|grnVd!Oq{&rRquHNj-{P|9?pRu@K`^-$b?>BCSxS zTj6A^+X@3M-3pT|F}cA6cu?K_s37ja2{b5v?dFvpXgWt-v_y)w2Ud0VYMRgn4=k?g zUjjrjeTTGXjlG+6+JQ=n9Q(U-rNIc8J!Dtbku4=XxeJg0cxiT0CU4}@< zVY$;2wUr_F>kEZZflw*pHzF)Y7#AG~ZAZ8lVJ^bU2x+lc8S5VJfGGVNi7Us4LZL`B zt^yrva2$si2)&|Xpw$r`b^;CbsZJEP2!CyA211Jo;8%#h-8I#(twm~C4raK^>Jn05 zoCmHVB;{t|91OxWyf7Id4eu5RQTsrl7Y_46MCo4>TzQ}vwQ%{C$Emy8h}7(a0uwV2 zIY`KZ2)%ixbH<{=JkY5+-QhTOpp8hYWe%M;N7Ap4SHB{j?~GS<+lt+>6R$U%FUPAd z+KOfTM1q=}A^N48W1Ka6T#n$62L=u{>D#Dd8KOCE`K+BtYGuyXGpF^Lll>@nL%QHc zi=#tHs(U+8R=f5|w@zo}zGY4*%^Ek|5 z9mJ;;bo!Oy&zu=z&J)oDT+mbj9vf&o(+H5PqB2F_*q7&+h^1}A<1)oRS?q#`Ow{g- za8?I#h_P(NI*N(RQnz*#&AXbHrinKx4f8&>d3oE!oA<&EKA)uybQD|p?^){h9Fdb{ zK4C)iMRf5#(n9}TKo|U$;?I2IW^K0mA_pU|!yY4`c@U6NVj)ufqi0S-g2T!#sNur_#HKrnPJRVgw>dPvCEY8s0^0tT@AM ztzno=3T817=@(mT7hCHVTWc0(YsF$~wIXa+tMmXL=?!38D-v6)5e9n#TEvD92_5Ge zEMm4+ATFuU-VGg5NFNcWw#N!J!bfWnTk8;8YYgJEOwbHP)%CMm@8g>(jq%b;n6H7SM z#6P-;*`y}A=8D1uS4})t%@=IjsAajLeg}Purd#WIntc;nYYAKH2wQ6i9p6x2LpF57 z*SVq}Ka->~@4+w(;05qg$8 zww~nDra6v2)>GW334V~J`Yc0%OCib9ti%&m!etZPka_V zA$^%=T#sO-2oFH;m^fP(1B*)N+m~33JB??G<@nFCalI;C0@t3gl(}T?5L|D#6Df7M4Q64fCDYrfsY9&dir1)CS?N@b4mZ&? zryS4p%Pzx7+OCI4nB32)c6r;n zr%8}8OX+&s=s~zn`6?CH@)pE-#wU2#SFaR4vl6wEb9a-pcWt7I-u(l< zKq&8FL!nOPBDR_O=stFoI^cd5TOYv#YzI~SLG}mr;!@VWIf7-Z3kkNIji$0!vQ^aE zkFdW{QJdLi%D#n-zY)P!R`DS=vgOmPki_4{4q!COXW27^o?};t_jcBw&@uKl6@Qww zp#0ymJQDB>%cp)h%NCF@=h#skX(_*B>l*-_XFaGPe_%y4QmR;7Qv^S=9aN={ct2{2 zlf0A4xXG$lafM3wjmMLOzw>p}i1&(VG&~oHw3Y}S6fZSHuu|MaBWjE2N9Y|fsw;wb zMHE%{ka(E-|06M$`s`zI2k|^E;z-V~MAQfb--`J|5&R)OpiaLgexULeTDvQ#NA9s2 z^+T}8noKRS%qpNhdDtq%7K2=4eL}n+weDzz;Bo6Bb>|b-b{a@;Tc6SReaGTdvjf&< z>exe8(=-GhTNwipd}htVNS9w&4QcRvZH=PA`Hl4q33}R^dt(K{Z>_7n5S+1Ir2@}d zi>QCDTA#H;aLqb~C$r^BIhBe~ay+4RvN!QwFTYGjuu=X-Ewf4fkLt2jenSoPjNC~h z=Q-J(hU*KmX(ECb<%1;eE;*EXDJ+NN<2%6eJy}NM?tPg+&2~UOOTBeS9-;B{k(^F# zaYQm|nWJ(EaXT(^sn1Wy@l>ai@+TT=r{sSzfM}Kl8}+4#=DQ%Ao^=TY)L4n_sL-U3 zLDQ)oW3S`XJ=Jr#6(716A_q_K`fBuWt7%1VD*0iyi6U3A_MdQw%p^_0*I5iT@qTtI z)$x7y4^u?^aT*SF{*Holkvxt>Yn(?7)3lO?QS*j0#ai{EUTm|ODwXj-dtBRZse^0Q zkP*0Mzd_d;Iftn|I=@fyc6&y}-E7sV7)&y)WSLaVI{qb1tH<~T>ZtX+1-0Abd?*dt z4g4R}HBa!On-FZ|an$bH`B@qS&+|&kzJsSxE56F#rAhJ{e~1Klo##_=d-*HWc5m?h z$q3ep0vbv$i7zW4s&2KIy*DE!t`m*ox^0L-+pUPvm402U!&avJmpDh$^^lM$2tF43 zs6Rg!cVCa-l(+>q68VkTN3`$6JZhTn#d(tXqFCDo!TnYu1rJzFiP=L|J1VeZnRT9~ z`*Q0H)p>;#O#-a6)>6iYts)wnk66hxs#jUblybGTfu`6RYcDm6vL2?1y4G4uE&Qmp zkE*xM`X@y`X3e0!U2m0jL-4qjFdV@KE1G7?6IR^<1RE=?yXqo*(ppNqH(8UZhEG|e zNoRc`$5Z4H`2e9$Wj`8ipUDB#yPwNJRK!uKNQz^!*-!*uNJ+FW<)n@Xj>~-N?yqD$ zs>FX}2{qR_`PeW7RWeAe_J^$Ki;*T51UconC-@9C{K?=I3?|+3J#Hi^2kxbM3>}Z* z;10qssdbzWNe$Jh#CXuLBW|E}8TlItH0m+ZsH2mqrAzZDe(dhXxQ=UA57+UF2jN=Q z4k;_-EhDH|CIrD;PFzgQH)$Mo-mM>zI-NR_nx{OU#G4VSgX_H3B=OykQJczTEOrcrxK=A(7b^^v+@JMICwZXY47cI$4!be6~zcRKb z{LvVMF)5>9B9WED`-P8;wZ3C)e0cwO>kMo0@fc*x`)(Yr`CZ53T98E7!u_SV_KX2l zXWJM)e2aCC)ykTH=zs8MkVeOUcU}14L=ado9KMzKW`&=+%{t3s4&Uab_+wI7O|`yd zT~|&;)*Fkb;5xX)G+c)cqw7trDSlWXT}KS2>&X3d9rZ1)x{Mj&SEdu|r10h$C@TI) zImoBjbOf5dF#NpbIMei(jeHp%jE_|7>9+dj7h33su7E<*4!tMhjRVfHo!ud-%~ z5xmCE+~YBMF1&oM)iv7w5gSU_dk!DI*Ww{GEyL%+=Sh5C_>%yW!9ppr)vpg)4I0FY z*avT%e#HT` z;32ECUIU8@T)p{_l^3L?uy{oAWmfNov>q1w1e2m*-*CzDIkpV`Ge7S={p zt+D#>-8IAc%1W|F(!yB0i)xB2mqB}YB)uYOxhy^hO>@qQ5NHK0P6t>=E=*clPKzJ^ z6qT%A++Zc8(BfLG21}H{`thL2QK(LW%!Y-pY#@2dtYb=>2S`Q)&RlJ*9k9v+p=x6!ix9tigKwcJz)L7a@Bwjtgd`fl3MzKmCSb}sjVMa zCHzoQ_~HlF%ONb9!_OSCo?!fFvby0js|YeL{mg30`014JuFoxO&K8G1Jz;efti6h> zv>LL>;mk_ws?9g1g)`4vMS{<28lLroRlu-*-CbqnrO;YgD12E}pboP+oWyP?w@}d+ zttac!>RBv|cB|Mf(qxNUsefIx8u8t&!e=j9by*s%qs4PE7^HYIVp!iy$@)Z?#fH;= zv@Qi%ayao{y6Dqou&E-8^YHb0sjUN}JRviahU;hbU6k!ZHl!{wX2ypwwRW_gX}hMyiG z8^yBJ@PUc)h~Os*)W+N74ZNyAokz$5;Z9RzfrX0ADVG;m3@wSpgDFhf{nf(TWlOdE zc3De3d%H~Ii?34$ZihL2^!o6-GvywRt*!9oMhe2pkjhAL>Po$brZQ8UB&j#j zRD4~hwxk?!YGI1gKA)BI(6wB@48L_X^qKsoqWufX8@(%U(>vmRnN)hmujkI^&phqS5qtNIY}7c zGwM0@SPdOWy}jlVTBwsmz^tcW7zMReT&k1I$|-Ga)eu!zg{e-q)O%-COl`HX2_jdd zI>Rvg&!(b!dgn~NRUh?V4@HomGSi&aYH)q07ft*P^_|I_CVq57ryrLm67UUn-LT>E zMotSR^^Te<>fE*`QutTYoT$}vn`!QP&n!k zLUhN)mJW^+SMjaT>Mc~;R!(E7H|NxhR!$O!Mw!+MJ*fBS^jK0GTRFx2gd2~HthGaD z6Sr;c{3i9eAZ~jWwsDRIrT+MYE6(w5PAHt)!AZ5H{y?7B>|LD|r1e;?gEb<)PO1hp zbduHHT&Iae8+RIpj@E_O#UPhRdw9OI=M4<6&vO=W`8)77x8Avh&Od|h-n&Z6cG6T? zp;KQK6**&|d7dnC8U*!bUce<*7CCLC-o$frx9N@nr#I(xHP-aPcw5lj*$nhKDRsB;{uBiT zR&`!-IZIsryO_oY-dzY!uzZ*XQw?Hg6;eVhj2%fO7^(OXUH0~NElcX(MJ zCx;C@1MexS2a^a!5q=~47;OCoV|9yPSv8#;bbbuO6u(KTPCw_`DB3L77`_Z@zEwWl z5O|pnw*}tn!TlwU;HFb z(g2dJ109kLaQera3Sfgh@EM}Z)a(JyHGBeh_CV(vKhs;?F~~`)xB?4|oSz*379e~B zm^QBoF9rUFoE#p068I|^g5+E!`tt~jU;vhS^tXVY1STgd(GLN~gWq-!lkodtR3gBS z2U75ai}u=@2ug4S1sIG3+M8=I(GNo)gNaVosKG?<3;_%#I^A0gCi+?*P9d)f-EsU0 z;E1ip#DFYWKYgbU6P@l&e)=UJCOX}${Pg#5b22!ETytdjnuz1--vgZ5733i@Q6zK% z+(QNvPx2iZO!WOeOmuQ5`RNHTdJQHzIhYKl{M&sP^fb7v|D52w4_9d!2a%C&co0vz zU-~iG(|%0Gv>(%L)Q?+WSPyp6GRb3Q;z_o_K1}71FUwD#qV5~ww9BgU<~Pl7$`+`e z6)q0>FtI6*Q>TYG`D*YGC$1tEcU{Aih~&^Rn3zrRVWQIw+fQHR!$haMxSzh=hl#$^ zhrwS2F2$>thdOCfFaMbkcn>#w!-z7{&EMc0I8ZOtflCJwG~GzhB%-QnCMMl z8yMVMy)_hLjm!lTH4ZG>lKFrL!*ZmLPAthyXVT9^`mw;red)7dGZ;FhCzHeAzaxDf zaIZ-E{J;WV0?I%(iOE2ij1oU4qr~9Vx(;p0A~8`^&G(Wcm{^d7V(2Ln#5Dosr?JqL*OjJDVfyG@3=YF^H<;*T$onyUrNLlIUyc?sn9`GhZ*WtJ*yM{KOqRY$ zKsZj#9_=)6$h+$!)(jE*IvAMxCyehs6IQFoIPEHM^0aJ4Jz($}S1U`#fSrss)KL)%63bBoczX!e#bS%*{oxZiT$45^Fz6LXlRxFgil|&&Q z#;NN{Vd;Mey9u{nUCgr`&2<%V40=Oe|;bBRB;Dc<0V z3tYTLUzC~+K@zc%wRNmBnxn0PUrom3V8r$EvOS4te?@l#KZF}u3s0K2 zfdB1{P-6S8POpOFowP>yo{oO*l;W%Y!si*MG|8rQ_P1+brQXJ82% zV4IhI5bzvN4$40q_-;uXAxmy?>QzYJl(>^v`9ydG7^gnz$9*a5X5bmV^e+H^9)0W;hN=~+hV5e2*ihQv0nm@U8(MlkJBP&0;s!S^#16Q2hI z;e?m&Tf`4nauSODCN|t`lC!P`b`syZ13PP^H?Tc&`VMS0j#N=|oaT}y?nu>fj?)<1 zZ^J2ulvSB}eh&69*UxccCEXn+5&n_yvec$Kokp^i6oK2-`*%8x`Nmf2`#YUxY=EjW z7nu(fi$E<^G#A@s$M3QN4b-jpZ}7JzGH`jRdU!6jIxi)vm*+ao`0u^d*A$NIqk?x4 Vo}e-iCP&S3@V*o3;{D8j{~v~22&@1A diff --git a/code/Debug/radiosonda_m20.list b/code/Debug/radiosonda_m20.list index 04b65b0..edb1c84 100644 --- a/code/Debug/radiosonda_m20.list +++ b/code/Debug/radiosonda_m20.list @@ -5,47 +5,47 @@ Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000000c0 08000000 08000000 00010000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA - 1 .text 00004b28 080000c0 080000c0 000100c0 2**2 + 1 .text 00004bb8 080000c0 080000c0 000100c0 2**2 CONTENTS, ALLOC, LOAD, READONLY, CODE - 2 .rodata 00000074 08004be8 08004be8 00014be8 2**2 + 2 .rodata 00000074 08004c78 08004c78 00014c78 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 3 .ARM.extab 00000000 08004c5c 08004c5c 0002000c 2**0 + 3 .ARM.extab 00000000 08004cec 08004cec 0002000c 2**0 CONTENTS - 4 .ARM 00000008 08004c5c 08004c5c 00014c5c 2**2 + 4 .ARM 00000008 08004cec 08004cec 00014cec 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA - 5 .preinit_array 00000000 08004c64 08004c64 0002000c 2**0 + 5 .preinit_array 00000000 08004cf4 08004cf4 0002000c 2**0 CONTENTS, ALLOC, LOAD, DATA - 6 .init_array 00000004 08004c64 08004c64 00014c64 2**2 + 6 .init_array 00000004 08004cf4 08004cf4 00014cf4 2**2 CONTENTS, ALLOC, LOAD, DATA - 7 .fini_array 00000004 08004c68 08004c68 00014c68 2**2 + 7 .fini_array 00000004 08004cf8 08004cf8 00014cf8 2**2 CONTENTS, ALLOC, LOAD, DATA - 8 .data 0000000c 20000000 08004c6c 00020000 2**2 + 8 .data 0000000c 20000000 08004cfc 00020000 2**2 CONTENTS, ALLOC, LOAD, DATA - 9 .bss 0000026c 2000000c 08004c78 0002000c 2**2 + 9 .bss 0000026c 2000000c 08004d08 0002000c 2**2 ALLOC - 10 ._user_heap_stack 00000600 20000278 08004c78 00020278 2**0 + 10 ._user_heap_stack 00000600 20000278 08004d08 00020278 2**0 ALLOC 11 .ARM.attributes 00000028 00000000 00000000 0002000c 2**0 CONTENTS, READONLY 12 .comment 00000043 00000000 00000000 00020034 2**0 CONTENTS, READONLY - 13 .debug_info 000104b3 00000000 00000000 00020077 2**0 + 13 .debug_info 00010513 00000000 00000000 00020077 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 14 .debug_abbrev 00002572 00000000 00000000 0003052a 2**0 + 14 .debug_abbrev 00002583 00000000 00000000 0003058a 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 15 .debug_aranges 00000eb0 00000000 00000000 00032aa0 2**3 + 15 .debug_aranges 00000eb0 00000000 00000000 00032b10 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS - 16 .debug_rnglists 00000b7a 00000000 00000000 00033950 2**0 + 16 .debug_rnglists 00000b7a 00000000 00000000 000339c0 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 17 .debug_macro 00013612 00000000 00000000 000344ca 2**0 + 17 .debug_macro 0001363d 00000000 00000000 0003453a 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 18 .debug_line 00010f1f 00000000 00000000 00047adc 2**0 + 18 .debug_line 00010f65 00000000 00000000 00047b77 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 19 .debug_str 00078cf8 00000000 00000000 000589fb 2**0 + 19 .debug_str 00078d4c 00000000 00000000 00058adc 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS - 20 .debug_frame 00003508 00000000 00000000 000d16f4 2**2 + 20 .debug_frame 00003508 00000000 00000000 000d1828 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS - 21 .debug_line_str 0000005e 00000000 00000000 000d4bfc 2**0 + 21 .debug_line_str 0000005e 00000000 00000000 000d4d30 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: @@ -67,7 +67,7 @@ Disassembly of section .text: 80000da: bd10 pop {r4, pc} 80000dc: 2000000c .word 0x2000000c 80000e0: 00000000 .word 0x00000000 - 80000e4: 08004bd0 .word 0x08004bd0 + 80000e4: 08004c60 .word 0x08004c60 080000e8 : 80000e8: 4b04 ldr r3, [pc, #16] ; (80000fc ) @@ -82,7 +82,7 @@ Disassembly of section .text: 80000fa: 46c0 nop ; (mov r8, r8) 80000fc: 00000000 .word 0x00000000 8000100: 20000010 .word 0x20000010 - 8000104: 08004bd0 .word 0x08004bd0 + 8000104: 08004c60 .word 0x08004c60 08000108 <__udivsi3>: 8000108: 2200 movs r2, #0 @@ -570,7 +570,7 @@ void myspi(uint32_t data) 80004b4: 482f ldr r0, [pc, #188] ; (8000574 ) 80004b6: 2200 movs r2, #0 80004b8: 0019 movs r1, r3 - 80004ba: f001 fcb9 bl 8001e30 + 80004ba: f001 fd01 bl 8001ec0 HAL_GPIO_WritePin(ADF_Data_GPIO_Port, ADF_Data_Pin, GPIO_PIN_RESET); 80004be: 2380 movs r3, #128 ; 0x80 @@ -578,13 +578,13 @@ void myspi(uint32_t data) 80004c2: 482c ldr r0, [pc, #176] ; (8000574 ) 80004c4: 2200 movs r2, #0 80004c6: 0019 movs r1, r3 - 80004c8: f001 fcb2 bl 8001e30 + 80004c8: f001 fcfa bl 8001ec0 HAL_GPIO_WritePin(ADF_CLK_GPIO_Port, ADF_CLK_Pin, GPIO_PIN_RESET); 80004cc: 4b29 ldr r3, [pc, #164] ; (8000574 ) 80004ce: 2200 movs r2, #0 80004d0: 2180 movs r1, #128 ; 0x80 80004d2: 0018 movs r0, r3 - 80004d4: f001 fcac bl 8001e30 + 80004d4: f001 fcf4 bl 8001ec0 //HAL_Delay(delay); __HAL_RCC_GPIOA_CLK_ENABLE(); 80004d8: 4b27 ldr r3, [pc, #156] ; (8000578 ) @@ -608,7 +608,7 @@ void myspi(uint32_t data) 80004f8: 2200 movs r2, #0 80004fa: 2180 movs r1, #128 ; 0x80 80004fc: 0018 movs r0, r3 - 80004fe: f001 fc97 bl 8001e30 + 80004fe: f001 fcdf bl 8001ec0 if (data & 0b10000000000000000000000000000000) 8000502: 687b ldr r3, [r7, #4] 8000504: 2b00 cmp r3, #0 @@ -620,7 +620,7 @@ void myspi(uint32_t data) 800050c: 4819 ldr r0, [pc, #100] ; (8000574 ) 800050e: 2201 movs r2, #1 8000510: 0019 movs r1, r3 - 8000512: f001 fc8d bl 8001e30 + 8000512: f001 fcd5 bl 8001ec0 8000516: e006 b.n 8000526 } else { HAL_GPIO_WritePin(ADF_Data_GPIO_Port, ADF_Data_Pin, GPIO_PIN_RESET); @@ -629,7 +629,7 @@ void myspi(uint32_t data) 800051c: 4815 ldr r0, [pc, #84] ; (8000574 ) 800051e: 2200 movs r2, #0 8000520: 0019 movs r1, r3 - 8000522: f001 fc85 bl 8001e30 + 8000522: f001 fccd bl 8001ec0 } //HAL_Delay(delay); HAL_GPIO_WritePin(ADF_CLK_GPIO_Port, ADF_CLK_Pin, GPIO_PIN_SET); @@ -637,7 +637,7 @@ void myspi(uint32_t data) 8000528: 2201 movs r2, #1 800052a: 2180 movs r1, #128 ; 0x80 800052c: 0018 movs r0, r3 - 800052e: f001 fc7f bl 8001e30 + 800052e: f001 fcc7 bl 8001ec0 data = data << 1; 8000532: 687b ldr r3, [r7, #4] 8000534: 005b lsls r3, r3, #1 @@ -656,20 +656,20 @@ void myspi(uint32_t data) 8000548: 480a ldr r0, [pc, #40] ; (8000574 ) 800054a: 2201 movs r2, #1 800054c: 0019 movs r1, r3 - 800054e: f001 fc6f bl 8001e30 + 800054e: f001 fcb7 bl 8001ec0 HAL_GPIO_WritePin(ADF_LE_GPIO_Port, ADF_LE_Pin, GPIO_PIN_RESET); 8000552: 2380 movs r3, #128 ; 0x80 8000554: 009b lsls r3, r3, #2 8000556: 4807 ldr r0, [pc, #28] ; (8000574 ) 8000558: 2200 movs r2, #0 800055a: 0019 movs r1, r3 - 800055c: f001 fc68 bl 8001e30 + 800055c: f001 fcb0 bl 8001ec0 HAL_GPIO_WritePin(ADF_CLK_GPIO_Port, ADF_CLK_Pin, GPIO_PIN_RESET); 8000560: 4b04 ldr r3, [pc, #16] ; (8000574 ) 8000562: 2200 movs r2, #0 8000564: 2180 movs r1, #128 ; 0x80 8000566: 0018 movs r0, r3 - 8000568: f001 fc62 bl 8001e30 + 8000568: f001 fcaa bl 8001ec0 } 800056c: 46c0 nop ; (mov r8, r8) @@ -686,13172 +686,13267 @@ void myspi(uint32_t data) */ int main(void) { - 800057c: b580 push {r7, lr} - 800057e: b082 sub sp, #8 + 800057c: b590 push {r4, r7, lr} + 800057e: b095 sub sp, #84 ; 0x54 8000580: af00 add r7, sp, #0 /* USER CODE BEGIN 1 */ - - uint8_t onebyte[1]; int count = 0; 8000582: 2300 movs r3, #0 - 8000584: 607b str r3, [r7, #4] + 8000584: 64fb str r3, [r7, #76] ; 0x4c + int countb = 0; + 8000586: 2300 movs r3, #0 + 8000588: 64bb str r3, [r7, #72] ; 0x48 + uint8_t onebyte[1]; + uint8_t header[4] = {170, 170, 170, 3}; + 800058a: 2340 movs r3, #64 ; 0x40 + 800058c: 18fb adds r3, r7, r3 + 800058e: 4a6f ldr r2, [pc, #444] ; (800074c ) + 8000590: 601a str r2, [r3, #0] + uint8_t data[58]; + bool dt = false; + 8000592: 2347 movs r3, #71 ; 0x47 + 8000594: 18fb adds r3, r7, r3 + 8000596: 2200 movs r2, #0 + 8000598: 701a strb r2, [r3, #0] /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); - 8000586: f000 fda3 bl 80010d0 + 800059a: f000 fde1 bl 8001160 /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); - 800058a: f000 f8ab bl 80006e4 + 800059e: f000 f8e9 bl 8000774 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); - 800058e: f000 fab3 bl 8000af8 + 80005a2: f000 faf1 bl 8000b88 MX_DMA_Init(); - 8000592: f000 fa93 bl 8000abc + 80005a6: f000 fad1 bl 8000b4c MX_LPUART1_UART_Init(); - 8000596: f000 f9a5 bl 80008e4 + 80005aa: f000 f9e3 bl 8000974 MX_ADC_Init(); - 800059a: f000 f91f bl 80007dc + 80005ae: f000 f95d bl 800086c MX_USART1_UART_Init(); - 800059e: f000 f9cf bl 8000940 + 80005b2: f000 fa0d bl 80009d0 MX_SPI1_Init(); - 80005a2: f000 f9fd bl 80009a0 + 80005b6: f000 fa3b bl 8000a30 MX_TIM21_Init(); - 80005a6: f000 fa33 bl 8000a10 + 80005ba: f000 fa71 bl 8000aa0 /* USER CODE BEGIN 2 */ HAL_GPIO_WritePin(DC_boost_GPIO_Port, DC_boost_Pin, GPIO_PIN_SET); - 80005aa: 2380 movs r3, #128 ; 0x80 - 80005ac: 0159 lsls r1, r3, #5 - 80005ae: 23a0 movs r3, #160 ; 0xa0 - 80005b0: 05db lsls r3, r3, #23 - 80005b2: 2201 movs r2, #1 - 80005b4: 0018 movs r0, r3 - 80005b6: f001 fc3b bl 8001e30 + 80005be: 2380 movs r3, #128 ; 0x80 + 80005c0: 0159 lsls r1, r3, #5 + 80005c2: 23a0 movs r3, #160 ; 0xa0 + 80005c4: 05db lsls r3, r3, #23 + 80005c6: 2201 movs r2, #1 + 80005c8: 0018 movs r0, r3 + 80005ca: f001 fc79 bl 8001ec0 HAL_Delay(200); - 80005ba: 20c8 movs r0, #200 ; 0xc8 - 80005bc: f000 fdf8 bl 80011b0 + 80005ce: 20c8 movs r0, #200 ; 0xc8 + 80005d0: f000 fe36 bl 8001240 //HAL_GPIO_WritePin(Battery_on_GPIO_Port, Battery_on_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(RADIO_EN_GPIO_Port, RADIO_EN_Pin, GPIO_PIN_RESET); - 80005c0: 2380 movs r3, #128 ; 0x80 - 80005c2: 021b lsls r3, r3, #8 - 80005c4: 483e ldr r0, [pc, #248] ; (80006c0 ) - 80005c6: 2200 movs r2, #0 - 80005c8: 0019 movs r1, r3 - 80005ca: f001 fc31 bl 8001e30 + 80005d4: 2380 movs r3, #128 ; 0x80 + 80005d6: 021b lsls r3, r3, #8 + 80005d8: 485d ldr r0, [pc, #372] ; (8000750 ) + 80005da: 2200 movs r2, #0 + 80005dc: 0019 movs r1, r3 + 80005de: f001 fc6f bl 8001ec0 HAL_GPIO_WritePin(GPS_ON_GPIO_Port, GPS_ON_Pin, GPIO_PIN_SET); - 80005ce: 2380 movs r3, #128 ; 0x80 - 80005d0: 01db lsls r3, r3, #7 - 80005d2: 483b ldr r0, [pc, #236] ; (80006c0 ) - 80005d4: 2201 movs r2, #1 - 80005d6: 0019 movs r1, r3 - 80005d8: f001 fc2a bl 8001e30 + 80005e2: 2380 movs r3, #128 ; 0x80 + 80005e4: 01db lsls r3, r3, #7 + 80005e6: 485a ldr r0, [pc, #360] ; (8000750 ) + 80005e8: 2201 movs r2, #1 + 80005ea: 0019 movs r1, r3 + 80005ec: f001 fc68 bl 8001ec0 HAL_Delay(200); - 80005dc: 20c8 movs r0, #200 ; 0xc8 - 80005de: f000 fde7 bl 80011b0 + 80005f0: 20c8 movs r0, #200 ; 0xc8 + 80005f2: f000 fe25 bl 8001240 //activeMode++; myspi(0b00000000000000000010000000100010); - 80005e2: 4b38 ldr r3, [pc, #224] ; (80006c4 ) - 80005e4: 0018 movs r0, r3 - 80005e6: f7ff ff5f bl 80004a8 + 80005f6: 4b57 ldr r3, [pc, #348] ; (8000754 ) + 80005f8: 0018 movs r0, r3 + 80005fa: f7ff ff55 bl 80004a8 myspi(0b00000000011101000001100010101111); - 80005ea: 4b37 ldr r3, [pc, #220] ; (80006c8 ) - 80005ec: 0018 movs r0, r3 - 80005ee: f7ff ff5b bl 80004a8 + 80005fe: 4b56 ldr r3, [pc, #344] ; (8000758 ) + 8000600: 0018 movs r0, r3 + 8000602: f7ff ff51 bl 80004a8 myspi(0b00000011110001000010000001001100); - 80005f2: 4b36 ldr r3, [pc, #216] ; (80006cc ) - 80005f4: 0018 movs r0, r3 - 80005f6: f7ff ff57 bl 80004a8 + 8000606: 4b55 ldr r3, [pc, #340] ; (800075c ) + 8000608: 0018 movs r0, r3 + 800060a: f7ff ff4d bl 80004a8 myspi(0b00000000000011011111000011001101); - 80005fa: 4b35 ldr r3, [pc, #212] ; (80006d0 ) - 80005fc: 0018 movs r0, r3 - 80005fe: f7ff ff53 bl 80004a8 + 800060e: 4b54 ldr r3, [pc, #336] ; (8000760 ) + 8000610: 0018 movs r0, r3 + 8000612: f7ff ff49 bl 80004a8 - HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); - 8000602: 2380 movs r3, #128 ; 0x80 - 8000604: 01db lsls r3, r3, #7 - 8000606: 4a33 ldr r2, [pc, #204] ; (80006d4 ) - 8000608: 0019 movs r1, r3 - 800060a: 0010 movs r0, r2 - 800060c: f001 fc2d bl 8001e6a - HAL_Delay(200); - 8000610: 20c8 movs r0, #200 ; 0xc8 - 8000612: f000 fdcd bl 80011b0 HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); 8000616: 2380 movs r3, #128 ; 0x80 8000618: 01db lsls r3, r3, #7 - 800061a: 4a2e ldr r2, [pc, #184] ; (80006d4 ) + 800061a: 4a52 ldr r2, [pc, #328] ; (8000764 ) 800061c: 0019 movs r1, r3 800061e: 0010 movs r0, r2 - 8000620: f001 fc23 bl 8001e6a + 8000620: f001 fc6b bl 8001efa HAL_Delay(200); 8000624: 20c8 movs r0, #200 ; 0xc8 - 8000626: f000 fdc3 bl 80011b0 + 8000626: f000 fe0b bl 8001240 HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); 800062a: 2380 movs r3, #128 ; 0x80 800062c: 01db lsls r3, r3, #7 - 800062e: 4a29 ldr r2, [pc, #164] ; (80006d4 ) + 800062e: 4a4d ldr r2, [pc, #308] ; (8000764 ) 8000630: 0019 movs r1, r3 8000632: 0010 movs r0, r2 - 8000634: f001 fc19 bl 8001e6a + 8000634: f001 fc61 bl 8001efa HAL_Delay(200); 8000638: 20c8 movs r0, #200 ; 0xc8 - 800063a: f000 fdb9 bl 80011b0 + 800063a: f000 fe01 bl 8001240 HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); 800063e: 2380 movs r3, #128 ; 0x80 8000640: 01db lsls r3, r3, #7 - 8000642: 4a24 ldr r2, [pc, #144] ; (80006d4 ) + 8000642: 4a48 ldr r2, [pc, #288] ; (8000764 ) 8000644: 0019 movs r1, r3 8000646: 0010 movs r0, r2 - 8000648: f001 fc0f bl 8001e6a + 8000648: f001 fc57 bl 8001efa HAL_Delay(200); 800064c: 20c8 movs r0, #200 ; 0xc8 - 800064e: f000 fdaf bl 80011b0 + 800064e: f000 fdf7 bl 8001240 HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); 8000652: 2380 movs r3, #128 ; 0x80 8000654: 01db lsls r3, r3, #7 - 8000656: 4a1f ldr r2, [pc, #124] ; (80006d4 ) + 8000656: 4a43 ldr r2, [pc, #268] ; (8000764 ) 8000658: 0019 movs r1, r3 800065a: 0010 movs r0, r2 - 800065c: f001 fc05 bl 8001e6a + 800065c: f001 fc4d bl 8001efa HAL_Delay(200); 8000660: 20c8 movs r0, #200 ; 0xc8 - 8000662: f000 fda5 bl 80011b0 + 8000662: f000 fded bl 8001240 HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); 8000666: 2380 movs r3, #128 ; 0x80 8000668: 01db lsls r3, r3, #7 - 800066a: 4a1a ldr r2, [pc, #104] ; (80006d4 ) + 800066a: 4a3e ldr r2, [pc, #248] ; (8000764 ) 800066c: 0019 movs r1, r3 800066e: 0010 movs r0, r2 - 8000670: f001 fbfb bl 8001e6a + 8000670: f001 fc43 bl 8001efa HAL_Delay(200); 8000674: 20c8 movs r0, #200 ; 0xc8 - 8000676: f000 fd9b bl 80011b0 + 8000676: f000 fde3 bl 8001240 + HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); + 800067a: 2380 movs r3, #128 ; 0x80 + 800067c: 01db lsls r3, r3, #7 + 800067e: 4a39 ldr r2, [pc, #228] ; (8000764 ) + 8000680: 0019 movs r1, r3 + 8000682: 0010 movs r0, r2 + 8000684: f001 fc39 bl 8001efa + HAL_Delay(200); + 8000688: 20c8 movs r0, #200 ; 0xc8 + 800068a: f000 fdd9 bl 8001240 HAL_UART_Transmit_IT(&huart1, "START\n", 6); - 800067a: 4917 ldr r1, [pc, #92] ; (80006d8 ) - 800067c: 4b17 ldr r3, [pc, #92] ; (80006dc ) - 800067e: 2206 movs r2, #6 - 8000680: 0018 movs r0, r3 - 8000682: f003 f95b bl 800393c - { - /* USER CODE END WHILE */ + 800068e: 4936 ldr r1, [pc, #216] ; (8000768 ) + 8000690: 4b36 ldr r3, [pc, #216] ; (800076c ) + 8000692: 2206 movs r2, #6 + 8000694: 0018 movs r0, r3 + 8000696: f003 f999 bl 80039cc + /* USER CODE BEGIN WHILE */ + while (1){ + /* USER CODE END WHILE */ - /* USER CODE BEGIN 3 */ + /* USER CODE BEGIN 3 */ + if(HAL_OK == HAL_UART_Receive(&hlpuart1,onebyte,1,10)){ + 800069a: 2444 movs r4, #68 ; 0x44 + 800069c: 1939 adds r1, r7, r4 + 800069e: 4834 ldr r0, [pc, #208] ; (8000770 ) + 80006a0: 230a movs r3, #10 + 80006a2: 2201 movs r2, #1 + 80006a4: f003 f8ac bl 8003800 + 80006a8: 1e03 subs r3, r0, #0 + 80006aa: d1f6 bne.n 800069a + HAL_GPIO_TogglePin (LED_GPIO_Port, LED_Pin); + 80006ac: 2380 movs r3, #128 ; 0x80 + 80006ae: 01db lsls r3, r3, #7 + 80006b0: 4a2c ldr r2, [pc, #176] ; (8000764 ) + 80006b2: 0019 movs r1, r3 + 80006b4: 0010 movs r0, r2 + 80006b6: f001 fc20 bl 8001efa + if(dt){ + 80006ba: 2347 movs r3, #71 ; 0x47 + 80006bc: 18fb adds r3, r7, r3 + 80006be: 781b ldrb r3, [r3, #0] + 80006c0: 2b00 cmp r3, #0 + 80006c2: d021 beq.n 8000708 + if(countb < 58){ + 80006c4: 6cbb ldr r3, [r7, #72] ; 0x48 + 80006c6: 2b39 cmp r3, #57 ; 0x39 + 80006c8: dc0a bgt.n 80006e0 + data[countb]=onebyte[0]; + 80006ca: 193b adds r3, r7, r4 + 80006cc: 7819 ldrb r1, [r3, #0] + 80006ce: 1d3a adds r2, r7, #4 + 80006d0: 6cbb ldr r3, [r7, #72] ; 0x48 + 80006d2: 18d3 adds r3, r2, r3 + 80006d4: 1c0a adds r2, r1, #0 + 80006d6: 701a strb r2, [r3, #0] + countb++; + 80006d8: 6cbb ldr r3, [r7, #72] ; 0x48 + 80006da: 3301 adds r3, #1 + 80006dc: 64bb str r3, [r7, #72] ; 0x48 + 80006de: e02d b.n 800073c + }else{ + countb=0; + 80006e0: 2300 movs r3, #0 + 80006e2: 64bb str r3, [r7, #72] ; 0x48 + HAL_UART_Transmit(&huart1, header, 4,10); + 80006e4: 2340 movs r3, #64 ; 0x40 + 80006e6: 18f9 adds r1, r7, r3 + 80006e8: 4820 ldr r0, [pc, #128] ; (800076c ) + 80006ea: 230a movs r3, #10 + 80006ec: 2204 movs r2, #4 + 80006ee: f002 ffe7 bl 80036c0 + HAL_UART_Transmit(&huart1, data, 58,10); + 80006f2: 1d39 adds r1, r7, #4 + 80006f4: 481d ldr r0, [pc, #116] ; (800076c ) + 80006f6: 230a movs r3, #10 + 80006f8: 223a movs r2, #58 ; 0x3a + 80006fa: f002 ffe1 bl 80036c0 + dt = false; + 80006fe: 2347 movs r3, #71 ; 0x47 + 8000700: 18fb adds r3, r7, r3 + 8000702: 2200 movs r2, #0 + 8000704: 701a strb r2, [r3, #0] + 8000706: e019 b.n 800073c + } + }else{ + if(onebyte[0] == header[count]){ + 8000708: 2344 movs r3, #68 ; 0x44 + 800070a: 18fb adds r3, r7, r3 + 800070c: 781a ldrb r2, [r3, #0] + 800070e: 2340 movs r3, #64 ; 0x40 + 8000710: 18f9 adds r1, r7, r3 + 8000712: 6cfb ldr r3, [r7, #76] ; 0x4c + 8000714: 18cb adds r3, r1, r3 + 8000716: 781b ldrb r3, [r3, #0] + 8000718: 429a cmp r2, r3 + 800071a: d10d bne.n 8000738 + if(count == 3){ + 800071c: 6cfb ldr r3, [r7, #76] ; 0x4c + 800071e: 2b03 cmp r3, #3 + 8000720: d106 bne.n 8000730 + dt = true; + 8000722: 2347 movs r3, #71 ; 0x47 + 8000724: 18fb adds r3, r7, r3 + 8000726: 2201 movs r2, #1 + 8000728: 701a strb r2, [r3, #0] + count = 0; + 800072a: 2300 movs r3, #0 + 800072c: 64fb str r3, [r7, #76] ; 0x4c + 800072e: e005 b.n 800073c + }else{ + count++; + 8000730: 6cfb ldr r3, [r7, #76] ; 0x4c + 8000732: 3301 adds r3, #1 + 8000734: 64fb str r3, [r7, #76] ; 0x4c + 8000736: e001 b.n 800073c + } + }else{ + count = 0; + 8000738: 2300 movs r3, #0 + 800073a: 64fb str r3, [r7, #76] ; 0x4c + } + } + //HAL_UART_Transmit(&huart1, onebyte, 1,10); + HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); + 800073c: 2380 movs r3, #128 ; 0x80 + 800073e: 01db lsls r3, r3, #7 + 8000740: 4a08 ldr r2, [pc, #32] ; (8000764 ) + 8000742: 0019 movs r1, r3 + 8000744: 0010 movs r0, r2 + 8000746: f001 fbd8 bl 8001efa + if(HAL_OK == HAL_UART_Receive(&hlpuart1,onebyte,1,10)){ + 800074a: e7a6 b.n 800069a + 800074c: 03aaaaaa .word 0x03aaaaaa + 8000750: 50000400 .word 0x50000400 + 8000754: 00002022 .word 0x00002022 + 8000758: 007418af .word 0x007418af + 800075c: 03c4204c .word 0x03c4204c + 8000760: 000df0cd .word 0x000df0cd + 8000764: 50000800 .word 0x50000800 + 8000768: 08004c78 .word 0x08004c78 + 800076c: 2000010c .word 0x2000010c + 8000770: 20000084 .word 0x20000084 - if(HAL_OK == HAL_UART_Receive(&hlpuart1,onebyte,1,10)){ - 8000686: 0039 movs r1, r7 - 8000688: 4815 ldr r0, [pc, #84] ; (80006e0 ) - 800068a: 230a movs r3, #10 - 800068c: 2201 movs r2, #1 - 800068e: f003 f86f bl 8003770 - 8000692: 1e03 subs r3, r0, #0 - 8000694: d1f7 bne.n 8000686 - HAL_GPIO_TogglePin (LED_GPIO_Port, LED_Pin); - 8000696: 2380 movs r3, #128 ; 0x80 - 8000698: 01db lsls r3, r3, #7 - 800069a: 4a0e ldr r2, [pc, #56] ; (80006d4 ) - 800069c: 0019 movs r1, r3 - 800069e: 0010 movs r0, r2 - 80006a0: f001 fbe3 bl 8001e6a - HAL_UART_Transmit(&huart1, onebyte, 1,10); - 80006a4: 0039 movs r1, r7 - 80006a6: 480d ldr r0, [pc, #52] ; (80006dc ) - 80006a8: 230a movs r3, #10 - 80006aa: 2201 movs r2, #1 - 80006ac: f002 ffc0 bl 8003630 - HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin); - 80006b0: 2380 movs r3, #128 ; 0x80 - 80006b2: 01db lsls r3, r3, #7 - 80006b4: 4a07 ldr r2, [pc, #28] ; (80006d4 ) - 80006b6: 0019 movs r1, r3 - 80006b8: 0010 movs r0, r2 - 80006ba: f001 fbd6 bl 8001e6a - if(HAL_OK == HAL_UART_Receive(&hlpuart1,onebyte,1,10)){ - 80006be: e7e2 b.n 8000686 - 80006c0: 50000400 .word 0x50000400 - 80006c4: 00002022 .word 0x00002022 - 80006c8: 007418af .word 0x007418af - 80006cc: 03c4204c .word 0x03c4204c - 80006d0: 000df0cd .word 0x000df0cd - 80006d4: 50000800 .word 0x50000800 - 80006d8: 08004be8 .word 0x08004be8 - 80006dc: 2000010c .word 0x2000010c - 80006e0: 20000084 .word 0x20000084 - -080006e4 : +08000774 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { - 80006e4: b590 push {r4, r7, lr} - 80006e6: b09b sub sp, #108 ; 0x6c - 80006e8: af00 add r7, sp, #0 + 8000774: b590 push {r4, r7, lr} + 8000776: b09b sub sp, #108 ; 0x6c + 8000778: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 80006ea: 2434 movs r4, #52 ; 0x34 - 80006ec: 193b adds r3, r7, r4 - 80006ee: 0018 movs r0, r3 - 80006f0: 2334 movs r3, #52 ; 0x34 - 80006f2: 001a movs r2, r3 - 80006f4: 2100 movs r1, #0 - 80006f6: f004 fa3e bl 8004b76 + 800077a: 2434 movs r4, #52 ; 0x34 + 800077c: 193b adds r3, r7, r4 + 800077e: 0018 movs r0, r3 + 8000780: 2334 movs r3, #52 ; 0x34 + 8000782: 001a movs r2, r3 + 8000784: 2100 movs r1, #0 + 8000786: f004 fa3e bl 8004c06 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 80006fa: 2320 movs r3, #32 - 80006fc: 18fb adds r3, r7, r3 - 80006fe: 0018 movs r0, r3 - 8000700: 2314 movs r3, #20 - 8000702: 001a movs r2, r3 - 8000704: 2100 movs r1, #0 - 8000706: f004 fa36 bl 8004b76 + 800078a: 2320 movs r3, #32 + 800078c: 18fb adds r3, r7, r3 + 800078e: 0018 movs r0, r3 + 8000790: 2314 movs r3, #20 + 8000792: 001a movs r2, r3 + 8000794: 2100 movs r1, #0 + 8000796: f004 fa36 bl 8004c06 RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; - 800070a: 1d3b adds r3, r7, #4 - 800070c: 0018 movs r0, r3 - 800070e: 231c movs r3, #28 - 8000710: 001a movs r2, r3 - 8000712: 2100 movs r1, #0 - 8000714: f004 fa2f bl 8004b76 + 800079a: 1d3b adds r3, r7, #4 + 800079c: 0018 movs r0, r3 + 800079e: 231c movs r3, #28 + 80007a0: 001a movs r2, r3 + 80007a2: 2100 movs r1, #0 + 80007a4: f004 fa2f bl 8004c06 /** Configure the main internal regulator output voltage */ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 8000718: 4b2e ldr r3, [pc, #184] ; (80007d4 ) - 800071a: 681b ldr r3, [r3, #0] - 800071c: 4a2e ldr r2, [pc, #184] ; (80007d8 ) - 800071e: 401a ands r2, r3 - 8000720: 4b2c ldr r3, [pc, #176] ; (80007d4 ) - 8000722: 2180 movs r1, #128 ; 0x80 - 8000724: 0109 lsls r1, r1, #4 - 8000726: 430a orrs r2, r1 - 8000728: 601a str r2, [r3, #0] + 80007a8: 4b2e ldr r3, [pc, #184] ; (8000864 ) + 80007aa: 681b ldr r3, [r3, #0] + 80007ac: 4a2e ldr r2, [pc, #184] ; (8000868 ) + 80007ae: 401a ands r2, r3 + 80007b0: 4b2c ldr r3, [pc, #176] ; (8000864 ) + 80007b2: 2180 movs r1, #128 ; 0x80 + 80007b4: 0109 lsls r1, r1, #4 + 80007b6: 430a orrs r2, r1 + 80007b8: 601a str r2, [r3, #0] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 800072a: 0021 movs r1, r4 - 800072c: 187b adds r3, r7, r1 - 800072e: 2201 movs r2, #1 - 8000730: 601a str r2, [r3, #0] + 80007ba: 0021 movs r1, r4 + 80007bc: 187b adds r3, r7, r1 + 80007be: 2201 movs r2, #1 + 80007c0: 601a str r2, [r3, #0] RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 8000732: 187b adds r3, r7, r1 - 8000734: 2280 movs r2, #128 ; 0x80 - 8000736: 0252 lsls r2, r2, #9 - 8000738: 605a str r2, [r3, #4] + 80007c2: 187b adds r3, r7, r1 + 80007c4: 2280 movs r2, #128 ; 0x80 + 80007c6: 0252 lsls r2, r2, #9 + 80007c8: 605a str r2, [r3, #4] RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 800073a: 187b adds r3, r7, r1 - 800073c: 2202 movs r2, #2 - 800073e: 625a str r2, [r3, #36] ; 0x24 + 80007ca: 187b adds r3, r7, r1 + 80007cc: 2202 movs r2, #2 + 80007ce: 625a str r2, [r3, #36] ; 0x24 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 8000740: 187b adds r3, r7, r1 - 8000742: 2280 movs r2, #128 ; 0x80 - 8000744: 0252 lsls r2, r2, #9 - 8000746: 629a str r2, [r3, #40] ; 0x28 + 80007d0: 187b adds r3, r7, r1 + 80007d2: 2280 movs r2, #128 ; 0x80 + 80007d4: 0252 lsls r2, r2, #9 + 80007d6: 629a str r2, [r3, #40] ; 0x28 RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_3; - 8000748: 187b adds r3, r7, r1 - 800074a: 2200 movs r2, #0 - 800074c: 62da str r2, [r3, #44] ; 0x2c + 80007d8: 187b adds r3, r7, r1 + 80007da: 2200 movs r2, #0 + 80007dc: 62da str r2, [r3, #44] ; 0x2c RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_3; - 800074e: 187b adds r3, r7, r1 - 8000750: 2280 movs r2, #128 ; 0x80 - 8000752: 0412 lsls r2, r2, #16 - 8000754: 631a str r2, [r3, #48] ; 0x30 + 80007de: 187b adds r3, r7, r1 + 80007e0: 2280 movs r2, #128 ; 0x80 + 80007e2: 0412 lsls r2, r2, #16 + 80007e4: 631a str r2, [r3, #48] ; 0x30 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 8000756: 187b adds r3, r7, r1 - 8000758: 0018 movs r0, r3 - 800075a: f001 fba1 bl 8001ea0 - 800075e: 1e03 subs r3, r0, #0 - 8000760: d001 beq.n 8000766 + 80007e6: 187b adds r3, r7, r1 + 80007e8: 0018 movs r0, r3 + 80007ea: f001 fba1 bl 8001f30 + 80007ee: 1e03 subs r3, r0, #0 + 80007f0: d001 beq.n 80007f6 { Error_Handler(); - 8000762: f000 fabf bl 8000ce4 + 80007f2: f000 fabf bl 8000d74 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 8000766: 2120 movs r1, #32 - 8000768: 187b adds r3, r7, r1 - 800076a: 220f movs r2, #15 - 800076c: 601a str r2, [r3, #0] + 80007f6: 2120 movs r1, #32 + 80007f8: 187b adds r3, r7, r1 + 80007fa: 220f movs r2, #15 + 80007fc: 601a str r2, [r3, #0] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 800076e: 187b adds r3, r7, r1 - 8000770: 2203 movs r2, #3 - 8000772: 605a str r2, [r3, #4] + 80007fe: 187b adds r3, r7, r1 + 8000800: 2203 movs r2, #3 + 8000802: 605a str r2, [r3, #4] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 8000774: 187b adds r3, r7, r1 - 8000776: 2200 movs r2, #0 - 8000778: 609a str r2, [r3, #8] + 8000804: 187b adds r3, r7, r1 + 8000806: 2200 movs r2, #0 + 8000808: 609a str r2, [r3, #8] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; - 800077a: 187b adds r3, r7, r1 - 800077c: 2200 movs r2, #0 - 800077e: 60da str r2, [r3, #12] + 800080a: 187b adds r3, r7, r1 + 800080c: 2200 movs r2, #0 + 800080e: 60da str r2, [r3, #12] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; - 8000780: 187b adds r3, r7, r1 - 8000782: 2200 movs r2, #0 - 8000784: 611a str r2, [r3, #16] + 8000810: 187b adds r3, r7, r1 + 8000812: 2200 movs r2, #0 + 8000814: 611a str r2, [r3, #16] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) - 8000786: 187b adds r3, r7, r1 - 8000788: 2100 movs r1, #0 - 800078a: 0018 movs r0, r3 - 800078c: f001 fef2 bl 8002574 - 8000790: 1e03 subs r3, r0, #0 - 8000792: d001 beq.n 8000798 + 8000816: 187b adds r3, r7, r1 + 8000818: 2100 movs r1, #0 + 800081a: 0018 movs r0, r3 + 800081c: f001 fef2 bl 8002604 + 8000820: 1e03 subs r3, r0, #0 + 8000822: d001 beq.n 8000828 { Error_Handler(); - 8000794: f000 faa6 bl 8000ce4 + 8000824: f000 faa6 bl 8000d74 } PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_LPUART1; - 8000798: 1d3b adds r3, r7, #4 - 800079a: 2205 movs r2, #5 - 800079c: 601a str r2, [r3, #0] + 8000828: 1d3b adds r3, r7, #4 + 800082a: 2205 movs r2, #5 + 800082c: 601a str r2, [r3, #0] PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - 800079e: 1d3b adds r3, r7, #4 - 80007a0: 2200 movs r2, #0 - 80007a2: 609a str r2, [r3, #8] + 800082e: 1d3b adds r3, r7, #4 + 8000830: 2200 movs r2, #0 + 8000832: 609a str r2, [r3, #8] PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1; - 80007a4: 1d3b adds r3, r7, #4 - 80007a6: 2200 movs r2, #0 - 80007a8: 611a str r2, [r3, #16] + 8000834: 1d3b adds r3, r7, #4 + 8000836: 2200 movs r2, #0 + 8000838: 611a str r2, [r3, #16] if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) - 80007aa: 1d3b adds r3, r7, #4 - 80007ac: 0018 movs r0, r3 - 80007ae: f002 f9b3 bl 8002b18 - 80007b2: 1e03 subs r3, r0, #0 - 80007b4: d001 beq.n 80007ba + 800083a: 1d3b adds r3, r7, #4 + 800083c: 0018 movs r0, r3 + 800083e: f002 f9b3 bl 8002ba8 + 8000842: 1e03 subs r3, r0, #0 + 8000844: d001 beq.n 800084a { Error_Handler(); - 80007b6: f000 fa95 bl 8000ce4 + 8000846: f000 fa95 bl 8000d74 } HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1); - 80007ba: 2380 movs r3, #128 ; 0x80 - 80007bc: 045b lsls r3, r3, #17 - 80007be: 2200 movs r2, #0 - 80007c0: 0019 movs r1, r3 - 80007c2: 2000 movs r0, #0 - 80007c4: f002 f81e bl 8002804 + 800084a: 2380 movs r3, #128 ; 0x80 + 800084c: 045b lsls r3, r3, #17 + 800084e: 2200 movs r2, #0 + 8000850: 0019 movs r1, r3 + 8000852: 2000 movs r0, #0 + 8000854: f002 f81e bl 8002894 /** Enables the Clock Security System */ HAL_RCC_EnableCSS(); - 80007c8: f002 f8a0 bl 800290c + 8000858: f002 f8a0 bl 800299c } - 80007cc: 46c0 nop ; (mov r8, r8) - 80007ce: 46bd mov sp, r7 - 80007d0: b01b add sp, #108 ; 0x6c - 80007d2: bd90 pop {r4, r7, pc} - 80007d4: 40007000 .word 0x40007000 - 80007d8: ffffe7ff .word 0xffffe7ff + 800085c: 46c0 nop ; (mov r8, r8) + 800085e: 46bd mov sp, r7 + 8000860: b01b add sp, #108 ; 0x6c + 8000862: bd90 pop {r4, r7, pc} + 8000864: 40007000 .word 0x40007000 + 8000868: ffffe7ff .word 0xffffe7ff -080007dc : +0800086c : * @brief ADC Initialization Function * @param None * @retval None */ static void MX_ADC_Init(void) { - 80007dc: b580 push {r7, lr} - 80007de: b082 sub sp, #8 - 80007e0: af00 add r7, sp, #0 + 800086c: b580 push {r7, lr} + 800086e: b082 sub sp, #8 + 8000870: af00 add r7, sp, #0 /* USER CODE BEGIN ADC_Init 0 */ /* USER CODE END ADC_Init 0 */ ADC_ChannelConfTypeDef sConfig = {0}; - 80007e2: 003b movs r3, r7 - 80007e4: 0018 movs r0, r3 - 80007e6: 2308 movs r3, #8 - 80007e8: 001a movs r2, r3 - 80007ea: 2100 movs r1, #0 - 80007ec: f004 f9c3 bl 8004b76 + 8000872: 003b movs r3, r7 + 8000874: 0018 movs r0, r3 + 8000876: 2308 movs r3, #8 + 8000878: 001a movs r2, r3 + 800087a: 2100 movs r1, #0 + 800087c: f004 f9c3 bl 8004c06 /* USER CODE END ADC_Init 1 */ /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion) */ hadc.Instance = ADC1; - 80007f0: 4b37 ldr r3, [pc, #220] ; (80008d0 ) - 80007f2: 4a38 ldr r2, [pc, #224] ; (80008d4 ) - 80007f4: 601a str r2, [r3, #0] + 8000880: 4b37 ldr r3, [pc, #220] ; (8000960 ) + 8000882: 4a38 ldr r2, [pc, #224] ; (8000964 ) + 8000884: 601a str r2, [r3, #0] hadc.Init.OversamplingMode = DISABLE; - 80007f6: 4b36 ldr r3, [pc, #216] ; (80008d0 ) - 80007f8: 2200 movs r2, #0 - 80007fa: 63da str r2, [r3, #60] ; 0x3c + 8000886: 4b36 ldr r3, [pc, #216] ; (8000960 ) + 8000888: 2200 movs r2, #0 + 800088a: 63da str r2, [r3, #60] ; 0x3c hadc.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV1; - 80007fc: 4b34 ldr r3, [pc, #208] ; (80008d0 ) - 80007fe: 22c0 movs r2, #192 ; 0xc0 - 8000800: 0612 lsls r2, r2, #24 - 8000802: 605a str r2, [r3, #4] + 800088c: 4b34 ldr r3, [pc, #208] ; (8000960 ) + 800088e: 22c0 movs r2, #192 ; 0xc0 + 8000890: 0612 lsls r2, r2, #24 + 8000892: 605a str r2, [r3, #4] hadc.Init.Resolution = ADC_RESOLUTION_12B; - 8000804: 4b32 ldr r3, [pc, #200] ; (80008d0 ) - 8000806: 2200 movs r2, #0 - 8000808: 609a str r2, [r3, #8] + 8000894: 4b32 ldr r3, [pc, #200] ; (8000960 ) + 8000896: 2200 movs r2, #0 + 8000898: 609a str r2, [r3, #8] hadc.Init.SamplingTime = ADC_SAMPLETIME_1CYCLE_5; - 800080a: 4b31 ldr r3, [pc, #196] ; (80008d0 ) - 800080c: 2200 movs r2, #0 - 800080e: 639a str r2, [r3, #56] ; 0x38 + 800089a: 4b31 ldr r3, [pc, #196] ; (8000960 ) + 800089c: 2200 movs r2, #0 + 800089e: 639a str r2, [r3, #56] ; 0x38 hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; - 8000810: 4b2f ldr r3, [pc, #188] ; (80008d0 ) - 8000812: 2201 movs r2, #1 - 8000814: 611a str r2, [r3, #16] + 80008a0: 4b2f ldr r3, [pc, #188] ; (8000960 ) + 80008a2: 2201 movs r2, #1 + 80008a4: 611a str r2, [r3, #16] hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 8000816: 4b2e ldr r3, [pc, #184] ; (80008d0 ) - 8000818: 2200 movs r2, #0 - 800081a: 60da str r2, [r3, #12] + 80008a6: 4b2e ldr r3, [pc, #184] ; (8000960 ) + 80008a8: 2200 movs r2, #0 + 80008aa: 60da str r2, [r3, #12] hadc.Init.ContinuousConvMode = DISABLE; - 800081c: 4b2c ldr r3, [pc, #176] ; (80008d0 ) - 800081e: 2220 movs r2, #32 - 8000820: 2100 movs r1, #0 - 8000822: 5499 strb r1, [r3, r2] + 80008ac: 4b2c ldr r3, [pc, #176] ; (8000960 ) + 80008ae: 2220 movs r2, #32 + 80008b0: 2100 movs r1, #0 + 80008b2: 5499 strb r1, [r3, r2] hadc.Init.DiscontinuousConvMode = DISABLE; - 8000824: 4b2a ldr r3, [pc, #168] ; (80008d0 ) - 8000826: 2221 movs r2, #33 ; 0x21 - 8000828: 2100 movs r1, #0 - 800082a: 5499 strb r1, [r3, r2] + 80008b4: 4b2a ldr r3, [pc, #168] ; (8000960 ) + 80008b6: 2221 movs r2, #33 ; 0x21 + 80008b8: 2100 movs r1, #0 + 80008ba: 5499 strb r1, [r3, r2] hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 800082c: 4b28 ldr r3, [pc, #160] ; (80008d0 ) - 800082e: 2200 movs r2, #0 - 8000830: 629a str r2, [r3, #40] ; 0x28 + 80008bc: 4b28 ldr r3, [pc, #160] ; (8000960 ) + 80008be: 2200 movs r2, #0 + 80008c0: 629a str r2, [r3, #40] ; 0x28 hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 8000832: 4b27 ldr r3, [pc, #156] ; (80008d0 ) - 8000834: 22c2 movs r2, #194 ; 0xc2 - 8000836: 32ff adds r2, #255 ; 0xff - 8000838: 625a str r2, [r3, #36] ; 0x24 + 80008c2: 4b27 ldr r3, [pc, #156] ; (8000960 ) + 80008c4: 22c2 movs r2, #194 ; 0xc2 + 80008c6: 32ff adds r2, #255 ; 0xff + 80008c8: 625a str r2, [r3, #36] ; 0x24 hadc.Init.DMAContinuousRequests = DISABLE; - 800083a: 4b25 ldr r3, [pc, #148] ; (80008d0 ) - 800083c: 222c movs r2, #44 ; 0x2c - 800083e: 2100 movs r1, #0 - 8000840: 5499 strb r1, [r3, r2] + 80008ca: 4b25 ldr r3, [pc, #148] ; (8000960 ) + 80008cc: 222c movs r2, #44 ; 0x2c + 80008ce: 2100 movs r1, #0 + 80008d0: 5499 strb r1, [r3, r2] hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 8000842: 4b23 ldr r3, [pc, #140] ; (80008d0 ) - 8000844: 2204 movs r2, #4 - 8000846: 615a str r2, [r3, #20] + 80008d2: 4b23 ldr r3, [pc, #140] ; (8000960 ) + 80008d4: 2204 movs r2, #4 + 80008d6: 615a str r2, [r3, #20] hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; - 8000848: 4b21 ldr r3, [pc, #132] ; (80008d0 ) - 800084a: 2200 movs r2, #0 - 800084c: 631a str r2, [r3, #48] ; 0x30 + 80008d8: 4b21 ldr r3, [pc, #132] ; (8000960 ) + 80008da: 2200 movs r2, #0 + 80008dc: 631a str r2, [r3, #48] ; 0x30 hadc.Init.LowPowerAutoWait = DISABLE; - 800084e: 4b20 ldr r3, [pc, #128] ; (80008d0 ) - 8000850: 2200 movs r2, #0 - 8000852: 619a str r2, [r3, #24] + 80008de: 4b20 ldr r3, [pc, #128] ; (8000960 ) + 80008e0: 2200 movs r2, #0 + 80008e2: 619a str r2, [r3, #24] hadc.Init.LowPowerFrequencyMode = DISABLE; - 8000854: 4b1e ldr r3, [pc, #120] ; (80008d0 ) - 8000856: 2200 movs r2, #0 - 8000858: 635a str r2, [r3, #52] ; 0x34 + 80008e4: 4b1e ldr r3, [pc, #120] ; (8000960 ) + 80008e6: 2200 movs r2, #0 + 80008e8: 635a str r2, [r3, #52] ; 0x34 hadc.Init.LowPowerAutoPowerOff = DISABLE; - 800085a: 4b1d ldr r3, [pc, #116] ; (80008d0 ) - 800085c: 2200 movs r2, #0 - 800085e: 61da str r2, [r3, #28] + 80008ea: 4b1d ldr r3, [pc, #116] ; (8000960 ) + 80008ec: 2200 movs r2, #0 + 80008ee: 61da str r2, [r3, #28] if (HAL_ADC_Init(&hadc) != HAL_OK) - 8000860: 4b1b ldr r3, [pc, #108] ; (80008d0 ) - 8000862: 0018 movs r0, r3 - 8000864: f000 fcc8 bl 80011f8 - 8000868: 1e03 subs r3, r0, #0 - 800086a: d001 beq.n 8000870 + 80008f0: 4b1b ldr r3, [pc, #108] ; (8000960 ) + 80008f2: 0018 movs r0, r3 + 80008f4: f000 fcc8 bl 8001288 + 80008f8: 1e03 subs r3, r0, #0 + 80008fa: d001 beq.n 8000900 { Error_Handler(); - 800086c: f000 fa3a bl 8000ce4 + 80008fc: f000 fa3a bl 8000d74 } /** Configure for the selected ADC regular channel to be converted. */ sConfig.Channel = ADC_CHANNEL_9; - 8000870: 003b movs r3, r7 - 8000872: 4a19 ldr r2, [pc, #100] ; (80008d8 ) - 8000874: 601a str r2, [r3, #0] + 8000900: 003b movs r3, r7 + 8000902: 4a19 ldr r2, [pc, #100] ; (8000968 ) + 8000904: 601a str r2, [r3, #0] sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; - 8000876: 003b movs r3, r7 - 8000878: 2280 movs r2, #128 ; 0x80 - 800087a: 0152 lsls r2, r2, #5 - 800087c: 605a str r2, [r3, #4] + 8000906: 003b movs r3, r7 + 8000908: 2280 movs r2, #128 ; 0x80 + 800090a: 0152 lsls r2, r2, #5 + 800090c: 605a str r2, [r3, #4] if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) - 800087e: 003a movs r2, r7 - 8000880: 4b13 ldr r3, [pc, #76] ; (80008d0 ) - 8000882: 0011 movs r1, r2 - 8000884: 0018 movs r0, r3 - 8000886: f000 fe2b bl 80014e0 - 800088a: 1e03 subs r3, r0, #0 - 800088c: d001 beq.n 8000892 + 800090e: 003a movs r2, r7 + 8000910: 4b13 ldr r3, [pc, #76] ; (8000960 ) + 8000912: 0011 movs r1, r2 + 8000914: 0018 movs r0, r3 + 8000916: f000 fe2b bl 8001570 + 800091a: 1e03 subs r3, r0, #0 + 800091c: d001 beq.n 8000922 { Error_Handler(); - 800088e: f000 fa29 bl 8000ce4 + 800091e: f000 fa29 bl 8000d74 } /** Configure for the selected ADC regular channel to be converted. */ sConfig.Channel = ADC_CHANNEL_13; - 8000892: 003b movs r3, r7 - 8000894: 4a11 ldr r2, [pc, #68] ; (80008dc ) - 8000896: 601a str r2, [r3, #0] + 8000922: 003b movs r3, r7 + 8000924: 4a11 ldr r2, [pc, #68] ; (800096c ) + 8000926: 601a str r2, [r3, #0] if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) - 8000898: 003a movs r2, r7 - 800089a: 4b0d ldr r3, [pc, #52] ; (80008d0 ) - 800089c: 0011 movs r1, r2 - 800089e: 0018 movs r0, r3 - 80008a0: f000 fe1e bl 80014e0 - 80008a4: 1e03 subs r3, r0, #0 - 80008a6: d001 beq.n 80008ac + 8000928: 003a movs r2, r7 + 800092a: 4b0d ldr r3, [pc, #52] ; (8000960 ) + 800092c: 0011 movs r1, r2 + 800092e: 0018 movs r0, r3 + 8000930: f000 fe1e bl 8001570 + 8000934: 1e03 subs r3, r0, #0 + 8000936: d001 beq.n 800093c { Error_Handler(); - 80008a8: f000 fa1c bl 8000ce4 + 8000938: f000 fa1c bl 8000d74 } /** Configure for the selected ADC regular channel to be converted. */ sConfig.Channel = ADC_CHANNEL_14; - 80008ac: 003b movs r3, r7 - 80008ae: 4a0c ldr r2, [pc, #48] ; (80008e0 ) - 80008b0: 601a str r2, [r3, #0] + 800093c: 003b movs r3, r7 + 800093e: 4a0c ldr r2, [pc, #48] ; (8000970 ) + 8000940: 601a str r2, [r3, #0] if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK) - 80008b2: 003a movs r2, r7 - 80008b4: 4b06 ldr r3, [pc, #24] ; (80008d0 ) - 80008b6: 0011 movs r1, r2 - 80008b8: 0018 movs r0, r3 - 80008ba: f000 fe11 bl 80014e0 - 80008be: 1e03 subs r3, r0, #0 - 80008c0: d001 beq.n 80008c6 + 8000942: 003a movs r2, r7 + 8000944: 4b06 ldr r3, [pc, #24] ; (8000960 ) + 8000946: 0011 movs r1, r2 + 8000948: 0018 movs r0, r3 + 800094a: f000 fe11 bl 8001570 + 800094e: 1e03 subs r3, r0, #0 + 8000950: d001 beq.n 8000956 { Error_Handler(); - 80008c2: f000 fa0f bl 8000ce4 + 8000952: f000 fa0f bl 8000d74 } /* USER CODE BEGIN ADC_Init 2 */ /* USER CODE END ADC_Init 2 */ } - 80008c6: 46c0 nop ; (mov r8, r8) - 80008c8: 46bd mov sp, r7 - 80008ca: b002 add sp, #8 - 80008cc: bd80 pop {r7, pc} - 80008ce: 46c0 nop ; (mov r8, r8) - 80008d0: 20000028 .word 0x20000028 - 80008d4: 40012400 .word 0x40012400 - 80008d8: 24000200 .word 0x24000200 - 80008dc: 34002000 .word 0x34002000 - 80008e0: 38004000 .word 0x38004000 + 8000956: 46c0 nop ; (mov r8, r8) + 8000958: 46bd mov sp, r7 + 800095a: b002 add sp, #8 + 800095c: bd80 pop {r7, pc} + 800095e: 46c0 nop ; (mov r8, r8) + 8000960: 20000028 .word 0x20000028 + 8000964: 40012400 .word 0x40012400 + 8000968: 24000200 .word 0x24000200 + 800096c: 34002000 .word 0x34002000 + 8000970: 38004000 .word 0x38004000 -080008e4 : +08000974 : * @brief LPUART1 Initialization Function * @param None * @retval None */ static void MX_LPUART1_UART_Init(void) { - 80008e4: b580 push {r7, lr} - 80008e6: af00 add r7, sp, #0 + 8000974: b580 push {r7, lr} + 8000976: af00 add r7, sp, #0 /* USER CODE END LPUART1_Init 0 */ /* USER CODE BEGIN LPUART1_Init 1 */ /* USER CODE END LPUART1_Init 1 */ hlpuart1.Instance = LPUART1; - 80008e8: 4b13 ldr r3, [pc, #76] ; (8000938 ) - 80008ea: 4a14 ldr r2, [pc, #80] ; (800093c ) - 80008ec: 601a str r2, [r3, #0] + 8000978: 4b13 ldr r3, [pc, #76] ; (80009c8 ) + 800097a: 4a14 ldr r2, [pc, #80] ; (80009cc ) + 800097c: 601a str r2, [r3, #0] hlpuart1.Init.BaudRate = 38400; - 80008ee: 4b12 ldr r3, [pc, #72] ; (8000938 ) - 80008f0: 2296 movs r2, #150 ; 0x96 - 80008f2: 0212 lsls r2, r2, #8 - 80008f4: 605a str r2, [r3, #4] + 800097e: 4b12 ldr r3, [pc, #72] ; (80009c8 ) + 8000980: 2296 movs r2, #150 ; 0x96 + 8000982: 0212 lsls r2, r2, #8 + 8000984: 605a str r2, [r3, #4] hlpuart1.Init.WordLength = UART_WORDLENGTH_8B; - 80008f6: 4b10 ldr r3, [pc, #64] ; (8000938 ) - 80008f8: 2200 movs r2, #0 - 80008fa: 609a str r2, [r3, #8] + 8000986: 4b10 ldr r3, [pc, #64] ; (80009c8 ) + 8000988: 2200 movs r2, #0 + 800098a: 609a str r2, [r3, #8] hlpuart1.Init.StopBits = UART_STOPBITS_1; - 80008fc: 4b0e ldr r3, [pc, #56] ; (8000938 ) - 80008fe: 2200 movs r2, #0 - 8000900: 60da str r2, [r3, #12] + 800098c: 4b0e ldr r3, [pc, #56] ; (80009c8 ) + 800098e: 2200 movs r2, #0 + 8000990: 60da str r2, [r3, #12] hlpuart1.Init.Parity = UART_PARITY_NONE; - 8000902: 4b0d ldr r3, [pc, #52] ; (8000938 ) - 8000904: 2200 movs r2, #0 - 8000906: 611a str r2, [r3, #16] + 8000992: 4b0d ldr r3, [pc, #52] ; (80009c8 ) + 8000994: 2200 movs r2, #0 + 8000996: 611a str r2, [r3, #16] hlpuart1.Init.Mode = UART_MODE_TX_RX; - 8000908: 4b0b ldr r3, [pc, #44] ; (8000938 ) - 800090a: 220c movs r2, #12 - 800090c: 615a str r2, [r3, #20] + 8000998: 4b0b ldr r3, [pc, #44] ; (80009c8 ) + 800099a: 220c movs r2, #12 + 800099c: 615a str r2, [r3, #20] hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 800090e: 4b0a ldr r3, [pc, #40] ; (8000938 ) - 8000910: 2200 movs r2, #0 - 8000912: 619a str r2, [r3, #24] + 800099e: 4b0a ldr r3, [pc, #40] ; (80009c8 ) + 80009a0: 2200 movs r2, #0 + 80009a2: 619a str r2, [r3, #24] hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8000914: 4b08 ldr r3, [pc, #32] ; (8000938 ) - 8000916: 2200 movs r2, #0 - 8000918: 621a str r2, [r3, #32] + 80009a4: 4b08 ldr r3, [pc, #32] ; (80009c8 ) + 80009a6: 2200 movs r2, #0 + 80009a8: 621a str r2, [r3, #32] hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 800091a: 4b07 ldr r3, [pc, #28] ; (8000938 ) - 800091c: 2200 movs r2, #0 - 800091e: 625a str r2, [r3, #36] ; 0x24 + 80009aa: 4b07 ldr r3, [pc, #28] ; (80009c8 ) + 80009ac: 2200 movs r2, #0 + 80009ae: 625a str r2, [r3, #36] ; 0x24 if (HAL_UART_Init(&hlpuart1) != HAL_OK) - 8000920: 4b05 ldr r3, [pc, #20] ; (8000938 ) - 8000922: 0018 movs r0, r3 - 8000924: f002 fe30 bl 8003588 - 8000928: 1e03 subs r3, r0, #0 - 800092a: d001 beq.n 8000930 + 80009b0: 4b05 ldr r3, [pc, #20] ; (80009c8 ) + 80009b2: 0018 movs r0, r3 + 80009b4: f002 fe30 bl 8003618 + 80009b8: 1e03 subs r3, r0, #0 + 80009ba: d001 beq.n 80009c0 { Error_Handler(); - 800092c: f000 f9da bl 8000ce4 + 80009bc: f000 f9da bl 8000d74 } /* USER CODE BEGIN LPUART1_Init 2 */ /* USER CODE END LPUART1_Init 2 */ } - 8000930: 46c0 nop ; (mov r8, r8) - 8000932: 46bd mov sp, r7 - 8000934: bd80 pop {r7, pc} - 8000936: 46c0 nop ; (mov r8, r8) - 8000938: 20000084 .word 0x20000084 - 800093c: 40004800 .word 0x40004800 + 80009c0: 46c0 nop ; (mov r8, r8) + 80009c2: 46bd mov sp, r7 + 80009c4: bd80 pop {r7, pc} + 80009c6: 46c0 nop ; (mov r8, r8) + 80009c8: 20000084 .word 0x20000084 + 80009cc: 40004800 .word 0x40004800 -08000940 : +080009d0 : * @brief USART1 Initialization Function * @param None * @retval None */ static void MX_USART1_UART_Init(void) { - 8000940: b580 push {r7, lr} - 8000942: af00 add r7, sp, #0 + 80009d0: b580 push {r7, lr} + 80009d2: af00 add r7, sp, #0 /* USER CODE END USART1_Init 0 */ /* USER CODE BEGIN USART1_Init 1 */ /* USER CODE END USART1_Init 1 */ huart1.Instance = USART1; - 8000944: 4b14 ldr r3, [pc, #80] ; (8000998 ) - 8000946: 4a15 ldr r2, [pc, #84] ; (800099c ) - 8000948: 601a str r2, [r3, #0] + 80009d4: 4b14 ldr r3, [pc, #80] ; (8000a28 ) + 80009d6: 4a15 ldr r2, [pc, #84] ; (8000a2c ) + 80009d8: 601a str r2, [r3, #0] huart1.Init.BaudRate = 115200; - 800094a: 4b13 ldr r3, [pc, #76] ; (8000998 ) - 800094c: 22e1 movs r2, #225 ; 0xe1 - 800094e: 0252 lsls r2, r2, #9 - 8000950: 605a str r2, [r3, #4] + 80009da: 4b13 ldr r3, [pc, #76] ; (8000a28 ) + 80009dc: 22e1 movs r2, #225 ; 0xe1 + 80009de: 0252 lsls r2, r2, #9 + 80009e0: 605a str r2, [r3, #4] huart1.Init.WordLength = UART_WORDLENGTH_8B; - 8000952: 4b11 ldr r3, [pc, #68] ; (8000998 ) - 8000954: 2200 movs r2, #0 - 8000956: 609a str r2, [r3, #8] + 80009e2: 4b11 ldr r3, [pc, #68] ; (8000a28 ) + 80009e4: 2200 movs r2, #0 + 80009e6: 609a str r2, [r3, #8] huart1.Init.StopBits = UART_STOPBITS_1; - 8000958: 4b0f ldr r3, [pc, #60] ; (8000998 ) - 800095a: 2200 movs r2, #0 - 800095c: 60da str r2, [r3, #12] + 80009e8: 4b0f ldr r3, [pc, #60] ; (8000a28 ) + 80009ea: 2200 movs r2, #0 + 80009ec: 60da str r2, [r3, #12] huart1.Init.Parity = UART_PARITY_NONE; - 800095e: 4b0e ldr r3, [pc, #56] ; (8000998 ) - 8000960: 2200 movs r2, #0 - 8000962: 611a str r2, [r3, #16] + 80009ee: 4b0e ldr r3, [pc, #56] ; (8000a28 ) + 80009f0: 2200 movs r2, #0 + 80009f2: 611a str r2, [r3, #16] huart1.Init.Mode = UART_MODE_TX_RX; - 8000964: 4b0c ldr r3, [pc, #48] ; (8000998 ) - 8000966: 220c movs r2, #12 - 8000968: 615a str r2, [r3, #20] + 80009f4: 4b0c ldr r3, [pc, #48] ; (8000a28 ) + 80009f6: 220c movs r2, #12 + 80009f8: 615a str r2, [r3, #20] huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 800096a: 4b0b ldr r3, [pc, #44] ; (8000998 ) - 800096c: 2200 movs r2, #0 - 800096e: 619a str r2, [r3, #24] + 80009fa: 4b0b ldr r3, [pc, #44] ; (8000a28 ) + 80009fc: 2200 movs r2, #0 + 80009fe: 619a str r2, [r3, #24] huart1.Init.OverSampling = UART_OVERSAMPLING_16; - 8000970: 4b09 ldr r3, [pc, #36] ; (8000998 ) - 8000972: 2200 movs r2, #0 - 8000974: 61da str r2, [r3, #28] + 8000a00: 4b09 ldr r3, [pc, #36] ; (8000a28 ) + 8000a02: 2200 movs r2, #0 + 8000a04: 61da str r2, [r3, #28] huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 8000976: 4b08 ldr r3, [pc, #32] ; (8000998 ) - 8000978: 2200 movs r2, #0 - 800097a: 621a str r2, [r3, #32] + 8000a06: 4b08 ldr r3, [pc, #32] ; (8000a28 ) + 8000a08: 2200 movs r2, #0 + 8000a0a: 621a str r2, [r3, #32] huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 800097c: 4b06 ldr r3, [pc, #24] ; (8000998 ) - 800097e: 2200 movs r2, #0 - 8000980: 625a str r2, [r3, #36] ; 0x24 + 8000a0c: 4b06 ldr r3, [pc, #24] ; (8000a28 ) + 8000a0e: 2200 movs r2, #0 + 8000a10: 625a str r2, [r3, #36] ; 0x24 if (HAL_UART_Init(&huart1) != HAL_OK) - 8000982: 4b05 ldr r3, [pc, #20] ; (8000998 ) - 8000984: 0018 movs r0, r3 - 8000986: f002 fdff bl 8003588 - 800098a: 1e03 subs r3, r0, #0 - 800098c: d001 beq.n 8000992 + 8000a12: 4b05 ldr r3, [pc, #20] ; (8000a28 ) + 8000a14: 0018 movs r0, r3 + 8000a16: f002 fdff bl 8003618 + 8000a1a: 1e03 subs r3, r0, #0 + 8000a1c: d001 beq.n 8000a22 { Error_Handler(); - 800098e: f000 f9a9 bl 8000ce4 + 8000a1e: f000 f9a9 bl 8000d74 } /* USER CODE BEGIN USART1_Init 2 */ /* USER CODE END USART1_Init 2 */ } - 8000992: 46c0 nop ; (mov r8, r8) - 8000994: 46bd mov sp, r7 - 8000996: bd80 pop {r7, pc} - 8000998: 2000010c .word 0x2000010c - 800099c: 40013800 .word 0x40013800 + 8000a22: 46c0 nop ; (mov r8, r8) + 8000a24: 46bd mov sp, r7 + 8000a26: bd80 pop {r7, pc} + 8000a28: 2000010c .word 0x2000010c + 8000a2c: 40013800 .word 0x40013800 -080009a0 : +08000a30 : * @brief SPI1 Initialization Function * @param None * @retval None */ static void MX_SPI1_Init(void) { - 80009a0: b580 push {r7, lr} - 80009a2: af00 add r7, sp, #0 + 8000a30: b580 push {r7, lr} + 8000a32: af00 add r7, sp, #0 /* USER CODE BEGIN SPI1_Init 1 */ /* USER CODE END SPI1_Init 1 */ /* SPI1 parameter configuration*/ hspi1.Instance = SPI1; - 80009a4: 4b18 ldr r3, [pc, #96] ; (8000a08 ) - 80009a6: 4a19 ldr r2, [pc, #100] ; (8000a0c ) - 80009a8: 601a str r2, [r3, #0] + 8000a34: 4b18 ldr r3, [pc, #96] ; (8000a98 ) + 8000a36: 4a19 ldr r2, [pc, #100] ; (8000a9c ) + 8000a38: 601a str r2, [r3, #0] hspi1.Init.Mode = SPI_MODE_MASTER; - 80009aa: 4b17 ldr r3, [pc, #92] ; (8000a08 ) - 80009ac: 2282 movs r2, #130 ; 0x82 - 80009ae: 0052 lsls r2, r2, #1 - 80009b0: 605a str r2, [r3, #4] + 8000a3a: 4b17 ldr r3, [pc, #92] ; (8000a98 ) + 8000a3c: 2282 movs r2, #130 ; 0x82 + 8000a3e: 0052 lsls r2, r2, #1 + 8000a40: 605a str r2, [r3, #4] hspi1.Init.Direction = SPI_DIRECTION_2LINES; - 80009b2: 4b15 ldr r3, [pc, #84] ; (8000a08 ) - 80009b4: 2200 movs r2, #0 - 80009b6: 609a str r2, [r3, #8] + 8000a42: 4b15 ldr r3, [pc, #84] ; (8000a98 ) + 8000a44: 2200 movs r2, #0 + 8000a46: 609a str r2, [r3, #8] hspi1.Init.DataSize = SPI_DATASIZE_8BIT; - 80009b8: 4b13 ldr r3, [pc, #76] ; (8000a08 ) - 80009ba: 2200 movs r2, #0 - 80009bc: 60da str r2, [r3, #12] + 8000a48: 4b13 ldr r3, [pc, #76] ; (8000a98 ) + 8000a4a: 2200 movs r2, #0 + 8000a4c: 60da str r2, [r3, #12] hspi1.Init.CLKPolarity = SPI_POLARITY_LOW; - 80009be: 4b12 ldr r3, [pc, #72] ; (8000a08 ) - 80009c0: 2200 movs r2, #0 - 80009c2: 611a str r2, [r3, #16] + 8000a4e: 4b12 ldr r3, [pc, #72] ; (8000a98 ) + 8000a50: 2200 movs r2, #0 + 8000a52: 611a str r2, [r3, #16] hspi1.Init.CLKPhase = SPI_PHASE_1EDGE; - 80009c4: 4b10 ldr r3, [pc, #64] ; (8000a08 ) - 80009c6: 2200 movs r2, #0 - 80009c8: 615a str r2, [r3, #20] + 8000a54: 4b10 ldr r3, [pc, #64] ; (8000a98 ) + 8000a56: 2200 movs r2, #0 + 8000a58: 615a str r2, [r3, #20] hspi1.Init.NSS = SPI_NSS_HARD_OUTPUT; - 80009ca: 4b0f ldr r3, [pc, #60] ; (8000a08 ) - 80009cc: 2280 movs r2, #128 ; 0x80 - 80009ce: 02d2 lsls r2, r2, #11 - 80009d0: 619a str r2, [r3, #24] + 8000a5a: 4b0f ldr r3, [pc, #60] ; (8000a98 ) + 8000a5c: 2280 movs r2, #128 ; 0x80 + 8000a5e: 02d2 lsls r2, r2, #11 + 8000a60: 619a str r2, [r3, #24] hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - 80009d2: 4b0d ldr r3, [pc, #52] ; (8000a08 ) - 80009d4: 2200 movs r2, #0 - 80009d6: 61da str r2, [r3, #28] + 8000a62: 4b0d ldr r3, [pc, #52] ; (8000a98 ) + 8000a64: 2200 movs r2, #0 + 8000a66: 61da str r2, [r3, #28] hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB; - 80009d8: 4b0b ldr r3, [pc, #44] ; (8000a08 ) - 80009da: 2200 movs r2, #0 - 80009dc: 621a str r2, [r3, #32] + 8000a68: 4b0b ldr r3, [pc, #44] ; (8000a98 ) + 8000a6a: 2200 movs r2, #0 + 8000a6c: 621a str r2, [r3, #32] hspi1.Init.TIMode = SPI_TIMODE_DISABLE; - 80009de: 4b0a ldr r3, [pc, #40] ; (8000a08 ) - 80009e0: 2200 movs r2, #0 - 80009e2: 625a str r2, [r3, #36] ; 0x24 + 8000a6e: 4b0a ldr r3, [pc, #40] ; (8000a98 ) + 8000a70: 2200 movs r2, #0 + 8000a72: 625a str r2, [r3, #36] ; 0x24 hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 80009e4: 4b08 ldr r3, [pc, #32] ; (8000a08 ) - 80009e6: 2200 movs r2, #0 - 80009e8: 629a str r2, [r3, #40] ; 0x28 + 8000a74: 4b08 ldr r3, [pc, #32] ; (8000a98 ) + 8000a76: 2200 movs r2, #0 + 8000a78: 629a str r2, [r3, #40] ; 0x28 hspi1.Init.CRCPolynomial = 7; - 80009ea: 4b07 ldr r3, [pc, #28] ; (8000a08 ) - 80009ec: 2207 movs r2, #7 - 80009ee: 62da str r2, [r3, #44] ; 0x2c + 8000a7a: 4b07 ldr r3, [pc, #28] ; (8000a98 ) + 8000a7c: 2207 movs r2, #7 + 8000a7e: 62da str r2, [r3, #44] ; 0x2c if (HAL_SPI_Init(&hspi1) != HAL_OK) - 80009f0: 4b05 ldr r3, [pc, #20] ; (8000a08 ) - 80009f2: 0018 movs r0, r3 - 80009f4: f002 f9ca bl 8002d8c - 80009f8: 1e03 subs r3, r0, #0 - 80009fa: d001 beq.n 8000a00 + 8000a80: 4b05 ldr r3, [pc, #20] ; (8000a98 ) + 8000a82: 0018 movs r0, r3 + 8000a84: f002 f9ca bl 8002e1c + 8000a88: 1e03 subs r3, r0, #0 + 8000a8a: d001 beq.n 8000a90 { Error_Handler(); - 80009fc: f000 f972 bl 8000ce4 + 8000a8c: f000 f972 bl 8000d74 } /* USER CODE BEGIN SPI1_Init 2 */ /* USER CODE END SPI1_Init 2 */ } - 8000a00: 46c0 nop ; (mov r8, r8) - 8000a02: 46bd mov sp, r7 - 8000a04: bd80 pop {r7, pc} - 8000a06: 46c0 nop ; (mov r8, r8) - 8000a08: 200001dc .word 0x200001dc - 8000a0c: 40013000 .word 0x40013000 + 8000a90: 46c0 nop ; (mov r8, r8) + 8000a92: 46bd mov sp, r7 + 8000a94: bd80 pop {r7, pc} + 8000a96: 46c0 nop ; (mov r8, r8) + 8000a98: 200001dc .word 0x200001dc + 8000a9c: 40013000 .word 0x40013000 -08000a10 : +08000aa0 : * @brief TIM21 Initialization Function * @param None * @retval None */ static void MX_TIM21_Init(void) { - 8000a10: b580 push {r7, lr} - 8000a12: b086 sub sp, #24 - 8000a14: af00 add r7, sp, #0 + 8000aa0: b580 push {r7, lr} + 8000aa2: b086 sub sp, #24 + 8000aa4: af00 add r7, sp, #0 /* USER CODE BEGIN TIM21_Init 0 */ /* USER CODE END TIM21_Init 0 */ TIM_ClockConfigTypeDef sClockSourceConfig = {0}; - 8000a16: 2308 movs r3, #8 - 8000a18: 18fb adds r3, r7, r3 - 8000a1a: 0018 movs r0, r3 - 8000a1c: 2310 movs r3, #16 - 8000a1e: 001a movs r2, r3 - 8000a20: 2100 movs r1, #0 - 8000a22: f004 f8a8 bl 8004b76 + 8000aa6: 2308 movs r3, #8 + 8000aa8: 18fb adds r3, r7, r3 + 8000aaa: 0018 movs r0, r3 + 8000aac: 2310 movs r3, #16 + 8000aae: 001a movs r2, r3 + 8000ab0: 2100 movs r1, #0 + 8000ab2: f004 f8a8 bl 8004c06 TIM_MasterConfigTypeDef sMasterConfig = {0}; - 8000a26: 003b movs r3, r7 - 8000a28: 0018 movs r0, r3 - 8000a2a: 2308 movs r3, #8 - 8000a2c: 001a movs r2, r3 - 8000a2e: 2100 movs r1, #0 - 8000a30: f004 f8a1 bl 8004b76 + 8000ab6: 003b movs r3, r7 + 8000ab8: 0018 movs r0, r3 + 8000aba: 2308 movs r3, #8 + 8000abc: 001a movs r2, r3 + 8000abe: 2100 movs r1, #0 + 8000ac0: f004 f8a1 bl 8004c06 /* USER CODE BEGIN TIM21_Init 1 */ /* USER CODE END TIM21_Init 1 */ htim21.Instance = TIM21; - 8000a34: 4b1e ldr r3, [pc, #120] ; (8000ab0 ) - 8000a36: 4a1f ldr r2, [pc, #124] ; (8000ab4 ) - 8000a38: 601a str r2, [r3, #0] + 8000ac4: 4b1e ldr r3, [pc, #120] ; (8000b40 ) + 8000ac6: 4a1f ldr r2, [pc, #124] ; (8000b44 ) + 8000ac8: 601a str r2, [r3, #0] htim21.Init.Prescaler = 0; - 8000a3a: 4b1d ldr r3, [pc, #116] ; (8000ab0 ) - 8000a3c: 2200 movs r2, #0 - 8000a3e: 605a str r2, [r3, #4] + 8000aca: 4b1d ldr r3, [pc, #116] ; (8000b40 ) + 8000acc: 2200 movs r2, #0 + 8000ace: 605a str r2, [r3, #4] htim21.Init.CounterMode = TIM_COUNTERMODE_UP; - 8000a40: 4b1b ldr r3, [pc, #108] ; (8000ab0 ) - 8000a42: 2200 movs r2, #0 - 8000a44: 609a str r2, [r3, #8] + 8000ad0: 4b1b ldr r3, [pc, #108] ; (8000b40 ) + 8000ad2: 2200 movs r2, #0 + 8000ad4: 609a str r2, [r3, #8] htim21.Init.Period = 65535; - 8000a46: 4b1a ldr r3, [pc, #104] ; (8000ab0 ) - 8000a48: 4a1b ldr r2, [pc, #108] ; (8000ab8 ) - 8000a4a: 60da str r2, [r3, #12] + 8000ad6: 4b1a ldr r3, [pc, #104] ; (8000b40 ) + 8000ad8: 4a1b ldr r2, [pc, #108] ; (8000b48 ) + 8000ada: 60da str r2, [r3, #12] htim21.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 8000a4c: 4b18 ldr r3, [pc, #96] ; (8000ab0 ) - 8000a4e: 2200 movs r2, #0 - 8000a50: 611a str r2, [r3, #16] + 8000adc: 4b18 ldr r3, [pc, #96] ; (8000b40 ) + 8000ade: 2200 movs r2, #0 + 8000ae0: 611a str r2, [r3, #16] htim21.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 8000a52: 4b17 ldr r3, [pc, #92] ; (8000ab0 ) - 8000a54: 2200 movs r2, #0 - 8000a56: 615a str r2, [r3, #20] + 8000ae2: 4b17 ldr r3, [pc, #92] ; (8000b40 ) + 8000ae4: 2200 movs r2, #0 + 8000ae6: 615a str r2, [r3, #20] if (HAL_TIM_Base_Init(&htim21) != HAL_OK) - 8000a58: 4b15 ldr r3, [pc, #84] ; (8000ab0 ) - 8000a5a: 0018 movs r0, r3 - 8000a5c: f002 fa2a bl 8002eb4 - 8000a60: 1e03 subs r3, r0, #0 - 8000a62: d001 beq.n 8000a68 + 8000ae8: 4b15 ldr r3, [pc, #84] ; (8000b40 ) + 8000aea: 0018 movs r0, r3 + 8000aec: f002 fa2a bl 8002f44 + 8000af0: 1e03 subs r3, r0, #0 + 8000af2: d001 beq.n 8000af8 { Error_Handler(); - 8000a64: f000 f93e bl 8000ce4 + 8000af4: f000 f93e bl 8000d74 } sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; - 8000a68: 2108 movs r1, #8 - 8000a6a: 187b adds r3, r7, r1 - 8000a6c: 2280 movs r2, #128 ; 0x80 - 8000a6e: 0152 lsls r2, r2, #5 - 8000a70: 601a str r2, [r3, #0] + 8000af8: 2108 movs r1, #8 + 8000afa: 187b adds r3, r7, r1 + 8000afc: 2280 movs r2, #128 ; 0x80 + 8000afe: 0152 lsls r2, r2, #5 + 8000b00: 601a str r2, [r3, #0] if (HAL_TIM_ConfigClockSource(&htim21, &sClockSourceConfig) != HAL_OK) - 8000a72: 187a adds r2, r7, r1 - 8000a74: 4b0e ldr r3, [pc, #56] ; (8000ab0 ) - 8000a76: 0011 movs r1, r2 - 8000a78: 0018 movs r0, r3 - 8000a7a: f002 fb43 bl 8003104 - 8000a7e: 1e03 subs r3, r0, #0 - 8000a80: d001 beq.n 8000a86 + 8000b02: 187a adds r2, r7, r1 + 8000b04: 4b0e ldr r3, [pc, #56] ; (8000b40 ) + 8000b06: 0011 movs r1, r2 + 8000b08: 0018 movs r0, r3 + 8000b0a: f002 fb43 bl 8003194 + 8000b0e: 1e03 subs r3, r0, #0 + 8000b10: d001 beq.n 8000b16 { Error_Handler(); - 8000a82: f000 f92f bl 8000ce4 + 8000b12: f000 f92f bl 8000d74 } sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; - 8000a86: 003b movs r3, r7 - 8000a88: 2200 movs r2, #0 - 8000a8a: 601a str r2, [r3, #0] + 8000b16: 003b movs r3, r7 + 8000b18: 2200 movs r2, #0 + 8000b1a: 601a str r2, [r3, #0] sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 8000a8c: 003b movs r3, r7 - 8000a8e: 2200 movs r2, #0 - 8000a90: 605a str r2, [r3, #4] + 8000b1c: 003b movs r3, r7 + 8000b1e: 2200 movs r2, #0 + 8000b20: 605a str r2, [r3, #4] if (HAL_TIMEx_MasterConfigSynchronization(&htim21, &sMasterConfig) != HAL_OK) - 8000a92: 003a movs r2, r7 - 8000a94: 4b06 ldr r3, [pc, #24] ; (8000ab0 ) - 8000a96: 0011 movs r1, r2 - 8000a98: 0018 movs r0, r3 - 8000a9a: f002 fd1d bl 80034d8 - 8000a9e: 1e03 subs r3, r0, #0 - 8000aa0: d001 beq.n 8000aa6 + 8000b22: 003a movs r2, r7 + 8000b24: 4b06 ldr r3, [pc, #24] ; (8000b40 ) + 8000b26: 0011 movs r1, r2 + 8000b28: 0018 movs r0, r3 + 8000b2a: f002 fd1d bl 8003568 + 8000b2e: 1e03 subs r3, r0, #0 + 8000b30: d001 beq.n 8000b36 { Error_Handler(); - 8000aa2: f000 f91f bl 8000ce4 + 8000b32: f000 f91f bl 8000d74 } /* USER CODE BEGIN TIM21_Init 2 */ /* USER CODE END TIM21_Init 2 */ } - 8000aa6: 46c0 nop ; (mov r8, r8) - 8000aa8: 46bd mov sp, r7 - 8000aaa: b006 add sp, #24 - 8000aac: bd80 pop {r7, pc} - 8000aae: 46c0 nop ; (mov r8, r8) - 8000ab0: 20000234 .word 0x20000234 - 8000ab4: 40010800 .word 0x40010800 - 8000ab8: 0000ffff .word 0x0000ffff + 8000b36: 46c0 nop ; (mov r8, r8) + 8000b38: 46bd mov sp, r7 + 8000b3a: b006 add sp, #24 + 8000b3c: bd80 pop {r7, pc} + 8000b3e: 46c0 nop ; (mov r8, r8) + 8000b40: 20000234 .word 0x20000234 + 8000b44: 40010800 .word 0x40010800 + 8000b48: 0000ffff .word 0x0000ffff -08000abc : +08000b4c : /** * Enable DMA controller clock */ static void MX_DMA_Init(void) { - 8000abc: b580 push {r7, lr} - 8000abe: b082 sub sp, #8 - 8000ac0: af00 add r7, sp, #0 + 8000b4c: b580 push {r7, lr} + 8000b4e: b082 sub sp, #8 + 8000b50: af00 add r7, sp, #0 /* DMA controller clock enable */ __HAL_RCC_DMA1_CLK_ENABLE(); - 8000ac2: 4b0c ldr r3, [pc, #48] ; (8000af4 ) - 8000ac4: 6b1a ldr r2, [r3, #48] ; 0x30 - 8000ac6: 4b0b ldr r3, [pc, #44] ; (8000af4 ) - 8000ac8: 2101 movs r1, #1 - 8000aca: 430a orrs r2, r1 - 8000acc: 631a str r2, [r3, #48] ; 0x30 - 8000ace: 4b09 ldr r3, [pc, #36] ; (8000af4 ) - 8000ad0: 6b1b ldr r3, [r3, #48] ; 0x30 - 8000ad2: 2201 movs r2, #1 - 8000ad4: 4013 ands r3, r2 - 8000ad6: 607b str r3, [r7, #4] - 8000ad8: 687b ldr r3, [r7, #4] + 8000b52: 4b0c ldr r3, [pc, #48] ; (8000b84 ) + 8000b54: 6b1a ldr r2, [r3, #48] ; 0x30 + 8000b56: 4b0b ldr r3, [pc, #44] ; (8000b84 ) + 8000b58: 2101 movs r1, #1 + 8000b5a: 430a orrs r2, r1 + 8000b5c: 631a str r2, [r3, #48] ; 0x30 + 8000b5e: 4b09 ldr r3, [pc, #36] ; (8000b84 ) + 8000b60: 6b1b ldr r3, [r3, #48] ; 0x30 + 8000b62: 2201 movs r2, #1 + 8000b64: 4013 ands r3, r2 + 8000b66: 607b str r3, [r7, #4] + 8000b68: 687b ldr r3, [r7, #4] /* DMA interrupt init */ /* DMA1_Channel2_3_IRQn interrupt configuration */ HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0, 0); - 8000ada: 2200 movs r2, #0 - 8000adc: 2100 movs r1, #0 - 8000ade: 200a movs r0, #10 - 8000ae0: f000 fe50 bl 8001784 + 8000b6a: 2200 movs r2, #0 + 8000b6c: 2100 movs r1, #0 + 8000b6e: 200a movs r0, #10 + 8000b70: f000 fe50 bl 8001814 HAL_NVIC_EnableIRQ(DMA1_Channel2_3_IRQn); - 8000ae4: 200a movs r0, #10 - 8000ae6: f000 fe62 bl 80017ae + 8000b74: 200a movs r0, #10 + 8000b76: f000 fe62 bl 800183e } - 8000aea: 46c0 nop ; (mov r8, r8) - 8000aec: 46bd mov sp, r7 - 8000aee: b002 add sp, #8 - 8000af0: bd80 pop {r7, pc} - 8000af2: 46c0 nop ; (mov r8, r8) - 8000af4: 40021000 .word 0x40021000 + 8000b7a: 46c0 nop ; (mov r8, r8) + 8000b7c: 46bd mov sp, r7 + 8000b7e: b002 add sp, #8 + 8000b80: bd80 pop {r7, pc} + 8000b82: 46c0 nop ; (mov r8, r8) + 8000b84: 40021000 .word 0x40021000 -08000af8 : +08000b88 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { - 8000af8: b590 push {r4, r7, lr} - 8000afa: b08b sub sp, #44 ; 0x2c - 8000afc: af00 add r7, sp, #0 + 8000b88: b590 push {r4, r7, lr} + 8000b8a: b08b sub sp, #44 ; 0x2c + 8000b8c: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8000afe: 2414 movs r4, #20 - 8000b00: 193b adds r3, r7, r4 - 8000b02: 0018 movs r0, r3 - 8000b04: 2314 movs r3, #20 - 8000b06: 001a movs r2, r3 - 8000b08: 2100 movs r1, #0 - 8000b0a: f004 f834 bl 8004b76 + 8000b8e: 2414 movs r4, #20 + 8000b90: 193b adds r3, r7, r4 + 8000b92: 0018 movs r0, r3 + 8000b94: 2314 movs r3, #20 + 8000b96: 001a movs r2, r3 + 8000b98: 2100 movs r1, #0 + 8000b9a: f004 f834 bl 8004c06 /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOC_CLK_ENABLE(); - 8000b0e: 4b6e ldr r3, [pc, #440] ; (8000cc8 ) - 8000b10: 6ada ldr r2, [r3, #44] ; 0x2c - 8000b12: 4b6d ldr r3, [pc, #436] ; (8000cc8 ) - 8000b14: 2104 movs r1, #4 - 8000b16: 430a orrs r2, r1 - 8000b18: 62da str r2, [r3, #44] ; 0x2c - 8000b1a: 4b6b ldr r3, [pc, #428] ; (8000cc8 ) - 8000b1c: 6adb ldr r3, [r3, #44] ; 0x2c - 8000b1e: 2204 movs r2, #4 - 8000b20: 4013 ands r3, r2 - 8000b22: 613b str r3, [r7, #16] - 8000b24: 693b ldr r3, [r7, #16] + 8000b9e: 4b6e ldr r3, [pc, #440] ; (8000d58 ) + 8000ba0: 6ada ldr r2, [r3, #44] ; 0x2c + 8000ba2: 4b6d ldr r3, [pc, #436] ; (8000d58 ) + 8000ba4: 2104 movs r1, #4 + 8000ba6: 430a orrs r2, r1 + 8000ba8: 62da str r2, [r3, #44] ; 0x2c + 8000baa: 4b6b ldr r3, [pc, #428] ; (8000d58 ) + 8000bac: 6adb ldr r3, [r3, #44] ; 0x2c + 8000bae: 2204 movs r2, #4 + 8000bb0: 4013 ands r3, r2 + 8000bb2: 613b str r3, [r7, #16] + 8000bb4: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOH_CLK_ENABLE(); - 8000b26: 4b68 ldr r3, [pc, #416] ; (8000cc8 ) - 8000b28: 6ada ldr r2, [r3, #44] ; 0x2c - 8000b2a: 4b67 ldr r3, [pc, #412] ; (8000cc8 ) - 8000b2c: 2180 movs r1, #128 ; 0x80 - 8000b2e: 430a orrs r2, r1 - 8000b30: 62da str r2, [r3, #44] ; 0x2c - 8000b32: 4b65 ldr r3, [pc, #404] ; (8000cc8 ) - 8000b34: 6adb ldr r3, [r3, #44] ; 0x2c - 8000b36: 2280 movs r2, #128 ; 0x80 - 8000b38: 4013 ands r3, r2 - 8000b3a: 60fb str r3, [r7, #12] - 8000b3c: 68fb ldr r3, [r7, #12] + 8000bb6: 4b68 ldr r3, [pc, #416] ; (8000d58 ) + 8000bb8: 6ada ldr r2, [r3, #44] ; 0x2c + 8000bba: 4b67 ldr r3, [pc, #412] ; (8000d58 ) + 8000bbc: 2180 movs r1, #128 ; 0x80 + 8000bbe: 430a orrs r2, r1 + 8000bc0: 62da str r2, [r3, #44] ; 0x2c + 8000bc2: 4b65 ldr r3, [pc, #404] ; (8000d58 ) + 8000bc4: 6adb ldr r3, [r3, #44] ; 0x2c + 8000bc6: 2280 movs r2, #128 ; 0x80 + 8000bc8: 4013 ands r3, r2 + 8000bca: 60fb str r3, [r7, #12] + 8000bcc: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOA_CLK_ENABLE(); - 8000b3e: 4b62 ldr r3, [pc, #392] ; (8000cc8 ) - 8000b40: 6ada ldr r2, [r3, #44] ; 0x2c - 8000b42: 4b61 ldr r3, [pc, #388] ; (8000cc8 ) - 8000b44: 2101 movs r1, #1 - 8000b46: 430a orrs r2, r1 - 8000b48: 62da str r2, [r3, #44] ; 0x2c - 8000b4a: 4b5f ldr r3, [pc, #380] ; (8000cc8 ) - 8000b4c: 6adb ldr r3, [r3, #44] ; 0x2c - 8000b4e: 2201 movs r2, #1 - 8000b50: 4013 ands r3, r2 - 8000b52: 60bb str r3, [r7, #8] - 8000b54: 68bb ldr r3, [r7, #8] + 8000bce: 4b62 ldr r3, [pc, #392] ; (8000d58 ) + 8000bd0: 6ada ldr r2, [r3, #44] ; 0x2c + 8000bd2: 4b61 ldr r3, [pc, #388] ; (8000d58 ) + 8000bd4: 2101 movs r1, #1 + 8000bd6: 430a orrs r2, r1 + 8000bd8: 62da str r2, [r3, #44] ; 0x2c + 8000bda: 4b5f ldr r3, [pc, #380] ; (8000d58 ) + 8000bdc: 6adb ldr r3, [r3, #44] ; 0x2c + 8000bde: 2201 movs r2, #1 + 8000be0: 4013 ands r3, r2 + 8000be2: 60bb str r3, [r7, #8] + 8000be4: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8000b56: 4b5c ldr r3, [pc, #368] ; (8000cc8 ) - 8000b58: 6ada ldr r2, [r3, #44] ; 0x2c - 8000b5a: 4b5b ldr r3, [pc, #364] ; (8000cc8 ) - 8000b5c: 2102 movs r1, #2 - 8000b5e: 430a orrs r2, r1 - 8000b60: 62da str r2, [r3, #44] ; 0x2c - 8000b62: 4b59 ldr r3, [pc, #356] ; (8000cc8 ) - 8000b64: 6adb ldr r3, [r3, #44] ; 0x2c - 8000b66: 2202 movs r2, #2 - 8000b68: 4013 ands r3, r2 - 8000b6a: 607b str r3, [r7, #4] - 8000b6c: 687b ldr r3, [r7, #4] + 8000be6: 4b5c ldr r3, [pc, #368] ; (8000d58 ) + 8000be8: 6ada ldr r2, [r3, #44] ; 0x2c + 8000bea: 4b5b ldr r3, [pc, #364] ; (8000d58 ) + 8000bec: 2102 movs r1, #2 + 8000bee: 430a orrs r2, r1 + 8000bf0: 62da str r2, [r3, #44] ; 0x2c + 8000bf2: 4b59 ldr r3, [pc, #356] ; (8000d58 ) + 8000bf4: 6adb ldr r3, [r3, #44] ; 0x2c + 8000bf6: 2202 movs r2, #2 + 8000bf8: 4013 ands r3, r2 + 8000bfa: 607b str r3, [r7, #4] + 8000bfc: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOD_CLK_ENABLE(); - 8000b6e: 4b56 ldr r3, [pc, #344] ; (8000cc8 ) - 8000b70: 6ada ldr r2, [r3, #44] ; 0x2c - 8000b72: 4b55 ldr r3, [pc, #340] ; (8000cc8 ) - 8000b74: 2108 movs r1, #8 - 8000b76: 430a orrs r2, r1 - 8000b78: 62da str r2, [r3, #44] ; 0x2c - 8000b7a: 4b53 ldr r3, [pc, #332] ; (8000cc8 ) - 8000b7c: 6adb ldr r3, [r3, #44] ; 0x2c - 8000b7e: 2208 movs r2, #8 - 8000b80: 4013 ands r3, r2 - 8000b82: 603b str r3, [r7, #0] - 8000b84: 683b ldr r3, [r7, #0] + 8000bfe: 4b56 ldr r3, [pc, #344] ; (8000d58 ) + 8000c00: 6ada ldr r2, [r3, #44] ; 0x2c + 8000c02: 4b55 ldr r3, [pc, #340] ; (8000d58 ) + 8000c04: 2108 movs r1, #8 + 8000c06: 430a orrs r2, r1 + 8000c08: 62da str r2, [r3, #44] ; 0x2c + 8000c0a: 4b53 ldr r3, [pc, #332] ; (8000d58 ) + 8000c0c: 6adb ldr r3, [r3, #44] ; 0x2c + 8000c0e: 2208 movs r2, #8 + 8000c10: 4013 ands r3, r2 + 8000c12: 603b str r3, [r7, #0] + 8000c14: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, LED_Pin|EXPANSION_1_Pin|EXPANSION_2_Pin|Temp_EN_Pin - 8000b86: 4951 ldr r1, [pc, #324] ; (8000ccc ) - 8000b88: 4b51 ldr r3, [pc, #324] ; (8000cd0 ) - 8000b8a: 2200 movs r2, #0 - 8000b8c: 0018 movs r0, r3 - 8000b8e: f001 f94f bl 8001e30 + 8000c16: 4951 ldr r1, [pc, #324] ; (8000d5c ) + 8000c18: 4b51 ldr r3, [pc, #324] ; (8000d60 ) + 8000c1a: 2200 movs r2, #0 + 8000c1c: 0018 movs r0, r3 + 8000c1e: f001 f94f bl 8001ec0 |ADF_CLK_Pin|ADF_Data_Pin|ADF_LE_Pin|Heater_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, EXPANSION_4_Pin|EXPANSION_PS_Pin|DC_boost_Pin, GPIO_PIN_RESET); - 8000b92: 4950 ldr r1, [pc, #320] ; (8000cd4 ) - 8000b94: 23a0 movs r3, #160 ; 0xa0 - 8000b96: 05db lsls r3, r3, #23 - 8000b98: 2200 movs r2, #0 - 8000b9a: 0018 movs r0, r3 - 8000b9c: f001 f948 bl 8001e30 + 8000c22: 4950 ldr r1, [pc, #320] ; (8000d64 ) + 8000c24: 23a0 movs r3, #160 ; 0xa0 + 8000c26: 05db lsls r3, r3, #23 + 8000c28: 2200 movs r2, #0 + 8000c2a: 0018 movs r0, r3 + 8000c2c: f001 f948 bl 8001ec0 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, RF_Boost_Pin|ADF_TX_Data_Pin|GPS_ON_Pin|RADIO_EN_Pin - 8000ba0: 494d ldr r1, [pc, #308] ; (8000cd8 ) - 8000ba2: 4b4e ldr r3, [pc, #312] ; (8000cdc ) - 8000ba4: 2200 movs r2, #0 - 8000ba6: 0018 movs r0, r3 - 8000ba8: f001 f942 bl 8001e30 + 8000c30: 494d ldr r1, [pc, #308] ; (8000d68 ) + 8000c32: 4b4e ldr r3, [pc, #312] ; (8000d6c ) + 8000c34: 2200 movs r2, #0 + 8000c36: 0018 movs r0, r3 + 8000c38: f001 f942 bl 8001ec0 |Trmp_R4_Pin|Temp_R2_Pin|Temp_R1_Pin|EXPANSION_3_Pin |Temp_R5_Pin|Temp_R3_Pin, GPIO_PIN_RESET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(Battery_on_GPIO_Port, Battery_on_Pin, GPIO_PIN_RESET); - 8000bac: 4b4c ldr r3, [pc, #304] ; (8000ce0 ) - 8000bae: 2200 movs r2, #0 - 8000bb0: 2104 movs r1, #4 - 8000bb2: 0018 movs r0, r3 - 8000bb4: f001 f93c bl 8001e30 + 8000c3c: 4b4c ldr r3, [pc, #304] ; (8000d70 ) + 8000c3e: 2200 movs r2, #0 + 8000c40: 2104 movs r1, #4 + 8000c42: 0018 movs r0, r3 + 8000c44: f001 f93c bl 8001ec0 /*Configure GPIO pins : BUTTON_Pin TL555_in_Pin */ GPIO_InitStruct.Pin = BUTTON_Pin|TL555_in_Pin; - 8000bb8: 193b adds r3, r7, r4 - 8000bba: 2281 movs r2, #129 ; 0x81 - 8000bbc: 0192 lsls r2, r2, #6 - 8000bbe: 601a str r2, [r3, #0] + 8000c48: 193b adds r3, r7, r4 + 8000c4a: 2281 movs r2, #129 ; 0x81 + 8000c4c: 0192 lsls r2, r2, #6 + 8000c4e: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8000bc0: 193b adds r3, r7, r4 - 8000bc2: 2200 movs r2, #0 - 8000bc4: 605a str r2, [r3, #4] + 8000c50: 193b adds r3, r7, r4 + 8000c52: 2200 movs r2, #0 + 8000c54: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000bc6: 193b adds r3, r7, r4 - 8000bc8: 2200 movs r2, #0 - 8000bca: 609a str r2, [r3, #8] + 8000c56: 193b adds r3, r7, r4 + 8000c58: 2200 movs r2, #0 + 8000c5a: 609a str r2, [r3, #8] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8000bcc: 193b adds r3, r7, r4 - 8000bce: 4a40 ldr r2, [pc, #256] ; (8000cd0 ) - 8000bd0: 0019 movs r1, r3 - 8000bd2: 0010 movs r0, r2 - 8000bd4: f000 ffb6 bl 8001b44 + 8000c5c: 193b adds r3, r7, r4 + 8000c5e: 4a40 ldr r2, [pc, #256] ; (8000d60 ) + 8000c60: 0019 movs r1, r3 + 8000c62: 0010 movs r0, r2 + 8000c64: f000 ffb6 bl 8001bd4 /*Configure GPIO pins : LED_Pin EXPANSION_1_Pin EXPANSION_2_Pin Temp_EN_Pin ADF_CLK_Pin ADF_Data_Pin ADF_LE_Pin Heater_Pin */ GPIO_InitStruct.Pin = LED_Pin|EXPANSION_1_Pin|EXPANSION_2_Pin|Temp_EN_Pin - 8000bd8: 193b adds r3, r7, r4 - 8000bda: 4a3c ldr r2, [pc, #240] ; (8000ccc ) - 8000bdc: 601a str r2, [r3, #0] + 8000c68: 193b adds r3, r7, r4 + 8000c6a: 4a3c ldr r2, [pc, #240] ; (8000d5c ) + 8000c6c: 601a str r2, [r3, #0] |ADF_CLK_Pin|ADF_Data_Pin|ADF_LE_Pin|Heater_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8000bde: 193b adds r3, r7, r4 - 8000be0: 2201 movs r2, #1 - 8000be2: 605a str r2, [r3, #4] + 8000c6e: 193b adds r3, r7, r4 + 8000c70: 2201 movs r2, #1 + 8000c72: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000be4: 193b adds r3, r7, r4 - 8000be6: 2200 movs r2, #0 - 8000be8: 609a str r2, [r3, #8] + 8000c74: 193b adds r3, r7, r4 + 8000c76: 2200 movs r2, #0 + 8000c78: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8000bea: 193b adds r3, r7, r4 - 8000bec: 2200 movs r2, #0 - 8000bee: 60da str r2, [r3, #12] + 8000c7a: 193b adds r3, r7, r4 + 8000c7c: 2200 movs r2, #0 + 8000c7e: 60da str r2, [r3, #12] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8000bf0: 193b adds r3, r7, r4 - 8000bf2: 4a37 ldr r2, [pc, #220] ; (8000cd0 ) - 8000bf4: 0019 movs r1, r3 - 8000bf6: 0010 movs r0, r2 - 8000bf8: f000 ffa4 bl 8001b44 + 8000c80: 193b adds r3, r7, r4 + 8000c82: 4a37 ldr r2, [pc, #220] ; (8000d60 ) + 8000c84: 0019 movs r1, r3 + 8000c86: 0010 movs r0, r2 + 8000c88: f000 ffa4 bl 8001bd4 /*Configure GPIO pin : IR_RX_Pin */ GPIO_InitStruct.Pin = IR_RX_Pin; - 8000bfc: 193b adds r3, r7, r4 - 8000bfe: 2202 movs r2, #2 - 8000c00: 601a str r2, [r3, #0] + 8000c8c: 193b adds r3, r7, r4 + 8000c8e: 2202 movs r2, #2 + 8000c90: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_INPUT; - 8000c02: 193b adds r3, r7, r4 - 8000c04: 2200 movs r2, #0 - 8000c06: 605a str r2, [r3, #4] + 8000c92: 193b adds r3, r7, r4 + 8000c94: 2200 movs r2, #0 + 8000c96: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000c08: 193b adds r3, r7, r4 - 8000c0a: 2200 movs r2, #0 - 8000c0c: 609a str r2, [r3, #8] + 8000c98: 193b adds r3, r7, r4 + 8000c9a: 2200 movs r2, #0 + 8000c9c: 609a str r2, [r3, #8] HAL_GPIO_Init(IR_RX_GPIO_Port, &GPIO_InitStruct); - 8000c0e: 193a adds r2, r7, r4 - 8000c10: 23a0 movs r3, #160 ; 0xa0 - 8000c12: 05db lsls r3, r3, #23 - 8000c14: 0011 movs r1, r2 - 8000c16: 0018 movs r0, r3 - 8000c18: f000 ff94 bl 8001b44 + 8000c9e: 193a adds r2, r7, r4 + 8000ca0: 23a0 movs r3, #160 ; 0xa0 + 8000ca2: 05db lsls r3, r3, #23 + 8000ca4: 0011 movs r1, r2 + 8000ca6: 0018 movs r0, r3 + 8000ca8: f000 ff94 bl 8001bd4 /*Configure GPIO pins : EXPANSION_4_Pin EXPANSION_PS_Pin DC_boost_Pin */ GPIO_InitStruct.Pin = EXPANSION_4_Pin|EXPANSION_PS_Pin|DC_boost_Pin; - 8000c1c: 193b adds r3, r7, r4 - 8000c1e: 4a2d ldr r2, [pc, #180] ; (8000cd4 ) - 8000c20: 601a str r2, [r3, #0] + 8000cac: 193b adds r3, r7, r4 + 8000cae: 4a2d ldr r2, [pc, #180] ; (8000d64 ) + 8000cb0: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8000c22: 193b adds r3, r7, r4 - 8000c24: 2201 movs r2, #1 - 8000c26: 605a str r2, [r3, #4] + 8000cb2: 193b adds r3, r7, r4 + 8000cb4: 2201 movs r2, #1 + 8000cb6: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000c28: 193b adds r3, r7, r4 - 8000c2a: 2200 movs r2, #0 - 8000c2c: 609a str r2, [r3, #8] + 8000cb8: 193b adds r3, r7, r4 + 8000cba: 2200 movs r2, #0 + 8000cbc: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8000c2e: 193b adds r3, r7, r4 - 8000c30: 2200 movs r2, #0 - 8000c32: 60da str r2, [r3, #12] + 8000cbe: 193b adds r3, r7, r4 + 8000cc0: 2200 movs r2, #0 + 8000cc2: 60da str r2, [r3, #12] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8000c34: 193a adds r2, r7, r4 - 8000c36: 23a0 movs r3, #160 ; 0xa0 - 8000c38: 05db lsls r3, r3, #23 - 8000c3a: 0011 movs r1, r2 - 8000c3c: 0018 movs r0, r3 - 8000c3e: f000 ff81 bl 8001b44 + 8000cc4: 193a adds r2, r7, r4 + 8000cc6: 23a0 movs r3, #160 ; 0xa0 + 8000cc8: 05db lsls r3, r3, #23 + 8000cca: 0011 movs r1, r2 + 8000ccc: 0018 movs r0, r3 + 8000cce: f000 ff81 bl 8001bd4 /*Configure GPIO pins : RF_Boost_Pin ADF_TX_Data_Pin GPS_ON_Pin RADIO_EN_Pin Trmp_R4_Pin Temp_R2_Pin Temp_R1_Pin EXPANSION_3_Pin Temp_R5_Pin Temp_R3_Pin */ GPIO_InitStruct.Pin = RF_Boost_Pin|ADF_TX_Data_Pin|GPS_ON_Pin|RADIO_EN_Pin - 8000c42: 193b adds r3, r7, r4 - 8000c44: 4a24 ldr r2, [pc, #144] ; (8000cd8 ) - 8000c46: 601a str r2, [r3, #0] + 8000cd2: 193b adds r3, r7, r4 + 8000cd4: 4a24 ldr r2, [pc, #144] ; (8000d68 ) + 8000cd6: 601a str r2, [r3, #0] |Trmp_R4_Pin|Temp_R2_Pin|Temp_R1_Pin|EXPANSION_3_Pin |Temp_R5_Pin|Temp_R3_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8000c48: 193b adds r3, r7, r4 - 8000c4a: 2201 movs r2, #1 - 8000c4c: 605a str r2, [r3, #4] + 8000cd8: 193b adds r3, r7, r4 + 8000cda: 2201 movs r2, #1 + 8000cdc: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000c4e: 193b adds r3, r7, r4 - 8000c50: 2200 movs r2, #0 - 8000c52: 609a str r2, [r3, #8] + 8000cde: 193b adds r3, r7, r4 + 8000ce0: 2200 movs r2, #0 + 8000ce2: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8000c54: 193b adds r3, r7, r4 - 8000c56: 2200 movs r2, #0 - 8000c58: 60da str r2, [r3, #12] + 8000ce4: 193b adds r3, r7, r4 + 8000ce6: 2200 movs r2, #0 + 8000ce8: 60da str r2, [r3, #12] HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 8000c5a: 193b adds r3, r7, r4 - 8000c5c: 4a1f ldr r2, [pc, #124] ; (8000cdc ) - 8000c5e: 0019 movs r1, r3 - 8000c60: 0010 movs r0, r2 - 8000c62: f000 ff6f bl 8001b44 + 8000cea: 193b adds r3, r7, r4 + 8000cec: 4a1f ldr r2, [pc, #124] ; (8000d6c ) + 8000cee: 0019 movs r1, r3 + 8000cf0: 0010 movs r0, r2 + 8000cf2: f000 ff6f bl 8001bd4 /*Configure GPIO pin : PA8 */ GPIO_InitStruct.Pin = GPIO_PIN_8; - 8000c66: 0021 movs r1, r4 - 8000c68: 187b adds r3, r7, r1 - 8000c6a: 2280 movs r2, #128 ; 0x80 - 8000c6c: 0052 lsls r2, r2, #1 - 8000c6e: 601a str r2, [r3, #0] + 8000cf6: 0021 movs r1, r4 + 8000cf8: 187b adds r3, r7, r1 + 8000cfa: 2280 movs r2, #128 ; 0x80 + 8000cfc: 0052 lsls r2, r2, #1 + 8000cfe: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8000c70: 000c movs r4, r1 - 8000c72: 193b adds r3, r7, r4 - 8000c74: 2202 movs r2, #2 - 8000c76: 605a str r2, [r3, #4] + 8000d00: 000c movs r4, r1 + 8000d02: 193b adds r3, r7, r4 + 8000d04: 2202 movs r2, #2 + 8000d06: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000c78: 193b adds r3, r7, r4 - 8000c7a: 2200 movs r2, #0 - 8000c7c: 609a str r2, [r3, #8] + 8000d08: 193b adds r3, r7, r4 + 8000d0a: 2200 movs r2, #0 + 8000d0c: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8000c7e: 193b adds r3, r7, r4 - 8000c80: 2200 movs r2, #0 - 8000c82: 60da str r2, [r3, #12] + 8000d0e: 193b adds r3, r7, r4 + 8000d10: 2200 movs r2, #0 + 8000d12: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF0_MCO; - 8000c84: 193b adds r3, r7, r4 - 8000c86: 2200 movs r2, #0 - 8000c88: 611a str r2, [r3, #16] + 8000d14: 193b adds r3, r7, r4 + 8000d16: 2200 movs r2, #0 + 8000d18: 611a str r2, [r3, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8000c8a: 193a adds r2, r7, r4 - 8000c8c: 23a0 movs r3, #160 ; 0xa0 - 8000c8e: 05db lsls r3, r3, #23 - 8000c90: 0011 movs r1, r2 - 8000c92: 0018 movs r0, r3 - 8000c94: f000 ff56 bl 8001b44 + 8000d1a: 193a adds r2, r7, r4 + 8000d1c: 23a0 movs r3, #160 ; 0xa0 + 8000d1e: 05db lsls r3, r3, #23 + 8000d20: 0011 movs r1, r2 + 8000d22: 0018 movs r0, r3 + 8000d24: f000 ff56 bl 8001bd4 /*Configure GPIO pin : Battery_on_Pin */ GPIO_InitStruct.Pin = Battery_on_Pin; - 8000c98: 0021 movs r1, r4 - 8000c9a: 187b adds r3, r7, r1 - 8000c9c: 2204 movs r2, #4 - 8000c9e: 601a str r2, [r3, #0] + 8000d28: 0021 movs r1, r4 + 8000d2a: 187b adds r3, r7, r1 + 8000d2c: 2204 movs r2, #4 + 8000d2e: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - 8000ca0: 187b adds r3, r7, r1 - 8000ca2: 2201 movs r2, #1 - 8000ca4: 605a str r2, [r3, #4] + 8000d30: 187b adds r3, r7, r1 + 8000d32: 2201 movs r2, #1 + 8000d34: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000ca6: 187b adds r3, r7, r1 - 8000ca8: 2200 movs r2, #0 - 8000caa: 609a str r2, [r3, #8] + 8000d36: 187b adds r3, r7, r1 + 8000d38: 2200 movs r2, #0 + 8000d3a: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; - 8000cac: 187b adds r3, r7, r1 - 8000cae: 2200 movs r2, #0 - 8000cb0: 60da str r2, [r3, #12] + 8000d3c: 187b adds r3, r7, r1 + 8000d3e: 2200 movs r2, #0 + 8000d40: 60da str r2, [r3, #12] HAL_GPIO_Init(Battery_on_GPIO_Port, &GPIO_InitStruct); - 8000cb2: 187b adds r3, r7, r1 - 8000cb4: 4a0a ldr r2, [pc, #40] ; (8000ce0 ) - 8000cb6: 0019 movs r1, r3 - 8000cb8: 0010 movs r0, r2 - 8000cba: f000 ff43 bl 8001b44 + 8000d42: 187b adds r3, r7, r1 + 8000d44: 4a0a ldr r2, [pc, #40] ; (8000d70 ) + 8000d46: 0019 movs r1, r3 + 8000d48: 0010 movs r0, r2 + 8000d4a: f000 ff43 bl 8001bd4 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } - 8000cbe: 46c0 nop ; (mov r8, r8) - 8000cc0: 46bd mov sp, r7 - 8000cc2: b00b add sp, #44 ; 0x2c - 8000cc4: bd90 pop {r4, r7, pc} - 8000cc6: 46c0 nop ; (mov r8, r8) - 8000cc8: 40021000 .word 0x40021000 - 8000ccc: 000053a3 .word 0x000053a3 - 8000cd0: 50000800 .word 0x50000800 - 8000cd4: 0000100c .word 0x0000100c - 8000cd8: 0000f3f0 .word 0x0000f3f0 - 8000cdc: 50000400 .word 0x50000400 - 8000ce0: 50000c00 .word 0x50000c00 + 8000d4e: 46c0 nop ; (mov r8, r8) + 8000d50: 46bd mov sp, r7 + 8000d52: b00b add sp, #44 ; 0x2c + 8000d54: bd90 pop {r4, r7, pc} + 8000d56: 46c0 nop ; (mov r8, r8) + 8000d58: 40021000 .word 0x40021000 + 8000d5c: 000053a3 .word 0x000053a3 + 8000d60: 50000800 .word 0x50000800 + 8000d64: 0000100c .word 0x0000100c + 8000d68: 0000f3f0 .word 0x0000f3f0 + 8000d6c: 50000400 .word 0x50000400 + 8000d70: 50000c00 .word 0x50000c00 -08000ce4 : +08000d74 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { - 8000ce4: b580 push {r7, lr} - 8000ce6: af00 add r7, sp, #0 + 8000d74: b580 push {r7, lr} + 8000d76: af00 add r7, sp, #0 \details Disables IRQ interrupts by setting the I-bit in the CPSR. Can only be executed in Privileged modes. */ __STATIC_FORCEINLINE void __disable_irq(void) { __ASM volatile ("cpsid i" : : : "memory"); - 8000ce8: b672 cpsid i + 8000d78: b672 cpsid i } - 8000cea: 46c0 nop ; (mov r8, r8) + 8000d7a: 46c0 nop ; (mov r8, r8) /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) - 8000cec: e7fe b.n 8000cec + 8000d7c: e7fe b.n 8000d7c ... -08000cf0 : +08000d80 : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { - 8000cf0: b580 push {r7, lr} - 8000cf2: af00 add r7, sp, #0 + 8000d80: b580 push {r7, lr} + 8000d82: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8000cf4: 4b07 ldr r3, [pc, #28] ; (8000d14 ) - 8000cf6: 6b5a ldr r2, [r3, #52] ; 0x34 - 8000cf8: 4b06 ldr r3, [pc, #24] ; (8000d14 ) - 8000cfa: 2101 movs r1, #1 - 8000cfc: 430a orrs r2, r1 - 8000cfe: 635a str r2, [r3, #52] ; 0x34 + 8000d84: 4b07 ldr r3, [pc, #28] ; (8000da4 ) + 8000d86: 6b5a ldr r2, [r3, #52] ; 0x34 + 8000d88: 4b06 ldr r3, [pc, #24] ; (8000da4 ) + 8000d8a: 2101 movs r1, #1 + 8000d8c: 430a orrs r2, r1 + 8000d8e: 635a str r2, [r3, #52] ; 0x34 __HAL_RCC_PWR_CLK_ENABLE(); - 8000d00: 4b04 ldr r3, [pc, #16] ; (8000d14 ) - 8000d02: 6b9a ldr r2, [r3, #56] ; 0x38 - 8000d04: 4b03 ldr r3, [pc, #12] ; (8000d14 ) - 8000d06: 2180 movs r1, #128 ; 0x80 - 8000d08: 0549 lsls r1, r1, #21 - 8000d0a: 430a orrs r2, r1 - 8000d0c: 639a str r2, [r3, #56] ; 0x38 + 8000d90: 4b04 ldr r3, [pc, #16] ; (8000da4 ) + 8000d92: 6b9a ldr r2, [r3, #56] ; 0x38 + 8000d94: 4b03 ldr r3, [pc, #12] ; (8000da4 ) + 8000d96: 2180 movs r1, #128 ; 0x80 + 8000d98: 0549 lsls r1, r1, #21 + 8000d9a: 430a orrs r2, r1 + 8000d9c: 639a str r2, [r3, #56] ; 0x38 /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } - 8000d0e: 46c0 nop ; (mov r8, r8) - 8000d10: 46bd mov sp, r7 - 8000d12: bd80 pop {r7, pc} - 8000d14: 40021000 .word 0x40021000 + 8000d9e: 46c0 nop ; (mov r8, r8) + 8000da0: 46bd mov sp, r7 + 8000da2: bd80 pop {r7, pc} + 8000da4: 40021000 .word 0x40021000 -08000d18 : +08000da8 : * This function configures the hardware resources used in this example * @param hadc: ADC handle pointer * @retval None */ void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) { - 8000d18: b590 push {r4, r7, lr} - 8000d1a: b08b sub sp, #44 ; 0x2c - 8000d1c: af00 add r7, sp, #0 - 8000d1e: 6078 str r0, [r7, #4] + 8000da8: b590 push {r4, r7, lr} + 8000daa: b08b sub sp, #44 ; 0x2c + 8000dac: af00 add r7, sp, #0 + 8000dae: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8000d20: 2414 movs r4, #20 - 8000d22: 193b adds r3, r7, r4 - 8000d24: 0018 movs r0, r3 - 8000d26: 2314 movs r3, #20 - 8000d28: 001a movs r2, r3 - 8000d2a: 2100 movs r1, #0 - 8000d2c: f003 ff23 bl 8004b76 + 8000db0: 2414 movs r4, #20 + 8000db2: 193b adds r3, r7, r4 + 8000db4: 0018 movs r0, r3 + 8000db6: 2314 movs r3, #20 + 8000db8: 001a movs r2, r3 + 8000dba: 2100 movs r1, #0 + 8000dbc: f003 ff23 bl 8004c06 if(hadc->Instance==ADC1) - 8000d30: 687b ldr r3, [r7, #4] - 8000d32: 681b ldr r3, [r3, #0] - 8000d34: 4a22 ldr r2, [pc, #136] ; (8000dc0 ) - 8000d36: 4293 cmp r3, r2 - 8000d38: d13d bne.n 8000db6 + 8000dc0: 687b ldr r3, [r7, #4] + 8000dc2: 681b ldr r3, [r3, #0] + 8000dc4: 4a22 ldr r2, [pc, #136] ; (8000e50 ) + 8000dc6: 4293 cmp r3, r2 + 8000dc8: d13d bne.n 8000e46 { /* USER CODE BEGIN ADC1_MspInit 0 */ /* USER CODE END ADC1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_ADC1_CLK_ENABLE(); - 8000d3a: 4b22 ldr r3, [pc, #136] ; (8000dc4 ) - 8000d3c: 6b5a ldr r2, [r3, #52] ; 0x34 - 8000d3e: 4b21 ldr r3, [pc, #132] ; (8000dc4 ) - 8000d40: 2180 movs r1, #128 ; 0x80 - 8000d42: 0089 lsls r1, r1, #2 - 8000d44: 430a orrs r2, r1 - 8000d46: 635a str r2, [r3, #52] ; 0x34 + 8000dca: 4b22 ldr r3, [pc, #136] ; (8000e54 ) + 8000dcc: 6b5a ldr r2, [r3, #52] ; 0x34 + 8000dce: 4b21 ldr r3, [pc, #132] ; (8000e54 ) + 8000dd0: 2180 movs r1, #128 ; 0x80 + 8000dd2: 0089 lsls r1, r1, #2 + 8000dd4: 430a orrs r2, r1 + 8000dd6: 635a str r2, [r3, #52] ; 0x34 __HAL_RCC_GPIOC_CLK_ENABLE(); - 8000d48: 4b1e ldr r3, [pc, #120] ; (8000dc4 ) - 8000d4a: 6ada ldr r2, [r3, #44] ; 0x2c - 8000d4c: 4b1d ldr r3, [pc, #116] ; (8000dc4 ) - 8000d4e: 2104 movs r1, #4 - 8000d50: 430a orrs r2, r1 - 8000d52: 62da str r2, [r3, #44] ; 0x2c - 8000d54: 4b1b ldr r3, [pc, #108] ; (8000dc4 ) - 8000d56: 6adb ldr r3, [r3, #44] ; 0x2c - 8000d58: 2204 movs r2, #4 - 8000d5a: 4013 ands r3, r2 - 8000d5c: 613b str r3, [r7, #16] - 8000d5e: 693b ldr r3, [r7, #16] + 8000dd8: 4b1e ldr r3, [pc, #120] ; (8000e54 ) + 8000dda: 6ada ldr r2, [r3, #44] ; 0x2c + 8000ddc: 4b1d ldr r3, [pc, #116] ; (8000e54 ) + 8000dde: 2104 movs r1, #4 + 8000de0: 430a orrs r2, r1 + 8000de2: 62da str r2, [r3, #44] ; 0x2c + 8000de4: 4b1b ldr r3, [pc, #108] ; (8000e54 ) + 8000de6: 6adb ldr r3, [r3, #44] ; 0x2c + 8000de8: 2204 movs r2, #4 + 8000dea: 4013 ands r3, r2 + 8000dec: 613b str r3, [r7, #16] + 8000dee: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOB_CLK_ENABLE(); - 8000d60: 4b18 ldr r3, [pc, #96] ; (8000dc4 ) - 8000d62: 6ada ldr r2, [r3, #44] ; 0x2c - 8000d64: 4b17 ldr r3, [pc, #92] ; (8000dc4 ) - 8000d66: 2102 movs r1, #2 - 8000d68: 430a orrs r2, r1 - 8000d6a: 62da str r2, [r3, #44] ; 0x2c - 8000d6c: 4b15 ldr r3, [pc, #84] ; (8000dc4 ) - 8000d6e: 6adb ldr r3, [r3, #44] ; 0x2c - 8000d70: 2202 movs r2, #2 - 8000d72: 4013 ands r3, r2 - 8000d74: 60fb str r3, [r7, #12] - 8000d76: 68fb ldr r3, [r7, #12] + 8000df0: 4b18 ldr r3, [pc, #96] ; (8000e54 ) + 8000df2: 6ada ldr r2, [r3, #44] ; 0x2c + 8000df4: 4b17 ldr r3, [pc, #92] ; (8000e54 ) + 8000df6: 2102 movs r1, #2 + 8000df8: 430a orrs r2, r1 + 8000dfa: 62da str r2, [r3, #44] ; 0x2c + 8000dfc: 4b15 ldr r3, [pc, #84] ; (8000e54 ) + 8000dfe: 6adb ldr r3, [r3, #44] ; 0x2c + 8000e00: 2202 movs r2, #2 + 8000e02: 4013 ands r3, r2 + 8000e04: 60fb str r3, [r7, #12] + 8000e06: 68fb ldr r3, [r7, #12] /**ADC GPIO Configuration PC3 ------> ADC_IN13 PC4 ------> ADC_IN14 PB1 ------> ADC_IN9 */ GPIO_InitStruct.Pin = Heater_ADC_2_Pin|Temp_ADC_Pin; - 8000d78: 193b adds r3, r7, r4 - 8000d7a: 2218 movs r2, #24 - 8000d7c: 601a str r2, [r3, #0] + 8000e08: 193b adds r3, r7, r4 + 8000e0a: 2218 movs r2, #24 + 8000e0c: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8000d7e: 193b adds r3, r7, r4 - 8000d80: 2203 movs r2, #3 - 8000d82: 605a str r2, [r3, #4] + 8000e0e: 193b adds r3, r7, r4 + 8000e10: 2203 movs r2, #3 + 8000e12: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000d84: 193b adds r3, r7, r4 - 8000d86: 2200 movs r2, #0 - 8000d88: 609a str r2, [r3, #8] + 8000e14: 193b adds r3, r7, r4 + 8000e16: 2200 movs r2, #0 + 8000e18: 609a str r2, [r3, #8] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8000d8a: 193b adds r3, r7, r4 - 8000d8c: 4a0e ldr r2, [pc, #56] ; (8000dc8 ) - 8000d8e: 0019 movs r1, r3 - 8000d90: 0010 movs r0, r2 - 8000d92: f000 fed7 bl 8001b44 + 8000e1a: 193b adds r3, r7, r4 + 8000e1c: 4a0e ldr r2, [pc, #56] ; (8000e58 ) + 8000e1e: 0019 movs r1, r3 + 8000e20: 0010 movs r0, r2 + 8000e22: f000 fed7 bl 8001bd4 GPIO_InitStruct.Pin = Heater_ADC_1_Pin; - 8000d96: 0021 movs r1, r4 - 8000d98: 187b adds r3, r7, r1 - 8000d9a: 2202 movs r2, #2 - 8000d9c: 601a str r2, [r3, #0] + 8000e26: 0021 movs r1, r4 + 8000e28: 187b adds r3, r7, r1 + 8000e2a: 2202 movs r2, #2 + 8000e2c: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; - 8000d9e: 187b adds r3, r7, r1 - 8000da0: 2203 movs r2, #3 - 8000da2: 605a str r2, [r3, #4] + 8000e2e: 187b adds r3, r7, r1 + 8000e30: 2203 movs r2, #3 + 8000e32: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000da4: 187b adds r3, r7, r1 - 8000da6: 2200 movs r2, #0 - 8000da8: 609a str r2, [r3, #8] + 8000e34: 187b adds r3, r7, r1 + 8000e36: 2200 movs r2, #0 + 8000e38: 609a str r2, [r3, #8] HAL_GPIO_Init(Heater_ADC_1_GPIO_Port, &GPIO_InitStruct); - 8000daa: 187b adds r3, r7, r1 - 8000dac: 4a07 ldr r2, [pc, #28] ; (8000dcc ) - 8000dae: 0019 movs r1, r3 - 8000db0: 0010 movs r0, r2 - 8000db2: f000 fec7 bl 8001b44 + 8000e3a: 187b adds r3, r7, r1 + 8000e3c: 4a07 ldr r2, [pc, #28] ; (8000e5c ) + 8000e3e: 0019 movs r1, r3 + 8000e40: 0010 movs r0, r2 + 8000e42: f000 fec7 bl 8001bd4 /* USER CODE BEGIN ADC1_MspInit 1 */ /* USER CODE END ADC1_MspInit 1 */ } } - 8000db6: 46c0 nop ; (mov r8, r8) - 8000db8: 46bd mov sp, r7 - 8000dba: b00b add sp, #44 ; 0x2c - 8000dbc: bd90 pop {r4, r7, pc} - 8000dbe: 46c0 nop ; (mov r8, r8) - 8000dc0: 40012400 .word 0x40012400 - 8000dc4: 40021000 .word 0x40021000 - 8000dc8: 50000800 .word 0x50000800 - 8000dcc: 50000400 .word 0x50000400 + 8000e46: 46c0 nop ; (mov r8, r8) + 8000e48: 46bd mov sp, r7 + 8000e4a: b00b add sp, #44 ; 0x2c + 8000e4c: bd90 pop {r4, r7, pc} + 8000e4e: 46c0 nop ; (mov r8, r8) + 8000e50: 40012400 .word 0x40012400 + 8000e54: 40021000 .word 0x40021000 + 8000e58: 50000800 .word 0x50000800 + 8000e5c: 50000400 .word 0x50000400 -08000dd0 : +08000e60 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { - 8000dd0: b590 push {r4, r7, lr} - 8000dd2: b08b sub sp, #44 ; 0x2c - 8000dd4: af00 add r7, sp, #0 - 8000dd6: 6078 str r0, [r7, #4] + 8000e60: b590 push {r4, r7, lr} + 8000e62: b08b sub sp, #44 ; 0x2c + 8000e64: af00 add r7, sp, #0 + 8000e66: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8000dd8: 2414 movs r4, #20 - 8000dda: 193b adds r3, r7, r4 - 8000ddc: 0018 movs r0, r3 - 8000dde: 2314 movs r3, #20 - 8000de0: 001a movs r2, r3 - 8000de2: 2100 movs r1, #0 - 8000de4: f003 fec7 bl 8004b76 + 8000e68: 2414 movs r4, #20 + 8000e6a: 193b adds r3, r7, r4 + 8000e6c: 0018 movs r0, r3 + 8000e6e: 2314 movs r3, #20 + 8000e70: 001a movs r2, r3 + 8000e72: 2100 movs r1, #0 + 8000e74: f003 fec7 bl 8004c06 if(huart->Instance==LPUART1) - 8000de8: 687b ldr r3, [r7, #4] - 8000dea: 681b ldr r3, [r3, #0] - 8000dec: 4a49 ldr r2, [pc, #292] ; (8000f14 ) - 8000dee: 4293 cmp r3, r2 - 8000df0: d12a bne.n 8000e48 + 8000e78: 687b ldr r3, [r7, #4] + 8000e7a: 681b ldr r3, [r3, #0] + 8000e7c: 4a49 ldr r2, [pc, #292] ; (8000fa4 ) + 8000e7e: 4293 cmp r3, r2 + 8000e80: d12a bne.n 8000ed8 { /* USER CODE BEGIN LPUART1_MspInit 0 */ /* USER CODE END LPUART1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_LPUART1_CLK_ENABLE(); - 8000df2: 4b49 ldr r3, [pc, #292] ; (8000f18 ) - 8000df4: 6b9a ldr r2, [r3, #56] ; 0x38 - 8000df6: 4b48 ldr r3, [pc, #288] ; (8000f18 ) - 8000df8: 2180 movs r1, #128 ; 0x80 - 8000dfa: 02c9 lsls r1, r1, #11 - 8000dfc: 430a orrs r2, r1 - 8000dfe: 639a str r2, [r3, #56] ; 0x38 + 8000e82: 4b49 ldr r3, [pc, #292] ; (8000fa8 ) + 8000e84: 6b9a ldr r2, [r3, #56] ; 0x38 + 8000e86: 4b48 ldr r3, [pc, #288] ; (8000fa8 ) + 8000e88: 2180 movs r1, #128 ; 0x80 + 8000e8a: 02c9 lsls r1, r1, #11 + 8000e8c: 430a orrs r2, r1 + 8000e8e: 639a str r2, [r3, #56] ; 0x38 __HAL_RCC_GPIOC_CLK_ENABLE(); - 8000e00: 4b45 ldr r3, [pc, #276] ; (8000f18 ) - 8000e02: 6ada ldr r2, [r3, #44] ; 0x2c - 8000e04: 4b44 ldr r3, [pc, #272] ; (8000f18 ) - 8000e06: 2104 movs r1, #4 - 8000e08: 430a orrs r2, r1 - 8000e0a: 62da str r2, [r3, #44] ; 0x2c - 8000e0c: 4b42 ldr r3, [pc, #264] ; (8000f18 ) - 8000e0e: 6adb ldr r3, [r3, #44] ; 0x2c - 8000e10: 2204 movs r2, #4 - 8000e12: 4013 ands r3, r2 - 8000e14: 613b str r3, [r7, #16] - 8000e16: 693b ldr r3, [r7, #16] + 8000e90: 4b45 ldr r3, [pc, #276] ; (8000fa8 ) + 8000e92: 6ada ldr r2, [r3, #44] ; 0x2c + 8000e94: 4b44 ldr r3, [pc, #272] ; (8000fa8 ) + 8000e96: 2104 movs r1, #4 + 8000e98: 430a orrs r2, r1 + 8000e9a: 62da str r2, [r3, #44] ; 0x2c + 8000e9c: 4b42 ldr r3, [pc, #264] ; (8000fa8 ) + 8000e9e: 6adb ldr r3, [r3, #44] ; 0x2c + 8000ea0: 2204 movs r2, #4 + 8000ea2: 4013 ands r3, r2 + 8000ea4: 613b str r3, [r7, #16] + 8000ea6: 693b ldr r3, [r7, #16] /**LPUART1 GPIO Configuration PC10 ------> LPUART1_TX PC11 ------> LPUART1_RX */ GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11; - 8000e18: 193b adds r3, r7, r4 - 8000e1a: 22c0 movs r2, #192 ; 0xc0 - 8000e1c: 0112 lsls r2, r2, #4 - 8000e1e: 601a str r2, [r3, #0] + 8000ea8: 193b adds r3, r7, r4 + 8000eaa: 22c0 movs r2, #192 ; 0xc0 + 8000eac: 0112 lsls r2, r2, #4 + 8000eae: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8000e20: 0021 movs r1, r4 - 8000e22: 187b adds r3, r7, r1 - 8000e24: 2202 movs r2, #2 - 8000e26: 605a str r2, [r3, #4] + 8000eb0: 0021 movs r1, r4 + 8000eb2: 187b adds r3, r7, r1 + 8000eb4: 2202 movs r2, #2 + 8000eb6: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000e28: 187b adds r3, r7, r1 - 8000e2a: 2200 movs r2, #0 - 8000e2c: 609a str r2, [r3, #8] + 8000eb8: 187b adds r3, r7, r1 + 8000eba: 2200 movs r2, #0 + 8000ebc: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8000e2e: 187b adds r3, r7, r1 - 8000e30: 2203 movs r2, #3 - 8000e32: 60da str r2, [r3, #12] + 8000ebe: 187b adds r3, r7, r1 + 8000ec0: 2203 movs r2, #3 + 8000ec2: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF0_LPUART1; - 8000e34: 187b adds r3, r7, r1 - 8000e36: 2200 movs r2, #0 - 8000e38: 611a str r2, [r3, #16] + 8000ec4: 187b adds r3, r7, r1 + 8000ec6: 2200 movs r2, #0 + 8000ec8: 611a str r2, [r3, #16] HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - 8000e3a: 187b adds r3, r7, r1 - 8000e3c: 4a37 ldr r2, [pc, #220] ; (8000f1c ) - 8000e3e: 0019 movs r1, r3 - 8000e40: 0010 movs r0, r2 - 8000e42: f000 fe7f bl 8001b44 + 8000eca: 187b adds r3, r7, r1 + 8000ecc: 4a37 ldr r2, [pc, #220] ; (8000fac ) + 8000ece: 0019 movs r1, r3 + 8000ed0: 0010 movs r0, r2 + 8000ed2: f000 fe7f bl 8001bd4 /* USER CODE BEGIN USART1_MspInit 1 */ /* USER CODE END USART1_MspInit 1 */ } } - 8000e46: e060 b.n 8000f0a + 8000ed6: e060 b.n 8000f9a else if(huart->Instance==USART1) - 8000e48: 687b ldr r3, [r7, #4] - 8000e4a: 681b ldr r3, [r3, #0] - 8000e4c: 4a34 ldr r2, [pc, #208] ; (8000f20 ) - 8000e4e: 4293 cmp r3, r2 - 8000e50: d15b bne.n 8000f0a + 8000ed8: 687b ldr r3, [r7, #4] + 8000eda: 681b ldr r3, [r3, #0] + 8000edc: 4a34 ldr r2, [pc, #208] ; (8000fb0 ) + 8000ede: 4293 cmp r3, r2 + 8000ee0: d15b bne.n 8000f9a __HAL_RCC_USART1_CLK_ENABLE(); - 8000e52: 4b31 ldr r3, [pc, #196] ; (8000f18 ) - 8000e54: 6b5a ldr r2, [r3, #52] ; 0x34 - 8000e56: 4b30 ldr r3, [pc, #192] ; (8000f18 ) - 8000e58: 2180 movs r1, #128 ; 0x80 - 8000e5a: 01c9 lsls r1, r1, #7 - 8000e5c: 430a orrs r2, r1 - 8000e5e: 635a str r2, [r3, #52] ; 0x34 + 8000ee2: 4b31 ldr r3, [pc, #196] ; (8000fa8 ) + 8000ee4: 6b5a ldr r2, [r3, #52] ; 0x34 + 8000ee6: 4b30 ldr r3, [pc, #192] ; (8000fa8 ) + 8000ee8: 2180 movs r1, #128 ; 0x80 + 8000eea: 01c9 lsls r1, r1, #7 + 8000eec: 430a orrs r2, r1 + 8000eee: 635a str r2, [r3, #52] ; 0x34 __HAL_RCC_GPIOA_CLK_ENABLE(); - 8000e60: 4b2d ldr r3, [pc, #180] ; (8000f18 ) - 8000e62: 6ada ldr r2, [r3, #44] ; 0x2c - 8000e64: 4b2c ldr r3, [pc, #176] ; (8000f18 ) - 8000e66: 2101 movs r1, #1 - 8000e68: 430a orrs r2, r1 - 8000e6a: 62da str r2, [r3, #44] ; 0x2c - 8000e6c: 4b2a ldr r3, [pc, #168] ; (8000f18 ) - 8000e6e: 6adb ldr r3, [r3, #44] ; 0x2c - 8000e70: 2201 movs r2, #1 - 8000e72: 4013 ands r3, r2 - 8000e74: 60fb str r3, [r7, #12] - 8000e76: 68fb ldr r3, [r7, #12] + 8000ef0: 4b2d ldr r3, [pc, #180] ; (8000fa8 ) + 8000ef2: 6ada ldr r2, [r3, #44] ; 0x2c + 8000ef4: 4b2c ldr r3, [pc, #176] ; (8000fa8 ) + 8000ef6: 2101 movs r1, #1 + 8000ef8: 430a orrs r2, r1 + 8000efa: 62da str r2, [r3, #44] ; 0x2c + 8000efc: 4b2a ldr r3, [pc, #168] ; (8000fa8 ) + 8000efe: 6adb ldr r3, [r3, #44] ; 0x2c + 8000f00: 2201 movs r2, #1 + 8000f02: 4013 ands r3, r2 + 8000f04: 60fb str r3, [r7, #12] + 8000f06: 68fb ldr r3, [r7, #12] GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10; - 8000e78: 2114 movs r1, #20 - 8000e7a: 187b adds r3, r7, r1 - 8000e7c: 22c0 movs r2, #192 ; 0xc0 - 8000e7e: 00d2 lsls r2, r2, #3 - 8000e80: 601a str r2, [r3, #0] + 8000f08: 2114 movs r1, #20 + 8000f0a: 187b adds r3, r7, r1 + 8000f0c: 22c0 movs r2, #192 ; 0xc0 + 8000f0e: 00d2 lsls r2, r2, #3 + 8000f10: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8000e82: 187b adds r3, r7, r1 - 8000e84: 2202 movs r2, #2 - 8000e86: 605a str r2, [r3, #4] + 8000f12: 187b adds r3, r7, r1 + 8000f14: 2202 movs r2, #2 + 8000f16: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000e88: 187b adds r3, r7, r1 - 8000e8a: 2200 movs r2, #0 - 8000e8c: 609a str r2, [r3, #8] + 8000f18: 187b adds r3, r7, r1 + 8000f1a: 2200 movs r2, #0 + 8000f1c: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8000e8e: 187b adds r3, r7, r1 - 8000e90: 2203 movs r2, #3 - 8000e92: 60da str r2, [r3, #12] + 8000f1e: 187b adds r3, r7, r1 + 8000f20: 2203 movs r2, #3 + 8000f22: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF4_USART1; - 8000e94: 187b adds r3, r7, r1 - 8000e96: 2204 movs r2, #4 - 8000e98: 611a str r2, [r3, #16] + 8000f24: 187b adds r3, r7, r1 + 8000f26: 2204 movs r2, #4 + 8000f28: 611a str r2, [r3, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8000e9a: 187a adds r2, r7, r1 - 8000e9c: 23a0 movs r3, #160 ; 0xa0 - 8000e9e: 05db lsls r3, r3, #23 - 8000ea0: 0011 movs r1, r2 - 8000ea2: 0018 movs r0, r3 - 8000ea4: f000 fe4e bl 8001b44 + 8000f2a: 187a adds r2, r7, r1 + 8000f2c: 23a0 movs r3, #160 ; 0xa0 + 8000f2e: 05db lsls r3, r3, #23 + 8000f30: 0011 movs r1, r2 + 8000f32: 0018 movs r0, r3 + 8000f34: f000 fe4e bl 8001bd4 hdma_usart1_rx.Instance = DMA1_Channel3; - 8000ea8: 4b1e ldr r3, [pc, #120] ; (8000f24 ) - 8000eaa: 4a1f ldr r2, [pc, #124] ; (8000f28 ) - 8000eac: 601a str r2, [r3, #0] + 8000f38: 4b1e ldr r3, [pc, #120] ; (8000fb4 ) + 8000f3a: 4a1f ldr r2, [pc, #124] ; (8000fb8 ) + 8000f3c: 601a str r2, [r3, #0] hdma_usart1_rx.Init.Request = DMA_REQUEST_3; - 8000eae: 4b1d ldr r3, [pc, #116] ; (8000f24 ) - 8000eb0: 2203 movs r2, #3 - 8000eb2: 605a str r2, [r3, #4] + 8000f3e: 4b1d ldr r3, [pc, #116] ; (8000fb4 ) + 8000f40: 2203 movs r2, #3 + 8000f42: 605a str r2, [r3, #4] hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; - 8000eb4: 4b1b ldr r3, [pc, #108] ; (8000f24 ) - 8000eb6: 2200 movs r2, #0 - 8000eb8: 609a str r2, [r3, #8] + 8000f44: 4b1b ldr r3, [pc, #108] ; (8000fb4 ) + 8000f46: 2200 movs r2, #0 + 8000f48: 609a str r2, [r3, #8] hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE; - 8000eba: 4b1a ldr r3, [pc, #104] ; (8000f24 ) - 8000ebc: 2200 movs r2, #0 - 8000ebe: 60da str r2, [r3, #12] + 8000f4a: 4b1a ldr r3, [pc, #104] ; (8000fb4 ) + 8000f4c: 2200 movs r2, #0 + 8000f4e: 60da str r2, [r3, #12] hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE; - 8000ec0: 4b18 ldr r3, [pc, #96] ; (8000f24 ) - 8000ec2: 2280 movs r2, #128 ; 0x80 - 8000ec4: 611a str r2, [r3, #16] + 8000f50: 4b18 ldr r3, [pc, #96] ; (8000fb4 ) + 8000f52: 2280 movs r2, #128 ; 0x80 + 8000f54: 611a str r2, [r3, #16] hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; - 8000ec6: 4b17 ldr r3, [pc, #92] ; (8000f24 ) - 8000ec8: 2200 movs r2, #0 - 8000eca: 615a str r2, [r3, #20] + 8000f56: 4b17 ldr r3, [pc, #92] ; (8000fb4 ) + 8000f58: 2200 movs r2, #0 + 8000f5a: 615a str r2, [r3, #20] hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; - 8000ecc: 4b15 ldr r3, [pc, #84] ; (8000f24 ) - 8000ece: 2200 movs r2, #0 - 8000ed0: 619a str r2, [r3, #24] + 8000f5c: 4b15 ldr r3, [pc, #84] ; (8000fb4 ) + 8000f5e: 2200 movs r2, #0 + 8000f60: 619a str r2, [r3, #24] hdma_usart1_rx.Init.Mode = DMA_NORMAL; - 8000ed2: 4b14 ldr r3, [pc, #80] ; (8000f24 ) - 8000ed4: 2200 movs r2, #0 - 8000ed6: 61da str r2, [r3, #28] + 8000f62: 4b14 ldr r3, [pc, #80] ; (8000fb4 ) + 8000f64: 2200 movs r2, #0 + 8000f66: 61da str r2, [r3, #28] hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW; - 8000ed8: 4b12 ldr r3, [pc, #72] ; (8000f24 ) - 8000eda: 2200 movs r2, #0 - 8000edc: 621a str r2, [r3, #32] + 8000f68: 4b12 ldr r3, [pc, #72] ; (8000fb4 ) + 8000f6a: 2200 movs r2, #0 + 8000f6c: 621a str r2, [r3, #32] if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK) - 8000ede: 4b11 ldr r3, [pc, #68] ; (8000f24 ) - 8000ee0: 0018 movs r0, r3 - 8000ee2: f000 fc81 bl 80017e8 - 8000ee6: 1e03 subs r3, r0, #0 - 8000ee8: d001 beq.n 8000eee + 8000f6e: 4b11 ldr r3, [pc, #68] ; (8000fb4 ) + 8000f70: 0018 movs r0, r3 + 8000f72: f000 fc81 bl 8001878 + 8000f76: 1e03 subs r3, r0, #0 + 8000f78: d001 beq.n 8000f7e Error_Handler(); - 8000eea: f7ff fefb bl 8000ce4 + 8000f7a: f7ff fefb bl 8000d74 __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx); - 8000eee: 687b ldr r3, [r7, #4] - 8000ef0: 4a0c ldr r2, [pc, #48] ; (8000f24 ) - 8000ef2: 675a str r2, [r3, #116] ; 0x74 - 8000ef4: 4b0b ldr r3, [pc, #44] ; (8000f24 ) - 8000ef6: 687a ldr r2, [r7, #4] - 8000ef8: 629a str r2, [r3, #40] ; 0x28 + 8000f7e: 687b ldr r3, [r7, #4] + 8000f80: 4a0c ldr r2, [pc, #48] ; (8000fb4 ) + 8000f82: 675a str r2, [r3, #116] ; 0x74 + 8000f84: 4b0b ldr r3, [pc, #44] ; (8000fb4 ) + 8000f86: 687a ldr r2, [r7, #4] + 8000f88: 629a str r2, [r3, #40] ; 0x28 HAL_NVIC_SetPriority(USART1_IRQn, 0, 0); - 8000efa: 2200 movs r2, #0 - 8000efc: 2100 movs r1, #0 - 8000efe: 201b movs r0, #27 - 8000f00: f000 fc40 bl 8001784 + 8000f8a: 2200 movs r2, #0 + 8000f8c: 2100 movs r1, #0 + 8000f8e: 201b movs r0, #27 + 8000f90: f000 fc40 bl 8001814 HAL_NVIC_EnableIRQ(USART1_IRQn); - 8000f04: 201b movs r0, #27 - 8000f06: f000 fc52 bl 80017ae + 8000f94: 201b movs r0, #27 + 8000f96: f000 fc52 bl 800183e } - 8000f0a: 46c0 nop ; (mov r8, r8) - 8000f0c: 46bd mov sp, r7 - 8000f0e: b00b add sp, #44 ; 0x2c - 8000f10: bd90 pop {r4, r7, pc} - 8000f12: 46c0 nop ; (mov r8, r8) - 8000f14: 40004800 .word 0x40004800 - 8000f18: 40021000 .word 0x40021000 - 8000f1c: 50000800 .word 0x50000800 - 8000f20: 40013800 .word 0x40013800 - 8000f24: 20000194 .word 0x20000194 - 8000f28: 40020030 .word 0x40020030 + 8000f9a: 46c0 nop ; (mov r8, r8) + 8000f9c: 46bd mov sp, r7 + 8000f9e: b00b add sp, #44 ; 0x2c + 8000fa0: bd90 pop {r4, r7, pc} + 8000fa2: 46c0 nop ; (mov r8, r8) + 8000fa4: 40004800 .word 0x40004800 + 8000fa8: 40021000 .word 0x40021000 + 8000fac: 50000800 .word 0x50000800 + 8000fb0: 40013800 .word 0x40013800 + 8000fb4: 20000194 .word 0x20000194 + 8000fb8: 40020030 .word 0x40020030 -08000f2c : +08000fbc : * This function configures the hardware resources used in this example * @param hspi: SPI handle pointer * @retval None */ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) { - 8000f2c: b590 push {r4, r7, lr} - 8000f2e: b089 sub sp, #36 ; 0x24 - 8000f30: af00 add r7, sp, #0 - 8000f32: 6078 str r0, [r7, #4] + 8000fbc: b590 push {r4, r7, lr} + 8000fbe: b089 sub sp, #36 ; 0x24 + 8000fc0: af00 add r7, sp, #0 + 8000fc2: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; - 8000f34: 240c movs r4, #12 - 8000f36: 193b adds r3, r7, r4 - 8000f38: 0018 movs r0, r3 - 8000f3a: 2314 movs r3, #20 - 8000f3c: 001a movs r2, r3 - 8000f3e: 2100 movs r1, #0 - 8000f40: f003 fe19 bl 8004b76 + 8000fc4: 240c movs r4, #12 + 8000fc6: 193b adds r3, r7, r4 + 8000fc8: 0018 movs r0, r3 + 8000fca: 2314 movs r3, #20 + 8000fcc: 001a movs r2, r3 + 8000fce: 2100 movs r1, #0 + 8000fd0: f003 fe19 bl 8004c06 if(hspi->Instance==SPI1) - 8000f44: 687b ldr r3, [r7, #4] - 8000f46: 681b ldr r3, [r3, #0] - 8000f48: 4a18 ldr r2, [pc, #96] ; (8000fac ) - 8000f4a: 4293 cmp r3, r2 - 8000f4c: d129 bne.n 8000fa2 + 8000fd4: 687b ldr r3, [r7, #4] + 8000fd6: 681b ldr r3, [r3, #0] + 8000fd8: 4a18 ldr r2, [pc, #96] ; (800103c ) + 8000fda: 4293 cmp r3, r2 + 8000fdc: d129 bne.n 8001032 { /* USER CODE BEGIN SPI1_MspInit 0 */ /* USER CODE END SPI1_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_SPI1_CLK_ENABLE(); - 8000f4e: 4b18 ldr r3, [pc, #96] ; (8000fb0 ) - 8000f50: 6b5a ldr r2, [r3, #52] ; 0x34 - 8000f52: 4b17 ldr r3, [pc, #92] ; (8000fb0 ) - 8000f54: 2180 movs r1, #128 ; 0x80 - 8000f56: 0149 lsls r1, r1, #5 - 8000f58: 430a orrs r2, r1 - 8000f5a: 635a str r2, [r3, #52] ; 0x34 + 8000fde: 4b18 ldr r3, [pc, #96] ; (8001040 ) + 8000fe0: 6b5a ldr r2, [r3, #52] ; 0x34 + 8000fe2: 4b17 ldr r3, [pc, #92] ; (8001040 ) + 8000fe4: 2180 movs r1, #128 ; 0x80 + 8000fe6: 0149 lsls r1, r1, #5 + 8000fe8: 430a orrs r2, r1 + 8000fea: 635a str r2, [r3, #52] ; 0x34 __HAL_RCC_GPIOA_CLK_ENABLE(); - 8000f5c: 4b14 ldr r3, [pc, #80] ; (8000fb0 ) - 8000f5e: 6ada ldr r2, [r3, #44] ; 0x2c - 8000f60: 4b13 ldr r3, [pc, #76] ; (8000fb0 ) - 8000f62: 2101 movs r1, #1 - 8000f64: 430a orrs r2, r1 - 8000f66: 62da str r2, [r3, #44] ; 0x2c - 8000f68: 4b11 ldr r3, [pc, #68] ; (8000fb0 ) - 8000f6a: 6adb ldr r3, [r3, #44] ; 0x2c - 8000f6c: 2201 movs r2, #1 - 8000f6e: 4013 ands r3, r2 - 8000f70: 60bb str r3, [r7, #8] - 8000f72: 68bb ldr r3, [r7, #8] + 8000fec: 4b14 ldr r3, [pc, #80] ; (8001040 ) + 8000fee: 6ada ldr r2, [r3, #44] ; 0x2c + 8000ff0: 4b13 ldr r3, [pc, #76] ; (8001040 ) + 8000ff2: 2101 movs r1, #1 + 8000ff4: 430a orrs r2, r1 + 8000ff6: 62da str r2, [r3, #44] ; 0x2c + 8000ff8: 4b11 ldr r3, [pc, #68] ; (8001040 ) + 8000ffa: 6adb ldr r3, [r3, #44] ; 0x2c + 8000ffc: 2201 movs r2, #1 + 8000ffe: 4013 ands r3, r2 + 8001000: 60bb str r3, [r7, #8] + 8001002: 68bb ldr r3, [r7, #8] PA4 ------> SPI1_NSS PA5 ------> SPI1_SCK PA6 ------> SPI1_MISO PA7 ------> SPI1_MOSI */ GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; - 8000f74: 0021 movs r1, r4 - 8000f76: 187b adds r3, r7, r1 - 8000f78: 22f0 movs r2, #240 ; 0xf0 - 8000f7a: 601a str r2, [r3, #0] + 8001004: 0021 movs r1, r4 + 8001006: 187b adds r3, r7, r1 + 8001008: 22f0 movs r2, #240 ; 0xf0 + 800100a: 601a str r2, [r3, #0] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; - 8000f7c: 187b adds r3, r7, r1 - 8000f7e: 2202 movs r2, #2 - 8000f80: 605a str r2, [r3, #4] + 800100c: 187b adds r3, r7, r1 + 800100e: 2202 movs r2, #2 + 8001010: 605a str r2, [r3, #4] GPIO_InitStruct.Pull = GPIO_NOPULL; - 8000f82: 187b adds r3, r7, r1 - 8000f84: 2200 movs r2, #0 - 8000f86: 609a str r2, [r3, #8] + 8001012: 187b adds r3, r7, r1 + 8001014: 2200 movs r2, #0 + 8001016: 609a str r2, [r3, #8] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - 8000f88: 187b adds r3, r7, r1 - 8000f8a: 2203 movs r2, #3 - 8000f8c: 60da str r2, [r3, #12] + 8001018: 187b adds r3, r7, r1 + 800101a: 2203 movs r2, #3 + 800101c: 60da str r2, [r3, #12] GPIO_InitStruct.Alternate = GPIO_AF0_SPI1; - 8000f8e: 187b adds r3, r7, r1 - 8000f90: 2200 movs r2, #0 - 8000f92: 611a str r2, [r3, #16] + 800101e: 187b adds r3, r7, r1 + 8001020: 2200 movs r2, #0 + 8001022: 611a str r2, [r3, #16] HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 8000f94: 187a adds r2, r7, r1 - 8000f96: 23a0 movs r3, #160 ; 0xa0 - 8000f98: 05db lsls r3, r3, #23 - 8000f9a: 0011 movs r1, r2 - 8000f9c: 0018 movs r0, r3 - 8000f9e: f000 fdd1 bl 8001b44 + 8001024: 187a adds r2, r7, r1 + 8001026: 23a0 movs r3, #160 ; 0xa0 + 8001028: 05db lsls r3, r3, #23 + 800102a: 0011 movs r1, r2 + 800102c: 0018 movs r0, r3 + 800102e: f000 fdd1 bl 8001bd4 /* USER CODE BEGIN SPI1_MspInit 1 */ /* USER CODE END SPI1_MspInit 1 */ } } - 8000fa2: 46c0 nop ; (mov r8, r8) - 8000fa4: 46bd mov sp, r7 - 8000fa6: b009 add sp, #36 ; 0x24 - 8000fa8: bd90 pop {r4, r7, pc} - 8000faa: 46c0 nop ; (mov r8, r8) - 8000fac: 40013000 .word 0x40013000 - 8000fb0: 40021000 .word 0x40021000 + 8001032: 46c0 nop ; (mov r8, r8) + 8001034: 46bd mov sp, r7 + 8001036: b009 add sp, #36 ; 0x24 + 8001038: bd90 pop {r4, r7, pc} + 800103a: 46c0 nop ; (mov r8, r8) + 800103c: 40013000 .word 0x40013000 + 8001040: 40021000 .word 0x40021000 -08000fb4 : +08001044 : * This function configures the hardware resources used in this example * @param htim_base: TIM_Base handle pointer * @retval None */ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) { - 8000fb4: b580 push {r7, lr} - 8000fb6: b082 sub sp, #8 - 8000fb8: af00 add r7, sp, #0 - 8000fba: 6078 str r0, [r7, #4] + 8001044: b580 push {r7, lr} + 8001046: b082 sub sp, #8 + 8001048: af00 add r7, sp, #0 + 800104a: 6078 str r0, [r7, #4] if(htim_base->Instance==TIM21) - 8000fbc: 687b ldr r3, [r7, #4] - 8000fbe: 681b ldr r3, [r3, #0] - 8000fc0: 4a0a ldr r2, [pc, #40] ; (8000fec ) - 8000fc2: 4293 cmp r3, r2 - 8000fc4: d10d bne.n 8000fe2 + 800104c: 687b ldr r3, [r7, #4] + 800104e: 681b ldr r3, [r3, #0] + 8001050: 4a0a ldr r2, [pc, #40] ; (800107c ) + 8001052: 4293 cmp r3, r2 + 8001054: d10d bne.n 8001072 { /* USER CODE BEGIN TIM21_MspInit 0 */ /* USER CODE END TIM21_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_TIM21_CLK_ENABLE(); - 8000fc6: 4b0a ldr r3, [pc, #40] ; (8000ff0 ) - 8000fc8: 6b5a ldr r2, [r3, #52] ; 0x34 - 8000fca: 4b09 ldr r3, [pc, #36] ; (8000ff0 ) - 8000fcc: 2104 movs r1, #4 - 8000fce: 430a orrs r2, r1 - 8000fd0: 635a str r2, [r3, #52] ; 0x34 + 8001056: 4b0a ldr r3, [pc, #40] ; (8001080 ) + 8001058: 6b5a ldr r2, [r3, #52] ; 0x34 + 800105a: 4b09 ldr r3, [pc, #36] ; (8001080 ) + 800105c: 2104 movs r1, #4 + 800105e: 430a orrs r2, r1 + 8001060: 635a str r2, [r3, #52] ; 0x34 /* TIM21 interrupt Init */ HAL_NVIC_SetPriority(TIM21_IRQn, 0, 0); - 8000fd2: 2200 movs r2, #0 - 8000fd4: 2100 movs r1, #0 - 8000fd6: 2014 movs r0, #20 - 8000fd8: f000 fbd4 bl 8001784 + 8001062: 2200 movs r2, #0 + 8001064: 2100 movs r1, #0 + 8001066: 2014 movs r0, #20 + 8001068: f000 fbd4 bl 8001814 HAL_NVIC_EnableIRQ(TIM21_IRQn); - 8000fdc: 2014 movs r0, #20 - 8000fde: f000 fbe6 bl 80017ae + 800106c: 2014 movs r0, #20 + 800106e: f000 fbe6 bl 800183e /* USER CODE BEGIN TIM21_MspInit 1 */ /* USER CODE END TIM21_MspInit 1 */ } } - 8000fe2: 46c0 nop ; (mov r8, r8) - 8000fe4: 46bd mov sp, r7 - 8000fe6: b002 add sp, #8 - 8000fe8: bd80 pop {r7, pc} - 8000fea: 46c0 nop ; (mov r8, r8) - 8000fec: 40010800 .word 0x40010800 - 8000ff0: 40021000 .word 0x40021000 + 8001072: 46c0 nop ; (mov r8, r8) + 8001074: 46bd mov sp, r7 + 8001076: b002 add sp, #8 + 8001078: bd80 pop {r7, pc} + 800107a: 46c0 nop ; (mov r8, r8) + 800107c: 40010800 .word 0x40010800 + 8001080: 40021000 .word 0x40021000 -08000ff4 : +08001084 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { - 8000ff4: b580 push {r7, lr} - 8000ff6: af00 add r7, sp, #0 + 8001084: b580 push {r7, lr} + 8001086: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ HAL_RCC_NMI_IRQHandler(); - 8000ff8: f001 fd72 bl 8002ae0 + 8001088: f001 fd72 bl 8002b70 /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) - 8000ffc: e7fe b.n 8000ffc + 800108c: e7fe b.n 800108c -08000ffe : +0800108e : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { - 8000ffe: b580 push {r7, lr} - 8001000: af00 add r7, sp, #0 + 800108e: b580 push {r7, lr} + 8001090: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) - 8001002: e7fe b.n 8001002 + 8001092: e7fe b.n 8001092 -08001004 : +08001094 : /** * @brief This function handles System service call via SWI instruction. */ void SVC_Handler(void) { - 8001004: b580 push {r7, lr} - 8001006: af00 add r7, sp, #0 + 8001094: b580 push {r7, lr} + 8001096: af00 add r7, sp, #0 /* USER CODE END SVC_IRQn 0 */ /* USER CODE BEGIN SVC_IRQn 1 */ /* USER CODE END SVC_IRQn 1 */ } - 8001008: 46c0 nop ; (mov r8, r8) - 800100a: 46bd mov sp, r7 - 800100c: bd80 pop {r7, pc} + 8001098: 46c0 nop ; (mov r8, r8) + 800109a: 46bd mov sp, r7 + 800109c: bd80 pop {r7, pc} -0800100e : +0800109e : /** * @brief This function handles Pendable request for system service. */ void PendSV_Handler(void) { - 800100e: b580 push {r7, lr} - 8001010: af00 add r7, sp, #0 + 800109e: b580 push {r7, lr} + 80010a0: af00 add r7, sp, #0 /* USER CODE END PendSV_IRQn 0 */ /* USER CODE BEGIN PendSV_IRQn 1 */ /* USER CODE END PendSV_IRQn 1 */ } - 8001012: 46c0 nop ; (mov r8, r8) - 8001014: 46bd mov sp, r7 - 8001016: bd80 pop {r7, pc} + 80010a2: 46c0 nop ; (mov r8, r8) + 80010a4: 46bd mov sp, r7 + 80010a6: bd80 pop {r7, pc} -08001018 : +080010a8 : /** * @brief This function handles System tick timer. */ void SysTick_Handler(void) { - 8001018: b580 push {r7, lr} - 800101a: af00 add r7, sp, #0 + 80010a8: b580 push {r7, lr} + 80010aa: af00 add r7, sp, #0 /* USER CODE BEGIN SysTick_IRQn 0 */ /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); - 800101c: f000 f8ac bl 8001178 + 80010ac: f000 f8ac bl 8001208 /* USER CODE BEGIN SysTick_IRQn 1 */ /* USER CODE END SysTick_IRQn 1 */ } - 8001020: 46c0 nop ; (mov r8, r8) - 8001022: 46bd mov sp, r7 - 8001024: bd80 pop {r7, pc} + 80010b0: 46c0 nop ; (mov r8, r8) + 80010b2: 46bd mov sp, r7 + 80010b4: bd80 pop {r7, pc} ... -08001028 : +080010b8 : /** * @brief This function handles DMA1 channel 2 and channel 3 interrupts. */ void DMA1_Channel2_3_IRQHandler(void) { - 8001028: b580 push {r7, lr} - 800102a: af00 add r7, sp, #0 + 80010b8: b580 push {r7, lr} + 80010ba: af00 add r7, sp, #0 /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */ /* USER CODE END DMA1_Channel2_3_IRQn 0 */ HAL_DMA_IRQHandler(&hdma_usart1_rx); - 800102c: 4b03 ldr r3, [pc, #12] ; (800103c ) - 800102e: 0018 movs r0, r3 - 8001030: f000 fcd9 bl 80019e6 + 80010bc: 4b03 ldr r3, [pc, #12] ; (80010cc ) + 80010be: 0018 movs r0, r3 + 80010c0: f000 fcd9 bl 8001a76 /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */ /* USER CODE END DMA1_Channel2_3_IRQn 1 */ } - 8001034: 46c0 nop ; (mov r8, r8) - 8001036: 46bd mov sp, r7 - 8001038: bd80 pop {r7, pc} - 800103a: 46c0 nop ; (mov r8, r8) - 800103c: 20000194 .word 0x20000194 + 80010c4: 46c0 nop ; (mov r8, r8) + 80010c6: 46bd mov sp, r7 + 80010c8: bd80 pop {r7, pc} + 80010ca: 46c0 nop ; (mov r8, r8) + 80010cc: 20000194 .word 0x20000194 -08001040 : +080010d0 : /** * @brief This function handles TIM21 global interrupt. */ void TIM21_IRQHandler(void) { - 8001040: b580 push {r7, lr} - 8001042: af00 add r7, sp, #0 + 80010d0: b580 push {r7, lr} + 80010d2: af00 add r7, sp, #0 /* USER CODE BEGIN TIM21_IRQn 0 */ /* USER CODE END TIM21_IRQn 0 */ HAL_TIM_IRQHandler(&htim21); - 8001044: 4b03 ldr r3, [pc, #12] ; (8001054 ) - 8001046: 0018 movs r0, r3 - 8001048: f001 ff74 bl 8002f34 + 80010d4: 4b03 ldr r3, [pc, #12] ; (80010e4 ) + 80010d6: 0018 movs r0, r3 + 80010d8: f001 ff74 bl 8002fc4 /* USER CODE BEGIN TIM21_IRQn 1 */ /* USER CODE END TIM21_IRQn 1 */ } - 800104c: 46c0 nop ; (mov r8, r8) - 800104e: 46bd mov sp, r7 - 8001050: bd80 pop {r7, pc} - 8001052: 46c0 nop ; (mov r8, r8) - 8001054: 20000234 .word 0x20000234 + 80010dc: 46c0 nop ; (mov r8, r8) + 80010de: 46bd mov sp, r7 + 80010e0: bd80 pop {r7, pc} + 80010e2: 46c0 nop ; (mov r8, r8) + 80010e4: 20000234 .word 0x20000234 -08001058 : +080010e8 : /** * @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25. */ void USART1_IRQHandler(void) { - 8001058: b580 push {r7, lr} - 800105a: af00 add r7, sp, #0 + 80010e8: b580 push {r7, lr} + 80010ea: af00 add r7, sp, #0 /* USER CODE BEGIN USART1_IRQn 0 */ /* USER CODE END USART1_IRQn 0 */ HAL_UART_IRQHandler(&huart1); - 800105c: 4b03 ldr r3, [pc, #12] ; (800106c ) - 800105e: 0018 movs r0, r3 - 8001060: f002 fcdc bl 8003a1c + 80010ec: 4b03 ldr r3, [pc, #12] ; (80010fc ) + 80010ee: 0018 movs r0, r3 + 80010f0: f002 fcdc bl 8003aac /* USER CODE BEGIN USART1_IRQn 1 */ /* USER CODE END USART1_IRQn 1 */ } - 8001064: 46c0 nop ; (mov r8, r8) - 8001066: 46bd mov sp, r7 - 8001068: bd80 pop {r7, pc} - 800106a: 46c0 nop ; (mov r8, r8) - 800106c: 2000010c .word 0x2000010c + 80010f4: 46c0 nop ; (mov r8, r8) + 80010f6: 46bd mov sp, r7 + 80010f8: bd80 pop {r7, pc} + 80010fa: 46c0 nop ; (mov r8, r8) + 80010fc: 2000010c .word 0x2000010c -08001070 : +08001100 : * @brief Setup the microcontroller system. * @param None * @retval None */ void SystemInit (void) { - 8001070: b580 push {r7, lr} - 8001072: af00 add r7, sp, #0 + 8001100: b580 push {r7, lr} + 8001102: af00 add r7, sp, #0 /* Configure the Vector Table location add offset address ------------------*/ #if defined (USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #endif /* USER_VECT_TAB_ADDRESS */ } - 8001074: 46c0 nop ; (mov r8, r8) - 8001076: 46bd mov sp, r7 - 8001078: bd80 pop {r7, pc} + 8001104: 46c0 nop ; (mov r8, r8) + 8001106: 46bd mov sp, r7 + 8001108: bd80 pop {r7, pc} ... -0800107c : +0800110c : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr r0, =_estack - 800107c: 480d ldr r0, [pc, #52] ; (80010b4 ) + 800110c: 480d ldr r0, [pc, #52] ; (8001144 ) mov sp, r0 /* set stack pointer */ - 800107e: 4685 mov sp, r0 + 800110e: 4685 mov sp, r0 /* Call the clock system initialization function.*/ bl SystemInit - 8001080: f7ff fff6 bl 8001070 + 8001110: f7ff fff6 bl 8001100 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata - 8001084: 480c ldr r0, [pc, #48] ; (80010b8 ) + 8001114: 480c ldr r0, [pc, #48] ; (8001148 ) ldr r1, =_edata - 8001086: 490d ldr r1, [pc, #52] ; (80010bc ) + 8001116: 490d ldr r1, [pc, #52] ; (800114c ) ldr r2, =_sidata - 8001088: 4a0d ldr r2, [pc, #52] ; (80010c0 ) + 8001118: 4a0d ldr r2, [pc, #52] ; (8001150 ) movs r3, #0 - 800108a: 2300 movs r3, #0 + 800111a: 2300 movs r3, #0 b LoopCopyDataInit - 800108c: e002 b.n 8001094 + 800111c: e002 b.n 8001124 -0800108e : +0800111e : CopyDataInit: ldr r4, [r2, r3] - 800108e: 58d4 ldr r4, [r2, r3] + 800111e: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] - 8001090: 50c4 str r4, [r0, r3] + 8001120: 50c4 str r4, [r0, r3] adds r3, r3, #4 - 8001092: 3304 adds r3, #4 + 8001122: 3304 adds r3, #4 -08001094 : +08001124 : LoopCopyDataInit: adds r4, r0, r3 - 8001094: 18c4 adds r4, r0, r3 + 8001124: 18c4 adds r4, r0, r3 cmp r4, r1 - 8001096: 428c cmp r4, r1 + 8001126: 428c cmp r4, r1 bcc CopyDataInit - 8001098: d3f9 bcc.n 800108e + 8001128: d3f9 bcc.n 800111e /* Zero fill the bss segment. */ ldr r2, =_sbss - 800109a: 4a0a ldr r2, [pc, #40] ; (80010c4 ) + 800112a: 4a0a ldr r2, [pc, #40] ; (8001154 ) ldr r4, =_ebss - 800109c: 4c0a ldr r4, [pc, #40] ; (80010c8 ) + 800112c: 4c0a ldr r4, [pc, #40] ; (8001158 ) movs r3, #0 - 800109e: 2300 movs r3, #0 + 800112e: 2300 movs r3, #0 b LoopFillZerobss - 80010a0: e001 b.n 80010a6 + 8001130: e001 b.n 8001136 -080010a2 : +08001132 : FillZerobss: str r3, [r2] - 80010a2: 6013 str r3, [r2, #0] + 8001132: 6013 str r3, [r2, #0] adds r2, r2, #4 - 80010a4: 3204 adds r2, #4 + 8001134: 3204 adds r2, #4 -080010a6 : +08001136 : LoopFillZerobss: cmp r2, r4 - 80010a6: 42a2 cmp r2, r4 + 8001136: 42a2 cmp r2, r4 bcc FillZerobss - 80010a8: d3fb bcc.n 80010a2 + 8001138: d3fb bcc.n 8001132 /* Call static constructors */ bl __libc_init_array - 80010aa: f003 fd6d bl 8004b88 <__libc_init_array> + 800113a: f003 fd6d bl 8004c18 <__libc_init_array> /* Call the application's entry point.*/ bl main - 80010ae: f7ff fa65 bl 800057c
+ 800113e: f7ff fa1d bl 800057c
-080010b2 : +08001142 : LoopForever: b LoopForever - 80010b2: e7fe b.n 80010b2 + 8001142: e7fe b.n 8001142 ldr r0, =_estack - 80010b4: 20002000 .word 0x20002000 + 8001144: 20002000 .word 0x20002000 ldr r0, =_sdata - 80010b8: 20000000 .word 0x20000000 + 8001148: 20000000 .word 0x20000000 ldr r1, =_edata - 80010bc: 2000000c .word 0x2000000c + 800114c: 2000000c .word 0x2000000c ldr r2, =_sidata - 80010c0: 08004c6c .word 0x08004c6c + 8001150: 08004cfc .word 0x08004cfc ldr r2, =_sbss - 80010c4: 2000000c .word 0x2000000c + 8001154: 2000000c .word 0x2000000c ldr r4, =_ebss - 80010c8: 20000278 .word 0x20000278 + 8001158: 20000278 .word 0x20000278 -080010cc : +0800115c : * @retval : None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop - 80010cc: e7fe b.n 80010cc + 800115c: e7fe b.n 800115c ... -080010d0 : +08001160 : * In the default implementation,Systick is used as source of time base. * the tick variable is incremented each 1ms in its ISR. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { - 80010d0: b580 push {r7, lr} - 80010d2: b082 sub sp, #8 - 80010d4: af00 add r7, sp, #0 + 8001160: b580 push {r7, lr} + 8001162: b082 sub sp, #8 + 8001164: af00 add r7, sp, #0 HAL_StatusTypeDef status = HAL_OK; - 80010d6: 1dfb adds r3, r7, #7 - 80010d8: 2200 movs r2, #0 - 80010da: 701a strb r2, [r3, #0] + 8001166: 1dfb adds r3, r7, #7 + 8001168: 2200 movs r2, #0 + 800116a: 701a strb r2, [r3, #0] #if (BUFFER_CACHE_DISABLE != 0) __HAL_FLASH_BUFFER_CACHE_DISABLE(); #endif /* BUFFER_CACHE_DISABLE */ #if (PREREAD_ENABLE != 0) __HAL_FLASH_PREREAD_BUFFER_ENABLE(); - 80010dc: 4b0b ldr r3, [pc, #44] ; (800110c ) - 80010de: 681a ldr r2, [r3, #0] - 80010e0: 4b0a ldr r3, [pc, #40] ; (800110c ) - 80010e2: 2140 movs r1, #64 ; 0x40 - 80010e4: 430a orrs r2, r1 - 80010e6: 601a str r2, [r3, #0] + 800116c: 4b0b ldr r3, [pc, #44] ; (800119c ) + 800116e: 681a ldr r2, [r3, #0] + 8001170: 4b0a ldr r3, [pc, #40] ; (800119c ) + 8001172: 2140 movs r1, #64 ; 0x40 + 8001174: 430a orrs r2, r1 + 8001176: 601a str r2, [r3, #0] #if (PREFETCH_ENABLE != 0) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); #endif /* PREFETCH_ENABLE */ /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */ if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK) - 80010e8: 2003 movs r0, #3 - 80010ea: f000 f811 bl 8001110 - 80010ee: 1e03 subs r3, r0, #0 - 80010f0: d003 beq.n 80010fa + 8001178: 2003 movs r0, #3 + 800117a: f000 f811 bl 80011a0 + 800117e: 1e03 subs r3, r0, #0 + 8001180: d003 beq.n 800118a { status = HAL_ERROR; - 80010f2: 1dfb adds r3, r7, #7 - 80010f4: 2201 movs r2, #1 - 80010f6: 701a strb r2, [r3, #0] - 80010f8: e001 b.n 80010fe + 8001182: 1dfb adds r3, r7, #7 + 8001184: 2201 movs r2, #1 + 8001186: 701a strb r2, [r3, #0] + 8001188: e001 b.n 800118e } else { /* Init the low level hardware */ HAL_MspInit(); - 80010fa: f7ff fdf9 bl 8000cf0 + 800118a: f7ff fdf9 bl 8000d80 } /* Return function status */ return status; - 80010fe: 1dfb adds r3, r7, #7 - 8001100: 781b ldrb r3, [r3, #0] + 800118e: 1dfb adds r3, r7, #7 + 8001190: 781b ldrb r3, [r3, #0] } - 8001102: 0018 movs r0, r3 - 8001104: 46bd mov sp, r7 - 8001106: b002 add sp, #8 - 8001108: bd80 pop {r7, pc} - 800110a: 46c0 nop ; (mov r8, r8) - 800110c: 40022000 .word 0x40022000 + 8001192: 0018 movs r0, r3 + 8001194: 46bd mov sp, r7 + 8001196: b002 add sp, #8 + 8001198: bd80 pop {r7, pc} + 800119a: 46c0 nop ; (mov r8, r8) + 800119c: 40022000 .word 0x40022000 -08001110 : +080011a0 : * implementation in user file. * @param TickPriority Tick interrupt priority. * @retval HAL status */ __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { - 8001110: b590 push {r4, r7, lr} - 8001112: b083 sub sp, #12 - 8001114: af00 add r7, sp, #0 - 8001116: 6078 str r0, [r7, #4] + 80011a0: b590 push {r4, r7, lr} + 80011a2: b083 sub sp, #12 + 80011a4: af00 add r7, sp, #0 + 80011a6: 6078 str r0, [r7, #4] /* Configure the SysTick to have interrupt in 1ms time basis*/ if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) - 8001118: 4b14 ldr r3, [pc, #80] ; (800116c ) - 800111a: 681c ldr r4, [r3, #0] - 800111c: 4b14 ldr r3, [pc, #80] ; (8001170 ) - 800111e: 781b ldrb r3, [r3, #0] - 8001120: 0019 movs r1, r3 - 8001122: 23fa movs r3, #250 ; 0xfa - 8001124: 0098 lsls r0, r3, #2 - 8001126: f7fe ffef bl 8000108 <__udivsi3> - 800112a: 0003 movs r3, r0 - 800112c: 0019 movs r1, r3 - 800112e: 0020 movs r0, r4 - 8001130: f7fe ffea bl 8000108 <__udivsi3> - 8001134: 0003 movs r3, r0 - 8001136: 0018 movs r0, r3 - 8001138: f000 fb49 bl 80017ce - 800113c: 1e03 subs r3, r0, #0 - 800113e: d001 beq.n 8001144 + 80011a8: 4b14 ldr r3, [pc, #80] ; (80011fc ) + 80011aa: 681c ldr r4, [r3, #0] + 80011ac: 4b14 ldr r3, [pc, #80] ; (8001200 ) + 80011ae: 781b ldrb r3, [r3, #0] + 80011b0: 0019 movs r1, r3 + 80011b2: 23fa movs r3, #250 ; 0xfa + 80011b4: 0098 lsls r0, r3, #2 + 80011b6: f7fe ffa7 bl 8000108 <__udivsi3> + 80011ba: 0003 movs r3, r0 + 80011bc: 0019 movs r1, r3 + 80011be: 0020 movs r0, r4 + 80011c0: f7fe ffa2 bl 8000108 <__udivsi3> + 80011c4: 0003 movs r3, r0 + 80011c6: 0018 movs r0, r3 + 80011c8: f000 fb49 bl 800185e + 80011cc: 1e03 subs r3, r0, #0 + 80011ce: d001 beq.n 80011d4 { return HAL_ERROR; - 8001140: 2301 movs r3, #1 - 8001142: e00f b.n 8001164 + 80011d0: 2301 movs r3, #1 + 80011d2: e00f b.n 80011f4 } /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) - 8001144: 687b ldr r3, [r7, #4] - 8001146: 2b03 cmp r3, #3 - 8001148: d80b bhi.n 8001162 + 80011d4: 687b ldr r3, [r7, #4] + 80011d6: 2b03 cmp r3, #3 + 80011d8: d80b bhi.n 80011f2 { HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); - 800114a: 6879 ldr r1, [r7, #4] - 800114c: 2301 movs r3, #1 - 800114e: 425b negs r3, r3 - 8001150: 2200 movs r2, #0 - 8001152: 0018 movs r0, r3 - 8001154: f000 fb16 bl 8001784 + 80011da: 6879 ldr r1, [r7, #4] + 80011dc: 2301 movs r3, #1 + 80011de: 425b negs r3, r3 + 80011e0: 2200 movs r2, #0 + 80011e2: 0018 movs r0, r3 + 80011e4: f000 fb16 bl 8001814 uwTickPrio = TickPriority; - 8001158: 4b06 ldr r3, [pc, #24] ; (8001174 ) - 800115a: 687a ldr r2, [r7, #4] - 800115c: 601a str r2, [r3, #0] + 80011e8: 4b06 ldr r3, [pc, #24] ; (8001204 ) + 80011ea: 687a ldr r2, [r7, #4] + 80011ec: 601a str r2, [r3, #0] { return HAL_ERROR; } /* Return function status */ return HAL_OK; - 800115e: 2300 movs r3, #0 - 8001160: e000 b.n 8001164 + 80011ee: 2300 movs r3, #0 + 80011f0: e000 b.n 80011f4 return HAL_ERROR; - 8001162: 2301 movs r3, #1 + 80011f2: 2301 movs r3, #1 } - 8001164: 0018 movs r0, r3 - 8001166: 46bd mov sp, r7 - 8001168: b003 add sp, #12 - 800116a: bd90 pop {r4, r7, pc} - 800116c: 20000000 .word 0x20000000 - 8001170: 20000008 .word 0x20000008 - 8001174: 20000004 .word 0x20000004 + 80011f4: 0018 movs r0, r3 + 80011f6: 46bd mov sp, r7 + 80011f8: b003 add sp, #12 + 80011fa: bd90 pop {r4, r7, pc} + 80011fc: 20000000 .word 0x20000000 + 8001200: 20000008 .word 0x20000008 + 8001204: 20000004 .word 0x20000004 -08001178 : +08001208 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { - 8001178: b580 push {r7, lr} - 800117a: af00 add r7, sp, #0 + 8001208: b580 push {r7, lr} + 800120a: af00 add r7, sp, #0 uwTick += uwTickFreq; - 800117c: 4b05 ldr r3, [pc, #20] ; (8001194 ) - 800117e: 781b ldrb r3, [r3, #0] - 8001180: 001a movs r2, r3 - 8001182: 4b05 ldr r3, [pc, #20] ; (8001198 ) - 8001184: 681b ldr r3, [r3, #0] - 8001186: 18d2 adds r2, r2, r3 - 8001188: 4b03 ldr r3, [pc, #12] ; (8001198 ) - 800118a: 601a str r2, [r3, #0] + 800120c: 4b05 ldr r3, [pc, #20] ; (8001224 ) + 800120e: 781b ldrb r3, [r3, #0] + 8001210: 001a movs r2, r3 + 8001212: 4b05 ldr r3, [pc, #20] ; (8001228 ) + 8001214: 681b ldr r3, [r3, #0] + 8001216: 18d2 adds r2, r2, r3 + 8001218: 4b03 ldr r3, [pc, #12] ; (8001228 ) + 800121a: 601a str r2, [r3, #0] } - 800118c: 46c0 nop ; (mov r8, r8) - 800118e: 46bd mov sp, r7 - 8001190: bd80 pop {r7, pc} - 8001192: 46c0 nop ; (mov r8, r8) - 8001194: 20000008 .word 0x20000008 - 8001198: 20000274 .word 0x20000274 + 800121c: 46c0 nop ; (mov r8, r8) + 800121e: 46bd mov sp, r7 + 8001220: bd80 pop {r7, pc} + 8001222: 46c0 nop ; (mov r8, r8) + 8001224: 20000008 .word 0x20000008 + 8001228: 20000274 .word 0x20000274 -0800119c : +0800122c : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { - 800119c: b580 push {r7, lr} - 800119e: af00 add r7, sp, #0 + 800122c: b580 push {r7, lr} + 800122e: af00 add r7, sp, #0 return uwTick; - 80011a0: 4b02 ldr r3, [pc, #8] ; (80011ac ) - 80011a2: 681b ldr r3, [r3, #0] + 8001230: 4b02 ldr r3, [pc, #8] ; (800123c ) + 8001232: 681b ldr r3, [r3, #0] } - 80011a4: 0018 movs r0, r3 - 80011a6: 46bd mov sp, r7 - 80011a8: bd80 pop {r7, pc} - 80011aa: 46c0 nop ; (mov r8, r8) - 80011ac: 20000274 .word 0x20000274 + 8001234: 0018 movs r0, r3 + 8001236: 46bd mov sp, r7 + 8001238: bd80 pop {r7, pc} + 800123a: 46c0 nop ; (mov r8, r8) + 800123c: 20000274 .word 0x20000274 -080011b0 : +08001240 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { - 80011b0: b580 push {r7, lr} - 80011b2: b084 sub sp, #16 - 80011b4: af00 add r7, sp, #0 - 80011b6: 6078 str r0, [r7, #4] + 8001240: b580 push {r7, lr} + 8001242: b084 sub sp, #16 + 8001244: af00 add r7, sp, #0 + 8001246: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); - 80011b8: f7ff fff0 bl 800119c - 80011bc: 0003 movs r3, r0 - 80011be: 60bb str r3, [r7, #8] + 8001248: f7ff fff0 bl 800122c + 800124c: 0003 movs r3, r0 + 800124e: 60bb str r3, [r7, #8] uint32_t wait = Delay; - 80011c0: 687b ldr r3, [r7, #4] - 80011c2: 60fb str r3, [r7, #12] + 8001250: 687b ldr r3, [r7, #4] + 8001252: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) - 80011c4: 68fb ldr r3, [r7, #12] - 80011c6: 3301 adds r3, #1 - 80011c8: d005 beq.n 80011d6 + 8001254: 68fb ldr r3, [r7, #12] + 8001256: 3301 adds r3, #1 + 8001258: d005 beq.n 8001266 { wait += (uint32_t)(uwTickFreq); - 80011ca: 4b0a ldr r3, [pc, #40] ; (80011f4 ) - 80011cc: 781b ldrb r3, [r3, #0] - 80011ce: 001a movs r2, r3 - 80011d0: 68fb ldr r3, [r7, #12] - 80011d2: 189b adds r3, r3, r2 - 80011d4: 60fb str r3, [r7, #12] + 800125a: 4b0a ldr r3, [pc, #40] ; (8001284 ) + 800125c: 781b ldrb r3, [r3, #0] + 800125e: 001a movs r2, r3 + 8001260: 68fb ldr r3, [r7, #12] + 8001262: 189b adds r3, r3, r2 + 8001264: 60fb str r3, [r7, #12] } while((HAL_GetTick() - tickstart) < wait) - 80011d6: 46c0 nop ; (mov r8, r8) - 80011d8: f7ff ffe0 bl 800119c - 80011dc: 0002 movs r2, r0 - 80011de: 68bb ldr r3, [r7, #8] - 80011e0: 1ad3 subs r3, r2, r3 - 80011e2: 68fa ldr r2, [r7, #12] - 80011e4: 429a cmp r2, r3 - 80011e6: d8f7 bhi.n 80011d8 + 8001266: 46c0 nop ; (mov r8, r8) + 8001268: f7ff ffe0 bl 800122c + 800126c: 0002 movs r2, r0 + 800126e: 68bb ldr r3, [r7, #8] + 8001270: 1ad3 subs r3, r2, r3 + 8001272: 68fa ldr r2, [r7, #12] + 8001274: 429a cmp r2, r3 + 8001276: d8f7 bhi.n 8001268 { } } - 80011e8: 46c0 nop ; (mov r8, r8) - 80011ea: 46c0 nop ; (mov r8, r8) - 80011ec: 46bd mov sp, r7 - 80011ee: b004 add sp, #16 - 80011f0: bd80 pop {r7, pc} - 80011f2: 46c0 nop ; (mov r8, r8) - 80011f4: 20000008 .word 0x20000008 + 8001278: 46c0 nop ; (mov r8, r8) + 800127a: 46c0 nop ; (mov r8, r8) + 800127c: 46bd mov sp, r7 + 800127e: b004 add sp, #16 + 8001280: bd80 pop {r7, pc} + 8001282: 46c0 nop ; (mov r8, r8) + 8001284: 20000008 .word 0x20000008 -080011f8 : +08001288 : * function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly. * @param hadc ADC handle * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc) { - 80011f8: b580 push {r7, lr} - 80011fa: b082 sub sp, #8 - 80011fc: af00 add r7, sp, #0 - 80011fe: 6078 str r0, [r7, #4] + 8001288: b580 push {r7, lr} + 800128a: b082 sub sp, #8 + 800128c: af00 add r7, sp, #0 + 800128e: 6078 str r0, [r7, #4] /* Check ADC handle */ if (hadc == NULL) - 8001200: 687b ldr r3, [r7, #4] - 8001202: 2b00 cmp r3, #0 - 8001204: d101 bne.n 800120a + 8001290: 687b ldr r3, [r7, #4] + 8001292: 2b00 cmp r3, #0 + 8001294: d101 bne.n 800129a { return HAL_ERROR; - 8001206: 2301 movs r3, #1 - 8001208: e159 b.n 80014be + 8001296: 2301 movs r3, #1 + 8001298: e159 b.n 800154e /* Refer to header of this file for more details on clock enabling procedure*/ /* Actions performed only if ADC is coming from state reset: */ /* - Initialization of ADC MSP */ /* - ADC voltage regulator enable */ if (hadc->State == HAL_ADC_STATE_RESET) - 800120a: 687b ldr r3, [r7, #4] - 800120c: 6d5b ldr r3, [r3, #84] ; 0x54 - 800120e: 2b00 cmp r3, #0 - 8001210: d10a bne.n 8001228 + 800129a: 687b ldr r3, [r7, #4] + 800129c: 6d5b ldr r3, [r3, #84] ; 0x54 + 800129e: 2b00 cmp r3, #0 + 80012a0: d10a bne.n 80012b8 { /* Initialize ADC error code */ ADC_CLEAR_ERRORCODE(hadc); - 8001212: 687b ldr r3, [r7, #4] - 8001214: 2200 movs r2, #0 - 8001216: 659a str r2, [r3, #88] ; 0x58 + 80012a2: 687b ldr r3, [r7, #4] + 80012a4: 2200 movs r2, #0 + 80012a6: 659a str r2, [r3, #88] ; 0x58 /* Allocate lock resource and initialize it */ hadc->Lock = HAL_UNLOCKED; - 8001218: 687b ldr r3, [r7, #4] - 800121a: 2250 movs r2, #80 ; 0x50 - 800121c: 2100 movs r1, #0 - 800121e: 5499 strb r1, [r3, r2] + 80012a8: 687b ldr r3, [r7, #4] + 80012aa: 2250 movs r2, #80 ; 0x50 + 80012ac: 2100 movs r1, #0 + 80012ae: 5499 strb r1, [r3, r2] /* Init the low level hardware */ hadc->MspInitCallback(hadc); #else /* Init the low level hardware */ HAL_ADC_MspInit(hadc); - 8001220: 687b ldr r3, [r7, #4] - 8001222: 0018 movs r0, r3 - 8001224: f7ff fd78 bl 8000d18 + 80012b0: 687b ldr r3, [r7, #4] + 80012b2: 0018 movs r0, r3 + 80012b4: f7ff fd78 bl 8000da8 /* Configuration of ADC parameters if previous preliminary actions are */ /* correctly completed. */ /* and if there is no conversion on going on regular group (ADC can be */ /* enabled anyway, in case of call of this function to update a parameter */ /* on the fly). */ if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) || - 8001228: 687b ldr r3, [r7, #4] - 800122a: 6d5b ldr r3, [r3, #84] ; 0x54 - 800122c: 2210 movs r2, #16 - 800122e: 4013 ands r3, r2 - 8001230: 2b10 cmp r3, #16 - 8001232: d005 beq.n 8001240 + 80012b8: 687b ldr r3, [r7, #4] + 80012ba: 6d5b ldr r3, [r3, #84] ; 0x54 + 80012bc: 2210 movs r2, #16 + 80012be: 4013 ands r3, r2 + 80012c0: 2b10 cmp r3, #16 + 80012c2: d005 beq.n 80012d0 (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET)) - 8001234: 687b ldr r3, [r7, #4] - 8001236: 681b ldr r3, [r3, #0] - 8001238: 689b ldr r3, [r3, #8] - 800123a: 2204 movs r2, #4 - 800123c: 4013 ands r3, r2 + 80012c4: 687b ldr r3, [r7, #4] + 80012c6: 681b ldr r3, [r3, #0] + 80012c8: 689b ldr r3, [r3, #8] + 80012ca: 2204 movs r2, #4 + 80012cc: 4013 ands r3, r2 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) || - 800123e: d00b beq.n 8001258 + 80012ce: d00b beq.n 80012e8 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); - 8001240: 687b ldr r3, [r7, #4] - 8001242: 6d5b ldr r3, [r3, #84] ; 0x54 - 8001244: 2210 movs r2, #16 - 8001246: 431a orrs r2, r3 - 8001248: 687b ldr r3, [r7, #4] - 800124a: 655a str r2, [r3, #84] ; 0x54 + 80012d0: 687b ldr r3, [r7, #4] + 80012d2: 6d5b ldr r3, [r3, #84] ; 0x54 + 80012d4: 2210 movs r2, #16 + 80012d6: 431a orrs r2, r3 + 80012d8: 687b ldr r3, [r7, #4] + 80012da: 655a str r2, [r3, #84] ; 0x54 /* Process unlocked */ __HAL_UNLOCK(hadc); - 800124c: 687b ldr r3, [r7, #4] - 800124e: 2250 movs r2, #80 ; 0x50 - 8001250: 2100 movs r1, #0 - 8001252: 5499 strb r1, [r3, r2] + 80012dc: 687b ldr r3, [r7, #4] + 80012de: 2250 movs r2, #80 ; 0x50 + 80012e0: 2100 movs r1, #0 + 80012e2: 5499 strb r1, [r3, r2] return HAL_ERROR; - 8001254: 2301 movs r3, #1 - 8001256: e132 b.n 80014be + 80012e4: 2301 movs r3, #1 + 80012e6: e132 b.n 800154e } /* Set ADC state */ ADC_STATE_CLR_SET(hadc->State, - 8001258: 687b ldr r3, [r7, #4] - 800125a: 6d5b ldr r3, [r3, #84] ; 0x54 - 800125c: 4a9a ldr r2, [pc, #616] ; (80014c8 ) - 800125e: 4013 ands r3, r2 - 8001260: 2202 movs r2, #2 - 8001262: 431a orrs r2, r3 - 8001264: 687b ldr r3, [r7, #4] - 8001266: 655a str r2, [r3, #84] ; 0x54 + 80012e8: 687b ldr r3, [r7, #4] + 80012ea: 6d5b ldr r3, [r3, #84] ; 0x54 + 80012ec: 4a9a ldr r2, [pc, #616] ; (8001558 ) + 80012ee: 4013 ands r3, r2 + 80012f0: 2202 movs r2, #2 + 80012f2: 431a orrs r2, r3 + 80012f4: 687b ldr r3, [r7, #4] + 80012f6: 655a str r2, [r3, #84] ; 0x54 /* Parameters update conditioned to ADC state: */ /* Parameters that can be updated only when ADC is disabled: */ /* - ADC clock mode */ /* - ADC clock prescaler */ /* - ADC Resolution */ if (ADC_IS_ENABLE(hadc) == RESET) - 8001268: 687b ldr r3, [r7, #4] - 800126a: 681b ldr r3, [r3, #0] - 800126c: 689b ldr r3, [r3, #8] - 800126e: 2203 movs r2, #3 - 8001270: 4013 ands r3, r2 - 8001272: 2b01 cmp r3, #1 - 8001274: d108 bne.n 8001288 - 8001276: 687b ldr r3, [r7, #4] - 8001278: 681b ldr r3, [r3, #0] - 800127a: 681b ldr r3, [r3, #0] - 800127c: 2201 movs r2, #1 - 800127e: 4013 ands r3, r2 - 8001280: 2b01 cmp r3, #1 - 8001282: d101 bne.n 8001288 - 8001284: 2301 movs r3, #1 - 8001286: e000 b.n 800128a - 8001288: 2300 movs r3, #0 - 800128a: 2b00 cmp r3, #0 - 800128c: d149 bne.n 8001322 + 80012f8: 687b ldr r3, [r7, #4] + 80012fa: 681b ldr r3, [r3, #0] + 80012fc: 689b ldr r3, [r3, #8] + 80012fe: 2203 movs r2, #3 + 8001300: 4013 ands r3, r2 + 8001302: 2b01 cmp r3, #1 + 8001304: d108 bne.n 8001318 + 8001306: 687b ldr r3, [r7, #4] + 8001308: 681b ldr r3, [r3, #0] + 800130a: 681b ldr r3, [r3, #0] + 800130c: 2201 movs r2, #1 + 800130e: 4013 ands r3, r2 + 8001310: 2b01 cmp r3, #1 + 8001312: d101 bne.n 8001318 + 8001314: 2301 movs r3, #1 + 8001316: e000 b.n 800131a + 8001318: 2300 movs r3, #0 + 800131a: 2b00 cmp r3, #0 + 800131c: d149 bne.n 80013b2 /* - internal measurement paths: Vbat, temperature sensor, Vref */ /* (set into HAL_ADC_ConfigChannel() ) */ /* Configuration of ADC clock: clock source PCLK or asynchronous with selectable prescaler */ __HAL_ADC_CLOCK_PRESCALER(hadc); - 800128e: 687b ldr r3, [r7, #4] - 8001290: 685a ldr r2, [r3, #4] - 8001292: 23c0 movs r3, #192 ; 0xc0 - 8001294: 061b lsls r3, r3, #24 - 8001296: 429a cmp r2, r3 - 8001298: d00b beq.n 80012b2 - 800129a: 687b ldr r3, [r7, #4] - 800129c: 685a ldr r2, [r3, #4] - 800129e: 2380 movs r3, #128 ; 0x80 - 80012a0: 05db lsls r3, r3, #23 - 80012a2: 429a cmp r2, r3 - 80012a4: d005 beq.n 80012b2 - 80012a6: 687b ldr r3, [r7, #4] - 80012a8: 685a ldr r2, [r3, #4] - 80012aa: 2380 movs r3, #128 ; 0x80 - 80012ac: 061b lsls r3, r3, #24 - 80012ae: 429a cmp r2, r3 - 80012b0: d111 bne.n 80012d6 - 80012b2: 687b ldr r3, [r7, #4] - 80012b4: 681b ldr r3, [r3, #0] - 80012b6: 691a ldr r2, [r3, #16] - 80012b8: 687b ldr r3, [r7, #4] - 80012ba: 681b ldr r3, [r3, #0] - 80012bc: 0092 lsls r2, r2, #2 - 80012be: 0892 lsrs r2, r2, #2 - 80012c0: 611a str r2, [r3, #16] - 80012c2: 687b ldr r3, [r7, #4] - 80012c4: 681b ldr r3, [r3, #0] - 80012c6: 6919 ldr r1, [r3, #16] - 80012c8: 687b ldr r3, [r7, #4] - 80012ca: 685a ldr r2, [r3, #4] - 80012cc: 687b ldr r3, [r7, #4] - 80012ce: 681b ldr r3, [r3, #0] - 80012d0: 430a orrs r2, r1 - 80012d2: 611a str r2, [r3, #16] - 80012d4: e014 b.n 8001300 - 80012d6: 687b ldr r3, [r7, #4] - 80012d8: 681b ldr r3, [r3, #0] - 80012da: 691a ldr r2, [r3, #16] - 80012dc: 687b ldr r3, [r7, #4] - 80012de: 681b ldr r3, [r3, #0] - 80012e0: 0092 lsls r2, r2, #2 - 80012e2: 0892 lsrs r2, r2, #2 - 80012e4: 611a str r2, [r3, #16] - 80012e6: 4b79 ldr r3, [pc, #484] ; (80014cc ) - 80012e8: 681a ldr r2, [r3, #0] - 80012ea: 4b78 ldr r3, [pc, #480] ; (80014cc ) - 80012ec: 4978 ldr r1, [pc, #480] ; (80014d0 ) - 80012ee: 400a ands r2, r1 - 80012f0: 601a str r2, [r3, #0] - 80012f2: 4b76 ldr r3, [pc, #472] ; (80014cc ) - 80012f4: 6819 ldr r1, [r3, #0] - 80012f6: 687b ldr r3, [r7, #4] - 80012f8: 685a ldr r2, [r3, #4] - 80012fa: 4b74 ldr r3, [pc, #464] ; (80014cc ) - 80012fc: 430a orrs r2, r1 - 80012fe: 601a str r2, [r3, #0] + 800131e: 687b ldr r3, [r7, #4] + 8001320: 685a ldr r2, [r3, #4] + 8001322: 23c0 movs r3, #192 ; 0xc0 + 8001324: 061b lsls r3, r3, #24 + 8001326: 429a cmp r2, r3 + 8001328: d00b beq.n 8001342 + 800132a: 687b ldr r3, [r7, #4] + 800132c: 685a ldr r2, [r3, #4] + 800132e: 2380 movs r3, #128 ; 0x80 + 8001330: 05db lsls r3, r3, #23 + 8001332: 429a cmp r2, r3 + 8001334: d005 beq.n 8001342 + 8001336: 687b ldr r3, [r7, #4] + 8001338: 685a ldr r2, [r3, #4] + 800133a: 2380 movs r3, #128 ; 0x80 + 800133c: 061b lsls r3, r3, #24 + 800133e: 429a cmp r2, r3 + 8001340: d111 bne.n 8001366 + 8001342: 687b ldr r3, [r7, #4] + 8001344: 681b ldr r3, [r3, #0] + 8001346: 691a ldr r2, [r3, #16] + 8001348: 687b ldr r3, [r7, #4] + 800134a: 681b ldr r3, [r3, #0] + 800134c: 0092 lsls r2, r2, #2 + 800134e: 0892 lsrs r2, r2, #2 + 8001350: 611a str r2, [r3, #16] + 8001352: 687b ldr r3, [r7, #4] + 8001354: 681b ldr r3, [r3, #0] + 8001356: 6919 ldr r1, [r3, #16] + 8001358: 687b ldr r3, [r7, #4] + 800135a: 685a ldr r2, [r3, #4] + 800135c: 687b ldr r3, [r7, #4] + 800135e: 681b ldr r3, [r3, #0] + 8001360: 430a orrs r2, r1 + 8001362: 611a str r2, [r3, #16] + 8001364: e014 b.n 8001390 + 8001366: 687b ldr r3, [r7, #4] + 8001368: 681b ldr r3, [r3, #0] + 800136a: 691a ldr r2, [r3, #16] + 800136c: 687b ldr r3, [r7, #4] + 800136e: 681b ldr r3, [r3, #0] + 8001370: 0092 lsls r2, r2, #2 + 8001372: 0892 lsrs r2, r2, #2 + 8001374: 611a str r2, [r3, #16] + 8001376: 4b79 ldr r3, [pc, #484] ; (800155c ) + 8001378: 681a ldr r2, [r3, #0] + 800137a: 4b78 ldr r3, [pc, #480] ; (800155c ) + 800137c: 4978 ldr r1, [pc, #480] ; (8001560 ) + 800137e: 400a ands r2, r1 + 8001380: 601a str r2, [r3, #0] + 8001382: 4b76 ldr r3, [pc, #472] ; (800155c ) + 8001384: 6819 ldr r1, [r3, #0] + 8001386: 687b ldr r3, [r7, #4] + 8001388: 685a ldr r2, [r3, #4] + 800138a: 4b74 ldr r3, [pc, #464] ; (800155c ) + 800138c: 430a orrs r2, r1 + 800138e: 601a str r2, [r3, #0] /* Configuration of ADC: */ /* - Resolution */ hadc->Instance->CFGR1 &= ~(ADC_CFGR1_RES); - 8001300: 687b ldr r3, [r7, #4] - 8001302: 681b ldr r3, [r3, #0] - 8001304: 68da ldr r2, [r3, #12] - 8001306: 687b ldr r3, [r7, #4] - 8001308: 681b ldr r3, [r3, #0] - 800130a: 2118 movs r1, #24 - 800130c: 438a bics r2, r1 - 800130e: 60da str r2, [r3, #12] + 8001390: 687b ldr r3, [r7, #4] + 8001392: 681b ldr r3, [r3, #0] + 8001394: 68da ldr r2, [r3, #12] + 8001396: 687b ldr r3, [r7, #4] + 8001398: 681b ldr r3, [r3, #0] + 800139a: 2118 movs r1, #24 + 800139c: 438a bics r2, r1 + 800139e: 60da str r2, [r3, #12] hadc->Instance->CFGR1 |= hadc->Init.Resolution; - 8001310: 687b ldr r3, [r7, #4] - 8001312: 681b ldr r3, [r3, #0] - 8001314: 68d9 ldr r1, [r3, #12] - 8001316: 687b ldr r3, [r7, #4] - 8001318: 689a ldr r2, [r3, #8] - 800131a: 687b ldr r3, [r7, #4] - 800131c: 681b ldr r3, [r3, #0] - 800131e: 430a orrs r2, r1 - 8001320: 60da str r2, [r3, #12] + 80013a0: 687b ldr r3, [r7, #4] + 80013a2: 681b ldr r3, [r3, #0] + 80013a4: 68d9 ldr r1, [r3, #12] + 80013a6: 687b ldr r3, [r7, #4] + 80013a8: 689a ldr r2, [r3, #8] + 80013aa: 687b ldr r3, [r7, #4] + 80013ac: 681b ldr r3, [r3, #0] + 80013ae: 430a orrs r2, r1 + 80013b0: 60da str r2, [r3, #12] } /* Set the Low Frequency mode */ ADC->CCR &= (uint32_t)~ADC_CCR_LFMEN; - 8001322: 4b6a ldr r3, [pc, #424] ; (80014cc ) - 8001324: 681a ldr r2, [r3, #0] - 8001326: 4b69 ldr r3, [pc, #420] ; (80014cc ) - 8001328: 496a ldr r1, [pc, #424] ; (80014d4 ) - 800132a: 400a ands r2, r1 - 800132c: 601a str r2, [r3, #0] + 80013b2: 4b6a ldr r3, [pc, #424] ; (800155c ) + 80013b4: 681a ldr r2, [r3, #0] + 80013b6: 4b69 ldr r3, [pc, #420] ; (800155c ) + 80013b8: 496a ldr r1, [pc, #424] ; (8001564 ) + 80013ba: 400a ands r2, r1 + 80013bc: 601a str r2, [r3, #0] ADC->CCR |= __HAL_ADC_CCR_LOWFREQUENCY(hadc->Init.LowPowerFrequencyMode); - 800132e: 4b67 ldr r3, [pc, #412] ; (80014cc ) - 8001330: 6819 ldr r1, [r3, #0] - 8001332: 687b ldr r3, [r7, #4] - 8001334: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001336: 065a lsls r2, r3, #25 - 8001338: 4b64 ldr r3, [pc, #400] ; (80014cc ) - 800133a: 430a orrs r2, r1 - 800133c: 601a str r2, [r3, #0] + 80013be: 4b67 ldr r3, [pc, #412] ; (800155c ) + 80013c0: 6819 ldr r1, [r3, #0] + 80013c2: 687b ldr r3, [r7, #4] + 80013c4: 6b5b ldr r3, [r3, #52] ; 0x34 + 80013c6: 065a lsls r2, r3, #25 + 80013c8: 4b64 ldr r3, [pc, #400] ; (800155c ) + 80013ca: 430a orrs r2, r1 + 80013cc: 601a str r2, [r3, #0] /* Enable voltage regulator (if disabled at this step) */ if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN)) - 800133e: 687b ldr r3, [r7, #4] - 8001340: 681b ldr r3, [r3, #0] - 8001342: 689a ldr r2, [r3, #8] - 8001344: 2380 movs r3, #128 ; 0x80 - 8001346: 055b lsls r3, r3, #21 - 8001348: 4013 ands r3, r2 - 800134a: d108 bne.n 800135e + 80013ce: 687b ldr r3, [r7, #4] + 80013d0: 681b ldr r3, [r3, #0] + 80013d2: 689a ldr r2, [r3, #8] + 80013d4: 2380 movs r3, #128 ; 0x80 + 80013d6: 055b lsls r3, r3, #21 + 80013d8: 4013 ands r3, r2 + 80013da: d108 bne.n 80013ee { /* Set ADVREGEN bit */ hadc->Instance->CR |= ADC_CR_ADVREGEN; - 800134c: 687b ldr r3, [r7, #4] - 800134e: 681b ldr r3, [r3, #0] - 8001350: 689a ldr r2, [r3, #8] - 8001352: 687b ldr r3, [r7, #4] - 8001354: 681b ldr r3, [r3, #0] - 8001356: 2180 movs r1, #128 ; 0x80 - 8001358: 0549 lsls r1, r1, #21 - 800135a: 430a orrs r2, r1 - 800135c: 609a str r2, [r3, #8] + 80013dc: 687b ldr r3, [r7, #4] + 80013de: 681b ldr r3, [r3, #0] + 80013e0: 689a ldr r2, [r3, #8] + 80013e2: 687b ldr r3, [r7, #4] + 80013e4: 681b ldr r3, [r3, #0] + 80013e6: 2180 movs r1, #128 ; 0x80 + 80013e8: 0549 lsls r1, r1, #21 + 80013ea: 430a orrs r2, r1 + 80013ec: 609a str r2, [r3, #8] /* - Continuous conversion mode */ /* - DMA continuous request */ /* - Overrun */ /* - AutoDelay feature */ /* - Discontinuous mode */ hadc->Instance->CFGR1 &= ~(ADC_CFGR1_ALIGN | - 800135e: 687b ldr r3, [r7, #4] - 8001360: 681b ldr r3, [r3, #0] - 8001362: 68da ldr r2, [r3, #12] - 8001364: 687b ldr r3, [r7, #4] - 8001366: 681b ldr r3, [r3, #0] - 8001368: 495b ldr r1, [pc, #364] ; (80014d8 ) - 800136a: 400a ands r2, r1 - 800136c: 60da str r2, [r3, #12] + 80013ee: 687b ldr r3, [r7, #4] + 80013f0: 681b ldr r3, [r3, #0] + 80013f2: 68da ldr r2, [r3, #12] + 80013f4: 687b ldr r3, [r7, #4] + 80013f6: 681b ldr r3, [r3, #0] + 80013f8: 495b ldr r1, [pc, #364] ; (8001568 ) + 80013fa: 400a ands r2, r1 + 80013fc: 60da str r2, [r3, #12] ADC_CFGR1_OVRMOD | ADC_CFGR1_AUTDLY | ADC_CFGR1_AUTOFF | ADC_CFGR1_DISCEN); hadc->Instance->CFGR1 |= (hadc->Init.DataAlign | - 800136e: 687b ldr r3, [r7, #4] - 8001370: 681b ldr r3, [r3, #0] - 8001372: 68d9 ldr r1, [r3, #12] - 8001374: 687b ldr r3, [r7, #4] - 8001376: 68da ldr r2, [r3, #12] + 80013fe: 687b ldr r3, [r7, #4] + 8001400: 681b ldr r3, [r3, #0] + 8001402: 68d9 ldr r1, [r3, #12] + 8001404: 687b ldr r3, [r7, #4] + 8001406: 68da ldr r2, [r3, #12] ADC_SCANDIR(hadc->Init.ScanConvMode) | - 8001378: 687b ldr r3, [r7, #4] - 800137a: 691b ldr r3, [r3, #16] - 800137c: 2b02 cmp r3, #2 - 800137e: d101 bne.n 8001384 - 8001380: 2304 movs r3, #4 - 8001382: e000 b.n 8001386 - 8001384: 2300 movs r3, #0 + 8001408: 687b ldr r3, [r7, #4] + 800140a: 691b ldr r3, [r3, #16] + 800140c: 2b02 cmp r3, #2 + 800140e: d101 bne.n 8001414 + 8001410: 2304 movs r3, #4 + 8001412: e000 b.n 8001416 + 8001414: 2300 movs r3, #0 hadc->Instance->CFGR1 |= (hadc->Init.DataAlign | - 8001386: 431a orrs r2, r3 + 8001416: 431a orrs r2, r3 ADC_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 8001388: 687b ldr r3, [r7, #4] - 800138a: 2020 movs r0, #32 - 800138c: 5c1b ldrb r3, [r3, r0] - 800138e: 035b lsls r3, r3, #13 + 8001418: 687b ldr r3, [r7, #4] + 800141a: 2020 movs r0, #32 + 800141c: 5c1b ldrb r3, [r3, r0] + 800141e: 035b lsls r3, r3, #13 ADC_SCANDIR(hadc->Init.ScanConvMode) | - 8001390: 431a orrs r2, r3 + 8001420: 431a orrs r2, r3 ADC_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) | - 8001392: 687b ldr r3, [r7, #4] - 8001394: 202c movs r0, #44 ; 0x2c - 8001396: 5c1b ldrb r3, [r3, r0] - 8001398: 005b lsls r3, r3, #1 + 8001422: 687b ldr r3, [r7, #4] + 8001424: 202c movs r0, #44 ; 0x2c + 8001426: 5c1b ldrb r3, [r3, r0] + 8001428: 005b lsls r3, r3, #1 ADC_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | - 800139a: 431a orrs r2, r3 + 800142a: 431a orrs r2, r3 hadc->Init.Overrun | - 800139c: 687b ldr r3, [r7, #4] - 800139e: 6b1b ldr r3, [r3, #48] ; 0x30 + 800142c: 687b ldr r3, [r7, #4] + 800142e: 6b1b ldr r3, [r3, #48] ; 0x30 ADC_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) | - 80013a0: 431a orrs r2, r3 + 8001430: 431a orrs r2, r3 __HAL_ADC_CFGR1_AutoDelay(hadc->Init.LowPowerAutoWait) | - 80013a2: 687b ldr r3, [r7, #4] - 80013a4: 699b ldr r3, [r3, #24] - 80013a6: 039b lsls r3, r3, #14 + 8001432: 687b ldr r3, [r7, #4] + 8001434: 699b ldr r3, [r3, #24] + 8001436: 039b lsls r3, r3, #14 hadc->Init.Overrun | - 80013a8: 431a orrs r2, r3 + 8001438: 431a orrs r2, r3 __HAL_ADC_CFGR1_AUTOFF(hadc->Init.LowPowerAutoPowerOff)); - 80013aa: 687b ldr r3, [r7, #4] - 80013ac: 69db ldr r3, [r3, #28] - 80013ae: 03db lsls r3, r3, #15 + 800143a: 687b ldr r3, [r7, #4] + 800143c: 69db ldr r3, [r3, #28] + 800143e: 03db lsls r3, r3, #15 __HAL_ADC_CFGR1_AutoDelay(hadc->Init.LowPowerAutoWait) | - 80013b0: 431a orrs r2, r3 + 8001440: 431a orrs r2, r3 hadc->Instance->CFGR1 |= (hadc->Init.DataAlign | - 80013b2: 687b ldr r3, [r7, #4] - 80013b4: 681b ldr r3, [r3, #0] - 80013b6: 430a orrs r2, r1 - 80013b8: 60da str r2, [r3, #12] + 8001442: 687b ldr r3, [r7, #4] + 8001444: 681b ldr r3, [r3, #0] + 8001446: 430a orrs r2, r1 + 8001448: 60da str r2, [r3, #12] /* Enable external trigger if trigger selection is different of software */ /* start. */ /* Note: This configuration keeps the hardware feature of parameter */ /* ExternalTrigConvEdge "trigger edge none" equivalent to */ /* software start. */ if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) - 80013ba: 687b ldr r3, [r7, #4] - 80013bc: 6a5a ldr r2, [r3, #36] ; 0x24 - 80013be: 23c2 movs r3, #194 ; 0xc2 - 80013c0: 33ff adds r3, #255 ; 0xff - 80013c2: 429a cmp r2, r3 - 80013c4: d00b beq.n 80013de + 800144a: 687b ldr r3, [r7, #4] + 800144c: 6a5a ldr r2, [r3, #36] ; 0x24 + 800144e: 23c2 movs r3, #194 ; 0xc2 + 8001450: 33ff adds r3, #255 ; 0xff + 8001452: 429a cmp r2, r3 + 8001454: d00b beq.n 800146e { hadc->Instance->CFGR1 |= hadc->Init.ExternalTrigConv | - 80013c6: 687b ldr r3, [r7, #4] - 80013c8: 681b ldr r3, [r3, #0] - 80013ca: 68d9 ldr r1, [r3, #12] - 80013cc: 687b ldr r3, [r7, #4] - 80013ce: 6a5a ldr r2, [r3, #36] ; 0x24 + 8001456: 687b ldr r3, [r7, #4] + 8001458: 681b ldr r3, [r3, #0] + 800145a: 68d9 ldr r1, [r3, #12] + 800145c: 687b ldr r3, [r7, #4] + 800145e: 6a5a ldr r2, [r3, #36] ; 0x24 hadc->Init.ExternalTrigConvEdge; - 80013d0: 687b ldr r3, [r7, #4] - 80013d2: 6a9b ldr r3, [r3, #40] ; 0x28 + 8001460: 687b ldr r3, [r7, #4] + 8001462: 6a9b ldr r3, [r3, #40] ; 0x28 hadc->Instance->CFGR1 |= hadc->Init.ExternalTrigConv | - 80013d4: 431a orrs r2, r3 - 80013d6: 687b ldr r3, [r7, #4] - 80013d8: 681b ldr r3, [r3, #0] - 80013da: 430a orrs r2, r1 - 80013dc: 60da str r2, [r3, #12] + 8001464: 431a orrs r2, r3 + 8001466: 687b ldr r3, [r7, #4] + 8001468: 681b ldr r3, [r3, #0] + 800146a: 430a orrs r2, r1 + 800146c: 60da str r2, [r3, #12] } /* Enable discontinuous mode only if continuous mode is disabled */ if (hadc->Init.DiscontinuousConvMode == ENABLE) - 80013de: 687b ldr r3, [r7, #4] - 80013e0: 2221 movs r2, #33 ; 0x21 - 80013e2: 5c9b ldrb r3, [r3, r2] - 80013e4: 2b01 cmp r3, #1 - 80013e6: d11a bne.n 800141e + 800146e: 687b ldr r3, [r7, #4] + 8001470: 2221 movs r2, #33 ; 0x21 + 8001472: 5c9b ldrb r3, [r3, r2] + 8001474: 2b01 cmp r3, #1 + 8001476: d11a bne.n 80014ae { if (hadc->Init.ContinuousConvMode == DISABLE) - 80013e8: 687b ldr r3, [r7, #4] - 80013ea: 2220 movs r2, #32 - 80013ec: 5c9b ldrb r3, [r3, r2] - 80013ee: 2b00 cmp r3, #0 - 80013f0: d109 bne.n 8001406 + 8001478: 687b ldr r3, [r7, #4] + 800147a: 2220 movs r2, #32 + 800147c: 5c9b ldrb r3, [r3, r2] + 800147e: 2b00 cmp r3, #0 + 8001480: d109 bne.n 8001496 { /* Enable the selected ADC group regular discontinuous mode */ hadc->Instance->CFGR1 |= (ADC_CFGR1_DISCEN); - 80013f2: 687b ldr r3, [r7, #4] - 80013f4: 681b ldr r3, [r3, #0] - 80013f6: 68da ldr r2, [r3, #12] - 80013f8: 687b ldr r3, [r7, #4] - 80013fa: 681b ldr r3, [r3, #0] - 80013fc: 2180 movs r1, #128 ; 0x80 - 80013fe: 0249 lsls r1, r1, #9 - 8001400: 430a orrs r2, r1 - 8001402: 60da str r2, [r3, #12] - 8001404: e00b b.n 800141e + 8001482: 687b ldr r3, [r7, #4] + 8001484: 681b ldr r3, [r3, #0] + 8001486: 68da ldr r2, [r3, #12] + 8001488: 687b ldr r3, [r7, #4] + 800148a: 681b ldr r3, [r3, #0] + 800148c: 2180 movs r1, #128 ; 0x80 + 800148e: 0249 lsls r1, r1, #9 + 8001490: 430a orrs r2, r1 + 8001492: 60da str r2, [r3, #12] + 8001494: e00b b.n 80014ae /* ADC regular group discontinuous was intended to be enabled, */ /* but ADC regular group modes continuous and sequencer discontinuous */ /* cannot be enabled simultaneously. */ /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 8001406: 687b ldr r3, [r7, #4] - 8001408: 6d5b ldr r3, [r3, #84] ; 0x54 - 800140a: 2220 movs r2, #32 - 800140c: 431a orrs r2, r3 - 800140e: 687b ldr r3, [r7, #4] - 8001410: 655a str r2, [r3, #84] ; 0x54 + 8001496: 687b ldr r3, [r7, #4] + 8001498: 6d5b ldr r3, [r3, #84] ; 0x54 + 800149a: 2220 movs r2, #32 + 800149c: 431a orrs r2, r3 + 800149e: 687b ldr r3, [r7, #4] + 80014a0: 655a str r2, [r3, #84] ; 0x54 /* Set ADC error code to ADC peripheral internal error */ SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); - 8001412: 687b ldr r3, [r7, #4] - 8001414: 6d9b ldr r3, [r3, #88] ; 0x58 - 8001416: 2201 movs r2, #1 - 8001418: 431a orrs r2, r3 - 800141a: 687b ldr r3, [r7, #4] - 800141c: 659a str r2, [r3, #88] ; 0x58 + 80014a2: 687b ldr r3, [r7, #4] + 80014a4: 6d9b ldr r3, [r3, #88] ; 0x58 + 80014a6: 2201 movs r2, #1 + 80014a8: 431a orrs r2, r3 + 80014aa: 687b ldr r3, [r7, #4] + 80014ac: 659a str r2, [r3, #88] ; 0x58 } } if (hadc->Init.OversamplingMode == ENABLE) - 800141e: 687b ldr r3, [r7, #4] - 8001420: 6bdb ldr r3, [r3, #60] ; 0x3c - 8001422: 2b01 cmp r3, #1 - 8001424: d11f bne.n 8001466 + 80014ae: 687b ldr r3, [r7, #4] + 80014b0: 6bdb ldr r3, [r3, #60] ; 0x3c + 80014b2: 2b01 cmp r3, #1 + 80014b4: d11f bne.n 80014f6 /* Configuration of Oversampler: */ /* - Oversampling Ratio */ /* - Right bit shift */ /* - Triggered mode */ hadc->Instance->CFGR2 &= ~(ADC_CFGR2_OVSR | - 8001426: 687b ldr r3, [r7, #4] - 8001428: 681b ldr r3, [r3, #0] - 800142a: 691a ldr r2, [r3, #16] - 800142c: 687b ldr r3, [r7, #4] - 800142e: 681b ldr r3, [r3, #0] - 8001430: 492a ldr r1, [pc, #168] ; (80014dc ) - 8001432: 400a ands r2, r1 - 8001434: 611a str r2, [r3, #16] + 80014b6: 687b ldr r3, [r7, #4] + 80014b8: 681b ldr r3, [r3, #0] + 80014ba: 691a ldr r2, [r3, #16] + 80014bc: 687b ldr r3, [r7, #4] + 80014be: 681b ldr r3, [r3, #0] + 80014c0: 492a ldr r1, [pc, #168] ; (800156c ) + 80014c2: 400a ands r2, r1 + 80014c4: 611a str r2, [r3, #16] ADC_CFGR2_OVSS | ADC_CFGR2_TOVS); hadc->Instance->CFGR2 |= (hadc->Init.Oversample.Ratio | - 8001436: 687b ldr r3, [r7, #4] - 8001438: 681b ldr r3, [r3, #0] - 800143a: 6919 ldr r1, [r3, #16] - 800143c: 687b ldr r3, [r7, #4] - 800143e: 6c1a ldr r2, [r3, #64] ; 0x40 + 80014c6: 687b ldr r3, [r7, #4] + 80014c8: 681b ldr r3, [r3, #0] + 80014ca: 6919 ldr r1, [r3, #16] + 80014cc: 687b ldr r3, [r7, #4] + 80014ce: 6c1a ldr r2, [r3, #64] ; 0x40 hadc->Init.Oversample.RightBitShift | - 8001440: 687b ldr r3, [r7, #4] - 8001442: 6c5b ldr r3, [r3, #68] ; 0x44 + 80014d0: 687b ldr r3, [r7, #4] + 80014d2: 6c5b ldr r3, [r3, #68] ; 0x44 hadc->Instance->CFGR2 |= (hadc->Init.Oversample.Ratio | - 8001444: 431a orrs r2, r3 + 80014d4: 431a orrs r2, r3 hadc->Init.Oversample.TriggeredMode); - 8001446: 687b ldr r3, [r7, #4] - 8001448: 6c9b ldr r3, [r3, #72] ; 0x48 + 80014d6: 687b ldr r3, [r7, #4] + 80014d8: 6c9b ldr r3, [r3, #72] ; 0x48 hadc->Init.Oversample.RightBitShift | - 800144a: 431a orrs r2, r3 + 80014da: 431a orrs r2, r3 hadc->Instance->CFGR2 |= (hadc->Init.Oversample.Ratio | - 800144c: 687b ldr r3, [r7, #4] - 800144e: 681b ldr r3, [r3, #0] - 8001450: 430a orrs r2, r1 - 8001452: 611a str r2, [r3, #16] + 80014dc: 687b ldr r3, [r7, #4] + 80014de: 681b ldr r3, [r3, #0] + 80014e0: 430a orrs r2, r1 + 80014e2: 611a str r2, [r3, #16] /* Enable OverSampling mode */ hadc->Instance->CFGR2 |= ADC_CFGR2_OVSE; - 8001454: 687b ldr r3, [r7, #4] - 8001456: 681b ldr r3, [r3, #0] - 8001458: 691a ldr r2, [r3, #16] - 800145a: 687b ldr r3, [r7, #4] - 800145c: 681b ldr r3, [r3, #0] - 800145e: 2101 movs r1, #1 - 8001460: 430a orrs r2, r1 - 8001462: 611a str r2, [r3, #16] - 8001464: e00e b.n 8001484 + 80014e4: 687b ldr r3, [r7, #4] + 80014e6: 681b ldr r3, [r3, #0] + 80014e8: 691a ldr r2, [r3, #16] + 80014ea: 687b ldr r3, [r7, #4] + 80014ec: 681b ldr r3, [r3, #0] + 80014ee: 2101 movs r1, #1 + 80014f0: 430a orrs r2, r1 + 80014f2: 611a str r2, [r3, #16] + 80014f4: e00e b.n 8001514 } else { if (HAL_IS_BIT_SET(hadc->Instance->CFGR2, ADC_CFGR2_OVSE)) - 8001466: 687b ldr r3, [r7, #4] - 8001468: 681b ldr r3, [r3, #0] - 800146a: 691b ldr r3, [r3, #16] - 800146c: 2201 movs r2, #1 - 800146e: 4013 ands r3, r2 - 8001470: 2b01 cmp r3, #1 - 8001472: d107 bne.n 8001484 + 80014f6: 687b ldr r3, [r7, #4] + 80014f8: 681b ldr r3, [r3, #0] + 80014fa: 691b ldr r3, [r3, #16] + 80014fc: 2201 movs r2, #1 + 80014fe: 4013 ands r3, r2 + 8001500: 2b01 cmp r3, #1 + 8001502: d107 bne.n 8001514 { /* Disable OverSampling mode if needed */ hadc->Instance->CFGR2 &= ~ADC_CFGR2_OVSE; - 8001474: 687b ldr r3, [r7, #4] - 8001476: 681b ldr r3, [r3, #0] - 8001478: 691a ldr r2, [r3, #16] - 800147a: 687b ldr r3, [r7, #4] - 800147c: 681b ldr r3, [r3, #0] - 800147e: 2101 movs r1, #1 - 8001480: 438a bics r2, r1 - 8001482: 611a str r2, [r3, #16] + 8001504: 687b ldr r3, [r7, #4] + 8001506: 681b ldr r3, [r3, #0] + 8001508: 691a ldr r2, [r3, #16] + 800150a: 687b ldr r3, [r7, #4] + 800150c: 681b ldr r3, [r3, #0] + 800150e: 2101 movs r1, #1 + 8001510: 438a bics r2, r1 + 8001512: 611a str r2, [r3, #16] } } /* Clear the old sampling time */ hadc->Instance->SMPR &= (uint32_t)(~ADC_SMPR_SMPR); - 8001484: 687b ldr r3, [r7, #4] - 8001486: 681b ldr r3, [r3, #0] - 8001488: 695a ldr r2, [r3, #20] - 800148a: 687b ldr r3, [r7, #4] - 800148c: 681b ldr r3, [r3, #0] - 800148e: 2107 movs r1, #7 - 8001490: 438a bics r2, r1 - 8001492: 615a str r2, [r3, #20] + 8001514: 687b ldr r3, [r7, #4] + 8001516: 681b ldr r3, [r3, #0] + 8001518: 695a ldr r2, [r3, #20] + 800151a: 687b ldr r3, [r7, #4] + 800151c: 681b ldr r3, [r3, #0] + 800151e: 2107 movs r1, #7 + 8001520: 438a bics r2, r1 + 8001522: 615a str r2, [r3, #20] /* Set the new sample time */ hadc->Instance->SMPR |= hadc->Init.SamplingTime; - 8001494: 687b ldr r3, [r7, #4] - 8001496: 681b ldr r3, [r3, #0] - 8001498: 6959 ldr r1, [r3, #20] - 800149a: 687b ldr r3, [r7, #4] - 800149c: 6b9a ldr r2, [r3, #56] ; 0x38 - 800149e: 687b ldr r3, [r7, #4] - 80014a0: 681b ldr r3, [r3, #0] - 80014a2: 430a orrs r2, r1 - 80014a4: 615a str r2, [r3, #20] + 8001524: 687b ldr r3, [r7, #4] + 8001526: 681b ldr r3, [r3, #0] + 8001528: 6959 ldr r1, [r3, #20] + 800152a: 687b ldr r3, [r7, #4] + 800152c: 6b9a ldr r2, [r3, #56] ; 0x38 + 800152e: 687b ldr r3, [r7, #4] + 8001530: 681b ldr r3, [r3, #0] + 8001532: 430a orrs r2, r1 + 8001534: 615a str r2, [r3, #20] /* Clear ADC error code */ ADC_CLEAR_ERRORCODE(hadc); - 80014a6: 687b ldr r3, [r7, #4] - 80014a8: 2200 movs r2, #0 - 80014aa: 659a str r2, [r3, #88] ; 0x58 + 8001536: 687b ldr r3, [r7, #4] + 8001538: 2200 movs r2, #0 + 800153a: 659a str r2, [r3, #88] ; 0x58 /* Set the ADC state */ ADC_STATE_CLR_SET(hadc->State, - 80014ac: 687b ldr r3, [r7, #4] - 80014ae: 6d5b ldr r3, [r3, #84] ; 0x54 - 80014b0: 2203 movs r2, #3 - 80014b2: 4393 bics r3, r2 - 80014b4: 2201 movs r2, #1 - 80014b6: 431a orrs r2, r3 - 80014b8: 687b ldr r3, [r7, #4] - 80014ba: 655a str r2, [r3, #84] ; 0x54 + 800153c: 687b ldr r3, [r7, #4] + 800153e: 6d5b ldr r3, [r3, #84] ; 0x54 + 8001540: 2203 movs r2, #3 + 8001542: 4393 bics r3, r2 + 8001544: 2201 movs r2, #1 + 8001546: 431a orrs r2, r3 + 8001548: 687b ldr r3, [r7, #4] + 800154a: 655a str r2, [r3, #84] ; 0x54 HAL_ADC_STATE_BUSY_INTERNAL, HAL_ADC_STATE_READY); /* Return function status */ return HAL_OK; - 80014bc: 2300 movs r3, #0 + 800154c: 2300 movs r3, #0 } - 80014be: 0018 movs r0, r3 - 80014c0: 46bd mov sp, r7 - 80014c2: b002 add sp, #8 - 80014c4: bd80 pop {r7, pc} - 80014c6: 46c0 nop ; (mov r8, r8) - 80014c8: fffffefd .word 0xfffffefd - 80014cc: 40012708 .word 0x40012708 - 80014d0: ffc3ffff .word 0xffc3ffff - 80014d4: fdffffff .word 0xfdffffff - 80014d8: fffe0219 .word 0xfffe0219 - 80014dc: fffffc03 .word 0xfffffc03 + 800154e: 0018 movs r0, r3 + 8001550: 46bd mov sp, r7 + 8001552: b002 add sp, #8 + 8001554: bd80 pop {r7, pc} + 8001556: 46c0 nop ; (mov r8, r8) + 8001558: fffffefd .word 0xfffffefd + 800155c: 40012708 .word 0x40012708 + 8001560: ffc3ffff .word 0xffc3ffff + 8001564: fdffffff .word 0xfdffffff + 8001568: fffe0219 .word 0xfffe0219 + 800156c: fffffc03 .word 0xfffffc03 -080014e0 : +08001570 : * @param hadc ADC handle * @param sConfig Structure of ADC channel assigned to ADC group regular. * @retval HAL status */ HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *sConfig) { - 80014e0: b580 push {r7, lr} - 80014e2: b082 sub sp, #8 - 80014e4: af00 add r7, sp, #0 - 80014e6: 6078 str r0, [r7, #4] - 80014e8: 6039 str r1, [r7, #0] + 8001570: b580 push {r7, lr} + 8001572: b082 sub sp, #8 + 8001574: af00 add r7, sp, #0 + 8001576: 6078 str r0, [r7, #4] + 8001578: 6039 str r1, [r7, #0] assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); assert_param(IS_ADC_CHANNEL(sConfig->Channel)); assert_param(IS_ADC_RANK(sConfig->Rank)); /* Process locked */ __HAL_LOCK(hadc); - 80014ea: 687b ldr r3, [r7, #4] - 80014ec: 2250 movs r2, #80 ; 0x50 - 80014ee: 5c9b ldrb r3, [r3, r2] - 80014f0: 2b01 cmp r3, #1 - 80014f2: d101 bne.n 80014f8 - 80014f4: 2302 movs r3, #2 - 80014f6: e06c b.n 80015d2 - 80014f8: 687b ldr r3, [r7, #4] - 80014fa: 2250 movs r2, #80 ; 0x50 - 80014fc: 2101 movs r1, #1 - 80014fe: 5499 strb r1, [r3, r2] + 800157a: 687b ldr r3, [r7, #4] + 800157c: 2250 movs r2, #80 ; 0x50 + 800157e: 5c9b ldrb r3, [r3, r2] + 8001580: 2b01 cmp r3, #1 + 8001582: d101 bne.n 8001588 + 8001584: 2302 movs r3, #2 + 8001586: e06c b.n 8001662 + 8001588: 687b ldr r3, [r7, #4] + 800158a: 2250 movs r2, #80 ; 0x50 + 800158c: 2101 movs r1, #1 + 800158e: 5499 strb r1, [r3, r2] /* Parameters update conditioned to ADC state: */ /* Parameters that can be updated when ADC is disabled or enabled without */ /* conversion on going on regular group: */ /* - Channel number */ /* - Management of internal measurement channels: Vbat/VrefInt/TempSensor */ if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET) - 8001500: 687b ldr r3, [r7, #4] - 8001502: 681b ldr r3, [r3, #0] - 8001504: 689b ldr r3, [r3, #8] - 8001506: 2204 movs r2, #4 - 8001508: 4013 ands r3, r2 - 800150a: d00b beq.n 8001524 + 8001590: 687b ldr r3, [r7, #4] + 8001592: 681b ldr r3, [r3, #0] + 8001594: 689b ldr r3, [r3, #8] + 8001596: 2204 movs r2, #4 + 8001598: 4013 ands r3, r2 + 800159a: d00b beq.n 80015b4 { /* Update ADC state machine to error */ SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); - 800150c: 687b ldr r3, [r7, #4] - 800150e: 6d5b ldr r3, [r3, #84] ; 0x54 - 8001510: 2220 movs r2, #32 - 8001512: 431a orrs r2, r3 - 8001514: 687b ldr r3, [r7, #4] - 8001516: 655a str r2, [r3, #84] ; 0x54 + 800159c: 687b ldr r3, [r7, #4] + 800159e: 6d5b ldr r3, [r3, #84] ; 0x54 + 80015a0: 2220 movs r2, #32 + 80015a2: 431a orrs r2, r3 + 80015a4: 687b ldr r3, [r7, #4] + 80015a6: 655a str r2, [r3, #84] ; 0x54 /* Process unlocked */ __HAL_UNLOCK(hadc); - 8001518: 687b ldr r3, [r7, #4] - 800151a: 2250 movs r2, #80 ; 0x50 - 800151c: 2100 movs r1, #0 - 800151e: 5499 strb r1, [r3, r2] + 80015a8: 687b ldr r3, [r7, #4] + 80015aa: 2250 movs r2, #80 ; 0x50 + 80015ac: 2100 movs r1, #0 + 80015ae: 5499 strb r1, [r3, r2] return HAL_ERROR; - 8001520: 2301 movs r3, #1 - 8001522: e056 b.n 80015d2 + 80015b0: 2301 movs r3, #1 + 80015b2: e056 b.n 8001662 } if (sConfig->Rank != ADC_RANK_NONE) - 8001524: 683b ldr r3, [r7, #0] - 8001526: 685b ldr r3, [r3, #4] - 8001528: 4a2c ldr r2, [pc, #176] ; (80015dc ) - 800152a: 4293 cmp r3, r2 - 800152c: d028 beq.n 8001580 + 80015b4: 683b ldr r3, [r7, #0] + 80015b6: 685b ldr r3, [r3, #4] + 80015b8: 4a2c ldr r2, [pc, #176] ; (800166c ) + 80015ba: 4293 cmp r3, r2 + 80015bc: d028 beq.n 8001610 { /* Enable selected channels */ hadc->Instance->CHSELR |= (uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK); - 800152e: 687b ldr r3, [r7, #4] - 8001530: 681b ldr r3, [r3, #0] - 8001532: 6a99 ldr r1, [r3, #40] ; 0x28 - 8001534: 683b ldr r3, [r7, #0] - 8001536: 681b ldr r3, [r3, #0] - 8001538: 035b lsls r3, r3, #13 - 800153a: 0b5a lsrs r2, r3, #13 - 800153c: 687b ldr r3, [r7, #4] - 800153e: 681b ldr r3, [r3, #0] - 8001540: 430a orrs r2, r1 - 8001542: 629a str r2, [r3, #40] ; 0x28 + 80015be: 687b ldr r3, [r7, #4] + 80015c0: 681b ldr r3, [r3, #0] + 80015c2: 6a99 ldr r1, [r3, #40] ; 0x28 + 80015c4: 683b ldr r3, [r7, #0] + 80015c6: 681b ldr r3, [r3, #0] + 80015c8: 035b lsls r3, r3, #13 + 80015ca: 0b5a lsrs r2, r3, #13 + 80015cc: 687b ldr r3, [r7, #4] + 80015ce: 681b ldr r3, [r3, #0] + 80015d0: 430a orrs r2, r1 + 80015d2: 629a str r2, [r3, #40] ; 0x28 /* dedicated internal buffers and path. */ #if defined(ADC_CCR_TSEN) /* If Temperature sensor channel is selected, then enable the internal */ /* buffers and path */ if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK)) - 8001544: 683b ldr r3, [r7, #0] - 8001546: 681a ldr r2, [r3, #0] - 8001548: 2380 movs r3, #128 ; 0x80 - 800154a: 02db lsls r3, r3, #11 - 800154c: 4013 ands r3, r2 - 800154e: d009 beq.n 8001564 + 80015d4: 683b ldr r3, [r7, #0] + 80015d6: 681a ldr r2, [r3, #0] + 80015d8: 2380 movs r3, #128 ; 0x80 + 80015da: 02db lsls r3, r3, #11 + 80015dc: 4013 ands r3, r2 + 80015de: d009 beq.n 80015f4 { ADC->CCR |= ADC_CCR_TSEN; - 8001550: 4b23 ldr r3, [pc, #140] ; (80015e0 ) - 8001552: 681a ldr r2, [r3, #0] - 8001554: 4b22 ldr r3, [pc, #136] ; (80015e0 ) - 8001556: 2180 movs r1, #128 ; 0x80 - 8001558: 0409 lsls r1, r1, #16 - 800155a: 430a orrs r2, r1 - 800155c: 601a str r2, [r3, #0] + 80015e0: 4b23 ldr r3, [pc, #140] ; (8001670 ) + 80015e2: 681a ldr r2, [r3, #0] + 80015e4: 4b22 ldr r3, [pc, #136] ; (8001670 ) + 80015e6: 2180 movs r1, #128 ; 0x80 + 80015e8: 0409 lsls r1, r1, #16 + 80015ea: 430a orrs r2, r1 + 80015ec: 601a str r2, [r3, #0] /* Delay for temperature sensor stabilization time */ ADC_DelayMicroSecond(ADC_TEMPSENSOR_DELAY_US); - 800155e: 200a movs r0, #10 - 8001560: f000 f844 bl 80015ec + 80015ee: 200a movs r0, #10 + 80015f0: f000 f844 bl 800167c } #endif /* If VRefInt channel is selected, then enable the internal buffers and path */ if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK)) - 8001564: 683b ldr r3, [r7, #0] - 8001566: 681a ldr r2, [r3, #0] - 8001568: 2380 movs r3, #128 ; 0x80 - 800156a: 029b lsls r3, r3, #10 - 800156c: 4013 ands r3, r2 - 800156e: d02b beq.n 80015c8 + 80015f4: 683b ldr r3, [r7, #0] + 80015f6: 681a ldr r2, [r3, #0] + 80015f8: 2380 movs r3, #128 ; 0x80 + 80015fa: 029b lsls r3, r3, #10 + 80015fc: 4013 ands r3, r2 + 80015fe: d02b beq.n 8001658 { ADC->CCR |= ADC_CCR_VREFEN; - 8001570: 4b1b ldr r3, [pc, #108] ; (80015e0 ) - 8001572: 681a ldr r2, [r3, #0] - 8001574: 4b1a ldr r3, [pc, #104] ; (80015e0 ) - 8001576: 2180 movs r1, #128 ; 0x80 - 8001578: 03c9 lsls r1, r1, #15 - 800157a: 430a orrs r2, r1 - 800157c: 601a str r2, [r3, #0] - 800157e: e023 b.n 80015c8 + 8001600: 4b1b ldr r3, [pc, #108] ; (8001670 ) + 8001602: 681a ldr r2, [r3, #0] + 8001604: 4b1a ldr r3, [pc, #104] ; (8001670 ) + 8001606: 2180 movs r1, #128 ; 0x80 + 8001608: 03c9 lsls r1, r1, #15 + 800160a: 430a orrs r2, r1 + 800160c: 601a str r2, [r3, #0] + 800160e: e023 b.n 8001658 } else { /* Regular sequence configuration */ /* Reset the channel selection register from the selected channel */ hadc->Instance->CHSELR &= ~((uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK)); - 8001580: 687b ldr r3, [r7, #4] - 8001582: 681b ldr r3, [r3, #0] - 8001584: 6a9a ldr r2, [r3, #40] ; 0x28 - 8001586: 683b ldr r3, [r7, #0] - 8001588: 681b ldr r3, [r3, #0] - 800158a: 035b lsls r3, r3, #13 - 800158c: 0b5b lsrs r3, r3, #13 - 800158e: 43d9 mvns r1, r3 - 8001590: 687b ldr r3, [r7, #4] - 8001592: 681b ldr r3, [r3, #0] - 8001594: 400a ands r2, r1 - 8001596: 629a str r2, [r3, #40] ; 0x28 + 8001610: 687b ldr r3, [r7, #4] + 8001612: 681b ldr r3, [r3, #0] + 8001614: 6a9a ldr r2, [r3, #40] ; 0x28 + 8001616: 683b ldr r3, [r7, #0] + 8001618: 681b ldr r3, [r3, #0] + 800161a: 035b lsls r3, r3, #13 + 800161c: 0b5b lsrs r3, r3, #13 + 800161e: 43d9 mvns r1, r3 + 8001620: 687b ldr r3, [r7, #4] + 8001622: 681b ldr r3, [r3, #0] + 8001624: 400a ands r2, r1 + 8001626: 629a str r2, [r3, #40] ; 0x28 /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ /* internal measurement paths disable: If internal channel selected, */ /* disable dedicated internal buffers and path. */ #if defined(ADC_CCR_TSEN) if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK)) - 8001598: 683b ldr r3, [r7, #0] - 800159a: 681a ldr r2, [r3, #0] - 800159c: 2380 movs r3, #128 ; 0x80 - 800159e: 02db lsls r3, r3, #11 - 80015a0: 4013 ands r3, r2 - 80015a2: d005 beq.n 80015b0 + 8001628: 683b ldr r3, [r7, #0] + 800162a: 681a ldr r2, [r3, #0] + 800162c: 2380 movs r3, #128 ; 0x80 + 800162e: 02db lsls r3, r3, #11 + 8001630: 4013 ands r3, r2 + 8001632: d005 beq.n 8001640 { ADC->CCR &= ~ADC_CCR_TSEN; - 80015a4: 4b0e ldr r3, [pc, #56] ; (80015e0 ) - 80015a6: 681a ldr r2, [r3, #0] - 80015a8: 4b0d ldr r3, [pc, #52] ; (80015e0 ) - 80015aa: 490e ldr r1, [pc, #56] ; (80015e4 ) - 80015ac: 400a ands r2, r1 - 80015ae: 601a str r2, [r3, #0] + 8001634: 4b0e ldr r3, [pc, #56] ; (8001670 ) + 8001636: 681a ldr r2, [r3, #0] + 8001638: 4b0d ldr r3, [pc, #52] ; (8001670 ) + 800163a: 490e ldr r1, [pc, #56] ; (8001674 ) + 800163c: 400a ands r2, r1 + 800163e: 601a str r2, [r3, #0] } #endif /* If VRefInt channel is selected, then enable the internal buffers and path */ if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK)) - 80015b0: 683b ldr r3, [r7, #0] - 80015b2: 681a ldr r2, [r3, #0] - 80015b4: 2380 movs r3, #128 ; 0x80 - 80015b6: 029b lsls r3, r3, #10 - 80015b8: 4013 ands r3, r2 - 80015ba: d005 beq.n 80015c8 + 8001640: 683b ldr r3, [r7, #0] + 8001642: 681a ldr r2, [r3, #0] + 8001644: 2380 movs r3, #128 ; 0x80 + 8001646: 029b lsls r3, r3, #10 + 8001648: 4013 ands r3, r2 + 800164a: d005 beq.n 8001658 { ADC->CCR &= ~ADC_CCR_VREFEN; - 80015bc: 4b08 ldr r3, [pc, #32] ; (80015e0 ) - 80015be: 681a ldr r2, [r3, #0] - 80015c0: 4b07 ldr r3, [pc, #28] ; (80015e0 ) - 80015c2: 4909 ldr r1, [pc, #36] ; (80015e8 ) - 80015c4: 400a ands r2, r1 - 80015c6: 601a str r2, [r3, #0] + 800164c: 4b08 ldr r3, [pc, #32] ; (8001670 ) + 800164e: 681a ldr r2, [r3, #0] + 8001650: 4b07 ldr r3, [pc, #28] ; (8001670 ) + 8001652: 4909 ldr r1, [pc, #36] ; (8001678 ) + 8001654: 400a ands r2, r1 + 8001656: 601a str r2, [r3, #0] } #endif } /* Process unlocked */ __HAL_UNLOCK(hadc); - 80015c8: 687b ldr r3, [r7, #4] - 80015ca: 2250 movs r2, #80 ; 0x50 - 80015cc: 2100 movs r1, #0 - 80015ce: 5499 strb r1, [r3, r2] + 8001658: 687b ldr r3, [r7, #4] + 800165a: 2250 movs r2, #80 ; 0x50 + 800165c: 2100 movs r1, #0 + 800165e: 5499 strb r1, [r3, r2] /* Return function status */ return HAL_OK; - 80015d0: 2300 movs r3, #0 + 8001660: 2300 movs r3, #0 } - 80015d2: 0018 movs r0, r3 - 80015d4: 46bd mov sp, r7 - 80015d6: b002 add sp, #8 - 80015d8: bd80 pop {r7, pc} - 80015da: 46c0 nop ; (mov r8, r8) - 80015dc: 00001001 .word 0x00001001 - 80015e0: 40012708 .word 0x40012708 - 80015e4: ff7fffff .word 0xff7fffff - 80015e8: ffbfffff .word 0xffbfffff + 8001662: 0018 movs r0, r3 + 8001664: 46bd mov sp, r7 + 8001666: b002 add sp, #8 + 8001668: bd80 pop {r7, pc} + 800166a: 46c0 nop ; (mov r8, r8) + 800166c: 00001001 .word 0x00001001 + 8001670: 40012708 .word 0x40012708 + 8001674: ff7fffff .word 0xff7fffff + 8001678: ffbfffff .word 0xffbfffff -080015ec : +0800167c : * @brief Delay micro seconds * @param microSecond delay * @retval None */ static void ADC_DelayMicroSecond(uint32_t microSecond) { - 80015ec: b580 push {r7, lr} - 80015ee: b084 sub sp, #16 - 80015f0: af00 add r7, sp, #0 - 80015f2: 6078 str r0, [r7, #4] + 800167c: b580 push {r7, lr} + 800167e: b084 sub sp, #16 + 8001680: af00 add r7, sp, #0 + 8001682: 6078 str r0, [r7, #4] /* Compute number of CPU cycles to wait for */ __IO uint32_t waitLoopIndex = (microSecond * (SystemCoreClock / 1000000U)); - 80015f4: 4b0b ldr r3, [pc, #44] ; (8001624 ) - 80015f6: 681b ldr r3, [r3, #0] - 80015f8: 490b ldr r1, [pc, #44] ; (8001628 ) - 80015fa: 0018 movs r0, r3 - 80015fc: f7fe fd84 bl 8000108 <__udivsi3> - 8001600: 0003 movs r3, r0 - 8001602: 001a movs r2, r3 - 8001604: 687b ldr r3, [r7, #4] - 8001606: 4353 muls r3, r2 - 8001608: 60fb str r3, [r7, #12] + 8001684: 4b0b ldr r3, [pc, #44] ; (80016b4 ) + 8001686: 681b ldr r3, [r3, #0] + 8001688: 490b ldr r1, [pc, #44] ; (80016b8 ) + 800168a: 0018 movs r0, r3 + 800168c: f7fe fd3c bl 8000108 <__udivsi3> + 8001690: 0003 movs r3, r0 + 8001692: 001a movs r2, r3 + 8001694: 687b ldr r3, [r7, #4] + 8001696: 4353 muls r3, r2 + 8001698: 60fb str r3, [r7, #12] while (waitLoopIndex != 0U) - 800160a: e002 b.n 8001612 + 800169a: e002 b.n 80016a2 { waitLoopIndex--; - 800160c: 68fb ldr r3, [r7, #12] - 800160e: 3b01 subs r3, #1 - 8001610: 60fb str r3, [r7, #12] + 800169c: 68fb ldr r3, [r7, #12] + 800169e: 3b01 subs r3, #1 + 80016a0: 60fb str r3, [r7, #12] while (waitLoopIndex != 0U) - 8001612: 68fb ldr r3, [r7, #12] - 8001614: 2b00 cmp r3, #0 - 8001616: d1f9 bne.n 800160c + 80016a2: 68fb ldr r3, [r7, #12] + 80016a4: 2b00 cmp r3, #0 + 80016a6: d1f9 bne.n 800169c } } - 8001618: 46c0 nop ; (mov r8, r8) - 800161a: 46c0 nop ; (mov r8, r8) - 800161c: 46bd mov sp, r7 - 800161e: b004 add sp, #16 - 8001620: bd80 pop {r7, pc} - 8001622: 46c0 nop ; (mov r8, r8) - 8001624: 20000000 .word 0x20000000 - 8001628: 000f4240 .word 0x000f4240 + 80016a8: 46c0 nop ; (mov r8, r8) + 80016aa: 46c0 nop ; (mov r8, r8) + 80016ac: 46bd mov sp, r7 + 80016ae: b004 add sp, #16 + 80016b0: bd80 pop {r7, pc} + 80016b2: 46c0 nop ; (mov r8, r8) + 80016b4: 20000000 .word 0x20000000 + 80016b8: 000f4240 .word 0x000f4240 -0800162c <__NVIC_EnableIRQ>: +080016bc <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { - 800162c: b580 push {r7, lr} - 800162e: b082 sub sp, #8 - 8001630: af00 add r7, sp, #0 - 8001632: 0002 movs r2, r0 - 8001634: 1dfb adds r3, r7, #7 - 8001636: 701a strb r2, [r3, #0] + 80016bc: b580 push {r7, lr} + 80016be: b082 sub sp, #8 + 80016c0: af00 add r7, sp, #0 + 80016c2: 0002 movs r2, r0 + 80016c4: 1dfb adds r3, r7, #7 + 80016c6: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) - 8001638: 1dfb adds r3, r7, #7 - 800163a: 781b ldrb r3, [r3, #0] - 800163c: 2b7f cmp r3, #127 ; 0x7f - 800163e: d809 bhi.n 8001654 <__NVIC_EnableIRQ+0x28> + 80016c8: 1dfb adds r3, r7, #7 + 80016ca: 781b ldrb r3, [r3, #0] + 80016cc: 2b7f cmp r3, #127 ; 0x7f + 80016ce: d809 bhi.n 80016e4 <__NVIC_EnableIRQ+0x28> { NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); - 8001640: 1dfb adds r3, r7, #7 - 8001642: 781b ldrb r3, [r3, #0] - 8001644: 001a movs r2, r3 - 8001646: 231f movs r3, #31 - 8001648: 401a ands r2, r3 - 800164a: 4b04 ldr r3, [pc, #16] ; (800165c <__NVIC_EnableIRQ+0x30>) - 800164c: 2101 movs r1, #1 - 800164e: 4091 lsls r1, r2 - 8001650: 000a movs r2, r1 - 8001652: 601a str r2, [r3, #0] + 80016d0: 1dfb adds r3, r7, #7 + 80016d2: 781b ldrb r3, [r3, #0] + 80016d4: 001a movs r2, r3 + 80016d6: 231f movs r3, #31 + 80016d8: 401a ands r2, r3 + 80016da: 4b04 ldr r3, [pc, #16] ; (80016ec <__NVIC_EnableIRQ+0x30>) + 80016dc: 2101 movs r1, #1 + 80016de: 4091 lsls r1, r2 + 80016e0: 000a movs r2, r1 + 80016e2: 601a str r2, [r3, #0] } } - 8001654: 46c0 nop ; (mov r8, r8) - 8001656: 46bd mov sp, r7 - 8001658: b002 add sp, #8 - 800165a: bd80 pop {r7, pc} - 800165c: e000e100 .word 0xe000e100 + 80016e4: 46c0 nop ; (mov r8, r8) + 80016e6: 46bd mov sp, r7 + 80016e8: b002 add sp, #8 + 80016ea: bd80 pop {r7, pc} + 80016ec: e000e100 .word 0xe000e100 -08001660 <__NVIC_SetPriority>: +080016f0 <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { - 8001660: b590 push {r4, r7, lr} - 8001662: b083 sub sp, #12 - 8001664: af00 add r7, sp, #0 - 8001666: 0002 movs r2, r0 - 8001668: 6039 str r1, [r7, #0] - 800166a: 1dfb adds r3, r7, #7 - 800166c: 701a strb r2, [r3, #0] + 80016f0: b590 push {r4, r7, lr} + 80016f2: b083 sub sp, #12 + 80016f4: af00 add r7, sp, #0 + 80016f6: 0002 movs r2, r0 + 80016f8: 6039 str r1, [r7, #0] + 80016fa: 1dfb adds r3, r7, #7 + 80016fc: 701a strb r2, [r3, #0] if ((int32_t)(IRQn) >= 0) - 800166e: 1dfb adds r3, r7, #7 - 8001670: 781b ldrb r3, [r3, #0] - 8001672: 2b7f cmp r3, #127 ; 0x7f - 8001674: d828 bhi.n 80016c8 <__NVIC_SetPriority+0x68> + 80016fe: 1dfb adds r3, r7, #7 + 8001700: 781b ldrb r3, [r3, #0] + 8001702: 2b7f cmp r3, #127 ; 0x7f + 8001704: d828 bhi.n 8001758 <__NVIC_SetPriority+0x68> { NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8001676: 4a2f ldr r2, [pc, #188] ; (8001734 <__NVIC_SetPriority+0xd4>) - 8001678: 1dfb adds r3, r7, #7 - 800167a: 781b ldrb r3, [r3, #0] - 800167c: b25b sxtb r3, r3 - 800167e: 089b lsrs r3, r3, #2 - 8001680: 33c0 adds r3, #192 ; 0xc0 - 8001682: 009b lsls r3, r3, #2 - 8001684: 589b ldr r3, [r3, r2] - 8001686: 1dfa adds r2, r7, #7 - 8001688: 7812 ldrb r2, [r2, #0] - 800168a: 0011 movs r1, r2 - 800168c: 2203 movs r2, #3 - 800168e: 400a ands r2, r1 - 8001690: 00d2 lsls r2, r2, #3 - 8001692: 21ff movs r1, #255 ; 0xff - 8001694: 4091 lsls r1, r2 - 8001696: 000a movs r2, r1 - 8001698: 43d2 mvns r2, r2 - 800169a: 401a ands r2, r3 - 800169c: 0011 movs r1, r2 + 8001706: 4a2f ldr r2, [pc, #188] ; (80017c4 <__NVIC_SetPriority+0xd4>) + 8001708: 1dfb adds r3, r7, #7 + 800170a: 781b ldrb r3, [r3, #0] + 800170c: b25b sxtb r3, r3 + 800170e: 089b lsrs r3, r3, #2 + 8001710: 33c0 adds r3, #192 ; 0xc0 + 8001712: 009b lsls r3, r3, #2 + 8001714: 589b ldr r3, [r3, r2] + 8001716: 1dfa adds r2, r7, #7 + 8001718: 7812 ldrb r2, [r2, #0] + 800171a: 0011 movs r1, r2 + 800171c: 2203 movs r2, #3 + 800171e: 400a ands r2, r1 + 8001720: 00d2 lsls r2, r2, #3 + 8001722: 21ff movs r1, #255 ; 0xff + 8001724: 4091 lsls r1, r2 + 8001726: 000a movs r2, r1 + 8001728: 43d2 mvns r2, r2 + 800172a: 401a ands r2, r3 + 800172c: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 800169e: 683b ldr r3, [r7, #0] - 80016a0: 019b lsls r3, r3, #6 - 80016a2: 22ff movs r2, #255 ; 0xff - 80016a4: 401a ands r2, r3 - 80016a6: 1dfb adds r3, r7, #7 - 80016a8: 781b ldrb r3, [r3, #0] - 80016aa: 0018 movs r0, r3 - 80016ac: 2303 movs r3, #3 - 80016ae: 4003 ands r3, r0 - 80016b0: 00db lsls r3, r3, #3 - 80016b2: 409a lsls r2, r3 + 800172e: 683b ldr r3, [r7, #0] + 8001730: 019b lsls r3, r3, #6 + 8001732: 22ff movs r2, #255 ; 0xff + 8001734: 401a ands r2, r3 + 8001736: 1dfb adds r3, r7, #7 + 8001738: 781b ldrb r3, [r3, #0] + 800173a: 0018 movs r0, r3 + 800173c: 2303 movs r3, #3 + 800173e: 4003 ands r3, r0 + 8001740: 00db lsls r3, r3, #3 + 8001742: 409a lsls r2, r3 NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 80016b4: 481f ldr r0, [pc, #124] ; (8001734 <__NVIC_SetPriority+0xd4>) - 80016b6: 1dfb adds r3, r7, #7 - 80016b8: 781b ldrb r3, [r3, #0] - 80016ba: b25b sxtb r3, r3 - 80016bc: 089b lsrs r3, r3, #2 - 80016be: 430a orrs r2, r1 - 80016c0: 33c0 adds r3, #192 ; 0xc0 - 80016c2: 009b lsls r3, r3, #2 - 80016c4: 501a str r2, [r3, r0] + 8001744: 481f ldr r0, [pc, #124] ; (80017c4 <__NVIC_SetPriority+0xd4>) + 8001746: 1dfb adds r3, r7, #7 + 8001748: 781b ldrb r3, [r3, #0] + 800174a: b25b sxtb r3, r3 + 800174c: 089b lsrs r3, r3, #2 + 800174e: 430a orrs r2, r1 + 8001750: 33c0 adds r3, #192 ; 0xc0 + 8001752: 009b lsls r3, r3, #2 + 8001754: 501a str r2, [r3, r0] else { SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); } } - 80016c6: e031 b.n 800172c <__NVIC_SetPriority+0xcc> + 8001756: e031 b.n 80017bc <__NVIC_SetPriority+0xcc> SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 80016c8: 4a1b ldr r2, [pc, #108] ; (8001738 <__NVIC_SetPriority+0xd8>) - 80016ca: 1dfb adds r3, r7, #7 - 80016cc: 781b ldrb r3, [r3, #0] - 80016ce: 0019 movs r1, r3 - 80016d0: 230f movs r3, #15 - 80016d2: 400b ands r3, r1 - 80016d4: 3b08 subs r3, #8 - 80016d6: 089b lsrs r3, r3, #2 - 80016d8: 3306 adds r3, #6 - 80016da: 009b lsls r3, r3, #2 - 80016dc: 18d3 adds r3, r2, r3 - 80016de: 3304 adds r3, #4 - 80016e0: 681b ldr r3, [r3, #0] - 80016e2: 1dfa adds r2, r7, #7 - 80016e4: 7812 ldrb r2, [r2, #0] - 80016e6: 0011 movs r1, r2 - 80016e8: 2203 movs r2, #3 - 80016ea: 400a ands r2, r1 - 80016ec: 00d2 lsls r2, r2, #3 - 80016ee: 21ff movs r1, #255 ; 0xff - 80016f0: 4091 lsls r1, r2 - 80016f2: 000a movs r2, r1 - 80016f4: 43d2 mvns r2, r2 - 80016f6: 401a ands r2, r3 - 80016f8: 0011 movs r1, r2 + 8001758: 4a1b ldr r2, [pc, #108] ; (80017c8 <__NVIC_SetPriority+0xd8>) + 800175a: 1dfb adds r3, r7, #7 + 800175c: 781b ldrb r3, [r3, #0] + 800175e: 0019 movs r1, r3 + 8001760: 230f movs r3, #15 + 8001762: 400b ands r3, r1 + 8001764: 3b08 subs r3, #8 + 8001766: 089b lsrs r3, r3, #2 + 8001768: 3306 adds r3, #6 + 800176a: 009b lsls r3, r3, #2 + 800176c: 18d3 adds r3, r2, r3 + 800176e: 3304 adds r3, #4 + 8001770: 681b ldr r3, [r3, #0] + 8001772: 1dfa adds r2, r7, #7 + 8001774: 7812 ldrb r2, [r2, #0] + 8001776: 0011 movs r1, r2 + 8001778: 2203 movs r2, #3 + 800177a: 400a ands r2, r1 + 800177c: 00d2 lsls r2, r2, #3 + 800177e: 21ff movs r1, #255 ; 0xff + 8001780: 4091 lsls r1, r2 + 8001782: 000a movs r2, r1 + 8001784: 43d2 mvns r2, r2 + 8001786: 401a ands r2, r3 + 8001788: 0011 movs r1, r2 (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); - 80016fa: 683b ldr r3, [r7, #0] - 80016fc: 019b lsls r3, r3, #6 - 80016fe: 22ff movs r2, #255 ; 0xff - 8001700: 401a ands r2, r3 - 8001702: 1dfb adds r3, r7, #7 - 8001704: 781b ldrb r3, [r3, #0] - 8001706: 0018 movs r0, r3 - 8001708: 2303 movs r3, #3 - 800170a: 4003 ands r3, r0 - 800170c: 00db lsls r3, r3, #3 - 800170e: 409a lsls r2, r3 + 800178a: 683b ldr r3, [r7, #0] + 800178c: 019b lsls r3, r3, #6 + 800178e: 22ff movs r2, #255 ; 0xff + 8001790: 401a ands r2, r3 + 8001792: 1dfb adds r3, r7, #7 + 8001794: 781b ldrb r3, [r3, #0] + 8001796: 0018 movs r0, r3 + 8001798: 2303 movs r3, #3 + 800179a: 4003 ands r3, r0 + 800179c: 00db lsls r3, r3, #3 + 800179e: 409a lsls r2, r3 SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) | - 8001710: 4809 ldr r0, [pc, #36] ; (8001738 <__NVIC_SetPriority+0xd8>) - 8001712: 1dfb adds r3, r7, #7 - 8001714: 781b ldrb r3, [r3, #0] - 8001716: 001c movs r4, r3 - 8001718: 230f movs r3, #15 - 800171a: 4023 ands r3, r4 - 800171c: 3b08 subs r3, #8 - 800171e: 089b lsrs r3, r3, #2 - 8001720: 430a orrs r2, r1 - 8001722: 3306 adds r3, #6 - 8001724: 009b lsls r3, r3, #2 - 8001726: 18c3 adds r3, r0, r3 - 8001728: 3304 adds r3, #4 - 800172a: 601a str r2, [r3, #0] + 80017a0: 4809 ldr r0, [pc, #36] ; (80017c8 <__NVIC_SetPriority+0xd8>) + 80017a2: 1dfb adds r3, r7, #7 + 80017a4: 781b ldrb r3, [r3, #0] + 80017a6: 001c movs r4, r3 + 80017a8: 230f movs r3, #15 + 80017aa: 4023 ands r3, r4 + 80017ac: 3b08 subs r3, #8 + 80017ae: 089b lsrs r3, r3, #2 + 80017b0: 430a orrs r2, r1 + 80017b2: 3306 adds r3, #6 + 80017b4: 009b lsls r3, r3, #2 + 80017b6: 18c3 adds r3, r0, r3 + 80017b8: 3304 adds r3, #4 + 80017ba: 601a str r2, [r3, #0] } - 800172c: 46c0 nop ; (mov r8, r8) - 800172e: 46bd mov sp, r7 - 8001730: b003 add sp, #12 - 8001732: bd90 pop {r4, r7, pc} - 8001734: e000e100 .word 0xe000e100 - 8001738: e000ed00 .word 0xe000ed00 + 80017bc: 46c0 nop ; (mov r8, r8) + 80017be: 46bd mov sp, r7 + 80017c0: b003 add sp, #12 + 80017c2: bd90 pop {r4, r7, pc} + 80017c4: e000e100 .word 0xe000e100 + 80017c8: e000ed00 .word 0xe000ed00 -0800173c : +080017cc : \note When the variable __Vendor_SysTickConfig is set to 1, then the function SysTick_Config is not included. In this case, the file device.h must contain a vendor-specific implementation of this function. */ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) { - 800173c: b580 push {r7, lr} - 800173e: b082 sub sp, #8 - 8001740: af00 add r7, sp, #0 - 8001742: 6078 str r0, [r7, #4] + 80017cc: b580 push {r7, lr} + 80017ce: b082 sub sp, #8 + 80017d0: af00 add r7, sp, #0 + 80017d2: 6078 str r0, [r7, #4] if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) - 8001744: 687b ldr r3, [r7, #4] - 8001746: 1e5a subs r2, r3, #1 - 8001748: 2380 movs r3, #128 ; 0x80 - 800174a: 045b lsls r3, r3, #17 - 800174c: 429a cmp r2, r3 - 800174e: d301 bcc.n 8001754 + 80017d4: 687b ldr r3, [r7, #4] + 80017d6: 1e5a subs r2, r3, #1 + 80017d8: 2380 movs r3, #128 ; 0x80 + 80017da: 045b lsls r3, r3, #17 + 80017dc: 429a cmp r2, r3 + 80017de: d301 bcc.n 80017e4 { return (1UL); /* Reload value impossible */ - 8001750: 2301 movs r3, #1 - 8001752: e010 b.n 8001776 + 80017e0: 2301 movs r3, #1 + 80017e2: e010 b.n 8001806 } SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ - 8001754: 4b0a ldr r3, [pc, #40] ; (8001780 ) - 8001756: 687a ldr r2, [r7, #4] - 8001758: 3a01 subs r2, #1 - 800175a: 605a str r2, [r3, #4] + 80017e4: 4b0a ldr r3, [pc, #40] ; (8001810 ) + 80017e6: 687a ldr r2, [r7, #4] + 80017e8: 3a01 subs r2, #1 + 80017ea: 605a str r2, [r3, #4] NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */ - 800175c: 2301 movs r3, #1 - 800175e: 425b negs r3, r3 - 8001760: 2103 movs r1, #3 - 8001762: 0018 movs r0, r3 - 8001764: f7ff ff7c bl 8001660 <__NVIC_SetPriority> + 80017ec: 2301 movs r3, #1 + 80017ee: 425b negs r3, r3 + 80017f0: 2103 movs r1, #3 + 80017f2: 0018 movs r0, r3 + 80017f4: f7ff ff7c bl 80016f0 <__NVIC_SetPriority> SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - 8001768: 4b05 ldr r3, [pc, #20] ; (8001780 ) - 800176a: 2200 movs r2, #0 - 800176c: 609a str r2, [r3, #8] + 80017f8: 4b05 ldr r3, [pc, #20] ; (8001810 ) + 80017fa: 2200 movs r2, #0 + 80017fc: 609a str r2, [r3, #8] SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | - 800176e: 4b04 ldr r3, [pc, #16] ; (8001780 ) - 8001770: 2207 movs r2, #7 - 8001772: 601a str r2, [r3, #0] + 80017fe: 4b04 ldr r3, [pc, #16] ; (8001810 ) + 8001800: 2207 movs r2, #7 + 8001802: 601a str r2, [r3, #0] SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */ return (0UL); /* Function successful */ - 8001774: 2300 movs r3, #0 + 8001804: 2300 movs r3, #0 } - 8001776: 0018 movs r0, r3 - 8001778: 46bd mov sp, r7 - 800177a: b002 add sp, #8 - 800177c: bd80 pop {r7, pc} - 800177e: 46c0 nop ; (mov r8, r8) - 8001780: e000e010 .word 0xe000e010 + 8001806: 0018 movs r0, r3 + 8001808: 46bd mov sp, r7 + 800180a: b002 add sp, #8 + 800180c: bd80 pop {r7, pc} + 800180e: 46c0 nop ; (mov r8, r8) + 8001810: e000e010 .word 0xe000e010 -08001784 : +08001814 : * with stm32l0xx devices, this parameter is a dummy value and it is ignored, because * no subpriority supported in Cortex M0+ based products. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { - 8001784: b580 push {r7, lr} - 8001786: b084 sub sp, #16 - 8001788: af00 add r7, sp, #0 - 800178a: 60b9 str r1, [r7, #8] - 800178c: 607a str r2, [r7, #4] - 800178e: 210f movs r1, #15 - 8001790: 187b adds r3, r7, r1 - 8001792: 1c02 adds r2, r0, #0 - 8001794: 701a strb r2, [r3, #0] + 8001814: b580 push {r7, lr} + 8001816: b084 sub sp, #16 + 8001818: af00 add r7, sp, #0 + 800181a: 60b9 str r1, [r7, #8] + 800181c: 607a str r2, [r7, #4] + 800181e: 210f movs r1, #15 + 8001820: 187b adds r3, r7, r1 + 8001822: 1c02 adds r2, r0, #0 + 8001824: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); NVIC_SetPriority(IRQn,PreemptPriority); - 8001796: 68ba ldr r2, [r7, #8] - 8001798: 187b adds r3, r7, r1 - 800179a: 781b ldrb r3, [r3, #0] - 800179c: b25b sxtb r3, r3 - 800179e: 0011 movs r1, r2 - 80017a0: 0018 movs r0, r3 - 80017a2: f7ff ff5d bl 8001660 <__NVIC_SetPriority> + 8001826: 68ba ldr r2, [r7, #8] + 8001828: 187b adds r3, r7, r1 + 800182a: 781b ldrb r3, [r3, #0] + 800182c: b25b sxtb r3, r3 + 800182e: 0011 movs r1, r2 + 8001830: 0018 movs r0, r3 + 8001832: f7ff ff5d bl 80016f0 <__NVIC_SetPriority> } - 80017a6: 46c0 nop ; (mov r8, r8) - 80017a8: 46bd mov sp, r7 - 80017aa: b004 add sp, #16 - 80017ac: bd80 pop {r7, pc} + 8001836: 46c0 nop ; (mov r8, r8) + 8001838: 46bd mov sp, r7 + 800183a: b004 add sp, #16 + 800183c: bd80 pop {r7, pc} -080017ae : +0800183e : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { - 80017ae: b580 push {r7, lr} - 80017b0: b082 sub sp, #8 - 80017b2: af00 add r7, sp, #0 - 80017b4: 0002 movs r2, r0 - 80017b6: 1dfb adds r3, r7, #7 - 80017b8: 701a strb r2, [r3, #0] + 800183e: b580 push {r7, lr} + 8001840: b082 sub sp, #8 + 8001842: af00 add r7, sp, #0 + 8001844: 0002 movs r2, r0 + 8001846: 1dfb adds r3, r7, #7 + 8001848: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); - 80017ba: 1dfb adds r3, r7, #7 - 80017bc: 781b ldrb r3, [r3, #0] - 80017be: b25b sxtb r3, r3 - 80017c0: 0018 movs r0, r3 - 80017c2: f7ff ff33 bl 800162c <__NVIC_EnableIRQ> + 800184a: 1dfb adds r3, r7, #7 + 800184c: 781b ldrb r3, [r3, #0] + 800184e: b25b sxtb r3, r3 + 8001850: 0018 movs r0, r3 + 8001852: f7ff ff33 bl 80016bc <__NVIC_EnableIRQ> } - 80017c6: 46c0 nop ; (mov r8, r8) - 80017c8: 46bd mov sp, r7 - 80017ca: b002 add sp, #8 - 80017cc: bd80 pop {r7, pc} + 8001856: 46c0 nop ; (mov r8, r8) + 8001858: 46bd mov sp, r7 + 800185a: b002 add sp, #8 + 800185c: bd80 pop {r7, pc} -080017ce : +0800185e : * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. * @retval status: - 0 Function succeeded. * - 1 Function failed. */ uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) { - 80017ce: b580 push {r7, lr} - 80017d0: b082 sub sp, #8 - 80017d2: af00 add r7, sp, #0 - 80017d4: 6078 str r0, [r7, #4] + 800185e: b580 push {r7, lr} + 8001860: b082 sub sp, #8 + 8001862: af00 add r7, sp, #0 + 8001864: 6078 str r0, [r7, #4] return SysTick_Config(TicksNumb); - 80017d6: 687b ldr r3, [r7, #4] - 80017d8: 0018 movs r0, r3 - 80017da: f7ff ffaf bl 800173c - 80017de: 0003 movs r3, r0 + 8001866: 687b ldr r3, [r7, #4] + 8001868: 0018 movs r0, r3 + 800186a: f7ff ffaf bl 80017cc + 800186e: 0003 movs r3, r0 } - 80017e0: 0018 movs r0, r3 - 80017e2: 46bd mov sp, r7 - 80017e4: b002 add sp, #8 - 80017e6: bd80 pop {r7, pc} + 8001870: 0018 movs r0, r3 + 8001872: 46bd mov sp, r7 + 8001874: b002 add sp, #8 + 8001876: bd80 pop {r7, pc} -080017e8 : +08001878 : * @param hdma Pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) { - 80017e8: b580 push {r7, lr} - 80017ea: b084 sub sp, #16 - 80017ec: af00 add r7, sp, #0 - 80017ee: 6078 str r0, [r7, #4] + 8001878: b580 push {r7, lr} + 800187a: b084 sub sp, #16 + 800187c: af00 add r7, sp, #0 + 800187e: 6078 str r0, [r7, #4] uint32_t tmp; /* Check the DMA handle allocation */ if(hdma == NULL) - 80017f0: 687b ldr r3, [r7, #4] - 80017f2: 2b00 cmp r3, #0 - 80017f4: d101 bne.n 80017fa + 8001880: 687b ldr r3, [r7, #4] + 8001882: 2b00 cmp r3, #0 + 8001884: d101 bne.n 800188a { return HAL_ERROR; - 80017f6: 2301 movs r3, #1 - 80017f8: e061 b.n 80018be + 8001886: 2301 movs r3, #1 + 8001888: e061 b.n 800194e assert_param(IS_DMA_MODE(hdma->Init.Mode)); assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); /* Compute the channel index */ /* Only one DMA: DMA1 */ hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2; - 80017fa: 687b ldr r3, [r7, #4] - 80017fc: 681b ldr r3, [r3, #0] - 80017fe: 4a32 ldr r2, [pc, #200] ; (80018c8 ) - 8001800: 4694 mov ip, r2 - 8001802: 4463 add r3, ip - 8001804: 2114 movs r1, #20 - 8001806: 0018 movs r0, r3 - 8001808: f7fe fc7e bl 8000108 <__udivsi3> - 800180c: 0003 movs r3, r0 - 800180e: 009a lsls r2, r3, #2 - 8001810: 687b ldr r3, [r7, #4] - 8001812: 645a str r2, [r3, #68] ; 0x44 + 800188a: 687b ldr r3, [r7, #4] + 800188c: 681b ldr r3, [r3, #0] + 800188e: 4a32 ldr r2, [pc, #200] ; (8001958 ) + 8001890: 4694 mov ip, r2 + 8001892: 4463 add r3, ip + 8001894: 2114 movs r1, #20 + 8001896: 0018 movs r0, r3 + 8001898: f7fe fc36 bl 8000108 <__udivsi3> + 800189c: 0003 movs r3, r0 + 800189e: 009a lsls r2, r3, #2 + 80018a0: 687b ldr r3, [r7, #4] + 80018a2: 645a str r2, [r3, #68] ; 0x44 hdma->DmaBaseAddress = DMA1; - 8001814: 687b ldr r3, [r7, #4] - 8001816: 4a2d ldr r2, [pc, #180] ; (80018cc ) - 8001818: 641a str r2, [r3, #64] ; 0x40 + 80018a4: 687b ldr r3, [r7, #4] + 80018a6: 4a2d ldr r2, [pc, #180] ; (800195c ) + 80018a8: 641a str r2, [r3, #64] ; 0x40 /* Change DMA peripheral state */ hdma->State = HAL_DMA_STATE_BUSY; - 800181a: 687b ldr r3, [r7, #4] - 800181c: 2225 movs r2, #37 ; 0x25 - 800181e: 2102 movs r1, #2 - 8001820: 5499 strb r1, [r3, r2] + 80018aa: 687b ldr r3, [r7, #4] + 80018ac: 2225 movs r2, #37 ; 0x25 + 80018ae: 2102 movs r1, #2 + 80018b0: 5499 strb r1, [r3, r2] /* Get the CR register value */ tmp = hdma->Instance->CCR; - 8001822: 687b ldr r3, [r7, #4] - 8001824: 681b ldr r3, [r3, #0] - 8001826: 681b ldr r3, [r3, #0] - 8001828: 60fb str r3, [r7, #12] + 80018b2: 687b ldr r3, [r7, #4] + 80018b4: 681b ldr r3, [r3, #0] + 80018b6: 681b ldr r3, [r3, #0] + 80018b8: 60fb str r3, [r7, #12] /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR and MEM2MEM bits */ tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | - 800182a: 68fb ldr r3, [r7, #12] - 800182c: 4a28 ldr r2, [pc, #160] ; (80018d0 ) - 800182e: 4013 ands r3, r2 - 8001830: 60fb str r3, [r7, #12] + 80018ba: 68fb ldr r3, [r7, #12] + 80018bc: 4a28 ldr r2, [pc, #160] ; (8001960 ) + 80018be: 4013 ands r3, r2 + 80018c0: 60fb str r3, [r7, #12] DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | DMA_CCR_DIR | DMA_CCR_MEM2MEM)); /* Prepare the DMA Channel configuration */ tmp |= hdma->Init.Direction | - 8001832: 687b ldr r3, [r7, #4] - 8001834: 689a ldr r2, [r3, #8] + 80018c2: 687b ldr r3, [r7, #4] + 80018c4: 689a ldr r2, [r3, #8] hdma->Init.PeriphInc | hdma->Init.MemInc | - 8001836: 687b ldr r3, [r7, #4] - 8001838: 68db ldr r3, [r3, #12] + 80018c6: 687b ldr r3, [r7, #4] + 80018c8: 68db ldr r3, [r3, #12] tmp |= hdma->Init.Direction | - 800183a: 431a orrs r2, r3 + 80018ca: 431a orrs r2, r3 hdma->Init.PeriphInc | hdma->Init.MemInc | - 800183c: 687b ldr r3, [r7, #4] - 800183e: 691b ldr r3, [r3, #16] - 8001840: 431a orrs r2, r3 + 80018cc: 687b ldr r3, [r7, #4] + 80018ce: 691b ldr r3, [r3, #16] + 80018d0: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8001842: 687b ldr r3, [r7, #4] - 8001844: 695b ldr r3, [r3, #20] + 80018d2: 687b ldr r3, [r7, #4] + 80018d4: 695b ldr r3, [r3, #20] hdma->Init.PeriphInc | hdma->Init.MemInc | - 8001846: 431a orrs r2, r3 + 80018d6: 431a orrs r2, r3 hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8001848: 687b ldr r3, [r7, #4] - 800184a: 699b ldr r3, [r3, #24] - 800184c: 431a orrs r2, r3 + 80018d8: 687b ldr r3, [r7, #4] + 80018da: 699b ldr r3, [r3, #24] + 80018dc: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; - 800184e: 687b ldr r3, [r7, #4] - 8001850: 69db ldr r3, [r3, #28] + 80018de: 687b ldr r3, [r7, #4] + 80018e0: 69db ldr r3, [r3, #28] hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | - 8001852: 431a orrs r2, r3 + 80018e2: 431a orrs r2, r3 hdma->Init.Mode | hdma->Init.Priority; - 8001854: 687b ldr r3, [r7, #4] - 8001856: 6a1b ldr r3, [r3, #32] - 8001858: 4313 orrs r3, r2 + 80018e4: 687b ldr r3, [r7, #4] + 80018e6: 6a1b ldr r3, [r3, #32] + 80018e8: 4313 orrs r3, r2 tmp |= hdma->Init.Direction | - 800185a: 68fa ldr r2, [r7, #12] - 800185c: 4313 orrs r3, r2 - 800185e: 60fb str r3, [r7, #12] + 80018ea: 68fa ldr r2, [r7, #12] + 80018ec: 4313 orrs r3, r2 + 80018ee: 60fb str r3, [r7, #12] /* Write to DMA Channel CR register */ hdma->Instance->CCR = tmp; - 8001860: 687b ldr r3, [r7, #4] - 8001862: 681b ldr r3, [r3, #0] - 8001864: 68fa ldr r2, [r7, #12] - 8001866: 601a str r2, [r3, #0] + 80018f0: 687b ldr r3, [r7, #4] + 80018f2: 681b ldr r3, [r3, #0] + 80018f4: 68fa ldr r2, [r7, #12] + 80018f6: 601a str r2, [r3, #0] /* Set request selection */ if(hdma->Init.Direction != DMA_MEMORY_TO_MEMORY) - 8001868: 687b ldr r3, [r7, #4] - 800186a: 689a ldr r2, [r3, #8] - 800186c: 2380 movs r3, #128 ; 0x80 - 800186e: 01db lsls r3, r3, #7 - 8001870: 429a cmp r2, r3 - 8001872: d018 beq.n 80018a6 + 80018f8: 687b ldr r3, [r7, #4] + 80018fa: 689a ldr r2, [r3, #8] + 80018fc: 2380 movs r3, #128 ; 0x80 + 80018fe: 01db lsls r3, r3, #7 + 8001900: 429a cmp r2, r3 + 8001902: d018 beq.n 8001936 { /* Write to DMA channel selection register */ /* Reset request selection for DMA1 Channelx */ DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); - 8001874: 4b17 ldr r3, [pc, #92] ; (80018d4 ) - 8001876: 681a ldr r2, [r3, #0] - 8001878: 687b ldr r3, [r7, #4] - 800187a: 6c5b ldr r3, [r3, #68] ; 0x44 - 800187c: 211c movs r1, #28 - 800187e: 400b ands r3, r1 - 8001880: 210f movs r1, #15 - 8001882: 4099 lsls r1, r3 - 8001884: 000b movs r3, r1 - 8001886: 43d9 mvns r1, r3 - 8001888: 4b12 ldr r3, [pc, #72] ; (80018d4 ) - 800188a: 400a ands r2, r1 - 800188c: 601a str r2, [r3, #0] + 8001904: 4b17 ldr r3, [pc, #92] ; (8001964 ) + 8001906: 681a ldr r2, [r3, #0] + 8001908: 687b ldr r3, [r7, #4] + 800190a: 6c5b ldr r3, [r3, #68] ; 0x44 + 800190c: 211c movs r1, #28 + 800190e: 400b ands r3, r1 + 8001910: 210f movs r1, #15 + 8001912: 4099 lsls r1, r3 + 8001914: 000b movs r3, r1 + 8001916: 43d9 mvns r1, r3 + 8001918: 4b12 ldr r3, [pc, #72] ; (8001964 ) + 800191a: 400a ands r2, r1 + 800191c: 601a str r2, [r3, #0] /* Configure request selection for DMA1 Channelx */ DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex & 0x1cU)); - 800188e: 4b11 ldr r3, [pc, #68] ; (80018d4 ) - 8001890: 6819 ldr r1, [r3, #0] - 8001892: 687b ldr r3, [r7, #4] - 8001894: 685a ldr r2, [r3, #4] - 8001896: 687b ldr r3, [r7, #4] - 8001898: 6c5b ldr r3, [r3, #68] ; 0x44 - 800189a: 201c movs r0, #28 - 800189c: 4003 ands r3, r0 - 800189e: 409a lsls r2, r3 - 80018a0: 4b0c ldr r3, [pc, #48] ; (80018d4 ) - 80018a2: 430a orrs r2, r1 - 80018a4: 601a str r2, [r3, #0] + 800191e: 4b11 ldr r3, [pc, #68] ; (8001964 ) + 8001920: 6819 ldr r1, [r3, #0] + 8001922: 687b ldr r3, [r7, #4] + 8001924: 685a ldr r2, [r3, #4] + 8001926: 687b ldr r3, [r7, #4] + 8001928: 6c5b ldr r3, [r3, #68] ; 0x44 + 800192a: 201c movs r0, #28 + 800192c: 4003 ands r3, r0 + 800192e: 409a lsls r2, r3 + 8001930: 4b0c ldr r3, [pc, #48] ; (8001964 ) + 8001932: 430a orrs r2, r1 + 8001934: 601a str r2, [r3, #0] } /* Initialise the error code */ hdma->ErrorCode = HAL_DMA_ERROR_NONE; - 80018a6: 687b ldr r3, [r7, #4] - 80018a8: 2200 movs r2, #0 - 80018aa: 63da str r2, [r3, #60] ; 0x3c + 8001936: 687b ldr r3, [r7, #4] + 8001938: 2200 movs r2, #0 + 800193a: 63da str r2, [r3, #60] ; 0x3c /* Initialize the DMA state*/ hdma->State = HAL_DMA_STATE_READY; - 80018ac: 687b ldr r3, [r7, #4] - 80018ae: 2225 movs r2, #37 ; 0x25 - 80018b0: 2101 movs r1, #1 - 80018b2: 5499 strb r1, [r3, r2] + 800193c: 687b ldr r3, [r7, #4] + 800193e: 2225 movs r2, #37 ; 0x25 + 8001940: 2101 movs r1, #1 + 8001942: 5499 strb r1, [r3, r2] /* Allocate lock resource and initialize it */ hdma->Lock = HAL_UNLOCKED; - 80018b4: 687b ldr r3, [r7, #4] - 80018b6: 2224 movs r2, #36 ; 0x24 - 80018b8: 2100 movs r1, #0 - 80018ba: 5499 strb r1, [r3, r2] + 8001944: 687b ldr r3, [r7, #4] + 8001946: 2224 movs r2, #36 ; 0x24 + 8001948: 2100 movs r1, #0 + 800194a: 5499 strb r1, [r3, r2] return HAL_OK; - 80018bc: 2300 movs r3, #0 + 800194c: 2300 movs r3, #0 } - 80018be: 0018 movs r0, r3 - 80018c0: 46bd mov sp, r7 - 80018c2: b004 add sp, #16 - 80018c4: bd80 pop {r7, pc} - 80018c6: 46c0 nop ; (mov r8, r8) - 80018c8: bffdfff8 .word 0xbffdfff8 - 80018cc: 40020000 .word 0x40020000 - 80018d0: ffff800f .word 0xffff800f - 80018d4: 400200a8 .word 0x400200a8 + 800194e: 0018 movs r0, r3 + 8001950: 46bd mov sp, r7 + 8001952: b004 add sp, #16 + 8001954: bd80 pop {r7, pc} + 8001956: 46c0 nop ; (mov r8, r8) + 8001958: bffdfff8 .word 0xbffdfff8 + 800195c: 40020000 .word 0x40020000 + 8001960: ffff800f .word 0xffff800f + 8001964: 400200a8 .word 0x400200a8 -080018d8 : +08001968 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) { - 80018d8: b580 push {r7, lr} - 80018da: b084 sub sp, #16 - 80018dc: af00 add r7, sp, #0 - 80018de: 6078 str r0, [r7, #4] + 8001968: b580 push {r7, lr} + 800196a: b084 sub sp, #16 + 800196c: af00 add r7, sp, #0 + 800196e: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 80018e0: 230f movs r3, #15 - 80018e2: 18fb adds r3, r7, r3 - 80018e4: 2200 movs r2, #0 - 80018e6: 701a strb r2, [r3, #0] + 8001970: 230f movs r3, #15 + 8001972: 18fb adds r3, r7, r3 + 8001974: 2200 movs r2, #0 + 8001976: 701a strb r2, [r3, #0] /* Check the DMA peripheral state */ if(hdma->State != HAL_DMA_STATE_BUSY) - 80018e8: 687b ldr r3, [r7, #4] - 80018ea: 2225 movs r2, #37 ; 0x25 - 80018ec: 5c9b ldrb r3, [r3, r2] - 80018ee: b2db uxtb r3, r3 - 80018f0: 2b02 cmp r3, #2 - 80018f2: d008 beq.n 8001906 + 8001978: 687b ldr r3, [r7, #4] + 800197a: 2225 movs r2, #37 ; 0x25 + 800197c: 5c9b ldrb r3, [r3, r2] + 800197e: b2db uxtb r3, r3 + 8001980: 2b02 cmp r3, #2 + 8001982: d008 beq.n 8001996 { hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 80018f4: 687b ldr r3, [r7, #4] - 80018f6: 2204 movs r2, #4 - 80018f8: 63da str r2, [r3, #60] ; 0x3c + 8001984: 687b ldr r3, [r7, #4] + 8001986: 2204 movs r2, #4 + 8001988: 63da str r2, [r3, #60] ; 0x3c /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80018fa: 687b ldr r3, [r7, #4] - 80018fc: 2224 movs r2, #36 ; 0x24 - 80018fe: 2100 movs r1, #0 - 8001900: 5499 strb r1, [r3, r2] + 800198a: 687b ldr r3, [r7, #4] + 800198c: 2224 movs r2, #36 ; 0x24 + 800198e: 2100 movs r1, #0 + 8001990: 5499 strb r1, [r3, r2] return HAL_ERROR; - 8001902: 2301 movs r3, #1 - 8001904: e024 b.n 8001950 + 8001992: 2301 movs r3, #1 + 8001994: e024 b.n 80019e0 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8001906: 687b ldr r3, [r7, #4] - 8001908: 681b ldr r3, [r3, #0] - 800190a: 681a ldr r2, [r3, #0] - 800190c: 687b ldr r3, [r7, #4] - 800190e: 681b ldr r3, [r3, #0] - 8001910: 210e movs r1, #14 - 8001912: 438a bics r2, r1 - 8001914: 601a str r2, [r3, #0] + 8001996: 687b ldr r3, [r7, #4] + 8001998: 681b ldr r3, [r3, #0] + 800199a: 681a ldr r2, [r3, #0] + 800199c: 687b ldr r3, [r7, #4] + 800199e: 681b ldr r3, [r3, #0] + 80019a0: 210e movs r1, #14 + 80019a2: 438a bics r2, r1 + 80019a4: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 8001916: 687b ldr r3, [r7, #4] - 8001918: 681b ldr r3, [r3, #0] - 800191a: 681a ldr r2, [r3, #0] - 800191c: 687b ldr r3, [r7, #4] - 800191e: 681b ldr r3, [r3, #0] - 8001920: 2101 movs r1, #1 - 8001922: 438a bics r2, r1 - 8001924: 601a str r2, [r3, #0] + 80019a6: 687b ldr r3, [r7, #4] + 80019a8: 681b ldr r3, [r3, #0] + 80019aa: 681a ldr r2, [r3, #0] + 80019ac: 687b ldr r3, [r7, #4] + 80019ae: 681b ldr r3, [r3, #0] + 80019b0: 2101 movs r1, #1 + 80019b2: 438a bics r2, r1 + 80019b4: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU)); - 8001926: 687b ldr r3, [r7, #4] - 8001928: 6c5b ldr r3, [r3, #68] ; 0x44 - 800192a: 221c movs r2, #28 - 800192c: 401a ands r2, r3 - 800192e: 687b ldr r3, [r7, #4] - 8001930: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001932: 2101 movs r1, #1 - 8001934: 4091 lsls r1, r2 - 8001936: 000a movs r2, r1 - 8001938: 605a str r2, [r3, #4] + 80019b6: 687b ldr r3, [r7, #4] + 80019b8: 6c5b ldr r3, [r3, #68] ; 0x44 + 80019ba: 221c movs r2, #28 + 80019bc: 401a ands r2, r3 + 80019be: 687b ldr r3, [r7, #4] + 80019c0: 6c1b ldr r3, [r3, #64] ; 0x40 + 80019c2: 2101 movs r1, #1 + 80019c4: 4091 lsls r1, r2 + 80019c6: 000a movs r2, r1 + 80019c8: 605a str r2, [r3, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 800193a: 687b ldr r3, [r7, #4] - 800193c: 2225 movs r2, #37 ; 0x25 - 800193e: 2101 movs r1, #1 - 8001940: 5499 strb r1, [r3, r2] + 80019ca: 687b ldr r3, [r7, #4] + 80019cc: 2225 movs r2, #37 ; 0x25 + 80019ce: 2101 movs r1, #1 + 80019d0: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8001942: 687b ldr r3, [r7, #4] - 8001944: 2224 movs r2, #36 ; 0x24 - 8001946: 2100 movs r1, #0 - 8001948: 5499 strb r1, [r3, r2] + 80019d2: 687b ldr r3, [r7, #4] + 80019d4: 2224 movs r2, #36 ; 0x24 + 80019d6: 2100 movs r1, #0 + 80019d8: 5499 strb r1, [r3, r2] return status; - 800194a: 230f movs r3, #15 - 800194c: 18fb adds r3, r7, r3 - 800194e: 781b ldrb r3, [r3, #0] + 80019da: 230f movs r3, #15 + 80019dc: 18fb adds r3, r7, r3 + 80019de: 781b ldrb r3, [r3, #0] } } - 8001950: 0018 movs r0, r3 - 8001952: 46bd mov sp, r7 - 8001954: b004 add sp, #16 - 8001956: bd80 pop {r7, pc} + 80019e0: 0018 movs r0, r3 + 80019e2: 46bd mov sp, r7 + 80019e4: b004 add sp, #16 + 80019e6: bd80 pop {r7, pc} -08001958 : +080019e8 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval HAL status */ HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) { - 8001958: b580 push {r7, lr} - 800195a: b084 sub sp, #16 - 800195c: af00 add r7, sp, #0 - 800195e: 6078 str r0, [r7, #4] + 80019e8: b580 push {r7, lr} + 80019ea: b084 sub sp, #16 + 80019ec: af00 add r7, sp, #0 + 80019ee: 6078 str r0, [r7, #4] HAL_StatusTypeDef status = HAL_OK; - 8001960: 210f movs r1, #15 - 8001962: 187b adds r3, r7, r1 - 8001964: 2200 movs r2, #0 - 8001966: 701a strb r2, [r3, #0] + 80019f0: 210f movs r1, #15 + 80019f2: 187b adds r3, r7, r1 + 80019f4: 2200 movs r2, #0 + 80019f6: 701a strb r2, [r3, #0] if(HAL_DMA_STATE_BUSY != hdma->State) - 8001968: 687b ldr r3, [r7, #4] - 800196a: 2225 movs r2, #37 ; 0x25 - 800196c: 5c9b ldrb r3, [r3, r2] - 800196e: b2db uxtb r3, r3 - 8001970: 2b02 cmp r3, #2 - 8001972: d006 beq.n 8001982 + 80019f8: 687b ldr r3, [r7, #4] + 80019fa: 2225 movs r2, #37 ; 0x25 + 80019fc: 5c9b ldrb r3, [r3, r2] + 80019fe: b2db uxtb r3, r3 + 8001a00: 2b02 cmp r3, #2 + 8001a02: d006 beq.n 8001a12 { /* no transfer ongoing */ hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; - 8001974: 687b ldr r3, [r7, #4] - 8001976: 2204 movs r2, #4 - 8001978: 63da str r2, [r3, #60] ; 0x3c + 8001a04: 687b ldr r3, [r7, #4] + 8001a06: 2204 movs r2, #4 + 8001a08: 63da str r2, [r3, #60] ; 0x3c status = HAL_ERROR; - 800197a: 187b adds r3, r7, r1 - 800197c: 2201 movs r2, #1 - 800197e: 701a strb r2, [r3, #0] - 8001980: e02a b.n 80019d8 + 8001a0a: 187b adds r3, r7, r1 + 8001a0c: 2201 movs r2, #1 + 8001a0e: 701a strb r2, [r3, #0] + 8001a10: e02a b.n 8001a68 } else { /* Disable DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8001982: 687b ldr r3, [r7, #4] - 8001984: 681b ldr r3, [r3, #0] - 8001986: 681a ldr r2, [r3, #0] - 8001988: 687b ldr r3, [r7, #4] - 800198a: 681b ldr r3, [r3, #0] - 800198c: 210e movs r1, #14 - 800198e: 438a bics r2, r1 - 8001990: 601a str r2, [r3, #0] + 8001a12: 687b ldr r3, [r7, #4] + 8001a14: 681b ldr r3, [r3, #0] + 8001a16: 681a ldr r2, [r3, #0] + 8001a18: 687b ldr r3, [r7, #4] + 8001a1a: 681b ldr r3, [r3, #0] + 8001a1c: 210e movs r1, #14 + 8001a1e: 438a bics r2, r1 + 8001a20: 601a str r2, [r3, #0] /* Disable the channel */ __HAL_DMA_DISABLE(hdma); - 8001992: 687b ldr r3, [r7, #4] - 8001994: 681b ldr r3, [r3, #0] - 8001996: 681a ldr r2, [r3, #0] - 8001998: 687b ldr r3, [r7, #4] - 800199a: 681b ldr r3, [r3, #0] - 800199c: 2101 movs r1, #1 - 800199e: 438a bics r2, r1 - 80019a0: 601a str r2, [r3, #0] + 8001a22: 687b ldr r3, [r7, #4] + 8001a24: 681b ldr r3, [r3, #0] + 8001a26: 681a ldr r2, [r3, #0] + 8001a28: 687b ldr r3, [r7, #4] + 8001a2a: 681b ldr r3, [r3, #0] + 8001a2c: 2101 movs r1, #1 + 8001a2e: 438a bics r2, r1 + 8001a30: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU)); - 80019a2: 687b ldr r3, [r7, #4] - 80019a4: 6c5b ldr r3, [r3, #68] ; 0x44 - 80019a6: 221c movs r2, #28 - 80019a8: 401a ands r2, r3 - 80019aa: 687b ldr r3, [r7, #4] - 80019ac: 6c1b ldr r3, [r3, #64] ; 0x40 - 80019ae: 2101 movs r1, #1 - 80019b0: 4091 lsls r1, r2 - 80019b2: 000a movs r2, r1 - 80019b4: 605a str r2, [r3, #4] + 8001a32: 687b ldr r3, [r7, #4] + 8001a34: 6c5b ldr r3, [r3, #68] ; 0x44 + 8001a36: 221c movs r2, #28 + 8001a38: 401a ands r2, r3 + 8001a3a: 687b ldr r3, [r7, #4] + 8001a3c: 6c1b ldr r3, [r3, #64] ; 0x40 + 8001a3e: 2101 movs r1, #1 + 8001a40: 4091 lsls r1, r2 + 8001a42: 000a movs r2, r1 + 8001a44: 605a str r2, [r3, #4] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 80019b6: 687b ldr r3, [r7, #4] - 80019b8: 2225 movs r2, #37 ; 0x25 - 80019ba: 2101 movs r1, #1 - 80019bc: 5499 strb r1, [r3, r2] + 8001a46: 687b ldr r3, [r7, #4] + 8001a48: 2225 movs r2, #37 ; 0x25 + 8001a4a: 2101 movs r1, #1 + 8001a4c: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hdma); - 80019be: 687b ldr r3, [r7, #4] - 80019c0: 2224 movs r2, #36 ; 0x24 - 80019c2: 2100 movs r1, #0 - 80019c4: 5499 strb r1, [r3, r2] + 8001a4e: 687b ldr r3, [r7, #4] + 8001a50: 2224 movs r2, #36 ; 0x24 + 8001a52: 2100 movs r1, #0 + 8001a54: 5499 strb r1, [r3, r2] /* Call User Abort callback */ if(hdma->XferAbortCallback != NULL) - 80019c6: 687b ldr r3, [r7, #4] - 80019c8: 6b9b ldr r3, [r3, #56] ; 0x38 - 80019ca: 2b00 cmp r3, #0 - 80019cc: d004 beq.n 80019d8 + 8001a56: 687b ldr r3, [r7, #4] + 8001a58: 6b9b ldr r3, [r3, #56] ; 0x38 + 8001a5a: 2b00 cmp r3, #0 + 8001a5c: d004 beq.n 8001a68 { hdma->XferAbortCallback(hdma); - 80019ce: 687b ldr r3, [r7, #4] - 80019d0: 6b9b ldr r3, [r3, #56] ; 0x38 - 80019d2: 687a ldr r2, [r7, #4] - 80019d4: 0010 movs r0, r2 - 80019d6: 4798 blx r3 + 8001a5e: 687b ldr r3, [r7, #4] + 8001a60: 6b9b ldr r3, [r3, #56] ; 0x38 + 8001a62: 687a ldr r2, [r7, #4] + 8001a64: 0010 movs r0, r2 + 8001a66: 4798 blx r3 } } return status; - 80019d8: 230f movs r3, #15 - 80019da: 18fb adds r3, r7, r3 - 80019dc: 781b ldrb r3, [r3, #0] + 8001a68: 230f movs r3, #15 + 8001a6a: 18fb adds r3, r7, r3 + 8001a6c: 781b ldrb r3, [r3, #0] } - 80019de: 0018 movs r0, r3 - 80019e0: 46bd mov sp, r7 - 80019e2: b004 add sp, #16 - 80019e4: bd80 pop {r7, pc} + 8001a6e: 0018 movs r0, r3 + 8001a70: 46bd mov sp, r7 + 8001a72: b004 add sp, #16 + 8001a74: bd80 pop {r7, pc} -080019e6 : +08001a76 : * @param hdma pointer to a DMA_HandleTypeDef structure that contains * the configuration information for the specified DMA Channel. * @retval None */ void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) { - 80019e6: b580 push {r7, lr} - 80019e8: b084 sub sp, #16 - 80019ea: af00 add r7, sp, #0 - 80019ec: 6078 str r0, [r7, #4] + 8001a76: b580 push {r7, lr} + 8001a78: b084 sub sp, #16 + 8001a7a: af00 add r7, sp, #0 + 8001a7c: 6078 str r0, [r7, #4] uint32_t flag_it = hdma->DmaBaseAddress->ISR; - 80019ee: 687b ldr r3, [r7, #4] - 80019f0: 6c1b ldr r3, [r3, #64] ; 0x40 - 80019f2: 681b ldr r3, [r3, #0] - 80019f4: 60fb str r3, [r7, #12] + 8001a7e: 687b ldr r3, [r7, #4] + 8001a80: 6c1b ldr r3, [r3, #64] ; 0x40 + 8001a82: 681b ldr r3, [r3, #0] + 8001a84: 60fb str r3, [r7, #12] uint32_t source_it = hdma->Instance->CCR; - 80019f6: 687b ldr r3, [r7, #4] - 80019f8: 681b ldr r3, [r3, #0] - 80019fa: 681b ldr r3, [r3, #0] - 80019fc: 60bb str r3, [r7, #8] + 8001a86: 687b ldr r3, [r7, #4] + 8001a88: 681b ldr r3, [r3, #0] + 8001a8a: 681b ldr r3, [r3, #0] + 8001a8c: 60bb str r3, [r7, #8] /* Half Transfer Complete Interrupt management ******************************/ if ((0U != (flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU)))) && (0U != (source_it & DMA_IT_HT))) - 80019fe: 687b ldr r3, [r7, #4] - 8001a00: 6c5b ldr r3, [r3, #68] ; 0x44 - 8001a02: 221c movs r2, #28 - 8001a04: 4013 ands r3, r2 - 8001a06: 2204 movs r2, #4 - 8001a08: 409a lsls r2, r3 - 8001a0a: 0013 movs r3, r2 - 8001a0c: 68fa ldr r2, [r7, #12] - 8001a0e: 4013 ands r3, r2 - 8001a10: d026 beq.n 8001a60 - 8001a12: 68bb ldr r3, [r7, #8] - 8001a14: 2204 movs r2, #4 - 8001a16: 4013 ands r3, r2 - 8001a18: d022 beq.n 8001a60 + 8001a8e: 687b ldr r3, [r7, #4] + 8001a90: 6c5b ldr r3, [r3, #68] ; 0x44 + 8001a92: 221c movs r2, #28 + 8001a94: 4013 ands r3, r2 + 8001a96: 2204 movs r2, #4 + 8001a98: 409a lsls r2, r3 + 8001a9a: 0013 movs r3, r2 + 8001a9c: 68fa ldr r2, [r7, #12] + 8001a9e: 4013 ands r3, r2 + 8001aa0: d026 beq.n 8001af0 + 8001aa2: 68bb ldr r3, [r7, #8] + 8001aa4: 2204 movs r2, #4 + 8001aa6: 4013 ands r3, r2 + 8001aa8: d022 beq.n 8001af0 { /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 8001a1a: 687b ldr r3, [r7, #4] - 8001a1c: 681b ldr r3, [r3, #0] - 8001a1e: 681b ldr r3, [r3, #0] - 8001a20: 2220 movs r2, #32 - 8001a22: 4013 ands r3, r2 - 8001a24: d107 bne.n 8001a36 + 8001aaa: 687b ldr r3, [r7, #4] + 8001aac: 681b ldr r3, [r3, #0] + 8001aae: 681b ldr r3, [r3, #0] + 8001ab0: 2220 movs r2, #32 + 8001ab2: 4013 ands r3, r2 + 8001ab4: d107 bne.n 8001ac6 { /* Disable the half transfer interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT); - 8001a26: 687b ldr r3, [r7, #4] - 8001a28: 681b ldr r3, [r3, #0] - 8001a2a: 681a ldr r2, [r3, #0] - 8001a2c: 687b ldr r3, [r7, #4] - 8001a2e: 681b ldr r3, [r3, #0] - 8001a30: 2104 movs r1, #4 - 8001a32: 438a bics r2, r1 - 8001a34: 601a str r2, [r3, #0] + 8001ab6: 687b ldr r3, [r7, #4] + 8001ab8: 681b ldr r3, [r3, #0] + 8001aba: 681a ldr r2, [r3, #0] + 8001abc: 687b ldr r3, [r7, #4] + 8001abe: 681b ldr r3, [r3, #0] + 8001ac0: 2104 movs r1, #4 + 8001ac2: 438a bics r2, r1 + 8001ac4: 601a str r2, [r3, #0] } /* Clear the half transfer complete flag */ hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1cU); - 8001a36: 687b ldr r3, [r7, #4] - 8001a38: 6c5b ldr r3, [r3, #68] ; 0x44 - 8001a3a: 221c movs r2, #28 - 8001a3c: 401a ands r2, r3 - 8001a3e: 687b ldr r3, [r7, #4] - 8001a40: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001a42: 2104 movs r1, #4 - 8001a44: 4091 lsls r1, r2 - 8001a46: 000a movs r2, r1 - 8001a48: 605a str r2, [r3, #4] + 8001ac6: 687b ldr r3, [r7, #4] + 8001ac8: 6c5b ldr r3, [r3, #68] ; 0x44 + 8001aca: 221c movs r2, #28 + 8001acc: 401a ands r2, r3 + 8001ace: 687b ldr r3, [r7, #4] + 8001ad0: 6c1b ldr r3, [r3, #64] ; 0x40 + 8001ad2: 2104 movs r1, #4 + 8001ad4: 4091 lsls r1, r2 + 8001ad6: 000a movs r2, r1 + 8001ad8: 605a str r2, [r3, #4] /* DMA peripheral state is not updated in Half Transfer */ /* but in Transfer Complete case */ if(hdma->XferHalfCpltCallback != NULL) - 8001a4a: 687b ldr r3, [r7, #4] - 8001a4c: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001a4e: 2b00 cmp r3, #0 - 8001a50: d100 bne.n 8001a54 - 8001a52: e071 b.n 8001b38 + 8001ada: 687b ldr r3, [r7, #4] + 8001adc: 6b1b ldr r3, [r3, #48] ; 0x30 + 8001ade: 2b00 cmp r3, #0 + 8001ae0: d100 bne.n 8001ae4 + 8001ae2: e071 b.n 8001bc8 { /* Half transfer callback */ hdma->XferHalfCpltCallback(hdma); - 8001a54: 687b ldr r3, [r7, #4] - 8001a56: 6b1b ldr r3, [r3, #48] ; 0x30 - 8001a58: 687a ldr r2, [r7, #4] - 8001a5a: 0010 movs r0, r2 - 8001a5c: 4798 blx r3 + 8001ae4: 687b ldr r3, [r7, #4] + 8001ae6: 6b1b ldr r3, [r3, #48] ; 0x30 + 8001ae8: 687a ldr r2, [r7, #4] + 8001aea: 0010 movs r0, r2 + 8001aec: 4798 blx r3 if(hdma->XferHalfCpltCallback != NULL) - 8001a5e: e06b b.n 8001b38 + 8001aee: e06b b.n 8001bc8 } } /* Transfer Complete Interrupt management ***********************************/ else if ((0U != (flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1cU)))) && (0U != (source_it & DMA_IT_TC))) - 8001a60: 687b ldr r3, [r7, #4] - 8001a62: 6c5b ldr r3, [r3, #68] ; 0x44 - 8001a64: 221c movs r2, #28 - 8001a66: 4013 ands r3, r2 - 8001a68: 2202 movs r2, #2 - 8001a6a: 409a lsls r2, r3 - 8001a6c: 0013 movs r3, r2 - 8001a6e: 68fa ldr r2, [r7, #12] - 8001a70: 4013 ands r3, r2 - 8001a72: d02d beq.n 8001ad0 - 8001a74: 68bb ldr r3, [r7, #8] - 8001a76: 2202 movs r2, #2 - 8001a78: 4013 ands r3, r2 - 8001a7a: d029 beq.n 8001ad0 + 8001af0: 687b ldr r3, [r7, #4] + 8001af2: 6c5b ldr r3, [r3, #68] ; 0x44 + 8001af4: 221c movs r2, #28 + 8001af6: 4013 ands r3, r2 + 8001af8: 2202 movs r2, #2 + 8001afa: 409a lsls r2, r3 + 8001afc: 0013 movs r3, r2 + 8001afe: 68fa ldr r2, [r7, #12] + 8001b00: 4013 ands r3, r2 + 8001b02: d02d beq.n 8001b60 + 8001b04: 68bb ldr r3, [r7, #8] + 8001b06: 2202 movs r2, #2 + 8001b08: 4013 ands r3, r2 + 8001b0a: d029 beq.n 8001b60 { if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) - 8001a7c: 687b ldr r3, [r7, #4] - 8001a7e: 681b ldr r3, [r3, #0] - 8001a80: 681b ldr r3, [r3, #0] - 8001a82: 2220 movs r2, #32 - 8001a84: 4013 ands r3, r2 - 8001a86: d10b bne.n 8001aa0 + 8001b0c: 687b ldr r3, [r7, #4] + 8001b0e: 681b ldr r3, [r3, #0] + 8001b10: 681b ldr r3, [r3, #0] + 8001b12: 2220 movs r2, #32 + 8001b14: 4013 ands r3, r2 + 8001b16: d10b bne.n 8001b30 { /* Disable the transfer complete and error interrupt */ __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC); - 8001a88: 687b ldr r3, [r7, #4] - 8001a8a: 681b ldr r3, [r3, #0] - 8001a8c: 681a ldr r2, [r3, #0] - 8001a8e: 687b ldr r3, [r7, #4] - 8001a90: 681b ldr r3, [r3, #0] - 8001a92: 210a movs r1, #10 - 8001a94: 438a bics r2, r1 - 8001a96: 601a str r2, [r3, #0] + 8001b18: 687b ldr r3, [r7, #4] + 8001b1a: 681b ldr r3, [r3, #0] + 8001b1c: 681a ldr r2, [r3, #0] + 8001b1e: 687b ldr r3, [r7, #4] + 8001b20: 681b ldr r3, [r3, #0] + 8001b22: 210a movs r1, #10 + 8001b24: 438a bics r2, r1 + 8001b26: 601a str r2, [r3, #0] /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8001a98: 687b ldr r3, [r7, #4] - 8001a9a: 2225 movs r2, #37 ; 0x25 - 8001a9c: 2101 movs r1, #1 - 8001a9e: 5499 strb r1, [r3, r2] + 8001b28: 687b ldr r3, [r7, #4] + 8001b2a: 2225 movs r2, #37 ; 0x25 + 8001b2c: 2101 movs r1, #1 + 8001b2e: 5499 strb r1, [r3, r2] } /* Clear the transfer complete flag */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1cU)); - 8001aa0: 687b ldr r3, [r7, #4] - 8001aa2: 6c5b ldr r3, [r3, #68] ; 0x44 - 8001aa4: 221c movs r2, #28 - 8001aa6: 401a ands r2, r3 - 8001aa8: 687b ldr r3, [r7, #4] - 8001aaa: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001aac: 2102 movs r1, #2 - 8001aae: 4091 lsls r1, r2 - 8001ab0: 000a movs r2, r1 - 8001ab2: 605a str r2, [r3, #4] + 8001b30: 687b ldr r3, [r7, #4] + 8001b32: 6c5b ldr r3, [r3, #68] ; 0x44 + 8001b34: 221c movs r2, #28 + 8001b36: 401a ands r2, r3 + 8001b38: 687b ldr r3, [r7, #4] + 8001b3a: 6c1b ldr r3, [r3, #64] ; 0x40 + 8001b3c: 2102 movs r1, #2 + 8001b3e: 4091 lsls r1, r2 + 8001b40: 000a movs r2, r1 + 8001b42: 605a str r2, [r3, #4] /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8001ab4: 687b ldr r3, [r7, #4] - 8001ab6: 2224 movs r2, #36 ; 0x24 - 8001ab8: 2100 movs r1, #0 - 8001aba: 5499 strb r1, [r3, r2] + 8001b44: 687b ldr r3, [r7, #4] + 8001b46: 2224 movs r2, #36 ; 0x24 + 8001b48: 2100 movs r1, #0 + 8001b4a: 5499 strb r1, [r3, r2] if(hdma->XferCpltCallback != NULL) - 8001abc: 687b ldr r3, [r7, #4] - 8001abe: 6adb ldr r3, [r3, #44] ; 0x2c - 8001ac0: 2b00 cmp r3, #0 - 8001ac2: d039 beq.n 8001b38 + 8001b4c: 687b ldr r3, [r7, #4] + 8001b4e: 6adb ldr r3, [r3, #44] ; 0x2c + 8001b50: 2b00 cmp r3, #0 + 8001b52: d039 beq.n 8001bc8 { /* Transfer complete callback */ hdma->XferCpltCallback(hdma); - 8001ac4: 687b ldr r3, [r7, #4] - 8001ac6: 6adb ldr r3, [r3, #44] ; 0x2c - 8001ac8: 687a ldr r2, [r7, #4] - 8001aca: 0010 movs r0, r2 - 8001acc: 4798 blx r3 + 8001b54: 687b ldr r3, [r7, #4] + 8001b56: 6adb ldr r3, [r3, #44] ; 0x2c + 8001b58: 687a ldr r2, [r7, #4] + 8001b5a: 0010 movs r0, r2 + 8001b5c: 4798 blx r3 if(hdma->XferCpltCallback != NULL) - 8001ace: e033 b.n 8001b38 + 8001b5e: e033 b.n 8001bc8 } } /* Transfer Error Interrupt management **************************************/ else if ((0U != (flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1cU)))) && (0U != (source_it & DMA_IT_TE))) - 8001ad0: 687b ldr r3, [r7, #4] - 8001ad2: 6c5b ldr r3, [r3, #68] ; 0x44 - 8001ad4: 221c movs r2, #28 - 8001ad6: 4013 ands r3, r2 - 8001ad8: 2208 movs r2, #8 - 8001ada: 409a lsls r2, r3 - 8001adc: 0013 movs r3, r2 - 8001ade: 68fa ldr r2, [r7, #12] - 8001ae0: 4013 ands r3, r2 - 8001ae2: d02a beq.n 8001b3a - 8001ae4: 68bb ldr r3, [r7, #8] - 8001ae6: 2208 movs r2, #8 - 8001ae8: 4013 ands r3, r2 - 8001aea: d026 beq.n 8001b3a + 8001b60: 687b ldr r3, [r7, #4] + 8001b62: 6c5b ldr r3, [r3, #68] ; 0x44 + 8001b64: 221c movs r2, #28 + 8001b66: 4013 ands r3, r2 + 8001b68: 2208 movs r2, #8 + 8001b6a: 409a lsls r2, r3 + 8001b6c: 0013 movs r3, r2 + 8001b6e: 68fa ldr r2, [r7, #12] + 8001b70: 4013 ands r3, r2 + 8001b72: d02a beq.n 8001bca + 8001b74: 68bb ldr r3, [r7, #8] + 8001b76: 2208 movs r2, #8 + 8001b78: 4013 ands r3, r2 + 8001b7a: d026 beq.n 8001bca { /* When a DMA transfer error occurs */ /* A hardware clear of its EN bits is performed */ /* Disable ALL DMA IT */ __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE)); - 8001aec: 687b ldr r3, [r7, #4] - 8001aee: 681b ldr r3, [r3, #0] - 8001af0: 681a ldr r2, [r3, #0] - 8001af2: 687b ldr r3, [r7, #4] - 8001af4: 681b ldr r3, [r3, #0] - 8001af6: 210e movs r1, #14 - 8001af8: 438a bics r2, r1 - 8001afa: 601a str r2, [r3, #0] + 8001b7c: 687b ldr r3, [r7, #4] + 8001b7e: 681b ldr r3, [r3, #0] + 8001b80: 681a ldr r2, [r3, #0] + 8001b82: 687b ldr r3, [r7, #4] + 8001b84: 681b ldr r3, [r3, #0] + 8001b86: 210e movs r1, #14 + 8001b88: 438a bics r2, r1 + 8001b8a: 601a str r2, [r3, #0] /* Clear all flags */ hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU)); - 8001afc: 687b ldr r3, [r7, #4] - 8001afe: 6c5b ldr r3, [r3, #68] ; 0x44 - 8001b00: 221c movs r2, #28 - 8001b02: 401a ands r2, r3 - 8001b04: 687b ldr r3, [r7, #4] - 8001b06: 6c1b ldr r3, [r3, #64] ; 0x40 - 8001b08: 2101 movs r1, #1 - 8001b0a: 4091 lsls r1, r2 - 8001b0c: 000a movs r2, r1 - 8001b0e: 605a str r2, [r3, #4] + 8001b8c: 687b ldr r3, [r7, #4] + 8001b8e: 6c5b ldr r3, [r3, #68] ; 0x44 + 8001b90: 221c movs r2, #28 + 8001b92: 401a ands r2, r3 + 8001b94: 687b ldr r3, [r7, #4] + 8001b96: 6c1b ldr r3, [r3, #64] ; 0x40 + 8001b98: 2101 movs r1, #1 + 8001b9a: 4091 lsls r1, r2 + 8001b9c: 000a movs r2, r1 + 8001b9e: 605a str r2, [r3, #4] /* Update error code */ hdma->ErrorCode = HAL_DMA_ERROR_TE; - 8001b10: 687b ldr r3, [r7, #4] - 8001b12: 2201 movs r2, #1 - 8001b14: 63da str r2, [r3, #60] ; 0x3c + 8001ba0: 687b ldr r3, [r7, #4] + 8001ba2: 2201 movs r2, #1 + 8001ba4: 63da str r2, [r3, #60] ; 0x3c /* Change the DMA state */ hdma->State = HAL_DMA_STATE_READY; - 8001b16: 687b ldr r3, [r7, #4] - 8001b18: 2225 movs r2, #37 ; 0x25 - 8001b1a: 2101 movs r1, #1 - 8001b1c: 5499 strb r1, [r3, r2] + 8001ba6: 687b ldr r3, [r7, #4] + 8001ba8: 2225 movs r2, #37 ; 0x25 + 8001baa: 2101 movs r1, #1 + 8001bac: 5499 strb r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(hdma); - 8001b1e: 687b ldr r3, [r7, #4] - 8001b20: 2224 movs r2, #36 ; 0x24 - 8001b22: 2100 movs r1, #0 - 8001b24: 5499 strb r1, [r3, r2] + 8001bae: 687b ldr r3, [r7, #4] + 8001bb0: 2224 movs r2, #36 ; 0x24 + 8001bb2: 2100 movs r1, #0 + 8001bb4: 5499 strb r1, [r3, r2] if (hdma->XferErrorCallback != NULL) - 8001b26: 687b ldr r3, [r7, #4] - 8001b28: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001b2a: 2b00 cmp r3, #0 - 8001b2c: d005 beq.n 8001b3a + 8001bb6: 687b ldr r3, [r7, #4] + 8001bb8: 6b5b ldr r3, [r3, #52] ; 0x34 + 8001bba: 2b00 cmp r3, #0 + 8001bbc: d005 beq.n 8001bca { /* Transfer error callback */ hdma->XferErrorCallback(hdma); - 8001b2e: 687b ldr r3, [r7, #4] - 8001b30: 6b5b ldr r3, [r3, #52] ; 0x34 - 8001b32: 687a ldr r2, [r7, #4] - 8001b34: 0010 movs r0, r2 - 8001b36: 4798 blx r3 + 8001bbe: 687b ldr r3, [r7, #4] + 8001bc0: 6b5b ldr r3, [r3, #52] ; 0x34 + 8001bc2: 687a ldr r2, [r7, #4] + 8001bc4: 0010 movs r0, r2 + 8001bc6: 4798 blx r3 } else { /* Nothing To Do */ } return; - 8001b38: 46c0 nop ; (mov r8, r8) - 8001b3a: 46c0 nop ; (mov r8, r8) + 8001bc8: 46c0 nop ; (mov r8, r8) + 8001bca: 46c0 nop ; (mov r8, r8) } - 8001b3c: 46bd mov sp, r7 - 8001b3e: b004 add sp, #16 - 8001b40: bd80 pop {r7, pc} + 8001bcc: 46bd mov sp, r7 + 8001bce: b004 add sp, #16 + 8001bd0: bd80 pop {r7, pc} ... -08001b44 : +08001bd4 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { - 8001b44: b580 push {r7, lr} - 8001b46: b086 sub sp, #24 - 8001b48: af00 add r7, sp, #0 - 8001b4a: 6078 str r0, [r7, #4] - 8001b4c: 6039 str r1, [r7, #0] + 8001bd4: b580 push {r7, lr} + 8001bd6: b086 sub sp, #24 + 8001bd8: af00 add r7, sp, #0 + 8001bda: 6078 str r0, [r7, #4] + 8001bdc: 6039 str r1, [r7, #0] uint32_t position = 0x00U; - 8001b4e: 2300 movs r3, #0 - 8001b50: 617b str r3, [r7, #20] + 8001bde: 2300 movs r3, #0 + 8001be0: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00U; - 8001b52: 2300 movs r3, #0 - 8001b54: 60fb str r3, [r7, #12] + 8001be2: 2300 movs r3, #0 + 8001be4: 60fb str r3, [r7, #12] uint32_t temp = 0x00U; - 8001b56: 2300 movs r3, #0 - 8001b58: 613b str r3, [r7, #16] + 8001be6: 2300 movs r3, #0 + 8001be8: 613b str r3, [r7, #16] /* Check the parameters */ assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, (GPIO_Init->Pin))); /* Configure the port pins */ while (((GPIO_Init->Pin) >> position) != 0) - 8001b5a: e14f b.n 8001dfc + 8001bea: e14f b.n 8001e8c { /* Get the IO position */ iocurrent = (GPIO_Init->Pin) & (1U << position); - 8001b5c: 683b ldr r3, [r7, #0] - 8001b5e: 681b ldr r3, [r3, #0] - 8001b60: 2101 movs r1, #1 - 8001b62: 697a ldr r2, [r7, #20] - 8001b64: 4091 lsls r1, r2 - 8001b66: 000a movs r2, r1 - 8001b68: 4013 ands r3, r2 - 8001b6a: 60fb str r3, [r7, #12] + 8001bec: 683b ldr r3, [r7, #0] + 8001bee: 681b ldr r3, [r3, #0] + 8001bf0: 2101 movs r1, #1 + 8001bf2: 697a ldr r2, [r7, #20] + 8001bf4: 4091 lsls r1, r2 + 8001bf6: 000a movs r2, r1 + 8001bf8: 4013 ands r3, r2 + 8001bfa: 60fb str r3, [r7, #12] if (iocurrent) - 8001b6c: 68fb ldr r3, [r7, #12] - 8001b6e: 2b00 cmp r3, #0 - 8001b70: d100 bne.n 8001b74 - 8001b72: e140 b.n 8001df6 + 8001bfc: 68fb ldr r3, [r7, #12] + 8001bfe: 2b00 cmp r3, #0 + 8001c00: d100 bne.n 8001c04 + 8001c02: e140 b.n 8001e86 { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || - 8001b74: 683b ldr r3, [r7, #0] - 8001b76: 685b ldr r3, [r3, #4] - 8001b78: 2203 movs r2, #3 - 8001b7a: 4013 ands r3, r2 - 8001b7c: 2b01 cmp r3, #1 - 8001b7e: d005 beq.n 8001b8c + 8001c04: 683b ldr r3, [r7, #0] + 8001c06: 685b ldr r3, [r3, #4] + 8001c08: 2203 movs r2, #3 + 8001c0a: 4013 ands r3, r2 + 8001c0c: 2b01 cmp r3, #1 + 8001c0e: d005 beq.n 8001c1c ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) - 8001b80: 683b ldr r3, [r7, #0] - 8001b82: 685b ldr r3, [r3, #4] - 8001b84: 2203 movs r2, #3 - 8001b86: 4013 ands r3, r2 + 8001c10: 683b ldr r3, [r7, #0] + 8001c12: 685b ldr r3, [r3, #4] + 8001c14: 2203 movs r2, #3 + 8001c16: 4013 ands r3, r2 if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || - 8001b88: 2b02 cmp r3, #2 - 8001b8a: d130 bne.n 8001bee + 8001c18: 2b02 cmp r3, #2 + 8001c1a: d130 bne.n 8001c7e { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; - 8001b8c: 687b ldr r3, [r7, #4] - 8001b8e: 689b ldr r3, [r3, #8] - 8001b90: 613b str r3, [r7, #16] + 8001c1c: 687b ldr r3, [r7, #4] + 8001c1e: 689b ldr r3, [r3, #8] + 8001c20: 613b str r3, [r7, #16] temp &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2U)); - 8001b92: 697b ldr r3, [r7, #20] - 8001b94: 005b lsls r3, r3, #1 - 8001b96: 2203 movs r2, #3 - 8001b98: 409a lsls r2, r3 - 8001b9a: 0013 movs r3, r2 - 8001b9c: 43da mvns r2, r3 - 8001b9e: 693b ldr r3, [r7, #16] - 8001ba0: 4013 ands r3, r2 - 8001ba2: 613b str r3, [r7, #16] + 8001c22: 697b ldr r3, [r7, #20] + 8001c24: 005b lsls r3, r3, #1 + 8001c26: 2203 movs r2, #3 + 8001c28: 409a lsls r2, r3 + 8001c2a: 0013 movs r3, r2 + 8001c2c: 43da mvns r2, r3 + 8001c2e: 693b ldr r3, [r7, #16] + 8001c30: 4013 ands r3, r2 + 8001c32: 613b str r3, [r7, #16] temp |= (GPIO_Init->Speed << (position * 2U)); - 8001ba4: 683b ldr r3, [r7, #0] - 8001ba6: 68da ldr r2, [r3, #12] - 8001ba8: 697b ldr r3, [r7, #20] - 8001baa: 005b lsls r3, r3, #1 - 8001bac: 409a lsls r2, r3 - 8001bae: 0013 movs r3, r2 - 8001bb0: 693a ldr r2, [r7, #16] - 8001bb2: 4313 orrs r3, r2 - 8001bb4: 613b str r3, [r7, #16] + 8001c34: 683b ldr r3, [r7, #0] + 8001c36: 68da ldr r2, [r3, #12] + 8001c38: 697b ldr r3, [r7, #20] + 8001c3a: 005b lsls r3, r3, #1 + 8001c3c: 409a lsls r2, r3 + 8001c3e: 0013 movs r3, r2 + 8001c40: 693a ldr r2, [r7, #16] + 8001c42: 4313 orrs r3, r2 + 8001c44: 613b str r3, [r7, #16] GPIOx->OSPEEDR = temp; - 8001bb6: 687b ldr r3, [r7, #4] - 8001bb8: 693a ldr r2, [r7, #16] - 8001bba: 609a str r2, [r3, #8] + 8001c46: 687b ldr r3, [r7, #4] + 8001c48: 693a ldr r2, [r7, #16] + 8001c4a: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; - 8001bbc: 687b ldr r3, [r7, #4] - 8001bbe: 685b ldr r3, [r3, #4] - 8001bc0: 613b str r3, [r7, #16] + 8001c4c: 687b ldr r3, [r7, #4] + 8001c4e: 685b ldr r3, [r3, #4] + 8001c50: 613b str r3, [r7, #16] temp &= ~(GPIO_OTYPER_OT_0 << position) ; - 8001bc2: 2201 movs r2, #1 - 8001bc4: 697b ldr r3, [r7, #20] - 8001bc6: 409a lsls r2, r3 - 8001bc8: 0013 movs r3, r2 - 8001bca: 43da mvns r2, r3 - 8001bcc: 693b ldr r3, [r7, #16] - 8001bce: 4013 ands r3, r2 - 8001bd0: 613b str r3, [r7, #16] + 8001c52: 2201 movs r2, #1 + 8001c54: 697b ldr r3, [r7, #20] + 8001c56: 409a lsls r2, r3 + 8001c58: 0013 movs r3, r2 + 8001c5a: 43da mvns r2, r3 + 8001c5c: 693b ldr r3, [r7, #16] + 8001c5e: 4013 ands r3, r2 + 8001c60: 613b str r3, [r7, #16] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); - 8001bd2: 683b ldr r3, [r7, #0] - 8001bd4: 685b ldr r3, [r3, #4] - 8001bd6: 091b lsrs r3, r3, #4 - 8001bd8: 2201 movs r2, #1 - 8001bda: 401a ands r2, r3 - 8001bdc: 697b ldr r3, [r7, #20] - 8001bde: 409a lsls r2, r3 - 8001be0: 0013 movs r3, r2 - 8001be2: 693a ldr r2, [r7, #16] - 8001be4: 4313 orrs r3, r2 - 8001be6: 613b str r3, [r7, #16] + 8001c62: 683b ldr r3, [r7, #0] + 8001c64: 685b ldr r3, [r3, #4] + 8001c66: 091b lsrs r3, r3, #4 + 8001c68: 2201 movs r2, #1 + 8001c6a: 401a ands r2, r3 + 8001c6c: 697b ldr r3, [r7, #20] + 8001c6e: 409a lsls r2, r3 + 8001c70: 0013 movs r3, r2 + 8001c72: 693a ldr r2, [r7, #16] + 8001c74: 4313 orrs r3, r2 + 8001c76: 613b str r3, [r7, #16] GPIOx->OTYPER = temp; - 8001be8: 687b ldr r3, [r7, #4] - 8001bea: 693a ldr r2, [r7, #16] - 8001bec: 605a str r2, [r3, #4] + 8001c78: 687b ldr r3, [r7, #4] + 8001c7a: 693a ldr r2, [r7, #16] + 8001c7c: 605a str r2, [r3, #4] } if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) - 8001bee: 683b ldr r3, [r7, #0] - 8001bf0: 685b ldr r3, [r3, #4] - 8001bf2: 2203 movs r2, #3 - 8001bf4: 4013 ands r3, r2 - 8001bf6: 2b03 cmp r3, #3 - 8001bf8: d017 beq.n 8001c2a + 8001c7e: 683b ldr r3, [r7, #0] + 8001c80: 685b ldr r3, [r3, #4] + 8001c82: 2203 movs r2, #3 + 8001c84: 4013 ands r3, r2 + 8001c86: 2b03 cmp r3, #3 + 8001c88: d017 beq.n 8001cba { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; - 8001bfa: 687b ldr r3, [r7, #4] - 8001bfc: 68db ldr r3, [r3, #12] - 8001bfe: 613b str r3, [r7, #16] + 8001c8a: 687b ldr r3, [r7, #4] + 8001c8c: 68db ldr r3, [r3, #12] + 8001c8e: 613b str r3, [r7, #16] temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U)); - 8001c00: 697b ldr r3, [r7, #20] - 8001c02: 005b lsls r3, r3, #1 - 8001c04: 2203 movs r2, #3 - 8001c06: 409a lsls r2, r3 - 8001c08: 0013 movs r3, r2 - 8001c0a: 43da mvns r2, r3 - 8001c0c: 693b ldr r3, [r7, #16] - 8001c0e: 4013 ands r3, r2 - 8001c10: 613b str r3, [r7, #16] + 8001c90: 697b ldr r3, [r7, #20] + 8001c92: 005b lsls r3, r3, #1 + 8001c94: 2203 movs r2, #3 + 8001c96: 409a lsls r2, r3 + 8001c98: 0013 movs r3, r2 + 8001c9a: 43da mvns r2, r3 + 8001c9c: 693b ldr r3, [r7, #16] + 8001c9e: 4013 ands r3, r2 + 8001ca0: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Pull) << (position * 2U)); - 8001c12: 683b ldr r3, [r7, #0] - 8001c14: 689a ldr r2, [r3, #8] - 8001c16: 697b ldr r3, [r7, #20] - 8001c18: 005b lsls r3, r3, #1 - 8001c1a: 409a lsls r2, r3 - 8001c1c: 0013 movs r3, r2 - 8001c1e: 693a ldr r2, [r7, #16] - 8001c20: 4313 orrs r3, r2 - 8001c22: 613b str r3, [r7, #16] + 8001ca2: 683b ldr r3, [r7, #0] + 8001ca4: 689a ldr r2, [r3, #8] + 8001ca6: 697b ldr r3, [r7, #20] + 8001ca8: 005b lsls r3, r3, #1 + 8001caa: 409a lsls r2, r3 + 8001cac: 0013 movs r3, r2 + 8001cae: 693a ldr r2, [r7, #16] + 8001cb0: 4313 orrs r3, r2 + 8001cb2: 613b str r3, [r7, #16] GPIOx->PUPDR = temp; - 8001c24: 687b ldr r3, [r7, #4] - 8001c26: 693a ldr r2, [r7, #16] - 8001c28: 60da str r2, [r3, #12] + 8001cb4: 687b ldr r3, [r7, #4] + 8001cb6: 693a ldr r2, [r7, #16] + 8001cb8: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) - 8001c2a: 683b ldr r3, [r7, #0] - 8001c2c: 685b ldr r3, [r3, #4] - 8001c2e: 2203 movs r2, #3 - 8001c30: 4013 ands r3, r2 - 8001c32: 2b02 cmp r3, #2 - 8001c34: d123 bne.n 8001c7e + 8001cba: 683b ldr r3, [r7, #0] + 8001cbc: 685b ldr r3, [r3, #4] + 8001cbe: 2203 movs r2, #3 + 8001cc0: 4013 ands r3, r2 + 8001cc2: 2b02 cmp r3, #2 + 8001cc4: d123 bne.n 8001d0e /* Check the Alternate function parameters */ assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3U]; - 8001c36: 697b ldr r3, [r7, #20] - 8001c38: 08da lsrs r2, r3, #3 - 8001c3a: 687b ldr r3, [r7, #4] - 8001c3c: 3208 adds r2, #8 - 8001c3e: 0092 lsls r2, r2, #2 - 8001c40: 58d3 ldr r3, [r2, r3] - 8001c42: 613b str r3, [r7, #16] + 8001cc6: 697b ldr r3, [r7, #20] + 8001cc8: 08da lsrs r2, r3, #3 + 8001cca: 687b ldr r3, [r7, #4] + 8001ccc: 3208 adds r2, #8 + 8001cce: 0092 lsls r2, r2, #2 + 8001cd0: 58d3 ldr r3, [r2, r3] + 8001cd2: 613b str r3, [r7, #16] temp &= ~(0xFUL << ((uint32_t)(position & 0x07UL) * 4U)); - 8001c44: 697b ldr r3, [r7, #20] - 8001c46: 2207 movs r2, #7 - 8001c48: 4013 ands r3, r2 - 8001c4a: 009b lsls r3, r3, #2 - 8001c4c: 220f movs r2, #15 - 8001c4e: 409a lsls r2, r3 - 8001c50: 0013 movs r3, r2 - 8001c52: 43da mvns r2, r3 - 8001c54: 693b ldr r3, [r7, #16] - 8001c56: 4013 ands r3, r2 - 8001c58: 613b str r3, [r7, #16] + 8001cd4: 697b ldr r3, [r7, #20] + 8001cd6: 2207 movs r2, #7 + 8001cd8: 4013 ands r3, r2 + 8001cda: 009b lsls r3, r3, #2 + 8001cdc: 220f movs r2, #15 + 8001cde: 409a lsls r2, r3 + 8001ce0: 0013 movs r3, r2 + 8001ce2: 43da mvns r2, r3 + 8001ce4: 693b ldr r3, [r7, #16] + 8001ce6: 4013 ands r3, r2 + 8001ce8: 613b str r3, [r7, #16] temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07U) * 4U)); - 8001c5a: 683b ldr r3, [r7, #0] - 8001c5c: 691a ldr r2, [r3, #16] - 8001c5e: 697b ldr r3, [r7, #20] - 8001c60: 2107 movs r1, #7 - 8001c62: 400b ands r3, r1 - 8001c64: 009b lsls r3, r3, #2 - 8001c66: 409a lsls r2, r3 - 8001c68: 0013 movs r3, r2 - 8001c6a: 693a ldr r2, [r7, #16] - 8001c6c: 4313 orrs r3, r2 - 8001c6e: 613b str r3, [r7, #16] + 8001cea: 683b ldr r3, [r7, #0] + 8001cec: 691a ldr r2, [r3, #16] + 8001cee: 697b ldr r3, [r7, #20] + 8001cf0: 2107 movs r1, #7 + 8001cf2: 400b ands r3, r1 + 8001cf4: 009b lsls r3, r3, #2 + 8001cf6: 409a lsls r2, r3 + 8001cf8: 0013 movs r3, r2 + 8001cfa: 693a ldr r2, [r7, #16] + 8001cfc: 4313 orrs r3, r2 + 8001cfe: 613b str r3, [r7, #16] GPIOx->AFR[position >> 3U] = temp; - 8001c70: 697b ldr r3, [r7, #20] - 8001c72: 08da lsrs r2, r3, #3 - 8001c74: 687b ldr r3, [r7, #4] - 8001c76: 3208 adds r2, #8 - 8001c78: 0092 lsls r2, r2, #2 - 8001c7a: 6939 ldr r1, [r7, #16] - 8001c7c: 50d1 str r1, [r2, r3] + 8001d00: 697b ldr r3, [r7, #20] + 8001d02: 08da lsrs r2, r3, #3 + 8001d04: 687b ldr r3, [r7, #4] + 8001d06: 3208 adds r2, #8 + 8001d08: 0092 lsls r2, r2, #2 + 8001d0a: 6939 ldr r1, [r7, #16] + 8001d0c: 50d1 str r1, [r2, r3] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; - 8001c7e: 687b ldr r3, [r7, #4] - 8001c80: 681b ldr r3, [r3, #0] - 8001c82: 613b str r3, [r7, #16] + 8001d0e: 687b ldr r3, [r7, #4] + 8001d10: 681b ldr r3, [r3, #0] + 8001d12: 613b str r3, [r7, #16] temp &= ~(GPIO_MODER_MODE0 << (position * 2U)); - 8001c84: 697b ldr r3, [r7, #20] - 8001c86: 005b lsls r3, r3, #1 - 8001c88: 2203 movs r2, #3 - 8001c8a: 409a lsls r2, r3 - 8001c8c: 0013 movs r3, r2 - 8001c8e: 43da mvns r2, r3 - 8001c90: 693b ldr r3, [r7, #16] - 8001c92: 4013 ands r3, r2 - 8001c94: 613b str r3, [r7, #16] + 8001d14: 697b ldr r3, [r7, #20] + 8001d16: 005b lsls r3, r3, #1 + 8001d18: 2203 movs r2, #3 + 8001d1a: 409a lsls r2, r3 + 8001d1c: 0013 movs r3, r2 + 8001d1e: 43da mvns r2, r3 + 8001d20: 693b ldr r3, [r7, #16] + 8001d22: 4013 ands r3, r2 + 8001d24: 613b str r3, [r7, #16] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U)); - 8001c96: 683b ldr r3, [r7, #0] - 8001c98: 685b ldr r3, [r3, #4] - 8001c9a: 2203 movs r2, #3 - 8001c9c: 401a ands r2, r3 - 8001c9e: 697b ldr r3, [r7, #20] - 8001ca0: 005b lsls r3, r3, #1 - 8001ca2: 409a lsls r2, r3 - 8001ca4: 0013 movs r3, r2 - 8001ca6: 693a ldr r2, [r7, #16] - 8001ca8: 4313 orrs r3, r2 - 8001caa: 613b str r3, [r7, #16] + 8001d26: 683b ldr r3, [r7, #0] + 8001d28: 685b ldr r3, [r3, #4] + 8001d2a: 2203 movs r2, #3 + 8001d2c: 401a ands r2, r3 + 8001d2e: 697b ldr r3, [r7, #20] + 8001d30: 005b lsls r3, r3, #1 + 8001d32: 409a lsls r2, r3 + 8001d34: 0013 movs r3, r2 + 8001d36: 693a ldr r2, [r7, #16] + 8001d38: 4313 orrs r3, r2 + 8001d3a: 613b str r3, [r7, #16] GPIOx->MODER = temp; - 8001cac: 687b ldr r3, [r7, #4] - 8001cae: 693a ldr r2, [r7, #16] - 8001cb0: 601a str r2, [r3, #0] + 8001d3c: 687b ldr r3, [r7, #4] + 8001d3e: 693a ldr r2, [r7, #16] + 8001d40: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U) - 8001cb2: 683b ldr r3, [r7, #0] - 8001cb4: 685a ldr r2, [r3, #4] - 8001cb6: 23c0 movs r3, #192 ; 0xc0 - 8001cb8: 029b lsls r3, r3, #10 - 8001cba: 4013 ands r3, r2 - 8001cbc: d100 bne.n 8001cc0 - 8001cbe: e09a b.n 8001df6 + 8001d42: 683b ldr r3, [r7, #0] + 8001d44: 685a ldr r2, [r3, #4] + 8001d46: 23c0 movs r3, #192 ; 0xc0 + 8001d48: 029b lsls r3, r3, #10 + 8001d4a: 4013 ands r3, r2 + 8001d4c: d100 bne.n 8001d50 + 8001d4e: e09a b.n 8001e86 { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); - 8001cc0: 4b54 ldr r3, [pc, #336] ; (8001e14 ) - 8001cc2: 6b5a ldr r2, [r3, #52] ; 0x34 - 8001cc4: 4b53 ldr r3, [pc, #332] ; (8001e14 ) - 8001cc6: 2101 movs r1, #1 - 8001cc8: 430a orrs r2, r1 - 8001cca: 635a str r2, [r3, #52] ; 0x34 + 8001d50: 4b54 ldr r3, [pc, #336] ; (8001ea4 ) + 8001d52: 6b5a ldr r2, [r3, #52] ; 0x34 + 8001d54: 4b53 ldr r3, [pc, #332] ; (8001ea4 ) + 8001d56: 2101 movs r1, #1 + 8001d58: 430a orrs r2, r1 + 8001d5a: 635a str r2, [r3, #52] ; 0x34 temp = SYSCFG->EXTICR[position >> 2U]; - 8001ccc: 4a52 ldr r2, [pc, #328] ; (8001e18 ) - 8001cce: 697b ldr r3, [r7, #20] - 8001cd0: 089b lsrs r3, r3, #2 - 8001cd2: 3302 adds r3, #2 - 8001cd4: 009b lsls r3, r3, #2 - 8001cd6: 589b ldr r3, [r3, r2] - 8001cd8: 613b str r3, [r7, #16] + 8001d5c: 4a52 ldr r2, [pc, #328] ; (8001ea8 ) + 8001d5e: 697b ldr r3, [r7, #20] + 8001d60: 089b lsrs r3, r3, #2 + 8001d62: 3302 adds r3, #2 + 8001d64: 009b lsls r3, r3, #2 + 8001d66: 589b ldr r3, [r3, r2] + 8001d68: 613b str r3, [r7, #16] CLEAR_BIT(temp, (0x0FUL) << (4U * (position & 0x03U))); - 8001cda: 697b ldr r3, [r7, #20] - 8001cdc: 2203 movs r2, #3 - 8001cde: 4013 ands r3, r2 - 8001ce0: 009b lsls r3, r3, #2 - 8001ce2: 220f movs r2, #15 - 8001ce4: 409a lsls r2, r3 - 8001ce6: 0013 movs r3, r2 - 8001ce8: 43da mvns r2, r3 - 8001cea: 693b ldr r3, [r7, #16] - 8001cec: 4013 ands r3, r2 - 8001cee: 613b str r3, [r7, #16] + 8001d6a: 697b ldr r3, [r7, #20] + 8001d6c: 2203 movs r2, #3 + 8001d6e: 4013 ands r3, r2 + 8001d70: 009b lsls r3, r3, #2 + 8001d72: 220f movs r2, #15 + 8001d74: 409a lsls r2, r3 + 8001d76: 0013 movs r3, r2 + 8001d78: 43da mvns r2, r3 + 8001d7a: 693b ldr r3, [r7, #16] + 8001d7c: 4013 ands r3, r2 + 8001d7e: 613b str r3, [r7, #16] SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03U))); - 8001cf0: 687a ldr r2, [r7, #4] - 8001cf2: 23a0 movs r3, #160 ; 0xa0 - 8001cf4: 05db lsls r3, r3, #23 - 8001cf6: 429a cmp r2, r3 - 8001cf8: d019 beq.n 8001d2e - 8001cfa: 687b ldr r3, [r7, #4] - 8001cfc: 4a47 ldr r2, [pc, #284] ; (8001e1c ) - 8001cfe: 4293 cmp r3, r2 - 8001d00: d013 beq.n 8001d2a - 8001d02: 687b ldr r3, [r7, #4] - 8001d04: 4a46 ldr r2, [pc, #280] ; (8001e20 ) - 8001d06: 4293 cmp r3, r2 - 8001d08: d00d beq.n 8001d26 - 8001d0a: 687b ldr r3, [r7, #4] - 8001d0c: 4a45 ldr r2, [pc, #276] ; (8001e24 ) - 8001d0e: 4293 cmp r3, r2 - 8001d10: d007 beq.n 8001d22 - 8001d12: 687b ldr r3, [r7, #4] - 8001d14: 4a44 ldr r2, [pc, #272] ; (8001e28 ) - 8001d16: 4293 cmp r3, r2 - 8001d18: d101 bne.n 8001d1e - 8001d1a: 2305 movs r3, #5 - 8001d1c: e008 b.n 8001d30 - 8001d1e: 2306 movs r3, #6 - 8001d20: e006 b.n 8001d30 - 8001d22: 2303 movs r3, #3 - 8001d24: e004 b.n 8001d30 - 8001d26: 2302 movs r3, #2 - 8001d28: e002 b.n 8001d30 - 8001d2a: 2301 movs r3, #1 - 8001d2c: e000 b.n 8001d30 - 8001d2e: 2300 movs r3, #0 - 8001d30: 697a ldr r2, [r7, #20] - 8001d32: 2103 movs r1, #3 - 8001d34: 400a ands r2, r1 - 8001d36: 0092 lsls r2, r2, #2 - 8001d38: 4093 lsls r3, r2 - 8001d3a: 693a ldr r2, [r7, #16] - 8001d3c: 4313 orrs r3, r2 - 8001d3e: 613b str r3, [r7, #16] + 8001d80: 687a ldr r2, [r7, #4] + 8001d82: 23a0 movs r3, #160 ; 0xa0 + 8001d84: 05db lsls r3, r3, #23 + 8001d86: 429a cmp r2, r3 + 8001d88: d019 beq.n 8001dbe + 8001d8a: 687b ldr r3, [r7, #4] + 8001d8c: 4a47 ldr r2, [pc, #284] ; (8001eac ) + 8001d8e: 4293 cmp r3, r2 + 8001d90: d013 beq.n 8001dba + 8001d92: 687b ldr r3, [r7, #4] + 8001d94: 4a46 ldr r2, [pc, #280] ; (8001eb0 ) + 8001d96: 4293 cmp r3, r2 + 8001d98: d00d beq.n 8001db6 + 8001d9a: 687b ldr r3, [r7, #4] + 8001d9c: 4a45 ldr r2, [pc, #276] ; (8001eb4 ) + 8001d9e: 4293 cmp r3, r2 + 8001da0: d007 beq.n 8001db2 + 8001da2: 687b ldr r3, [r7, #4] + 8001da4: 4a44 ldr r2, [pc, #272] ; (8001eb8 ) + 8001da6: 4293 cmp r3, r2 + 8001da8: d101 bne.n 8001dae + 8001daa: 2305 movs r3, #5 + 8001dac: e008 b.n 8001dc0 + 8001dae: 2306 movs r3, #6 + 8001db0: e006 b.n 8001dc0 + 8001db2: 2303 movs r3, #3 + 8001db4: e004 b.n 8001dc0 + 8001db6: 2302 movs r3, #2 + 8001db8: e002 b.n 8001dc0 + 8001dba: 2301 movs r3, #1 + 8001dbc: e000 b.n 8001dc0 + 8001dbe: 2300 movs r3, #0 + 8001dc0: 697a ldr r2, [r7, #20] + 8001dc2: 2103 movs r1, #3 + 8001dc4: 400a ands r2, r1 + 8001dc6: 0092 lsls r2, r2, #2 + 8001dc8: 4093 lsls r3, r2 + 8001dca: 693a ldr r2, [r7, #16] + 8001dcc: 4313 orrs r3, r2 + 8001dce: 613b str r3, [r7, #16] SYSCFG->EXTICR[position >> 2U] = temp; - 8001d40: 4935 ldr r1, [pc, #212] ; (8001e18 ) - 8001d42: 697b ldr r3, [r7, #20] - 8001d44: 089b lsrs r3, r3, #2 - 8001d46: 3302 adds r3, #2 - 8001d48: 009b lsls r3, r3, #2 - 8001d4a: 693a ldr r2, [r7, #16] - 8001d4c: 505a str r2, [r3, r1] + 8001dd0: 4935 ldr r1, [pc, #212] ; (8001ea8 ) + 8001dd2: 697b ldr r3, [r7, #20] + 8001dd4: 089b lsrs r3, r3, #2 + 8001dd6: 3302 adds r3, #2 + 8001dd8: 009b lsls r3, r3, #2 + 8001dda: 693a ldr r2, [r7, #16] + 8001ddc: 505a str r2, [r3, r1] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; - 8001d4e: 4b37 ldr r3, [pc, #220] ; (8001e2c ) - 8001d50: 689b ldr r3, [r3, #8] - 8001d52: 613b str r3, [r7, #16] + 8001dde: 4b37 ldr r3, [pc, #220] ; (8001ebc ) + 8001de0: 689b ldr r3, [r3, #8] + 8001de2: 613b str r3, [r7, #16] temp &= ~((uint32_t)iocurrent); - 8001d54: 68fb ldr r3, [r7, #12] - 8001d56: 43da mvns r2, r3 - 8001d58: 693b ldr r3, [r7, #16] - 8001d5a: 4013 ands r3, r2 - 8001d5c: 613b str r3, [r7, #16] + 8001de4: 68fb ldr r3, [r7, #12] + 8001de6: 43da mvns r2, r3 + 8001de8: 693b ldr r3, [r7, #16] + 8001dea: 4013 ands r3, r2 + 8001dec: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U) - 8001d5e: 683b ldr r3, [r7, #0] - 8001d60: 685a ldr r2, [r3, #4] - 8001d62: 2380 movs r3, #128 ; 0x80 - 8001d64: 035b lsls r3, r3, #13 - 8001d66: 4013 ands r3, r2 - 8001d68: d003 beq.n 8001d72 + 8001dee: 683b ldr r3, [r7, #0] + 8001df0: 685a ldr r2, [r3, #4] + 8001df2: 2380 movs r3, #128 ; 0x80 + 8001df4: 035b lsls r3, r3, #13 + 8001df6: 4013 ands r3, r2 + 8001df8: d003 beq.n 8001e02 { temp |= iocurrent; - 8001d6a: 693a ldr r2, [r7, #16] - 8001d6c: 68fb ldr r3, [r7, #12] - 8001d6e: 4313 orrs r3, r2 - 8001d70: 613b str r3, [r7, #16] + 8001dfa: 693a ldr r2, [r7, #16] + 8001dfc: 68fb ldr r3, [r7, #12] + 8001dfe: 4313 orrs r3, r2 + 8001e00: 613b str r3, [r7, #16] } EXTI->RTSR = temp; - 8001d72: 4b2e ldr r3, [pc, #184] ; (8001e2c ) - 8001d74: 693a ldr r2, [r7, #16] - 8001d76: 609a str r2, [r3, #8] + 8001e02: 4b2e ldr r3, [pc, #184] ; (8001ebc ) + 8001e04: 693a ldr r2, [r7, #16] + 8001e06: 609a str r2, [r3, #8] temp = EXTI->FTSR; - 8001d78: 4b2c ldr r3, [pc, #176] ; (8001e2c ) - 8001d7a: 68db ldr r3, [r3, #12] - 8001d7c: 613b str r3, [r7, #16] + 8001e08: 4b2c ldr r3, [pc, #176] ; (8001ebc ) + 8001e0a: 68db ldr r3, [r3, #12] + 8001e0c: 613b str r3, [r7, #16] temp &= ~((uint32_t)iocurrent); - 8001d7e: 68fb ldr r3, [r7, #12] - 8001d80: 43da mvns r2, r3 - 8001d82: 693b ldr r3, [r7, #16] - 8001d84: 4013 ands r3, r2 - 8001d86: 613b str r3, [r7, #16] + 8001e0e: 68fb ldr r3, [r7, #12] + 8001e10: 43da mvns r2, r3 + 8001e12: 693b ldr r3, [r7, #16] + 8001e14: 4013 ands r3, r2 + 8001e16: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U) - 8001d88: 683b ldr r3, [r7, #0] - 8001d8a: 685a ldr r2, [r3, #4] - 8001d8c: 2380 movs r3, #128 ; 0x80 - 8001d8e: 039b lsls r3, r3, #14 - 8001d90: 4013 ands r3, r2 - 8001d92: d003 beq.n 8001d9c + 8001e18: 683b ldr r3, [r7, #0] + 8001e1a: 685a ldr r2, [r3, #4] + 8001e1c: 2380 movs r3, #128 ; 0x80 + 8001e1e: 039b lsls r3, r3, #14 + 8001e20: 4013 ands r3, r2 + 8001e22: d003 beq.n 8001e2c { temp |= iocurrent; - 8001d94: 693a ldr r2, [r7, #16] - 8001d96: 68fb ldr r3, [r7, #12] - 8001d98: 4313 orrs r3, r2 - 8001d9a: 613b str r3, [r7, #16] + 8001e24: 693a ldr r2, [r7, #16] + 8001e26: 68fb ldr r3, [r7, #12] + 8001e28: 4313 orrs r3, r2 + 8001e2a: 613b str r3, [r7, #16] } EXTI->FTSR = temp; - 8001d9c: 4b23 ldr r3, [pc, #140] ; (8001e2c ) - 8001d9e: 693a ldr r2, [r7, #16] - 8001da0: 60da str r2, [r3, #12] + 8001e2c: 4b23 ldr r3, [pc, #140] ; (8001ebc ) + 8001e2e: 693a ldr r2, [r7, #16] + 8001e30: 60da str r2, [r3, #12] temp = EXTI->EMR; - 8001da2: 4b22 ldr r3, [pc, #136] ; (8001e2c ) - 8001da4: 685b ldr r3, [r3, #4] - 8001da6: 613b str r3, [r7, #16] + 8001e32: 4b22 ldr r3, [pc, #136] ; (8001ebc ) + 8001e34: 685b ldr r3, [r3, #4] + 8001e36: 613b str r3, [r7, #16] temp &= ~((uint32_t)iocurrent); - 8001da8: 68fb ldr r3, [r7, #12] - 8001daa: 43da mvns r2, r3 - 8001dac: 693b ldr r3, [r7, #16] - 8001dae: 4013 ands r3, r2 - 8001db0: 613b str r3, [r7, #16] + 8001e38: 68fb ldr r3, [r7, #12] + 8001e3a: 43da mvns r2, r3 + 8001e3c: 693b ldr r3, [r7, #16] + 8001e3e: 4013 ands r3, r2 + 8001e40: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U) - 8001db2: 683b ldr r3, [r7, #0] - 8001db4: 685a ldr r2, [r3, #4] - 8001db6: 2380 movs r3, #128 ; 0x80 - 8001db8: 029b lsls r3, r3, #10 - 8001dba: 4013 ands r3, r2 - 8001dbc: d003 beq.n 8001dc6 + 8001e42: 683b ldr r3, [r7, #0] + 8001e44: 685a ldr r2, [r3, #4] + 8001e46: 2380 movs r3, #128 ; 0x80 + 8001e48: 029b lsls r3, r3, #10 + 8001e4a: 4013 ands r3, r2 + 8001e4c: d003 beq.n 8001e56 { temp |= iocurrent; - 8001dbe: 693a ldr r2, [r7, #16] - 8001dc0: 68fb ldr r3, [r7, #12] - 8001dc2: 4313 orrs r3, r2 - 8001dc4: 613b str r3, [r7, #16] + 8001e4e: 693a ldr r2, [r7, #16] + 8001e50: 68fb ldr r3, [r7, #12] + 8001e52: 4313 orrs r3, r2 + 8001e54: 613b str r3, [r7, #16] } EXTI->EMR = temp; - 8001dc6: 4b19 ldr r3, [pc, #100] ; (8001e2c ) - 8001dc8: 693a ldr r2, [r7, #16] - 8001dca: 605a str r2, [r3, #4] + 8001e56: 4b19 ldr r3, [pc, #100] ; (8001ebc ) + 8001e58: 693a ldr r2, [r7, #16] + 8001e5a: 605a str r2, [r3, #4] /* Clear EXTI line configuration */ temp = EXTI->IMR; - 8001dcc: 4b17 ldr r3, [pc, #92] ; (8001e2c ) - 8001dce: 681b ldr r3, [r3, #0] - 8001dd0: 613b str r3, [r7, #16] + 8001e5c: 4b17 ldr r3, [pc, #92] ; (8001ebc ) + 8001e5e: 681b ldr r3, [r3, #0] + 8001e60: 613b str r3, [r7, #16] temp &= ~((uint32_t)iocurrent); - 8001dd2: 68fb ldr r3, [r7, #12] - 8001dd4: 43da mvns r2, r3 - 8001dd6: 693b ldr r3, [r7, #16] - 8001dd8: 4013 ands r3, r2 - 8001dda: 613b str r3, [r7, #16] + 8001e62: 68fb ldr r3, [r7, #12] + 8001e64: 43da mvns r2, r3 + 8001e66: 693b ldr r3, [r7, #16] + 8001e68: 4013 ands r3, r2 + 8001e6a: 613b str r3, [r7, #16] if ((GPIO_Init->Mode & EXTI_IT) != 0x00U) - 8001ddc: 683b ldr r3, [r7, #0] - 8001dde: 685a ldr r2, [r3, #4] - 8001de0: 2380 movs r3, #128 ; 0x80 - 8001de2: 025b lsls r3, r3, #9 - 8001de4: 4013 ands r3, r2 - 8001de6: d003 beq.n 8001df0 + 8001e6c: 683b ldr r3, [r7, #0] + 8001e6e: 685a ldr r2, [r3, #4] + 8001e70: 2380 movs r3, #128 ; 0x80 + 8001e72: 025b lsls r3, r3, #9 + 8001e74: 4013 ands r3, r2 + 8001e76: d003 beq.n 8001e80 { temp |= iocurrent; - 8001de8: 693a ldr r2, [r7, #16] - 8001dea: 68fb ldr r3, [r7, #12] - 8001dec: 4313 orrs r3, r2 - 8001dee: 613b str r3, [r7, #16] + 8001e78: 693a ldr r2, [r7, #16] + 8001e7a: 68fb ldr r3, [r7, #12] + 8001e7c: 4313 orrs r3, r2 + 8001e7e: 613b str r3, [r7, #16] } EXTI->IMR = temp; - 8001df0: 4b0e ldr r3, [pc, #56] ; (8001e2c ) - 8001df2: 693a ldr r2, [r7, #16] - 8001df4: 601a str r2, [r3, #0] + 8001e80: 4b0e ldr r3, [pc, #56] ; (8001ebc ) + 8001e82: 693a ldr r2, [r7, #16] + 8001e84: 601a str r2, [r3, #0] } } position++; - 8001df6: 697b ldr r3, [r7, #20] - 8001df8: 3301 adds r3, #1 - 8001dfa: 617b str r3, [r7, #20] + 8001e86: 697b ldr r3, [r7, #20] + 8001e88: 3301 adds r3, #1 + 8001e8a: 617b str r3, [r7, #20] while (((GPIO_Init->Pin) >> position) != 0) - 8001dfc: 683b ldr r3, [r7, #0] - 8001dfe: 681a ldr r2, [r3, #0] - 8001e00: 697b ldr r3, [r7, #20] - 8001e02: 40da lsrs r2, r3 - 8001e04: 1e13 subs r3, r2, #0 - 8001e06: d000 beq.n 8001e0a - 8001e08: e6a8 b.n 8001b5c + 8001e8c: 683b ldr r3, [r7, #0] + 8001e8e: 681a ldr r2, [r3, #0] + 8001e90: 697b ldr r3, [r7, #20] + 8001e92: 40da lsrs r2, r3 + 8001e94: 1e13 subs r3, r2, #0 + 8001e96: d000 beq.n 8001e9a + 8001e98: e6a8 b.n 8001bec } } - 8001e0a: 46c0 nop ; (mov r8, r8) - 8001e0c: 46c0 nop ; (mov r8, r8) - 8001e0e: 46bd mov sp, r7 - 8001e10: b006 add sp, #24 - 8001e12: bd80 pop {r7, pc} - 8001e14: 40021000 .word 0x40021000 - 8001e18: 40010000 .word 0x40010000 - 8001e1c: 50000400 .word 0x50000400 - 8001e20: 50000800 .word 0x50000800 - 8001e24: 50000c00 .word 0x50000c00 - 8001e28: 50001c00 .word 0x50001c00 - 8001e2c: 40010400 .word 0x40010400 + 8001e9a: 46c0 nop ; (mov r8, r8) + 8001e9c: 46c0 nop ; (mov r8, r8) + 8001e9e: 46bd mov sp, r7 + 8001ea0: b006 add sp, #24 + 8001ea2: bd80 pop {r7, pc} + 8001ea4: 40021000 .word 0x40021000 + 8001ea8: 40010000 .word 0x40010000 + 8001eac: 50000400 .word 0x50000400 + 8001eb0: 50000800 .word 0x50000800 + 8001eb4: 50000c00 .word 0x50000c00 + 8001eb8: 50001c00 .word 0x50001c00 + 8001ebc: 40010400 .word 0x40010400 -08001e30 : +08001ec0 : * GPIO_PIN_RESET: to clear the port pin * GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { - 8001e30: b580 push {r7, lr} - 8001e32: b082 sub sp, #8 - 8001e34: af00 add r7, sp, #0 - 8001e36: 6078 str r0, [r7, #4] - 8001e38: 0008 movs r0, r1 - 8001e3a: 0011 movs r1, r2 - 8001e3c: 1cbb adds r3, r7, #2 - 8001e3e: 1c02 adds r2, r0, #0 - 8001e40: 801a strh r2, [r3, #0] - 8001e42: 1c7b adds r3, r7, #1 - 8001e44: 1c0a adds r2, r1, #0 - 8001e46: 701a strb r2, [r3, #0] + 8001ec0: b580 push {r7, lr} + 8001ec2: b082 sub sp, #8 + 8001ec4: af00 add r7, sp, #0 + 8001ec6: 6078 str r0, [r7, #4] + 8001ec8: 0008 movs r0, r1 + 8001eca: 0011 movs r1, r2 + 8001ecc: 1cbb adds r3, r7, #2 + 8001ece: 1c02 adds r2, r0, #0 + 8001ed0: 801a strh r2, [r3, #0] + 8001ed2: 1c7b adds r3, r7, #1 + 8001ed4: 1c0a adds r2, r1, #0 + 8001ed6: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) - 8001e48: 1c7b adds r3, r7, #1 - 8001e4a: 781b ldrb r3, [r3, #0] - 8001e4c: 2b00 cmp r3, #0 - 8001e4e: d004 beq.n 8001e5a + 8001ed8: 1c7b adds r3, r7, #1 + 8001eda: 781b ldrb r3, [r3, #0] + 8001edc: 2b00 cmp r3, #0 + 8001ede: d004 beq.n 8001eea { GPIOx->BSRR = GPIO_Pin; - 8001e50: 1cbb adds r3, r7, #2 - 8001e52: 881a ldrh r2, [r3, #0] - 8001e54: 687b ldr r3, [r7, #4] - 8001e56: 619a str r2, [r3, #24] + 8001ee0: 1cbb adds r3, r7, #2 + 8001ee2: 881a ldrh r2, [r3, #0] + 8001ee4: 687b ldr r3, [r7, #4] + 8001ee6: 619a str r2, [r3, #24] } else { GPIOx->BRR = GPIO_Pin ; } } - 8001e58: e003 b.n 8001e62 + 8001ee8: e003 b.n 8001ef2 GPIOx->BRR = GPIO_Pin ; - 8001e5a: 1cbb adds r3, r7, #2 - 8001e5c: 881a ldrh r2, [r3, #0] - 8001e5e: 687b ldr r3, [r7, #4] - 8001e60: 629a str r2, [r3, #40] ; 0x28 + 8001eea: 1cbb adds r3, r7, #2 + 8001eec: 881a ldrh r2, [r3, #0] + 8001eee: 687b ldr r3, [r7, #4] + 8001ef0: 629a str r2, [r3, #40] ; 0x28 } - 8001e62: 46c0 nop ; (mov r8, r8) - 8001e64: 46bd mov sp, r7 - 8001e66: b002 add sp, #8 - 8001e68: bd80 pop {r7, pc} + 8001ef2: 46c0 nop ; (mov r8, r8) + 8001ef4: 46bd mov sp, r7 + 8001ef6: b002 add sp, #8 + 8001ef8: bd80 pop {r7, pc} -08001e6a : +08001efa : * All port bits are not necessarily available on all GPIOs. * @param GPIO_Pin Specifies the pins to be toggled. * @retval None */ void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin) { - 8001e6a: b580 push {r7, lr} - 8001e6c: b084 sub sp, #16 - 8001e6e: af00 add r7, sp, #0 - 8001e70: 6078 str r0, [r7, #4] - 8001e72: 000a movs r2, r1 - 8001e74: 1cbb adds r3, r7, #2 - 8001e76: 801a strh r2, [r3, #0] + 8001efa: b580 push {r7, lr} + 8001efc: b084 sub sp, #16 + 8001efe: af00 add r7, sp, #0 + 8001f00: 6078 str r0, [r7, #4] + 8001f02: 000a movs r2, r1 + 8001f04: 1cbb adds r3, r7, #2 + 8001f06: 801a strh r2, [r3, #0] /* Check the parameters */ assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, GPIO_Pin)); /* get current Output Data Register value */ odr = GPIOx->ODR; - 8001e78: 687b ldr r3, [r7, #4] - 8001e7a: 695b ldr r3, [r3, #20] - 8001e7c: 60fb str r3, [r7, #12] + 8001f08: 687b ldr r3, [r7, #4] + 8001f0a: 695b ldr r3, [r3, #20] + 8001f0c: 60fb str r3, [r7, #12] /* Set selected pins that were at low level, and reset ones that were high */ GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin); - 8001e7e: 1cbb adds r3, r7, #2 - 8001e80: 881b ldrh r3, [r3, #0] - 8001e82: 68fa ldr r2, [r7, #12] - 8001e84: 4013 ands r3, r2 - 8001e86: 041a lsls r2, r3, #16 - 8001e88: 68fb ldr r3, [r7, #12] - 8001e8a: 43db mvns r3, r3 - 8001e8c: 1cb9 adds r1, r7, #2 - 8001e8e: 8809 ldrh r1, [r1, #0] - 8001e90: 400b ands r3, r1 - 8001e92: 431a orrs r2, r3 - 8001e94: 687b ldr r3, [r7, #4] - 8001e96: 619a str r2, [r3, #24] + 8001f0e: 1cbb adds r3, r7, #2 + 8001f10: 881b ldrh r3, [r3, #0] + 8001f12: 68fa ldr r2, [r7, #12] + 8001f14: 4013 ands r3, r2 + 8001f16: 041a lsls r2, r3, #16 + 8001f18: 68fb ldr r3, [r7, #12] + 8001f1a: 43db mvns r3, r3 + 8001f1c: 1cb9 adds r1, r7, #2 + 8001f1e: 8809 ldrh r1, [r1, #0] + 8001f20: 400b ands r3, r1 + 8001f22: 431a orrs r2, r3 + 8001f24: 687b ldr r3, [r7, #4] + 8001f26: 619a str r2, [r3, #24] } - 8001e98: 46c0 nop ; (mov r8, r8) - 8001e9a: 46bd mov sp, r7 - 8001e9c: b004 add sp, #16 - 8001e9e: bd80 pop {r7, pc} + 8001f28: 46c0 nop ; (mov r8, r8) + 8001f2a: 46bd mov sp, r7 + 8001f2c: b004 add sp, #16 + 8001f2e: bd80 pop {r7, pc} -08001ea0 : +08001f30 : * supported by this macro. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) { - 8001ea0: b5b0 push {r4, r5, r7, lr} - 8001ea2: b08a sub sp, #40 ; 0x28 - 8001ea4: af00 add r7, sp, #0 - 8001ea6: 6078 str r0, [r7, #4] + 8001f30: b5b0 push {r4, r5, r7, lr} + 8001f32: b08a sub sp, #40 ; 0x28 + 8001f34: af00 add r7, sp, #0 + 8001f36: 6078 str r0, [r7, #4] uint32_t hsi_state; HAL_StatusTypeDef status; uint32_t sysclk_source, pll_config; /* Check Null pointer */ if(RCC_OscInitStruct == NULL) - 8001ea8: 687b ldr r3, [r7, #4] - 8001eaa: 2b00 cmp r3, #0 - 8001eac: d102 bne.n 8001eb4 + 8001f38: 687b ldr r3, [r7, #4] + 8001f3a: 2b00 cmp r3, #0 + 8001f3c: d102 bne.n 8001f44 { return HAL_ERROR; - 8001eae: 2301 movs r3, #1 - 8001eb0: f000 fb5a bl 8002568 + 8001f3e: 2301 movs r3, #1 + 8001f40: f000 fb5a bl 80025f8 } /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE(); - 8001eb4: 4bce ldr r3, [pc, #824] ; (80021f0 ) - 8001eb6: 68db ldr r3, [r3, #12] - 8001eb8: 220c movs r2, #12 - 8001eba: 4013 ands r3, r2 - 8001ebc: 623b str r3, [r7, #32] + 8001f44: 4bce ldr r3, [pc, #824] ; (8002280 ) + 8001f46: 68db ldr r3, [r3, #12] + 8001f48: 220c movs r2, #12 + 8001f4a: 4013 ands r3, r2 + 8001f4c: 623b str r3, [r7, #32] pll_config = __HAL_RCC_GET_PLL_OSCSOURCE(); - 8001ebe: 4bcc ldr r3, [pc, #816] ; (80021f0 ) - 8001ec0: 68da ldr r2, [r3, #12] - 8001ec2: 2380 movs r3, #128 ; 0x80 - 8001ec4: 025b lsls r3, r3, #9 - 8001ec6: 4013 ands r3, r2 - 8001ec8: 61fb str r3, [r7, #28] + 8001f4e: 4bcc ldr r3, [pc, #816] ; (8002280 ) + 8001f50: 68da ldr r2, [r3, #12] + 8001f52: 2380 movs r3, #128 ; 0x80 + 8001f54: 025b lsls r3, r3, #9 + 8001f56: 4013 ands r3, r2 + 8001f58: 61fb str r3, [r7, #28] /*------------------------------- HSE Configuration ------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) - 8001eca: 687b ldr r3, [r7, #4] - 8001ecc: 681b ldr r3, [r3, #0] - 8001ece: 2201 movs r2, #1 - 8001ed0: 4013 ands r3, r2 - 8001ed2: d100 bne.n 8001ed6 - 8001ed4: e07c b.n 8001fd0 + 8001f5a: 687b ldr r3, [r7, #4] + 8001f5c: 681b ldr r3, [r3, #0] + 8001f5e: 2201 movs r2, #1 + 8001f60: 4013 ands r3, r2 + 8001f62: d100 bne.n 8001f66 + 8001f64: e07c b.n 8002060 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */ if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSE) - 8001ed6: 6a3b ldr r3, [r7, #32] - 8001ed8: 2b08 cmp r3, #8 - 8001eda: d007 beq.n 8001eec + 8001f66: 6a3b ldr r3, [r7, #32] + 8001f68: 2b08 cmp r3, #8 + 8001f6a: d007 beq.n 8001f7c || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSE))) - 8001edc: 6a3b ldr r3, [r7, #32] - 8001ede: 2b0c cmp r3, #12 - 8001ee0: d111 bne.n 8001f06 - 8001ee2: 69fa ldr r2, [r7, #28] - 8001ee4: 2380 movs r3, #128 ; 0x80 - 8001ee6: 025b lsls r3, r3, #9 - 8001ee8: 429a cmp r2, r3 - 8001eea: d10c bne.n 8001f06 + 8001f6c: 6a3b ldr r3, [r7, #32] + 8001f6e: 2b0c cmp r3, #12 + 8001f70: d111 bne.n 8001f96 + 8001f72: 69fa ldr r2, [r7, #28] + 8001f74: 2380 movs r3, #128 ; 0x80 + 8001f76: 025b lsls r3, r3, #9 + 8001f78: 429a cmp r2, r3 + 8001f7a: d10c bne.n 8001f96 { if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8001eec: 4bc0 ldr r3, [pc, #768] ; (80021f0 ) - 8001eee: 681a ldr r2, [r3, #0] - 8001ef0: 2380 movs r3, #128 ; 0x80 - 8001ef2: 029b lsls r3, r3, #10 - 8001ef4: 4013 ands r3, r2 - 8001ef6: d100 bne.n 8001efa - 8001ef8: e069 b.n 8001fce - 8001efa: 687b ldr r3, [r7, #4] - 8001efc: 685b ldr r3, [r3, #4] - 8001efe: 2b00 cmp r3, #0 - 8001f00: d165 bne.n 8001fce + 8001f7c: 4bc0 ldr r3, [pc, #768] ; (8002280 ) + 8001f7e: 681a ldr r2, [r3, #0] + 8001f80: 2380 movs r3, #128 ; 0x80 + 8001f82: 029b lsls r3, r3, #10 + 8001f84: 4013 ands r3, r2 + 8001f86: d100 bne.n 8001f8a + 8001f88: e069 b.n 800205e + 8001f8a: 687b ldr r3, [r7, #4] + 8001f8c: 685b ldr r3, [r3, #4] + 8001f8e: 2b00 cmp r3, #0 + 8001f90: d165 bne.n 800205e { return HAL_ERROR; - 8001f02: 2301 movs r3, #1 - 8001f04: e330 b.n 8002568 + 8001f92: 2301 movs r3, #1 + 8001f94: e330 b.n 80025f8 } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); - 8001f06: 687b ldr r3, [r7, #4] - 8001f08: 685a ldr r2, [r3, #4] - 8001f0a: 2380 movs r3, #128 ; 0x80 - 8001f0c: 025b lsls r3, r3, #9 - 8001f0e: 429a cmp r2, r3 - 8001f10: d107 bne.n 8001f22 - 8001f12: 4bb7 ldr r3, [pc, #732] ; (80021f0 ) - 8001f14: 681a ldr r2, [r3, #0] - 8001f16: 4bb6 ldr r3, [pc, #728] ; (80021f0 ) - 8001f18: 2180 movs r1, #128 ; 0x80 - 8001f1a: 0249 lsls r1, r1, #9 - 8001f1c: 430a orrs r2, r1 - 8001f1e: 601a str r2, [r3, #0] - 8001f20: e027 b.n 8001f72 - 8001f22: 687b ldr r3, [r7, #4] - 8001f24: 685a ldr r2, [r3, #4] - 8001f26: 23a0 movs r3, #160 ; 0xa0 - 8001f28: 02db lsls r3, r3, #11 - 8001f2a: 429a cmp r2, r3 - 8001f2c: d10e bne.n 8001f4c - 8001f2e: 4bb0 ldr r3, [pc, #704] ; (80021f0 ) - 8001f30: 681a ldr r2, [r3, #0] - 8001f32: 4baf ldr r3, [pc, #700] ; (80021f0 ) - 8001f34: 2180 movs r1, #128 ; 0x80 - 8001f36: 02c9 lsls r1, r1, #11 - 8001f38: 430a orrs r2, r1 - 8001f3a: 601a str r2, [r3, #0] - 8001f3c: 4bac ldr r3, [pc, #688] ; (80021f0 ) - 8001f3e: 681a ldr r2, [r3, #0] - 8001f40: 4bab ldr r3, [pc, #684] ; (80021f0 ) - 8001f42: 2180 movs r1, #128 ; 0x80 - 8001f44: 0249 lsls r1, r1, #9 - 8001f46: 430a orrs r2, r1 - 8001f48: 601a str r2, [r3, #0] - 8001f4a: e012 b.n 8001f72 - 8001f4c: 4ba8 ldr r3, [pc, #672] ; (80021f0 ) - 8001f4e: 681a ldr r2, [r3, #0] - 8001f50: 4ba7 ldr r3, [pc, #668] ; (80021f0 ) - 8001f52: 49a8 ldr r1, [pc, #672] ; (80021f4 ) - 8001f54: 400a ands r2, r1 - 8001f56: 601a str r2, [r3, #0] - 8001f58: 4ba5 ldr r3, [pc, #660] ; (80021f0 ) - 8001f5a: 681a ldr r2, [r3, #0] - 8001f5c: 2380 movs r3, #128 ; 0x80 - 8001f5e: 025b lsls r3, r3, #9 - 8001f60: 4013 ands r3, r2 - 8001f62: 60fb str r3, [r7, #12] - 8001f64: 68fb ldr r3, [r7, #12] - 8001f66: 4ba2 ldr r3, [pc, #648] ; (80021f0 ) - 8001f68: 681a ldr r2, [r3, #0] - 8001f6a: 4ba1 ldr r3, [pc, #644] ; (80021f0 ) - 8001f6c: 49a2 ldr r1, [pc, #648] ; (80021f8 ) - 8001f6e: 400a ands r2, r1 - 8001f70: 601a str r2, [r3, #0] + 8001f96: 687b ldr r3, [r7, #4] + 8001f98: 685a ldr r2, [r3, #4] + 8001f9a: 2380 movs r3, #128 ; 0x80 + 8001f9c: 025b lsls r3, r3, #9 + 8001f9e: 429a cmp r2, r3 + 8001fa0: d107 bne.n 8001fb2 + 8001fa2: 4bb7 ldr r3, [pc, #732] ; (8002280 ) + 8001fa4: 681a ldr r2, [r3, #0] + 8001fa6: 4bb6 ldr r3, [pc, #728] ; (8002280 ) + 8001fa8: 2180 movs r1, #128 ; 0x80 + 8001faa: 0249 lsls r1, r1, #9 + 8001fac: 430a orrs r2, r1 + 8001fae: 601a str r2, [r3, #0] + 8001fb0: e027 b.n 8002002 + 8001fb2: 687b ldr r3, [r7, #4] + 8001fb4: 685a ldr r2, [r3, #4] + 8001fb6: 23a0 movs r3, #160 ; 0xa0 + 8001fb8: 02db lsls r3, r3, #11 + 8001fba: 429a cmp r2, r3 + 8001fbc: d10e bne.n 8001fdc + 8001fbe: 4bb0 ldr r3, [pc, #704] ; (8002280 ) + 8001fc0: 681a ldr r2, [r3, #0] + 8001fc2: 4baf ldr r3, [pc, #700] ; (8002280 ) + 8001fc4: 2180 movs r1, #128 ; 0x80 + 8001fc6: 02c9 lsls r1, r1, #11 + 8001fc8: 430a orrs r2, r1 + 8001fca: 601a str r2, [r3, #0] + 8001fcc: 4bac ldr r3, [pc, #688] ; (8002280 ) + 8001fce: 681a ldr r2, [r3, #0] + 8001fd0: 4bab ldr r3, [pc, #684] ; (8002280 ) + 8001fd2: 2180 movs r1, #128 ; 0x80 + 8001fd4: 0249 lsls r1, r1, #9 + 8001fd6: 430a orrs r2, r1 + 8001fd8: 601a str r2, [r3, #0] + 8001fda: e012 b.n 8002002 + 8001fdc: 4ba8 ldr r3, [pc, #672] ; (8002280 ) + 8001fde: 681a ldr r2, [r3, #0] + 8001fe0: 4ba7 ldr r3, [pc, #668] ; (8002280 ) + 8001fe2: 49a8 ldr r1, [pc, #672] ; (8002284 ) + 8001fe4: 400a ands r2, r1 + 8001fe6: 601a str r2, [r3, #0] + 8001fe8: 4ba5 ldr r3, [pc, #660] ; (8002280 ) + 8001fea: 681a ldr r2, [r3, #0] + 8001fec: 2380 movs r3, #128 ; 0x80 + 8001fee: 025b lsls r3, r3, #9 + 8001ff0: 4013 ands r3, r2 + 8001ff2: 60fb str r3, [r7, #12] + 8001ff4: 68fb ldr r3, [r7, #12] + 8001ff6: 4ba2 ldr r3, [pc, #648] ; (8002280 ) + 8001ff8: 681a ldr r2, [r3, #0] + 8001ffa: 4ba1 ldr r3, [pc, #644] ; (8002280 ) + 8001ffc: 49a2 ldr r1, [pc, #648] ; (8002288 ) + 8001ffe: 400a ands r2, r1 + 8002000: 601a str r2, [r3, #0] /* Check the HSE State */ if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) - 8001f72: 687b ldr r3, [r7, #4] - 8001f74: 685b ldr r3, [r3, #4] - 8001f76: 2b00 cmp r3, #0 - 8001f78: d014 beq.n 8001fa4 + 8002002: 687b ldr r3, [r7, #4] + 8002004: 685b ldr r3, [r3, #4] + 8002006: 2b00 cmp r3, #0 + 8002008: d014 beq.n 8002034 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001f7a: f7ff f90f bl 800119c - 8001f7e: 0003 movs r3, r0 - 8001f80: 61bb str r3, [r7, #24] + 800200a: f7ff f90f bl 800122c + 800200e: 0003 movs r3, r0 + 8002010: 61bb str r3, [r7, #24] /* Wait till HSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 8001f82: e008 b.n 8001f96 + 8002012: e008 b.n 8002026 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8001f84: f7ff f90a bl 800119c - 8001f88: 0002 movs r2, r0 - 8001f8a: 69bb ldr r3, [r7, #24] - 8001f8c: 1ad3 subs r3, r2, r3 - 8001f8e: 2b64 cmp r3, #100 ; 0x64 - 8001f90: d901 bls.n 8001f96 + 8002014: f7ff f90a bl 800122c + 8002018: 0002 movs r2, r0 + 800201a: 69bb ldr r3, [r7, #24] + 800201c: 1ad3 subs r3, r2, r3 + 800201e: 2b64 cmp r3, #100 ; 0x64 + 8002020: d901 bls.n 8002026 { return HAL_TIMEOUT; - 8001f92: 2303 movs r3, #3 - 8001f94: e2e8 b.n 8002568 + 8002022: 2303 movs r3, #3 + 8002024: e2e8 b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 8001f96: 4b96 ldr r3, [pc, #600] ; (80021f0 ) - 8001f98: 681a ldr r2, [r3, #0] - 8001f9a: 2380 movs r3, #128 ; 0x80 - 8001f9c: 029b lsls r3, r3, #10 - 8001f9e: 4013 ands r3, r2 - 8001fa0: d0f0 beq.n 8001f84 - 8001fa2: e015 b.n 8001fd0 + 8002026: 4b96 ldr r3, [pc, #600] ; (8002280 ) + 8002028: 681a ldr r2, [r3, #0] + 800202a: 2380 movs r3, #128 ; 0x80 + 800202c: 029b lsls r3, r3, #10 + 800202e: 4013 ands r3, r2 + 8002030: d0f0 beq.n 8002014 + 8002032: e015 b.n 8002060 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8001fa4: f7ff f8fa bl 800119c - 8001fa8: 0003 movs r3, r0 - 8001faa: 61bb str r3, [r7, #24] + 8002034: f7ff f8fa bl 800122c + 8002038: 0003 movs r3, r0 + 800203a: 61bb str r3, [r7, #24] /* Wait till HSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 8001fac: e008 b.n 8001fc0 + 800203c: e008 b.n 8002050 { if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) - 8001fae: f7ff f8f5 bl 800119c - 8001fb2: 0002 movs r2, r0 - 8001fb4: 69bb ldr r3, [r7, #24] - 8001fb6: 1ad3 subs r3, r2, r3 - 8001fb8: 2b64 cmp r3, #100 ; 0x64 - 8001fba: d901 bls.n 8001fc0 + 800203e: f7ff f8f5 bl 800122c + 8002042: 0002 movs r2, r0 + 8002044: 69bb ldr r3, [r7, #24] + 8002046: 1ad3 subs r3, r2, r3 + 8002048: 2b64 cmp r3, #100 ; 0x64 + 800204a: d901 bls.n 8002050 { return HAL_TIMEOUT; - 8001fbc: 2303 movs r3, #3 - 8001fbe: e2d3 b.n 8002568 + 800204c: 2303 movs r3, #3 + 800204e: e2d3 b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) - 8001fc0: 4b8b ldr r3, [pc, #556] ; (80021f0 ) - 8001fc2: 681a ldr r2, [r3, #0] - 8001fc4: 2380 movs r3, #128 ; 0x80 - 8001fc6: 029b lsls r3, r3, #10 - 8001fc8: 4013 ands r3, r2 - 8001fca: d1f0 bne.n 8001fae - 8001fcc: e000 b.n 8001fd0 + 8002050: 4b8b ldr r3, [pc, #556] ; (8002280 ) + 8002052: 681a ldr r2, [r3, #0] + 8002054: 2380 movs r3, #128 ; 0x80 + 8002056: 029b lsls r3, r3, #10 + 8002058: 4013 ands r3, r2 + 800205a: d1f0 bne.n 800203e + 800205c: e000 b.n 8002060 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) - 8001fce: 46c0 nop ; (mov r8, r8) + 800205e: 46c0 nop ; (mov r8, r8) } } } } /*----------------------------- HSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) - 8001fd0: 687b ldr r3, [r7, #4] - 8001fd2: 681b ldr r3, [r3, #0] - 8001fd4: 2202 movs r2, #2 - 8001fd6: 4013 ands r3, r2 - 8001fd8: d100 bne.n 8001fdc - 8001fda: e08b b.n 80020f4 + 8002060: 687b ldr r3, [r7, #4] + 8002062: 681b ldr r3, [r3, #0] + 8002064: 2202 movs r2, #2 + 8002066: 4013 ands r3, r2 + 8002068: d100 bne.n 800206c + 800206a: e08b b.n 8002184 { /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); hsi_state = RCC_OscInitStruct->HSIState; - 8001fdc: 687b ldr r3, [r7, #4] - 8001fde: 68db ldr r3, [r3, #12] - 8001fe0: 617b str r3, [r7, #20] + 800206c: 687b ldr r3, [r7, #4] + 800206e: 68db ldr r3, [r3, #12] + 8002070: 617b str r3, [r7, #20] hsi_state &= ~RCC_CR_HSIOUTEN; } #endif /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSI) - 8001fe2: 6a3b ldr r3, [r7, #32] - 8001fe4: 2b04 cmp r3, #4 - 8001fe6: d005 beq.n 8001ff4 + 8002072: 6a3b ldr r3, [r7, #32] + 8002074: 2b04 cmp r3, #4 + 8002076: d005 beq.n 8002084 || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSI))) - 8001fe8: 6a3b ldr r3, [r7, #32] - 8001fea: 2b0c cmp r3, #12 - 8001fec: d13e bne.n 800206c - 8001fee: 69fb ldr r3, [r7, #28] - 8001ff0: 2b00 cmp r3, #0 - 8001ff2: d13b bne.n 800206c + 8002078: 6a3b ldr r3, [r7, #32] + 800207a: 2b0c cmp r3, #12 + 800207c: d13e bne.n 80020fc + 800207e: 69fb ldr r3, [r7, #28] + 8002080: 2b00 cmp r3, #0 + 8002082: d13b bne.n 80020fc { /* When HSI is used as system clock it will not disabled */ if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (hsi_state == RCC_HSI_OFF)) - 8001ff4: 4b7e ldr r3, [pc, #504] ; (80021f0 ) - 8001ff6: 681b ldr r3, [r3, #0] - 8001ff8: 2204 movs r2, #4 - 8001ffa: 4013 ands r3, r2 - 8001ffc: d004 beq.n 8002008 - 8001ffe: 697b ldr r3, [r7, #20] - 8002000: 2b00 cmp r3, #0 - 8002002: d101 bne.n 8002008 + 8002084: 4b7e ldr r3, [pc, #504] ; (8002280 ) + 8002086: 681b ldr r3, [r3, #0] + 8002088: 2204 movs r2, #4 + 800208a: 4013 ands r3, r2 + 800208c: d004 beq.n 8002098 + 800208e: 697b ldr r3, [r7, #20] + 8002090: 2b00 cmp r3, #0 + 8002092: d101 bne.n 8002098 { return HAL_ERROR; - 8002004: 2301 movs r3, #1 - 8002006: e2af b.n 8002568 + 8002094: 2301 movs r3, #1 + 8002096: e2af b.n 80025f8 } /* Otherwise, just the calibration and HSI or HSIdiv4 are allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 8002008: 4b79 ldr r3, [pc, #484] ; (80021f0 ) - 800200a: 685b ldr r3, [r3, #4] - 800200c: 4a7b ldr r2, [pc, #492] ; (80021fc ) - 800200e: 4013 ands r3, r2 - 8002010: 0019 movs r1, r3 - 8002012: 687b ldr r3, [r7, #4] - 8002014: 691b ldr r3, [r3, #16] - 8002016: 021a lsls r2, r3, #8 - 8002018: 4b75 ldr r3, [pc, #468] ; (80021f0 ) - 800201a: 430a orrs r2, r1 - 800201c: 605a str r2, [r3, #4] + 8002098: 4b79 ldr r3, [pc, #484] ; (8002280 ) + 800209a: 685b ldr r3, [r3, #4] + 800209c: 4a7b ldr r2, [pc, #492] ; (800228c ) + 800209e: 4013 ands r3, r2 + 80020a0: 0019 movs r1, r3 + 80020a2: 687b ldr r3, [r7, #4] + 80020a4: 691b ldr r3, [r3, #16] + 80020a6: 021a lsls r2, r3, #8 + 80020a8: 4b75 ldr r3, [pc, #468] ; (8002280 ) + 80020aa: 430a orrs r2, r1 + 80020ac: 605a str r2, [r3, #4] /* Enable the Internal High Speed oscillator (HSI or HSIdiv4) */ __HAL_RCC_HSI_CONFIG(hsi_state); - 800201e: 4b74 ldr r3, [pc, #464] ; (80021f0 ) - 8002020: 681b ldr r3, [r3, #0] - 8002022: 2209 movs r2, #9 - 8002024: 4393 bics r3, r2 - 8002026: 0019 movs r1, r3 - 8002028: 4b71 ldr r3, [pc, #452] ; (80021f0 ) - 800202a: 697a ldr r2, [r7, #20] - 800202c: 430a orrs r2, r1 - 800202e: 601a str r2, [r3, #0] + 80020ae: 4b74 ldr r3, [pc, #464] ; (8002280 ) + 80020b0: 681b ldr r3, [r3, #0] + 80020b2: 2209 movs r2, #9 + 80020b4: 4393 bics r3, r2 + 80020b6: 0019 movs r1, r3 + 80020b8: 4b71 ldr r3, [pc, #452] ; (8002280 ) + 80020ba: 697a ldr r2, [r7, #20] + 80020bc: 430a orrs r2, r1 + 80020be: 601a str r2, [r3, #0] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; - 8002030: f000 fc7a bl 8002928 - 8002034: 0001 movs r1, r0 - 8002036: 4b6e ldr r3, [pc, #440] ; (80021f0 ) - 8002038: 68db ldr r3, [r3, #12] - 800203a: 091b lsrs r3, r3, #4 - 800203c: 220f movs r2, #15 - 800203e: 4013 ands r3, r2 - 8002040: 4a6f ldr r2, [pc, #444] ; (8002200 ) - 8002042: 5cd3 ldrb r3, [r2, r3] - 8002044: 000a movs r2, r1 - 8002046: 40da lsrs r2, r3 - 8002048: 4b6e ldr r3, [pc, #440] ; (8002204 ) - 800204a: 601a str r2, [r3, #0] + 80020c0: f000 fc7a bl 80029b8 + 80020c4: 0001 movs r1, r0 + 80020c6: 4b6e ldr r3, [pc, #440] ; (8002280 ) + 80020c8: 68db ldr r3, [r3, #12] + 80020ca: 091b lsrs r3, r3, #4 + 80020cc: 220f movs r2, #15 + 80020ce: 4013 ands r3, r2 + 80020d0: 4a6f ldr r2, [pc, #444] ; (8002290 ) + 80020d2: 5cd3 ldrb r3, [r2, r3] + 80020d4: 000a movs r2, r1 + 80020d6: 40da lsrs r2, r3 + 80020d8: 4b6e ldr r3, [pc, #440] ; (8002294 ) + 80020da: 601a str r2, [r3, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick (uwTickPrio); - 800204c: 4b6e ldr r3, [pc, #440] ; (8002208 ) - 800204e: 681b ldr r3, [r3, #0] - 8002050: 2513 movs r5, #19 - 8002052: 197c adds r4, r7, r5 - 8002054: 0018 movs r0, r3 - 8002056: f7ff f85b bl 8001110 - 800205a: 0003 movs r3, r0 - 800205c: 7023 strb r3, [r4, #0] + 80020dc: 4b6e ldr r3, [pc, #440] ; (8002298 ) + 80020de: 681b ldr r3, [r3, #0] + 80020e0: 2513 movs r5, #19 + 80020e2: 197c adds r4, r7, r5 + 80020e4: 0018 movs r0, r3 + 80020e6: f7ff f85b bl 80011a0 + 80020ea: 0003 movs r3, r0 + 80020ec: 7023 strb r3, [r4, #0] if(status != HAL_OK) - 800205e: 197b adds r3, r7, r5 - 8002060: 781b ldrb r3, [r3, #0] - 8002062: 2b00 cmp r3, #0 - 8002064: d046 beq.n 80020f4 + 80020ee: 197b adds r3, r7, r5 + 80020f0: 781b ldrb r3, [r3, #0] + 80020f2: 2b00 cmp r3, #0 + 80020f4: d046 beq.n 8002184 { return status; - 8002066: 197b adds r3, r7, r5 - 8002068: 781b ldrb r3, [r3, #0] - 800206a: e27d b.n 8002568 + 80020f6: 197b adds r3, r7, r5 + 80020f8: 781b ldrb r3, [r3, #0] + 80020fa: e27d b.n 80025f8 } } else { /* Check the HSI State */ if(hsi_state != RCC_HSI_OFF) - 800206c: 697b ldr r3, [r7, #20] - 800206e: 2b00 cmp r3, #0 - 8002070: d027 beq.n 80020c2 + 80020fc: 697b ldr r3, [r7, #20] + 80020fe: 2b00 cmp r3, #0 + 8002100: d027 beq.n 8002152 { /* Enable the Internal High Speed oscillator (HSI or HSIdiv4) */ __HAL_RCC_HSI_CONFIG(hsi_state); - 8002072: 4b5f ldr r3, [pc, #380] ; (80021f0 ) - 8002074: 681b ldr r3, [r3, #0] - 8002076: 2209 movs r2, #9 - 8002078: 4393 bics r3, r2 - 800207a: 0019 movs r1, r3 - 800207c: 4b5c ldr r3, [pc, #368] ; (80021f0 ) - 800207e: 697a ldr r2, [r7, #20] - 8002080: 430a orrs r2, r1 - 8002082: 601a str r2, [r3, #0] + 8002102: 4b5f ldr r3, [pc, #380] ; (8002280 ) + 8002104: 681b ldr r3, [r3, #0] + 8002106: 2209 movs r2, #9 + 8002108: 4393 bics r3, r2 + 800210a: 0019 movs r1, r3 + 800210c: 4b5c ldr r3, [pc, #368] ; (8002280 ) + 800210e: 697a ldr r2, [r7, #20] + 8002110: 430a orrs r2, r1 + 8002112: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002084: f7ff f88a bl 800119c - 8002088: 0003 movs r3, r0 - 800208a: 61bb str r3, [r7, #24] + 8002114: f7ff f88a bl 800122c + 8002118: 0003 movs r3, r0 + 800211a: 61bb str r3, [r7, #24] /* Wait till HSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 800208c: e008 b.n 80020a0 + 800211c: e008 b.n 8002130 { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 800208e: f7ff f885 bl 800119c - 8002092: 0002 movs r2, r0 - 8002094: 69bb ldr r3, [r7, #24] - 8002096: 1ad3 subs r3, r2, r3 - 8002098: 2b02 cmp r3, #2 - 800209a: d901 bls.n 80020a0 + 800211e: f7ff f885 bl 800122c + 8002122: 0002 movs r2, r0 + 8002124: 69bb ldr r3, [r7, #24] + 8002126: 1ad3 subs r3, r2, r3 + 8002128: 2b02 cmp r3, #2 + 800212a: d901 bls.n 8002130 { return HAL_TIMEOUT; - 800209c: 2303 movs r3, #3 - 800209e: e263 b.n 8002568 + 800212c: 2303 movs r3, #3 + 800212e: e263 b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 80020a0: 4b53 ldr r3, [pc, #332] ; (80021f0 ) - 80020a2: 681b ldr r3, [r3, #0] - 80020a4: 2204 movs r2, #4 - 80020a6: 4013 ands r3, r2 - 80020a8: d0f1 beq.n 800208e + 8002130: 4b53 ldr r3, [pc, #332] ; (8002280 ) + 8002132: 681b ldr r3, [r3, #0] + 8002134: 2204 movs r2, #4 + 8002136: 4013 ands r3, r2 + 8002138: d0f1 beq.n 800211e } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); - 80020aa: 4b51 ldr r3, [pc, #324] ; (80021f0 ) - 80020ac: 685b ldr r3, [r3, #4] - 80020ae: 4a53 ldr r2, [pc, #332] ; (80021fc ) - 80020b0: 4013 ands r3, r2 - 80020b2: 0019 movs r1, r3 - 80020b4: 687b ldr r3, [r7, #4] - 80020b6: 691b ldr r3, [r3, #16] - 80020b8: 021a lsls r2, r3, #8 - 80020ba: 4b4d ldr r3, [pc, #308] ; (80021f0 ) - 80020bc: 430a orrs r2, r1 - 80020be: 605a str r2, [r3, #4] - 80020c0: e018 b.n 80020f4 + 800213a: 4b51 ldr r3, [pc, #324] ; (8002280 ) + 800213c: 685b ldr r3, [r3, #4] + 800213e: 4a53 ldr r2, [pc, #332] ; (800228c ) + 8002140: 4013 ands r3, r2 + 8002142: 0019 movs r1, r3 + 8002144: 687b ldr r3, [r7, #4] + 8002146: 691b ldr r3, [r3, #16] + 8002148: 021a lsls r2, r3, #8 + 800214a: 4b4d ldr r3, [pc, #308] ; (8002280 ) + 800214c: 430a orrs r2, r1 + 800214e: 605a str r2, [r3, #4] + 8002150: e018 b.n 8002184 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); - 80020c2: 4b4b ldr r3, [pc, #300] ; (80021f0 ) - 80020c4: 681a ldr r2, [r3, #0] - 80020c6: 4b4a ldr r3, [pc, #296] ; (80021f0 ) - 80020c8: 2101 movs r1, #1 - 80020ca: 438a bics r2, r1 - 80020cc: 601a str r2, [r3, #0] + 8002152: 4b4b ldr r3, [pc, #300] ; (8002280 ) + 8002154: 681a ldr r2, [r3, #0] + 8002156: 4b4a ldr r3, [pc, #296] ; (8002280 ) + 8002158: 2101 movs r1, #1 + 800215a: 438a bics r2, r1 + 800215c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80020ce: f7ff f865 bl 800119c - 80020d2: 0003 movs r3, r0 - 80020d4: 61bb str r3, [r7, #24] + 800215e: f7ff f865 bl 800122c + 8002162: 0003 movs r3, r0 + 8002164: 61bb str r3, [r7, #24] /* Wait till HSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 80020d6: e008 b.n 80020ea + 8002166: e008 b.n 800217a { if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) - 80020d8: f7ff f860 bl 800119c - 80020dc: 0002 movs r2, r0 - 80020de: 69bb ldr r3, [r7, #24] - 80020e0: 1ad3 subs r3, r2, r3 - 80020e2: 2b02 cmp r3, #2 - 80020e4: d901 bls.n 80020ea + 8002168: f7ff f860 bl 800122c + 800216c: 0002 movs r2, r0 + 800216e: 69bb ldr r3, [r7, #24] + 8002170: 1ad3 subs r3, r2, r3 + 8002172: 2b02 cmp r3, #2 + 8002174: d901 bls.n 800217a { return HAL_TIMEOUT; - 80020e6: 2303 movs r3, #3 - 80020e8: e23e b.n 8002568 + 8002176: 2303 movs r3, #3 + 8002178: e23e b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) - 80020ea: 4b41 ldr r3, [pc, #260] ; (80021f0 ) - 80020ec: 681b ldr r3, [r3, #0] - 80020ee: 2204 movs r2, #4 - 80020f0: 4013 ands r3, r2 - 80020f2: d1f1 bne.n 80020d8 + 800217a: 4b41 ldr r3, [pc, #260] ; (8002280 ) + 800217c: 681b ldr r3, [r3, #0] + 800217e: 2204 movs r2, #4 + 8002180: 4013 ands r3, r2 + 8002182: d1f1 bne.n 8002168 } } } } /*----------------------------- MSI Configuration --------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI) - 80020f4: 687b ldr r3, [r7, #4] - 80020f6: 681b ldr r3, [r3, #0] - 80020f8: 2210 movs r2, #16 - 80020fa: 4013 ands r3, r2 - 80020fc: d100 bne.n 8002100 - 80020fe: e0a1 b.n 8002244 + 8002184: 687b ldr r3, [r7, #4] + 8002186: 681b ldr r3, [r3, #0] + 8002188: 2210 movs r2, #16 + 800218a: 4013 ands r3, r2 + 800218c: d100 bne.n 8002190 + 800218e: e0a1 b.n 80022d4 { /* When the MSI is used as system clock it will not be disabled */ if(sysclk_source == RCC_CFGR_SWS_MSI) - 8002100: 6a3b ldr r3, [r7, #32] - 8002102: 2b00 cmp r3, #0 - 8002104: d140 bne.n 8002188 + 8002190: 6a3b ldr r3, [r7, #32] + 8002192: 2b00 cmp r3, #0 + 8002194: d140 bne.n 8002218 { if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF)) - 8002106: 4b3a ldr r3, [pc, #232] ; (80021f0 ) - 8002108: 681a ldr r2, [r3, #0] - 800210a: 2380 movs r3, #128 ; 0x80 - 800210c: 009b lsls r3, r3, #2 - 800210e: 4013 ands r3, r2 - 8002110: d005 beq.n 800211e - 8002112: 687b ldr r3, [r7, #4] - 8002114: 699b ldr r3, [r3, #24] - 8002116: 2b00 cmp r3, #0 - 8002118: d101 bne.n 800211e + 8002196: 4b3a ldr r3, [pc, #232] ; (8002280 ) + 8002198: 681a ldr r2, [r3, #0] + 800219a: 2380 movs r3, #128 ; 0x80 + 800219c: 009b lsls r3, r3, #2 + 800219e: 4013 ands r3, r2 + 80021a0: d005 beq.n 80021ae + 80021a2: 687b ldr r3, [r7, #4] + 80021a4: 699b ldr r3, [r3, #24] + 80021a6: 2b00 cmp r3, #0 + 80021a8: d101 bne.n 80021ae { return HAL_ERROR; - 800211a: 2301 movs r3, #1 - 800211c: e224 b.n 8002568 + 80021aa: 2301 movs r3, #1 + 80021ac: e224 b.n 80025f8 /* Check MSICalibrationValue and MSIClockRange input parameters */ assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue)); assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - 800211e: 4b34 ldr r3, [pc, #208] ; (80021f0 ) - 8002120: 685b ldr r3, [r3, #4] - 8002122: 4a3a ldr r2, [pc, #232] ; (800220c ) - 8002124: 4013 ands r3, r2 - 8002126: 0019 movs r1, r3 - 8002128: 687b ldr r3, [r7, #4] - 800212a: 6a1a ldr r2, [r3, #32] - 800212c: 4b30 ldr r3, [pc, #192] ; (80021f0 ) - 800212e: 430a orrs r2, r1 - 8002130: 605a str r2, [r3, #4] + 80021ae: 4b34 ldr r3, [pc, #208] ; (8002280 ) + 80021b0: 685b ldr r3, [r3, #4] + 80021b2: 4a3a ldr r2, [pc, #232] ; (800229c ) + 80021b4: 4013 ands r3, r2 + 80021b6: 0019 movs r1, r3 + 80021b8: 687b ldr r3, [r7, #4] + 80021ba: 6a1a ldr r2, [r3, #32] + 80021bc: 4b30 ldr r3, [pc, #192] ; (8002280 ) + 80021be: 430a orrs r2, r1 + 80021c0: 605a str r2, [r3, #4] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - 8002132: 4b2f ldr r3, [pc, #188] ; (80021f0 ) - 8002134: 685b ldr r3, [r3, #4] - 8002136: 021b lsls r3, r3, #8 - 8002138: 0a19 lsrs r1, r3, #8 - 800213a: 687b ldr r3, [r7, #4] - 800213c: 69db ldr r3, [r3, #28] - 800213e: 061a lsls r2, r3, #24 - 8002140: 4b2b ldr r3, [pc, #172] ; (80021f0 ) - 8002142: 430a orrs r2, r1 - 8002144: 605a str r2, [r3, #4] + 80021c2: 4b2f ldr r3, [pc, #188] ; (8002280 ) + 80021c4: 685b ldr r3, [r3, #4] + 80021c6: 021b lsls r3, r3, #8 + 80021c8: 0a19 lsrs r1, r3, #8 + 80021ca: 687b ldr r3, [r7, #4] + 80021cc: 69db ldr r3, [r3, #28] + 80021ce: 061a lsls r2, r3, #24 + 80021d0: 4b2b ldr r3, [pc, #172] ; (8002280 ) + 80021d2: 430a orrs r2, r1 + 80021d4: 605a str r2, [r3, #4] /* Update the SystemCoreClock global variable */ SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U))) - 8002146: 687b ldr r3, [r7, #4] - 8002148: 6a1b ldr r3, [r3, #32] - 800214a: 0b5b lsrs r3, r3, #13 - 800214c: 3301 adds r3, #1 - 800214e: 2280 movs r2, #128 ; 0x80 - 8002150: 0212 lsls r2, r2, #8 - 8002152: 409a lsls r2, r3 + 80021d6: 687b ldr r3, [r7, #4] + 80021d8: 6a1b ldr r3, [r3, #32] + 80021da: 0b5b lsrs r3, r3, #13 + 80021dc: 3301 adds r3, #1 + 80021de: 2280 movs r2, #128 ; 0x80 + 80021e0: 0212 lsls r2, r2, #8 + 80021e2: 409a lsls r2, r3 >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)]; - 8002154: 4b26 ldr r3, [pc, #152] ; (80021f0 ) - 8002156: 68db ldr r3, [r3, #12] - 8002158: 091b lsrs r3, r3, #4 - 800215a: 210f movs r1, #15 - 800215c: 400b ands r3, r1 - 800215e: 4928 ldr r1, [pc, #160] ; (8002200 ) - 8002160: 5ccb ldrb r3, [r1, r3] - 8002162: 40da lsrs r2, r3 + 80021e4: 4b26 ldr r3, [pc, #152] ; (8002280 ) + 80021e6: 68db ldr r3, [r3, #12] + 80021e8: 091b lsrs r3, r3, #4 + 80021ea: 210f movs r1, #15 + 80021ec: 400b ands r3, r1 + 80021ee: 4928 ldr r1, [pc, #160] ; (8002290 ) + 80021f0: 5ccb ldrb r3, [r1, r3] + 80021f2: 40da lsrs r2, r3 SystemCoreClock = (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U))) - 8002164: 4b27 ldr r3, [pc, #156] ; (8002204 ) - 8002166: 601a str r2, [r3, #0] + 80021f4: 4b27 ldr r3, [pc, #156] ; (8002294 ) + 80021f6: 601a str r2, [r3, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick (uwTickPrio); - 8002168: 4b27 ldr r3, [pc, #156] ; (8002208 ) - 800216a: 681b ldr r3, [r3, #0] - 800216c: 2513 movs r5, #19 - 800216e: 197c adds r4, r7, r5 - 8002170: 0018 movs r0, r3 - 8002172: f7fe ffcd bl 8001110 - 8002176: 0003 movs r3, r0 - 8002178: 7023 strb r3, [r4, #0] + 80021f8: 4b27 ldr r3, [pc, #156] ; (8002298 ) + 80021fa: 681b ldr r3, [r3, #0] + 80021fc: 2513 movs r5, #19 + 80021fe: 197c adds r4, r7, r5 + 8002200: 0018 movs r0, r3 + 8002202: f7fe ffcd bl 80011a0 + 8002206: 0003 movs r3, r0 + 8002208: 7023 strb r3, [r4, #0] if(status != HAL_OK) - 800217a: 197b adds r3, r7, r5 - 800217c: 781b ldrb r3, [r3, #0] - 800217e: 2b00 cmp r3, #0 - 8002180: d060 beq.n 8002244 + 800220a: 197b adds r3, r7, r5 + 800220c: 781b ldrb r3, [r3, #0] + 800220e: 2b00 cmp r3, #0 + 8002210: d060 beq.n 80022d4 { return status; - 8002182: 197b adds r3, r7, r5 - 8002184: 781b ldrb r3, [r3, #0] - 8002186: e1ef b.n 8002568 + 8002212: 197b adds r3, r7, r5 + 8002214: 781b ldrb r3, [r3, #0] + 8002216: e1ef b.n 80025f8 { /* Check MSI State */ assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState)); /* Check the MSI State */ if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF) - 8002188: 687b ldr r3, [r7, #4] - 800218a: 699b ldr r3, [r3, #24] - 800218c: 2b00 cmp r3, #0 - 800218e: d03f beq.n 8002210 + 8002218: 687b ldr r3, [r7, #4] + 800221a: 699b ldr r3, [r3, #24] + 800221c: 2b00 cmp r3, #0 + 800221e: d03f beq.n 80022a0 { /* Enable the Multi Speed oscillator (MSI). */ __HAL_RCC_MSI_ENABLE(); - 8002190: 4b17 ldr r3, [pc, #92] ; (80021f0 ) - 8002192: 681a ldr r2, [r3, #0] - 8002194: 4b16 ldr r3, [pc, #88] ; (80021f0 ) - 8002196: 2180 movs r1, #128 ; 0x80 - 8002198: 0049 lsls r1, r1, #1 - 800219a: 430a orrs r2, r1 - 800219c: 601a str r2, [r3, #0] + 8002220: 4b17 ldr r3, [pc, #92] ; (8002280 ) + 8002222: 681a ldr r2, [r3, #0] + 8002224: 4b16 ldr r3, [pc, #88] ; (8002280 ) + 8002226: 2180 movs r1, #128 ; 0x80 + 8002228: 0049 lsls r1, r1, #1 + 800222a: 430a orrs r2, r1 + 800222c: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800219e: f7fe fffd bl 800119c - 80021a2: 0003 movs r3, r0 - 80021a4: 61bb str r3, [r7, #24] + 800222e: f7fe fffd bl 800122c + 8002232: 0003 movs r3, r0 + 8002234: 61bb str r3, [r7, #24] /* Wait till MSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 80021a6: e008 b.n 80021ba + 8002236: e008 b.n 800224a { if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - 80021a8: f7fe fff8 bl 800119c - 80021ac: 0002 movs r2, r0 - 80021ae: 69bb ldr r3, [r7, #24] - 80021b0: 1ad3 subs r3, r2, r3 - 80021b2: 2b02 cmp r3, #2 - 80021b4: d901 bls.n 80021ba + 8002238: f7fe fff8 bl 800122c + 800223c: 0002 movs r2, r0 + 800223e: 69bb ldr r3, [r7, #24] + 8002240: 1ad3 subs r3, r2, r3 + 8002242: 2b02 cmp r3, #2 + 8002244: d901 bls.n 800224a { return HAL_TIMEOUT; - 80021b6: 2303 movs r3, #3 - 80021b8: e1d6 b.n 8002568 + 8002246: 2303 movs r3, #3 + 8002248: e1d6 b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 80021ba: 4b0d ldr r3, [pc, #52] ; (80021f0 ) - 80021bc: 681a ldr r2, [r3, #0] - 80021be: 2380 movs r3, #128 ; 0x80 - 80021c0: 009b lsls r3, r3, #2 - 80021c2: 4013 ands r3, r2 - 80021c4: d0f0 beq.n 80021a8 + 800224a: 4b0d ldr r3, [pc, #52] ; (8002280 ) + 800224c: 681a ldr r2, [r3, #0] + 800224e: 2380 movs r3, #128 ; 0x80 + 8002250: 009b lsls r3, r3, #2 + 8002252: 4013 ands r3, r2 + 8002254: d0f0 beq.n 8002238 /* Check MSICalibrationValue and MSIClockRange input parameters */ assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue)); assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange)); /* Selects the Multiple Speed oscillator (MSI) clock range .*/ __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange); - 80021c6: 4b0a ldr r3, [pc, #40] ; (80021f0 ) - 80021c8: 685b ldr r3, [r3, #4] - 80021ca: 4a10 ldr r2, [pc, #64] ; (800220c ) - 80021cc: 4013 ands r3, r2 - 80021ce: 0019 movs r1, r3 - 80021d0: 687b ldr r3, [r7, #4] - 80021d2: 6a1a ldr r2, [r3, #32] - 80021d4: 4b06 ldr r3, [pc, #24] ; (80021f0 ) - 80021d6: 430a orrs r2, r1 - 80021d8: 605a str r2, [r3, #4] + 8002256: 4b0a ldr r3, [pc, #40] ; (8002280 ) + 8002258: 685b ldr r3, [r3, #4] + 800225a: 4a10 ldr r2, [pc, #64] ; (800229c ) + 800225c: 4013 ands r3, r2 + 800225e: 0019 movs r1, r3 + 8002260: 687b ldr r3, [r7, #4] + 8002262: 6a1a ldr r2, [r3, #32] + 8002264: 4b06 ldr r3, [pc, #24] ; (8002280 ) + 8002266: 430a orrs r2, r1 + 8002268: 605a str r2, [r3, #4] /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/ __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue); - 80021da: 4b05 ldr r3, [pc, #20] ; (80021f0 ) - 80021dc: 685b ldr r3, [r3, #4] - 80021de: 021b lsls r3, r3, #8 - 80021e0: 0a19 lsrs r1, r3, #8 - 80021e2: 687b ldr r3, [r7, #4] - 80021e4: 69db ldr r3, [r3, #28] - 80021e6: 061a lsls r2, r3, #24 - 80021e8: 4b01 ldr r3, [pc, #4] ; (80021f0 ) - 80021ea: 430a orrs r2, r1 - 80021ec: 605a str r2, [r3, #4] - 80021ee: e029 b.n 8002244 - 80021f0: 40021000 .word 0x40021000 - 80021f4: fffeffff .word 0xfffeffff - 80021f8: fffbffff .word 0xfffbffff - 80021fc: ffffe0ff .word 0xffffe0ff - 8002200: 08004bf0 .word 0x08004bf0 - 8002204: 20000000 .word 0x20000000 - 8002208: 20000004 .word 0x20000004 - 800220c: ffff1fff .word 0xffff1fff + 800226a: 4b05 ldr r3, [pc, #20] ; (8002280 ) + 800226c: 685b ldr r3, [r3, #4] + 800226e: 021b lsls r3, r3, #8 + 8002270: 0a19 lsrs r1, r3, #8 + 8002272: 687b ldr r3, [r7, #4] + 8002274: 69db ldr r3, [r3, #28] + 8002276: 061a lsls r2, r3, #24 + 8002278: 4b01 ldr r3, [pc, #4] ; (8002280 ) + 800227a: 430a orrs r2, r1 + 800227c: 605a str r2, [r3, #4] + 800227e: e029 b.n 80022d4 + 8002280: 40021000 .word 0x40021000 + 8002284: fffeffff .word 0xfffeffff + 8002288: fffbffff .word 0xfffbffff + 800228c: ffffe0ff .word 0xffffe0ff + 8002290: 08004c80 .word 0x08004c80 + 8002294: 20000000 .word 0x20000000 + 8002298: 20000004 .word 0x20000004 + 800229c: ffff1fff .word 0xffff1fff } else { /* Disable the Multi Speed oscillator (MSI). */ __HAL_RCC_MSI_DISABLE(); - 8002210: 4bbe ldr r3, [pc, #760] ; (800250c ) - 8002212: 681a ldr r2, [r3, #0] - 8002214: 4bbd ldr r3, [pc, #756] ; (800250c ) - 8002216: 49be ldr r1, [pc, #760] ; (8002510 ) - 8002218: 400a ands r2, r1 - 800221a: 601a str r2, [r3, #0] + 80022a0: 4bbe ldr r3, [pc, #760] ; (800259c ) + 80022a2: 681a ldr r2, [r3, #0] + 80022a4: 4bbd ldr r3, [pc, #756] ; (800259c ) + 80022a6: 49be ldr r1, [pc, #760] ; (80025a0 ) + 80022a8: 400a ands r2, r1 + 80022aa: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800221c: f7fe ffbe bl 800119c - 8002220: 0003 movs r3, r0 - 8002222: 61bb str r3, [r7, #24] + 80022ac: f7fe ffbe bl 800122c + 80022b0: 0003 movs r3, r0 + 80022b2: 61bb str r3, [r7, #24] /* Wait till MSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) - 8002224: e008 b.n 8002238 + 80022b4: e008 b.n 80022c8 { if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE) - 8002226: f7fe ffb9 bl 800119c - 800222a: 0002 movs r2, r0 - 800222c: 69bb ldr r3, [r7, #24] - 800222e: 1ad3 subs r3, r2, r3 - 8002230: 2b02 cmp r3, #2 - 8002232: d901 bls.n 8002238 + 80022b6: f7fe ffb9 bl 800122c + 80022ba: 0002 movs r2, r0 + 80022bc: 69bb ldr r3, [r7, #24] + 80022be: 1ad3 subs r3, r2, r3 + 80022c0: 2b02 cmp r3, #2 + 80022c2: d901 bls.n 80022c8 { return HAL_TIMEOUT; - 8002234: 2303 movs r3, #3 - 8002236: e197 b.n 8002568 + 80022c4: 2303 movs r3, #3 + 80022c6: e197 b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) - 8002238: 4bb4 ldr r3, [pc, #720] ; (800250c ) - 800223a: 681a ldr r2, [r3, #0] - 800223c: 2380 movs r3, #128 ; 0x80 - 800223e: 009b lsls r3, r3, #2 - 8002240: 4013 ands r3, r2 - 8002242: d1f0 bne.n 8002226 + 80022c8: 4bb4 ldr r3, [pc, #720] ; (800259c ) + 80022ca: 681a ldr r2, [r3, #0] + 80022cc: 2380 movs r3, #128 ; 0x80 + 80022ce: 009b lsls r3, r3, #2 + 80022d0: 4013 ands r3, r2 + 80022d2: d1f0 bne.n 80022b6 } } } } /*------------------------------ LSI Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) - 8002244: 687b ldr r3, [r7, #4] - 8002246: 681b ldr r3, [r3, #0] - 8002248: 2208 movs r2, #8 - 800224a: 4013 ands r3, r2 - 800224c: d036 beq.n 80022bc + 80022d4: 687b ldr r3, [r7, #4] + 80022d6: 681b ldr r3, [r3, #0] + 80022d8: 2208 movs r2, #8 + 80022da: 4013 ands r3, r2 + 80022dc: d036 beq.n 800234c { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) - 800224e: 687b ldr r3, [r7, #4] - 8002250: 695b ldr r3, [r3, #20] - 8002252: 2b00 cmp r3, #0 - 8002254: d019 beq.n 800228a + 80022de: 687b ldr r3, [r7, #4] + 80022e0: 695b ldr r3, [r3, #20] + 80022e2: 2b00 cmp r3, #0 + 80022e4: d019 beq.n 800231a { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); - 8002256: 4bad ldr r3, [pc, #692] ; (800250c ) - 8002258: 6d1a ldr r2, [r3, #80] ; 0x50 - 800225a: 4bac ldr r3, [pc, #688] ; (800250c ) - 800225c: 2101 movs r1, #1 - 800225e: 430a orrs r2, r1 - 8002260: 651a str r2, [r3, #80] ; 0x50 + 80022e6: 4bad ldr r3, [pc, #692] ; (800259c ) + 80022e8: 6d1a ldr r2, [r3, #80] ; 0x50 + 80022ea: 4bac ldr r3, [pc, #688] ; (800259c ) + 80022ec: 2101 movs r1, #1 + 80022ee: 430a orrs r2, r1 + 80022f0: 651a str r2, [r3, #80] ; 0x50 /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002262: f7fe ff9b bl 800119c - 8002266: 0003 movs r3, r0 - 8002268: 61bb str r3, [r7, #24] + 80022f2: f7fe ff9b bl 800122c + 80022f6: 0003 movs r3, r0 + 80022f8: 61bb str r3, [r7, #24] /* Wait till LSI is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 800226a: e008 b.n 800227e + 80022fa: e008 b.n 800230e { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 800226c: f7fe ff96 bl 800119c - 8002270: 0002 movs r2, r0 - 8002272: 69bb ldr r3, [r7, #24] - 8002274: 1ad3 subs r3, r2, r3 - 8002276: 2b02 cmp r3, #2 - 8002278: d901 bls.n 800227e + 80022fc: f7fe ff96 bl 800122c + 8002300: 0002 movs r2, r0 + 8002302: 69bb ldr r3, [r7, #24] + 8002304: 1ad3 subs r3, r2, r3 + 8002306: 2b02 cmp r3, #2 + 8002308: d901 bls.n 800230e { return HAL_TIMEOUT; - 800227a: 2303 movs r3, #3 - 800227c: e174 b.n 8002568 + 800230a: 2303 movs r3, #3 + 800230c: e174 b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U) - 800227e: 4ba3 ldr r3, [pc, #652] ; (800250c ) - 8002280: 6d1b ldr r3, [r3, #80] ; 0x50 - 8002282: 2202 movs r2, #2 - 8002284: 4013 ands r3, r2 - 8002286: d0f1 beq.n 800226c - 8002288: e018 b.n 80022bc + 800230e: 4ba3 ldr r3, [pc, #652] ; (800259c ) + 8002310: 6d1b ldr r3, [r3, #80] ; 0x50 + 8002312: 2202 movs r2, #2 + 8002314: 4013 ands r3, r2 + 8002316: d0f1 beq.n 80022fc + 8002318: e018 b.n 800234c } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); - 800228a: 4ba0 ldr r3, [pc, #640] ; (800250c ) - 800228c: 6d1a ldr r2, [r3, #80] ; 0x50 - 800228e: 4b9f ldr r3, [pc, #636] ; (800250c ) - 8002290: 2101 movs r1, #1 - 8002292: 438a bics r2, r1 - 8002294: 651a str r2, [r3, #80] ; 0x50 + 800231a: 4ba0 ldr r3, [pc, #640] ; (800259c ) + 800231c: 6d1a ldr r2, [r3, #80] ; 0x50 + 800231e: 4b9f ldr r3, [pc, #636] ; (800259c ) + 8002320: 2101 movs r1, #1 + 8002322: 438a bics r2, r1 + 8002324: 651a str r2, [r3, #80] ; 0x50 /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002296: f7fe ff81 bl 800119c - 800229a: 0003 movs r3, r0 - 800229c: 61bb str r3, [r7, #24] + 8002326: f7fe ff81 bl 800122c + 800232a: 0003 movs r3, r0 + 800232c: 61bb str r3, [r7, #24] /* Wait till LSI is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 800229e: e008 b.n 80022b2 + 800232e: e008 b.n 8002342 { if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) - 80022a0: f7fe ff7c bl 800119c - 80022a4: 0002 movs r2, r0 - 80022a6: 69bb ldr r3, [r7, #24] - 80022a8: 1ad3 subs r3, r2, r3 - 80022aa: 2b02 cmp r3, #2 - 80022ac: d901 bls.n 80022b2 + 8002330: f7fe ff7c bl 800122c + 8002334: 0002 movs r2, r0 + 8002336: 69bb ldr r3, [r7, #24] + 8002338: 1ad3 subs r3, r2, r3 + 800233a: 2b02 cmp r3, #2 + 800233c: d901 bls.n 8002342 { return HAL_TIMEOUT; - 80022ae: 2303 movs r3, #3 - 80022b0: e15a b.n 8002568 + 800233e: 2303 movs r3, #3 + 8002340: e15a b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U) - 80022b2: 4b96 ldr r3, [pc, #600] ; (800250c ) - 80022b4: 6d1b ldr r3, [r3, #80] ; 0x50 - 80022b6: 2202 movs r2, #2 - 80022b8: 4013 ands r3, r2 - 80022ba: d1f1 bne.n 80022a0 + 8002342: 4b96 ldr r3, [pc, #600] ; (800259c ) + 8002344: 6d1b ldr r3, [r3, #80] ; 0x50 + 8002346: 2202 movs r2, #2 + 8002348: 4013 ands r3, r2 + 800234a: d1f1 bne.n 8002330 } } } } /*------------------------------ LSE Configuration -------------------------*/ if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) - 80022bc: 687b ldr r3, [r7, #4] - 80022be: 681b ldr r3, [r3, #0] - 80022c0: 2204 movs r2, #4 - 80022c2: 4013 ands r3, r2 - 80022c4: d100 bne.n 80022c8 - 80022c6: e0ae b.n 8002426 + 800234c: 687b ldr r3, [r7, #4] + 800234e: 681b ldr r3, [r3, #0] + 8002350: 2204 movs r2, #4 + 8002352: 4013 ands r3, r2 + 8002354: d100 bne.n 8002358 + 8002356: e0ae b.n 80024b6 { FlagStatus pwrclkchanged = RESET; - 80022c8: 2027 movs r0, #39 ; 0x27 - 80022ca: 183b adds r3, r7, r0 - 80022cc: 2200 movs r2, #0 - 80022ce: 701a strb r2, [r3, #0] + 8002358: 2027 movs r0, #39 ; 0x27 + 800235a: 183b adds r3, r7, r0 + 800235c: 2200 movs r2, #0 + 800235e: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 80022d0: 4b8e ldr r3, [pc, #568] ; (800250c ) - 80022d2: 6b9a ldr r2, [r3, #56] ; 0x38 - 80022d4: 2380 movs r3, #128 ; 0x80 - 80022d6: 055b lsls r3, r3, #21 - 80022d8: 4013 ands r3, r2 - 80022da: d109 bne.n 80022f0 + 8002360: 4b8e ldr r3, [pc, #568] ; (800259c ) + 8002362: 6b9a ldr r2, [r3, #56] ; 0x38 + 8002364: 2380 movs r3, #128 ; 0x80 + 8002366: 055b lsls r3, r3, #21 + 8002368: 4013 ands r3, r2 + 800236a: d109 bne.n 8002380 { __HAL_RCC_PWR_CLK_ENABLE(); - 80022dc: 4b8b ldr r3, [pc, #556] ; (800250c ) - 80022de: 6b9a ldr r2, [r3, #56] ; 0x38 - 80022e0: 4b8a ldr r3, [pc, #552] ; (800250c ) - 80022e2: 2180 movs r1, #128 ; 0x80 - 80022e4: 0549 lsls r1, r1, #21 - 80022e6: 430a orrs r2, r1 - 80022e8: 639a str r2, [r3, #56] ; 0x38 + 800236c: 4b8b ldr r3, [pc, #556] ; (800259c ) + 800236e: 6b9a ldr r2, [r3, #56] ; 0x38 + 8002370: 4b8a ldr r3, [pc, #552] ; (800259c ) + 8002372: 2180 movs r1, #128 ; 0x80 + 8002374: 0549 lsls r1, r1, #21 + 8002376: 430a orrs r2, r1 + 8002378: 639a str r2, [r3, #56] ; 0x38 pwrclkchanged = SET; - 80022ea: 183b adds r3, r7, r0 - 80022ec: 2201 movs r2, #1 - 80022ee: 701a strb r2, [r3, #0] + 800237a: 183b adds r3, r7, r0 + 800237c: 2201 movs r2, #1 + 800237e: 701a strb r2, [r3, #0] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 80022f0: 4b88 ldr r3, [pc, #544] ; (8002514 ) - 80022f2: 681a ldr r2, [r3, #0] - 80022f4: 2380 movs r3, #128 ; 0x80 - 80022f6: 005b lsls r3, r3, #1 - 80022f8: 4013 ands r3, r2 - 80022fa: d11a bne.n 8002332 + 8002380: 4b88 ldr r3, [pc, #544] ; (80025a4 ) + 8002382: 681a ldr r2, [r3, #0] + 8002384: 2380 movs r3, #128 ; 0x80 + 8002386: 005b lsls r3, r3, #1 + 8002388: 4013 ands r3, r2 + 800238a: d11a bne.n 80023c2 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 80022fc: 4b85 ldr r3, [pc, #532] ; (8002514 ) - 80022fe: 681a ldr r2, [r3, #0] - 8002300: 4b84 ldr r3, [pc, #528] ; (8002514 ) - 8002302: 2180 movs r1, #128 ; 0x80 - 8002304: 0049 lsls r1, r1, #1 - 8002306: 430a orrs r2, r1 - 8002308: 601a str r2, [r3, #0] + 800238c: 4b85 ldr r3, [pc, #532] ; (80025a4 ) + 800238e: 681a ldr r2, [r3, #0] + 8002390: 4b84 ldr r3, [pc, #528] ; (80025a4 ) + 8002392: 2180 movs r1, #128 ; 0x80 + 8002394: 0049 lsls r1, r1, #1 + 8002396: 430a orrs r2, r1 + 8002398: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 800230a: f7fe ff47 bl 800119c - 800230e: 0003 movs r3, r0 - 8002310: 61bb str r3, [r7, #24] + 800239a: f7fe ff47 bl 800122c + 800239e: 0003 movs r3, r0 + 80023a0: 61bb str r3, [r7, #24] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8002312: e008 b.n 8002326 + 80023a2: e008 b.n 80023b6 { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8002314: f7fe ff42 bl 800119c - 8002318: 0002 movs r2, r0 - 800231a: 69bb ldr r3, [r7, #24] - 800231c: 1ad3 subs r3, r2, r3 - 800231e: 2b64 cmp r3, #100 ; 0x64 - 8002320: d901 bls.n 8002326 + 80023a4: f7fe ff42 bl 800122c + 80023a8: 0002 movs r2, r0 + 80023aa: 69bb ldr r3, [r7, #24] + 80023ac: 1ad3 subs r3, r2, r3 + 80023ae: 2b64 cmp r3, #100 ; 0x64 + 80023b0: d901 bls.n 80023b6 { return HAL_TIMEOUT; - 8002322: 2303 movs r3, #3 - 8002324: e120 b.n 8002568 + 80023b2: 2303 movs r3, #3 + 80023b4: e120 b.n 80025f8 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8002326: 4b7b ldr r3, [pc, #492] ; (8002514 ) - 8002328: 681a ldr r2, [r3, #0] - 800232a: 2380 movs r3, #128 ; 0x80 - 800232c: 005b lsls r3, r3, #1 - 800232e: 4013 ands r3, r2 - 8002330: d0f0 beq.n 8002314 + 80023b6: 4b7b ldr r3, [pc, #492] ; (80025a4 ) + 80023b8: 681a ldr r2, [r3, #0] + 80023ba: 2380 movs r3, #128 ; 0x80 + 80023bc: 005b lsls r3, r3, #1 + 80023be: 4013 ands r3, r2 + 80023c0: d0f0 beq.n 80023a4 } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); - 8002332: 687b ldr r3, [r7, #4] - 8002334: 689a ldr r2, [r3, #8] - 8002336: 2380 movs r3, #128 ; 0x80 - 8002338: 005b lsls r3, r3, #1 - 800233a: 429a cmp r2, r3 - 800233c: d107 bne.n 800234e - 800233e: 4b73 ldr r3, [pc, #460] ; (800250c ) - 8002340: 6d1a ldr r2, [r3, #80] ; 0x50 - 8002342: 4b72 ldr r3, [pc, #456] ; (800250c ) - 8002344: 2180 movs r1, #128 ; 0x80 - 8002346: 0049 lsls r1, r1, #1 - 8002348: 430a orrs r2, r1 - 800234a: 651a str r2, [r3, #80] ; 0x50 - 800234c: e031 b.n 80023b2 - 800234e: 687b ldr r3, [r7, #4] - 8002350: 689b ldr r3, [r3, #8] - 8002352: 2b00 cmp r3, #0 - 8002354: d10c bne.n 8002370 - 8002356: 4b6d ldr r3, [pc, #436] ; (800250c ) - 8002358: 6d1a ldr r2, [r3, #80] ; 0x50 - 800235a: 4b6c ldr r3, [pc, #432] ; (800250c ) - 800235c: 496c ldr r1, [pc, #432] ; (8002510 ) - 800235e: 400a ands r2, r1 - 8002360: 651a str r2, [r3, #80] ; 0x50 - 8002362: 4b6a ldr r3, [pc, #424] ; (800250c ) - 8002364: 6d1a ldr r2, [r3, #80] ; 0x50 - 8002366: 4b69 ldr r3, [pc, #420] ; (800250c ) - 8002368: 496b ldr r1, [pc, #428] ; (8002518 ) - 800236a: 400a ands r2, r1 - 800236c: 651a str r2, [r3, #80] ; 0x50 - 800236e: e020 b.n 80023b2 - 8002370: 687b ldr r3, [r7, #4] - 8002372: 689a ldr r2, [r3, #8] - 8002374: 23a0 movs r3, #160 ; 0xa0 - 8002376: 00db lsls r3, r3, #3 - 8002378: 429a cmp r2, r3 - 800237a: d10e bne.n 800239a - 800237c: 4b63 ldr r3, [pc, #396] ; (800250c ) - 800237e: 6d1a ldr r2, [r3, #80] ; 0x50 - 8002380: 4b62 ldr r3, [pc, #392] ; (800250c ) - 8002382: 2180 movs r1, #128 ; 0x80 - 8002384: 00c9 lsls r1, r1, #3 - 8002386: 430a orrs r2, r1 - 8002388: 651a str r2, [r3, #80] ; 0x50 - 800238a: 4b60 ldr r3, [pc, #384] ; (800250c ) - 800238c: 6d1a ldr r2, [r3, #80] ; 0x50 - 800238e: 4b5f ldr r3, [pc, #380] ; (800250c ) - 8002390: 2180 movs r1, #128 ; 0x80 - 8002392: 0049 lsls r1, r1, #1 - 8002394: 430a orrs r2, r1 - 8002396: 651a str r2, [r3, #80] ; 0x50 - 8002398: e00b b.n 80023b2 - 800239a: 4b5c ldr r3, [pc, #368] ; (800250c ) - 800239c: 6d1a ldr r2, [r3, #80] ; 0x50 - 800239e: 4b5b ldr r3, [pc, #364] ; (800250c ) - 80023a0: 495b ldr r1, [pc, #364] ; (8002510 ) - 80023a2: 400a ands r2, r1 - 80023a4: 651a str r2, [r3, #80] ; 0x50 - 80023a6: 4b59 ldr r3, [pc, #356] ; (800250c ) - 80023a8: 6d1a ldr r2, [r3, #80] ; 0x50 - 80023aa: 4b58 ldr r3, [pc, #352] ; (800250c ) - 80023ac: 495a ldr r1, [pc, #360] ; (8002518 ) - 80023ae: 400a ands r2, r1 - 80023b0: 651a str r2, [r3, #80] ; 0x50 + 80023c2: 687b ldr r3, [r7, #4] + 80023c4: 689a ldr r2, [r3, #8] + 80023c6: 2380 movs r3, #128 ; 0x80 + 80023c8: 005b lsls r3, r3, #1 + 80023ca: 429a cmp r2, r3 + 80023cc: d107 bne.n 80023de + 80023ce: 4b73 ldr r3, [pc, #460] ; (800259c ) + 80023d0: 6d1a ldr r2, [r3, #80] ; 0x50 + 80023d2: 4b72 ldr r3, [pc, #456] ; (800259c ) + 80023d4: 2180 movs r1, #128 ; 0x80 + 80023d6: 0049 lsls r1, r1, #1 + 80023d8: 430a orrs r2, r1 + 80023da: 651a str r2, [r3, #80] ; 0x50 + 80023dc: e031 b.n 8002442 + 80023de: 687b ldr r3, [r7, #4] + 80023e0: 689b ldr r3, [r3, #8] + 80023e2: 2b00 cmp r3, #0 + 80023e4: d10c bne.n 8002400 + 80023e6: 4b6d ldr r3, [pc, #436] ; (800259c ) + 80023e8: 6d1a ldr r2, [r3, #80] ; 0x50 + 80023ea: 4b6c ldr r3, [pc, #432] ; (800259c ) + 80023ec: 496c ldr r1, [pc, #432] ; (80025a0 ) + 80023ee: 400a ands r2, r1 + 80023f0: 651a str r2, [r3, #80] ; 0x50 + 80023f2: 4b6a ldr r3, [pc, #424] ; (800259c ) + 80023f4: 6d1a ldr r2, [r3, #80] ; 0x50 + 80023f6: 4b69 ldr r3, [pc, #420] ; (800259c ) + 80023f8: 496b ldr r1, [pc, #428] ; (80025a8 ) + 80023fa: 400a ands r2, r1 + 80023fc: 651a str r2, [r3, #80] ; 0x50 + 80023fe: e020 b.n 8002442 + 8002400: 687b ldr r3, [r7, #4] + 8002402: 689a ldr r2, [r3, #8] + 8002404: 23a0 movs r3, #160 ; 0xa0 + 8002406: 00db lsls r3, r3, #3 + 8002408: 429a cmp r2, r3 + 800240a: d10e bne.n 800242a + 800240c: 4b63 ldr r3, [pc, #396] ; (800259c ) + 800240e: 6d1a ldr r2, [r3, #80] ; 0x50 + 8002410: 4b62 ldr r3, [pc, #392] ; (800259c ) + 8002412: 2180 movs r1, #128 ; 0x80 + 8002414: 00c9 lsls r1, r1, #3 + 8002416: 430a orrs r2, r1 + 8002418: 651a str r2, [r3, #80] ; 0x50 + 800241a: 4b60 ldr r3, [pc, #384] ; (800259c ) + 800241c: 6d1a ldr r2, [r3, #80] ; 0x50 + 800241e: 4b5f ldr r3, [pc, #380] ; (800259c ) + 8002420: 2180 movs r1, #128 ; 0x80 + 8002422: 0049 lsls r1, r1, #1 + 8002424: 430a orrs r2, r1 + 8002426: 651a str r2, [r3, #80] ; 0x50 + 8002428: e00b b.n 8002442 + 800242a: 4b5c ldr r3, [pc, #368] ; (800259c ) + 800242c: 6d1a ldr r2, [r3, #80] ; 0x50 + 800242e: 4b5b ldr r3, [pc, #364] ; (800259c ) + 8002430: 495b ldr r1, [pc, #364] ; (80025a0 ) + 8002432: 400a ands r2, r1 + 8002434: 651a str r2, [r3, #80] ; 0x50 + 8002436: 4b59 ldr r3, [pc, #356] ; (800259c ) + 8002438: 6d1a ldr r2, [r3, #80] ; 0x50 + 800243a: 4b58 ldr r3, [pc, #352] ; (800259c ) + 800243c: 495a ldr r1, [pc, #360] ; (80025a8 ) + 800243e: 400a ands r2, r1 + 8002440: 651a str r2, [r3, #80] ; 0x50 /* Check the LSE State */ if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) - 80023b2: 687b ldr r3, [r7, #4] - 80023b4: 689b ldr r3, [r3, #8] - 80023b6: 2b00 cmp r3, #0 - 80023b8: d015 beq.n 80023e6 + 8002442: 687b ldr r3, [r7, #4] + 8002444: 689b ldr r3, [r3, #8] + 8002446: 2b00 cmp r3, #0 + 8002448: d015 beq.n 8002476 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80023ba: f7fe feef bl 800119c - 80023be: 0003 movs r3, r0 - 80023c0: 61bb str r3, [r7, #24] + 800244a: f7fe feef bl 800122c + 800244e: 0003 movs r3, r0 + 8002450: 61bb str r3, [r7, #24] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 80023c2: e009 b.n 80023d8 + 8002452: e009 b.n 8002468 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 80023c4: f7fe feea bl 800119c - 80023c8: 0002 movs r2, r0 - 80023ca: 69bb ldr r3, [r7, #24] - 80023cc: 1ad3 subs r3, r2, r3 - 80023ce: 4a53 ldr r2, [pc, #332] ; (800251c ) - 80023d0: 4293 cmp r3, r2 - 80023d2: d901 bls.n 80023d8 + 8002454: f7fe feea bl 800122c + 8002458: 0002 movs r2, r0 + 800245a: 69bb ldr r3, [r7, #24] + 800245c: 1ad3 subs r3, r2, r3 + 800245e: 4a53 ldr r2, [pc, #332] ; (80025ac ) + 8002460: 4293 cmp r3, r2 + 8002462: d901 bls.n 8002468 { return HAL_TIMEOUT; - 80023d4: 2303 movs r3, #3 - 80023d6: e0c7 b.n 8002568 + 8002464: 2303 movs r3, #3 + 8002466: e0c7 b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 80023d8: 4b4c ldr r3, [pc, #304] ; (800250c ) - 80023da: 6d1a ldr r2, [r3, #80] ; 0x50 - 80023dc: 2380 movs r3, #128 ; 0x80 - 80023de: 009b lsls r3, r3, #2 - 80023e0: 4013 ands r3, r2 - 80023e2: d0ef beq.n 80023c4 - 80023e4: e014 b.n 8002410 + 8002468: 4b4c ldr r3, [pc, #304] ; (800259c ) + 800246a: 6d1a ldr r2, [r3, #80] ; 0x50 + 800246c: 2380 movs r3, #128 ; 0x80 + 800246e: 009b lsls r3, r3, #2 + 8002470: 4013 ands r3, r2 + 8002472: d0ef beq.n 8002454 + 8002474: e014 b.n 80024a0 } } else { /* Get Start Tick */ tickstart = HAL_GetTick(); - 80023e6: f7fe fed9 bl 800119c - 80023ea: 0003 movs r3, r0 - 80023ec: 61bb str r3, [r7, #24] + 8002476: f7fe fed9 bl 800122c + 800247a: 0003 movs r3, r0 + 800247c: 61bb str r3, [r7, #24] /* Wait till LSE is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 80023ee: e009 b.n 8002404 + 800247e: e009 b.n 8002494 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 80023f0: f7fe fed4 bl 800119c - 80023f4: 0002 movs r2, r0 - 80023f6: 69bb ldr r3, [r7, #24] - 80023f8: 1ad3 subs r3, r2, r3 - 80023fa: 4a48 ldr r2, [pc, #288] ; (800251c ) - 80023fc: 4293 cmp r3, r2 - 80023fe: d901 bls.n 8002404 + 8002480: f7fe fed4 bl 800122c + 8002484: 0002 movs r2, r0 + 8002486: 69bb ldr r3, [r7, #24] + 8002488: 1ad3 subs r3, r2, r3 + 800248a: 4a48 ldr r2, [pc, #288] ; (80025ac ) + 800248c: 4293 cmp r3, r2 + 800248e: d901 bls.n 8002494 { return HAL_TIMEOUT; - 8002400: 2303 movs r3, #3 - 8002402: e0b1 b.n 8002568 + 8002490: 2303 movs r3, #3 + 8002492: e0b1 b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U) - 8002404: 4b41 ldr r3, [pc, #260] ; (800250c ) - 8002406: 6d1a ldr r2, [r3, #80] ; 0x50 - 8002408: 2380 movs r3, #128 ; 0x80 - 800240a: 009b lsls r3, r3, #2 - 800240c: 4013 ands r3, r2 - 800240e: d1ef bne.n 80023f0 + 8002494: 4b41 ldr r3, [pc, #260] ; (800259c ) + 8002496: 6d1a ldr r2, [r3, #80] ; 0x50 + 8002498: 2380 movs r3, #128 ; 0x80 + 800249a: 009b lsls r3, r3, #2 + 800249c: 4013 ands r3, r2 + 800249e: d1ef bne.n 8002480 } } } /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) - 8002410: 2327 movs r3, #39 ; 0x27 - 8002412: 18fb adds r3, r7, r3 - 8002414: 781b ldrb r3, [r3, #0] - 8002416: 2b01 cmp r3, #1 - 8002418: d105 bne.n 8002426 + 80024a0: 2327 movs r3, #39 ; 0x27 + 80024a2: 18fb adds r3, r7, r3 + 80024a4: 781b ldrb r3, [r3, #0] + 80024a6: 2b01 cmp r3, #1 + 80024a8: d105 bne.n 80024b6 { __HAL_RCC_PWR_CLK_DISABLE(); - 800241a: 4b3c ldr r3, [pc, #240] ; (800250c ) - 800241c: 6b9a ldr r2, [r3, #56] ; 0x38 - 800241e: 4b3b ldr r3, [pc, #236] ; (800250c ) - 8002420: 493f ldr r1, [pc, #252] ; (8002520 ) - 8002422: 400a ands r2, r1 - 8002424: 639a str r2, [r3, #56] ; 0x38 + 80024aa: 4b3c ldr r3, [pc, #240] ; (800259c ) + 80024ac: 6b9a ldr r2, [r3, #56] ; 0x38 + 80024ae: 4b3b ldr r3, [pc, #236] ; (800259c ) + 80024b0: 493f ldr r1, [pc, #252] ; (80025b0 ) + 80024b2: 400a ands r2, r1 + 80024b4: 639a str r2, [r3, #56] ; 0x38 #endif /* RCC_HSI48_SUPPORT */ /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) - 8002426: 687b ldr r3, [r7, #4] - 8002428: 6a5b ldr r3, [r3, #36] ; 0x24 - 800242a: 2b00 cmp r3, #0 - 800242c: d100 bne.n 8002430 - 800242e: e09a b.n 8002566 + 80024b6: 687b ldr r3, [r7, #4] + 80024b8: 6a5b ldr r3, [r3, #36] ; 0x24 + 80024ba: 2b00 cmp r3, #0 + 80024bc: d100 bne.n 80024c0 + 80024be: e09a b.n 80025f6 { /* Check if the PLL is used as system clock or not */ if(sysclk_source != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 8002430: 6a3b ldr r3, [r7, #32] - 8002432: 2b0c cmp r3, #12 - 8002434: d064 beq.n 8002500 + 80024c0: 6a3b ldr r3, [r7, #32] + 80024c2: 2b0c cmp r3, #12 + 80024c4: d064 beq.n 8002590 { if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) - 8002436: 687b ldr r3, [r7, #4] - 8002438: 6a5b ldr r3, [r3, #36] ; 0x24 - 800243a: 2b02 cmp r3, #2 - 800243c: d145 bne.n 80024ca + 80024c6: 687b ldr r3, [r7, #4] + 80024c8: 6a5b ldr r3, [r3, #36] ; 0x24 + 80024ca: 2b02 cmp r3, #2 + 80024cc: d145 bne.n 800255a assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV)); /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 800243e: 4b33 ldr r3, [pc, #204] ; (800250c ) - 8002440: 681a ldr r2, [r3, #0] - 8002442: 4b32 ldr r3, [pc, #200] ; (800250c ) - 8002444: 4937 ldr r1, [pc, #220] ; (8002524 ) - 8002446: 400a ands r2, r1 - 8002448: 601a str r2, [r3, #0] + 80024ce: 4b33 ldr r3, [pc, #204] ; (800259c ) + 80024d0: 681a ldr r2, [r3, #0] + 80024d2: 4b32 ldr r3, [pc, #200] ; (800259c ) + 80024d4: 4937 ldr r1, [pc, #220] ; (80025b4 ) + 80024d6: 400a ands r2, r1 + 80024d8: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 800244a: f7fe fea7 bl 800119c - 800244e: 0003 movs r3, r0 - 8002450: 61bb str r3, [r7, #24] + 80024da: f7fe fea7 bl 800122c + 80024de: 0003 movs r3, r0 + 80024e0: 61bb str r3, [r7, #24] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 8002452: e008 b.n 8002466 + 80024e2: e008 b.n 80024f6 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 8002454: f7fe fea2 bl 800119c - 8002458: 0002 movs r2, r0 - 800245a: 69bb ldr r3, [r7, #24] - 800245c: 1ad3 subs r3, r2, r3 - 800245e: 2b02 cmp r3, #2 - 8002460: d901 bls.n 8002466 + 80024e4: f7fe fea2 bl 800122c + 80024e8: 0002 movs r2, r0 + 80024ea: 69bb ldr r3, [r7, #24] + 80024ec: 1ad3 subs r3, r2, r3 + 80024ee: 2b02 cmp r3, #2 + 80024f0: d901 bls.n 80024f6 { return HAL_TIMEOUT; - 8002462: 2303 movs r3, #3 - 8002464: e080 b.n 8002568 + 80024f2: 2303 movs r3, #3 + 80024f4: e080 b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 8002466: 4b29 ldr r3, [pc, #164] ; (800250c ) - 8002468: 681a ldr r2, [r3, #0] - 800246a: 2380 movs r3, #128 ; 0x80 - 800246c: 049b lsls r3, r3, #18 - 800246e: 4013 ands r3, r2 - 8002470: d1f0 bne.n 8002454 + 80024f6: 4b29 ldr r3, [pc, #164] ; (800259c ) + 80024f8: 681a ldr r2, [r3, #0] + 80024fa: 2380 movs r3, #128 ; 0x80 + 80024fc: 049b lsls r3, r3, #18 + 80024fe: 4013 ands r3, r2 + 8002500: d1f0 bne.n 80024e4 } } /* Configure the main PLL clock source, multiplication and division factors. */ __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, - 8002472: 4b26 ldr r3, [pc, #152] ; (800250c ) - 8002474: 68db ldr r3, [r3, #12] - 8002476: 4a2c ldr r2, [pc, #176] ; (8002528 ) - 8002478: 4013 ands r3, r2 - 800247a: 0019 movs r1, r3 - 800247c: 687b ldr r3, [r7, #4] - 800247e: 6a9a ldr r2, [r3, #40] ; 0x28 - 8002480: 687b ldr r3, [r7, #4] - 8002482: 6adb ldr r3, [r3, #44] ; 0x2c - 8002484: 431a orrs r2, r3 - 8002486: 687b ldr r3, [r7, #4] - 8002488: 6b1b ldr r3, [r3, #48] ; 0x30 - 800248a: 431a orrs r2, r3 - 800248c: 4b1f ldr r3, [pc, #124] ; (800250c ) - 800248e: 430a orrs r2, r1 - 8002490: 60da str r2, [r3, #12] + 8002502: 4b26 ldr r3, [pc, #152] ; (800259c ) + 8002504: 68db ldr r3, [r3, #12] + 8002506: 4a2c ldr r2, [pc, #176] ; (80025b8 ) + 8002508: 4013 ands r3, r2 + 800250a: 0019 movs r1, r3 + 800250c: 687b ldr r3, [r7, #4] + 800250e: 6a9a ldr r2, [r3, #40] ; 0x28 + 8002510: 687b ldr r3, [r7, #4] + 8002512: 6adb ldr r3, [r3, #44] ; 0x2c + 8002514: 431a orrs r2, r3 + 8002516: 687b ldr r3, [r7, #4] + 8002518: 6b1b ldr r3, [r3, #48] ; 0x30 + 800251a: 431a orrs r2, r3 + 800251c: 4b1f ldr r3, [pc, #124] ; (800259c ) + 800251e: 430a orrs r2, r1 + 8002520: 60da str r2, [r3, #12] RCC_OscInitStruct->PLL.PLLMUL, RCC_OscInitStruct->PLL.PLLDIV); /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); - 8002492: 4b1e ldr r3, [pc, #120] ; (800250c ) - 8002494: 681a ldr r2, [r3, #0] - 8002496: 4b1d ldr r3, [pc, #116] ; (800250c ) - 8002498: 2180 movs r1, #128 ; 0x80 - 800249a: 0449 lsls r1, r1, #17 - 800249c: 430a orrs r2, r1 - 800249e: 601a str r2, [r3, #0] + 8002522: 4b1e ldr r3, [pc, #120] ; (800259c ) + 8002524: 681a ldr r2, [r3, #0] + 8002526: 4b1d ldr r3, [pc, #116] ; (800259c ) + 8002528: 2180 movs r1, #128 ; 0x80 + 800252a: 0449 lsls r1, r1, #17 + 800252c: 430a orrs r2, r1 + 800252e: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80024a0: f7fe fe7c bl 800119c - 80024a4: 0003 movs r3, r0 - 80024a6: 61bb str r3, [r7, #24] + 8002530: f7fe fe7c bl 800122c + 8002534: 0003 movs r3, r0 + 8002536: 61bb str r3, [r7, #24] /* Wait till PLL is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 80024a8: e008 b.n 80024bc + 8002538: e008 b.n 800254c { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 80024aa: f7fe fe77 bl 800119c - 80024ae: 0002 movs r2, r0 - 80024b0: 69bb ldr r3, [r7, #24] - 80024b2: 1ad3 subs r3, r2, r3 - 80024b4: 2b02 cmp r3, #2 - 80024b6: d901 bls.n 80024bc + 800253a: f7fe fe77 bl 800122c + 800253e: 0002 movs r2, r0 + 8002540: 69bb ldr r3, [r7, #24] + 8002542: 1ad3 subs r3, r2, r3 + 8002544: 2b02 cmp r3, #2 + 8002546: d901 bls.n 800254c { return HAL_TIMEOUT; - 80024b8: 2303 movs r3, #3 - 80024ba: e055 b.n 8002568 + 8002548: 2303 movs r3, #3 + 800254a: e055 b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 80024bc: 4b13 ldr r3, [pc, #76] ; (800250c ) - 80024be: 681a ldr r2, [r3, #0] - 80024c0: 2380 movs r3, #128 ; 0x80 - 80024c2: 049b lsls r3, r3, #18 - 80024c4: 4013 ands r3, r2 - 80024c6: d0f0 beq.n 80024aa - 80024c8: e04d b.n 8002566 + 800254c: 4b13 ldr r3, [pc, #76] ; (800259c ) + 800254e: 681a ldr r2, [r3, #0] + 8002550: 2380 movs r3, #128 ; 0x80 + 8002552: 049b lsls r3, r3, #18 + 8002554: 4013 ands r3, r2 + 8002556: d0f0 beq.n 800253a + 8002558: e04d b.n 80025f6 } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); - 80024ca: 4b10 ldr r3, [pc, #64] ; (800250c ) - 80024cc: 681a ldr r2, [r3, #0] - 80024ce: 4b0f ldr r3, [pc, #60] ; (800250c ) - 80024d0: 4914 ldr r1, [pc, #80] ; (8002524 ) - 80024d2: 400a ands r2, r1 - 80024d4: 601a str r2, [r3, #0] + 800255a: 4b10 ldr r3, [pc, #64] ; (800259c ) + 800255c: 681a ldr r2, [r3, #0] + 800255e: 4b0f ldr r3, [pc, #60] ; (800259c ) + 8002560: 4914 ldr r1, [pc, #80] ; (80025b4 ) + 8002562: 400a ands r2, r1 + 8002564: 601a str r2, [r3, #0] /* Get Start Tick */ tickstart = HAL_GetTick(); - 80024d6: f7fe fe61 bl 800119c - 80024da: 0003 movs r3, r0 - 80024dc: 61bb str r3, [r7, #24] + 8002566: f7fe fe61 bl 800122c + 800256a: 0003 movs r3, r0 + 800256c: 61bb str r3, [r7, #24] /* Wait till PLL is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 80024de: e008 b.n 80024f2 + 800256e: e008 b.n 8002582 { if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) - 80024e0: f7fe fe5c bl 800119c - 80024e4: 0002 movs r2, r0 - 80024e6: 69bb ldr r3, [r7, #24] - 80024e8: 1ad3 subs r3, r2, r3 - 80024ea: 2b02 cmp r3, #2 - 80024ec: d901 bls.n 80024f2 + 8002570: f7fe fe5c bl 800122c + 8002574: 0002 movs r2, r0 + 8002576: 69bb ldr r3, [r7, #24] + 8002578: 1ad3 subs r3, r2, r3 + 800257a: 2b02 cmp r3, #2 + 800257c: d901 bls.n 8002582 { return HAL_TIMEOUT; - 80024ee: 2303 movs r3, #3 - 80024f0: e03a b.n 8002568 + 800257e: 2303 movs r3, #3 + 8002580: e03a b.n 80025f8 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != 0U) - 80024f2: 4b06 ldr r3, [pc, #24] ; (800250c ) - 80024f4: 681a ldr r2, [r3, #0] - 80024f6: 2380 movs r3, #128 ; 0x80 - 80024f8: 049b lsls r3, r3, #18 - 80024fa: 4013 ands r3, r2 - 80024fc: d1f0 bne.n 80024e0 - 80024fe: e032 b.n 8002566 + 8002582: 4b06 ldr r3, [pc, #24] ; (800259c ) + 8002584: 681a ldr r2, [r3, #0] + 8002586: 2380 movs r3, #128 ; 0x80 + 8002588: 049b lsls r3, r3, #18 + 800258a: 4013 ands r3, r2 + 800258c: d1f0 bne.n 8002570 + 800258e: e032 b.n 80025f6 } } else { /* Check if there is a request to disable the PLL used as System clock source */ if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) - 8002500: 687b ldr r3, [r7, #4] - 8002502: 6a5b ldr r3, [r3, #36] ; 0x24 - 8002504: 2b01 cmp r3, #1 - 8002506: d111 bne.n 800252c + 8002590: 687b ldr r3, [r7, #4] + 8002592: 6a5b ldr r3, [r3, #36] ; 0x24 + 8002594: 2b01 cmp r3, #1 + 8002596: d111 bne.n 80025bc { return HAL_ERROR; - 8002508: 2301 movs r3, #1 - 800250a: e02d b.n 8002568 - 800250c: 40021000 .word 0x40021000 - 8002510: fffffeff .word 0xfffffeff - 8002514: 40007000 .word 0x40007000 - 8002518: fffffbff .word 0xfffffbff - 800251c: 00001388 .word 0x00001388 - 8002520: efffffff .word 0xefffffff - 8002524: feffffff .word 0xfeffffff - 8002528: ff02ffff .word 0xff02ffff + 8002598: 2301 movs r3, #1 + 800259a: e02d b.n 80025f8 + 800259c: 40021000 .word 0x40021000 + 80025a0: fffffeff .word 0xfffffeff + 80025a4: 40007000 .word 0x40007000 + 80025a8: fffffbff .word 0xfffffbff + 80025ac: 00001388 .word 0x00001388 + 80025b0: efffffff .word 0xefffffff + 80025b4: feffffff .word 0xfeffffff + 80025b8: ff02ffff .word 0xff02ffff } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->CFGR; - 800252c: 4b10 ldr r3, [pc, #64] ; (8002570 ) - 800252e: 68db ldr r3, [r3, #12] - 8002530: 61fb str r3, [r7, #28] + 80025bc: 4b10 ldr r3, [pc, #64] ; (8002600 ) + 80025be: 68db ldr r3, [r3, #12] + 80025c0: 61fb str r3, [r7, #28] if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 8002532: 69fa ldr r2, [r7, #28] - 8002534: 2380 movs r3, #128 ; 0x80 - 8002536: 025b lsls r3, r3, #9 - 8002538: 401a ands r2, r3 - 800253a: 687b ldr r3, [r7, #4] - 800253c: 6a9b ldr r3, [r3, #40] ; 0x28 - 800253e: 429a cmp r2, r3 - 8002540: d10f bne.n 8002562 + 80025c2: 69fa ldr r2, [r7, #28] + 80025c4: 2380 movs r3, #128 ; 0x80 + 80025c6: 025b lsls r3, r3, #9 + 80025c8: 401a ands r2, r3 + 80025ca: 687b ldr r3, [r7, #4] + 80025cc: 6a9b ldr r3, [r3, #40] ; 0x28 + 80025ce: 429a cmp r2, r3 + 80025d0: d10f bne.n 80025f2 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || - 8002542: 69fa ldr r2, [r7, #28] - 8002544: 23f0 movs r3, #240 ; 0xf0 - 8002546: 039b lsls r3, r3, #14 - 8002548: 401a ands r2, r3 - 800254a: 687b ldr r3, [r7, #4] - 800254c: 6adb ldr r3, [r3, #44] ; 0x2c + 80025d2: 69fa ldr r2, [r7, #28] + 80025d4: 23f0 movs r3, #240 ; 0xf0 + 80025d6: 039b lsls r3, r3, #14 + 80025d8: 401a ands r2, r3 + 80025da: 687b ldr r3, [r7, #4] + 80025dc: 6adb ldr r3, [r3, #44] ; 0x2c if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || - 800254e: 429a cmp r2, r3 - 8002550: d107 bne.n 8002562 + 80025de: 429a cmp r2, r3 + 80025e0: d107 bne.n 80025f2 (READ_BIT(pll_config, RCC_CFGR_PLLDIV) != RCC_OscInitStruct->PLL.PLLDIV)) - 8002552: 69fa ldr r2, [r7, #28] - 8002554: 23c0 movs r3, #192 ; 0xc0 - 8002556: 041b lsls r3, r3, #16 - 8002558: 401a ands r2, r3 - 800255a: 687b ldr r3, [r7, #4] - 800255c: 6b1b ldr r3, [r3, #48] ; 0x30 + 80025e2: 69fa ldr r2, [r7, #28] + 80025e4: 23c0 movs r3, #192 ; 0xc0 + 80025e6: 041b lsls r3, r3, #16 + 80025e8: 401a ands r2, r3 + 80025ea: 687b ldr r3, [r7, #4] + 80025ec: 6b1b ldr r3, [r3, #48] ; 0x30 (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) || - 800255e: 429a cmp r2, r3 - 8002560: d001 beq.n 8002566 + 80025ee: 429a cmp r2, r3 + 80025f0: d001 beq.n 80025f6 { return HAL_ERROR; - 8002562: 2301 movs r3, #1 - 8002564: e000 b.n 8002568 + 80025f2: 2301 movs r3, #1 + 80025f4: e000 b.n 80025f8 } } } } return HAL_OK; - 8002566: 2300 movs r3, #0 + 80025f6: 2300 movs r3, #0 } - 8002568: 0018 movs r0, r3 - 800256a: 46bd mov sp, r7 - 800256c: b00a add sp, #40 ; 0x28 - 800256e: bdb0 pop {r4, r5, r7, pc} - 8002570: 40021000 .word 0x40021000 + 80025f8: 0018 movs r0, r3 + 80025fa: 46bd mov sp, r7 + 80025fc: b00a add sp, #40 ; 0x28 + 80025fe: bdb0 pop {r4, r5, r7, pc} + 8002600: 40021000 .word 0x40021000 -08002574 : +08002604 : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { - 8002574: b5b0 push {r4, r5, r7, lr} - 8002576: b084 sub sp, #16 - 8002578: af00 add r7, sp, #0 - 800257a: 6078 str r0, [r7, #4] - 800257c: 6039 str r1, [r7, #0] + 8002604: b5b0 push {r4, r5, r7, lr} + 8002606: b084 sub sp, #16 + 8002608: af00 add r7, sp, #0 + 800260a: 6078 str r0, [r7, #4] + 800260c: 6039 str r1, [r7, #0] uint32_t tickstart; HAL_StatusTypeDef status; /* Check Null pointer */ if(RCC_ClkInitStruct == NULL) - 800257e: 687b ldr r3, [r7, #4] - 8002580: 2b00 cmp r3, #0 - 8002582: d101 bne.n 8002588 + 800260e: 687b ldr r3, [r7, #4] + 8002610: 2b00 cmp r3, #0 + 8002612: d101 bne.n 8002618 { return HAL_ERROR; - 8002584: 2301 movs r3, #1 - 8002586: e128 b.n 80027da + 8002614: 2301 movs r3, #1 + 8002616: e128 b.n 800286a /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the number of wait states because of higher CPU frequency */ if(FLatency > __HAL_FLASH_GET_LATENCY()) - 8002588: 4b96 ldr r3, [pc, #600] ; (80027e4 ) - 800258a: 681b ldr r3, [r3, #0] - 800258c: 2201 movs r2, #1 - 800258e: 4013 ands r3, r2 - 8002590: 683a ldr r2, [r7, #0] - 8002592: 429a cmp r2, r3 - 8002594: d91e bls.n 80025d4 + 8002618: 4b96 ldr r3, [pc, #600] ; (8002874 ) + 800261a: 681b ldr r3, [r3, #0] + 800261c: 2201 movs r2, #1 + 800261e: 4013 ands r3, r2 + 8002620: 683a ldr r2, [r7, #0] + 8002622: 429a cmp r2, r3 + 8002624: d91e bls.n 8002664 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8002596: 4b93 ldr r3, [pc, #588] ; (80027e4 ) - 8002598: 681b ldr r3, [r3, #0] - 800259a: 2201 movs r2, #1 - 800259c: 4393 bics r3, r2 - 800259e: 0019 movs r1, r3 - 80025a0: 4b90 ldr r3, [pc, #576] ; (80027e4 ) - 80025a2: 683a ldr r2, [r7, #0] - 80025a4: 430a orrs r2, r1 - 80025a6: 601a str r2, [r3, #0] + 8002626: 4b93 ldr r3, [pc, #588] ; (8002874 ) + 8002628: 681b ldr r3, [r3, #0] + 800262a: 2201 movs r2, #1 + 800262c: 4393 bics r3, r2 + 800262e: 0019 movs r1, r3 + 8002630: 4b90 ldr r3, [pc, #576] ; (8002874 ) + 8002632: 683a ldr r2, [r7, #0] + 8002634: 430a orrs r2, r1 + 8002636: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by polling the FLASH_ACR register */ tickstart = HAL_GetTick(); - 80025a8: f7fe fdf8 bl 800119c - 80025ac: 0003 movs r3, r0 - 80025ae: 60fb str r3, [r7, #12] + 8002638: f7fe fdf8 bl 800122c + 800263c: 0003 movs r3, r0 + 800263e: 60fb str r3, [r7, #12] while (__HAL_FLASH_GET_LATENCY() != FLatency) - 80025b0: e009 b.n 80025c6 + 8002640: e009 b.n 8002656 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 80025b2: f7fe fdf3 bl 800119c - 80025b6: 0002 movs r2, r0 - 80025b8: 68fb ldr r3, [r7, #12] - 80025ba: 1ad3 subs r3, r2, r3 - 80025bc: 4a8a ldr r2, [pc, #552] ; (80027e8 ) - 80025be: 4293 cmp r3, r2 - 80025c0: d901 bls.n 80025c6 + 8002642: f7fe fdf3 bl 800122c + 8002646: 0002 movs r2, r0 + 8002648: 68fb ldr r3, [r7, #12] + 800264a: 1ad3 subs r3, r2, r3 + 800264c: 4a8a ldr r2, [pc, #552] ; (8002878 ) + 800264e: 4293 cmp r3, r2 + 8002650: d901 bls.n 8002656 { return HAL_TIMEOUT; - 80025c2: 2303 movs r3, #3 - 80025c4: e109 b.n 80027da + 8002652: 2303 movs r3, #3 + 8002654: e109 b.n 800286a while (__HAL_FLASH_GET_LATENCY() != FLatency) - 80025c6: 4b87 ldr r3, [pc, #540] ; (80027e4 ) - 80025c8: 681b ldr r3, [r3, #0] - 80025ca: 2201 movs r2, #1 - 80025cc: 4013 ands r3, r2 - 80025ce: 683a ldr r2, [r7, #0] - 80025d0: 429a cmp r2, r3 - 80025d2: d1ee bne.n 80025b2 + 8002656: 4b87 ldr r3, [pc, #540] ; (8002874 ) + 8002658: 681b ldr r3, [r3, #0] + 800265a: 2201 movs r2, #1 + 800265c: 4013 ands r3, r2 + 800265e: 683a ldr r2, [r7, #0] + 8002660: 429a cmp r2, r3 + 8002662: d1ee bne.n 8002642 } } } /*-------------------------- HCLK Configuration --------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) - 80025d4: 687b ldr r3, [r7, #4] - 80025d6: 681b ldr r3, [r3, #0] - 80025d8: 2202 movs r2, #2 - 80025da: 4013 ands r3, r2 - 80025dc: d009 beq.n 80025f2 + 8002664: 687b ldr r3, [r7, #4] + 8002666: 681b ldr r3, [r3, #0] + 8002668: 2202 movs r2, #2 + 800266a: 4013 ands r3, r2 + 800266c: d009 beq.n 8002682 { assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); - 80025de: 4b83 ldr r3, [pc, #524] ; (80027ec ) - 80025e0: 68db ldr r3, [r3, #12] - 80025e2: 22f0 movs r2, #240 ; 0xf0 - 80025e4: 4393 bics r3, r2 - 80025e6: 0019 movs r1, r3 - 80025e8: 687b ldr r3, [r7, #4] - 80025ea: 689a ldr r2, [r3, #8] - 80025ec: 4b7f ldr r3, [pc, #508] ; (80027ec ) - 80025ee: 430a orrs r2, r1 - 80025f0: 60da str r2, [r3, #12] + 800266e: 4b83 ldr r3, [pc, #524] ; (800287c ) + 8002670: 68db ldr r3, [r3, #12] + 8002672: 22f0 movs r2, #240 ; 0xf0 + 8002674: 4393 bics r3, r2 + 8002676: 0019 movs r1, r3 + 8002678: 687b ldr r3, [r7, #4] + 800267a: 689a ldr r2, [r3, #8] + 800267c: 4b7f ldr r3, [pc, #508] ; (800287c ) + 800267e: 430a orrs r2, r1 + 8002680: 60da str r2, [r3, #12] } /*------------------------- SYSCLK Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) - 80025f2: 687b ldr r3, [r7, #4] - 80025f4: 681b ldr r3, [r3, #0] - 80025f6: 2201 movs r2, #1 - 80025f8: 4013 ands r3, r2 - 80025fa: d100 bne.n 80025fe - 80025fc: e089 b.n 8002712 + 8002682: 687b ldr r3, [r7, #4] + 8002684: 681b ldr r3, [r3, #0] + 8002686: 2201 movs r2, #1 + 8002688: 4013 ands r3, r2 + 800268a: d100 bne.n 800268e + 800268c: e089 b.n 80027a2 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 80025fe: 687b ldr r3, [r7, #4] - 8002600: 685b ldr r3, [r3, #4] - 8002602: 2b02 cmp r3, #2 - 8002604: d107 bne.n 8002616 + 800268e: 687b ldr r3, [r7, #4] + 8002690: 685b ldr r3, [r3, #4] + 8002692: 2b02 cmp r3, #2 + 8002694: d107 bne.n 80026a6 { /* Check the HSE ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U) - 8002606: 4b79 ldr r3, [pc, #484] ; (80027ec ) - 8002608: 681a ldr r2, [r3, #0] - 800260a: 2380 movs r3, #128 ; 0x80 - 800260c: 029b lsls r3, r3, #10 - 800260e: 4013 ands r3, r2 - 8002610: d120 bne.n 8002654 + 8002696: 4b79 ldr r3, [pc, #484] ; (800287c ) + 8002698: 681a ldr r2, [r3, #0] + 800269a: 2380 movs r3, #128 ; 0x80 + 800269c: 029b lsls r3, r3, #10 + 800269e: 4013 ands r3, r2 + 80026a0: d120 bne.n 80026e4 { return HAL_ERROR; - 8002612: 2301 movs r3, #1 - 8002614: e0e1 b.n 80027da + 80026a2: 2301 movs r3, #1 + 80026a4: e0e1 b.n 800286a } } /* PLL is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 8002616: 687b ldr r3, [r7, #4] - 8002618: 685b ldr r3, [r3, #4] - 800261a: 2b03 cmp r3, #3 - 800261c: d107 bne.n 800262e + 80026a6: 687b ldr r3, [r7, #4] + 80026a8: 685b ldr r3, [r3, #4] + 80026aa: 2b03 cmp r3, #3 + 80026ac: d107 bne.n 80026be { /* Check the PLL ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U) - 800261e: 4b73 ldr r3, [pc, #460] ; (80027ec ) - 8002620: 681a ldr r2, [r3, #0] - 8002622: 2380 movs r3, #128 ; 0x80 - 8002624: 049b lsls r3, r3, #18 - 8002626: 4013 ands r3, r2 - 8002628: d114 bne.n 8002654 + 80026ae: 4b73 ldr r3, [pc, #460] ; (800287c ) + 80026b0: 681a ldr r2, [r3, #0] + 80026b2: 2380 movs r3, #128 ; 0x80 + 80026b4: 049b lsls r3, r3, #18 + 80026b6: 4013 ands r3, r2 + 80026b8: d114 bne.n 80026e4 { return HAL_ERROR; - 800262a: 2301 movs r3, #1 - 800262c: e0d5 b.n 80027da + 80026ba: 2301 movs r3, #1 + 80026bc: e0d5 b.n 800286a } } /* HSI is selected as System Clock Source */ else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI) - 800262e: 687b ldr r3, [r7, #4] - 8002630: 685b ldr r3, [r3, #4] - 8002632: 2b01 cmp r3, #1 - 8002634: d106 bne.n 8002644 + 80026be: 687b ldr r3, [r7, #4] + 80026c0: 685b ldr r3, [r3, #4] + 80026c2: 2b01 cmp r3, #1 + 80026c4: d106 bne.n 80026d4 { /* Check the HSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U) - 8002636: 4b6d ldr r3, [pc, #436] ; (80027ec ) - 8002638: 681b ldr r3, [r3, #0] - 800263a: 2204 movs r2, #4 - 800263c: 4013 ands r3, r2 - 800263e: d109 bne.n 8002654 + 80026c6: 4b6d ldr r3, [pc, #436] ; (800287c ) + 80026c8: 681b ldr r3, [r3, #0] + 80026ca: 2204 movs r2, #4 + 80026cc: 4013 ands r3, r2 + 80026ce: d109 bne.n 80026e4 { return HAL_ERROR; - 8002640: 2301 movs r3, #1 - 8002642: e0ca b.n 80027da + 80026d0: 2301 movs r3, #1 + 80026d2: e0ca b.n 800286a } /* MSI is selected as System Clock Source */ else { /* Check the MSI ready flag */ if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U) - 8002644: 4b69 ldr r3, [pc, #420] ; (80027ec ) - 8002646: 681a ldr r2, [r3, #0] - 8002648: 2380 movs r3, #128 ; 0x80 - 800264a: 009b lsls r3, r3, #2 - 800264c: 4013 ands r3, r2 - 800264e: d101 bne.n 8002654 + 80026d4: 4b69 ldr r3, [pc, #420] ; (800287c ) + 80026d6: 681a ldr r2, [r3, #0] + 80026d8: 2380 movs r3, #128 ; 0x80 + 80026da: 009b lsls r3, r3, #2 + 80026dc: 4013 ands r3, r2 + 80026de: d101 bne.n 80026e4 { return HAL_ERROR; - 8002650: 2301 movs r3, #1 - 8002652: e0c2 b.n 80027da + 80026e0: 2301 movs r3, #1 + 80026e2: e0c2 b.n 800286a } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); - 8002654: 4b65 ldr r3, [pc, #404] ; (80027ec ) - 8002656: 68db ldr r3, [r3, #12] - 8002658: 2203 movs r2, #3 - 800265a: 4393 bics r3, r2 - 800265c: 0019 movs r1, r3 - 800265e: 687b ldr r3, [r7, #4] - 8002660: 685a ldr r2, [r3, #4] - 8002662: 4b62 ldr r3, [pc, #392] ; (80027ec ) - 8002664: 430a orrs r2, r1 - 8002666: 60da str r2, [r3, #12] + 80026e4: 4b65 ldr r3, [pc, #404] ; (800287c ) + 80026e6: 68db ldr r3, [r3, #12] + 80026e8: 2203 movs r2, #3 + 80026ea: 4393 bics r3, r2 + 80026ec: 0019 movs r1, r3 + 80026ee: 687b ldr r3, [r7, #4] + 80026f0: 685a ldr r2, [r3, #4] + 80026f2: 4b62 ldr r3, [pc, #392] ; (800287c ) + 80026f4: 430a orrs r2, r1 + 80026f6: 60da str r2, [r3, #12] /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002668: f7fe fd98 bl 800119c - 800266c: 0003 movs r3, r0 - 800266e: 60fb str r3, [r7, #12] + 80026f8: f7fe fd98 bl 800122c + 80026fc: 0003 movs r3, r0 + 80026fe: 60fb str r3, [r7, #12] if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) - 8002670: 687b ldr r3, [r7, #4] - 8002672: 685b ldr r3, [r3, #4] - 8002674: 2b02 cmp r3, #2 - 8002676: d111 bne.n 800269c + 8002700: 687b ldr r3, [r7, #4] + 8002702: 685b ldr r3, [r3, #4] + 8002704: 2b02 cmp r3, #2 + 8002706: d111 bne.n 800272c { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) - 8002678: e009 b.n 800268e + 8002708: e009 b.n 800271e { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 800267a: f7fe fd8f bl 800119c - 800267e: 0002 movs r2, r0 - 8002680: 68fb ldr r3, [r7, #12] - 8002682: 1ad3 subs r3, r2, r3 - 8002684: 4a58 ldr r2, [pc, #352] ; (80027e8 ) - 8002686: 4293 cmp r3, r2 - 8002688: d901 bls.n 800268e + 800270a: f7fe fd8f bl 800122c + 800270e: 0002 movs r2, r0 + 8002710: 68fb ldr r3, [r7, #12] + 8002712: 1ad3 subs r3, r2, r3 + 8002714: 4a58 ldr r2, [pc, #352] ; (8002878 ) + 8002716: 4293 cmp r3, r2 + 8002718: d901 bls.n 800271e { return HAL_TIMEOUT; - 800268a: 2303 movs r3, #3 - 800268c: e0a5 b.n 80027da + 800271a: 2303 movs r3, #3 + 800271c: e0a5 b.n 800286a while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE) - 800268e: 4b57 ldr r3, [pc, #348] ; (80027ec ) - 8002690: 68db ldr r3, [r3, #12] - 8002692: 220c movs r2, #12 - 8002694: 4013 ands r3, r2 - 8002696: 2b08 cmp r3, #8 - 8002698: d1ef bne.n 800267a - 800269a: e03a b.n 8002712 + 800271e: 4b57 ldr r3, [pc, #348] ; (800287c ) + 8002720: 68db ldr r3, [r3, #12] + 8002722: 220c movs r2, #12 + 8002724: 4013 ands r3, r2 + 8002726: 2b08 cmp r3, #8 + 8002728: d1ef bne.n 800270a + 800272a: e03a b.n 80027a2 } } } else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) - 800269c: 687b ldr r3, [r7, #4] - 800269e: 685b ldr r3, [r3, #4] - 80026a0: 2b03 cmp r3, #3 - 80026a2: d111 bne.n 80026c8 + 800272c: 687b ldr r3, [r7, #4] + 800272e: 685b ldr r3, [r3, #4] + 8002730: 2b03 cmp r3, #3 + 8002732: d111 bne.n 8002758 { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 80026a4: e009 b.n 80026ba + 8002734: e009 b.n 800274a { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 80026a6: f7fe fd79 bl 800119c - 80026aa: 0002 movs r2, r0 - 80026ac: 68fb ldr r3, [r7, #12] - 80026ae: 1ad3 subs r3, r2, r3 - 80026b0: 4a4d ldr r2, [pc, #308] ; (80027e8 ) - 80026b2: 4293 cmp r3, r2 - 80026b4: d901 bls.n 80026ba + 8002736: f7fe fd79 bl 800122c + 800273a: 0002 movs r2, r0 + 800273c: 68fb ldr r3, [r7, #12] + 800273e: 1ad3 subs r3, r2, r3 + 8002740: 4a4d ldr r2, [pc, #308] ; (8002878 ) + 8002742: 4293 cmp r3, r2 + 8002744: d901 bls.n 800274a { return HAL_TIMEOUT; - 80026b6: 2303 movs r3, #3 - 80026b8: e08f b.n 80027da + 8002746: 2303 movs r3, #3 + 8002748: e08f b.n 800286a while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) - 80026ba: 4b4c ldr r3, [pc, #304] ; (80027ec ) - 80026bc: 68db ldr r3, [r3, #12] - 80026be: 220c movs r2, #12 - 80026c0: 4013 ands r3, r2 - 80026c2: 2b0c cmp r3, #12 - 80026c4: d1ef bne.n 80026a6 - 80026c6: e024 b.n 8002712 + 800274a: 4b4c ldr r3, [pc, #304] ; (800287c ) + 800274c: 68db ldr r3, [r3, #12] + 800274e: 220c movs r2, #12 + 8002750: 4013 ands r3, r2 + 8002752: 2b0c cmp r3, #12 + 8002754: d1ef bne.n 8002736 + 8002756: e024 b.n 80027a2 } } } else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI) - 80026c8: 687b ldr r3, [r7, #4] - 80026ca: 685b ldr r3, [r3, #4] - 80026cc: 2b01 cmp r3, #1 - 80026ce: d11b bne.n 8002708 + 8002758: 687b ldr r3, [r7, #4] + 800275a: 685b ldr r3, [r3, #4] + 800275c: 2b01 cmp r3, #1 + 800275e: d11b bne.n 8002798 { while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) - 80026d0: e009 b.n 80026e6 + 8002760: e009 b.n 8002776 { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 80026d2: f7fe fd63 bl 800119c - 80026d6: 0002 movs r2, r0 - 80026d8: 68fb ldr r3, [r7, #12] - 80026da: 1ad3 subs r3, r2, r3 - 80026dc: 4a42 ldr r2, [pc, #264] ; (80027e8 ) - 80026de: 4293 cmp r3, r2 - 80026e0: d901 bls.n 80026e6 + 8002762: f7fe fd63 bl 800122c + 8002766: 0002 movs r2, r0 + 8002768: 68fb ldr r3, [r7, #12] + 800276a: 1ad3 subs r3, r2, r3 + 800276c: 4a42 ldr r2, [pc, #264] ; (8002878 ) + 800276e: 4293 cmp r3, r2 + 8002770: d901 bls.n 8002776 { return HAL_TIMEOUT; - 80026e2: 2303 movs r3, #3 - 80026e4: e079 b.n 80027da + 8002772: 2303 movs r3, #3 + 8002774: e079 b.n 800286a while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI) - 80026e6: 4b41 ldr r3, [pc, #260] ; (80027ec ) - 80026e8: 68db ldr r3, [r3, #12] - 80026ea: 220c movs r2, #12 - 80026ec: 4013 ands r3, r2 - 80026ee: 2b04 cmp r3, #4 - 80026f0: d1ef bne.n 80026d2 - 80026f2: e00e b.n 8002712 + 8002776: 4b41 ldr r3, [pc, #260] ; (800287c ) + 8002778: 68db ldr r3, [r3, #12] + 800277a: 220c movs r2, #12 + 800277c: 4013 ands r3, r2 + 800277e: 2b04 cmp r3, #4 + 8002780: d1ef bne.n 8002762 + 8002782: e00e b.n 80027a2 } else { while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI) { if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) - 80026f4: f7fe fd52 bl 800119c - 80026f8: 0002 movs r2, r0 - 80026fa: 68fb ldr r3, [r7, #12] - 80026fc: 1ad3 subs r3, r2, r3 - 80026fe: 4a3a ldr r2, [pc, #232] ; (80027e8 ) - 8002700: 4293 cmp r3, r2 - 8002702: d901 bls.n 8002708 + 8002784: f7fe fd52 bl 800122c + 8002788: 0002 movs r2, r0 + 800278a: 68fb ldr r3, [r7, #12] + 800278c: 1ad3 subs r3, r2, r3 + 800278e: 4a3a ldr r2, [pc, #232] ; (8002878 ) + 8002790: 4293 cmp r3, r2 + 8002792: d901 bls.n 8002798 { return HAL_TIMEOUT; - 8002704: 2303 movs r3, #3 - 8002706: e068 b.n 80027da + 8002794: 2303 movs r3, #3 + 8002796: e068 b.n 800286a while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI) - 8002708: 4b38 ldr r3, [pc, #224] ; (80027ec ) - 800270a: 68db ldr r3, [r3, #12] - 800270c: 220c movs r2, #12 - 800270e: 4013 ands r3, r2 - 8002710: d1f0 bne.n 80026f4 + 8002798: 4b38 ldr r3, [pc, #224] ; (800287c ) + 800279a: 68db ldr r3, [r3, #12] + 800279c: 220c movs r2, #12 + 800279e: 4013 ands r3, r2 + 80027a0: d1f0 bne.n 8002784 } } } } /* Decreasing the number of wait states because of lower CPU frequency */ if(FLatency < __HAL_FLASH_GET_LATENCY()) - 8002712: 4b34 ldr r3, [pc, #208] ; (80027e4 ) - 8002714: 681b ldr r3, [r3, #0] - 8002716: 2201 movs r2, #1 - 8002718: 4013 ands r3, r2 - 800271a: 683a ldr r2, [r7, #0] - 800271c: 429a cmp r2, r3 - 800271e: d21e bcs.n 800275e + 80027a2: 4b34 ldr r3, [pc, #208] ; (8002874 ) + 80027a4: 681b ldr r3, [r3, #0] + 80027a6: 2201 movs r2, #1 + 80027a8: 4013 ands r3, r2 + 80027aa: 683a ldr r2, [r7, #0] + 80027ac: 429a cmp r2, r3 + 80027ae: d21e bcs.n 80027ee { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); - 8002720: 4b30 ldr r3, [pc, #192] ; (80027e4 ) - 8002722: 681b ldr r3, [r3, #0] - 8002724: 2201 movs r2, #1 - 8002726: 4393 bics r3, r2 - 8002728: 0019 movs r1, r3 - 800272a: 4b2e ldr r3, [pc, #184] ; (80027e4 ) - 800272c: 683a ldr r2, [r7, #0] - 800272e: 430a orrs r2, r1 - 8002730: 601a str r2, [r3, #0] + 80027b0: 4b30 ldr r3, [pc, #192] ; (8002874 ) + 80027b2: 681b ldr r3, [r3, #0] + 80027b4: 2201 movs r2, #1 + 80027b6: 4393 bics r3, r2 + 80027b8: 0019 movs r1, r3 + 80027ba: 4b2e ldr r3, [pc, #184] ; (8002874 ) + 80027bc: 683a ldr r2, [r7, #0] + 80027be: 430a orrs r2, r1 + 80027c0: 601a str r2, [r3, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by polling the FLASH_ACR register */ tickstart = HAL_GetTick(); - 8002732: f7fe fd33 bl 800119c - 8002736: 0003 movs r3, r0 - 8002738: 60fb str r3, [r7, #12] + 80027c2: f7fe fd33 bl 800122c + 80027c6: 0003 movs r3, r0 + 80027c8: 60fb str r3, [r7, #12] while (__HAL_FLASH_GET_LATENCY() != FLatency) - 800273a: e009 b.n 8002750 + 80027ca: e009 b.n 80027e0 { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) - 800273c: f7fe fd2e bl 800119c - 8002740: 0002 movs r2, r0 - 8002742: 68fb ldr r3, [r7, #12] - 8002744: 1ad3 subs r3, r2, r3 - 8002746: 4a28 ldr r2, [pc, #160] ; (80027e8 ) - 8002748: 4293 cmp r3, r2 - 800274a: d901 bls.n 8002750 + 80027cc: f7fe fd2e bl 800122c + 80027d0: 0002 movs r2, r0 + 80027d2: 68fb ldr r3, [r7, #12] + 80027d4: 1ad3 subs r3, r2, r3 + 80027d6: 4a28 ldr r2, [pc, #160] ; (8002878 ) + 80027d8: 4293 cmp r3, r2 + 80027da: d901 bls.n 80027e0 { return HAL_TIMEOUT; - 800274c: 2303 movs r3, #3 - 800274e: e044 b.n 80027da + 80027dc: 2303 movs r3, #3 + 80027de: e044 b.n 800286a while (__HAL_FLASH_GET_LATENCY() != FLatency) - 8002750: 4b24 ldr r3, [pc, #144] ; (80027e4 ) - 8002752: 681b ldr r3, [r3, #0] - 8002754: 2201 movs r2, #1 - 8002756: 4013 ands r3, r2 - 8002758: 683a ldr r2, [r7, #0] - 800275a: 429a cmp r2, r3 - 800275c: d1ee bne.n 800273c + 80027e0: 4b24 ldr r3, [pc, #144] ; (8002874 ) + 80027e2: 681b ldr r3, [r3, #0] + 80027e4: 2201 movs r2, #1 + 80027e6: 4013 ands r3, r2 + 80027e8: 683a ldr r2, [r7, #0] + 80027ea: 429a cmp r2, r3 + 80027ec: d1ee bne.n 80027cc } } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) - 800275e: 687b ldr r3, [r7, #4] - 8002760: 681b ldr r3, [r3, #0] - 8002762: 2204 movs r2, #4 - 8002764: 4013 ands r3, r2 - 8002766: d009 beq.n 800277c + 80027ee: 687b ldr r3, [r7, #4] + 80027f0: 681b ldr r3, [r3, #0] + 80027f2: 2204 movs r2, #4 + 80027f4: 4013 ands r3, r2 + 80027f6: d009 beq.n 800280c { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); - 8002768: 4b20 ldr r3, [pc, #128] ; (80027ec ) - 800276a: 68db ldr r3, [r3, #12] - 800276c: 4a20 ldr r2, [pc, #128] ; (80027f0 ) - 800276e: 4013 ands r3, r2 - 8002770: 0019 movs r1, r3 - 8002772: 687b ldr r3, [r7, #4] - 8002774: 68da ldr r2, [r3, #12] - 8002776: 4b1d ldr r3, [pc, #116] ; (80027ec ) - 8002778: 430a orrs r2, r1 - 800277a: 60da str r2, [r3, #12] + 80027f8: 4b20 ldr r3, [pc, #128] ; (800287c ) + 80027fa: 68db ldr r3, [r3, #12] + 80027fc: 4a20 ldr r2, [pc, #128] ; (8002880 ) + 80027fe: 4013 ands r3, r2 + 8002800: 0019 movs r1, r3 + 8002802: 687b ldr r3, [r7, #4] + 8002804: 68da ldr r2, [r3, #12] + 8002806: 4b1d ldr r3, [pc, #116] ; (800287c ) + 8002808: 430a orrs r2, r1 + 800280a: 60da str r2, [r3, #12] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) - 800277c: 687b ldr r3, [r7, #4] - 800277e: 681b ldr r3, [r3, #0] - 8002780: 2208 movs r2, #8 - 8002782: 4013 ands r3, r2 - 8002784: d00a beq.n 800279c + 800280c: 687b ldr r3, [r7, #4] + 800280e: 681b ldr r3, [r3, #0] + 8002810: 2208 movs r2, #8 + 8002812: 4013 ands r3, r2 + 8002814: d00a beq.n 800282c { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); - 8002786: 4b19 ldr r3, [pc, #100] ; (80027ec ) - 8002788: 68db ldr r3, [r3, #12] - 800278a: 4a1a ldr r2, [pc, #104] ; (80027f4 ) - 800278c: 4013 ands r3, r2 - 800278e: 0019 movs r1, r3 - 8002790: 687b ldr r3, [r7, #4] - 8002792: 691b ldr r3, [r3, #16] - 8002794: 00da lsls r2, r3, #3 - 8002796: 4b15 ldr r3, [pc, #84] ; (80027ec ) - 8002798: 430a orrs r2, r1 - 800279a: 60da str r2, [r3, #12] + 8002816: 4b19 ldr r3, [pc, #100] ; (800287c ) + 8002818: 68db ldr r3, [r3, #12] + 800281a: 4a1a ldr r2, [pc, #104] ; (8002884 ) + 800281c: 4013 ands r3, r2 + 800281e: 0019 movs r1, r3 + 8002820: 687b ldr r3, [r7, #4] + 8002822: 691b ldr r3, [r3, #16] + 8002824: 00da lsls r2, r3, #3 + 8002826: 4b15 ldr r3, [pc, #84] ; (800287c ) + 8002828: 430a orrs r2, r1 + 800282a: 60da str r2, [r3, #12] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos]; - 800279c: f000 f8c4 bl 8002928 - 80027a0: 0001 movs r1, r0 - 80027a2: 4b12 ldr r3, [pc, #72] ; (80027ec ) - 80027a4: 68db ldr r3, [r3, #12] - 80027a6: 091b lsrs r3, r3, #4 - 80027a8: 220f movs r2, #15 - 80027aa: 4013 ands r3, r2 - 80027ac: 4a12 ldr r2, [pc, #72] ; (80027f8 ) - 80027ae: 5cd3 ldrb r3, [r2, r3] - 80027b0: 000a movs r2, r1 - 80027b2: 40da lsrs r2, r3 - 80027b4: 4b11 ldr r3, [pc, #68] ; (80027fc ) - 80027b6: 601a str r2, [r3, #0] + 800282c: f000 f8c4 bl 80029b8 + 8002830: 0001 movs r1, r0 + 8002832: 4b12 ldr r3, [pc, #72] ; (800287c ) + 8002834: 68db ldr r3, [r3, #12] + 8002836: 091b lsrs r3, r3, #4 + 8002838: 220f movs r2, #15 + 800283a: 4013 ands r3, r2 + 800283c: 4a12 ldr r2, [pc, #72] ; (8002888 ) + 800283e: 5cd3 ldrb r3, [r2, r3] + 8002840: 000a movs r2, r1 + 8002842: 40da lsrs r2, r3 + 8002844: 4b11 ldr r3, [pc, #68] ; (800288c ) + 8002846: 601a str r2, [r3, #0] /* Configure the source of time base considering new system clocks settings*/ status = HAL_InitTick(uwTickPrio); - 80027b8: 4b11 ldr r3, [pc, #68] ; (8002800 ) - 80027ba: 681b ldr r3, [r3, #0] - 80027bc: 250b movs r5, #11 - 80027be: 197c adds r4, r7, r5 - 80027c0: 0018 movs r0, r3 - 80027c2: f7fe fca5 bl 8001110 - 80027c6: 0003 movs r3, r0 - 80027c8: 7023 strb r3, [r4, #0] + 8002848: 4b11 ldr r3, [pc, #68] ; (8002890 ) + 800284a: 681b ldr r3, [r3, #0] + 800284c: 250b movs r5, #11 + 800284e: 197c adds r4, r7, r5 + 8002850: 0018 movs r0, r3 + 8002852: f7fe fca5 bl 80011a0 + 8002856: 0003 movs r3, r0 + 8002858: 7023 strb r3, [r4, #0] if(status != HAL_OK) - 80027ca: 197b adds r3, r7, r5 - 80027cc: 781b ldrb r3, [r3, #0] - 80027ce: 2b00 cmp r3, #0 - 80027d0: d002 beq.n 80027d8 + 800285a: 197b adds r3, r7, r5 + 800285c: 781b ldrb r3, [r3, #0] + 800285e: 2b00 cmp r3, #0 + 8002860: d002 beq.n 8002868 { return status; - 80027d2: 197b adds r3, r7, r5 - 80027d4: 781b ldrb r3, [r3, #0] - 80027d6: e000 b.n 80027da + 8002862: 197b adds r3, r7, r5 + 8002864: 781b ldrb r3, [r3, #0] + 8002866: e000 b.n 800286a } return HAL_OK; - 80027d8: 2300 movs r3, #0 + 8002868: 2300 movs r3, #0 } - 80027da: 0018 movs r0, r3 - 80027dc: 46bd mov sp, r7 - 80027de: b004 add sp, #16 - 80027e0: bdb0 pop {r4, r5, r7, pc} - 80027e2: 46c0 nop ; (mov r8, r8) - 80027e4: 40022000 .word 0x40022000 - 80027e8: 00001388 .word 0x00001388 - 80027ec: 40021000 .word 0x40021000 - 80027f0: fffff8ff .word 0xfffff8ff - 80027f4: ffffc7ff .word 0xffffc7ff - 80027f8: 08004bf0 .word 0x08004bf0 - 80027fc: 20000000 .word 0x20000000 - 8002800: 20000004 .word 0x20000004 + 800286a: 0018 movs r0, r3 + 800286c: 46bd mov sp, r7 + 800286e: b004 add sp, #16 + 8002870: bdb0 pop {r4, r5, r7, pc} + 8002872: 46c0 nop ; (mov r8, r8) + 8002874: 40022000 .word 0x40022000 + 8002878: 00001388 .word 0x00001388 + 800287c: 40021000 .word 0x40021000 + 8002880: fffff8ff .word 0xfffff8ff + 8002884: ffffc7ff .word 0xffffc7ff + 8002888: 08004c80 .word 0x08004c80 + 800288c: 20000000 .word 0x20000000 + 8002890: 20000004 .word 0x20000004 -08002804 : +08002894 : * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock * @retval None */ void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) { - 8002804: b590 push {r4, r7, lr} - 8002806: b08d sub sp, #52 ; 0x34 - 8002808: af00 add r7, sp, #0 - 800280a: 60f8 str r0, [r7, #12] - 800280c: 60b9 str r1, [r7, #8] - 800280e: 607a str r2, [r7, #4] + 8002894: b590 push {r4, r7, lr} + 8002896: b08d sub sp, #52 ; 0x34 + 8002898: af00 add r7, sp, #0 + 800289a: 60f8 str r0, [r7, #12] + 800289c: 60b9 str r1, [r7, #8] + 800289e: 607a str r2, [r7, #4] GPIO_InitTypeDef gpio = {0}; - 8002810: 241c movs r4, #28 - 8002812: 193b adds r3, r7, r4 - 8002814: 0018 movs r0, r3 - 8002816: 2314 movs r3, #20 - 8002818: 001a movs r2, r3 - 800281a: 2100 movs r1, #0 - 800281c: f002 f9ab bl 8004b76 + 80028a0: 241c movs r4, #28 + 80028a2: 193b adds r3, r7, r4 + 80028a4: 0018 movs r0, r3 + 80028a6: 2314 movs r3, #20 + 80028a8: 001a movs r2, r3 + 80028aa: 2100 movs r1, #0 + 80028ac: f002 f9ab bl 8004c06 assert_param(IS_RCC_MCO(RCC_MCOx)); assert_param(IS_RCC_MCODIV(RCC_MCODiv)); assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); /* Configure the MCO1 pin in alternate function mode */ gpio.Mode = GPIO_MODE_AF_PP; - 8002820: 0020 movs r0, r4 - 8002822: 183b adds r3, r7, r0 - 8002824: 2202 movs r2, #2 - 8002826: 605a str r2, [r3, #4] + 80028b0: 0020 movs r0, r4 + 80028b2: 183b adds r3, r7, r0 + 80028b4: 2202 movs r2, #2 + 80028b6: 605a str r2, [r3, #4] gpio.Speed = GPIO_SPEED_FREQ_HIGH; - 8002828: 183b adds r3, r7, r0 - 800282a: 2202 movs r2, #2 - 800282c: 60da str r2, [r3, #12] + 80028b8: 183b adds r3, r7, r0 + 80028ba: 2202 movs r2, #2 + 80028bc: 60da str r2, [r3, #12] gpio.Pull = GPIO_NOPULL; - 800282e: 183b adds r3, r7, r0 - 8002830: 2200 movs r2, #0 - 8002832: 609a str r2, [r3, #8] + 80028be: 183b adds r3, r7, r0 + 80028c0: 2200 movs r2, #0 + 80028c2: 609a str r2, [r3, #8] if(RCC_MCOx == RCC_MCO1) - 8002834: 68fb ldr r3, [r7, #12] - 8002836: 2b00 cmp r3, #0 - 8002838: d11a bne.n 8002870 + 80028c4: 68fb ldr r3, [r7, #12] + 80028c6: 2b00 cmp r3, #0 + 80028c8: d11a bne.n 8002900 { gpio.Pin = MCO1_PIN; - 800283a: 183b adds r3, r7, r0 - 800283c: 2280 movs r2, #128 ; 0x80 - 800283e: 0052 lsls r2, r2, #1 - 8002840: 601a str r2, [r3, #0] + 80028ca: 183b adds r3, r7, r0 + 80028cc: 2280 movs r2, #128 ; 0x80 + 80028ce: 0052 lsls r2, r2, #1 + 80028d0: 601a str r2, [r3, #0] gpio.Alternate = GPIO_AF0_MCO; - 8002842: 183b adds r3, r7, r0 - 8002844: 2200 movs r2, #0 - 8002846: 611a str r2, [r3, #16] + 80028d2: 183b adds r3, r7, r0 + 80028d4: 2200 movs r2, #0 + 80028d6: 611a str r2, [r3, #16] /* MCO1 Clock Enable */ MCO1_CLK_ENABLE(); - 8002848: 4b2d ldr r3, [pc, #180] ; (8002900 ) - 800284a: 6ada ldr r2, [r3, #44] ; 0x2c - 800284c: 4b2c ldr r3, [pc, #176] ; (8002900 ) - 800284e: 2101 movs r1, #1 - 8002850: 430a orrs r2, r1 - 8002852: 62da str r2, [r3, #44] ; 0x2c - 8002854: 4b2a ldr r3, [pc, #168] ; (8002900 ) - 8002856: 6adb ldr r3, [r3, #44] ; 0x2c - 8002858: 2201 movs r2, #1 - 800285a: 4013 ands r3, r2 - 800285c: 61bb str r3, [r7, #24] - 800285e: 69bb ldr r3, [r7, #24] + 80028d8: 4b2d ldr r3, [pc, #180] ; (8002990 ) + 80028da: 6ada ldr r2, [r3, #44] ; 0x2c + 80028dc: 4b2c ldr r3, [pc, #176] ; (8002990 ) + 80028de: 2101 movs r1, #1 + 80028e0: 430a orrs r2, r1 + 80028e2: 62da str r2, [r3, #44] ; 0x2c + 80028e4: 4b2a ldr r3, [pc, #168] ; (8002990 ) + 80028e6: 6adb ldr r3, [r3, #44] ; 0x2c + 80028e8: 2201 movs r2, #1 + 80028ea: 4013 ands r3, r2 + 80028ec: 61bb str r3, [r7, #24] + 80028ee: 69bb ldr r3, [r7, #24] HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio); - 8002860: 183a adds r2, r7, r0 - 8002862: 23a0 movs r3, #160 ; 0xa0 - 8002864: 05db lsls r3, r3, #23 - 8002866: 0011 movs r1, r2 - 8002868: 0018 movs r0, r3 - 800286a: f7ff f96b bl 8001b44 - 800286e: e038 b.n 80028e2 + 80028f0: 183a adds r2, r7, r0 + 80028f2: 23a0 movs r3, #160 ; 0xa0 + 80028f4: 05db lsls r3, r3, #23 + 80028f6: 0011 movs r1, r2 + 80028f8: 0018 movs r0, r3 + 80028fa: f7ff f96b bl 8001bd4 + 80028fe: e038 b.n 8002972 } #if defined(RCC_MCO3_SUPPORT) else if (RCC_MCOx == RCC_MCO3) - 8002870: 68fb ldr r3, [r7, #12] - 8002872: 2b02 cmp r3, #2 - 8002874: d11a bne.n 80028ac + 8002900: 68fb ldr r3, [r7, #12] + 8002902: 2b02 cmp r3, #2 + 8002904: d11a bne.n 800293c { gpio.Pin = MCO3_PIN; - 8002876: 201c movs r0, #28 - 8002878: 183b adds r3, r7, r0 - 800287a: 2280 movs r2, #128 ; 0x80 - 800287c: 0192 lsls r2, r2, #6 - 800287e: 601a str r2, [r3, #0] + 8002906: 201c movs r0, #28 + 8002908: 183b adds r3, r7, r0 + 800290a: 2280 movs r2, #128 ; 0x80 + 800290c: 0192 lsls r2, r2, #6 + 800290e: 601a str r2, [r3, #0] gpio.Alternate = MCO3_GPIO_AF; - 8002880: 183b adds r3, r7, r0 - 8002882: 2200 movs r2, #0 - 8002884: 611a str r2, [r3, #16] + 8002910: 183b adds r3, r7, r0 + 8002912: 2200 movs r2, #0 + 8002914: 611a str r2, [r3, #16] /* MCO3 Clock Enable */ MCO3_CLK_ENABLE(); - 8002886: 4b1e ldr r3, [pc, #120] ; (8002900 ) - 8002888: 6ada ldr r2, [r3, #44] ; 0x2c - 800288a: 4b1d ldr r3, [pc, #116] ; (8002900 ) - 800288c: 2102 movs r1, #2 - 800288e: 430a orrs r2, r1 - 8002890: 62da str r2, [r3, #44] ; 0x2c - 8002892: 4b1b ldr r3, [pc, #108] ; (8002900 ) - 8002894: 6adb ldr r3, [r3, #44] ; 0x2c - 8002896: 2202 movs r2, #2 - 8002898: 4013 ands r3, r2 - 800289a: 617b str r3, [r7, #20] - 800289c: 697b ldr r3, [r7, #20] + 8002916: 4b1e ldr r3, [pc, #120] ; (8002990 ) + 8002918: 6ada ldr r2, [r3, #44] ; 0x2c + 800291a: 4b1d ldr r3, [pc, #116] ; (8002990 ) + 800291c: 2102 movs r1, #2 + 800291e: 430a orrs r2, r1 + 8002920: 62da str r2, [r3, #44] ; 0x2c + 8002922: 4b1b ldr r3, [pc, #108] ; (8002990 ) + 8002924: 6adb ldr r3, [r3, #44] ; 0x2c + 8002926: 2202 movs r2, #2 + 8002928: 4013 ands r3, r2 + 800292a: 617b str r3, [r7, #20] + 800292c: 697b ldr r3, [r7, #20] HAL_GPIO_Init(MCO3_GPIO_PORT, &gpio); - 800289e: 183b adds r3, r7, r0 - 80028a0: 4a18 ldr r2, [pc, #96] ; (8002904 ) - 80028a2: 0019 movs r1, r3 - 80028a4: 0010 movs r0, r2 - 80028a6: f7ff f94d bl 8001b44 - 80028aa: e01a b.n 80028e2 + 800292e: 183b adds r3, r7, r0 + 8002930: 4a18 ldr r2, [pc, #96] ; (8002994 ) + 8002932: 0019 movs r1, r3 + 8002934: 0010 movs r0, r2 + 8002936: f7ff f94d bl 8001bd4 + 800293a: e01a b.n 8002972 } #endif /* RCC_MCO3_SUPPORT */ else { gpio.Pin = MCO2_PIN; - 80028ac: 201c movs r0, #28 - 80028ae: 183b adds r3, r7, r0 - 80028b0: 2280 movs r2, #128 ; 0x80 - 80028b2: 0092 lsls r2, r2, #2 - 80028b4: 601a str r2, [r3, #0] + 800293c: 201c movs r0, #28 + 800293e: 183b adds r3, r7, r0 + 8002940: 2280 movs r2, #128 ; 0x80 + 8002942: 0092 lsls r2, r2, #2 + 8002944: 601a str r2, [r3, #0] gpio.Alternate = GPIO_AF0_MCO; - 80028b6: 183b adds r3, r7, r0 - 80028b8: 2200 movs r2, #0 - 80028ba: 611a str r2, [r3, #16] + 8002946: 183b adds r3, r7, r0 + 8002948: 2200 movs r2, #0 + 800294a: 611a str r2, [r3, #16] /* MCO2 Clock Enable */ MCO2_CLK_ENABLE(); - 80028bc: 4b10 ldr r3, [pc, #64] ; (8002900 ) - 80028be: 6ada ldr r2, [r3, #44] ; 0x2c - 80028c0: 4b0f ldr r3, [pc, #60] ; (8002900 ) - 80028c2: 2101 movs r1, #1 - 80028c4: 430a orrs r2, r1 - 80028c6: 62da str r2, [r3, #44] ; 0x2c - 80028c8: 4b0d ldr r3, [pc, #52] ; (8002900 ) - 80028ca: 6adb ldr r3, [r3, #44] ; 0x2c - 80028cc: 2201 movs r2, #1 - 80028ce: 4013 ands r3, r2 - 80028d0: 613b str r3, [r7, #16] - 80028d2: 693b ldr r3, [r7, #16] + 800294c: 4b10 ldr r3, [pc, #64] ; (8002990 ) + 800294e: 6ada ldr r2, [r3, #44] ; 0x2c + 8002950: 4b0f ldr r3, [pc, #60] ; (8002990 ) + 8002952: 2101 movs r1, #1 + 8002954: 430a orrs r2, r1 + 8002956: 62da str r2, [r3, #44] ; 0x2c + 8002958: 4b0d ldr r3, [pc, #52] ; (8002990 ) + 800295a: 6adb ldr r3, [r3, #44] ; 0x2c + 800295c: 2201 movs r2, #1 + 800295e: 4013 ands r3, r2 + 8002960: 613b str r3, [r7, #16] + 8002962: 693b ldr r3, [r7, #16] HAL_GPIO_Init(MCO2_GPIO_PORT, &gpio); - 80028d4: 183a adds r2, r7, r0 - 80028d6: 23a0 movs r3, #160 ; 0xa0 - 80028d8: 05db lsls r3, r3, #23 - 80028da: 0011 movs r1, r2 - 80028dc: 0018 movs r0, r3 - 80028de: f7ff f931 bl 8001b44 + 8002964: 183a adds r2, r7, r0 + 8002966: 23a0 movs r3, #160 ; 0xa0 + 8002968: 05db lsls r3, r3, #23 + 800296a: 0011 movs r1, r2 + 800296c: 0018 movs r0, r3 + 800296e: f7ff f931 bl 8001bd4 } /* Configure the MCO clock source */ __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv); - 80028e2: 4b07 ldr r3, [pc, #28] ; (8002900 ) - 80028e4: 68db ldr r3, [r3, #12] - 80028e6: 4a08 ldr r2, [pc, #32] ; (8002908 ) - 80028e8: 4013 ands r3, r2 - 80028ea: 0019 movs r1, r3 - 80028ec: 68ba ldr r2, [r7, #8] - 80028ee: 687b ldr r3, [r7, #4] - 80028f0: 431a orrs r2, r3 - 80028f2: 4b03 ldr r3, [pc, #12] ; (8002900 ) - 80028f4: 430a orrs r2, r1 - 80028f6: 60da str r2, [r3, #12] + 8002972: 4b07 ldr r3, [pc, #28] ; (8002990 ) + 8002974: 68db ldr r3, [r3, #12] + 8002976: 4a08 ldr r2, [pc, #32] ; (8002998 ) + 8002978: 4013 ands r3, r2 + 800297a: 0019 movs r1, r3 + 800297c: 68ba ldr r2, [r7, #8] + 800297e: 687b ldr r3, [r7, #4] + 8002980: 431a orrs r2, r3 + 8002982: 4b03 ldr r3, [pc, #12] ; (8002990 ) + 8002984: 430a orrs r2, r1 + 8002986: 60da str r2, [r3, #12] } - 80028f8: 46c0 nop ; (mov r8, r8) - 80028fa: 46bd mov sp, r7 - 80028fc: b00d add sp, #52 ; 0x34 - 80028fe: bd90 pop {r4, r7, pc} - 8002900: 40021000 .word 0x40021000 - 8002904: 50000400 .word 0x50000400 - 8002908: 80ffffff .word 0x80ffffff + 8002988: 46c0 nop ; (mov r8, r8) + 800298a: 46bd mov sp, r7 + 800298c: b00d add sp, #52 ; 0x34 + 800298e: bd90 pop {r4, r7, pc} + 8002990: 40021000 .word 0x40021000 + 8002994: 50000400 .word 0x50000400 + 8002998: 80ffffff .word 0x80ffffff -0800290c : +0800299c : * allowing the MCU to perform rescue operations. The CSSI is linked to * the Cortex-M0+ NMI (Non-Maskable Interrupt) exception vector. * @retval None */ void HAL_RCC_EnableCSS(void) { - 800290c: b580 push {r7, lr} - 800290e: af00 add r7, sp, #0 + 800299c: b580 push {r7, lr} + 800299e: af00 add r7, sp, #0 SET_BIT(RCC->CR, RCC_CR_CSSON) ; - 8002910: 4b04 ldr r3, [pc, #16] ; (8002924 ) - 8002912: 681a ldr r2, [r3, #0] - 8002914: 4b03 ldr r3, [pc, #12] ; (8002924 ) - 8002916: 2180 movs r1, #128 ; 0x80 - 8002918: 0309 lsls r1, r1, #12 - 800291a: 430a orrs r2, r1 - 800291c: 601a str r2, [r3, #0] + 80029a0: 4b04 ldr r3, [pc, #16] ; (80029b4 ) + 80029a2: 681a ldr r2, [r3, #0] + 80029a4: 4b03 ldr r3, [pc, #12] ; (80029b4 ) + 80029a6: 2180 movs r1, #128 ; 0x80 + 80029a8: 0309 lsls r1, r1, #12 + 80029aa: 430a orrs r2, r1 + 80029ac: 601a str r2, [r3, #0] } - 800291e: 46c0 nop ; (mov r8, r8) - 8002920: 46bd mov sp, r7 - 8002922: bd80 pop {r7, pc} - 8002924: 40021000 .word 0x40021000 + 80029ae: 46c0 nop ; (mov r8, r8) + 80029b0: 46bd mov sp, r7 + 80029b2: bd80 pop {r7, pc} + 80029b4: 40021000 .word 0x40021000 -08002928 : +080029b8 : * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect. * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { - 8002928: b5b0 push {r4, r5, r7, lr} - 800292a: b08e sub sp, #56 ; 0x38 - 800292c: af00 add r7, sp, #0 + 80029b8: b5b0 push {r4, r5, r7, lr} + 80029ba: b08e sub sp, #56 ; 0x38 + 80029bc: af00 add r7, sp, #0 uint32_t tmpreg, pllm, plld, pllvco, msiclkrange; /* no init needed */ uint32_t sysclockfreq; tmpreg = RCC->CFGR; - 800292e: 4b4c ldr r3, [pc, #304] ; (8002a60 ) - 8002930: 68db ldr r3, [r3, #12] - 8002932: 62fb str r3, [r7, #44] ; 0x2c + 80029be: 4b4c ldr r3, [pc, #304] ; (8002af0 ) + 80029c0: 68db ldr r3, [r3, #12] + 80029c2: 62fb str r3, [r7, #44] ; 0x2c /* Get SYSCLK source -------------------------------------------------------*/ switch (tmpreg & RCC_CFGR_SWS) - 8002934: 6afa ldr r2, [r7, #44] ; 0x2c - 8002936: 230c movs r3, #12 - 8002938: 4013 ands r3, r2 - 800293a: 2b0c cmp r3, #12 - 800293c: d014 beq.n 8002968 - 800293e: d900 bls.n 8002942 - 8002940: e07b b.n 8002a3a - 8002942: 2b04 cmp r3, #4 - 8002944: d002 beq.n 800294c - 8002946: 2b08 cmp r3, #8 - 8002948: d00b beq.n 8002962 - 800294a: e076 b.n 8002a3a + 80029c4: 6afa ldr r2, [r7, #44] ; 0x2c + 80029c6: 230c movs r3, #12 + 80029c8: 4013 ands r3, r2 + 80029ca: 2b0c cmp r3, #12 + 80029cc: d014 beq.n 80029f8 + 80029ce: d900 bls.n 80029d2 + 80029d0: e07b b.n 8002aca + 80029d2: 2b04 cmp r3, #4 + 80029d4: d002 beq.n 80029dc + 80029d6: 2b08 cmp r3, #8 + 80029d8: d00b beq.n 80029f2 + 80029da: e076 b.n 8002aca { case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ { if ((RCC->CR & RCC_CR_HSIDIVF) != 0U) - 800294c: 4b44 ldr r3, [pc, #272] ; (8002a60 ) - 800294e: 681b ldr r3, [r3, #0] - 8002950: 2210 movs r2, #16 - 8002952: 4013 ands r3, r2 - 8002954: d002 beq.n 800295c + 80029dc: 4b44 ldr r3, [pc, #272] ; (8002af0 ) + 80029de: 681b ldr r3, [r3, #0] + 80029e0: 2210 movs r2, #16 + 80029e2: 4013 ands r3, r2 + 80029e4: d002 beq.n 80029ec { sysclockfreq = (HSI_VALUE >> 2); - 8002956: 4b43 ldr r3, [pc, #268] ; (8002a64 ) - 8002958: 633b str r3, [r7, #48] ; 0x30 + 80029e6: 4b43 ldr r3, [pc, #268] ; (8002af4 ) + 80029e8: 633b str r3, [r7, #48] ; 0x30 } else { sysclockfreq = HSI_VALUE; } break; - 800295a: e07c b.n 8002a56 + 80029ea: e07c b.n 8002ae6 sysclockfreq = HSI_VALUE; - 800295c: 4b42 ldr r3, [pc, #264] ; (8002a68 ) - 800295e: 633b str r3, [r7, #48] ; 0x30 + 80029ec: 4b42 ldr r3, [pc, #264] ; (8002af8 ) + 80029ee: 633b str r3, [r7, #48] ; 0x30 break; - 8002960: e079 b.n 8002a56 + 80029f0: e079 b.n 8002ae6 } case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ { sysclockfreq = HSE_VALUE; - 8002962: 4b42 ldr r3, [pc, #264] ; (8002a6c ) - 8002964: 633b str r3, [r7, #48] ; 0x30 + 80029f2: 4b42 ldr r3, [pc, #264] ; (8002afc ) + 80029f4: 633b str r3, [r7, #48] ; 0x30 break; - 8002966: e076 b.n 8002a56 + 80029f6: e076 b.n 8002ae6 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ { pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos]; - 8002968: 6afb ldr r3, [r7, #44] ; 0x2c - 800296a: 0c9a lsrs r2, r3, #18 - 800296c: 230f movs r3, #15 - 800296e: 401a ands r2, r3 - 8002970: 4b3f ldr r3, [pc, #252] ; (8002a70 ) - 8002972: 5c9b ldrb r3, [r3, r2] - 8002974: 62bb str r3, [r7, #40] ; 0x28 + 80029f8: 6afb ldr r3, [r7, #44] ; 0x2c + 80029fa: 0c9a lsrs r2, r3, #18 + 80029fc: 230f movs r3, #15 + 80029fe: 401a ands r2, r3 + 8002a00: 4b3f ldr r3, [pc, #252] ; (8002b00 ) + 8002a02: 5c9b ldrb r3, [r3, r2] + 8002a04: 62bb str r3, [r7, #40] ; 0x28 plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_Pos) + 1U; - 8002976: 6afb ldr r3, [r7, #44] ; 0x2c - 8002978: 0d9a lsrs r2, r3, #22 - 800297a: 2303 movs r3, #3 - 800297c: 4013 ands r3, r2 - 800297e: 3301 adds r3, #1 - 8002980: 627b str r3, [r7, #36] ; 0x24 + 8002a06: 6afb ldr r3, [r7, #44] ; 0x2c + 8002a08: 0d9a lsrs r2, r3, #22 + 8002a0a: 2303 movs r3, #3 + 8002a0c: 4013 ands r3, r2 + 8002a0e: 3301 adds r3, #1 + 8002a10: 627b str r3, [r7, #36] ; 0x24 if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI) - 8002982: 4b37 ldr r3, [pc, #220] ; (8002a60 ) - 8002984: 68da ldr r2, [r3, #12] - 8002986: 2380 movs r3, #128 ; 0x80 - 8002988: 025b lsls r3, r3, #9 - 800298a: 4013 ands r3, r2 - 800298c: d01a beq.n 80029c4 + 8002a12: 4b37 ldr r3, [pc, #220] ; (8002af0 ) + 8002a14: 68da ldr r2, [r3, #12] + 8002a16: 2380 movs r3, #128 ; 0x80 + 8002a18: 025b lsls r3, r3, #9 + 8002a1a: 4013 ands r3, r2 + 8002a1c: d01a beq.n 8002a54 { /* HSE used as PLL clock source */ pllvco = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pllm) / (uint64_t)plld); - 800298e: 6abb ldr r3, [r7, #40] ; 0x28 - 8002990: 61bb str r3, [r7, #24] - 8002992: 2300 movs r3, #0 - 8002994: 61fb str r3, [r7, #28] - 8002996: 4a35 ldr r2, [pc, #212] ; (8002a6c ) - 8002998: 2300 movs r3, #0 - 800299a: 69b8 ldr r0, [r7, #24] - 800299c: 69f9 ldr r1, [r7, #28] - 800299e: f7fd fc5f bl 8000260 <__aeabi_lmul> - 80029a2: 0002 movs r2, r0 - 80029a4: 000b movs r3, r1 - 80029a6: 0010 movs r0, r2 - 80029a8: 0019 movs r1, r3 - 80029aa: 6a7b ldr r3, [r7, #36] ; 0x24 - 80029ac: 613b str r3, [r7, #16] - 80029ae: 2300 movs r3, #0 - 80029b0: 617b str r3, [r7, #20] - 80029b2: 693a ldr r2, [r7, #16] - 80029b4: 697b ldr r3, [r7, #20] - 80029b6: f7fd fc33 bl 8000220 <__aeabi_uldivmod> - 80029ba: 0002 movs r2, r0 - 80029bc: 000b movs r3, r1 - 80029be: 0013 movs r3, r2 - 80029c0: 637b str r3, [r7, #52] ; 0x34 - 80029c2: e037 b.n 8002a34 + 8002a1e: 6abb ldr r3, [r7, #40] ; 0x28 + 8002a20: 61bb str r3, [r7, #24] + 8002a22: 2300 movs r3, #0 + 8002a24: 61fb str r3, [r7, #28] + 8002a26: 4a35 ldr r2, [pc, #212] ; (8002afc ) + 8002a28: 2300 movs r3, #0 + 8002a2a: 69b8 ldr r0, [r7, #24] + 8002a2c: 69f9 ldr r1, [r7, #28] + 8002a2e: f7fd fc17 bl 8000260 <__aeabi_lmul> + 8002a32: 0002 movs r2, r0 + 8002a34: 000b movs r3, r1 + 8002a36: 0010 movs r0, r2 + 8002a38: 0019 movs r1, r3 + 8002a3a: 6a7b ldr r3, [r7, #36] ; 0x24 + 8002a3c: 613b str r3, [r7, #16] + 8002a3e: 2300 movs r3, #0 + 8002a40: 617b str r3, [r7, #20] + 8002a42: 693a ldr r2, [r7, #16] + 8002a44: 697b ldr r3, [r7, #20] + 8002a46: f7fd fbeb bl 8000220 <__aeabi_uldivmod> + 8002a4a: 0002 movs r2, r0 + 8002a4c: 000b movs r3, r1 + 8002a4e: 0013 movs r3, r2 + 8002a50: 637b str r3, [r7, #52] ; 0x34 + 8002a52: e037 b.n 8002ac4 } else { if ((RCC->CR & RCC_CR_HSIDIVF) != 0U) - 80029c4: 4b26 ldr r3, [pc, #152] ; (8002a60 ) - 80029c6: 681b ldr r3, [r3, #0] - 80029c8: 2210 movs r2, #16 - 80029ca: 4013 ands r3, r2 - 80029cc: d01a beq.n 8002a04 + 8002a54: 4b26 ldr r3, [pc, #152] ; (8002af0 ) + 8002a56: 681b ldr r3, [r3, #0] + 8002a58: 2210 movs r2, #16 + 8002a5a: 4013 ands r3, r2 + 8002a5c: d01a beq.n 8002a94 { pllvco = (uint32_t)((((uint64_t)(HSI_VALUE >> 2)) * (uint64_t)pllm) / (uint64_t)plld); - 80029ce: 6abb ldr r3, [r7, #40] ; 0x28 - 80029d0: 60bb str r3, [r7, #8] - 80029d2: 2300 movs r3, #0 - 80029d4: 60fb str r3, [r7, #12] - 80029d6: 4a23 ldr r2, [pc, #140] ; (8002a64 ) - 80029d8: 2300 movs r3, #0 - 80029da: 68b8 ldr r0, [r7, #8] - 80029dc: 68f9 ldr r1, [r7, #12] - 80029de: f7fd fc3f bl 8000260 <__aeabi_lmul> - 80029e2: 0002 movs r2, r0 - 80029e4: 000b movs r3, r1 - 80029e6: 0010 movs r0, r2 - 80029e8: 0019 movs r1, r3 - 80029ea: 6a7b ldr r3, [r7, #36] ; 0x24 - 80029ec: 603b str r3, [r7, #0] - 80029ee: 2300 movs r3, #0 - 80029f0: 607b str r3, [r7, #4] - 80029f2: 683a ldr r2, [r7, #0] - 80029f4: 687b ldr r3, [r7, #4] - 80029f6: f7fd fc13 bl 8000220 <__aeabi_uldivmod> - 80029fa: 0002 movs r2, r0 - 80029fc: 000b movs r3, r1 - 80029fe: 0013 movs r3, r2 - 8002a00: 637b str r3, [r7, #52] ; 0x34 - 8002a02: e017 b.n 8002a34 + 8002a5e: 6abb ldr r3, [r7, #40] ; 0x28 + 8002a60: 60bb str r3, [r7, #8] + 8002a62: 2300 movs r3, #0 + 8002a64: 60fb str r3, [r7, #12] + 8002a66: 4a23 ldr r2, [pc, #140] ; (8002af4 ) + 8002a68: 2300 movs r3, #0 + 8002a6a: 68b8 ldr r0, [r7, #8] + 8002a6c: 68f9 ldr r1, [r7, #12] + 8002a6e: f7fd fbf7 bl 8000260 <__aeabi_lmul> + 8002a72: 0002 movs r2, r0 + 8002a74: 000b movs r3, r1 + 8002a76: 0010 movs r0, r2 + 8002a78: 0019 movs r1, r3 + 8002a7a: 6a7b ldr r3, [r7, #36] ; 0x24 + 8002a7c: 603b str r3, [r7, #0] + 8002a7e: 2300 movs r3, #0 + 8002a80: 607b str r3, [r7, #4] + 8002a82: 683a ldr r2, [r7, #0] + 8002a84: 687b ldr r3, [r7, #4] + 8002a86: f7fd fbcb bl 8000220 <__aeabi_uldivmod> + 8002a8a: 0002 movs r2, r0 + 8002a8c: 000b movs r3, r1 + 8002a8e: 0013 movs r3, r2 + 8002a90: 637b str r3, [r7, #52] ; 0x34 + 8002a92: e017 b.n 8002ac4 } else { pllvco = (uint32_t)(((uint64_t)HSI_VALUE * (uint64_t)pllm) / (uint64_t)plld); - 8002a04: 6abb ldr r3, [r7, #40] ; 0x28 - 8002a06: 0018 movs r0, r3 - 8002a08: 2300 movs r3, #0 - 8002a0a: 0019 movs r1, r3 - 8002a0c: 4a16 ldr r2, [pc, #88] ; (8002a68 ) - 8002a0e: 2300 movs r3, #0 - 8002a10: f7fd fc26 bl 8000260 <__aeabi_lmul> - 8002a14: 0002 movs r2, r0 - 8002a16: 000b movs r3, r1 - 8002a18: 0010 movs r0, r2 - 8002a1a: 0019 movs r1, r3 - 8002a1c: 6a7b ldr r3, [r7, #36] ; 0x24 - 8002a1e: 001c movs r4, r3 - 8002a20: 2300 movs r3, #0 - 8002a22: 001d movs r5, r3 - 8002a24: 0022 movs r2, r4 - 8002a26: 002b movs r3, r5 - 8002a28: f7fd fbfa bl 8000220 <__aeabi_uldivmod> - 8002a2c: 0002 movs r2, r0 - 8002a2e: 000b movs r3, r1 - 8002a30: 0013 movs r3, r2 - 8002a32: 637b str r3, [r7, #52] ; 0x34 + 8002a94: 6abb ldr r3, [r7, #40] ; 0x28 + 8002a96: 0018 movs r0, r3 + 8002a98: 2300 movs r3, #0 + 8002a9a: 0019 movs r1, r3 + 8002a9c: 4a16 ldr r2, [pc, #88] ; (8002af8 ) + 8002a9e: 2300 movs r3, #0 + 8002aa0: f7fd fbde bl 8000260 <__aeabi_lmul> + 8002aa4: 0002 movs r2, r0 + 8002aa6: 000b movs r3, r1 + 8002aa8: 0010 movs r0, r2 + 8002aaa: 0019 movs r1, r3 + 8002aac: 6a7b ldr r3, [r7, #36] ; 0x24 + 8002aae: 001c movs r4, r3 + 8002ab0: 2300 movs r3, #0 + 8002ab2: 001d movs r5, r3 + 8002ab4: 0022 movs r2, r4 + 8002ab6: 002b movs r3, r5 + 8002ab8: f7fd fbb2 bl 8000220 <__aeabi_uldivmod> + 8002abc: 0002 movs r2, r0 + 8002abe: 000b movs r3, r1 + 8002ac0: 0013 movs r3, r2 + 8002ac2: 637b str r3, [r7, #52] ; 0x34 } } sysclockfreq = pllvco; - 8002a34: 6b7b ldr r3, [r7, #52] ; 0x34 - 8002a36: 633b str r3, [r7, #48] ; 0x30 + 8002ac4: 6b7b ldr r3, [r7, #52] ; 0x34 + 8002ac6: 633b str r3, [r7, #48] ; 0x30 break; - 8002a38: e00d b.n 8002a56 + 8002ac8: e00d b.n 8002ae6 } case RCC_SYSCLKSOURCE_STATUS_MSI: /* MSI used as system clock source */ default: /* MSI used as system clock */ { msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> RCC_ICSCR_MSIRANGE_Pos; - 8002a3a: 4b09 ldr r3, [pc, #36] ; (8002a60 ) - 8002a3c: 685b ldr r3, [r3, #4] - 8002a3e: 0b5b lsrs r3, r3, #13 - 8002a40: 2207 movs r2, #7 - 8002a42: 4013 ands r3, r2 - 8002a44: 623b str r3, [r7, #32] + 8002aca: 4b09 ldr r3, [pc, #36] ; (8002af0 ) + 8002acc: 685b ldr r3, [r3, #4] + 8002ace: 0b5b lsrs r3, r3, #13 + 8002ad0: 2207 movs r2, #7 + 8002ad2: 4013 ands r3, r2 + 8002ad4: 623b str r3, [r7, #32] sysclockfreq = (32768U * (1UL << (msiclkrange + 1U))); - 8002a46: 6a3b ldr r3, [r7, #32] - 8002a48: 3301 adds r3, #1 - 8002a4a: 2280 movs r2, #128 ; 0x80 - 8002a4c: 0212 lsls r2, r2, #8 - 8002a4e: 409a lsls r2, r3 - 8002a50: 0013 movs r3, r2 - 8002a52: 633b str r3, [r7, #48] ; 0x30 + 8002ad6: 6a3b ldr r3, [r7, #32] + 8002ad8: 3301 adds r3, #1 + 8002ada: 2280 movs r2, #128 ; 0x80 + 8002adc: 0212 lsls r2, r2, #8 + 8002ade: 409a lsls r2, r3 + 8002ae0: 0013 movs r3, r2 + 8002ae2: 633b str r3, [r7, #48] ; 0x30 break; - 8002a54: 46c0 nop ; (mov r8, r8) + 8002ae4: 46c0 nop ; (mov r8, r8) } } return sysclockfreq; - 8002a56: 6b3b ldr r3, [r7, #48] ; 0x30 + 8002ae6: 6b3b ldr r3, [r7, #48] ; 0x30 } - 8002a58: 0018 movs r0, r3 - 8002a5a: 46bd mov sp, r7 - 8002a5c: b00e add sp, #56 ; 0x38 - 8002a5e: bdb0 pop {r4, r5, r7, pc} - 8002a60: 40021000 .word 0x40021000 - 8002a64: 003d0900 .word 0x003d0900 - 8002a68: 00f42400 .word 0x00f42400 - 8002a6c: 007a1200 .word 0x007a1200 - 8002a70: 08004c08 .word 0x08004c08 + 8002ae8: 0018 movs r0, r3 + 8002aea: 46bd mov sp, r7 + 8002aec: b00e add sp, #56 ; 0x38 + 8002aee: bdb0 pop {r4, r5, r7, pc} + 8002af0: 40021000 .word 0x40021000 + 8002af4: 003d0900 .word 0x003d0900 + 8002af8: 00f42400 .word 0x00f42400 + 8002afc: 007a1200 .word 0x007a1200 + 8002b00: 08004c98 .word 0x08004c98 -08002a74 : +08002b04 : * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency * and updated within this function * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { - 8002a74: b580 push {r7, lr} - 8002a76: af00 add r7, sp, #0 + 8002b04: b580 push {r7, lr} + 8002b06: af00 add r7, sp, #0 return SystemCoreClock; - 8002a78: 4b02 ldr r3, [pc, #8] ; (8002a84 ) - 8002a7a: 681b ldr r3, [r3, #0] + 8002b08: 4b02 ldr r3, [pc, #8] ; (8002b14 ) + 8002b0a: 681b ldr r3, [r3, #0] } - 8002a7c: 0018 movs r0, r3 - 8002a7e: 46bd mov sp, r7 - 8002a80: bd80 pop {r7, pc} - 8002a82: 46c0 nop ; (mov r8, r8) - 8002a84: 20000000 .word 0x20000000 + 8002b0c: 0018 movs r0, r3 + 8002b0e: 46bd mov sp, r7 + 8002b10: bd80 pop {r7, pc} + 8002b12: 46c0 nop ; (mov r8, r8) + 8002b14: 20000000 .word 0x20000000 -08002a88 : +08002b18 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { - 8002a88: b580 push {r7, lr} - 8002a8a: af00 add r7, sp, #0 + 8002b18: b580 push {r7, lr} + 8002b1a: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); - 8002a8c: f7ff fff2 bl 8002a74 - 8002a90: 0001 movs r1, r0 - 8002a92: 4b06 ldr r3, [pc, #24] ; (8002aac ) - 8002a94: 68db ldr r3, [r3, #12] - 8002a96: 0a1b lsrs r3, r3, #8 - 8002a98: 2207 movs r2, #7 - 8002a9a: 4013 ands r3, r2 - 8002a9c: 4a04 ldr r2, [pc, #16] ; (8002ab0 ) - 8002a9e: 5cd3 ldrb r3, [r2, r3] - 8002aa0: 40d9 lsrs r1, r3 - 8002aa2: 000b movs r3, r1 + 8002b1c: f7ff fff2 bl 8002b04 + 8002b20: 0001 movs r1, r0 + 8002b22: 4b06 ldr r3, [pc, #24] ; (8002b3c ) + 8002b24: 68db ldr r3, [r3, #12] + 8002b26: 0a1b lsrs r3, r3, #8 + 8002b28: 2207 movs r2, #7 + 8002b2a: 4013 ands r3, r2 + 8002b2c: 4a04 ldr r2, [pc, #16] ; (8002b40 ) + 8002b2e: 5cd3 ldrb r3, [r2, r3] + 8002b30: 40d9 lsrs r1, r3 + 8002b32: 000b movs r3, r1 } - 8002aa4: 0018 movs r0, r3 - 8002aa6: 46bd mov sp, r7 - 8002aa8: bd80 pop {r7, pc} - 8002aaa: 46c0 nop ; (mov r8, r8) - 8002aac: 40021000 .word 0x40021000 - 8002ab0: 08004c00 .word 0x08004c00 + 8002b34: 0018 movs r0, r3 + 8002b36: 46bd mov sp, r7 + 8002b38: bd80 pop {r7, pc} + 8002b3a: 46c0 nop ; (mov r8, r8) + 8002b3c: 40021000 .word 0x40021000 + 8002b40: 08004c90 .word 0x08004c90 -08002ab4 : +08002b44 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { - 8002ab4: b580 push {r7, lr} - 8002ab6: af00 add r7, sp, #0 + 8002b44: b580 push {r7, lr} + 8002b46: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); - 8002ab8: f7ff ffdc bl 8002a74 - 8002abc: 0001 movs r1, r0 - 8002abe: 4b06 ldr r3, [pc, #24] ; (8002ad8 ) - 8002ac0: 68db ldr r3, [r3, #12] - 8002ac2: 0adb lsrs r3, r3, #11 - 8002ac4: 2207 movs r2, #7 - 8002ac6: 4013 ands r3, r2 - 8002ac8: 4a04 ldr r2, [pc, #16] ; (8002adc ) - 8002aca: 5cd3 ldrb r3, [r2, r3] - 8002acc: 40d9 lsrs r1, r3 - 8002ace: 000b movs r3, r1 + 8002b48: f7ff ffdc bl 8002b04 + 8002b4c: 0001 movs r1, r0 + 8002b4e: 4b06 ldr r3, [pc, #24] ; (8002b68 ) + 8002b50: 68db ldr r3, [r3, #12] + 8002b52: 0adb lsrs r3, r3, #11 + 8002b54: 2207 movs r2, #7 + 8002b56: 4013 ands r3, r2 + 8002b58: 4a04 ldr r2, [pc, #16] ; (8002b6c ) + 8002b5a: 5cd3 ldrb r3, [r2, r3] + 8002b5c: 40d9 lsrs r1, r3 + 8002b5e: 000b movs r3, r1 } - 8002ad0: 0018 movs r0, r3 - 8002ad2: 46bd mov sp, r7 - 8002ad4: bd80 pop {r7, pc} - 8002ad6: 46c0 nop ; (mov r8, r8) - 8002ad8: 40021000 .word 0x40021000 - 8002adc: 08004c00 .word 0x08004c00 + 8002b60: 0018 movs r0, r3 + 8002b62: 46bd mov sp, r7 + 8002b64: bd80 pop {r7, pc} + 8002b66: 46c0 nop ; (mov r8, r8) + 8002b68: 40021000 .word 0x40021000 + 8002b6c: 08004c90 .word 0x08004c90 -08002ae0 : +08002b70 : * @brief This function handles the RCC CSS interrupt request. * @note This API should be called under the NMI_Handler(). * @retval None */ void HAL_RCC_NMI_IRQHandler(void) { - 8002ae0: b580 push {r7, lr} - 8002ae2: af00 add r7, sp, #0 + 8002b70: b580 push {r7, lr} + 8002b72: af00 add r7, sp, #0 /* Check RCC CSSF flag */ if(__HAL_RCC_GET_IT(RCC_IT_CSS)) - 8002ae4: 4b08 ldr r3, [pc, #32] ; (8002b08 ) - 8002ae6: 695a ldr r2, [r3, #20] - 8002ae8: 2380 movs r3, #128 ; 0x80 - 8002aea: 005b lsls r3, r3, #1 - 8002aec: 401a ands r2, r3 - 8002aee: 2380 movs r3, #128 ; 0x80 - 8002af0: 005b lsls r3, r3, #1 - 8002af2: 429a cmp r2, r3 - 8002af4: d105 bne.n 8002b02 + 8002b74: 4b08 ldr r3, [pc, #32] ; (8002b98 ) + 8002b76: 695a ldr r2, [r3, #20] + 8002b78: 2380 movs r3, #128 ; 0x80 + 8002b7a: 005b lsls r3, r3, #1 + 8002b7c: 401a ands r2, r3 + 8002b7e: 2380 movs r3, #128 ; 0x80 + 8002b80: 005b lsls r3, r3, #1 + 8002b82: 429a cmp r2, r3 + 8002b84: d105 bne.n 8002b92 { /* RCC Clock Security System interrupt user callback */ HAL_RCC_CSSCallback(); - 8002af6: f000 f809 bl 8002b0c + 8002b86: f000 f809 bl 8002b9c /* Clear RCC CSS pending bit */ __HAL_RCC_CLEAR_IT(RCC_IT_CSS); - 8002afa: 4b03 ldr r3, [pc, #12] ; (8002b08 ) - 8002afc: 2280 movs r2, #128 ; 0x80 - 8002afe: 0052 lsls r2, r2, #1 - 8002b00: 619a str r2, [r3, #24] + 8002b8a: 4b03 ldr r3, [pc, #12] ; (8002b98 ) + 8002b8c: 2280 movs r2, #128 ; 0x80 + 8002b8e: 0052 lsls r2, r2, #1 + 8002b90: 619a str r2, [r3, #24] } } - 8002b02: 46c0 nop ; (mov r8, r8) - 8002b04: 46bd mov sp, r7 - 8002b06: bd80 pop {r7, pc} - 8002b08: 40021000 .word 0x40021000 + 8002b92: 46c0 nop ; (mov r8, r8) + 8002b94: 46bd mov sp, r7 + 8002b96: bd80 pop {r7, pc} + 8002b98: 40021000 .word 0x40021000 -08002b0c : +08002b9c : /** * @brief RCC Clock Security System interrupt callback * @retval none */ __weak void HAL_RCC_CSSCallback(void) { - 8002b0c: b580 push {r7, lr} - 8002b0e: af00 add r7, sp, #0 + 8002b9c: b580 push {r7, lr} + 8002b9e: af00 add r7, sp, #0 /* NOTE : This function Should not be modified, when the callback is needed, the HAL_RCC_CSSCallback could be implemented in the user file */ } - 8002b10: 46c0 nop ; (mov r8, r8) - 8002b12: 46bd mov sp, r7 - 8002b14: bd80 pop {r7, pc} + 8002ba0: 46c0 nop ; (mov r8, r8) + 8002ba2: 46bd mov sp, r7 + 8002ba4: bd80 pop {r7, pc} ... -08002b18 : +08002ba8 : * @retval HAL status * @note If HAL_ERROR returned, first switch-OFF HSE clock oscillator with @ref HAL_RCC_OscConfig() * to possibly update HSE divider. */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { - 8002b18: b580 push {r7, lr} - 8002b1a: b086 sub sp, #24 - 8002b1c: af00 add r7, sp, #0 - 8002b1e: 6078 str r0, [r7, #4] + 8002ba8: b580 push {r7, lr} + 8002baa: b086 sub sp, #24 + 8002bac: af00 add r7, sp, #0 + 8002bae: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t temp_reg; FlagStatus pwrclkchanged = RESET; - 8002b20: 2017 movs r0, #23 - 8002b22: 183b adds r3, r7, r0 - 8002b24: 2200 movs r2, #0 - 8002b26: 701a strb r2, [r3, #0] + 8002bb0: 2017 movs r0, #23 + 8002bb2: 183b adds r3, r7, r0 + 8002bb4: 2200 movs r2, #0 + 8002bb6: 701a strb r2, [r3, #0] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*------------------------------- RTC/LCD Configuration ------------------------*/ if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) - 8002b28: 687b ldr r3, [r7, #4] - 8002b2a: 681b ldr r3, [r3, #0] - 8002b2c: 2220 movs r2, #32 - 8002b2e: 4013 ands r3, r2 - 8002b30: d100 bne.n 8002b34 - 8002b32: e0c7 b.n 8002cc4 + 8002bb8: 687b ldr r3, [r7, #4] + 8002bba: 681b ldr r3, [r3, #0] + 8002bbc: 2220 movs r2, #32 + 8002bbe: 4013 ands r3, r2 + 8002bc0: d100 bne.n 8002bc4 + 8002bc2: e0c7 b.n 8002d54 #endif /* LCD */ /* As soon as function is called to change RTC clock source, activation of the power domain is done. */ /* Requires to enable write access to Backup Domain of necessary */ if(__HAL_RCC_PWR_IS_CLK_DISABLED()) - 8002b34: 4b8b ldr r3, [pc, #556] ; (8002d64 ) - 8002b36: 6b9a ldr r2, [r3, #56] ; 0x38 - 8002b38: 2380 movs r3, #128 ; 0x80 - 8002b3a: 055b lsls r3, r3, #21 - 8002b3c: 4013 ands r3, r2 - 8002b3e: d109 bne.n 8002b54 + 8002bc4: 4b8b ldr r3, [pc, #556] ; (8002df4 ) + 8002bc6: 6b9a ldr r2, [r3, #56] ; 0x38 + 8002bc8: 2380 movs r3, #128 ; 0x80 + 8002bca: 055b lsls r3, r3, #21 + 8002bcc: 4013 ands r3, r2 + 8002bce: d109 bne.n 8002be4 { __HAL_RCC_PWR_CLK_ENABLE(); - 8002b40: 4b88 ldr r3, [pc, #544] ; (8002d64 ) - 8002b42: 6b9a ldr r2, [r3, #56] ; 0x38 - 8002b44: 4b87 ldr r3, [pc, #540] ; (8002d64 ) - 8002b46: 2180 movs r1, #128 ; 0x80 - 8002b48: 0549 lsls r1, r1, #21 - 8002b4a: 430a orrs r2, r1 - 8002b4c: 639a str r2, [r3, #56] ; 0x38 + 8002bd0: 4b88 ldr r3, [pc, #544] ; (8002df4 ) + 8002bd2: 6b9a ldr r2, [r3, #56] ; 0x38 + 8002bd4: 4b87 ldr r3, [pc, #540] ; (8002df4 ) + 8002bd6: 2180 movs r1, #128 ; 0x80 + 8002bd8: 0549 lsls r1, r1, #21 + 8002bda: 430a orrs r2, r1 + 8002bdc: 639a str r2, [r3, #56] ; 0x38 pwrclkchanged = SET; - 8002b4e: 183b adds r3, r7, r0 - 8002b50: 2201 movs r2, #1 - 8002b52: 701a strb r2, [r3, #0] + 8002bde: 183b adds r3, r7, r0 + 8002be0: 2201 movs r2, #1 + 8002be2: 701a strb r2, [r3, #0] } if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8002b54: 4b84 ldr r3, [pc, #528] ; (8002d68 ) - 8002b56: 681a ldr r2, [r3, #0] - 8002b58: 2380 movs r3, #128 ; 0x80 - 8002b5a: 005b lsls r3, r3, #1 - 8002b5c: 4013 ands r3, r2 - 8002b5e: d11a bne.n 8002b96 + 8002be4: 4b84 ldr r3, [pc, #528] ; (8002df8 ) + 8002be6: 681a ldr r2, [r3, #0] + 8002be8: 2380 movs r3, #128 ; 0x80 + 8002bea: 005b lsls r3, r3, #1 + 8002bec: 4013 ands r3, r2 + 8002bee: d11a bne.n 8002c26 { /* Enable write access to Backup domain */ SET_BIT(PWR->CR, PWR_CR_DBP); - 8002b60: 4b81 ldr r3, [pc, #516] ; (8002d68 ) - 8002b62: 681a ldr r2, [r3, #0] - 8002b64: 4b80 ldr r3, [pc, #512] ; (8002d68 ) - 8002b66: 2180 movs r1, #128 ; 0x80 - 8002b68: 0049 lsls r1, r1, #1 - 8002b6a: 430a orrs r2, r1 - 8002b6c: 601a str r2, [r3, #0] + 8002bf0: 4b81 ldr r3, [pc, #516] ; (8002df8 ) + 8002bf2: 681a ldr r2, [r3, #0] + 8002bf4: 4b80 ldr r3, [pc, #512] ; (8002df8 ) + 8002bf6: 2180 movs r1, #128 ; 0x80 + 8002bf8: 0049 lsls r1, r1, #1 + 8002bfa: 430a orrs r2, r1 + 8002bfc: 601a str r2, [r3, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); - 8002b6e: f7fe fb15 bl 800119c - 8002b72: 0003 movs r3, r0 - 8002b74: 613b str r3, [r7, #16] + 8002bfe: f7fe fb15 bl 800122c + 8002c02: 0003 movs r3, r0 + 8002c04: 613b str r3, [r7, #16] while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8002b76: e008 b.n 8002b8a + 8002c06: e008 b.n 8002c1a { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) - 8002b78: f7fe fb10 bl 800119c - 8002b7c: 0002 movs r2, r0 - 8002b7e: 693b ldr r3, [r7, #16] - 8002b80: 1ad3 subs r3, r2, r3 - 8002b82: 2b64 cmp r3, #100 ; 0x64 - 8002b84: d901 bls.n 8002b8a + 8002c08: f7fe fb10 bl 800122c + 8002c0c: 0002 movs r2, r0 + 8002c0e: 693b ldr r3, [r7, #16] + 8002c10: 1ad3 subs r3, r2, r3 + 8002c12: 2b64 cmp r3, #100 ; 0x64 + 8002c14: d901 bls.n 8002c1a { return HAL_TIMEOUT; - 8002b86: 2303 movs r3, #3 - 8002b88: e0e8 b.n 8002d5c + 8002c16: 2303 movs r3, #3 + 8002c18: e0e8 b.n 8002dec while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) - 8002b8a: 4b77 ldr r3, [pc, #476] ; (8002d68 ) - 8002b8c: 681a ldr r2, [r3, #0] - 8002b8e: 2380 movs r3, #128 ; 0x80 - 8002b90: 005b lsls r3, r3, #1 - 8002b92: 4013 ands r3, r2 - 8002b94: d0f0 beq.n 8002b78 + 8002c1a: 4b77 ldr r3, [pc, #476] ; (8002df8 ) + 8002c1c: 681a ldr r2, [r3, #0] + 8002c1e: 2380 movs r3, #128 ; 0x80 + 8002c20: 005b lsls r3, r3, #1 + 8002c22: 4013 ands r3, r2 + 8002c24: d0f0 beq.n 8002c08 } } } /* Check if user wants to change HSE RTC prescaler whereas HSE is enabled */ temp_reg = (RCC->CR & RCC_CR_RTCPRE); - 8002b96: 4b73 ldr r3, [pc, #460] ; (8002d64 ) - 8002b98: 681a ldr r2, [r3, #0] - 8002b9a: 23c0 movs r3, #192 ; 0xc0 - 8002b9c: 039b lsls r3, r3, #14 - 8002b9e: 4013 ands r3, r2 - 8002ba0: 60fb str r3, [r7, #12] + 8002c26: 4b73 ldr r3, [pc, #460] ; (8002df4 ) + 8002c28: 681a ldr r2, [r3, #0] + 8002c2a: 23c0 movs r3, #192 ; 0xc0 + 8002c2c: 039b lsls r3, r3, #14 + 8002c2e: 4013 ands r3, r2 + 8002c30: 60fb str r3, [r7, #12] if ((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CR_RTCPRE)) - 8002ba2: 687b ldr r3, [r7, #4] - 8002ba4: 685a ldr r2, [r3, #4] - 8002ba6: 23c0 movs r3, #192 ; 0xc0 - 8002ba8: 039b lsls r3, r3, #14 - 8002baa: 4013 ands r3, r2 - 8002bac: 68fa ldr r2, [r7, #12] - 8002bae: 429a cmp r2, r3 - 8002bb0: d013 beq.n 8002bda + 8002c32: 687b ldr r3, [r7, #4] + 8002c34: 685a ldr r2, [r3, #4] + 8002c36: 23c0 movs r3, #192 ; 0xc0 + 8002c38: 039b lsls r3, r3, #14 + 8002c3a: 4013 ands r3, r2 + 8002c3c: 68fa ldr r2, [r7, #12] + 8002c3e: 429a cmp r2, r3 + 8002c40: d013 beq.n 8002c6a #if defined (LCD) || (temp_reg != (PeriphClkInit->LCDClockSelection & RCC_CR_RTCPRE)) #endif /* LCD */ ) { /* Check HSE State */ if ((PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL) == RCC_CSR_RTCSEL_HSE) - 8002bb2: 687b ldr r3, [r7, #4] - 8002bb4: 685a ldr r2, [r3, #4] - 8002bb6: 23c0 movs r3, #192 ; 0xc0 - 8002bb8: 029b lsls r3, r3, #10 - 8002bba: 401a ands r2, r3 - 8002bbc: 23c0 movs r3, #192 ; 0xc0 - 8002bbe: 029b lsls r3, r3, #10 - 8002bc0: 429a cmp r2, r3 - 8002bc2: d10a bne.n 8002bda + 8002c42: 687b ldr r3, [r7, #4] + 8002c44: 685a ldr r2, [r3, #4] + 8002c46: 23c0 movs r3, #192 ; 0xc0 + 8002c48: 029b lsls r3, r3, #10 + 8002c4a: 401a ands r2, r3 + 8002c4c: 23c0 movs r3, #192 ; 0xc0 + 8002c4e: 029b lsls r3, r3, #10 + 8002c50: 429a cmp r2, r3 + 8002c52: d10a bne.n 8002c6a { if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)) - 8002bc4: 4b67 ldr r3, [pc, #412] ; (8002d64 ) - 8002bc6: 681a ldr r2, [r3, #0] - 8002bc8: 2380 movs r3, #128 ; 0x80 - 8002bca: 029b lsls r3, r3, #10 - 8002bcc: 401a ands r2, r3 - 8002bce: 2380 movs r3, #128 ; 0x80 - 8002bd0: 029b lsls r3, r3, #10 - 8002bd2: 429a cmp r2, r3 - 8002bd4: d101 bne.n 8002bda + 8002c54: 4b67 ldr r3, [pc, #412] ; (8002df4 ) + 8002c56: 681a ldr r2, [r3, #0] + 8002c58: 2380 movs r3, #128 ; 0x80 + 8002c5a: 029b lsls r3, r3, #10 + 8002c5c: 401a ands r2, r3 + 8002c5e: 2380 movs r3, #128 ; 0x80 + 8002c60: 029b lsls r3, r3, #10 + 8002c62: 429a cmp r2, r3 + 8002c64: d101 bne.n 8002c6a { /* To update HSE divider, first switch-OFF HSE clock oscillator*/ return HAL_ERROR; - 8002bd6: 2301 movs r3, #1 - 8002bd8: e0c0 b.n 8002d5c + 8002c66: 2301 movs r3, #1 + 8002c68: e0c0 b.n 8002dec } } } /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */ temp_reg = (RCC->CSR & RCC_CSR_RTCSEL); - 8002bda: 4b62 ldr r3, [pc, #392] ; (8002d64 ) - 8002bdc: 6d1a ldr r2, [r3, #80] ; 0x50 - 8002bde: 23c0 movs r3, #192 ; 0xc0 - 8002be0: 029b lsls r3, r3, #10 - 8002be2: 4013 ands r3, r2 - 8002be4: 60fb str r3, [r7, #12] + 8002c6a: 4b62 ldr r3, [pc, #392] ; (8002df4 ) + 8002c6c: 6d1a ldr r2, [r3, #80] ; 0x50 + 8002c6e: 23c0 movs r3, #192 ; 0xc0 + 8002c70: 029b lsls r3, r3, #10 + 8002c72: 4013 ands r3, r2 + 8002c74: 60fb str r3, [r7, #12] if((temp_reg != 0x00000000U) && (((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL)) \ - 8002be6: 68fb ldr r3, [r7, #12] - 8002be8: 2b00 cmp r3, #0 - 8002bea: d03b beq.n 8002c64 - 8002bec: 687b ldr r3, [r7, #4] - 8002bee: 685a ldr r2, [r3, #4] - 8002bf0: 23c0 movs r3, #192 ; 0xc0 - 8002bf2: 029b lsls r3, r3, #10 - 8002bf4: 4013 ands r3, r2 - 8002bf6: 68fa ldr r2, [r7, #12] - 8002bf8: 429a cmp r2, r3 - 8002bfa: d033 beq.n 8002c64 + 8002c76: 68fb ldr r3, [r7, #12] + 8002c78: 2b00 cmp r3, #0 + 8002c7a: d03b beq.n 8002cf4 + 8002c7c: 687b ldr r3, [r7, #4] + 8002c7e: 685a ldr r2, [r3, #4] + 8002c80: 23c0 movs r3, #192 ; 0xc0 + 8002c82: 029b lsls r3, r3, #10 + 8002c84: 4013 ands r3, r2 + 8002c86: 68fa ldr r2, [r7, #12] + 8002c88: 429a cmp r2, r3 + 8002c8a: d033 beq.n 8002cf4 && (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)) - 8002bfc: 687b ldr r3, [r7, #4] - 8002bfe: 681b ldr r3, [r3, #0] - 8002c00: 2220 movs r2, #32 - 8002c02: 4013 ands r3, r2 - 8002c04: d02e beq.n 8002c64 + 8002c8c: 687b ldr r3, [r7, #4] + 8002c8e: 681b ldr r3, [r3, #0] + 8002c90: 2220 movs r2, #32 + 8002c92: 4013 ands r3, r2 + 8002c94: d02e beq.n 8002cf4 && (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LCD) == RCC_PERIPHCLK_LCD)) #endif /* LCD */ )) { /* Store the content of CSR register before the reset of Backup Domain */ temp_reg = (RCC->CSR & ~(RCC_CSR_RTCSEL)); - 8002c06: 4b57 ldr r3, [pc, #348] ; (8002d64 ) - 8002c08: 6d1b ldr r3, [r3, #80] ; 0x50 - 8002c0a: 4a58 ldr r2, [pc, #352] ; (8002d6c ) - 8002c0c: 4013 ands r3, r2 - 8002c0e: 60fb str r3, [r7, #12] + 8002c96: 4b57 ldr r3, [pc, #348] ; (8002df4 ) + 8002c98: 6d1b ldr r3, [r3, #80] ; 0x50 + 8002c9a: 4a58 ldr r2, [pc, #352] ; (8002dfc ) + 8002c9c: 4013 ands r3, r2 + 8002c9e: 60fb str r3, [r7, #12] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); - 8002c10: 4b54 ldr r3, [pc, #336] ; (8002d64 ) - 8002c12: 6d1a ldr r2, [r3, #80] ; 0x50 - 8002c14: 4b53 ldr r3, [pc, #332] ; (8002d64 ) - 8002c16: 2180 movs r1, #128 ; 0x80 - 8002c18: 0309 lsls r1, r1, #12 - 8002c1a: 430a orrs r2, r1 - 8002c1c: 651a str r2, [r3, #80] ; 0x50 + 8002ca0: 4b54 ldr r3, [pc, #336] ; (8002df4 ) + 8002ca2: 6d1a ldr r2, [r3, #80] ; 0x50 + 8002ca4: 4b53 ldr r3, [pc, #332] ; (8002df4 ) + 8002ca6: 2180 movs r1, #128 ; 0x80 + 8002ca8: 0309 lsls r1, r1, #12 + 8002caa: 430a orrs r2, r1 + 8002cac: 651a str r2, [r3, #80] ; 0x50 __HAL_RCC_BACKUPRESET_RELEASE(); - 8002c1e: 4b51 ldr r3, [pc, #324] ; (8002d64 ) - 8002c20: 6d1a ldr r2, [r3, #80] ; 0x50 - 8002c22: 4b50 ldr r3, [pc, #320] ; (8002d64 ) - 8002c24: 4952 ldr r1, [pc, #328] ; (8002d70 ) - 8002c26: 400a ands r2, r1 - 8002c28: 651a str r2, [r3, #80] ; 0x50 + 8002cae: 4b51 ldr r3, [pc, #324] ; (8002df4 ) + 8002cb0: 6d1a ldr r2, [r3, #80] ; 0x50 + 8002cb2: 4b50 ldr r3, [pc, #320] ; (8002df4 ) + 8002cb4: 4952 ldr r1, [pc, #328] ; (8002e00 ) + 8002cb6: 400a ands r2, r1 + 8002cb8: 651a str r2, [r3, #80] ; 0x50 /* Restore the Content of CSR register */ RCC->CSR = temp_reg; - 8002c2a: 4b4e ldr r3, [pc, #312] ; (8002d64 ) - 8002c2c: 68fa ldr r2, [r7, #12] - 8002c2e: 651a str r2, [r3, #80] ; 0x50 + 8002cba: 4b4e ldr r3, [pc, #312] ; (8002df4 ) + 8002cbc: 68fa ldr r2, [r7, #12] + 8002cbe: 651a str r2, [r3, #80] ; 0x50 /* Wait for LSERDY if LSE was enabled */ if (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSEON)) - 8002c30: 68fa ldr r2, [r7, #12] - 8002c32: 2380 movs r3, #128 ; 0x80 - 8002c34: 005b lsls r3, r3, #1 - 8002c36: 4013 ands r3, r2 - 8002c38: d014 beq.n 8002c64 + 8002cc0: 68fa ldr r2, [r7, #12] + 8002cc2: 2380 movs r3, #128 ; 0x80 + 8002cc4: 005b lsls r3, r3, #1 + 8002cc6: 4013 ands r3, r2 + 8002cc8: d014 beq.n 8002cf4 { /* Get Start Tick */ tickstart = HAL_GetTick(); - 8002c3a: f7fe faaf bl 800119c - 8002c3e: 0003 movs r3, r0 - 8002c40: 613b str r3, [r7, #16] + 8002cca: f7fe faaf bl 800122c + 8002cce: 0003 movs r3, r0 + 8002cd0: 613b str r3, [r7, #16] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 8002c42: e009 b.n 8002c58 + 8002cd2: e009 b.n 8002ce8 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) - 8002c44: f7fe faaa bl 800119c - 8002c48: 0002 movs r2, r0 - 8002c4a: 693b ldr r3, [r7, #16] - 8002c4c: 1ad3 subs r3, r2, r3 - 8002c4e: 4a49 ldr r2, [pc, #292] ; (8002d74 ) - 8002c50: 4293 cmp r3, r2 - 8002c52: d901 bls.n 8002c58 + 8002cd4: f7fe faaa bl 800122c + 8002cd8: 0002 movs r2, r0 + 8002cda: 693b ldr r3, [r7, #16] + 8002cdc: 1ad3 subs r3, r2, r3 + 8002cde: 4a49 ldr r2, [pc, #292] ; (8002e04 ) + 8002ce0: 4293 cmp r3, r2 + 8002ce2: d901 bls.n 8002ce8 { return HAL_TIMEOUT; - 8002c54: 2303 movs r3, #3 - 8002c56: e081 b.n 8002d5c + 8002ce4: 2303 movs r3, #3 + 8002ce6: e081 b.n 8002dec while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U) - 8002c58: 4b42 ldr r3, [pc, #264] ; (8002d64 ) - 8002c5a: 6d1a ldr r2, [r3, #80] ; 0x50 - 8002c5c: 2380 movs r3, #128 ; 0x80 - 8002c5e: 009b lsls r3, r3, #2 - 8002c60: 4013 ands r3, r2 - 8002c62: d0ef beq.n 8002c44 + 8002ce8: 4b42 ldr r3, [pc, #264] ; (8002df4 ) + 8002cea: 6d1a ldr r2, [r3, #80] ; 0x50 + 8002cec: 2380 movs r3, #128 ; 0x80 + 8002cee: 009b lsls r3, r3, #2 + 8002cf0: 4013 ands r3, r2 + 8002cf2: d0ef beq.n 8002cd4 { __HAL_RCC_LCD_CONFIG(PeriphClkInit->LCDClockSelection); } #endif /* LCD */ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) - 8002c64: 687b ldr r3, [r7, #4] - 8002c66: 681b ldr r3, [r3, #0] - 8002c68: 2220 movs r2, #32 - 8002c6a: 4013 ands r3, r2 - 8002c6c: d01f beq.n 8002cae + 8002cf4: 687b ldr r3, [r7, #4] + 8002cf6: 681b ldr r3, [r3, #0] + 8002cf8: 2220 movs r2, #32 + 8002cfa: 4013 ands r3, r2 + 8002cfc: d01f beq.n 8002d3e { __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); - 8002c6e: 687b ldr r3, [r7, #4] - 8002c70: 685a ldr r2, [r3, #4] - 8002c72: 23c0 movs r3, #192 ; 0xc0 - 8002c74: 029b lsls r3, r3, #10 - 8002c76: 401a ands r2, r3 - 8002c78: 23c0 movs r3, #192 ; 0xc0 - 8002c7a: 029b lsls r3, r3, #10 - 8002c7c: 429a cmp r2, r3 - 8002c7e: d10c bne.n 8002c9a - 8002c80: 4b38 ldr r3, [pc, #224] ; (8002d64 ) - 8002c82: 681b ldr r3, [r3, #0] - 8002c84: 4a3c ldr r2, [pc, #240] ; (8002d78 ) - 8002c86: 4013 ands r3, r2 - 8002c88: 0019 movs r1, r3 - 8002c8a: 687b ldr r3, [r7, #4] - 8002c8c: 685a ldr r2, [r3, #4] - 8002c8e: 23c0 movs r3, #192 ; 0xc0 - 8002c90: 039b lsls r3, r3, #14 - 8002c92: 401a ands r2, r3 - 8002c94: 4b33 ldr r3, [pc, #204] ; (8002d64 ) - 8002c96: 430a orrs r2, r1 - 8002c98: 601a str r2, [r3, #0] - 8002c9a: 4b32 ldr r3, [pc, #200] ; (8002d64 ) - 8002c9c: 6d19 ldr r1, [r3, #80] ; 0x50 - 8002c9e: 687b ldr r3, [r7, #4] - 8002ca0: 685a ldr r2, [r3, #4] - 8002ca2: 23c0 movs r3, #192 ; 0xc0 - 8002ca4: 029b lsls r3, r3, #10 - 8002ca6: 401a ands r2, r3 - 8002ca8: 4b2e ldr r3, [pc, #184] ; (8002d64 ) - 8002caa: 430a orrs r2, r1 - 8002cac: 651a str r2, [r3, #80] ; 0x50 + 8002cfe: 687b ldr r3, [r7, #4] + 8002d00: 685a ldr r2, [r3, #4] + 8002d02: 23c0 movs r3, #192 ; 0xc0 + 8002d04: 029b lsls r3, r3, #10 + 8002d06: 401a ands r2, r3 + 8002d08: 23c0 movs r3, #192 ; 0xc0 + 8002d0a: 029b lsls r3, r3, #10 + 8002d0c: 429a cmp r2, r3 + 8002d0e: d10c bne.n 8002d2a + 8002d10: 4b38 ldr r3, [pc, #224] ; (8002df4 ) + 8002d12: 681b ldr r3, [r3, #0] + 8002d14: 4a3c ldr r2, [pc, #240] ; (8002e08 ) + 8002d16: 4013 ands r3, r2 + 8002d18: 0019 movs r1, r3 + 8002d1a: 687b ldr r3, [r7, #4] + 8002d1c: 685a ldr r2, [r3, #4] + 8002d1e: 23c0 movs r3, #192 ; 0xc0 + 8002d20: 039b lsls r3, r3, #14 + 8002d22: 401a ands r2, r3 + 8002d24: 4b33 ldr r3, [pc, #204] ; (8002df4 ) + 8002d26: 430a orrs r2, r1 + 8002d28: 601a str r2, [r3, #0] + 8002d2a: 4b32 ldr r3, [pc, #200] ; (8002df4 ) + 8002d2c: 6d19 ldr r1, [r3, #80] ; 0x50 + 8002d2e: 687b ldr r3, [r7, #4] + 8002d30: 685a ldr r2, [r3, #4] + 8002d32: 23c0 movs r3, #192 ; 0xc0 + 8002d34: 029b lsls r3, r3, #10 + 8002d36: 401a ands r2, r3 + 8002d38: 4b2e ldr r3, [pc, #184] ; (8002df4 ) + 8002d3a: 430a orrs r2, r1 + 8002d3c: 651a str r2, [r3, #80] ; 0x50 } /* Require to disable power clock if necessary */ if(pwrclkchanged == SET) - 8002cae: 2317 movs r3, #23 - 8002cb0: 18fb adds r3, r7, r3 - 8002cb2: 781b ldrb r3, [r3, #0] - 8002cb4: 2b01 cmp r3, #1 - 8002cb6: d105 bne.n 8002cc4 + 8002d3e: 2317 movs r3, #23 + 8002d40: 18fb adds r3, r7, r3 + 8002d42: 781b ldrb r3, [r3, #0] + 8002d44: 2b01 cmp r3, #1 + 8002d46: d105 bne.n 8002d54 { __HAL_RCC_PWR_CLK_DISABLE(); - 8002cb8: 4b2a ldr r3, [pc, #168] ; (8002d64 ) - 8002cba: 6b9a ldr r2, [r3, #56] ; 0x38 - 8002cbc: 4b29 ldr r3, [pc, #164] ; (8002d64 ) - 8002cbe: 492f ldr r1, [pc, #188] ; (8002d7c ) - 8002cc0: 400a ands r2, r1 - 8002cc2: 639a str r2, [r3, #56] ; 0x38 + 8002d48: 4b2a ldr r3, [pc, #168] ; (8002df4 ) + 8002d4a: 6b9a ldr r2, [r3, #56] ; 0x38 + 8002d4c: 4b29 ldr r3, [pc, #164] ; (8002df4 ) + 8002d4e: 492f ldr r1, [pc, #188] ; (8002e0c ) + 8002d50: 400a ands r2, r1 + 8002d52: 639a str r2, [r3, #56] ; 0x38 } } #if defined (RCC_CCIPR_USART1SEL) /*------------------------------- USART1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) - 8002cc4: 687b ldr r3, [r7, #4] - 8002cc6: 681b ldr r3, [r3, #0] - 8002cc8: 2201 movs r2, #1 - 8002cca: 4013 ands r3, r2 - 8002ccc: d009 beq.n 8002ce2 + 8002d54: 687b ldr r3, [r7, #4] + 8002d56: 681b ldr r3, [r3, #0] + 8002d58: 2201 movs r2, #1 + 8002d5a: 4013 ands r3, r2 + 8002d5c: d009 beq.n 8002d72 { /* Check the parameters */ assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); /* Configure the USART1 clock source */ __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); - 8002cce: 4b25 ldr r3, [pc, #148] ; (8002d64 ) - 8002cd0: 6cdb ldr r3, [r3, #76] ; 0x4c - 8002cd2: 2203 movs r2, #3 - 8002cd4: 4393 bics r3, r2 - 8002cd6: 0019 movs r1, r3 - 8002cd8: 687b ldr r3, [r7, #4] - 8002cda: 689a ldr r2, [r3, #8] - 8002cdc: 4b21 ldr r3, [pc, #132] ; (8002d64 ) - 8002cde: 430a orrs r2, r1 - 8002ce0: 64da str r2, [r3, #76] ; 0x4c + 8002d5e: 4b25 ldr r3, [pc, #148] ; (8002df4 ) + 8002d60: 6cdb ldr r3, [r3, #76] ; 0x4c + 8002d62: 2203 movs r2, #3 + 8002d64: 4393 bics r3, r2 + 8002d66: 0019 movs r1, r3 + 8002d68: 687b ldr r3, [r7, #4] + 8002d6a: 689a ldr r2, [r3, #8] + 8002d6c: 4b21 ldr r3, [pc, #132] ; (8002df4 ) + 8002d6e: 430a orrs r2, r1 + 8002d70: 64da str r2, [r3, #76] ; 0x4c } #endif /* RCC_CCIPR_USART1SEL */ /*----------------------------- USART2 Configuration --------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) - 8002ce2: 687b ldr r3, [r7, #4] - 8002ce4: 681b ldr r3, [r3, #0] - 8002ce6: 2202 movs r2, #2 - 8002ce8: 4013 ands r3, r2 - 8002cea: d009 beq.n 8002d00 + 8002d72: 687b ldr r3, [r7, #4] + 8002d74: 681b ldr r3, [r3, #0] + 8002d76: 2202 movs r2, #2 + 8002d78: 4013 ands r3, r2 + 8002d7a: d009 beq.n 8002d90 { /* Check the parameters */ assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); /* Configure the USART2 clock source */ __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); - 8002cec: 4b1d ldr r3, [pc, #116] ; (8002d64 ) - 8002cee: 6cdb ldr r3, [r3, #76] ; 0x4c - 8002cf0: 220c movs r2, #12 - 8002cf2: 4393 bics r3, r2 - 8002cf4: 0019 movs r1, r3 - 8002cf6: 687b ldr r3, [r7, #4] - 8002cf8: 68da ldr r2, [r3, #12] - 8002cfa: 4b1a ldr r3, [pc, #104] ; (8002d64 ) - 8002cfc: 430a orrs r2, r1 - 8002cfe: 64da str r2, [r3, #76] ; 0x4c + 8002d7c: 4b1d ldr r3, [pc, #116] ; (8002df4 ) + 8002d7e: 6cdb ldr r3, [r3, #76] ; 0x4c + 8002d80: 220c movs r2, #12 + 8002d82: 4393 bics r3, r2 + 8002d84: 0019 movs r1, r3 + 8002d86: 687b ldr r3, [r7, #4] + 8002d88: 68da ldr r2, [r3, #12] + 8002d8a: 4b1a ldr r3, [pc, #104] ; (8002df4 ) + 8002d8c: 430a orrs r2, r1 + 8002d8e: 64da str r2, [r3, #76] ; 0x4c } /*------------------------------ LPUART1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) - 8002d00: 687b ldr r3, [r7, #4] - 8002d02: 681b ldr r3, [r3, #0] - 8002d04: 2204 movs r2, #4 - 8002d06: 4013 ands r3, r2 - 8002d08: d009 beq.n 8002d1e + 8002d90: 687b ldr r3, [r7, #4] + 8002d92: 681b ldr r3, [r3, #0] + 8002d94: 2204 movs r2, #4 + 8002d96: 4013 ands r3, r2 + 8002d98: d009 beq.n 8002dae { /* Check the parameters */ assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection)); /* Configure the LPUAR1 clock source */ __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection); - 8002d0a: 4b16 ldr r3, [pc, #88] ; (8002d64 ) - 8002d0c: 6cdb ldr r3, [r3, #76] ; 0x4c - 8002d0e: 4a1c ldr r2, [pc, #112] ; (8002d80 ) - 8002d10: 4013 ands r3, r2 - 8002d12: 0019 movs r1, r3 - 8002d14: 687b ldr r3, [r7, #4] - 8002d16: 691a ldr r2, [r3, #16] - 8002d18: 4b12 ldr r3, [pc, #72] ; (8002d64 ) - 8002d1a: 430a orrs r2, r1 - 8002d1c: 64da str r2, [r3, #76] ; 0x4c + 8002d9a: 4b16 ldr r3, [pc, #88] ; (8002df4 ) + 8002d9c: 6cdb ldr r3, [r3, #76] ; 0x4c + 8002d9e: 4a1c ldr r2, [pc, #112] ; (8002e10 ) + 8002da0: 4013 ands r3, r2 + 8002da2: 0019 movs r1, r3 + 8002da4: 687b ldr r3, [r7, #4] + 8002da6: 691a ldr r2, [r3, #16] + 8002da8: 4b12 ldr r3, [pc, #72] ; (8002df4 ) + 8002daa: 430a orrs r2, r1 + 8002dac: 64da str r2, [r3, #76] ; 0x4c } /*------------------------------ I2C1 Configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) - 8002d1e: 687b ldr r3, [r7, #4] - 8002d20: 681b ldr r3, [r3, #0] - 8002d22: 2208 movs r2, #8 - 8002d24: 4013 ands r3, r2 - 8002d26: d009 beq.n 8002d3c + 8002dae: 687b ldr r3, [r7, #4] + 8002db0: 681b ldr r3, [r3, #0] + 8002db2: 2208 movs r2, #8 + 8002db4: 4013 ands r3, r2 + 8002db6: d009 beq.n 8002dcc { /* Check the parameters */ assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); /* Configure the I2C1 clock source */ __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); - 8002d28: 4b0e ldr r3, [pc, #56] ; (8002d64 ) - 8002d2a: 6cdb ldr r3, [r3, #76] ; 0x4c - 8002d2c: 4a15 ldr r2, [pc, #84] ; (8002d84 ) - 8002d2e: 4013 ands r3, r2 - 8002d30: 0019 movs r1, r3 - 8002d32: 687b ldr r3, [r7, #4] - 8002d34: 695a ldr r2, [r3, #20] - 8002d36: 4b0b ldr r3, [pc, #44] ; (8002d64 ) - 8002d38: 430a orrs r2, r1 - 8002d3a: 64da str r2, [r3, #76] ; 0x4c + 8002db8: 4b0e ldr r3, [pc, #56] ; (8002df4 ) + 8002dba: 6cdb ldr r3, [r3, #76] ; 0x4c + 8002dbc: 4a15 ldr r2, [pc, #84] ; (8002e14 ) + 8002dbe: 4013 ands r3, r2 + 8002dc0: 0019 movs r1, r3 + 8002dc2: 687b ldr r3, [r7, #4] + 8002dc4: 695a ldr r2, [r3, #20] + 8002dc6: 4b0b ldr r3, [pc, #44] ; (8002df4 ) + 8002dc8: 430a orrs r2, r1 + 8002dca: 64da str r2, [r3, #76] ; 0x4c __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); } #endif /* USB */ /*---------------------------- LPTIM1 configuration ------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == (RCC_PERIPHCLK_LPTIM1)) - 8002d3c: 687b ldr r3, [r7, #4] - 8002d3e: 681b ldr r3, [r3, #0] - 8002d40: 2280 movs r2, #128 ; 0x80 - 8002d42: 4013 ands r3, r2 - 8002d44: d009 beq.n 8002d5a + 8002dcc: 687b ldr r3, [r7, #4] + 8002dce: 681b ldr r3, [r3, #0] + 8002dd0: 2280 movs r2, #128 ; 0x80 + 8002dd2: 4013 ands r3, r2 + 8002dd4: d009 beq.n 8002dea { assert_param(IS_RCC_LPTIMCLK(PeriphClkInit->LptimClockSelection)); __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->LptimClockSelection); - 8002d46: 4b07 ldr r3, [pc, #28] ; (8002d64 ) - 8002d48: 6cdb ldr r3, [r3, #76] ; 0x4c - 8002d4a: 4a0f ldr r2, [pc, #60] ; (8002d88 ) - 8002d4c: 4013 ands r3, r2 - 8002d4e: 0019 movs r1, r3 - 8002d50: 687b ldr r3, [r7, #4] - 8002d52: 699a ldr r2, [r3, #24] - 8002d54: 4b03 ldr r3, [pc, #12] ; (8002d64 ) - 8002d56: 430a orrs r2, r1 - 8002d58: 64da str r2, [r3, #76] ; 0x4c + 8002dd6: 4b07 ldr r3, [pc, #28] ; (8002df4 ) + 8002dd8: 6cdb ldr r3, [r3, #76] ; 0x4c + 8002dda: 4a0f ldr r2, [pc, #60] ; (8002e18 ) + 8002ddc: 4013 ands r3, r2 + 8002dde: 0019 movs r1, r3 + 8002de0: 687b ldr r3, [r7, #4] + 8002de2: 699a ldr r2, [r3, #24] + 8002de4: 4b03 ldr r3, [pc, #12] ; (8002df4 ) + 8002de6: 430a orrs r2, r1 + 8002de8: 64da str r2, [r3, #76] ; 0x4c } return HAL_OK; - 8002d5a: 2300 movs r3, #0 + 8002dea: 2300 movs r3, #0 } - 8002d5c: 0018 movs r0, r3 - 8002d5e: 46bd mov sp, r7 - 8002d60: b006 add sp, #24 - 8002d62: bd80 pop {r7, pc} - 8002d64: 40021000 .word 0x40021000 - 8002d68: 40007000 .word 0x40007000 - 8002d6c: fffcffff .word 0xfffcffff - 8002d70: fff7ffff .word 0xfff7ffff - 8002d74: 00001388 .word 0x00001388 - 8002d78: ffcfffff .word 0xffcfffff - 8002d7c: efffffff .word 0xefffffff - 8002d80: fffff3ff .word 0xfffff3ff - 8002d84: ffffcfff .word 0xffffcfff - 8002d88: fff3ffff .word 0xfff3ffff + 8002dec: 0018 movs r0, r3 + 8002dee: 46bd mov sp, r7 + 8002df0: b006 add sp, #24 + 8002df2: bd80 pop {r7, pc} + 8002df4: 40021000 .word 0x40021000 + 8002df8: 40007000 .word 0x40007000 + 8002dfc: fffcffff .word 0xfffcffff + 8002e00: fff7ffff .word 0xfff7ffff + 8002e04: 00001388 .word 0x00001388 + 8002e08: ffcfffff .word 0xffcfffff + 8002e0c: efffffff .word 0xefffffff + 8002e10: fffff3ff .word 0xfffff3ff + 8002e14: ffffcfff .word 0xffffcfff + 8002e18: fff3ffff .word 0xfff3ffff -08002d8c : +08002e1c : * @param hspi pointer to a SPI_HandleTypeDef structure that contains * the configuration information for SPI module. * @retval HAL status */ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi) { - 8002d8c: b580 push {r7, lr} - 8002d8e: b082 sub sp, #8 - 8002d90: af00 add r7, sp, #0 - 8002d92: 6078 str r0, [r7, #4] + 8002e1c: b580 push {r7, lr} + 8002e1e: b082 sub sp, #8 + 8002e20: af00 add r7, sp, #0 + 8002e22: 6078 str r0, [r7, #4] /* Check the SPI handle allocation */ if (hspi == NULL) - 8002d94: 687b ldr r3, [r7, #4] - 8002d96: 2b00 cmp r3, #0 - 8002d98: d101 bne.n 8002d9e + 8002e24: 687b ldr r3, [r7, #4] + 8002e26: 2b00 cmp r3, #0 + 8002e28: d101 bne.n 8002e2e { return HAL_ERROR; - 8002d9a: 2301 movs r3, #1 - 8002d9c: e083 b.n 8002ea6 + 8002e2a: 2301 movs r3, #1 + 8002e2c: e083 b.n 8002f36 assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize)); assert_param(IS_SPI_NSS(hspi->Init.NSS)); assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit)); assert_param(IS_SPI_TIMODE(hspi->Init.TIMode)); if (hspi->Init.TIMode == SPI_TIMODE_DISABLE) - 8002d9e: 687b ldr r3, [r7, #4] - 8002da0: 6a5b ldr r3, [r3, #36] ; 0x24 - 8002da2: 2b00 cmp r3, #0 - 8002da4: d109 bne.n 8002dba + 8002e2e: 687b ldr r3, [r7, #4] + 8002e30: 6a5b ldr r3, [r3, #36] ; 0x24 + 8002e32: 2b00 cmp r3, #0 + 8002e34: d109 bne.n 8002e4a { assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity)); assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase)); if (hspi->Init.Mode == SPI_MODE_MASTER) - 8002da6: 687b ldr r3, [r7, #4] - 8002da8: 685a ldr r2, [r3, #4] - 8002daa: 2382 movs r3, #130 ; 0x82 - 8002dac: 005b lsls r3, r3, #1 - 8002dae: 429a cmp r2, r3 - 8002db0: d009 beq.n 8002dc6 + 8002e36: 687b ldr r3, [r7, #4] + 8002e38: 685a ldr r2, [r3, #4] + 8002e3a: 2382 movs r3, #130 ; 0x82 + 8002e3c: 005b lsls r3, r3, #1 + 8002e3e: 429a cmp r2, r3 + 8002e40: d009 beq.n 8002e56 assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); } else { /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */ hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2; - 8002db2: 687b ldr r3, [r7, #4] - 8002db4: 2200 movs r2, #0 - 8002db6: 61da str r2, [r3, #28] - 8002db8: e005 b.n 8002dc6 + 8002e42: 687b ldr r3, [r7, #4] + 8002e44: 2200 movs r2, #0 + 8002e46: 61da str r2, [r3, #28] + 8002e48: e005 b.n 8002e56 else { assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler)); /* Force polarity and phase to TI protocaol requirements */ hspi->Init.CLKPolarity = SPI_POLARITY_LOW; - 8002dba: 687b ldr r3, [r7, #4] - 8002dbc: 2200 movs r2, #0 - 8002dbe: 611a str r2, [r3, #16] + 8002e4a: 687b ldr r3, [r7, #4] + 8002e4c: 2200 movs r2, #0 + 8002e4e: 611a str r2, [r3, #16] hspi->Init.CLKPhase = SPI_PHASE_1EDGE; - 8002dc0: 687b ldr r3, [r7, #4] - 8002dc2: 2200 movs r2, #0 - 8002dc4: 615a str r2, [r3, #20] + 8002e50: 687b ldr r3, [r7, #4] + 8002e52: 2200 movs r2, #0 + 8002e54: 615a str r2, [r3, #20] if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE) { assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial)); } #else hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; - 8002dc6: 687b ldr r3, [r7, #4] - 8002dc8: 2200 movs r2, #0 - 8002dca: 629a str r2, [r3, #40] ; 0x28 + 8002e56: 687b ldr r3, [r7, #4] + 8002e58: 2200 movs r2, #0 + 8002e5a: 629a str r2, [r3, #40] ; 0x28 #endif /* USE_SPI_CRC */ if (hspi->State == HAL_SPI_STATE_RESET) - 8002dcc: 687b ldr r3, [r7, #4] - 8002dce: 2251 movs r2, #81 ; 0x51 - 8002dd0: 5c9b ldrb r3, [r3, r2] - 8002dd2: b2db uxtb r3, r3 - 8002dd4: 2b00 cmp r3, #0 - 8002dd6: d107 bne.n 8002de8 + 8002e5c: 687b ldr r3, [r7, #4] + 8002e5e: 2251 movs r2, #81 ; 0x51 + 8002e60: 5c9b ldrb r3, [r3, r2] + 8002e62: b2db uxtb r3, r3 + 8002e64: 2b00 cmp r3, #0 + 8002e66: d107 bne.n 8002e78 { /* Allocate lock resource and initialize it */ hspi->Lock = HAL_UNLOCKED; - 8002dd8: 687b ldr r3, [r7, #4] - 8002dda: 2250 movs r2, #80 ; 0x50 - 8002ddc: 2100 movs r1, #0 - 8002dde: 5499 strb r1, [r3, r2] + 8002e68: 687b ldr r3, [r7, #4] + 8002e6a: 2250 movs r2, #80 ; 0x50 + 8002e6c: 2100 movs r1, #0 + 8002e6e: 5499 strb r1, [r3, r2] /* Init the low level hardware : GPIO, CLOCK, NVIC... */ hspi->MspInitCallback(hspi); #else /* Init the low level hardware : GPIO, CLOCK, NVIC... */ HAL_SPI_MspInit(hspi); - 8002de0: 687b ldr r3, [r7, #4] - 8002de2: 0018 movs r0, r3 - 8002de4: f7fe f8a2 bl 8000f2c + 8002e70: 687b ldr r3, [r7, #4] + 8002e72: 0018 movs r0, r3 + 8002e74: f7fe f8a2 bl 8000fbc #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */ } hspi->State = HAL_SPI_STATE_BUSY; - 8002de8: 687b ldr r3, [r7, #4] - 8002dea: 2251 movs r2, #81 ; 0x51 - 8002dec: 2102 movs r1, #2 - 8002dee: 5499 strb r1, [r3, r2] + 8002e78: 687b ldr r3, [r7, #4] + 8002e7a: 2251 movs r2, #81 ; 0x51 + 8002e7c: 2102 movs r1, #2 + 8002e7e: 5499 strb r1, [r3, r2] /* Disable the selected SPI peripheral */ __HAL_SPI_DISABLE(hspi); - 8002df0: 687b ldr r3, [r7, #4] - 8002df2: 681b ldr r3, [r3, #0] - 8002df4: 681a ldr r2, [r3, #0] - 8002df6: 687b ldr r3, [r7, #4] - 8002df8: 681b ldr r3, [r3, #0] - 8002dfa: 2140 movs r1, #64 ; 0x40 - 8002dfc: 438a bics r2, r1 - 8002dfe: 601a str r2, [r3, #0] + 8002e80: 687b ldr r3, [r7, #4] + 8002e82: 681b ldr r3, [r3, #0] + 8002e84: 681a ldr r2, [r3, #0] + 8002e86: 687b ldr r3, [r7, #4] + 8002e88: 681b ldr r3, [r3, #0] + 8002e8a: 2140 movs r1, #64 ; 0x40 + 8002e8c: 438a bics r2, r1 + 8002e8e: 601a str r2, [r3, #0] /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/ /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management, Communication speed, First bit and CRC calculation state */ WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) | - 8002e00: 687b ldr r3, [r7, #4] - 8002e02: 685a ldr r2, [r3, #4] - 8002e04: 2382 movs r3, #130 ; 0x82 - 8002e06: 005b lsls r3, r3, #1 - 8002e08: 401a ands r2, r3 - 8002e0a: 687b ldr r3, [r7, #4] - 8002e0c: 6899 ldr r1, [r3, #8] - 8002e0e: 2384 movs r3, #132 ; 0x84 - 8002e10: 021b lsls r3, r3, #8 - 8002e12: 400b ands r3, r1 - 8002e14: 431a orrs r2, r3 - 8002e16: 687b ldr r3, [r7, #4] - 8002e18: 68d9 ldr r1, [r3, #12] - 8002e1a: 2380 movs r3, #128 ; 0x80 - 8002e1c: 011b lsls r3, r3, #4 - 8002e1e: 400b ands r3, r1 - 8002e20: 431a orrs r2, r3 - 8002e22: 687b ldr r3, [r7, #4] - 8002e24: 691b ldr r3, [r3, #16] - 8002e26: 2102 movs r1, #2 - 8002e28: 400b ands r3, r1 - 8002e2a: 431a orrs r2, r3 - 8002e2c: 687b ldr r3, [r7, #4] - 8002e2e: 695b ldr r3, [r3, #20] - 8002e30: 2101 movs r1, #1 - 8002e32: 400b ands r3, r1 - 8002e34: 431a orrs r2, r3 - 8002e36: 687b ldr r3, [r7, #4] - 8002e38: 6999 ldr r1, [r3, #24] - 8002e3a: 2380 movs r3, #128 ; 0x80 - 8002e3c: 009b lsls r3, r3, #2 - 8002e3e: 400b ands r3, r1 - 8002e40: 431a orrs r2, r3 - 8002e42: 687b ldr r3, [r7, #4] - 8002e44: 69db ldr r3, [r3, #28] - 8002e46: 2138 movs r1, #56 ; 0x38 - 8002e48: 400b ands r3, r1 - 8002e4a: 431a orrs r2, r3 - 8002e4c: 687b ldr r3, [r7, #4] - 8002e4e: 6a1b ldr r3, [r3, #32] - 8002e50: 2180 movs r1, #128 ; 0x80 - 8002e52: 400b ands r3, r1 - 8002e54: 431a orrs r2, r3 - 8002e56: 0011 movs r1, r2 - 8002e58: 687b ldr r3, [r7, #4] - 8002e5a: 6a9a ldr r2, [r3, #40] ; 0x28 - 8002e5c: 2380 movs r3, #128 ; 0x80 - 8002e5e: 019b lsls r3, r3, #6 - 8002e60: 401a ands r2, r3 - 8002e62: 687b ldr r3, [r7, #4] - 8002e64: 681b ldr r3, [r3, #0] - 8002e66: 430a orrs r2, r1 - 8002e68: 601a str r2, [r3, #0] + 8002e90: 687b ldr r3, [r7, #4] + 8002e92: 685a ldr r2, [r3, #4] + 8002e94: 2382 movs r3, #130 ; 0x82 + 8002e96: 005b lsls r3, r3, #1 + 8002e98: 401a ands r2, r3 + 8002e9a: 687b ldr r3, [r7, #4] + 8002e9c: 6899 ldr r1, [r3, #8] + 8002e9e: 2384 movs r3, #132 ; 0x84 + 8002ea0: 021b lsls r3, r3, #8 + 8002ea2: 400b ands r3, r1 + 8002ea4: 431a orrs r2, r3 + 8002ea6: 687b ldr r3, [r7, #4] + 8002ea8: 68d9 ldr r1, [r3, #12] + 8002eaa: 2380 movs r3, #128 ; 0x80 + 8002eac: 011b lsls r3, r3, #4 + 8002eae: 400b ands r3, r1 + 8002eb0: 431a orrs r2, r3 + 8002eb2: 687b ldr r3, [r7, #4] + 8002eb4: 691b ldr r3, [r3, #16] + 8002eb6: 2102 movs r1, #2 + 8002eb8: 400b ands r3, r1 + 8002eba: 431a orrs r2, r3 + 8002ebc: 687b ldr r3, [r7, #4] + 8002ebe: 695b ldr r3, [r3, #20] + 8002ec0: 2101 movs r1, #1 + 8002ec2: 400b ands r3, r1 + 8002ec4: 431a orrs r2, r3 + 8002ec6: 687b ldr r3, [r7, #4] + 8002ec8: 6999 ldr r1, [r3, #24] + 8002eca: 2380 movs r3, #128 ; 0x80 + 8002ecc: 009b lsls r3, r3, #2 + 8002ece: 400b ands r3, r1 + 8002ed0: 431a orrs r2, r3 + 8002ed2: 687b ldr r3, [r7, #4] + 8002ed4: 69db ldr r3, [r3, #28] + 8002ed6: 2138 movs r1, #56 ; 0x38 + 8002ed8: 400b ands r3, r1 + 8002eda: 431a orrs r2, r3 + 8002edc: 687b ldr r3, [r7, #4] + 8002ede: 6a1b ldr r3, [r3, #32] + 8002ee0: 2180 movs r1, #128 ; 0x80 + 8002ee2: 400b ands r3, r1 + 8002ee4: 431a orrs r2, r3 + 8002ee6: 0011 movs r1, r2 + 8002ee8: 687b ldr r3, [r7, #4] + 8002eea: 6a9a ldr r2, [r3, #40] ; 0x28 + 8002eec: 2380 movs r3, #128 ; 0x80 + 8002eee: 019b lsls r3, r3, #6 + 8002ef0: 401a ands r2, r3 + 8002ef2: 687b ldr r3, [r7, #4] + 8002ef4: 681b ldr r3, [r3, #0] + 8002ef6: 430a orrs r2, r1 + 8002ef8: 601a str r2, [r3, #0] (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) | (hspi->Init.FirstBit & SPI_CR1_LSBFIRST) | (hspi->Init.CRCCalculation & SPI_CR1_CRCEN))); /* Configure : NSS management, TI Mode */ WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | (hspi->Init.TIMode & SPI_CR2_FRF))); - 8002e6a: 687b ldr r3, [r7, #4] - 8002e6c: 699b ldr r3, [r3, #24] - 8002e6e: 0c1b lsrs r3, r3, #16 - 8002e70: 2204 movs r2, #4 - 8002e72: 4013 ands r3, r2 - 8002e74: 0019 movs r1, r3 - 8002e76: 687b ldr r3, [r7, #4] - 8002e78: 6a5b ldr r3, [r3, #36] ; 0x24 - 8002e7a: 2210 movs r2, #16 - 8002e7c: 401a ands r2, r3 - 8002e7e: 687b ldr r3, [r7, #4] - 8002e80: 681b ldr r3, [r3, #0] - 8002e82: 430a orrs r2, r1 - 8002e84: 605a str r2, [r3, #4] + 8002efa: 687b ldr r3, [r7, #4] + 8002efc: 699b ldr r3, [r3, #24] + 8002efe: 0c1b lsrs r3, r3, #16 + 8002f00: 2204 movs r2, #4 + 8002f02: 4013 ands r3, r2 + 8002f04: 0019 movs r1, r3 + 8002f06: 687b ldr r3, [r7, #4] + 8002f08: 6a5b ldr r3, [r3, #36] ; 0x24 + 8002f0a: 2210 movs r2, #16 + 8002f0c: 401a ands r2, r3 + 8002f0e: 687b ldr r3, [r7, #4] + 8002f10: 681b ldr r3, [r3, #0] + 8002f12: 430a orrs r2, r1 + 8002f14: 605a str r2, [r3, #4] } #endif /* USE_SPI_CRC */ #if defined(SPI_I2SCFGR_I2SMOD) /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */ CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD); - 8002e86: 687b ldr r3, [r7, #4] - 8002e88: 681b ldr r3, [r3, #0] - 8002e8a: 69da ldr r2, [r3, #28] - 8002e8c: 687b ldr r3, [r7, #4] - 8002e8e: 681b ldr r3, [r3, #0] - 8002e90: 4907 ldr r1, [pc, #28] ; (8002eb0 ) - 8002e92: 400a ands r2, r1 - 8002e94: 61da str r2, [r3, #28] + 8002f16: 687b ldr r3, [r7, #4] + 8002f18: 681b ldr r3, [r3, #0] + 8002f1a: 69da ldr r2, [r3, #28] + 8002f1c: 687b ldr r3, [r7, #4] + 8002f1e: 681b ldr r3, [r3, #0] + 8002f20: 4907 ldr r1, [pc, #28] ; (8002f40 ) + 8002f22: 400a ands r2, r1 + 8002f24: 61da str r2, [r3, #28] #endif /* SPI_I2SCFGR_I2SMOD */ hspi->ErrorCode = HAL_SPI_ERROR_NONE; - 8002e96: 687b ldr r3, [r7, #4] - 8002e98: 2200 movs r2, #0 - 8002e9a: 655a str r2, [r3, #84] ; 0x54 + 8002f26: 687b ldr r3, [r7, #4] + 8002f28: 2200 movs r2, #0 + 8002f2a: 655a str r2, [r3, #84] ; 0x54 hspi->State = HAL_SPI_STATE_READY; - 8002e9c: 687b ldr r3, [r7, #4] - 8002e9e: 2251 movs r2, #81 ; 0x51 - 8002ea0: 2101 movs r1, #1 - 8002ea2: 5499 strb r1, [r3, r2] + 8002f2c: 687b ldr r3, [r7, #4] + 8002f2e: 2251 movs r2, #81 ; 0x51 + 8002f30: 2101 movs r1, #1 + 8002f32: 5499 strb r1, [r3, r2] return HAL_OK; - 8002ea4: 2300 movs r3, #0 + 8002f34: 2300 movs r3, #0 } - 8002ea6: 0018 movs r0, r3 - 8002ea8: 46bd mov sp, r7 - 8002eaa: b002 add sp, #8 - 8002eac: bd80 pop {r7, pc} - 8002eae: 46c0 nop ; (mov r8, r8) - 8002eb0: fffff7ff .word 0xfffff7ff + 8002f36: 0018 movs r0, r3 + 8002f38: 46bd mov sp, r7 + 8002f3a: b002 add sp, #8 + 8002f3c: bd80 pop {r7, pc} + 8002f3e: 46c0 nop ; (mov r8, r8) + 8002f40: fffff7ff .word 0xfffff7ff -08002eb4 : +08002f44 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { - 8002eb4: b580 push {r7, lr} - 8002eb6: b082 sub sp, #8 - 8002eb8: af00 add r7, sp, #0 - 8002eba: 6078 str r0, [r7, #4] + 8002f44: b580 push {r7, lr} + 8002f46: b082 sub sp, #8 + 8002f48: af00 add r7, sp, #0 + 8002f4a: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) - 8002ebc: 687b ldr r3, [r7, #4] - 8002ebe: 2b00 cmp r3, #0 - 8002ec0: d101 bne.n 8002ec6 + 8002f4c: 687b ldr r3, [r7, #4] + 8002f4e: 2b00 cmp r3, #0 + 8002f50: d101 bne.n 8002f56 { return HAL_ERROR; - 8002ec2: 2301 movs r3, #1 - 8002ec4: e032 b.n 8002f2c + 8002f52: 2301 movs r3, #1 + 8002f54: e032 b.n 8002fbc assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim->Init.Period)); assert_param(IS_TIM_PRESCALER(htim->Init.Prescaler)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) - 8002ec6: 687b ldr r3, [r7, #4] - 8002ec8: 2239 movs r2, #57 ; 0x39 - 8002eca: 5c9b ldrb r3, [r3, r2] - 8002ecc: b2db uxtb r3, r3 - 8002ece: 2b00 cmp r3, #0 - 8002ed0: d107 bne.n 8002ee2 + 8002f56: 687b ldr r3, [r7, #4] + 8002f58: 2239 movs r2, #57 ; 0x39 + 8002f5a: 5c9b ldrb r3, [r3, r2] + 8002f5c: b2db uxtb r3, r3 + 8002f5e: 2b00 cmp r3, #0 + 8002f60: d107 bne.n 8002f72 { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; - 8002ed2: 687b ldr r3, [r7, #4] - 8002ed4: 2238 movs r2, #56 ; 0x38 - 8002ed6: 2100 movs r1, #0 - 8002ed8: 5499 strb r1, [r3, r2] + 8002f62: 687b ldr r3, [r7, #4] + 8002f64: 2238 movs r2, #56 ; 0x38 + 8002f66: 2100 movs r1, #0 + 8002f68: 5499 strb r1, [r3, r2] } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); - 8002eda: 687b ldr r3, [r7, #4] - 8002edc: 0018 movs r0, r3 - 8002ede: f7fe f869 bl 8000fb4 + 8002f6a: 687b ldr r3, [r7, #4] + 8002f6c: 0018 movs r0, r3 + 8002f6e: f7fe f869 bl 8001044 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; - 8002ee2: 687b ldr r3, [r7, #4] - 8002ee4: 2239 movs r2, #57 ; 0x39 - 8002ee6: 2102 movs r1, #2 - 8002ee8: 5499 strb r1, [r3, r2] + 8002f72: 687b ldr r3, [r7, #4] + 8002f74: 2239 movs r2, #57 ; 0x39 + 8002f76: 2102 movs r1, #2 + 8002f78: 5499 strb r1, [r3, r2] /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); - 8002eea: 687b ldr r3, [r7, #4] - 8002eec: 681a ldr r2, [r3, #0] - 8002eee: 687b ldr r3, [r7, #4] - 8002ef0: 3304 adds r3, #4 - 8002ef2: 0019 movs r1, r3 - 8002ef4: 0010 movs r0, r2 - 8002ef6: f000 fa01 bl 80032fc + 8002f7a: 687b ldr r3, [r7, #4] + 8002f7c: 681a ldr r2, [r3, #0] + 8002f7e: 687b ldr r3, [r7, #4] + 8002f80: 3304 adds r3, #4 + 8002f82: 0019 movs r1, r3 + 8002f84: 0010 movs r0, r2 + 8002f86: f000 fa01 bl 800338c /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; - 8002efa: 687b ldr r3, [r7, #4] - 8002efc: 223e movs r2, #62 ; 0x3e - 8002efe: 2101 movs r1, #1 - 8002f00: 5499 strb r1, [r3, r2] + 8002f8a: 687b ldr r3, [r7, #4] + 8002f8c: 223e movs r2, #62 ; 0x3e + 8002f8e: 2101 movs r1, #1 + 8002f90: 5499 strb r1, [r3, r2] /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); - 8002f02: 687b ldr r3, [r7, #4] - 8002f04: 223a movs r2, #58 ; 0x3a - 8002f06: 2101 movs r1, #1 - 8002f08: 5499 strb r1, [r3, r2] - 8002f0a: 687b ldr r3, [r7, #4] - 8002f0c: 223b movs r2, #59 ; 0x3b - 8002f0e: 2101 movs r1, #1 - 8002f10: 5499 strb r1, [r3, r2] - 8002f12: 687b ldr r3, [r7, #4] - 8002f14: 223c movs r2, #60 ; 0x3c - 8002f16: 2101 movs r1, #1 - 8002f18: 5499 strb r1, [r3, r2] - 8002f1a: 687b ldr r3, [r7, #4] - 8002f1c: 223d movs r2, #61 ; 0x3d - 8002f1e: 2101 movs r1, #1 - 8002f20: 5499 strb r1, [r3, r2] + 8002f92: 687b ldr r3, [r7, #4] + 8002f94: 223a movs r2, #58 ; 0x3a + 8002f96: 2101 movs r1, #1 + 8002f98: 5499 strb r1, [r3, r2] + 8002f9a: 687b ldr r3, [r7, #4] + 8002f9c: 223b movs r2, #59 ; 0x3b + 8002f9e: 2101 movs r1, #1 + 8002fa0: 5499 strb r1, [r3, r2] + 8002fa2: 687b ldr r3, [r7, #4] + 8002fa4: 223c movs r2, #60 ; 0x3c + 8002fa6: 2101 movs r1, #1 + 8002fa8: 5499 strb r1, [r3, r2] + 8002faa: 687b ldr r3, [r7, #4] + 8002fac: 223d movs r2, #61 ; 0x3d + 8002fae: 2101 movs r1, #1 + 8002fb0: 5499 strb r1, [r3, r2] /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; - 8002f22: 687b ldr r3, [r7, #4] - 8002f24: 2239 movs r2, #57 ; 0x39 - 8002f26: 2101 movs r1, #1 - 8002f28: 5499 strb r1, [r3, r2] + 8002fb2: 687b ldr r3, [r7, #4] + 8002fb4: 2239 movs r2, #57 ; 0x39 + 8002fb6: 2101 movs r1, #1 + 8002fb8: 5499 strb r1, [r3, r2] return HAL_OK; - 8002f2a: 2300 movs r3, #0 + 8002fba: 2300 movs r3, #0 } - 8002f2c: 0018 movs r0, r3 - 8002f2e: 46bd mov sp, r7 - 8002f30: b002 add sp, #8 - 8002f32: bd80 pop {r7, pc} + 8002fbc: 0018 movs r0, r3 + 8002fbe: 46bd mov sp, r7 + 8002fc0: b002 add sp, #8 + 8002fc2: bd80 pop {r7, pc} -08002f34 : +08002fc4 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { - 8002f34: b580 push {r7, lr} - 8002f36: b082 sub sp, #8 - 8002f38: af00 add r7, sp, #0 - 8002f3a: 6078 str r0, [r7, #4] + 8002fc4: b580 push {r7, lr} + 8002fc6: b082 sub sp, #8 + 8002fc8: af00 add r7, sp, #0 + 8002fca: 6078 str r0, [r7, #4] /* Capture compare 1 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET) - 8002f3c: 687b ldr r3, [r7, #4] - 8002f3e: 681b ldr r3, [r3, #0] - 8002f40: 691b ldr r3, [r3, #16] - 8002f42: 2202 movs r2, #2 - 8002f44: 4013 ands r3, r2 - 8002f46: 2b02 cmp r3, #2 - 8002f48: d124 bne.n 8002f94 + 8002fcc: 687b ldr r3, [r7, #4] + 8002fce: 681b ldr r3, [r3, #0] + 8002fd0: 691b ldr r3, [r3, #16] + 8002fd2: 2202 movs r2, #2 + 8002fd4: 4013 ands r3, r2 + 8002fd6: 2b02 cmp r3, #2 + 8002fd8: d124 bne.n 8003024 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET) - 8002f4a: 687b ldr r3, [r7, #4] - 8002f4c: 681b ldr r3, [r3, #0] - 8002f4e: 68db ldr r3, [r3, #12] - 8002f50: 2202 movs r2, #2 - 8002f52: 4013 ands r3, r2 - 8002f54: 2b02 cmp r3, #2 - 8002f56: d11d bne.n 8002f94 + 8002fda: 687b ldr r3, [r7, #4] + 8002fdc: 681b ldr r3, [r3, #0] + 8002fde: 68db ldr r3, [r3, #12] + 8002fe0: 2202 movs r2, #2 + 8002fe2: 4013 ands r3, r2 + 8002fe4: 2b02 cmp r3, #2 + 8002fe6: d11d bne.n 8003024 { { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1); - 8002f58: 687b ldr r3, [r7, #4] - 8002f5a: 681b ldr r3, [r3, #0] - 8002f5c: 2203 movs r2, #3 - 8002f5e: 4252 negs r2, r2 - 8002f60: 611a str r2, [r3, #16] + 8002fe8: 687b ldr r3, [r7, #4] + 8002fea: 681b ldr r3, [r3, #0] + 8002fec: 2203 movs r2, #3 + 8002fee: 4252 negs r2, r2 + 8002ff0: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; - 8002f62: 687b ldr r3, [r7, #4] - 8002f64: 2201 movs r2, #1 - 8002f66: 761a strb r2, [r3, #24] + 8002ff2: 687b ldr r3, [r7, #4] + 8002ff4: 2201 movs r2, #1 + 8002ff6: 761a strb r2, [r3, #24] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) - 8002f68: 687b ldr r3, [r7, #4] - 8002f6a: 681b ldr r3, [r3, #0] - 8002f6c: 699b ldr r3, [r3, #24] - 8002f6e: 2203 movs r2, #3 - 8002f70: 4013 ands r3, r2 - 8002f72: d004 beq.n 8002f7e + 8002ff8: 687b ldr r3, [r7, #4] + 8002ffa: 681b ldr r3, [r3, #0] + 8002ffc: 699b ldr r3, [r3, #24] + 8002ffe: 2203 movs r2, #3 + 8003000: 4013 ands r3, r2 + 8003002: d004 beq.n 800300e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8002f74: 687b ldr r3, [r7, #4] - 8002f76: 0018 movs r0, r3 - 8002f78: f000 f9a8 bl 80032cc - 8002f7c: e007 b.n 8002f8e + 8003004: 687b ldr r3, [r7, #4] + 8003006: 0018 movs r0, r3 + 8003008: f000 f9a8 bl 800335c + 800300c: e007 b.n 800301e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8002f7e: 687b ldr r3, [r7, #4] - 8002f80: 0018 movs r0, r3 - 8002f82: f000 f99b bl 80032bc + 800300e: 687b ldr r3, [r7, #4] + 8003010: 0018 movs r0, r3 + 8003012: f000 f99b bl 800334c HAL_TIM_PWM_PulseFinishedCallback(htim); - 8002f86: 687b ldr r3, [r7, #4] - 8002f88: 0018 movs r0, r3 - 8002f8a: f000 f9a7 bl 80032dc + 8003016: 687b ldr r3, [r7, #4] + 8003018: 0018 movs r0, r3 + 800301a: f000 f9a7 bl 800336c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8002f8e: 687b ldr r3, [r7, #4] - 8002f90: 2200 movs r2, #0 - 8002f92: 761a strb r2, [r3, #24] + 800301e: 687b ldr r3, [r7, #4] + 8003020: 2200 movs r2, #0 + 8003022: 761a strb r2, [r3, #24] } } } /* Capture compare 2 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET) - 8002f94: 687b ldr r3, [r7, #4] - 8002f96: 681b ldr r3, [r3, #0] - 8002f98: 691b ldr r3, [r3, #16] - 8002f9a: 2204 movs r2, #4 - 8002f9c: 4013 ands r3, r2 - 8002f9e: 2b04 cmp r3, #4 - 8002fa0: d125 bne.n 8002fee + 8003024: 687b ldr r3, [r7, #4] + 8003026: 681b ldr r3, [r3, #0] + 8003028: 691b ldr r3, [r3, #16] + 800302a: 2204 movs r2, #4 + 800302c: 4013 ands r3, r2 + 800302e: 2b04 cmp r3, #4 + 8003030: d125 bne.n 800307e { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET) - 8002fa2: 687b ldr r3, [r7, #4] - 8002fa4: 681b ldr r3, [r3, #0] - 8002fa6: 68db ldr r3, [r3, #12] - 8002fa8: 2204 movs r2, #4 - 8002faa: 4013 ands r3, r2 - 8002fac: 2b04 cmp r3, #4 - 8002fae: d11e bne.n 8002fee + 8003032: 687b ldr r3, [r7, #4] + 8003034: 681b ldr r3, [r3, #0] + 8003036: 68db ldr r3, [r3, #12] + 8003038: 2204 movs r2, #4 + 800303a: 4013 ands r3, r2 + 800303c: 2b04 cmp r3, #4 + 800303e: d11e bne.n 800307e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2); - 8002fb0: 687b ldr r3, [r7, #4] - 8002fb2: 681b ldr r3, [r3, #0] - 8002fb4: 2205 movs r2, #5 - 8002fb6: 4252 negs r2, r2 - 8002fb8: 611a str r2, [r3, #16] + 8003040: 687b ldr r3, [r7, #4] + 8003042: 681b ldr r3, [r3, #0] + 8003044: 2205 movs r2, #5 + 8003046: 4252 negs r2, r2 + 8003048: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; - 8002fba: 687b ldr r3, [r7, #4] - 8002fbc: 2202 movs r2, #2 - 8002fbe: 761a strb r2, [r3, #24] + 800304a: 687b ldr r3, [r7, #4] + 800304c: 2202 movs r2, #2 + 800304e: 761a strb r2, [r3, #24] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) - 8002fc0: 687b ldr r3, [r7, #4] - 8002fc2: 681b ldr r3, [r3, #0] - 8002fc4: 699a ldr r2, [r3, #24] - 8002fc6: 23c0 movs r3, #192 ; 0xc0 - 8002fc8: 009b lsls r3, r3, #2 - 8002fca: 4013 ands r3, r2 - 8002fcc: d004 beq.n 8002fd8 + 8003050: 687b ldr r3, [r7, #4] + 8003052: 681b ldr r3, [r3, #0] + 8003054: 699a ldr r2, [r3, #24] + 8003056: 23c0 movs r3, #192 ; 0xc0 + 8003058: 009b lsls r3, r3, #2 + 800305a: 4013 ands r3, r2 + 800305c: d004 beq.n 8003068 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8002fce: 687b ldr r3, [r7, #4] - 8002fd0: 0018 movs r0, r3 - 8002fd2: f000 f97b bl 80032cc - 8002fd6: e007 b.n 8002fe8 + 800305e: 687b ldr r3, [r7, #4] + 8003060: 0018 movs r0, r3 + 8003062: f000 f97b bl 800335c + 8003066: e007 b.n 8003078 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8002fd8: 687b ldr r3, [r7, #4] - 8002fda: 0018 movs r0, r3 - 8002fdc: f000 f96e bl 80032bc + 8003068: 687b ldr r3, [r7, #4] + 800306a: 0018 movs r0, r3 + 800306c: f000 f96e bl 800334c HAL_TIM_PWM_PulseFinishedCallback(htim); - 8002fe0: 687b ldr r3, [r7, #4] - 8002fe2: 0018 movs r0, r3 - 8002fe4: f000 f97a bl 80032dc + 8003070: 687b ldr r3, [r7, #4] + 8003072: 0018 movs r0, r3 + 8003074: f000 f97a bl 800336c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8002fe8: 687b ldr r3, [r7, #4] - 8002fea: 2200 movs r2, #0 - 8002fec: 761a strb r2, [r3, #24] + 8003078: 687b ldr r3, [r7, #4] + 800307a: 2200 movs r2, #0 + 800307c: 761a strb r2, [r3, #24] } } /* Capture compare 3 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET) - 8002fee: 687b ldr r3, [r7, #4] - 8002ff0: 681b ldr r3, [r3, #0] - 8002ff2: 691b ldr r3, [r3, #16] - 8002ff4: 2208 movs r2, #8 - 8002ff6: 4013 ands r3, r2 - 8002ff8: 2b08 cmp r3, #8 - 8002ffa: d124 bne.n 8003046 + 800307e: 687b ldr r3, [r7, #4] + 8003080: 681b ldr r3, [r3, #0] + 8003082: 691b ldr r3, [r3, #16] + 8003084: 2208 movs r2, #8 + 8003086: 4013 ands r3, r2 + 8003088: 2b08 cmp r3, #8 + 800308a: d124 bne.n 80030d6 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET) - 8002ffc: 687b ldr r3, [r7, #4] - 8002ffe: 681b ldr r3, [r3, #0] - 8003000: 68db ldr r3, [r3, #12] - 8003002: 2208 movs r2, #8 - 8003004: 4013 ands r3, r2 - 8003006: 2b08 cmp r3, #8 - 8003008: d11d bne.n 8003046 + 800308c: 687b ldr r3, [r7, #4] + 800308e: 681b ldr r3, [r3, #0] + 8003090: 68db ldr r3, [r3, #12] + 8003092: 2208 movs r2, #8 + 8003094: 4013 ands r3, r2 + 8003096: 2b08 cmp r3, #8 + 8003098: d11d bne.n 80030d6 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3); - 800300a: 687b ldr r3, [r7, #4] - 800300c: 681b ldr r3, [r3, #0] - 800300e: 2209 movs r2, #9 - 8003010: 4252 negs r2, r2 - 8003012: 611a str r2, [r3, #16] + 800309a: 687b ldr r3, [r7, #4] + 800309c: 681b ldr r3, [r3, #0] + 800309e: 2209 movs r2, #9 + 80030a0: 4252 negs r2, r2 + 80030a2: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; - 8003014: 687b ldr r3, [r7, #4] - 8003016: 2204 movs r2, #4 - 8003018: 761a strb r2, [r3, #24] + 80030a4: 687b ldr r3, [r7, #4] + 80030a6: 2204 movs r2, #4 + 80030a8: 761a strb r2, [r3, #24] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) - 800301a: 687b ldr r3, [r7, #4] - 800301c: 681b ldr r3, [r3, #0] - 800301e: 69db ldr r3, [r3, #28] - 8003020: 2203 movs r2, #3 - 8003022: 4013 ands r3, r2 - 8003024: d004 beq.n 8003030 + 80030aa: 687b ldr r3, [r7, #4] + 80030ac: 681b ldr r3, [r3, #0] + 80030ae: 69db ldr r3, [r3, #28] + 80030b0: 2203 movs r2, #3 + 80030b2: 4013 ands r3, r2 + 80030b4: d004 beq.n 80030c0 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8003026: 687b ldr r3, [r7, #4] - 8003028: 0018 movs r0, r3 - 800302a: f000 f94f bl 80032cc - 800302e: e007 b.n 8003040 + 80030b6: 687b ldr r3, [r7, #4] + 80030b8: 0018 movs r0, r3 + 80030ba: f000 f94f bl 800335c + 80030be: e007 b.n 80030d0 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 8003030: 687b ldr r3, [r7, #4] - 8003032: 0018 movs r0, r3 - 8003034: f000 f942 bl 80032bc + 80030c0: 687b ldr r3, [r7, #4] + 80030c2: 0018 movs r0, r3 + 80030c4: f000 f942 bl 800334c HAL_TIM_PWM_PulseFinishedCallback(htim); - 8003038: 687b ldr r3, [r7, #4] - 800303a: 0018 movs r0, r3 - 800303c: f000 f94e bl 80032dc + 80030c8: 687b ldr r3, [r7, #4] + 80030ca: 0018 movs r0, r3 + 80030cc: f000 f94e bl 800336c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 8003040: 687b ldr r3, [r7, #4] - 8003042: 2200 movs r2, #0 - 8003044: 761a strb r2, [r3, #24] + 80030d0: 687b ldr r3, [r7, #4] + 80030d2: 2200 movs r2, #0 + 80030d4: 761a strb r2, [r3, #24] } } /* Capture compare 4 event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET) - 8003046: 687b ldr r3, [r7, #4] - 8003048: 681b ldr r3, [r3, #0] - 800304a: 691b ldr r3, [r3, #16] - 800304c: 2210 movs r2, #16 - 800304e: 4013 ands r3, r2 - 8003050: 2b10 cmp r3, #16 - 8003052: d125 bne.n 80030a0 + 80030d6: 687b ldr r3, [r7, #4] + 80030d8: 681b ldr r3, [r3, #0] + 80030da: 691b ldr r3, [r3, #16] + 80030dc: 2210 movs r2, #16 + 80030de: 4013 ands r3, r2 + 80030e0: 2b10 cmp r3, #16 + 80030e2: d125 bne.n 8003130 { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET) - 8003054: 687b ldr r3, [r7, #4] - 8003056: 681b ldr r3, [r3, #0] - 8003058: 68db ldr r3, [r3, #12] - 800305a: 2210 movs r2, #16 - 800305c: 4013 ands r3, r2 - 800305e: 2b10 cmp r3, #16 - 8003060: d11e bne.n 80030a0 + 80030e4: 687b ldr r3, [r7, #4] + 80030e6: 681b ldr r3, [r3, #0] + 80030e8: 68db ldr r3, [r3, #12] + 80030ea: 2210 movs r2, #16 + 80030ec: 4013 ands r3, r2 + 80030ee: 2b10 cmp r3, #16 + 80030f0: d11e bne.n 8003130 { __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4); - 8003062: 687b ldr r3, [r7, #4] - 8003064: 681b ldr r3, [r3, #0] - 8003066: 2211 movs r2, #17 - 8003068: 4252 negs r2, r2 - 800306a: 611a str r2, [r3, #16] + 80030f2: 687b ldr r3, [r7, #4] + 80030f4: 681b ldr r3, [r3, #0] + 80030f6: 2211 movs r2, #17 + 80030f8: 4252 negs r2, r2 + 80030fa: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; - 800306c: 687b ldr r3, [r7, #4] - 800306e: 2208 movs r2, #8 - 8003070: 761a strb r2, [r3, #24] + 80030fc: 687b ldr r3, [r7, #4] + 80030fe: 2208 movs r2, #8 + 8003100: 761a strb r2, [r3, #24] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) - 8003072: 687b ldr r3, [r7, #4] - 8003074: 681b ldr r3, [r3, #0] - 8003076: 69da ldr r2, [r3, #28] - 8003078: 23c0 movs r3, #192 ; 0xc0 - 800307a: 009b lsls r3, r3, #2 - 800307c: 4013 ands r3, r2 - 800307e: d004 beq.n 800308a + 8003102: 687b ldr r3, [r7, #4] + 8003104: 681b ldr r3, [r3, #0] + 8003106: 69da ldr r2, [r3, #28] + 8003108: 23c0 movs r3, #192 ; 0xc0 + 800310a: 009b lsls r3, r3, #2 + 800310c: 4013 ands r3, r2 + 800310e: d004 beq.n 800311a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); - 8003080: 687b ldr r3, [r7, #4] - 8003082: 0018 movs r0, r3 - 8003084: f000 f922 bl 80032cc - 8003088: e007 b.n 800309a + 8003110: 687b ldr r3, [r7, #4] + 8003112: 0018 movs r0, r3 + 8003114: f000 f922 bl 800335c + 8003118: e007 b.n 800312a { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); - 800308a: 687b ldr r3, [r7, #4] - 800308c: 0018 movs r0, r3 - 800308e: f000 f915 bl 80032bc + 800311a: 687b ldr r3, [r7, #4] + 800311c: 0018 movs r0, r3 + 800311e: f000 f915 bl 800334c HAL_TIM_PWM_PulseFinishedCallback(htim); - 8003092: 687b ldr r3, [r7, #4] - 8003094: 0018 movs r0, r3 - 8003096: f000 f921 bl 80032dc + 8003122: 687b ldr r3, [r7, #4] + 8003124: 0018 movs r0, r3 + 8003126: f000 f921 bl 800336c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; - 800309a: 687b ldr r3, [r7, #4] - 800309c: 2200 movs r2, #0 - 800309e: 761a strb r2, [r3, #24] + 800312a: 687b ldr r3, [r7, #4] + 800312c: 2200 movs r2, #0 + 800312e: 761a strb r2, [r3, #24] } } /* TIM Update event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET) - 80030a0: 687b ldr r3, [r7, #4] - 80030a2: 681b ldr r3, [r3, #0] - 80030a4: 691b ldr r3, [r3, #16] - 80030a6: 2201 movs r2, #1 - 80030a8: 4013 ands r3, r2 - 80030aa: 2b01 cmp r3, #1 - 80030ac: d10f bne.n 80030ce + 8003130: 687b ldr r3, [r7, #4] + 8003132: 681b ldr r3, [r3, #0] + 8003134: 691b ldr r3, [r3, #16] + 8003136: 2201 movs r2, #1 + 8003138: 4013 ands r3, r2 + 800313a: 2b01 cmp r3, #1 + 800313c: d10f bne.n 800315e { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET) - 80030ae: 687b ldr r3, [r7, #4] - 80030b0: 681b ldr r3, [r3, #0] - 80030b2: 68db ldr r3, [r3, #12] - 80030b4: 2201 movs r2, #1 - 80030b6: 4013 ands r3, r2 - 80030b8: 2b01 cmp r3, #1 - 80030ba: d108 bne.n 80030ce + 800313e: 687b ldr r3, [r7, #4] + 8003140: 681b ldr r3, [r3, #0] + 8003142: 68db ldr r3, [r3, #12] + 8003144: 2201 movs r2, #1 + 8003146: 4013 ands r3, r2 + 8003148: 2b01 cmp r3, #1 + 800314a: d108 bne.n 800315e { __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE); - 80030bc: 687b ldr r3, [r7, #4] - 80030be: 681b ldr r3, [r3, #0] - 80030c0: 2202 movs r2, #2 - 80030c2: 4252 negs r2, r2 - 80030c4: 611a str r2, [r3, #16] + 800314c: 687b ldr r3, [r7, #4] + 800314e: 681b ldr r3, [r3, #0] + 8003150: 2202 movs r2, #2 + 8003152: 4252 negs r2, r2 + 8003154: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); - 80030c6: 687b ldr r3, [r7, #4] - 80030c8: 0018 movs r0, r3 - 80030ca: f000 f8ef bl 80032ac + 8003156: 687b ldr r3, [r7, #4] + 8003158: 0018 movs r0, r3 + 800315a: f000 f8ef bl 800333c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET) - 80030ce: 687b ldr r3, [r7, #4] - 80030d0: 681b ldr r3, [r3, #0] - 80030d2: 691b ldr r3, [r3, #16] - 80030d4: 2240 movs r2, #64 ; 0x40 - 80030d6: 4013 ands r3, r2 - 80030d8: 2b40 cmp r3, #64 ; 0x40 - 80030da: d10f bne.n 80030fc + 800315e: 687b ldr r3, [r7, #4] + 8003160: 681b ldr r3, [r3, #0] + 8003162: 691b ldr r3, [r3, #16] + 8003164: 2240 movs r2, #64 ; 0x40 + 8003166: 4013 ands r3, r2 + 8003168: 2b40 cmp r3, #64 ; 0x40 + 800316a: d10f bne.n 800318c { if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET) - 80030dc: 687b ldr r3, [r7, #4] - 80030de: 681b ldr r3, [r3, #0] - 80030e0: 68db ldr r3, [r3, #12] - 80030e2: 2240 movs r2, #64 ; 0x40 - 80030e4: 4013 ands r3, r2 - 80030e6: 2b40 cmp r3, #64 ; 0x40 - 80030e8: d108 bne.n 80030fc + 800316c: 687b ldr r3, [r7, #4] + 800316e: 681b ldr r3, [r3, #0] + 8003170: 68db ldr r3, [r3, #12] + 8003172: 2240 movs r2, #64 ; 0x40 + 8003174: 4013 ands r3, r2 + 8003176: 2b40 cmp r3, #64 ; 0x40 + 8003178: d108 bne.n 800318c { __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER); - 80030ea: 687b ldr r3, [r7, #4] - 80030ec: 681b ldr r3, [r3, #0] - 80030ee: 2241 movs r2, #65 ; 0x41 - 80030f0: 4252 negs r2, r2 - 80030f2: 611a str r2, [r3, #16] + 800317a: 687b ldr r3, [r7, #4] + 800317c: 681b ldr r3, [r3, #0] + 800317e: 2241 movs r2, #65 ; 0x41 + 8003180: 4252 negs r2, r2 + 8003182: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); - 80030f4: 687b ldr r3, [r7, #4] - 80030f6: 0018 movs r0, r3 - 80030f8: f000 f8f8 bl 80032ec + 8003184: 687b ldr r3, [r7, #4] + 8003186: 0018 movs r0, r3 + 8003188: f000 f8f8 bl 800337c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } - 80030fc: 46c0 nop ; (mov r8, r8) - 80030fe: 46bd mov sp, r7 - 8003100: b002 add sp, #8 - 8003102: bd80 pop {r7, pc} + 800318c: 46c0 nop ; (mov r8, r8) + 800318e: 46bd mov sp, r7 + 8003190: b002 add sp, #8 + 8003192: bd80 pop {r7, pc} -08003104 : +08003194 : * @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that * contains the clock source information for the TIM peripheral. * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig) { - 8003104: b580 push {r7, lr} - 8003106: b084 sub sp, #16 - 8003108: af00 add r7, sp, #0 - 800310a: 6078 str r0, [r7, #4] - 800310c: 6039 str r1, [r7, #0] + 8003194: b580 push {r7, lr} + 8003196: b084 sub sp, #16 + 8003198: af00 add r7, sp, #0 + 800319a: 6078 str r0, [r7, #4] + 800319c: 6039 str r1, [r7, #0] HAL_StatusTypeDef status = HAL_OK; - 800310e: 230f movs r3, #15 - 8003110: 18fb adds r3, r7, r3 - 8003112: 2200 movs r2, #0 - 8003114: 701a strb r2, [r3, #0] + 800319e: 230f movs r3, #15 + 80031a0: 18fb adds r3, r7, r3 + 80031a2: 2200 movs r2, #0 + 80031a4: 701a strb r2, [r3, #0] uint32_t tmpsmcr; /* Process Locked */ __HAL_LOCK(htim); - 8003116: 687b ldr r3, [r7, #4] - 8003118: 2238 movs r2, #56 ; 0x38 - 800311a: 5c9b ldrb r3, [r3, r2] - 800311c: 2b01 cmp r3, #1 - 800311e: d101 bne.n 8003124 - 8003120: 2302 movs r3, #2 - 8003122: e0bc b.n 800329e - 8003124: 687b ldr r3, [r7, #4] - 8003126: 2238 movs r2, #56 ; 0x38 - 8003128: 2101 movs r1, #1 - 800312a: 5499 strb r1, [r3, r2] + 80031a6: 687b ldr r3, [r7, #4] + 80031a8: 2238 movs r2, #56 ; 0x38 + 80031aa: 5c9b ldrb r3, [r3, r2] + 80031ac: 2b01 cmp r3, #1 + 80031ae: d101 bne.n 80031b4 + 80031b0: 2302 movs r3, #2 + 80031b2: e0bc b.n 800332e + 80031b4: 687b ldr r3, [r7, #4] + 80031b6: 2238 movs r2, #56 ; 0x38 + 80031b8: 2101 movs r1, #1 + 80031ba: 5499 strb r1, [r3, r2] htim->State = HAL_TIM_STATE_BUSY; - 800312c: 687b ldr r3, [r7, #4] - 800312e: 2239 movs r2, #57 ; 0x39 - 8003130: 2102 movs r1, #2 - 8003132: 5499 strb r1, [r3, r2] + 80031bc: 687b ldr r3, [r7, #4] + 80031be: 2239 movs r2, #57 ; 0x39 + 80031c0: 2102 movs r1, #2 + 80031c2: 5499 strb r1, [r3, r2] /* Check the parameters */ assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource)); /* Reset the SMS, TS, ECE, ETPS and ETRF bits */ tmpsmcr = htim->Instance->SMCR; - 8003134: 687b ldr r3, [r7, #4] - 8003136: 681b ldr r3, [r3, #0] - 8003138: 689b ldr r3, [r3, #8] - 800313a: 60bb str r3, [r7, #8] + 80031c4: 687b ldr r3, [r7, #4] + 80031c6: 681b ldr r3, [r3, #0] + 80031c8: 689b ldr r3, [r3, #8] + 80031ca: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS); - 800313c: 68bb ldr r3, [r7, #8] - 800313e: 2277 movs r2, #119 ; 0x77 - 8003140: 4393 bics r3, r2 - 8003142: 60bb str r3, [r7, #8] + 80031cc: 68bb ldr r3, [r7, #8] + 80031ce: 2277 movs r2, #119 ; 0x77 + 80031d0: 4393 bics r3, r2 + 80031d2: 60bb str r3, [r7, #8] tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 8003144: 68bb ldr r3, [r7, #8] - 8003146: 4a58 ldr r2, [pc, #352] ; (80032a8 ) - 8003148: 4013 ands r3, r2 - 800314a: 60bb str r3, [r7, #8] + 80031d4: 68bb ldr r3, [r7, #8] + 80031d6: 4a58 ldr r2, [pc, #352] ; (8003338 ) + 80031d8: 4013 ands r3, r2 + 80031da: 60bb str r3, [r7, #8] htim->Instance->SMCR = tmpsmcr; - 800314c: 687b ldr r3, [r7, #4] - 800314e: 681b ldr r3, [r3, #0] - 8003150: 68ba ldr r2, [r7, #8] - 8003152: 609a str r2, [r3, #8] + 80031dc: 687b ldr r3, [r7, #4] + 80031de: 681b ldr r3, [r3, #0] + 80031e0: 68ba ldr r2, [r7, #8] + 80031e2: 609a str r2, [r3, #8] switch (sClockSourceConfig->ClockSource) - 8003154: 683b ldr r3, [r7, #0] - 8003156: 681b ldr r3, [r3, #0] - 8003158: 2280 movs r2, #128 ; 0x80 - 800315a: 0192 lsls r2, r2, #6 - 800315c: 4293 cmp r3, r2 - 800315e: d040 beq.n 80031e2 - 8003160: 2280 movs r2, #128 ; 0x80 - 8003162: 0192 lsls r2, r2, #6 - 8003164: 4293 cmp r3, r2 - 8003166: d900 bls.n 800316a - 8003168: e088 b.n 800327c - 800316a: 2280 movs r2, #128 ; 0x80 - 800316c: 0152 lsls r2, r2, #5 - 800316e: 4293 cmp r3, r2 - 8003170: d100 bne.n 8003174 - 8003172: e088 b.n 8003286 - 8003174: 2280 movs r2, #128 ; 0x80 - 8003176: 0152 lsls r2, r2, #5 - 8003178: 4293 cmp r3, r2 - 800317a: d900 bls.n 800317e - 800317c: e07e b.n 800327c - 800317e: 2b70 cmp r3, #112 ; 0x70 - 8003180: d018 beq.n 80031b4 - 8003182: d900 bls.n 8003186 - 8003184: e07a b.n 800327c - 8003186: 2b60 cmp r3, #96 ; 0x60 - 8003188: d04f beq.n 800322a - 800318a: d900 bls.n 800318e - 800318c: e076 b.n 800327c - 800318e: 2b50 cmp r3, #80 ; 0x50 - 8003190: d03b beq.n 800320a - 8003192: d900 bls.n 8003196 - 8003194: e072 b.n 800327c - 8003196: 2b40 cmp r3, #64 ; 0x40 - 8003198: d057 beq.n 800324a - 800319a: d900 bls.n 800319e - 800319c: e06e b.n 800327c - 800319e: 2b30 cmp r3, #48 ; 0x30 - 80031a0: d063 beq.n 800326a - 80031a2: d86b bhi.n 800327c - 80031a4: 2b20 cmp r3, #32 - 80031a6: d060 beq.n 800326a - 80031a8: d868 bhi.n 800327c - 80031aa: 2b00 cmp r3, #0 - 80031ac: d05d beq.n 800326a - 80031ae: 2b10 cmp r3, #16 - 80031b0: d05b beq.n 800326a - 80031b2: e063 b.n 800327c + 80031e4: 683b ldr r3, [r7, #0] + 80031e6: 681b ldr r3, [r3, #0] + 80031e8: 2280 movs r2, #128 ; 0x80 + 80031ea: 0192 lsls r2, r2, #6 + 80031ec: 4293 cmp r3, r2 + 80031ee: d040 beq.n 8003272 + 80031f0: 2280 movs r2, #128 ; 0x80 + 80031f2: 0192 lsls r2, r2, #6 + 80031f4: 4293 cmp r3, r2 + 80031f6: d900 bls.n 80031fa + 80031f8: e088 b.n 800330c + 80031fa: 2280 movs r2, #128 ; 0x80 + 80031fc: 0152 lsls r2, r2, #5 + 80031fe: 4293 cmp r3, r2 + 8003200: d100 bne.n 8003204 + 8003202: e088 b.n 8003316 + 8003204: 2280 movs r2, #128 ; 0x80 + 8003206: 0152 lsls r2, r2, #5 + 8003208: 4293 cmp r3, r2 + 800320a: d900 bls.n 800320e + 800320c: e07e b.n 800330c + 800320e: 2b70 cmp r3, #112 ; 0x70 + 8003210: d018 beq.n 8003244 + 8003212: d900 bls.n 8003216 + 8003214: e07a b.n 800330c + 8003216: 2b60 cmp r3, #96 ; 0x60 + 8003218: d04f beq.n 80032ba + 800321a: d900 bls.n 800321e + 800321c: e076 b.n 800330c + 800321e: 2b50 cmp r3, #80 ; 0x50 + 8003220: d03b beq.n 800329a + 8003222: d900 bls.n 8003226 + 8003224: e072 b.n 800330c + 8003226: 2b40 cmp r3, #64 ; 0x40 + 8003228: d057 beq.n 80032da + 800322a: d900 bls.n 800322e + 800322c: e06e b.n 800330c + 800322e: 2b30 cmp r3, #48 ; 0x30 + 8003230: d063 beq.n 80032fa + 8003232: d86b bhi.n 800330c + 8003234: 2b20 cmp r3, #32 + 8003236: d060 beq.n 80032fa + 8003238: d868 bhi.n 800330c + 800323a: 2b00 cmp r3, #0 + 800323c: d05d beq.n 80032fa + 800323e: 2b10 cmp r3, #16 + 8003240: d05b beq.n 80032fa + 8003242: e063 b.n 800330c assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 80031b4: 687b ldr r3, [r7, #4] - 80031b6: 6818 ldr r0, [r3, #0] + 8003244: 687b ldr r3, [r7, #4] + 8003246: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, - 80031b8: 683b ldr r3, [r7, #0] - 80031ba: 6899 ldr r1, [r3, #8] + 8003248: 683b ldr r3, [r7, #0] + 800324a: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, - 80031bc: 683b ldr r3, [r7, #0] - 80031be: 685a ldr r2, [r3, #4] + 800324c: 683b ldr r3, [r7, #0] + 800324e: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); - 80031c0: 683b ldr r3, [r7, #0] - 80031c2: 68db ldr r3, [r3, #12] + 8003250: 683b ldr r3, [r7, #0] + 8003252: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, - 80031c4: f000 f968 bl 8003498 + 8003254: f000 f968 bl 8003528 /* Select the External clock mode1 and the ETRF trigger */ tmpsmcr = htim->Instance->SMCR; - 80031c8: 687b ldr r3, [r7, #4] - 80031ca: 681b ldr r3, [r3, #0] - 80031cc: 689b ldr r3, [r3, #8] - 80031ce: 60bb str r3, [r7, #8] + 8003258: 687b ldr r3, [r7, #4] + 800325a: 681b ldr r3, [r3, #0] + 800325c: 689b ldr r3, [r3, #8] + 800325e: 60bb str r3, [r7, #8] tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1); - 80031d0: 68bb ldr r3, [r7, #8] - 80031d2: 2277 movs r2, #119 ; 0x77 - 80031d4: 4313 orrs r3, r2 - 80031d6: 60bb str r3, [r7, #8] + 8003260: 68bb ldr r3, [r7, #8] + 8003262: 2277 movs r2, #119 ; 0x77 + 8003264: 4313 orrs r3, r2 + 8003266: 60bb str r3, [r7, #8] /* Write to TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 80031d8: 687b ldr r3, [r7, #4] - 80031da: 681b ldr r3, [r3, #0] - 80031dc: 68ba ldr r2, [r7, #8] - 80031de: 609a str r2, [r3, #8] + 8003268: 687b ldr r3, [r7, #4] + 800326a: 681b ldr r3, [r3, #0] + 800326c: 68ba ldr r2, [r7, #8] + 800326e: 609a str r2, [r3, #8] break; - 80031e0: e052 b.n 8003288 + 8003270: e052 b.n 8003318 assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler)); assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); /* Configure the ETR Clock source */ TIM_ETR_SetConfig(htim->Instance, - 80031e2: 687b ldr r3, [r7, #4] - 80031e4: 6818 ldr r0, [r3, #0] + 8003272: 687b ldr r3, [r7, #4] + 8003274: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPrescaler, - 80031e6: 683b ldr r3, [r7, #0] - 80031e8: 6899 ldr r1, [r3, #8] + 8003276: 683b ldr r3, [r7, #0] + 8003278: 6899 ldr r1, [r3, #8] sClockSourceConfig->ClockPolarity, - 80031ea: 683b ldr r3, [r7, #0] - 80031ec: 685a ldr r2, [r3, #4] + 800327a: 683b ldr r3, [r7, #0] + 800327c: 685a ldr r2, [r3, #4] sClockSourceConfig->ClockFilter); - 80031ee: 683b ldr r3, [r7, #0] - 80031f0: 68db ldr r3, [r3, #12] + 800327e: 683b ldr r3, [r7, #0] + 8003280: 68db ldr r3, [r3, #12] TIM_ETR_SetConfig(htim->Instance, - 80031f2: f000 f951 bl 8003498 + 8003282: f000 f951 bl 8003528 /* Enable the External clock mode2 */ htim->Instance->SMCR |= TIM_SMCR_ECE; - 80031f6: 687b ldr r3, [r7, #4] - 80031f8: 681b ldr r3, [r3, #0] - 80031fa: 689a ldr r2, [r3, #8] - 80031fc: 687b ldr r3, [r7, #4] - 80031fe: 681b ldr r3, [r3, #0] - 8003200: 2180 movs r1, #128 ; 0x80 - 8003202: 01c9 lsls r1, r1, #7 - 8003204: 430a orrs r2, r1 - 8003206: 609a str r2, [r3, #8] + 8003286: 687b ldr r3, [r7, #4] + 8003288: 681b ldr r3, [r3, #0] + 800328a: 689a ldr r2, [r3, #8] + 800328c: 687b ldr r3, [r7, #4] + 800328e: 681b ldr r3, [r3, #0] + 8003290: 2180 movs r1, #128 ; 0x80 + 8003292: 01c9 lsls r1, r1, #7 + 8003294: 430a orrs r2, r1 + 8003296: 609a str r2, [r3, #8] break; - 8003208: e03e b.n 8003288 + 8003298: e03e b.n 8003318 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 800320a: 687b ldr r3, [r7, #4] - 800320c: 6818 ldr r0, [r3, #0] + 800329a: 687b ldr r3, [r7, #4] + 800329c: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 800320e: 683b ldr r3, [r7, #0] - 8003210: 6859 ldr r1, [r3, #4] + 800329e: 683b ldr r3, [r7, #0] + 80032a0: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 8003212: 683b ldr r3, [r7, #0] - 8003214: 68db ldr r3, [r3, #12] + 80032a2: 683b ldr r3, [r7, #0] + 80032a4: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, - 8003216: 001a movs r2, r3 - 8003218: f000 f8c4 bl 80033a4 + 80032a6: 001a movs r2, r3 + 80032a8: f000 f8c4 bl 8003434 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1); - 800321c: 687b ldr r3, [r7, #4] - 800321e: 681b ldr r3, [r3, #0] - 8003220: 2150 movs r1, #80 ; 0x50 - 8003222: 0018 movs r0, r3 - 8003224: f000 f91e bl 8003464 + 80032ac: 687b ldr r3, [r7, #4] + 80032ae: 681b ldr r3, [r3, #0] + 80032b0: 2150 movs r1, #80 ; 0x50 + 80032b2: 0018 movs r0, r3 + 80032b4: f000 f91e bl 80034f4 break; - 8003228: e02e b.n 8003288 + 80032b8: e02e b.n 8003318 /* Check TI2 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI2_ConfigInputStage(htim->Instance, - 800322a: 687b ldr r3, [r7, #4] - 800322c: 6818 ldr r0, [r3, #0] + 80032ba: 687b ldr r3, [r7, #4] + 80032bc: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 800322e: 683b ldr r3, [r7, #0] - 8003230: 6859 ldr r1, [r3, #4] + 80032be: 683b ldr r3, [r7, #0] + 80032c0: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 8003232: 683b ldr r3, [r7, #0] - 8003234: 68db ldr r3, [r3, #12] + 80032c2: 683b ldr r3, [r7, #0] + 80032c4: 68db ldr r3, [r3, #12] TIM_TI2_ConfigInputStage(htim->Instance, - 8003236: 001a movs r2, r3 - 8003238: f000 f8e2 bl 8003400 + 80032c6: 001a movs r2, r3 + 80032c8: f000 f8e2 bl 8003490 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2); - 800323c: 687b ldr r3, [r7, #4] - 800323e: 681b ldr r3, [r3, #0] - 8003240: 2160 movs r1, #96 ; 0x60 - 8003242: 0018 movs r0, r3 - 8003244: f000 f90e bl 8003464 + 80032cc: 687b ldr r3, [r7, #4] + 80032ce: 681b ldr r3, [r3, #0] + 80032d0: 2160 movs r1, #96 ; 0x60 + 80032d2: 0018 movs r0, r3 + 80032d4: f000 f90e bl 80034f4 break; - 8003248: e01e b.n 8003288 + 80032d8: e01e b.n 8003318 /* Check TI1 input conditioning related parameters */ assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter)); TIM_TI1_ConfigInputStage(htim->Instance, - 800324a: 687b ldr r3, [r7, #4] - 800324c: 6818 ldr r0, [r3, #0] + 80032da: 687b ldr r3, [r7, #4] + 80032dc: 6818 ldr r0, [r3, #0] sClockSourceConfig->ClockPolarity, - 800324e: 683b ldr r3, [r7, #0] - 8003250: 6859 ldr r1, [r3, #4] + 80032de: 683b ldr r3, [r7, #0] + 80032e0: 6859 ldr r1, [r3, #4] sClockSourceConfig->ClockFilter); - 8003252: 683b ldr r3, [r7, #0] - 8003254: 68db ldr r3, [r3, #12] + 80032e2: 683b ldr r3, [r7, #0] + 80032e4: 68db ldr r3, [r3, #12] TIM_TI1_ConfigInputStage(htim->Instance, - 8003256: 001a movs r2, r3 - 8003258: f000 f8a4 bl 80033a4 + 80032e6: 001a movs r2, r3 + 80032e8: f000 f8a4 bl 8003434 TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED); - 800325c: 687b ldr r3, [r7, #4] - 800325e: 681b ldr r3, [r3, #0] - 8003260: 2140 movs r1, #64 ; 0x40 - 8003262: 0018 movs r0, r3 - 8003264: f000 f8fe bl 8003464 + 80032ec: 687b ldr r3, [r7, #4] + 80032ee: 681b ldr r3, [r3, #0] + 80032f0: 2140 movs r1, #64 ; 0x40 + 80032f2: 0018 movs r0, r3 + 80032f4: f000 f8fe bl 80034f4 break; - 8003268: e00e b.n 8003288 + 80032f8: e00e b.n 8003318 case TIM_CLOCKSOURCE_ITR3: { /* Check whether or not the timer instance supports internal trigger input */ assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance)); TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource); - 800326a: 687b ldr r3, [r7, #4] - 800326c: 681a ldr r2, [r3, #0] - 800326e: 683b ldr r3, [r7, #0] - 8003270: 681b ldr r3, [r3, #0] - 8003272: 0019 movs r1, r3 - 8003274: 0010 movs r0, r2 - 8003276: f000 f8f5 bl 8003464 + 80032fa: 687b ldr r3, [r7, #4] + 80032fc: 681a ldr r2, [r3, #0] + 80032fe: 683b ldr r3, [r7, #0] + 8003300: 681b ldr r3, [r3, #0] + 8003302: 0019 movs r1, r3 + 8003304: 0010 movs r0, r2 + 8003306: f000 f8f5 bl 80034f4 break; - 800327a: e005 b.n 8003288 + 800330a: e005 b.n 8003318 } default: status = HAL_ERROR; - 800327c: 230f movs r3, #15 - 800327e: 18fb adds r3, r7, r3 - 8003280: 2201 movs r2, #1 - 8003282: 701a strb r2, [r3, #0] + 800330c: 230f movs r3, #15 + 800330e: 18fb adds r3, r7, r3 + 8003310: 2201 movs r2, #1 + 8003312: 701a strb r2, [r3, #0] break; - 8003284: e000 b.n 8003288 + 8003314: e000 b.n 8003318 break; - 8003286: 46c0 nop ; (mov r8, r8) + 8003316: 46c0 nop ; (mov r8, r8) } htim->State = HAL_TIM_STATE_READY; - 8003288: 687b ldr r3, [r7, #4] - 800328a: 2239 movs r2, #57 ; 0x39 - 800328c: 2101 movs r1, #1 - 800328e: 5499 strb r1, [r3, r2] + 8003318: 687b ldr r3, [r7, #4] + 800331a: 2239 movs r2, #57 ; 0x39 + 800331c: 2101 movs r1, #1 + 800331e: 5499 strb r1, [r3, r2] __HAL_UNLOCK(htim); - 8003290: 687b ldr r3, [r7, #4] - 8003292: 2238 movs r2, #56 ; 0x38 - 8003294: 2100 movs r1, #0 - 8003296: 5499 strb r1, [r3, r2] + 8003320: 687b ldr r3, [r7, #4] + 8003322: 2238 movs r2, #56 ; 0x38 + 8003324: 2100 movs r1, #0 + 8003326: 5499 strb r1, [r3, r2] return status; - 8003298: 230f movs r3, #15 - 800329a: 18fb adds r3, r7, r3 - 800329c: 781b ldrb r3, [r3, #0] + 8003328: 230f movs r3, #15 + 800332a: 18fb adds r3, r7, r3 + 800332c: 781b ldrb r3, [r3, #0] } - 800329e: 0018 movs r0, r3 - 80032a0: 46bd mov sp, r7 - 80032a2: b004 add sp, #16 - 80032a4: bd80 pop {r7, pc} - 80032a6: 46c0 nop ; (mov r8, r8) - 80032a8: ffff00ff .word 0xffff00ff + 800332e: 0018 movs r0, r3 + 8003330: 46bd mov sp, r7 + 8003332: b004 add sp, #16 + 8003334: bd80 pop {r7, pc} + 8003336: 46c0 nop ; (mov r8, r8) + 8003338: ffff00ff .word 0xffff00ff -080032ac : +0800333c : * @brief Period elapsed callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { - 80032ac: b580 push {r7, lr} - 80032ae: b082 sub sp, #8 - 80032b0: af00 add r7, sp, #0 - 80032b2: 6078 str r0, [r7, #4] + 800333c: b580 push {r7, lr} + 800333e: b082 sub sp, #8 + 8003340: af00 add r7, sp, #0 + 8003342: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PeriodElapsedCallback could be implemented in the user file */ } - 80032b4: 46c0 nop ; (mov r8, r8) - 80032b6: 46bd mov sp, r7 - 80032b8: b002 add sp, #8 - 80032ba: bd80 pop {r7, pc} + 8003344: 46c0 nop ; (mov r8, r8) + 8003346: 46bd mov sp, r7 + 8003348: b002 add sp, #8 + 800334a: bd80 pop {r7, pc} -080032bc : +0800334c : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { - 80032bc: b580 push {r7, lr} - 80032be: b082 sub sp, #8 - 80032c0: af00 add r7, sp, #0 - 80032c2: 6078 str r0, [r7, #4] + 800334c: b580 push {r7, lr} + 800334e: b082 sub sp, #8 + 8003350: af00 add r7, sp, #0 + 8003352: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } - 80032c4: 46c0 nop ; (mov r8, r8) - 80032c6: 46bd mov sp, r7 - 80032c8: b002 add sp, #8 - 80032ca: bd80 pop {r7, pc} + 8003354: 46c0 nop ; (mov r8, r8) + 8003356: 46bd mov sp, r7 + 8003358: b002 add sp, #8 + 800335a: bd80 pop {r7, pc} -080032cc : +0800335c : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { - 80032cc: b580 push {r7, lr} - 80032ce: b082 sub sp, #8 - 80032d0: af00 add r7, sp, #0 - 80032d2: 6078 str r0, [r7, #4] + 800335c: b580 push {r7, lr} + 800335e: b082 sub sp, #8 + 8003360: af00 add r7, sp, #0 + 8003362: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } - 80032d4: 46c0 nop ; (mov r8, r8) - 80032d6: 46bd mov sp, r7 - 80032d8: b002 add sp, #8 - 80032da: bd80 pop {r7, pc} + 8003364: 46c0 nop ; (mov r8, r8) + 8003366: 46bd mov sp, r7 + 8003368: b002 add sp, #8 + 800336a: bd80 pop {r7, pc} -080032dc : +0800336c : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { - 80032dc: b580 push {r7, lr} - 80032de: b082 sub sp, #8 - 80032e0: af00 add r7, sp, #0 - 80032e2: 6078 str r0, [r7, #4] + 800336c: b580 push {r7, lr} + 800336e: b082 sub sp, #8 + 8003370: af00 add r7, sp, #0 + 8003372: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } - 80032e4: 46c0 nop ; (mov r8, r8) - 80032e6: 46bd mov sp, r7 - 80032e8: b002 add sp, #8 - 80032ea: bd80 pop {r7, pc} + 8003374: 46c0 nop ; (mov r8, r8) + 8003376: 46bd mov sp, r7 + 8003378: b002 add sp, #8 + 800337a: bd80 pop {r7, pc} -080032ec : +0800337c : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { - 80032ec: b580 push {r7, lr} - 80032ee: b082 sub sp, #8 - 80032f0: af00 add r7, sp, #0 - 80032f2: 6078 str r0, [r7, #4] + 800337c: b580 push {r7, lr} + 800337e: b082 sub sp, #8 + 8003380: af00 add r7, sp, #0 + 8003382: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } - 80032f4: 46c0 nop ; (mov r8, r8) - 80032f6: 46bd mov sp, r7 - 80032f8: b002 add sp, #8 - 80032fa: bd80 pop {r7, pc} + 8003384: 46c0 nop ; (mov r8, r8) + 8003386: 46bd mov sp, r7 + 8003388: b002 add sp, #8 + 800338a: bd80 pop {r7, pc} -080032fc : +0800338c : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ static void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { - 80032fc: b580 push {r7, lr} - 80032fe: b084 sub sp, #16 - 8003300: af00 add r7, sp, #0 - 8003302: 6078 str r0, [r7, #4] - 8003304: 6039 str r1, [r7, #0] + 800338c: b580 push {r7, lr} + 800338e: b084 sub sp, #16 + 8003390: af00 add r7, sp, #0 + 8003392: 6078 str r0, [r7, #4] + 8003394: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; - 8003306: 687b ldr r3, [r7, #4] - 8003308: 681b ldr r3, [r3, #0] - 800330a: 60fb str r3, [r7, #12] + 8003396: 687b ldr r3, [r7, #4] + 8003398: 681b ldr r3, [r3, #0] + 800339a: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) - 800330c: 687a ldr r2, [r7, #4] - 800330e: 2380 movs r3, #128 ; 0x80 - 8003310: 05db lsls r3, r3, #23 - 8003312: 429a cmp r2, r3 - 8003314: d007 beq.n 8003326 - 8003316: 687b ldr r3, [r7, #4] - 8003318: 4a1f ldr r2, [pc, #124] ; (8003398 ) - 800331a: 4293 cmp r3, r2 - 800331c: d003 beq.n 8003326 - 800331e: 687b ldr r3, [r7, #4] - 8003320: 4a1e ldr r2, [pc, #120] ; (800339c ) - 8003322: 4293 cmp r3, r2 - 8003324: d108 bne.n 8003338 + 800339c: 687a ldr r2, [r7, #4] + 800339e: 2380 movs r3, #128 ; 0x80 + 80033a0: 05db lsls r3, r3, #23 + 80033a2: 429a cmp r2, r3 + 80033a4: d007 beq.n 80033b6 + 80033a6: 687b ldr r3, [r7, #4] + 80033a8: 4a1f ldr r2, [pc, #124] ; (8003428 ) + 80033aa: 4293 cmp r3, r2 + 80033ac: d003 beq.n 80033b6 + 80033ae: 687b ldr r3, [r7, #4] + 80033b0: 4a1e ldr r2, [pc, #120] ; (800342c ) + 80033b2: 4293 cmp r3, r2 + 80033b4: d108 bne.n 80033c8 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); - 8003326: 68fb ldr r3, [r7, #12] - 8003328: 2270 movs r2, #112 ; 0x70 - 800332a: 4393 bics r3, r2 - 800332c: 60fb str r3, [r7, #12] + 80033b6: 68fb ldr r3, [r7, #12] + 80033b8: 2270 movs r2, #112 ; 0x70 + 80033ba: 4393 bics r3, r2 + 80033bc: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; - 800332e: 683b ldr r3, [r7, #0] - 8003330: 685b ldr r3, [r3, #4] - 8003332: 68fa ldr r2, [r7, #12] - 8003334: 4313 orrs r3, r2 - 8003336: 60fb str r3, [r7, #12] + 80033be: 683b ldr r3, [r7, #0] + 80033c0: 685b ldr r3, [r3, #4] + 80033c2: 68fa ldr r2, [r7, #12] + 80033c4: 4313 orrs r3, r2 + 80033c6: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) - 8003338: 687a ldr r2, [r7, #4] - 800333a: 2380 movs r3, #128 ; 0x80 - 800333c: 05db lsls r3, r3, #23 - 800333e: 429a cmp r2, r3 - 8003340: d007 beq.n 8003352 - 8003342: 687b ldr r3, [r7, #4] - 8003344: 4a14 ldr r2, [pc, #80] ; (8003398 ) - 8003346: 4293 cmp r3, r2 - 8003348: d003 beq.n 8003352 - 800334a: 687b ldr r3, [r7, #4] - 800334c: 4a13 ldr r2, [pc, #76] ; (800339c ) - 800334e: 4293 cmp r3, r2 - 8003350: d108 bne.n 8003364 + 80033c8: 687a ldr r2, [r7, #4] + 80033ca: 2380 movs r3, #128 ; 0x80 + 80033cc: 05db lsls r3, r3, #23 + 80033ce: 429a cmp r2, r3 + 80033d0: d007 beq.n 80033e2 + 80033d2: 687b ldr r3, [r7, #4] + 80033d4: 4a14 ldr r2, [pc, #80] ; (8003428 ) + 80033d6: 4293 cmp r3, r2 + 80033d8: d003 beq.n 80033e2 + 80033da: 687b ldr r3, [r7, #4] + 80033dc: 4a13 ldr r2, [pc, #76] ; (800342c ) + 80033de: 4293 cmp r3, r2 + 80033e0: d108 bne.n 80033f4 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; - 8003352: 68fb ldr r3, [r7, #12] - 8003354: 4a12 ldr r2, [pc, #72] ; (80033a0 ) - 8003356: 4013 ands r3, r2 - 8003358: 60fb str r3, [r7, #12] + 80033e2: 68fb ldr r3, [r7, #12] + 80033e4: 4a12 ldr r2, [pc, #72] ; (8003430 ) + 80033e6: 4013 ands r3, r2 + 80033e8: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; - 800335a: 683b ldr r3, [r7, #0] - 800335c: 68db ldr r3, [r3, #12] - 800335e: 68fa ldr r2, [r7, #12] - 8003360: 4313 orrs r3, r2 - 8003362: 60fb str r3, [r7, #12] + 80033ea: 683b ldr r3, [r7, #0] + 80033ec: 68db ldr r3, [r3, #12] + 80033ee: 68fa ldr r2, [r7, #12] + 80033f0: 4313 orrs r3, r2 + 80033f2: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); - 8003364: 68fb ldr r3, [r7, #12] - 8003366: 2280 movs r2, #128 ; 0x80 - 8003368: 4393 bics r3, r2 - 800336a: 001a movs r2, r3 - 800336c: 683b ldr r3, [r7, #0] - 800336e: 691b ldr r3, [r3, #16] - 8003370: 4313 orrs r3, r2 - 8003372: 60fb str r3, [r7, #12] + 80033f4: 68fb ldr r3, [r7, #12] + 80033f6: 2280 movs r2, #128 ; 0x80 + 80033f8: 4393 bics r3, r2 + 80033fa: 001a movs r2, r3 + 80033fc: 683b ldr r3, [r7, #0] + 80033fe: 691b ldr r3, [r3, #16] + 8003400: 4313 orrs r3, r2 + 8003402: 60fb str r3, [r7, #12] TIMx->CR1 = tmpcr1; - 8003374: 687b ldr r3, [r7, #4] - 8003376: 68fa ldr r2, [r7, #12] - 8003378: 601a str r2, [r3, #0] + 8003404: 687b ldr r3, [r7, #4] + 8003406: 68fa ldr r2, [r7, #12] + 8003408: 601a str r2, [r3, #0] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; - 800337a: 683b ldr r3, [r7, #0] - 800337c: 689a ldr r2, [r3, #8] - 800337e: 687b ldr r3, [r7, #4] - 8003380: 62da str r2, [r3, #44] ; 0x2c + 800340a: 683b ldr r3, [r7, #0] + 800340c: 689a ldr r2, [r3, #8] + 800340e: 687b ldr r3, [r7, #4] + 8003410: 62da str r2, [r3, #44] ; 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; - 8003382: 683b ldr r3, [r7, #0] - 8003384: 681a ldr r2, [r3, #0] - 8003386: 687b ldr r3, [r7, #4] - 8003388: 629a str r2, [r3, #40] ; 0x28 + 8003412: 683b ldr r3, [r7, #0] + 8003414: 681a ldr r2, [r3, #0] + 8003416: 687b ldr r3, [r7, #4] + 8003418: 629a str r2, [r3, #40] ; 0x28 /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; - 800338a: 687b ldr r3, [r7, #4] - 800338c: 2201 movs r2, #1 - 800338e: 615a str r2, [r3, #20] + 800341a: 687b ldr r3, [r7, #4] + 800341c: 2201 movs r2, #1 + 800341e: 615a str r2, [r3, #20] } - 8003390: 46c0 nop ; (mov r8, r8) - 8003392: 46bd mov sp, r7 - 8003394: b004 add sp, #16 - 8003396: bd80 pop {r7, pc} - 8003398: 40010800 .word 0x40010800 - 800339c: 40011400 .word 0x40011400 - 80033a0: fffffcff .word 0xfffffcff + 8003420: 46c0 nop ; (mov r8, r8) + 8003422: 46bd mov sp, r7 + 8003424: b004 add sp, #16 + 8003426: bd80 pop {r7, pc} + 8003428: 40010800 .word 0x40010800 + 800342c: 40011400 .word 0x40011400 + 8003430: fffffcff .word 0xfffffcff -080033a4 : +08003434 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 80033a4: b580 push {r7, lr} - 80033a6: b086 sub sp, #24 - 80033a8: af00 add r7, sp, #0 - 80033aa: 60f8 str r0, [r7, #12] - 80033ac: 60b9 str r1, [r7, #8] - 80033ae: 607a str r2, [r7, #4] + 8003434: b580 push {r7, lr} + 8003436: b086 sub sp, #24 + 8003438: af00 add r7, sp, #0 + 800343a: 60f8 str r0, [r7, #12] + 800343c: 60b9 str r1, [r7, #8] + 800343e: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 1: Reset the CC1E Bit */ tmpccer = TIMx->CCER; - 80033b0: 68fb ldr r3, [r7, #12] - 80033b2: 6a1b ldr r3, [r3, #32] - 80033b4: 617b str r3, [r7, #20] + 8003440: 68fb ldr r3, [r7, #12] + 8003442: 6a1b ldr r3, [r3, #32] + 8003444: 617b str r3, [r7, #20] TIMx->CCER &= ~TIM_CCER_CC1E; - 80033b6: 68fb ldr r3, [r7, #12] - 80033b8: 6a1b ldr r3, [r3, #32] - 80033ba: 2201 movs r2, #1 - 80033bc: 4393 bics r3, r2 - 80033be: 001a movs r2, r3 - 80033c0: 68fb ldr r3, [r7, #12] - 80033c2: 621a str r2, [r3, #32] + 8003446: 68fb ldr r3, [r7, #12] + 8003448: 6a1b ldr r3, [r3, #32] + 800344a: 2201 movs r2, #1 + 800344c: 4393 bics r3, r2 + 800344e: 001a movs r2, r3 + 8003450: 68fb ldr r3, [r7, #12] + 8003452: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 80033c4: 68fb ldr r3, [r7, #12] - 80033c6: 699b ldr r3, [r3, #24] - 80033c8: 613b str r3, [r7, #16] + 8003454: 68fb ldr r3, [r7, #12] + 8003456: 699b ldr r3, [r3, #24] + 8003458: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC1F; - 80033ca: 693b ldr r3, [r7, #16] - 80033cc: 22f0 movs r2, #240 ; 0xf0 - 80033ce: 4393 bics r3, r2 - 80033d0: 613b str r3, [r7, #16] + 800345a: 693b ldr r3, [r7, #16] + 800345c: 22f0 movs r2, #240 ; 0xf0 + 800345e: 4393 bics r3, r2 + 8003460: 613b str r3, [r7, #16] tmpccmr1 |= (TIM_ICFilter << 4U); - 80033d2: 687b ldr r3, [r7, #4] - 80033d4: 011b lsls r3, r3, #4 - 80033d6: 693a ldr r2, [r7, #16] - 80033d8: 4313 orrs r3, r2 - 80033da: 613b str r3, [r7, #16] + 8003462: 687b ldr r3, [r7, #4] + 8003464: 011b lsls r3, r3, #4 + 8003466: 693a ldr r2, [r7, #16] + 8003468: 4313 orrs r3, r2 + 800346a: 613b str r3, [r7, #16] /* Select the Polarity and set the CC1E Bit */ tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP); - 80033dc: 697b ldr r3, [r7, #20] - 80033de: 220a movs r2, #10 - 80033e0: 4393 bics r3, r2 - 80033e2: 617b str r3, [r7, #20] + 800346c: 697b ldr r3, [r7, #20] + 800346e: 220a movs r2, #10 + 8003470: 4393 bics r3, r2 + 8003472: 617b str r3, [r7, #20] tmpccer |= TIM_ICPolarity; - 80033e4: 697a ldr r2, [r7, #20] - 80033e6: 68bb ldr r3, [r7, #8] - 80033e8: 4313 orrs r3, r2 - 80033ea: 617b str r3, [r7, #20] + 8003474: 697a ldr r2, [r7, #20] + 8003476: 68bb ldr r3, [r7, #8] + 8003478: 4313 orrs r3, r2 + 800347a: 617b str r3, [r7, #20] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1; - 80033ec: 68fb ldr r3, [r7, #12] - 80033ee: 693a ldr r2, [r7, #16] - 80033f0: 619a str r2, [r3, #24] + 800347c: 68fb ldr r3, [r7, #12] + 800347e: 693a ldr r2, [r7, #16] + 8003480: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 80033f2: 68fb ldr r3, [r7, #12] - 80033f4: 697a ldr r2, [r7, #20] - 80033f6: 621a str r2, [r3, #32] + 8003482: 68fb ldr r3, [r7, #12] + 8003484: 697a ldr r2, [r7, #20] + 8003486: 621a str r2, [r3, #32] } - 80033f8: 46c0 nop ; (mov r8, r8) - 80033fa: 46bd mov sp, r7 - 80033fc: b006 add sp, #24 - 80033fe: bd80 pop {r7, pc} + 8003488: 46c0 nop ; (mov r8, r8) + 800348a: 46bd mov sp, r7 + 800348c: b006 add sp, #24 + 800348e: bd80 pop {r7, pc} -08003400 : +08003490 : * @param TIM_ICFilter Specifies the Input Capture Filter. * This parameter must be a value between 0x00 and 0x0F. * @retval None */ static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter) { - 8003400: b580 push {r7, lr} - 8003402: b086 sub sp, #24 - 8003404: af00 add r7, sp, #0 - 8003406: 60f8 str r0, [r7, #12] - 8003408: 60b9 str r1, [r7, #8] - 800340a: 607a str r2, [r7, #4] + 8003490: b580 push {r7, lr} + 8003492: b086 sub sp, #24 + 8003494: af00 add r7, sp, #0 + 8003496: 60f8 str r0, [r7, #12] + 8003498: 60b9 str r1, [r7, #8] + 800349a: 607a str r2, [r7, #4] uint32_t tmpccmr1; uint32_t tmpccer; /* Disable the Channel 2: Reset the CC2E Bit */ TIMx->CCER &= ~TIM_CCER_CC2E; - 800340c: 68fb ldr r3, [r7, #12] - 800340e: 6a1b ldr r3, [r3, #32] - 8003410: 2210 movs r2, #16 - 8003412: 4393 bics r3, r2 - 8003414: 001a movs r2, r3 - 8003416: 68fb ldr r3, [r7, #12] - 8003418: 621a str r2, [r3, #32] + 800349c: 68fb ldr r3, [r7, #12] + 800349e: 6a1b ldr r3, [r3, #32] + 80034a0: 2210 movs r2, #16 + 80034a2: 4393 bics r3, r2 + 80034a4: 001a movs r2, r3 + 80034a6: 68fb ldr r3, [r7, #12] + 80034a8: 621a str r2, [r3, #32] tmpccmr1 = TIMx->CCMR1; - 800341a: 68fb ldr r3, [r7, #12] - 800341c: 699b ldr r3, [r3, #24] - 800341e: 617b str r3, [r7, #20] + 80034aa: 68fb ldr r3, [r7, #12] + 80034ac: 699b ldr r3, [r3, #24] + 80034ae: 617b str r3, [r7, #20] tmpccer = TIMx->CCER; - 8003420: 68fb ldr r3, [r7, #12] - 8003422: 6a1b ldr r3, [r3, #32] - 8003424: 613b str r3, [r7, #16] + 80034b0: 68fb ldr r3, [r7, #12] + 80034b2: 6a1b ldr r3, [r3, #32] + 80034b4: 613b str r3, [r7, #16] /* Set the filter */ tmpccmr1 &= ~TIM_CCMR1_IC2F; - 8003426: 697b ldr r3, [r7, #20] - 8003428: 4a0d ldr r2, [pc, #52] ; (8003460 ) - 800342a: 4013 ands r3, r2 - 800342c: 617b str r3, [r7, #20] + 80034b6: 697b ldr r3, [r7, #20] + 80034b8: 4a0d ldr r2, [pc, #52] ; (80034f0 ) + 80034ba: 4013 ands r3, r2 + 80034bc: 617b str r3, [r7, #20] tmpccmr1 |= (TIM_ICFilter << 12U); - 800342e: 687b ldr r3, [r7, #4] - 8003430: 031b lsls r3, r3, #12 - 8003432: 697a ldr r2, [r7, #20] - 8003434: 4313 orrs r3, r2 - 8003436: 617b str r3, [r7, #20] + 80034be: 687b ldr r3, [r7, #4] + 80034c0: 031b lsls r3, r3, #12 + 80034c2: 697a ldr r2, [r7, #20] + 80034c4: 4313 orrs r3, r2 + 80034c6: 617b str r3, [r7, #20] /* Select the Polarity and set the CC2E Bit */ tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP); - 8003438: 693b ldr r3, [r7, #16] - 800343a: 22a0 movs r2, #160 ; 0xa0 - 800343c: 4393 bics r3, r2 - 800343e: 613b str r3, [r7, #16] + 80034c8: 693b ldr r3, [r7, #16] + 80034ca: 22a0 movs r2, #160 ; 0xa0 + 80034cc: 4393 bics r3, r2 + 80034ce: 613b str r3, [r7, #16] tmpccer |= (TIM_ICPolarity << 4U); - 8003440: 68bb ldr r3, [r7, #8] - 8003442: 011b lsls r3, r3, #4 - 8003444: 693a ldr r2, [r7, #16] - 8003446: 4313 orrs r3, r2 - 8003448: 613b str r3, [r7, #16] + 80034d0: 68bb ldr r3, [r7, #8] + 80034d2: 011b lsls r3, r3, #4 + 80034d4: 693a ldr r2, [r7, #16] + 80034d6: 4313 orrs r3, r2 + 80034d8: 613b str r3, [r7, #16] /* Write to TIMx CCMR1 and CCER registers */ TIMx->CCMR1 = tmpccmr1 ; - 800344a: 68fb ldr r3, [r7, #12] - 800344c: 697a ldr r2, [r7, #20] - 800344e: 619a str r2, [r3, #24] + 80034da: 68fb ldr r3, [r7, #12] + 80034dc: 697a ldr r2, [r7, #20] + 80034de: 619a str r2, [r3, #24] TIMx->CCER = tmpccer; - 8003450: 68fb ldr r3, [r7, #12] - 8003452: 693a ldr r2, [r7, #16] - 8003454: 621a str r2, [r3, #32] + 80034e0: 68fb ldr r3, [r7, #12] + 80034e2: 693a ldr r2, [r7, #16] + 80034e4: 621a str r2, [r3, #32] } - 8003456: 46c0 nop ; (mov r8, r8) - 8003458: 46bd mov sp, r7 - 800345a: b006 add sp, #24 - 800345c: bd80 pop {r7, pc} - 800345e: 46c0 nop ; (mov r8, r8) - 8003460: ffff0fff .word 0xffff0fff + 80034e6: 46c0 nop ; (mov r8, r8) + 80034e8: 46bd mov sp, r7 + 80034ea: b006 add sp, #24 + 80034ec: bd80 pop {r7, pc} + 80034ee: 46c0 nop ; (mov r8, r8) + 80034f0: ffff0fff .word 0xffff0fff -08003464 : +080034f4 : * @arg TIM_TS_TI2FP2: Filtered Timer Input 2 * @arg TIM_TS_ETRF: External Trigger input * @retval None */ static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource) { - 8003464: b580 push {r7, lr} - 8003466: b084 sub sp, #16 - 8003468: af00 add r7, sp, #0 - 800346a: 6078 str r0, [r7, #4] - 800346c: 6039 str r1, [r7, #0] + 80034f4: b580 push {r7, lr} + 80034f6: b084 sub sp, #16 + 80034f8: af00 add r7, sp, #0 + 80034fa: 6078 str r0, [r7, #4] + 80034fc: 6039 str r1, [r7, #0] uint32_t tmpsmcr; /* Get the TIMx SMCR register value */ tmpsmcr = TIMx->SMCR; - 800346e: 687b ldr r3, [r7, #4] - 8003470: 689b ldr r3, [r3, #8] - 8003472: 60fb str r3, [r7, #12] + 80034fe: 687b ldr r3, [r7, #4] + 8003500: 689b ldr r3, [r3, #8] + 8003502: 60fb str r3, [r7, #12] /* Reset the TS Bits */ tmpsmcr &= ~TIM_SMCR_TS; - 8003474: 68fb ldr r3, [r7, #12] - 8003476: 2270 movs r2, #112 ; 0x70 - 8003478: 4393 bics r3, r2 - 800347a: 60fb str r3, [r7, #12] + 8003504: 68fb ldr r3, [r7, #12] + 8003506: 2270 movs r2, #112 ; 0x70 + 8003508: 4393 bics r3, r2 + 800350a: 60fb str r3, [r7, #12] /* Set the Input Trigger source and the slave mode*/ tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1); - 800347c: 683a ldr r2, [r7, #0] - 800347e: 68fb ldr r3, [r7, #12] - 8003480: 4313 orrs r3, r2 - 8003482: 2207 movs r2, #7 - 8003484: 4313 orrs r3, r2 - 8003486: 60fb str r3, [r7, #12] + 800350c: 683a ldr r2, [r7, #0] + 800350e: 68fb ldr r3, [r7, #12] + 8003510: 4313 orrs r3, r2 + 8003512: 2207 movs r2, #7 + 8003514: 4313 orrs r3, r2 + 8003516: 60fb str r3, [r7, #12] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 8003488: 687b ldr r3, [r7, #4] - 800348a: 68fa ldr r2, [r7, #12] - 800348c: 609a str r2, [r3, #8] + 8003518: 687b ldr r3, [r7, #4] + 800351a: 68fa ldr r2, [r7, #12] + 800351c: 609a str r2, [r3, #8] } - 800348e: 46c0 nop ; (mov r8, r8) - 8003490: 46bd mov sp, r7 - 8003492: b004 add sp, #16 - 8003494: bd80 pop {r7, pc} + 800351e: 46c0 nop ; (mov r8, r8) + 8003520: 46bd mov sp, r7 + 8003522: b004 add sp, #16 + 8003524: bd80 pop {r7, pc} ... -08003498 : +08003528 : * This parameter must be a value between 0x00 and 0x0F * @retval None */ static void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler, uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter) { - 8003498: b580 push {r7, lr} - 800349a: b086 sub sp, #24 - 800349c: af00 add r7, sp, #0 - 800349e: 60f8 str r0, [r7, #12] - 80034a0: 60b9 str r1, [r7, #8] - 80034a2: 607a str r2, [r7, #4] - 80034a4: 603b str r3, [r7, #0] + 8003528: b580 push {r7, lr} + 800352a: b086 sub sp, #24 + 800352c: af00 add r7, sp, #0 + 800352e: 60f8 str r0, [r7, #12] + 8003530: 60b9 str r1, [r7, #8] + 8003532: 607a str r2, [r7, #4] + 8003534: 603b str r3, [r7, #0] uint32_t tmpsmcr; tmpsmcr = TIMx->SMCR; - 80034a6: 68fb ldr r3, [r7, #12] - 80034a8: 689b ldr r3, [r3, #8] - 80034aa: 617b str r3, [r7, #20] + 8003536: 68fb ldr r3, [r7, #12] + 8003538: 689b ldr r3, [r3, #8] + 800353a: 617b str r3, [r7, #20] /* Reset the ETR Bits */ tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP); - 80034ac: 697b ldr r3, [r7, #20] - 80034ae: 4a09 ldr r2, [pc, #36] ; (80034d4 ) - 80034b0: 4013 ands r3, r2 - 80034b2: 617b str r3, [r7, #20] + 800353c: 697b ldr r3, [r7, #20] + 800353e: 4a09 ldr r2, [pc, #36] ; (8003564 ) + 8003540: 4013 ands r3, r2 + 8003542: 617b str r3, [r7, #20] /* Set the Prescaler, the Filter value and the Polarity */ tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U))); - 80034b4: 683b ldr r3, [r7, #0] - 80034b6: 021a lsls r2, r3, #8 - 80034b8: 687b ldr r3, [r7, #4] - 80034ba: 431a orrs r2, r3 - 80034bc: 68bb ldr r3, [r7, #8] - 80034be: 4313 orrs r3, r2 - 80034c0: 697a ldr r2, [r7, #20] - 80034c2: 4313 orrs r3, r2 - 80034c4: 617b str r3, [r7, #20] + 8003544: 683b ldr r3, [r7, #0] + 8003546: 021a lsls r2, r3, #8 + 8003548: 687b ldr r3, [r7, #4] + 800354a: 431a orrs r2, r3 + 800354c: 68bb ldr r3, [r7, #8] + 800354e: 4313 orrs r3, r2 + 8003550: 697a ldr r2, [r7, #20] + 8003552: 4313 orrs r3, r2 + 8003554: 617b str r3, [r7, #20] /* Write to TIMx SMCR */ TIMx->SMCR = tmpsmcr; - 80034c6: 68fb ldr r3, [r7, #12] - 80034c8: 697a ldr r2, [r7, #20] - 80034ca: 609a str r2, [r3, #8] + 8003556: 68fb ldr r3, [r7, #12] + 8003558: 697a ldr r2, [r7, #20] + 800355a: 609a str r2, [r3, #8] } - 80034cc: 46c0 nop ; (mov r8, r8) - 80034ce: 46bd mov sp, r7 - 80034d0: b006 add sp, #24 - 80034d2: bd80 pop {r7, pc} - 80034d4: ffff00ff .word 0xffff00ff + 800355c: 46c0 nop ; (mov r8, r8) + 800355e: 46bd mov sp, r7 + 8003560: b006 add sp, #24 + 8003562: bd80 pop {r7, pc} + 8003564: ffff00ff .word 0xffff00ff -080034d8 : +08003568 : * mode. * @retval HAL status */ HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, const TIM_MasterConfigTypeDef *sMasterConfig) { - 80034d8: b580 push {r7, lr} - 80034da: b084 sub sp, #16 - 80034dc: af00 add r7, sp, #0 - 80034de: 6078 str r0, [r7, #4] - 80034e0: 6039 str r1, [r7, #0] + 8003568: b580 push {r7, lr} + 800356a: b084 sub sp, #16 + 800356c: af00 add r7, sp, #0 + 800356e: 6078 str r0, [r7, #4] + 8003570: 6039 str r1, [r7, #0] assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); /* Check input state */ __HAL_LOCK(htim); - 80034e2: 687b ldr r3, [r7, #4] - 80034e4: 2238 movs r2, #56 ; 0x38 - 80034e6: 5c9b ldrb r3, [r3, r2] - 80034e8: 2b01 cmp r3, #1 - 80034ea: d101 bne.n 80034f0 - 80034ec: 2302 movs r3, #2 - 80034ee: e042 b.n 8003576 - 80034f0: 687b ldr r3, [r7, #4] - 80034f2: 2238 movs r2, #56 ; 0x38 - 80034f4: 2101 movs r1, #1 - 80034f6: 5499 strb r1, [r3, r2] + 8003572: 687b ldr r3, [r7, #4] + 8003574: 2238 movs r2, #56 ; 0x38 + 8003576: 5c9b ldrb r3, [r3, r2] + 8003578: 2b01 cmp r3, #1 + 800357a: d101 bne.n 8003580 + 800357c: 2302 movs r3, #2 + 800357e: e042 b.n 8003606 + 8003580: 687b ldr r3, [r7, #4] + 8003582: 2238 movs r2, #56 ; 0x38 + 8003584: 2101 movs r1, #1 + 8003586: 5499 strb r1, [r3, r2] /* Change the handler state */ htim->State = HAL_TIM_STATE_BUSY; - 80034f8: 687b ldr r3, [r7, #4] - 80034fa: 2239 movs r2, #57 ; 0x39 - 80034fc: 2102 movs r1, #2 - 80034fe: 5499 strb r1, [r3, r2] + 8003588: 687b ldr r3, [r7, #4] + 800358a: 2239 movs r2, #57 ; 0x39 + 800358c: 2102 movs r1, #2 + 800358e: 5499 strb r1, [r3, r2] /* Get the TIMx CR2 register value */ tmpcr2 = htim->Instance->CR2; - 8003500: 687b ldr r3, [r7, #4] - 8003502: 681b ldr r3, [r3, #0] - 8003504: 685b ldr r3, [r3, #4] - 8003506: 60fb str r3, [r7, #12] + 8003590: 687b ldr r3, [r7, #4] + 8003592: 681b ldr r3, [r3, #0] + 8003594: 685b ldr r3, [r3, #4] + 8003596: 60fb str r3, [r7, #12] /* Get the TIMx SMCR register value */ tmpsmcr = htim->Instance->SMCR; - 8003508: 687b ldr r3, [r7, #4] - 800350a: 681b ldr r3, [r3, #0] - 800350c: 689b ldr r3, [r3, #8] - 800350e: 60bb str r3, [r7, #8] + 8003598: 687b ldr r3, [r7, #4] + 800359a: 681b ldr r3, [r3, #0] + 800359c: 689b ldr r3, [r3, #8] + 800359e: 60bb str r3, [r7, #8] /* Reset the MMS Bits */ tmpcr2 &= ~TIM_CR2_MMS; - 8003510: 68fb ldr r3, [r7, #12] - 8003512: 2270 movs r2, #112 ; 0x70 - 8003514: 4393 bics r3, r2 - 8003516: 60fb str r3, [r7, #12] + 80035a0: 68fb ldr r3, [r7, #12] + 80035a2: 2270 movs r2, #112 ; 0x70 + 80035a4: 4393 bics r3, r2 + 80035a6: 60fb str r3, [r7, #12] /* Select the TRGO source */ tmpcr2 |= sMasterConfig->MasterOutputTrigger; - 8003518: 683b ldr r3, [r7, #0] - 800351a: 681b ldr r3, [r3, #0] - 800351c: 68fa ldr r2, [r7, #12] - 800351e: 4313 orrs r3, r2 - 8003520: 60fb str r3, [r7, #12] + 80035a8: 683b ldr r3, [r7, #0] + 80035aa: 681b ldr r3, [r3, #0] + 80035ac: 68fa ldr r2, [r7, #12] + 80035ae: 4313 orrs r3, r2 + 80035b0: 60fb str r3, [r7, #12] /* Update TIMx CR2 */ htim->Instance->CR2 = tmpcr2; - 8003522: 687b ldr r3, [r7, #4] - 8003524: 681b ldr r3, [r3, #0] - 8003526: 68fa ldr r2, [r7, #12] - 8003528: 605a str r2, [r3, #4] + 80035b2: 687b ldr r3, [r7, #4] + 80035b4: 681b ldr r3, [r3, #0] + 80035b6: 68fa ldr r2, [r7, #12] + 80035b8: 605a str r2, [r3, #4] if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) - 800352a: 687b ldr r3, [r7, #4] - 800352c: 681a ldr r2, [r3, #0] - 800352e: 2380 movs r3, #128 ; 0x80 - 8003530: 05db lsls r3, r3, #23 - 8003532: 429a cmp r2, r3 - 8003534: d009 beq.n 800354a - 8003536: 687b ldr r3, [r7, #4] - 8003538: 681b ldr r3, [r3, #0] - 800353a: 4a11 ldr r2, [pc, #68] ; (8003580 ) - 800353c: 4293 cmp r3, r2 - 800353e: d004 beq.n 800354a - 8003540: 687b ldr r3, [r7, #4] - 8003542: 681b ldr r3, [r3, #0] - 8003544: 4a0f ldr r2, [pc, #60] ; (8003584 ) - 8003546: 4293 cmp r3, r2 - 8003548: d10c bne.n 8003564 + 80035ba: 687b ldr r3, [r7, #4] + 80035bc: 681a ldr r2, [r3, #0] + 80035be: 2380 movs r3, #128 ; 0x80 + 80035c0: 05db lsls r3, r3, #23 + 80035c2: 429a cmp r2, r3 + 80035c4: d009 beq.n 80035da + 80035c6: 687b ldr r3, [r7, #4] + 80035c8: 681b ldr r3, [r3, #0] + 80035ca: 4a11 ldr r2, [pc, #68] ; (8003610 ) + 80035cc: 4293 cmp r3, r2 + 80035ce: d004 beq.n 80035da + 80035d0: 687b ldr r3, [r7, #4] + 80035d2: 681b ldr r3, [r3, #0] + 80035d4: 4a0f ldr r2, [pc, #60] ; (8003614 ) + 80035d6: 4293 cmp r3, r2 + 80035d8: d10c bne.n 80035f4 { /* Reset the MSM Bit */ tmpsmcr &= ~TIM_SMCR_MSM; - 800354a: 68bb ldr r3, [r7, #8] - 800354c: 2280 movs r2, #128 ; 0x80 - 800354e: 4393 bics r3, r2 - 8003550: 60bb str r3, [r7, #8] + 80035da: 68bb ldr r3, [r7, #8] + 80035dc: 2280 movs r2, #128 ; 0x80 + 80035de: 4393 bics r3, r2 + 80035e0: 60bb str r3, [r7, #8] /* Set master mode */ tmpsmcr |= sMasterConfig->MasterSlaveMode; - 8003552: 683b ldr r3, [r7, #0] - 8003554: 685b ldr r3, [r3, #4] - 8003556: 68ba ldr r2, [r7, #8] - 8003558: 4313 orrs r3, r2 - 800355a: 60bb str r3, [r7, #8] + 80035e2: 683b ldr r3, [r7, #0] + 80035e4: 685b ldr r3, [r3, #4] + 80035e6: 68ba ldr r2, [r7, #8] + 80035e8: 4313 orrs r3, r2 + 80035ea: 60bb str r3, [r7, #8] /* Update TIMx SMCR */ htim->Instance->SMCR = tmpsmcr; - 800355c: 687b ldr r3, [r7, #4] - 800355e: 681b ldr r3, [r3, #0] - 8003560: 68ba ldr r2, [r7, #8] - 8003562: 609a str r2, [r3, #8] + 80035ec: 687b ldr r3, [r7, #4] + 80035ee: 681b ldr r3, [r3, #0] + 80035f0: 68ba ldr r2, [r7, #8] + 80035f2: 609a str r2, [r3, #8] } /* Change the htim state */ htim->State = HAL_TIM_STATE_READY; - 8003564: 687b ldr r3, [r7, #4] - 8003566: 2239 movs r2, #57 ; 0x39 - 8003568: 2101 movs r1, #1 - 800356a: 5499 strb r1, [r3, r2] + 80035f4: 687b ldr r3, [r7, #4] + 80035f6: 2239 movs r2, #57 ; 0x39 + 80035f8: 2101 movs r1, #1 + 80035fa: 5499 strb r1, [r3, r2] __HAL_UNLOCK(htim); - 800356c: 687b ldr r3, [r7, #4] - 800356e: 2238 movs r2, #56 ; 0x38 - 8003570: 2100 movs r1, #0 - 8003572: 5499 strb r1, [r3, r2] + 80035fc: 687b ldr r3, [r7, #4] + 80035fe: 2238 movs r2, #56 ; 0x38 + 8003600: 2100 movs r1, #0 + 8003602: 5499 strb r1, [r3, r2] return HAL_OK; - 8003574: 2300 movs r3, #0 + 8003604: 2300 movs r3, #0 } - 8003576: 0018 movs r0, r3 - 8003578: 46bd mov sp, r7 - 800357a: b004 add sp, #16 - 800357c: bd80 pop {r7, pc} - 800357e: 46c0 nop ; (mov r8, r8) - 8003580: 40010800 .word 0x40010800 - 8003584: 40011400 .word 0x40011400 + 8003606: 0018 movs r0, r3 + 8003608: 46bd mov sp, r7 + 800360a: b004 add sp, #16 + 800360c: bd80 pop {r7, pc} + 800360e: 46c0 nop ; (mov r8, r8) + 8003610: 40010800 .word 0x40010800 + 8003614: 40011400 .word 0x40011400 -08003588 : +08003618 : * parameters in the UART_InitTypeDef and initialize the associated handle. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { - 8003588: b580 push {r7, lr} - 800358a: b082 sub sp, #8 - 800358c: af00 add r7, sp, #0 - 800358e: 6078 str r0, [r7, #4] + 8003618: b580 push {r7, lr} + 800361a: b082 sub sp, #8 + 800361c: af00 add r7, sp, #0 + 800361e: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) - 8003590: 687b ldr r3, [r7, #4] - 8003592: 2b00 cmp r3, #0 - 8003594: d101 bne.n 800359a + 8003620: 687b ldr r3, [r7, #4] + 8003622: 2b00 cmp r3, #0 + 8003624: d101 bne.n 800362a { return HAL_ERROR; - 8003596: 2301 movs r3, #1 - 8003598: e044 b.n 8003624 + 8003626: 2301 movs r3, #1 + 8003628: e044 b.n 80036b4 { /* Check the parameters */ assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance))); } if (huart->gState == HAL_UART_STATE_RESET) - 800359a: 687b ldr r3, [r7, #4] - 800359c: 6fdb ldr r3, [r3, #124] ; 0x7c - 800359e: 2b00 cmp r3, #0 - 80035a0: d107 bne.n 80035b2 + 800362a: 687b ldr r3, [r7, #4] + 800362c: 6fdb ldr r3, [r3, #124] ; 0x7c + 800362e: 2b00 cmp r3, #0 + 8003630: d107 bne.n 8003642 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; - 80035a2: 687b ldr r3, [r7, #4] - 80035a4: 2278 movs r2, #120 ; 0x78 - 80035a6: 2100 movs r1, #0 - 80035a8: 5499 strb r1, [r3, r2] + 8003632: 687b ldr r3, [r7, #4] + 8003634: 2278 movs r2, #120 ; 0x78 + 8003636: 2100 movs r1, #0 + 8003638: 5499 strb r1, [r3, r2] /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); - 80035aa: 687b ldr r3, [r7, #4] - 80035ac: 0018 movs r0, r3 - 80035ae: f7fd fc0f bl 8000dd0 + 800363a: 687b ldr r3, [r7, #4] + 800363c: 0018 movs r0, r3 + 800363e: f7fd fc0f bl 8000e60 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; - 80035b2: 687b ldr r3, [r7, #4] - 80035b4: 2224 movs r2, #36 ; 0x24 - 80035b6: 67da str r2, [r3, #124] ; 0x7c + 8003642: 687b ldr r3, [r7, #4] + 8003644: 2224 movs r2, #36 ; 0x24 + 8003646: 67da str r2, [r3, #124] ; 0x7c __HAL_UART_DISABLE(huart); - 80035b8: 687b ldr r3, [r7, #4] - 80035ba: 681b ldr r3, [r3, #0] - 80035bc: 681a ldr r2, [r3, #0] - 80035be: 687b ldr r3, [r7, #4] - 80035c0: 681b ldr r3, [r3, #0] - 80035c2: 2101 movs r1, #1 - 80035c4: 438a bics r2, r1 - 80035c6: 601a str r2, [r3, #0] + 8003648: 687b ldr r3, [r7, #4] + 800364a: 681b ldr r3, [r3, #0] + 800364c: 681a ldr r2, [r3, #0] + 800364e: 687b ldr r3, [r7, #4] + 8003650: 681b ldr r3, [r3, #0] + 8003652: 2101 movs r1, #1 + 8003654: 438a bics r2, r1 + 8003656: 601a str r2, [r3, #0] /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) - 80035c8: 687b ldr r3, [r7, #4] - 80035ca: 0018 movs r0, r3 - 80035cc: f000 fd24 bl 8004018 - 80035d0: 0003 movs r3, r0 - 80035d2: 2b01 cmp r3, #1 - 80035d4: d101 bne.n 80035da + 8003658: 687b ldr r3, [r7, #4] + 800365a: 0018 movs r0, r3 + 800365c: f000 fd24 bl 80040a8 + 8003660: 0003 movs r3, r0 + 8003662: 2b01 cmp r3, #1 + 8003664: d101 bne.n 800366a { return HAL_ERROR; - 80035d6: 2301 movs r3, #1 - 80035d8: e024 b.n 8003624 + 8003666: 2301 movs r3, #1 + 8003668: e024 b.n 80036b4 } if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) - 80035da: 687b ldr r3, [r7, #4] - 80035dc: 6a5b ldr r3, [r3, #36] ; 0x24 - 80035de: 2b00 cmp r3, #0 - 80035e0: d003 beq.n 80035ea + 800366a: 687b ldr r3, [r7, #4] + 800366c: 6a5b ldr r3, [r3, #36] ; 0x24 + 800366e: 2b00 cmp r3, #0 + 8003670: d003 beq.n 800367a { UART_AdvFeatureConfig(huart); - 80035e2: 687b ldr r3, [r7, #4] - 80035e4: 0018 movs r0, r3 - 80035e6: f000 ff9b bl 8004520 + 8003672: 687b ldr r3, [r7, #4] + 8003674: 0018 movs r0, r3 + 8003676: f000 ff9b bl 80045b0 } /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); - 80035ea: 687b ldr r3, [r7, #4] - 80035ec: 681b ldr r3, [r3, #0] - 80035ee: 685a ldr r2, [r3, #4] - 80035f0: 687b ldr r3, [r7, #4] - 80035f2: 681b ldr r3, [r3, #0] - 80035f4: 490d ldr r1, [pc, #52] ; (800362c ) - 80035f6: 400a ands r2, r1 - 80035f8: 605a str r2, [r3, #4] + 800367a: 687b ldr r3, [r7, #4] + 800367c: 681b ldr r3, [r3, #0] + 800367e: 685a ldr r2, [r3, #4] + 8003680: 687b ldr r3, [r7, #4] + 8003682: 681b ldr r3, [r3, #0] + 8003684: 490d ldr r1, [pc, #52] ; (80036bc ) + 8003686: 400a ands r2, r1 + 8003688: 605a str r2, [r3, #4] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); - 80035fa: 687b ldr r3, [r7, #4] - 80035fc: 681b ldr r3, [r3, #0] - 80035fe: 689a ldr r2, [r3, #8] - 8003600: 687b ldr r3, [r7, #4] - 8003602: 681b ldr r3, [r3, #0] - 8003604: 212a movs r1, #42 ; 0x2a - 8003606: 438a bics r2, r1 - 8003608: 609a str r2, [r3, #8] + 800368a: 687b ldr r3, [r7, #4] + 800368c: 681b ldr r3, [r3, #0] + 800368e: 689a ldr r2, [r3, #8] + 8003690: 687b ldr r3, [r7, #4] + 8003692: 681b ldr r3, [r3, #0] + 8003694: 212a movs r1, #42 ; 0x2a + 8003696: 438a bics r2, r1 + 8003698: 609a str r2, [r3, #8] __HAL_UART_ENABLE(huart); - 800360a: 687b ldr r3, [r7, #4] - 800360c: 681b ldr r3, [r3, #0] - 800360e: 681a ldr r2, [r3, #0] - 8003610: 687b ldr r3, [r7, #4] - 8003612: 681b ldr r3, [r3, #0] - 8003614: 2101 movs r1, #1 - 8003616: 430a orrs r2, r1 - 8003618: 601a str r2, [r3, #0] + 800369a: 687b ldr r3, [r7, #4] + 800369c: 681b ldr r3, [r3, #0] + 800369e: 681a ldr r2, [r3, #0] + 80036a0: 687b ldr r3, [r7, #4] + 80036a2: 681b ldr r3, [r3, #0] + 80036a4: 2101 movs r1, #1 + 80036a6: 430a orrs r2, r1 + 80036a8: 601a str r2, [r3, #0] /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ return (UART_CheckIdleState(huart)); - 800361a: 687b ldr r3, [r7, #4] - 800361c: 0018 movs r0, r3 - 800361e: f001 f833 bl 8004688 - 8003622: 0003 movs r3, r0 + 80036aa: 687b ldr r3, [r7, #4] + 80036ac: 0018 movs r0, r3 + 80036ae: f001 f833 bl 8004718 + 80036b2: 0003 movs r3, r0 } - 8003624: 0018 movs r0, r3 - 8003626: 46bd mov sp, r7 - 8003628: b002 add sp, #8 - 800362a: bd80 pop {r7, pc} - 800362c: ffffb7ff .word 0xffffb7ff + 80036b4: 0018 movs r0, r3 + 80036b6: 46bd mov sp, r7 + 80036b8: b002 add sp, #8 + 80036ba: bd80 pop {r7, pc} + 80036bc: ffffb7ff .word 0xffffb7ff -08003630 : +080036c0 : * @param Size Amount of data elements (u8 or u16) to be sent. * @param Timeout Timeout duration. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8003630: b580 push {r7, lr} - 8003632: b08a sub sp, #40 ; 0x28 - 8003634: af02 add r7, sp, #8 - 8003636: 60f8 str r0, [r7, #12] - 8003638: 60b9 str r1, [r7, #8] - 800363a: 603b str r3, [r7, #0] - 800363c: 1dbb adds r3, r7, #6 - 800363e: 801a strh r2, [r3, #0] + 80036c0: b580 push {r7, lr} + 80036c2: b08a sub sp, #40 ; 0x28 + 80036c4: af02 add r7, sp, #8 + 80036c6: 60f8 str r0, [r7, #12] + 80036c8: 60b9 str r1, [r7, #8] + 80036ca: 603b str r3, [r7, #0] + 80036cc: 1dbb adds r3, r7, #6 + 80036ce: 801a strh r2, [r3, #0] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart; /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 8003640: 68fb ldr r3, [r7, #12] - 8003642: 6fdb ldr r3, [r3, #124] ; 0x7c - 8003644: 2b20 cmp r3, #32 - 8003646: d000 beq.n 800364a - 8003648: e08c b.n 8003764 + 80036d0: 68fb ldr r3, [r7, #12] + 80036d2: 6fdb ldr r3, [r3, #124] ; 0x7c + 80036d4: 2b20 cmp r3, #32 + 80036d6: d000 beq.n 80036da + 80036d8: e08c b.n 80037f4 { if ((pData == NULL) || (Size == 0U)) - 800364a: 68bb ldr r3, [r7, #8] - 800364c: 2b00 cmp r3, #0 - 800364e: d003 beq.n 8003658 - 8003650: 1dbb adds r3, r7, #6 - 8003652: 881b ldrh r3, [r3, #0] - 8003654: 2b00 cmp r3, #0 - 8003656: d101 bne.n 800365c + 80036da: 68bb ldr r3, [r7, #8] + 80036dc: 2b00 cmp r3, #0 + 80036de: d003 beq.n 80036e8 + 80036e0: 1dbb adds r3, r7, #6 + 80036e2: 881b ldrh r3, [r3, #0] + 80036e4: 2b00 cmp r3, #0 + 80036e6: d101 bne.n 80036ec { return HAL_ERROR; - 8003658: 2301 movs r3, #1 - 800365a: e084 b.n 8003766 + 80036e8: 2301 movs r3, #1 + 80036ea: e084 b.n 80037f6 } /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter should be aligned on a u16 frontier, as data to be filled into TDR will be handled through a u16 cast. */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 800365c: 68fb ldr r3, [r7, #12] - 800365e: 689a ldr r2, [r3, #8] - 8003660: 2380 movs r3, #128 ; 0x80 - 8003662: 015b lsls r3, r3, #5 - 8003664: 429a cmp r2, r3 - 8003666: d109 bne.n 800367c - 8003668: 68fb ldr r3, [r7, #12] - 800366a: 691b ldr r3, [r3, #16] - 800366c: 2b00 cmp r3, #0 - 800366e: d105 bne.n 800367c + 80036ec: 68fb ldr r3, [r7, #12] + 80036ee: 689a ldr r2, [r3, #8] + 80036f0: 2380 movs r3, #128 ; 0x80 + 80036f2: 015b lsls r3, r3, #5 + 80036f4: 429a cmp r2, r3 + 80036f6: d109 bne.n 800370c + 80036f8: 68fb ldr r3, [r7, #12] + 80036fa: 691b ldr r3, [r3, #16] + 80036fc: 2b00 cmp r3, #0 + 80036fe: d105 bne.n 800370c { if ((((uint32_t)pData) & 1U) != 0U) - 8003670: 68bb ldr r3, [r7, #8] - 8003672: 2201 movs r2, #1 - 8003674: 4013 ands r3, r2 - 8003676: d001 beq.n 800367c + 8003700: 68bb ldr r3, [r7, #8] + 8003702: 2201 movs r2, #1 + 8003704: 4013 ands r3, r2 + 8003706: d001 beq.n 800370c { return HAL_ERROR; - 8003678: 2301 movs r3, #1 - 800367a: e074 b.n 8003766 + 8003708: 2301 movs r3, #1 + 800370a: e074 b.n 80037f6 } } huart->ErrorCode = HAL_UART_ERROR_NONE; - 800367c: 68fb ldr r3, [r7, #12] - 800367e: 2284 movs r2, #132 ; 0x84 - 8003680: 2100 movs r1, #0 - 8003682: 5099 str r1, [r3, r2] + 800370c: 68fb ldr r3, [r7, #12] + 800370e: 2284 movs r2, #132 ; 0x84 + 8003710: 2100 movs r1, #0 + 8003712: 5099 str r1, [r3, r2] huart->gState = HAL_UART_STATE_BUSY_TX; - 8003684: 68fb ldr r3, [r7, #12] - 8003686: 2221 movs r2, #33 ; 0x21 - 8003688: 67da str r2, [r3, #124] ; 0x7c + 8003714: 68fb ldr r3, [r7, #12] + 8003716: 2221 movs r2, #33 ; 0x21 + 8003718: 67da str r2, [r3, #124] ; 0x7c /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 800368a: f7fd fd87 bl 800119c - 800368e: 0003 movs r3, r0 - 8003690: 617b str r3, [r7, #20] + 800371a: f7fd fd87 bl 800122c + 800371e: 0003 movs r3, r0 + 8003720: 617b str r3, [r7, #20] huart->TxXferSize = Size; - 8003692: 68fb ldr r3, [r7, #12] - 8003694: 1dba adds r2, r7, #6 - 8003696: 2150 movs r1, #80 ; 0x50 - 8003698: 8812 ldrh r2, [r2, #0] - 800369a: 525a strh r2, [r3, r1] + 8003722: 68fb ldr r3, [r7, #12] + 8003724: 1dba adds r2, r7, #6 + 8003726: 2150 movs r1, #80 ; 0x50 + 8003728: 8812 ldrh r2, [r2, #0] + 800372a: 525a strh r2, [r3, r1] huart->TxXferCount = Size; - 800369c: 68fb ldr r3, [r7, #12] - 800369e: 1dba adds r2, r7, #6 - 80036a0: 2152 movs r1, #82 ; 0x52 - 80036a2: 8812 ldrh r2, [r2, #0] - 80036a4: 525a strh r2, [r3, r1] + 800372c: 68fb ldr r3, [r7, #12] + 800372e: 1dba adds r2, r7, #6 + 8003730: 2152 movs r1, #82 ; 0x52 + 8003732: 8812 ldrh r2, [r2, #0] + 8003734: 525a strh r2, [r3, r1] /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 80036a6: 68fb ldr r3, [r7, #12] - 80036a8: 689a ldr r2, [r3, #8] - 80036aa: 2380 movs r3, #128 ; 0x80 - 80036ac: 015b lsls r3, r3, #5 - 80036ae: 429a cmp r2, r3 - 80036b0: d108 bne.n 80036c4 - 80036b2: 68fb ldr r3, [r7, #12] - 80036b4: 691b ldr r3, [r3, #16] - 80036b6: 2b00 cmp r3, #0 - 80036b8: d104 bne.n 80036c4 + 8003736: 68fb ldr r3, [r7, #12] + 8003738: 689a ldr r2, [r3, #8] + 800373a: 2380 movs r3, #128 ; 0x80 + 800373c: 015b lsls r3, r3, #5 + 800373e: 429a cmp r2, r3 + 8003740: d108 bne.n 8003754 + 8003742: 68fb ldr r3, [r7, #12] + 8003744: 691b ldr r3, [r3, #16] + 8003746: 2b00 cmp r3, #0 + 8003748: d104 bne.n 8003754 { pdata8bits = NULL; - 80036ba: 2300 movs r3, #0 - 80036bc: 61fb str r3, [r7, #28] + 800374a: 2300 movs r3, #0 + 800374c: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; - 80036be: 68bb ldr r3, [r7, #8] - 80036c0: 61bb str r3, [r7, #24] - 80036c2: e003 b.n 80036cc + 800374e: 68bb ldr r3, [r7, #8] + 8003750: 61bb str r3, [r7, #24] + 8003752: e003 b.n 800375c } else { pdata8bits = pData; - 80036c4: 68bb ldr r3, [r7, #8] - 80036c6: 61fb str r3, [r7, #28] + 8003754: 68bb ldr r3, [r7, #8] + 8003756: 61fb str r3, [r7, #28] pdata16bits = NULL; - 80036c8: 2300 movs r3, #0 - 80036ca: 61bb str r3, [r7, #24] + 8003758: 2300 movs r3, #0 + 800375a: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) - 80036cc: e02f b.n 800372e + 800375c: e02f b.n 80037be { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) - 80036ce: 697a ldr r2, [r7, #20] - 80036d0: 68f8 ldr r0, [r7, #12] - 80036d2: 683b ldr r3, [r7, #0] - 80036d4: 9300 str r3, [sp, #0] - 80036d6: 0013 movs r3, r2 - 80036d8: 2200 movs r2, #0 - 80036da: 2180 movs r1, #128 ; 0x80 - 80036dc: f001 f87c bl 80047d8 - 80036e0: 1e03 subs r3, r0, #0 - 80036e2: d004 beq.n 80036ee + 800375e: 697a ldr r2, [r7, #20] + 8003760: 68f8 ldr r0, [r7, #12] + 8003762: 683b ldr r3, [r7, #0] + 8003764: 9300 str r3, [sp, #0] + 8003766: 0013 movs r3, r2 + 8003768: 2200 movs r2, #0 + 800376a: 2180 movs r1, #128 ; 0x80 + 800376c: f001 f87c bl 8004868 + 8003770: 1e03 subs r3, r0, #0 + 8003772: d004 beq.n 800377e { huart->gState = HAL_UART_STATE_READY; - 80036e4: 68fb ldr r3, [r7, #12] - 80036e6: 2220 movs r2, #32 - 80036e8: 67da str r2, [r3, #124] ; 0x7c + 8003774: 68fb ldr r3, [r7, #12] + 8003776: 2220 movs r2, #32 + 8003778: 67da str r2, [r3, #124] ; 0x7c return HAL_TIMEOUT; - 80036ea: 2303 movs r3, #3 - 80036ec: e03b b.n 8003766 + 800377a: 2303 movs r3, #3 + 800377c: e03b b.n 80037f6 } if (pdata8bits == NULL) - 80036ee: 69fb ldr r3, [r7, #28] - 80036f0: 2b00 cmp r3, #0 - 80036f2: d10b bne.n 800370c + 800377e: 69fb ldr r3, [r7, #28] + 8003780: 2b00 cmp r3, #0 + 8003782: d10b bne.n 800379c { huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); - 80036f4: 69bb ldr r3, [r7, #24] - 80036f6: 881b ldrh r3, [r3, #0] - 80036f8: 001a movs r2, r3 - 80036fa: 68fb ldr r3, [r7, #12] - 80036fc: 681b ldr r3, [r3, #0] - 80036fe: 05d2 lsls r2, r2, #23 - 8003700: 0dd2 lsrs r2, r2, #23 - 8003702: 629a str r2, [r3, #40] ; 0x28 + 8003784: 69bb ldr r3, [r7, #24] + 8003786: 881b ldrh r3, [r3, #0] + 8003788: 001a movs r2, r3 + 800378a: 68fb ldr r3, [r7, #12] + 800378c: 681b ldr r3, [r3, #0] + 800378e: 05d2 lsls r2, r2, #23 + 8003790: 0dd2 lsrs r2, r2, #23 + 8003792: 629a str r2, [r3, #40] ; 0x28 pdata16bits++; - 8003704: 69bb ldr r3, [r7, #24] - 8003706: 3302 adds r3, #2 - 8003708: 61bb str r3, [r7, #24] - 800370a: e007 b.n 800371c + 8003794: 69bb ldr r3, [r7, #24] + 8003796: 3302 adds r3, #2 + 8003798: 61bb str r3, [r7, #24] + 800379a: e007 b.n 80037ac } else { huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); - 800370c: 69fb ldr r3, [r7, #28] - 800370e: 781a ldrb r2, [r3, #0] - 8003710: 68fb ldr r3, [r7, #12] - 8003712: 681b ldr r3, [r3, #0] - 8003714: 629a str r2, [r3, #40] ; 0x28 + 800379c: 69fb ldr r3, [r7, #28] + 800379e: 781a ldrb r2, [r3, #0] + 80037a0: 68fb ldr r3, [r7, #12] + 80037a2: 681b ldr r3, [r3, #0] + 80037a4: 629a str r2, [r3, #40] ; 0x28 pdata8bits++; - 8003716: 69fb ldr r3, [r7, #28] - 8003718: 3301 adds r3, #1 - 800371a: 61fb str r3, [r7, #28] + 80037a6: 69fb ldr r3, [r7, #28] + 80037a8: 3301 adds r3, #1 + 80037aa: 61fb str r3, [r7, #28] } huart->TxXferCount--; - 800371c: 68fb ldr r3, [r7, #12] - 800371e: 2252 movs r2, #82 ; 0x52 - 8003720: 5a9b ldrh r3, [r3, r2] - 8003722: b29b uxth r3, r3 - 8003724: 3b01 subs r3, #1 - 8003726: b299 uxth r1, r3 - 8003728: 68fb ldr r3, [r7, #12] - 800372a: 2252 movs r2, #82 ; 0x52 - 800372c: 5299 strh r1, [r3, r2] + 80037ac: 68fb ldr r3, [r7, #12] + 80037ae: 2252 movs r2, #82 ; 0x52 + 80037b0: 5a9b ldrh r3, [r3, r2] + 80037b2: b29b uxth r3, r3 + 80037b4: 3b01 subs r3, #1 + 80037b6: b299 uxth r1, r3 + 80037b8: 68fb ldr r3, [r7, #12] + 80037ba: 2252 movs r2, #82 ; 0x52 + 80037bc: 5299 strh r1, [r3, r2] while (huart->TxXferCount > 0U) - 800372e: 68fb ldr r3, [r7, #12] - 8003730: 2252 movs r2, #82 ; 0x52 - 8003732: 5a9b ldrh r3, [r3, r2] - 8003734: b29b uxth r3, r3 - 8003736: 2b00 cmp r3, #0 - 8003738: d1c9 bne.n 80036ce + 80037be: 68fb ldr r3, [r7, #12] + 80037c0: 2252 movs r2, #82 ; 0x52 + 80037c2: 5a9b ldrh r3, [r3, r2] + 80037c4: b29b uxth r3, r3 + 80037c6: 2b00 cmp r3, #0 + 80037c8: d1c9 bne.n 800375e } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) - 800373a: 697a ldr r2, [r7, #20] - 800373c: 68f8 ldr r0, [r7, #12] - 800373e: 683b ldr r3, [r7, #0] - 8003740: 9300 str r3, [sp, #0] - 8003742: 0013 movs r3, r2 - 8003744: 2200 movs r2, #0 - 8003746: 2140 movs r1, #64 ; 0x40 - 8003748: f001 f846 bl 80047d8 - 800374c: 1e03 subs r3, r0, #0 - 800374e: d004 beq.n 800375a + 80037ca: 697a ldr r2, [r7, #20] + 80037cc: 68f8 ldr r0, [r7, #12] + 80037ce: 683b ldr r3, [r7, #0] + 80037d0: 9300 str r3, [sp, #0] + 80037d2: 0013 movs r3, r2 + 80037d4: 2200 movs r2, #0 + 80037d6: 2140 movs r1, #64 ; 0x40 + 80037d8: f001 f846 bl 8004868 + 80037dc: 1e03 subs r3, r0, #0 + 80037de: d004 beq.n 80037ea { huart->gState = HAL_UART_STATE_READY; - 8003750: 68fb ldr r3, [r7, #12] - 8003752: 2220 movs r2, #32 - 8003754: 67da str r2, [r3, #124] ; 0x7c + 80037e0: 68fb ldr r3, [r7, #12] + 80037e2: 2220 movs r2, #32 + 80037e4: 67da str r2, [r3, #124] ; 0x7c return HAL_TIMEOUT; - 8003756: 2303 movs r3, #3 - 8003758: e005 b.n 8003766 + 80037e6: 2303 movs r3, #3 + 80037e8: e005 b.n 80037f6 } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 800375a: 68fb ldr r3, [r7, #12] - 800375c: 2220 movs r2, #32 - 800375e: 67da str r2, [r3, #124] ; 0x7c + 80037ea: 68fb ldr r3, [r7, #12] + 80037ec: 2220 movs r2, #32 + 80037ee: 67da str r2, [r3, #124] ; 0x7c return HAL_OK; - 8003760: 2300 movs r3, #0 - 8003762: e000 b.n 8003766 + 80037f0: 2300 movs r3, #0 + 80037f2: e000 b.n 80037f6 } else { return HAL_BUSY; - 8003764: 2302 movs r3, #2 + 80037f4: 2302 movs r3, #2 } } - 8003766: 0018 movs r0, r3 - 8003768: 46bd mov sp, r7 - 800376a: b008 add sp, #32 - 800376c: bd80 pop {r7, pc} + 80037f6: 0018 movs r0, r3 + 80037f8: 46bd mov sp, r7 + 80037fa: b008 add sp, #32 + 80037fc: bd80 pop {r7, pc} ... -08003770 : +08003800 : * @param Size Amount of data elements (u8 or u16) to be received. * @param Timeout Timeout duration. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout) { - 8003770: b580 push {r7, lr} - 8003772: b08a sub sp, #40 ; 0x28 - 8003774: af02 add r7, sp, #8 - 8003776: 60f8 str r0, [r7, #12] - 8003778: 60b9 str r1, [r7, #8] - 800377a: 603b str r3, [r7, #0] - 800377c: 1dbb adds r3, r7, #6 - 800377e: 801a strh r2, [r3, #0] + 8003800: b580 push {r7, lr} + 8003802: b08a sub sp, #40 ; 0x28 + 8003804: af02 add r7, sp, #8 + 8003806: 60f8 str r0, [r7, #12] + 8003808: 60b9 str r1, [r7, #8] + 800380a: 603b str r3, [r7, #0] + 800380c: 1dbb adds r3, r7, #6 + 800380e: 801a strh r2, [r3, #0] uint16_t *pdata16bits; uint16_t uhMask; uint32_t tickstart; /* Check that a Rx process is not already ongoing */ if (huart->RxState == HAL_UART_STATE_READY) - 8003780: 68fb ldr r3, [r7, #12] - 8003782: 2280 movs r2, #128 ; 0x80 - 8003784: 589b ldr r3, [r3, r2] - 8003786: 2b20 cmp r3, #32 - 8003788: d000 beq.n 800378c - 800378a: e0d0 b.n 800392e + 8003810: 68fb ldr r3, [r7, #12] + 8003812: 2280 movs r2, #128 ; 0x80 + 8003814: 589b ldr r3, [r3, r2] + 8003816: 2b20 cmp r3, #32 + 8003818: d000 beq.n 800381c + 800381a: e0d0 b.n 80039be { if ((pData == NULL) || (Size == 0U)) - 800378c: 68bb ldr r3, [r7, #8] - 800378e: 2b00 cmp r3, #0 - 8003790: d003 beq.n 800379a - 8003792: 1dbb adds r3, r7, #6 - 8003794: 881b ldrh r3, [r3, #0] - 8003796: 2b00 cmp r3, #0 - 8003798: d101 bne.n 800379e + 800381c: 68bb ldr r3, [r7, #8] + 800381e: 2b00 cmp r3, #0 + 8003820: d003 beq.n 800382a + 8003822: 1dbb adds r3, r7, #6 + 8003824: 881b ldrh r3, [r3, #0] + 8003826: 2b00 cmp r3, #0 + 8003828: d101 bne.n 800382e { return HAL_ERROR; - 800379a: 2301 movs r3, #1 - 800379c: e0c8 b.n 8003930 + 800382a: 2301 movs r3, #1 + 800382c: e0c8 b.n 80039c0 } /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter should be aligned on a u16 frontier, as data to be received from RDR will be handled through a u16 cast. */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 800379e: 68fb ldr r3, [r7, #12] - 80037a0: 689a ldr r2, [r3, #8] - 80037a2: 2380 movs r3, #128 ; 0x80 - 80037a4: 015b lsls r3, r3, #5 - 80037a6: 429a cmp r2, r3 - 80037a8: d109 bne.n 80037be - 80037aa: 68fb ldr r3, [r7, #12] - 80037ac: 691b ldr r3, [r3, #16] - 80037ae: 2b00 cmp r3, #0 - 80037b0: d105 bne.n 80037be + 800382e: 68fb ldr r3, [r7, #12] + 8003830: 689a ldr r2, [r3, #8] + 8003832: 2380 movs r3, #128 ; 0x80 + 8003834: 015b lsls r3, r3, #5 + 8003836: 429a cmp r2, r3 + 8003838: d109 bne.n 800384e + 800383a: 68fb ldr r3, [r7, #12] + 800383c: 691b ldr r3, [r3, #16] + 800383e: 2b00 cmp r3, #0 + 8003840: d105 bne.n 800384e { if ((((uint32_t)pData) & 1U) != 0U) - 80037b2: 68bb ldr r3, [r7, #8] - 80037b4: 2201 movs r2, #1 - 80037b6: 4013 ands r3, r2 - 80037b8: d001 beq.n 80037be + 8003842: 68bb ldr r3, [r7, #8] + 8003844: 2201 movs r2, #1 + 8003846: 4013 ands r3, r2 + 8003848: d001 beq.n 800384e { return HAL_ERROR; - 80037ba: 2301 movs r3, #1 - 80037bc: e0b8 b.n 8003930 + 800384a: 2301 movs r3, #1 + 800384c: e0b8 b.n 80039c0 } } huart->ErrorCode = HAL_UART_ERROR_NONE; - 80037be: 68fb ldr r3, [r7, #12] - 80037c0: 2284 movs r2, #132 ; 0x84 - 80037c2: 2100 movs r1, #0 - 80037c4: 5099 str r1, [r3, r2] + 800384e: 68fb ldr r3, [r7, #12] + 8003850: 2284 movs r2, #132 ; 0x84 + 8003852: 2100 movs r1, #0 + 8003854: 5099 str r1, [r3, r2] huart->RxState = HAL_UART_STATE_BUSY_RX; - 80037c6: 68fb ldr r3, [r7, #12] - 80037c8: 2280 movs r2, #128 ; 0x80 - 80037ca: 2122 movs r1, #34 ; 0x22 - 80037cc: 5099 str r1, [r3, r2] + 8003856: 68fb ldr r3, [r7, #12] + 8003858: 2280 movs r2, #128 ; 0x80 + 800385a: 2122 movs r1, #34 ; 0x22 + 800385c: 5099 str r1, [r3, r2] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 80037ce: 68fb ldr r3, [r7, #12] - 80037d0: 2200 movs r2, #0 - 80037d2: 661a str r2, [r3, #96] ; 0x60 + 800385e: 68fb ldr r3, [r7, #12] + 8003860: 2200 movs r2, #0 + 8003862: 661a str r2, [r3, #96] ; 0x60 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 80037d4: f7fd fce2 bl 800119c - 80037d8: 0003 movs r3, r0 - 80037da: 617b str r3, [r7, #20] + 8003864: f7fd fce2 bl 800122c + 8003868: 0003 movs r3, r0 + 800386a: 617b str r3, [r7, #20] huart->RxXferSize = Size; - 80037dc: 68fb ldr r3, [r7, #12] - 80037de: 1dba adds r2, r7, #6 - 80037e0: 2158 movs r1, #88 ; 0x58 - 80037e2: 8812 ldrh r2, [r2, #0] - 80037e4: 525a strh r2, [r3, r1] + 800386c: 68fb ldr r3, [r7, #12] + 800386e: 1dba adds r2, r7, #6 + 8003870: 2158 movs r1, #88 ; 0x58 + 8003872: 8812 ldrh r2, [r2, #0] + 8003874: 525a strh r2, [r3, r1] huart->RxXferCount = Size; - 80037e6: 68fb ldr r3, [r7, #12] - 80037e8: 1dba adds r2, r7, #6 - 80037ea: 215a movs r1, #90 ; 0x5a - 80037ec: 8812 ldrh r2, [r2, #0] - 80037ee: 525a strh r2, [r3, r1] + 8003876: 68fb ldr r3, [r7, #12] + 8003878: 1dba adds r2, r7, #6 + 800387a: 215a movs r1, #90 ; 0x5a + 800387c: 8812 ldrh r2, [r2, #0] + 800387e: 525a strh r2, [r3, r1] /* Computation of UART mask to apply to RDR register */ UART_MASK_COMPUTATION(huart); - 80037f0: 68fb ldr r3, [r7, #12] - 80037f2: 689a ldr r2, [r3, #8] - 80037f4: 2380 movs r3, #128 ; 0x80 - 80037f6: 015b lsls r3, r3, #5 - 80037f8: 429a cmp r2, r3 - 80037fa: d10d bne.n 8003818 - 80037fc: 68fb ldr r3, [r7, #12] - 80037fe: 691b ldr r3, [r3, #16] - 8003800: 2b00 cmp r3, #0 - 8003802: d104 bne.n 800380e - 8003804: 68fb ldr r3, [r7, #12] - 8003806: 225c movs r2, #92 ; 0x5c - 8003808: 494b ldr r1, [pc, #300] ; (8003938 ) - 800380a: 5299 strh r1, [r3, r2] - 800380c: e02e b.n 800386c - 800380e: 68fb ldr r3, [r7, #12] - 8003810: 225c movs r2, #92 ; 0x5c - 8003812: 21ff movs r1, #255 ; 0xff - 8003814: 5299 strh r1, [r3, r2] - 8003816: e029 b.n 800386c - 8003818: 68fb ldr r3, [r7, #12] - 800381a: 689b ldr r3, [r3, #8] - 800381c: 2b00 cmp r3, #0 - 800381e: d10d bne.n 800383c - 8003820: 68fb ldr r3, [r7, #12] - 8003822: 691b ldr r3, [r3, #16] - 8003824: 2b00 cmp r3, #0 - 8003826: d104 bne.n 8003832 - 8003828: 68fb ldr r3, [r7, #12] - 800382a: 225c movs r2, #92 ; 0x5c - 800382c: 21ff movs r1, #255 ; 0xff - 800382e: 5299 strh r1, [r3, r2] - 8003830: e01c b.n 800386c - 8003832: 68fb ldr r3, [r7, #12] - 8003834: 225c movs r2, #92 ; 0x5c - 8003836: 217f movs r1, #127 ; 0x7f - 8003838: 5299 strh r1, [r3, r2] - 800383a: e017 b.n 800386c - 800383c: 68fb ldr r3, [r7, #12] - 800383e: 689a ldr r2, [r3, #8] - 8003840: 2380 movs r3, #128 ; 0x80 - 8003842: 055b lsls r3, r3, #21 - 8003844: 429a cmp r2, r3 - 8003846: d10d bne.n 8003864 - 8003848: 68fb ldr r3, [r7, #12] - 800384a: 691b ldr r3, [r3, #16] - 800384c: 2b00 cmp r3, #0 - 800384e: d104 bne.n 800385a - 8003850: 68fb ldr r3, [r7, #12] - 8003852: 225c movs r2, #92 ; 0x5c - 8003854: 217f movs r1, #127 ; 0x7f - 8003856: 5299 strh r1, [r3, r2] - 8003858: e008 b.n 800386c - 800385a: 68fb ldr r3, [r7, #12] - 800385c: 225c movs r2, #92 ; 0x5c - 800385e: 213f movs r1, #63 ; 0x3f - 8003860: 5299 strh r1, [r3, r2] - 8003862: e003 b.n 800386c - 8003864: 68fb ldr r3, [r7, #12] - 8003866: 225c movs r2, #92 ; 0x5c - 8003868: 2100 movs r1, #0 - 800386a: 5299 strh r1, [r3, r2] + 8003880: 68fb ldr r3, [r7, #12] + 8003882: 689a ldr r2, [r3, #8] + 8003884: 2380 movs r3, #128 ; 0x80 + 8003886: 015b lsls r3, r3, #5 + 8003888: 429a cmp r2, r3 + 800388a: d10d bne.n 80038a8 + 800388c: 68fb ldr r3, [r7, #12] + 800388e: 691b ldr r3, [r3, #16] + 8003890: 2b00 cmp r3, #0 + 8003892: d104 bne.n 800389e + 8003894: 68fb ldr r3, [r7, #12] + 8003896: 225c movs r2, #92 ; 0x5c + 8003898: 494b ldr r1, [pc, #300] ; (80039c8 ) + 800389a: 5299 strh r1, [r3, r2] + 800389c: e02e b.n 80038fc + 800389e: 68fb ldr r3, [r7, #12] + 80038a0: 225c movs r2, #92 ; 0x5c + 80038a2: 21ff movs r1, #255 ; 0xff + 80038a4: 5299 strh r1, [r3, r2] + 80038a6: e029 b.n 80038fc + 80038a8: 68fb ldr r3, [r7, #12] + 80038aa: 689b ldr r3, [r3, #8] + 80038ac: 2b00 cmp r3, #0 + 80038ae: d10d bne.n 80038cc + 80038b0: 68fb ldr r3, [r7, #12] + 80038b2: 691b ldr r3, [r3, #16] + 80038b4: 2b00 cmp r3, #0 + 80038b6: d104 bne.n 80038c2 + 80038b8: 68fb ldr r3, [r7, #12] + 80038ba: 225c movs r2, #92 ; 0x5c + 80038bc: 21ff movs r1, #255 ; 0xff + 80038be: 5299 strh r1, [r3, r2] + 80038c0: e01c b.n 80038fc + 80038c2: 68fb ldr r3, [r7, #12] + 80038c4: 225c movs r2, #92 ; 0x5c + 80038c6: 217f movs r1, #127 ; 0x7f + 80038c8: 5299 strh r1, [r3, r2] + 80038ca: e017 b.n 80038fc + 80038cc: 68fb ldr r3, [r7, #12] + 80038ce: 689a ldr r2, [r3, #8] + 80038d0: 2380 movs r3, #128 ; 0x80 + 80038d2: 055b lsls r3, r3, #21 + 80038d4: 429a cmp r2, r3 + 80038d6: d10d bne.n 80038f4 + 80038d8: 68fb ldr r3, [r7, #12] + 80038da: 691b ldr r3, [r3, #16] + 80038dc: 2b00 cmp r3, #0 + 80038de: d104 bne.n 80038ea + 80038e0: 68fb ldr r3, [r7, #12] + 80038e2: 225c movs r2, #92 ; 0x5c + 80038e4: 217f movs r1, #127 ; 0x7f + 80038e6: 5299 strh r1, [r3, r2] + 80038e8: e008 b.n 80038fc + 80038ea: 68fb ldr r3, [r7, #12] + 80038ec: 225c movs r2, #92 ; 0x5c + 80038ee: 213f movs r1, #63 ; 0x3f + 80038f0: 5299 strh r1, [r3, r2] + 80038f2: e003 b.n 80038fc + 80038f4: 68fb ldr r3, [r7, #12] + 80038f6: 225c movs r2, #92 ; 0x5c + 80038f8: 2100 movs r1, #0 + 80038fa: 5299 strh r1, [r3, r2] uhMask = huart->Mask; - 800386c: 2312 movs r3, #18 - 800386e: 18fb adds r3, r7, r3 - 8003870: 68fa ldr r2, [r7, #12] - 8003872: 215c movs r1, #92 ; 0x5c - 8003874: 5a52 ldrh r2, [r2, r1] - 8003876: 801a strh r2, [r3, #0] + 80038fc: 2312 movs r3, #18 + 80038fe: 18fb adds r3, r7, r3 + 8003900: 68fa ldr r2, [r7, #12] + 8003902: 215c movs r1, #92 ; 0x5c + 8003904: 5a52 ldrh r2, [r2, r1] + 8003906: 801a strh r2, [r3, #0] /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8003878: 68fb ldr r3, [r7, #12] - 800387a: 689a ldr r2, [r3, #8] - 800387c: 2380 movs r3, #128 ; 0x80 - 800387e: 015b lsls r3, r3, #5 - 8003880: 429a cmp r2, r3 - 8003882: d108 bne.n 8003896 - 8003884: 68fb ldr r3, [r7, #12] - 8003886: 691b ldr r3, [r3, #16] - 8003888: 2b00 cmp r3, #0 - 800388a: d104 bne.n 8003896 + 8003908: 68fb ldr r3, [r7, #12] + 800390a: 689a ldr r2, [r3, #8] + 800390c: 2380 movs r3, #128 ; 0x80 + 800390e: 015b lsls r3, r3, #5 + 8003910: 429a cmp r2, r3 + 8003912: d108 bne.n 8003926 + 8003914: 68fb ldr r3, [r7, #12] + 8003916: 691b ldr r3, [r3, #16] + 8003918: 2b00 cmp r3, #0 + 800391a: d104 bne.n 8003926 { pdata8bits = NULL; - 800388c: 2300 movs r3, #0 - 800388e: 61fb str r3, [r7, #28] + 800391c: 2300 movs r3, #0 + 800391e: 61fb str r3, [r7, #28] pdata16bits = (uint16_t *) pData; - 8003890: 68bb ldr r3, [r7, #8] - 8003892: 61bb str r3, [r7, #24] - 8003894: e003 b.n 800389e + 8003920: 68bb ldr r3, [r7, #8] + 8003922: 61bb str r3, [r7, #24] + 8003924: e003 b.n 800392e } else { pdata8bits = pData; - 8003896: 68bb ldr r3, [r7, #8] - 8003898: 61fb str r3, [r7, #28] + 8003926: 68bb ldr r3, [r7, #8] + 8003928: 61fb str r3, [r7, #28] pdata16bits = NULL; - 800389a: 2300 movs r3, #0 - 800389c: 61bb str r3, [r7, #24] + 800392a: 2300 movs r3, #0 + 800392c: 61bb str r3, [r7, #24] } /* as long as data have to be received */ while (huart->RxXferCount > 0U) - 800389e: e03a b.n 8003916 + 800392e: e03a b.n 80039a6 { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK) - 80038a0: 697a ldr r2, [r7, #20] - 80038a2: 68f8 ldr r0, [r7, #12] - 80038a4: 683b ldr r3, [r7, #0] - 80038a6: 9300 str r3, [sp, #0] - 80038a8: 0013 movs r3, r2 - 80038aa: 2200 movs r2, #0 - 80038ac: 2120 movs r1, #32 - 80038ae: f000 ff93 bl 80047d8 - 80038b2: 1e03 subs r3, r0, #0 - 80038b4: d005 beq.n 80038c2 + 8003930: 697a ldr r2, [r7, #20] + 8003932: 68f8 ldr r0, [r7, #12] + 8003934: 683b ldr r3, [r7, #0] + 8003936: 9300 str r3, [sp, #0] + 8003938: 0013 movs r3, r2 + 800393a: 2200 movs r2, #0 + 800393c: 2120 movs r1, #32 + 800393e: f000 ff93 bl 8004868 + 8003942: 1e03 subs r3, r0, #0 + 8003944: d005 beq.n 8003952 { huart->RxState = HAL_UART_STATE_READY; - 80038b6: 68fb ldr r3, [r7, #12] - 80038b8: 2280 movs r2, #128 ; 0x80 - 80038ba: 2120 movs r1, #32 - 80038bc: 5099 str r1, [r3, r2] + 8003946: 68fb ldr r3, [r7, #12] + 8003948: 2280 movs r2, #128 ; 0x80 + 800394a: 2120 movs r1, #32 + 800394c: 5099 str r1, [r3, r2] return HAL_TIMEOUT; - 80038be: 2303 movs r3, #3 - 80038c0: e036 b.n 8003930 + 800394e: 2303 movs r3, #3 + 8003950: e036 b.n 80039c0 } if (pdata8bits == NULL) - 80038c2: 69fb ldr r3, [r7, #28] - 80038c4: 2b00 cmp r3, #0 - 80038c6: d10e bne.n 80038e6 + 8003952: 69fb ldr r3, [r7, #28] + 8003954: 2b00 cmp r3, #0 + 8003956: d10e bne.n 8003976 { *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask); - 80038c8: 68fb ldr r3, [r7, #12] - 80038ca: 681b ldr r3, [r3, #0] - 80038cc: 6a5b ldr r3, [r3, #36] ; 0x24 - 80038ce: b29b uxth r3, r3 - 80038d0: 2212 movs r2, #18 - 80038d2: 18ba adds r2, r7, r2 - 80038d4: 8812 ldrh r2, [r2, #0] - 80038d6: 4013 ands r3, r2 - 80038d8: b29a uxth r2, r3 - 80038da: 69bb ldr r3, [r7, #24] - 80038dc: 801a strh r2, [r3, #0] + 8003958: 68fb ldr r3, [r7, #12] + 800395a: 681b ldr r3, [r3, #0] + 800395c: 6a5b ldr r3, [r3, #36] ; 0x24 + 800395e: b29b uxth r3, r3 + 8003960: 2212 movs r2, #18 + 8003962: 18ba adds r2, r7, r2 + 8003964: 8812 ldrh r2, [r2, #0] + 8003966: 4013 ands r3, r2 + 8003968: b29a uxth r2, r3 + 800396a: 69bb ldr r3, [r7, #24] + 800396c: 801a strh r2, [r3, #0] pdata16bits++; - 80038de: 69bb ldr r3, [r7, #24] - 80038e0: 3302 adds r3, #2 - 80038e2: 61bb str r3, [r7, #24] - 80038e4: e00e b.n 8003904 + 800396e: 69bb ldr r3, [r7, #24] + 8003970: 3302 adds r3, #2 + 8003972: 61bb str r3, [r7, #24] + 8003974: e00e b.n 8003994 } else { *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask); - 80038e6: 68fb ldr r3, [r7, #12] - 80038e8: 681b ldr r3, [r3, #0] - 80038ea: 6a5b ldr r3, [r3, #36] ; 0x24 - 80038ec: b2db uxtb r3, r3 - 80038ee: 2212 movs r2, #18 - 80038f0: 18ba adds r2, r7, r2 - 80038f2: 8812 ldrh r2, [r2, #0] - 80038f4: b2d2 uxtb r2, r2 - 80038f6: 4013 ands r3, r2 - 80038f8: b2da uxtb r2, r3 - 80038fa: 69fb ldr r3, [r7, #28] - 80038fc: 701a strb r2, [r3, #0] + 8003976: 68fb ldr r3, [r7, #12] + 8003978: 681b ldr r3, [r3, #0] + 800397a: 6a5b ldr r3, [r3, #36] ; 0x24 + 800397c: b2db uxtb r3, r3 + 800397e: 2212 movs r2, #18 + 8003980: 18ba adds r2, r7, r2 + 8003982: 8812 ldrh r2, [r2, #0] + 8003984: b2d2 uxtb r2, r2 + 8003986: 4013 ands r3, r2 + 8003988: b2da uxtb r2, r3 + 800398a: 69fb ldr r3, [r7, #28] + 800398c: 701a strb r2, [r3, #0] pdata8bits++; - 80038fe: 69fb ldr r3, [r7, #28] - 8003900: 3301 adds r3, #1 - 8003902: 61fb str r3, [r7, #28] + 800398e: 69fb ldr r3, [r7, #28] + 8003990: 3301 adds r3, #1 + 8003992: 61fb str r3, [r7, #28] } huart->RxXferCount--; - 8003904: 68fb ldr r3, [r7, #12] - 8003906: 225a movs r2, #90 ; 0x5a - 8003908: 5a9b ldrh r3, [r3, r2] - 800390a: b29b uxth r3, r3 - 800390c: 3b01 subs r3, #1 - 800390e: b299 uxth r1, r3 - 8003910: 68fb ldr r3, [r7, #12] - 8003912: 225a movs r2, #90 ; 0x5a - 8003914: 5299 strh r1, [r3, r2] + 8003994: 68fb ldr r3, [r7, #12] + 8003996: 225a movs r2, #90 ; 0x5a + 8003998: 5a9b ldrh r3, [r3, r2] + 800399a: b29b uxth r3, r3 + 800399c: 3b01 subs r3, #1 + 800399e: b299 uxth r1, r3 + 80039a0: 68fb ldr r3, [r7, #12] + 80039a2: 225a movs r2, #90 ; 0x5a + 80039a4: 5299 strh r1, [r3, r2] while (huart->RxXferCount > 0U) - 8003916: 68fb ldr r3, [r7, #12] - 8003918: 225a movs r2, #90 ; 0x5a - 800391a: 5a9b ldrh r3, [r3, r2] - 800391c: b29b uxth r3, r3 - 800391e: 2b00 cmp r3, #0 - 8003920: d1be bne.n 80038a0 + 80039a6: 68fb ldr r3, [r7, #12] + 80039a8: 225a movs r2, #90 ; 0x5a + 80039aa: 5a9b ldrh r3, [r3, r2] + 80039ac: b29b uxth r3, r3 + 80039ae: 2b00 cmp r3, #0 + 80039b0: d1be bne.n 8003930 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8003922: 68fb ldr r3, [r7, #12] - 8003924: 2280 movs r2, #128 ; 0x80 - 8003926: 2120 movs r1, #32 - 8003928: 5099 str r1, [r3, r2] + 80039b2: 68fb ldr r3, [r7, #12] + 80039b4: 2280 movs r2, #128 ; 0x80 + 80039b6: 2120 movs r1, #32 + 80039b8: 5099 str r1, [r3, r2] return HAL_OK; - 800392a: 2300 movs r3, #0 - 800392c: e000 b.n 8003930 + 80039ba: 2300 movs r3, #0 + 80039bc: e000 b.n 80039c0 } else { return HAL_BUSY; - 800392e: 2302 movs r3, #2 + 80039be: 2302 movs r3, #2 } } - 8003930: 0018 movs r0, r3 - 8003932: 46bd mov sp, r7 - 8003934: b008 add sp, #32 - 8003936: bd80 pop {r7, pc} - 8003938: 000001ff .word 0x000001ff + 80039c0: 0018 movs r0, r3 + 80039c2: 46bd mov sp, r7 + 80039c4: b008 add sp, #32 + 80039c6: bd80 pop {r7, pc} + 80039c8: 000001ff .word 0x000001ff -0800393c : +080039cc : * @param pData Pointer to data buffer (u8 or u16 data elements). * @param Size Amount of data elements (u8 or u16) to be sent. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size) { - 800393c: b580 push {r7, lr} - 800393e: b088 sub sp, #32 - 8003940: af00 add r7, sp, #0 - 8003942: 60f8 str r0, [r7, #12] - 8003944: 60b9 str r1, [r7, #8] - 8003946: 1dbb adds r3, r7, #6 - 8003948: 801a strh r2, [r3, #0] + 80039cc: b580 push {r7, lr} + 80039ce: b088 sub sp, #32 + 80039d0: af00 add r7, sp, #0 + 80039d2: 60f8 str r0, [r7, #12] + 80039d4: 60b9 str r1, [r7, #8] + 80039d6: 1dbb adds r3, r7, #6 + 80039d8: 801a strh r2, [r3, #0] /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) - 800394a: 68fb ldr r3, [r7, #12] - 800394c: 6fdb ldr r3, [r3, #124] ; 0x7c - 800394e: 2b20 cmp r3, #32 - 8003950: d15b bne.n 8003a0a + 80039da: 68fb ldr r3, [r7, #12] + 80039dc: 6fdb ldr r3, [r3, #124] ; 0x7c + 80039de: 2b20 cmp r3, #32 + 80039e0: d15b bne.n 8003a9a { if ((pData == NULL) || (Size == 0U)) - 8003952: 68bb ldr r3, [r7, #8] - 8003954: 2b00 cmp r3, #0 - 8003956: d003 beq.n 8003960 - 8003958: 1dbb adds r3, r7, #6 - 800395a: 881b ldrh r3, [r3, #0] - 800395c: 2b00 cmp r3, #0 - 800395e: d101 bne.n 8003964 + 80039e2: 68bb ldr r3, [r7, #8] + 80039e4: 2b00 cmp r3, #0 + 80039e6: d003 beq.n 80039f0 + 80039e8: 1dbb adds r3, r7, #6 + 80039ea: 881b ldrh r3, [r3, #0] + 80039ec: 2b00 cmp r3, #0 + 80039ee: d101 bne.n 80039f4 { return HAL_ERROR; - 8003960: 2301 movs r3, #1 - 8003962: e053 b.n 8003a0c + 80039f0: 2301 movs r3, #1 + 80039f2: e053 b.n 8003a9c } /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter should be aligned on a u16 frontier, as data to be filled into TDR will be handled through a u16 cast. */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 8003964: 68fb ldr r3, [r7, #12] - 8003966: 689a ldr r2, [r3, #8] - 8003968: 2380 movs r3, #128 ; 0x80 - 800396a: 015b lsls r3, r3, #5 - 800396c: 429a cmp r2, r3 - 800396e: d109 bne.n 8003984 - 8003970: 68fb ldr r3, [r7, #12] - 8003972: 691b ldr r3, [r3, #16] - 8003974: 2b00 cmp r3, #0 - 8003976: d105 bne.n 8003984 + 80039f4: 68fb ldr r3, [r7, #12] + 80039f6: 689a ldr r2, [r3, #8] + 80039f8: 2380 movs r3, #128 ; 0x80 + 80039fa: 015b lsls r3, r3, #5 + 80039fc: 429a cmp r2, r3 + 80039fe: d109 bne.n 8003a14 + 8003a00: 68fb ldr r3, [r7, #12] + 8003a02: 691b ldr r3, [r3, #16] + 8003a04: 2b00 cmp r3, #0 + 8003a06: d105 bne.n 8003a14 { if ((((uint32_t)pData) & 1U) != 0U) - 8003978: 68bb ldr r3, [r7, #8] - 800397a: 2201 movs r2, #1 - 800397c: 4013 ands r3, r2 - 800397e: d001 beq.n 8003984 + 8003a08: 68bb ldr r3, [r7, #8] + 8003a0a: 2201 movs r2, #1 + 8003a0c: 4013 ands r3, r2 + 8003a0e: d001 beq.n 8003a14 { return HAL_ERROR; - 8003980: 2301 movs r3, #1 - 8003982: e043 b.n 8003a0c + 8003a10: 2301 movs r3, #1 + 8003a12: e043 b.n 8003a9c } } huart->pTxBuffPtr = pData; - 8003984: 68fb ldr r3, [r7, #12] - 8003986: 68ba ldr r2, [r7, #8] - 8003988: 64da str r2, [r3, #76] ; 0x4c + 8003a14: 68fb ldr r3, [r7, #12] + 8003a16: 68ba ldr r2, [r7, #8] + 8003a18: 64da str r2, [r3, #76] ; 0x4c huart->TxXferSize = Size; - 800398a: 68fb ldr r3, [r7, #12] - 800398c: 1dba adds r2, r7, #6 - 800398e: 2150 movs r1, #80 ; 0x50 - 8003990: 8812 ldrh r2, [r2, #0] - 8003992: 525a strh r2, [r3, r1] + 8003a1a: 68fb ldr r3, [r7, #12] + 8003a1c: 1dba adds r2, r7, #6 + 8003a1e: 2150 movs r1, #80 ; 0x50 + 8003a20: 8812 ldrh r2, [r2, #0] + 8003a22: 525a strh r2, [r3, r1] huart->TxXferCount = Size; - 8003994: 68fb ldr r3, [r7, #12] - 8003996: 1dba adds r2, r7, #6 - 8003998: 2152 movs r1, #82 ; 0x52 - 800399a: 8812 ldrh r2, [r2, #0] - 800399c: 525a strh r2, [r3, r1] + 8003a24: 68fb ldr r3, [r7, #12] + 8003a26: 1dba adds r2, r7, #6 + 8003a28: 2152 movs r1, #82 ; 0x52 + 8003a2a: 8812 ldrh r2, [r2, #0] + 8003a2c: 525a strh r2, [r3, r1] huart->TxISR = NULL; - 800399e: 68fb ldr r3, [r7, #12] - 80039a0: 2200 movs r2, #0 - 80039a2: 66da str r2, [r3, #108] ; 0x6c + 8003a2e: 68fb ldr r3, [r7, #12] + 8003a30: 2200 movs r2, #0 + 8003a32: 66da str r2, [r3, #108] ; 0x6c huart->ErrorCode = HAL_UART_ERROR_NONE; - 80039a4: 68fb ldr r3, [r7, #12] - 80039a6: 2284 movs r2, #132 ; 0x84 - 80039a8: 2100 movs r1, #0 - 80039aa: 5099 str r1, [r3, r2] + 8003a34: 68fb ldr r3, [r7, #12] + 8003a36: 2284 movs r2, #132 ; 0x84 + 8003a38: 2100 movs r1, #0 + 8003a3a: 5099 str r1, [r3, r2] huart->gState = HAL_UART_STATE_BUSY_TX; - 80039ac: 68fb ldr r3, [r7, #12] - 80039ae: 2221 movs r2, #33 ; 0x21 - 80039b0: 67da str r2, [r3, #124] ; 0x7c + 8003a3c: 68fb ldr r3, [r7, #12] + 8003a3e: 2221 movs r2, #33 ; 0x21 + 8003a40: 67da str r2, [r3, #124] ; 0x7c /* Set the Tx ISR function pointer according to the data word length */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) - 80039b2: 68fb ldr r3, [r7, #12] - 80039b4: 689a ldr r2, [r3, #8] - 80039b6: 2380 movs r3, #128 ; 0x80 - 80039b8: 015b lsls r3, r3, #5 - 80039ba: 429a cmp r2, r3 - 80039bc: d107 bne.n 80039ce - 80039be: 68fb ldr r3, [r7, #12] - 80039c0: 691b ldr r3, [r3, #16] - 80039c2: 2b00 cmp r3, #0 - 80039c4: d103 bne.n 80039ce + 8003a42: 68fb ldr r3, [r7, #12] + 8003a44: 689a ldr r2, [r3, #8] + 8003a46: 2380 movs r3, #128 ; 0x80 + 8003a48: 015b lsls r3, r3, #5 + 8003a4a: 429a cmp r2, r3 + 8003a4c: d107 bne.n 8003a5e + 8003a4e: 68fb ldr r3, [r7, #12] + 8003a50: 691b ldr r3, [r3, #16] + 8003a52: 2b00 cmp r3, #0 + 8003a54: d103 bne.n 8003a5e { huart->TxISR = UART_TxISR_16BIT; - 80039c6: 68fb ldr r3, [r7, #12] - 80039c8: 4a12 ldr r2, [pc, #72] ; (8003a14 ) - 80039ca: 66da str r2, [r3, #108] ; 0x6c - 80039cc: e002 b.n 80039d4 + 8003a56: 68fb ldr r3, [r7, #12] + 8003a58: 4a12 ldr r2, [pc, #72] ; (8003aa4 ) + 8003a5a: 66da str r2, [r3, #108] ; 0x6c + 8003a5c: e002 b.n 8003a64 } else { huart->TxISR = UART_TxISR_8BIT; - 80039ce: 68fb ldr r3, [r7, #12] - 80039d0: 4a11 ldr r2, [pc, #68] ; (8003a18 ) - 80039d2: 66da str r2, [r3, #108] ; 0x6c + 8003a5e: 68fb ldr r3, [r7, #12] + 8003a60: 4a11 ldr r2, [pc, #68] ; (8003aa8 ) + 8003a62: 66da str r2, [r3, #108] ; 0x6c */ __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) { uint32_t result; __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 80039d4: f3ef 8310 mrs r3, PRIMASK - 80039d8: 613b str r3, [r7, #16] + 8003a64: f3ef 8310 mrs r3, PRIMASK + 8003a68: 613b str r3, [r7, #16] return(result); - 80039da: 693b ldr r3, [r7, #16] + 8003a6a: 693b ldr r3, [r7, #16] } /* Enable the Transmit Data Register Empty interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE); - 80039dc: 61fb str r3, [r7, #28] - 80039de: 2301 movs r3, #1 - 80039e0: 617b str r3, [r7, #20] + 8003a6c: 61fb str r3, [r7, #28] + 8003a6e: 2301 movs r3, #1 + 8003a70: 617b str r3, [r7, #20] \details Assigns the given value to the Priority Mask Register. \param [in] priMask Priority Mask */ __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) { __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80039e2: 697b ldr r3, [r7, #20] - 80039e4: f383 8810 msr PRIMASK, r3 + 8003a72: 697b ldr r3, [r7, #20] + 8003a74: f383 8810 msr PRIMASK, r3 } - 80039e8: 46c0 nop ; (mov r8, r8) - 80039ea: 68fb ldr r3, [r7, #12] - 80039ec: 681b ldr r3, [r3, #0] - 80039ee: 681a ldr r2, [r3, #0] - 80039f0: 68fb ldr r3, [r7, #12] - 80039f2: 681b ldr r3, [r3, #0] - 80039f4: 2180 movs r1, #128 ; 0x80 - 80039f6: 430a orrs r2, r1 - 80039f8: 601a str r2, [r3, #0] - 80039fa: 69fb ldr r3, [r7, #28] - 80039fc: 61bb str r3, [r7, #24] + 8003a78: 46c0 nop ; (mov r8, r8) + 8003a7a: 68fb ldr r3, [r7, #12] + 8003a7c: 681b ldr r3, [r3, #0] + 8003a7e: 681a ldr r2, [r3, #0] + 8003a80: 68fb ldr r3, [r7, #12] + 8003a82: 681b ldr r3, [r3, #0] + 8003a84: 2180 movs r1, #128 ; 0x80 + 8003a86: 430a orrs r2, r1 + 8003a88: 601a str r2, [r3, #0] + 8003a8a: 69fb ldr r3, [r7, #28] + 8003a8c: 61bb str r3, [r7, #24] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80039fe: 69bb ldr r3, [r7, #24] - 8003a00: f383 8810 msr PRIMASK, r3 + 8003a8e: 69bb ldr r3, [r7, #24] + 8003a90: f383 8810 msr PRIMASK, r3 } - 8003a04: 46c0 nop ; (mov r8, r8) + 8003a94: 46c0 nop ; (mov r8, r8) return HAL_OK; - 8003a06: 2300 movs r3, #0 - 8003a08: e000 b.n 8003a0c + 8003a96: 2300 movs r3, #0 + 8003a98: e000 b.n 8003a9c } else { return HAL_BUSY; - 8003a0a: 2302 movs r3, #2 + 8003a9a: 2302 movs r3, #2 } } - 8003a0c: 0018 movs r0, r3 - 8003a0e: 46bd mov sp, r7 - 8003a10: b008 add sp, #32 - 8003a12: bd80 pop {r7, pc} - 8003a14: 08004a55 .word 0x08004a55 - 8003a18: 080049a3 .word 0x080049a3 + 8003a9c: 0018 movs r0, r3 + 8003a9e: 46bd mov sp, r7 + 8003aa0: b008 add sp, #32 + 8003aa2: bd80 pop {r7, pc} + 8003aa4: 08004ae5 .word 0x08004ae5 + 8003aa8: 08004a33 .word 0x08004a33 -08003a1c : +08003aac : * @brief Handle UART interrupt request. * @param huart UART handle. * @retval None */ void HAL_UART_IRQHandler(UART_HandleTypeDef *huart) { - 8003a1c: b590 push {r4, r7, lr} - 8003a1e: b0ab sub sp, #172 ; 0xac - 8003a20: af00 add r7, sp, #0 - 8003a22: 6078 str r0, [r7, #4] + 8003aac: b590 push {r4, r7, lr} + 8003aae: b0ab sub sp, #172 ; 0xac + 8003ab0: af00 add r7, sp, #0 + 8003ab2: 6078 str r0, [r7, #4] uint32_t isrflags = READ_REG(huart->Instance->ISR); - 8003a24: 687b ldr r3, [r7, #4] - 8003a26: 681b ldr r3, [r3, #0] - 8003a28: 69db ldr r3, [r3, #28] - 8003a2a: 22a4 movs r2, #164 ; 0xa4 - 8003a2c: 18b9 adds r1, r7, r2 - 8003a2e: 600b str r3, [r1, #0] + 8003ab4: 687b ldr r3, [r7, #4] + 8003ab6: 681b ldr r3, [r3, #0] + 8003ab8: 69db ldr r3, [r3, #28] + 8003aba: 22a4 movs r2, #164 ; 0xa4 + 8003abc: 18b9 adds r1, r7, r2 + 8003abe: 600b str r3, [r1, #0] uint32_t cr1its = READ_REG(huart->Instance->CR1); - 8003a30: 687b ldr r3, [r7, #4] - 8003a32: 681b ldr r3, [r3, #0] - 8003a34: 681b ldr r3, [r3, #0] - 8003a36: 20a0 movs r0, #160 ; 0xa0 - 8003a38: 1839 adds r1, r7, r0 - 8003a3a: 600b str r3, [r1, #0] + 8003ac0: 687b ldr r3, [r7, #4] + 8003ac2: 681b ldr r3, [r3, #0] + 8003ac4: 681b ldr r3, [r3, #0] + 8003ac6: 20a0 movs r0, #160 ; 0xa0 + 8003ac8: 1839 adds r1, r7, r0 + 8003aca: 600b str r3, [r1, #0] uint32_t cr3its = READ_REG(huart->Instance->CR3); - 8003a3c: 687b ldr r3, [r7, #4] - 8003a3e: 681b ldr r3, [r3, #0] - 8003a40: 689b ldr r3, [r3, #8] - 8003a42: 219c movs r1, #156 ; 0x9c - 8003a44: 1879 adds r1, r7, r1 - 8003a46: 600b str r3, [r1, #0] + 8003acc: 687b ldr r3, [r7, #4] + 8003ace: 681b ldr r3, [r3, #0] + 8003ad0: 689b ldr r3, [r3, #8] + 8003ad2: 219c movs r1, #156 ; 0x9c + 8003ad4: 1879 adds r1, r7, r1 + 8003ad6: 600b str r3, [r1, #0] uint32_t errorflags; uint32_t errorcode; /* If no error occurs */ errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF)); - 8003a48: 0011 movs r1, r2 - 8003a4a: 18bb adds r3, r7, r2 - 8003a4c: 681b ldr r3, [r3, #0] - 8003a4e: 4a99 ldr r2, [pc, #612] ; (8003cb4 ) - 8003a50: 4013 ands r3, r2 - 8003a52: 2298 movs r2, #152 ; 0x98 - 8003a54: 18bc adds r4, r7, r2 - 8003a56: 6023 str r3, [r4, #0] + 8003ad8: 0011 movs r1, r2 + 8003ada: 18bb adds r3, r7, r2 + 8003adc: 681b ldr r3, [r3, #0] + 8003ade: 4a99 ldr r2, [pc, #612] ; (8003d44 ) + 8003ae0: 4013 ands r3, r2 + 8003ae2: 2298 movs r2, #152 ; 0x98 + 8003ae4: 18bc adds r4, r7, r2 + 8003ae6: 6023 str r3, [r4, #0] if (errorflags == 0U) - 8003a58: 18bb adds r3, r7, r2 - 8003a5a: 681b ldr r3, [r3, #0] - 8003a5c: 2b00 cmp r3, #0 - 8003a5e: d114 bne.n 8003a8a + 8003ae8: 18bb adds r3, r7, r2 + 8003aea: 681b ldr r3, [r3, #0] + 8003aec: 2b00 cmp r3, #0 + 8003aee: d114 bne.n 8003b1a { /* UART in mode Receiver ---------------------------------------------------*/ if (((isrflags & USART_ISR_RXNE) != 0U) - 8003a60: 187b adds r3, r7, r1 - 8003a62: 681b ldr r3, [r3, #0] - 8003a64: 2220 movs r2, #32 - 8003a66: 4013 ands r3, r2 - 8003a68: d00f beq.n 8003a8a + 8003af0: 187b adds r3, r7, r1 + 8003af2: 681b ldr r3, [r3, #0] + 8003af4: 2220 movs r2, #32 + 8003af6: 4013 ands r3, r2 + 8003af8: d00f beq.n 8003b1a && ((cr1its & USART_CR1_RXNEIE) != 0U)) - 8003a6a: 183b adds r3, r7, r0 - 8003a6c: 681b ldr r3, [r3, #0] - 8003a6e: 2220 movs r2, #32 - 8003a70: 4013 ands r3, r2 - 8003a72: d00a beq.n 8003a8a + 8003afa: 183b adds r3, r7, r0 + 8003afc: 681b ldr r3, [r3, #0] + 8003afe: 2220 movs r2, #32 + 8003b00: 4013 ands r3, r2 + 8003b02: d00a beq.n 8003b1a { if (huart->RxISR != NULL) - 8003a74: 687b ldr r3, [r7, #4] - 8003a76: 6e9b ldr r3, [r3, #104] ; 0x68 - 8003a78: 2b00 cmp r3, #0 - 8003a7a: d100 bne.n 8003a7e - 8003a7c: e2a0 b.n 8003fc0 + 8003b04: 687b ldr r3, [r7, #4] + 8003b06: 6e9b ldr r3, [r3, #104] ; 0x68 + 8003b08: 2b00 cmp r3, #0 + 8003b0a: d100 bne.n 8003b0e + 8003b0c: e2a0 b.n 8004050 { huart->RxISR(huart); - 8003a7e: 687b ldr r3, [r7, #4] - 8003a80: 6e9b ldr r3, [r3, #104] ; 0x68 - 8003a82: 687a ldr r2, [r7, #4] - 8003a84: 0010 movs r0, r2 - 8003a86: 4798 blx r3 + 8003b0e: 687b ldr r3, [r7, #4] + 8003b10: 6e9b ldr r3, [r3, #104] ; 0x68 + 8003b12: 687a ldr r2, [r7, #4] + 8003b14: 0010 movs r0, r2 + 8003b16: 4798 blx r3 } return; - 8003a88: e29a b.n 8003fc0 + 8003b18: e29a b.n 8004050 } } /* If some errors occur */ if ((errorflags != 0U) - 8003a8a: 2398 movs r3, #152 ; 0x98 - 8003a8c: 18fb adds r3, r7, r3 - 8003a8e: 681b ldr r3, [r3, #0] - 8003a90: 2b00 cmp r3, #0 - 8003a92: d100 bne.n 8003a96 - 8003a94: e114 b.n 8003cc0 + 8003b1a: 2398 movs r3, #152 ; 0x98 + 8003b1c: 18fb adds r3, r7, r3 + 8003b1e: 681b ldr r3, [r3, #0] + 8003b20: 2b00 cmp r3, #0 + 8003b22: d100 bne.n 8003b26 + 8003b24: e114 b.n 8003d50 && (((cr3its & USART_CR3_EIE) != 0U) - 8003a96: 239c movs r3, #156 ; 0x9c - 8003a98: 18fb adds r3, r7, r3 - 8003a9a: 681b ldr r3, [r3, #0] - 8003a9c: 2201 movs r2, #1 - 8003a9e: 4013 ands r3, r2 - 8003aa0: d106 bne.n 8003ab0 + 8003b26: 239c movs r3, #156 ; 0x9c + 8003b28: 18fb adds r3, r7, r3 + 8003b2a: 681b ldr r3, [r3, #0] + 8003b2c: 2201 movs r2, #1 + 8003b2e: 4013 ands r3, r2 + 8003b30: d106 bne.n 8003b40 || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U))) - 8003aa2: 23a0 movs r3, #160 ; 0xa0 - 8003aa4: 18fb adds r3, r7, r3 - 8003aa6: 681b ldr r3, [r3, #0] - 8003aa8: 4a83 ldr r2, [pc, #524] ; (8003cb8 ) - 8003aaa: 4013 ands r3, r2 - 8003aac: d100 bne.n 8003ab0 - 8003aae: e107 b.n 8003cc0 + 8003b32: 23a0 movs r3, #160 ; 0xa0 + 8003b34: 18fb adds r3, r7, r3 + 8003b36: 681b ldr r3, [r3, #0] + 8003b38: 4a83 ldr r2, [pc, #524] ; (8003d48 ) + 8003b3a: 4013 ands r3, r2 + 8003b3c: d100 bne.n 8003b40 + 8003b3e: e107 b.n 8003d50 { /* UART parity error interrupt occurred -------------------------------------*/ if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U)) - 8003ab0: 23a4 movs r3, #164 ; 0xa4 - 8003ab2: 18fb adds r3, r7, r3 - 8003ab4: 681b ldr r3, [r3, #0] - 8003ab6: 2201 movs r2, #1 - 8003ab8: 4013 ands r3, r2 - 8003aba: d012 beq.n 8003ae2 - 8003abc: 23a0 movs r3, #160 ; 0xa0 - 8003abe: 18fb adds r3, r7, r3 - 8003ac0: 681a ldr r2, [r3, #0] - 8003ac2: 2380 movs r3, #128 ; 0x80 - 8003ac4: 005b lsls r3, r3, #1 - 8003ac6: 4013 ands r3, r2 - 8003ac8: d00b beq.n 8003ae2 + 8003b40: 23a4 movs r3, #164 ; 0xa4 + 8003b42: 18fb adds r3, r7, r3 + 8003b44: 681b ldr r3, [r3, #0] + 8003b46: 2201 movs r2, #1 + 8003b48: 4013 ands r3, r2 + 8003b4a: d012 beq.n 8003b72 + 8003b4c: 23a0 movs r3, #160 ; 0xa0 + 8003b4e: 18fb adds r3, r7, r3 + 8003b50: 681a ldr r2, [r3, #0] + 8003b52: 2380 movs r3, #128 ; 0x80 + 8003b54: 005b lsls r3, r3, #1 + 8003b56: 4013 ands r3, r2 + 8003b58: d00b beq.n 8003b72 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF); - 8003aca: 687b ldr r3, [r7, #4] - 8003acc: 681b ldr r3, [r3, #0] - 8003ace: 2201 movs r2, #1 - 8003ad0: 621a str r2, [r3, #32] + 8003b5a: 687b ldr r3, [r7, #4] + 8003b5c: 681b ldr r3, [r3, #0] + 8003b5e: 2201 movs r2, #1 + 8003b60: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_PE; - 8003ad2: 687b ldr r3, [r7, #4] - 8003ad4: 2284 movs r2, #132 ; 0x84 - 8003ad6: 589b ldr r3, [r3, r2] - 8003ad8: 2201 movs r2, #1 - 8003ada: 431a orrs r2, r3 - 8003adc: 687b ldr r3, [r7, #4] - 8003ade: 2184 movs r1, #132 ; 0x84 - 8003ae0: 505a str r2, [r3, r1] + 8003b62: 687b ldr r3, [r7, #4] + 8003b64: 2284 movs r2, #132 ; 0x84 + 8003b66: 589b ldr r3, [r3, r2] + 8003b68: 2201 movs r2, #1 + 8003b6a: 431a orrs r2, r3 + 8003b6c: 687b ldr r3, [r7, #4] + 8003b6e: 2184 movs r1, #132 ; 0x84 + 8003b70: 505a str r2, [r3, r1] } /* UART frame error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8003ae2: 23a4 movs r3, #164 ; 0xa4 - 8003ae4: 18fb adds r3, r7, r3 - 8003ae6: 681b ldr r3, [r3, #0] - 8003ae8: 2202 movs r2, #2 - 8003aea: 4013 ands r3, r2 - 8003aec: d011 beq.n 8003b12 - 8003aee: 239c movs r3, #156 ; 0x9c - 8003af0: 18fb adds r3, r7, r3 - 8003af2: 681b ldr r3, [r3, #0] - 8003af4: 2201 movs r2, #1 - 8003af6: 4013 ands r3, r2 - 8003af8: d00b beq.n 8003b12 + 8003b72: 23a4 movs r3, #164 ; 0xa4 + 8003b74: 18fb adds r3, r7, r3 + 8003b76: 681b ldr r3, [r3, #0] + 8003b78: 2202 movs r2, #2 + 8003b7a: 4013 ands r3, r2 + 8003b7c: d011 beq.n 8003ba2 + 8003b7e: 239c movs r3, #156 ; 0x9c + 8003b80: 18fb adds r3, r7, r3 + 8003b82: 681b ldr r3, [r3, #0] + 8003b84: 2201 movs r2, #1 + 8003b86: 4013 ands r3, r2 + 8003b88: d00b beq.n 8003ba2 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF); - 8003afa: 687b ldr r3, [r7, #4] - 8003afc: 681b ldr r3, [r3, #0] - 8003afe: 2202 movs r2, #2 - 8003b00: 621a str r2, [r3, #32] + 8003b8a: 687b ldr r3, [r7, #4] + 8003b8c: 681b ldr r3, [r3, #0] + 8003b8e: 2202 movs r2, #2 + 8003b90: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_FE; - 8003b02: 687b ldr r3, [r7, #4] - 8003b04: 2284 movs r2, #132 ; 0x84 - 8003b06: 589b ldr r3, [r3, r2] - 8003b08: 2204 movs r2, #4 - 8003b0a: 431a orrs r2, r3 - 8003b0c: 687b ldr r3, [r7, #4] - 8003b0e: 2184 movs r1, #132 ; 0x84 - 8003b10: 505a str r2, [r3, r1] + 8003b92: 687b ldr r3, [r7, #4] + 8003b94: 2284 movs r2, #132 ; 0x84 + 8003b96: 589b ldr r3, [r3, r2] + 8003b98: 2204 movs r2, #4 + 8003b9a: 431a orrs r2, r3 + 8003b9c: 687b ldr r3, [r7, #4] + 8003b9e: 2184 movs r1, #132 ; 0x84 + 8003ba0: 505a str r2, [r3, r1] } /* UART noise error interrupt occurred --------------------------------------*/ if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U)) - 8003b12: 23a4 movs r3, #164 ; 0xa4 - 8003b14: 18fb adds r3, r7, r3 - 8003b16: 681b ldr r3, [r3, #0] - 8003b18: 2204 movs r2, #4 - 8003b1a: 4013 ands r3, r2 - 8003b1c: d011 beq.n 8003b42 - 8003b1e: 239c movs r3, #156 ; 0x9c - 8003b20: 18fb adds r3, r7, r3 - 8003b22: 681b ldr r3, [r3, #0] - 8003b24: 2201 movs r2, #1 - 8003b26: 4013 ands r3, r2 - 8003b28: d00b beq.n 8003b42 + 8003ba2: 23a4 movs r3, #164 ; 0xa4 + 8003ba4: 18fb adds r3, r7, r3 + 8003ba6: 681b ldr r3, [r3, #0] + 8003ba8: 2204 movs r2, #4 + 8003baa: 4013 ands r3, r2 + 8003bac: d011 beq.n 8003bd2 + 8003bae: 239c movs r3, #156 ; 0x9c + 8003bb0: 18fb adds r3, r7, r3 + 8003bb2: 681b ldr r3, [r3, #0] + 8003bb4: 2201 movs r2, #1 + 8003bb6: 4013 ands r3, r2 + 8003bb8: d00b beq.n 8003bd2 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF); - 8003b2a: 687b ldr r3, [r7, #4] - 8003b2c: 681b ldr r3, [r3, #0] - 8003b2e: 2204 movs r2, #4 - 8003b30: 621a str r2, [r3, #32] + 8003bba: 687b ldr r3, [r7, #4] + 8003bbc: 681b ldr r3, [r3, #0] + 8003bbe: 2204 movs r2, #4 + 8003bc0: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_NE; - 8003b32: 687b ldr r3, [r7, #4] - 8003b34: 2284 movs r2, #132 ; 0x84 - 8003b36: 589b ldr r3, [r3, r2] - 8003b38: 2202 movs r2, #2 - 8003b3a: 431a orrs r2, r3 - 8003b3c: 687b ldr r3, [r7, #4] - 8003b3e: 2184 movs r1, #132 ; 0x84 - 8003b40: 505a str r2, [r3, r1] + 8003bc2: 687b ldr r3, [r7, #4] + 8003bc4: 2284 movs r2, #132 ; 0x84 + 8003bc6: 589b ldr r3, [r3, r2] + 8003bc8: 2202 movs r2, #2 + 8003bca: 431a orrs r2, r3 + 8003bcc: 687b ldr r3, [r7, #4] + 8003bce: 2184 movs r1, #132 ; 0x84 + 8003bd0: 505a str r2, [r3, r1] } /* UART Over-Run interrupt occurred -----------------------------------------*/ if (((isrflags & USART_ISR_ORE) != 0U) - 8003b42: 23a4 movs r3, #164 ; 0xa4 - 8003b44: 18fb adds r3, r7, r3 - 8003b46: 681b ldr r3, [r3, #0] - 8003b48: 2208 movs r2, #8 - 8003b4a: 4013 ands r3, r2 - 8003b4c: d017 beq.n 8003b7e + 8003bd2: 23a4 movs r3, #164 ; 0xa4 + 8003bd4: 18fb adds r3, r7, r3 + 8003bd6: 681b ldr r3, [r3, #0] + 8003bd8: 2208 movs r2, #8 + 8003bda: 4013 ands r3, r2 + 8003bdc: d017 beq.n 8003c0e && (((cr1its & USART_CR1_RXNEIE) != 0U) || - 8003b4e: 23a0 movs r3, #160 ; 0xa0 - 8003b50: 18fb adds r3, r7, r3 - 8003b52: 681b ldr r3, [r3, #0] - 8003b54: 2220 movs r2, #32 - 8003b56: 4013 ands r3, r2 - 8003b58: d105 bne.n 8003b66 + 8003bde: 23a0 movs r3, #160 ; 0xa0 + 8003be0: 18fb adds r3, r7, r3 + 8003be2: 681b ldr r3, [r3, #0] + 8003be4: 2220 movs r2, #32 + 8003be6: 4013 ands r3, r2 + 8003be8: d105 bne.n 8003bf6 ((cr3its & USART_CR3_EIE) != 0U))) - 8003b5a: 239c movs r3, #156 ; 0x9c - 8003b5c: 18fb adds r3, r7, r3 - 8003b5e: 681b ldr r3, [r3, #0] - 8003b60: 2201 movs r2, #1 - 8003b62: 4013 ands r3, r2 + 8003bea: 239c movs r3, #156 ; 0x9c + 8003bec: 18fb adds r3, r7, r3 + 8003bee: 681b ldr r3, [r3, #0] + 8003bf0: 2201 movs r2, #1 + 8003bf2: 4013 ands r3, r2 && (((cr1its & USART_CR1_RXNEIE) != 0U) || - 8003b64: d00b beq.n 8003b7e + 8003bf4: d00b beq.n 8003c0e { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - 8003b66: 687b ldr r3, [r7, #4] - 8003b68: 681b ldr r3, [r3, #0] - 8003b6a: 2208 movs r2, #8 - 8003b6c: 621a str r2, [r3, #32] + 8003bf6: 687b ldr r3, [r7, #4] + 8003bf8: 681b ldr r3, [r3, #0] + 8003bfa: 2208 movs r2, #8 + 8003bfc: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_ORE; - 8003b6e: 687b ldr r3, [r7, #4] - 8003b70: 2284 movs r2, #132 ; 0x84 - 8003b72: 589b ldr r3, [r3, r2] - 8003b74: 2208 movs r2, #8 - 8003b76: 431a orrs r2, r3 - 8003b78: 687b ldr r3, [r7, #4] - 8003b7a: 2184 movs r1, #132 ; 0x84 - 8003b7c: 505a str r2, [r3, r1] + 8003bfe: 687b ldr r3, [r7, #4] + 8003c00: 2284 movs r2, #132 ; 0x84 + 8003c02: 589b ldr r3, [r3, r2] + 8003c04: 2208 movs r2, #8 + 8003c06: 431a orrs r2, r3 + 8003c08: 687b ldr r3, [r7, #4] + 8003c0a: 2184 movs r1, #132 ; 0x84 + 8003c0c: 505a str r2, [r3, r1] } /* UART Receiver Timeout interrupt occurred ---------------------------------*/ if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U)) - 8003b7e: 23a4 movs r3, #164 ; 0xa4 - 8003b80: 18fb adds r3, r7, r3 - 8003b82: 681a ldr r2, [r3, #0] - 8003b84: 2380 movs r3, #128 ; 0x80 - 8003b86: 011b lsls r3, r3, #4 - 8003b88: 4013 ands r3, r2 - 8003b8a: d013 beq.n 8003bb4 - 8003b8c: 23a0 movs r3, #160 ; 0xa0 - 8003b8e: 18fb adds r3, r7, r3 - 8003b90: 681a ldr r2, [r3, #0] - 8003b92: 2380 movs r3, #128 ; 0x80 - 8003b94: 04db lsls r3, r3, #19 - 8003b96: 4013 ands r3, r2 - 8003b98: d00c beq.n 8003bb4 + 8003c0e: 23a4 movs r3, #164 ; 0xa4 + 8003c10: 18fb adds r3, r7, r3 + 8003c12: 681a ldr r2, [r3, #0] + 8003c14: 2380 movs r3, #128 ; 0x80 + 8003c16: 011b lsls r3, r3, #4 + 8003c18: 4013 ands r3, r2 + 8003c1a: d013 beq.n 8003c44 + 8003c1c: 23a0 movs r3, #160 ; 0xa0 + 8003c1e: 18fb adds r3, r7, r3 + 8003c20: 681a ldr r2, [r3, #0] + 8003c22: 2380 movs r3, #128 ; 0x80 + 8003c24: 04db lsls r3, r3, #19 + 8003c26: 4013 ands r3, r2 + 8003c28: d00c beq.n 8003c44 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 8003b9a: 687b ldr r3, [r7, #4] - 8003b9c: 681b ldr r3, [r3, #0] - 8003b9e: 2280 movs r2, #128 ; 0x80 - 8003ba0: 0112 lsls r2, r2, #4 - 8003ba2: 621a str r2, [r3, #32] + 8003c2a: 687b ldr r3, [r7, #4] + 8003c2c: 681b ldr r3, [r3, #0] + 8003c2e: 2280 movs r2, #128 ; 0x80 + 8003c30: 0112 lsls r2, r2, #4 + 8003c32: 621a str r2, [r3, #32] huart->ErrorCode |= HAL_UART_ERROR_RTO; - 8003ba4: 687b ldr r3, [r7, #4] - 8003ba6: 2284 movs r2, #132 ; 0x84 - 8003ba8: 589b ldr r3, [r3, r2] - 8003baa: 2220 movs r2, #32 - 8003bac: 431a orrs r2, r3 - 8003bae: 687b ldr r3, [r7, #4] - 8003bb0: 2184 movs r1, #132 ; 0x84 - 8003bb2: 505a str r2, [r3, r1] + 8003c34: 687b ldr r3, [r7, #4] + 8003c36: 2284 movs r2, #132 ; 0x84 + 8003c38: 589b ldr r3, [r3, r2] + 8003c3a: 2220 movs r2, #32 + 8003c3c: 431a orrs r2, r3 + 8003c3e: 687b ldr r3, [r7, #4] + 8003c40: 2184 movs r1, #132 ; 0x84 + 8003c42: 505a str r2, [r3, r1] } /* Call UART Error Call back function if need be ----------------------------*/ if (huart->ErrorCode != HAL_UART_ERROR_NONE) - 8003bb4: 687b ldr r3, [r7, #4] - 8003bb6: 2284 movs r2, #132 ; 0x84 - 8003bb8: 589b ldr r3, [r3, r2] - 8003bba: 2b00 cmp r3, #0 - 8003bbc: d100 bne.n 8003bc0 - 8003bbe: e201 b.n 8003fc4 + 8003c44: 687b ldr r3, [r7, #4] + 8003c46: 2284 movs r2, #132 ; 0x84 + 8003c48: 589b ldr r3, [r3, r2] + 8003c4a: 2b00 cmp r3, #0 + 8003c4c: d100 bne.n 8003c50 + 8003c4e: e201 b.n 8004054 { /* UART in mode Receiver --------------------------------------------------*/ if (((isrflags & USART_ISR_RXNE) != 0U) - 8003bc0: 23a4 movs r3, #164 ; 0xa4 - 8003bc2: 18fb adds r3, r7, r3 - 8003bc4: 681b ldr r3, [r3, #0] - 8003bc6: 2220 movs r2, #32 - 8003bc8: 4013 ands r3, r2 - 8003bca: d00e beq.n 8003bea + 8003c50: 23a4 movs r3, #164 ; 0xa4 + 8003c52: 18fb adds r3, r7, r3 + 8003c54: 681b ldr r3, [r3, #0] + 8003c56: 2220 movs r2, #32 + 8003c58: 4013 ands r3, r2 + 8003c5a: d00e beq.n 8003c7a && ((cr1its & USART_CR1_RXNEIE) != 0U)) - 8003bcc: 23a0 movs r3, #160 ; 0xa0 - 8003bce: 18fb adds r3, r7, r3 - 8003bd0: 681b ldr r3, [r3, #0] - 8003bd2: 2220 movs r2, #32 - 8003bd4: 4013 ands r3, r2 - 8003bd6: d008 beq.n 8003bea + 8003c5c: 23a0 movs r3, #160 ; 0xa0 + 8003c5e: 18fb adds r3, r7, r3 + 8003c60: 681b ldr r3, [r3, #0] + 8003c62: 2220 movs r2, #32 + 8003c64: 4013 ands r3, r2 + 8003c66: d008 beq.n 8003c7a { if (huart->RxISR != NULL) - 8003bd8: 687b ldr r3, [r7, #4] - 8003bda: 6e9b ldr r3, [r3, #104] ; 0x68 - 8003bdc: 2b00 cmp r3, #0 - 8003bde: d004 beq.n 8003bea + 8003c68: 687b ldr r3, [r7, #4] + 8003c6a: 6e9b ldr r3, [r3, #104] ; 0x68 + 8003c6c: 2b00 cmp r3, #0 + 8003c6e: d004 beq.n 8003c7a { huart->RxISR(huart); - 8003be0: 687b ldr r3, [r7, #4] - 8003be2: 6e9b ldr r3, [r3, #104] ; 0x68 - 8003be4: 687a ldr r2, [r7, #4] - 8003be6: 0010 movs r0, r2 - 8003be8: 4798 blx r3 + 8003c70: 687b ldr r3, [r7, #4] + 8003c72: 6e9b ldr r3, [r3, #104] ; 0x68 + 8003c74: 687a ldr r2, [r7, #4] + 8003c76: 0010 movs r0, r2 + 8003c78: 4798 blx r3 /* If Error is to be considered as blocking : - Receiver Timeout error in Reception - Overrun error in Reception - any error occurs in DMA mode reception */ errorcode = huart->ErrorCode; - 8003bea: 687b ldr r3, [r7, #4] - 8003bec: 2284 movs r2, #132 ; 0x84 - 8003bee: 589b ldr r3, [r3, r2] - 8003bf0: 2194 movs r1, #148 ; 0x94 - 8003bf2: 187a adds r2, r7, r1 - 8003bf4: 6013 str r3, [r2, #0] + 8003c7a: 687b ldr r3, [r7, #4] + 8003c7c: 2284 movs r2, #132 ; 0x84 + 8003c7e: 589b ldr r3, [r3, r2] + 8003c80: 2194 movs r1, #148 ; 0x94 + 8003c82: 187a adds r2, r7, r1 + 8003c84: 6013 str r3, [r2, #0] if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 8003bf6: 687b ldr r3, [r7, #4] - 8003bf8: 681b ldr r3, [r3, #0] - 8003bfa: 689b ldr r3, [r3, #8] - 8003bfc: 2240 movs r2, #64 ; 0x40 - 8003bfe: 4013 ands r3, r2 - 8003c00: 2b40 cmp r3, #64 ; 0x40 - 8003c02: d004 beq.n 8003c0e + 8003c86: 687b ldr r3, [r7, #4] + 8003c88: 681b ldr r3, [r3, #0] + 8003c8a: 689b ldr r3, [r3, #8] + 8003c8c: 2240 movs r2, #64 ; 0x40 + 8003c8e: 4013 ands r3, r2 + 8003c90: 2b40 cmp r3, #64 ; 0x40 + 8003c92: d004 beq.n 8003c9e ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U)) - 8003c04: 187b adds r3, r7, r1 - 8003c06: 681b ldr r3, [r3, #0] - 8003c08: 2228 movs r2, #40 ; 0x28 - 8003c0a: 4013 ands r3, r2 + 8003c94: 187b adds r3, r7, r1 + 8003c96: 681b ldr r3, [r3, #0] + 8003c98: 2228 movs r2, #40 ; 0x28 + 8003c9a: 4013 ands r3, r2 if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) || - 8003c0c: d047 beq.n 8003c9e + 8003c9c: d047 beq.n 8003d2e { /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts, and disable Rx DMA request, if ongoing */ UART_EndRxTransfer(huart); - 8003c0e: 687b ldr r3, [r7, #4] - 8003c10: 0018 movs r0, r3 - 8003c12: f000 fe4b bl 80048ac + 8003c9e: 687b ldr r3, [r7, #4] + 8003ca0: 0018 movs r0, r3 + 8003ca2: f000 fe4b bl 800493c /* Abort the UART DMA Rx channel if enabled */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8003c16: 687b ldr r3, [r7, #4] - 8003c18: 681b ldr r3, [r3, #0] - 8003c1a: 689b ldr r3, [r3, #8] - 8003c1c: 2240 movs r2, #64 ; 0x40 - 8003c1e: 4013 ands r3, r2 - 8003c20: 2b40 cmp r3, #64 ; 0x40 - 8003c22: d137 bne.n 8003c94 + 8003ca6: 687b ldr r3, [r7, #4] + 8003ca8: 681b ldr r3, [r3, #0] + 8003caa: 689b ldr r3, [r3, #8] + 8003cac: 2240 movs r2, #64 ; 0x40 + 8003cae: 4013 ands r3, r2 + 8003cb0: 2b40 cmp r3, #64 ; 0x40 + 8003cb2: d137 bne.n 8003d24 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8003c24: f3ef 8310 mrs r3, PRIMASK - 8003c28: 663b str r3, [r7, #96] ; 0x60 + 8003cb4: f3ef 8310 mrs r3, PRIMASK + 8003cb8: 663b str r3, [r7, #96] ; 0x60 return(result); - 8003c2a: 6e3b ldr r3, [r7, #96] ; 0x60 + 8003cba: 6e3b ldr r3, [r7, #96] ; 0x60 { /* Disable the UART DMA Rx request if enabled */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8003c2c: 2090 movs r0, #144 ; 0x90 - 8003c2e: 183a adds r2, r7, r0 - 8003c30: 6013 str r3, [r2, #0] - 8003c32: 2301 movs r3, #1 - 8003c34: 667b str r3, [r7, #100] ; 0x64 + 8003cbc: 2090 movs r0, #144 ; 0x90 + 8003cbe: 183a adds r2, r7, r0 + 8003cc0: 6013 str r3, [r2, #0] + 8003cc2: 2301 movs r3, #1 + 8003cc4: 667b str r3, [r7, #100] ; 0x64 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003c36: 6e7b ldr r3, [r7, #100] ; 0x64 - 8003c38: f383 8810 msr PRIMASK, r3 + 8003cc6: 6e7b ldr r3, [r7, #100] ; 0x64 + 8003cc8: f383 8810 msr PRIMASK, r3 } - 8003c3c: 46c0 nop ; (mov r8, r8) - 8003c3e: 687b ldr r3, [r7, #4] - 8003c40: 681b ldr r3, [r3, #0] - 8003c42: 689a ldr r2, [r3, #8] - 8003c44: 687b ldr r3, [r7, #4] - 8003c46: 681b ldr r3, [r3, #0] - 8003c48: 2140 movs r1, #64 ; 0x40 - 8003c4a: 438a bics r2, r1 - 8003c4c: 609a str r2, [r3, #8] - 8003c4e: 183b adds r3, r7, r0 - 8003c50: 681b ldr r3, [r3, #0] - 8003c52: 66bb str r3, [r7, #104] ; 0x68 + 8003ccc: 46c0 nop ; (mov r8, r8) + 8003cce: 687b ldr r3, [r7, #4] + 8003cd0: 681b ldr r3, [r3, #0] + 8003cd2: 689a ldr r2, [r3, #8] + 8003cd4: 687b ldr r3, [r7, #4] + 8003cd6: 681b ldr r3, [r3, #0] + 8003cd8: 2140 movs r1, #64 ; 0x40 + 8003cda: 438a bics r2, r1 + 8003cdc: 609a str r2, [r3, #8] + 8003cde: 183b adds r3, r7, r0 + 8003ce0: 681b ldr r3, [r3, #0] + 8003ce2: 66bb str r3, [r7, #104] ; 0x68 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003c54: 6ebb ldr r3, [r7, #104] ; 0x68 - 8003c56: f383 8810 msr PRIMASK, r3 + 8003ce4: 6ebb ldr r3, [r7, #104] ; 0x68 + 8003ce6: f383 8810 msr PRIMASK, r3 } - 8003c5a: 46c0 nop ; (mov r8, r8) + 8003cea: 46c0 nop ; (mov r8, r8) /* Abort the UART DMA Rx channel */ if (huart->hdmarx != NULL) - 8003c5c: 687b ldr r3, [r7, #4] - 8003c5e: 6f5b ldr r3, [r3, #116] ; 0x74 - 8003c60: 2b00 cmp r3, #0 - 8003c62: d012 beq.n 8003c8a + 8003cec: 687b ldr r3, [r7, #4] + 8003cee: 6f5b ldr r3, [r3, #116] ; 0x74 + 8003cf0: 2b00 cmp r3, #0 + 8003cf2: d012 beq.n 8003d1a { /* Set the UART DMA Abort callback : will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */ huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError; - 8003c64: 687b ldr r3, [r7, #4] - 8003c66: 6f5b ldr r3, [r3, #116] ; 0x74 - 8003c68: 4a14 ldr r2, [pc, #80] ; (8003cbc ) - 8003c6a: 639a str r2, [r3, #56] ; 0x38 + 8003cf4: 687b ldr r3, [r7, #4] + 8003cf6: 6f5b ldr r3, [r3, #116] ; 0x74 + 8003cf8: 4a14 ldr r2, [pc, #80] ; (8003d4c ) + 8003cfa: 639a str r2, [r3, #56] ; 0x38 /* Abort DMA RX */ if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK) - 8003c6c: 687b ldr r3, [r7, #4] - 8003c6e: 6f5b ldr r3, [r3, #116] ; 0x74 - 8003c70: 0018 movs r0, r3 - 8003c72: f7fd fe71 bl 8001958 - 8003c76: 1e03 subs r3, r0, #0 - 8003c78: d01a beq.n 8003cb0 + 8003cfc: 687b ldr r3, [r7, #4] + 8003cfe: 6f5b ldr r3, [r3, #116] ; 0x74 + 8003d00: 0018 movs r0, r3 + 8003d02: f7fd fe71 bl 80019e8 + 8003d06: 1e03 subs r3, r0, #0 + 8003d08: d01a beq.n 8003d40 { /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */ huart->hdmarx->XferAbortCallback(huart->hdmarx); - 8003c7a: 687b ldr r3, [r7, #4] - 8003c7c: 6f5b ldr r3, [r3, #116] ; 0x74 - 8003c7e: 6b9a ldr r2, [r3, #56] ; 0x38 - 8003c80: 687b ldr r3, [r7, #4] - 8003c82: 6f5b ldr r3, [r3, #116] ; 0x74 - 8003c84: 0018 movs r0, r3 - 8003c86: 4790 blx r2 + 8003d0a: 687b ldr r3, [r7, #4] + 8003d0c: 6f5b ldr r3, [r3, #116] ; 0x74 + 8003d0e: 6b9a ldr r2, [r3, #56] ; 0x38 + 8003d10: 687b ldr r3, [r7, #4] + 8003d12: 6f5b ldr r3, [r3, #116] ; 0x74 + 8003d14: 0018 movs r0, r3 + 8003d16: 4790 blx r2 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8003c88: e012 b.n 8003cb0 + 8003d18: e012 b.n 8003d40 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8003c8a: 687b ldr r3, [r7, #4] - 8003c8c: 0018 movs r0, r3 - 8003c8e: f000 f9af bl 8003ff0 + 8003d1a: 687b ldr r3, [r7, #4] + 8003d1c: 0018 movs r0, r3 + 8003d1e: f000 f9af bl 8004080 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8003c92: e00d b.n 8003cb0 + 8003d22: e00d b.n 8003d40 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8003c94: 687b ldr r3, [r7, #4] - 8003c96: 0018 movs r0, r3 - 8003c98: f000 f9aa bl 8003ff0 + 8003d24: 687b ldr r3, [r7, #4] + 8003d26: 0018 movs r0, r3 + 8003d28: f000 f9aa bl 8004080 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8003c9c: e008 b.n 8003cb0 + 8003d2c: e008 b.n 8003d40 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8003c9e: 687b ldr r3, [r7, #4] - 8003ca0: 0018 movs r0, r3 - 8003ca2: f000 f9a5 bl 8003ff0 + 8003d2e: 687b ldr r3, [r7, #4] + 8003d30: 0018 movs r0, r3 + 8003d32: f000 f9a5 bl 8004080 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8003ca6: 687b ldr r3, [r7, #4] - 8003ca8: 2284 movs r2, #132 ; 0x84 - 8003caa: 2100 movs r1, #0 - 8003cac: 5099 str r1, [r3, r2] + 8003d36: 687b ldr r3, [r7, #4] + 8003d38: 2284 movs r2, #132 ; 0x84 + 8003d3a: 2100 movs r1, #0 + 8003d3c: 5099 str r1, [r3, r2] } } return; - 8003cae: e189 b.n 8003fc4 + 8003d3e: e189 b.n 8004054 if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8003cb0: 46c0 nop ; (mov r8, r8) + 8003d40: 46c0 nop ; (mov r8, r8) return; - 8003cb2: e187 b.n 8003fc4 - 8003cb4: 0000080f .word 0x0000080f - 8003cb8: 04000120 .word 0x04000120 - 8003cbc: 08004975 .word 0x08004975 + 8003d42: e187 b.n 8004054 + 8003d44: 0000080f .word 0x0000080f + 8003d48: 04000120 .word 0x04000120 + 8003d4c: 08004a05 .word 0x08004a05 } /* End if some error occurs */ /* Check current reception Mode : If Reception till IDLE event has been selected : */ if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8003cc0: 687b ldr r3, [r7, #4] - 8003cc2: 6e1b ldr r3, [r3, #96] ; 0x60 - 8003cc4: 2b01 cmp r3, #1 - 8003cc6: d000 beq.n 8003cca - 8003cc8: e13b b.n 8003f42 + 8003d50: 687b ldr r3, [r7, #4] + 8003d52: 6e1b ldr r3, [r3, #96] ; 0x60 + 8003d54: 2b01 cmp r3, #1 + 8003d56: d000 beq.n 8003d5a + 8003d58: e13b b.n 8003fd2 && ((isrflags & USART_ISR_IDLE) != 0U) - 8003cca: 23a4 movs r3, #164 ; 0xa4 - 8003ccc: 18fb adds r3, r7, r3 - 8003cce: 681b ldr r3, [r3, #0] - 8003cd0: 2210 movs r2, #16 - 8003cd2: 4013 ands r3, r2 - 8003cd4: d100 bne.n 8003cd8 - 8003cd6: e134 b.n 8003f42 + 8003d5a: 23a4 movs r3, #164 ; 0xa4 + 8003d5c: 18fb adds r3, r7, r3 + 8003d5e: 681b ldr r3, [r3, #0] + 8003d60: 2210 movs r2, #16 + 8003d62: 4013 ands r3, r2 + 8003d64: d100 bne.n 8003d68 + 8003d66: e134 b.n 8003fd2 && ((cr1its & USART_ISR_IDLE) != 0U)) - 8003cd8: 23a0 movs r3, #160 ; 0xa0 - 8003cda: 18fb adds r3, r7, r3 - 8003cdc: 681b ldr r3, [r3, #0] - 8003cde: 2210 movs r2, #16 - 8003ce0: 4013 ands r3, r2 - 8003ce2: d100 bne.n 8003ce6 - 8003ce4: e12d b.n 8003f42 + 8003d68: 23a0 movs r3, #160 ; 0xa0 + 8003d6a: 18fb adds r3, r7, r3 + 8003d6c: 681b ldr r3, [r3, #0] + 8003d6e: 2210 movs r2, #16 + 8003d70: 4013 ands r3, r2 + 8003d72: d100 bne.n 8003d76 + 8003d74: e12d b.n 8003fd2 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF); - 8003ce6: 687b ldr r3, [r7, #4] - 8003ce8: 681b ldr r3, [r3, #0] - 8003cea: 2210 movs r2, #16 - 8003cec: 621a str r2, [r3, #32] + 8003d76: 687b ldr r3, [r7, #4] + 8003d78: 681b ldr r3, [r3, #0] + 8003d7a: 2210 movs r2, #16 + 8003d7c: 621a str r2, [r3, #32] /* Check if DMA mode is enabled in UART */ if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) - 8003cee: 687b ldr r3, [r7, #4] - 8003cf0: 681b ldr r3, [r3, #0] - 8003cf2: 689b ldr r3, [r3, #8] - 8003cf4: 2240 movs r2, #64 ; 0x40 - 8003cf6: 4013 ands r3, r2 - 8003cf8: 2b40 cmp r3, #64 ; 0x40 - 8003cfa: d000 beq.n 8003cfe - 8003cfc: e0a1 b.n 8003e42 + 8003d7e: 687b ldr r3, [r7, #4] + 8003d80: 681b ldr r3, [r3, #0] + 8003d82: 689b ldr r3, [r3, #8] + 8003d84: 2240 movs r2, #64 ; 0x40 + 8003d86: 4013 ands r3, r2 + 8003d88: 2b40 cmp r3, #64 ; 0x40 + 8003d8a: d000 beq.n 8003d8e + 8003d8c: e0a1 b.n 8003ed2 { /* DMA mode enabled */ /* Check received length : If all expected data are received, do nothing, (DMA cplt callback will be called). Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx); - 8003cfe: 687b ldr r3, [r7, #4] - 8003d00: 6f5b ldr r3, [r3, #116] ; 0x74 - 8003d02: 681b ldr r3, [r3, #0] - 8003d04: 685a ldr r2, [r3, #4] - 8003d06: 217e movs r1, #126 ; 0x7e - 8003d08: 187b adds r3, r7, r1 - 8003d0a: 801a strh r2, [r3, #0] + 8003d8e: 687b ldr r3, [r7, #4] + 8003d90: 6f5b ldr r3, [r3, #116] ; 0x74 + 8003d92: 681b ldr r3, [r3, #0] + 8003d94: 685a ldr r2, [r3, #4] + 8003d96: 217e movs r1, #126 ; 0x7e + 8003d98: 187b adds r3, r7, r1 + 8003d9a: 801a strh r2, [r3, #0] if ((nb_remaining_rx_data > 0U) - 8003d0c: 187b adds r3, r7, r1 - 8003d0e: 881b ldrh r3, [r3, #0] - 8003d10: 2b00 cmp r3, #0 - 8003d12: d100 bne.n 8003d16 - 8003d14: e158 b.n 8003fc8 + 8003d9c: 187b adds r3, r7, r1 + 8003d9e: 881b ldrh r3, [r3, #0] + 8003da0: 2b00 cmp r3, #0 + 8003da2: d100 bne.n 8003da6 + 8003da4: e158 b.n 8004058 && (nb_remaining_rx_data < huart->RxXferSize)) - 8003d16: 687b ldr r3, [r7, #4] - 8003d18: 2258 movs r2, #88 ; 0x58 - 8003d1a: 5a9b ldrh r3, [r3, r2] - 8003d1c: 187a adds r2, r7, r1 - 8003d1e: 8812 ldrh r2, [r2, #0] - 8003d20: 429a cmp r2, r3 - 8003d22: d300 bcc.n 8003d26 - 8003d24: e150 b.n 8003fc8 + 8003da6: 687b ldr r3, [r7, #4] + 8003da8: 2258 movs r2, #88 ; 0x58 + 8003daa: 5a9b ldrh r3, [r3, r2] + 8003dac: 187a adds r2, r7, r1 + 8003dae: 8812 ldrh r2, [r2, #0] + 8003db0: 429a cmp r2, r3 + 8003db2: d300 bcc.n 8003db6 + 8003db4: e150 b.n 8004058 { /* Reception is not complete */ huart->RxXferCount = nb_remaining_rx_data; - 8003d26: 687b ldr r3, [r7, #4] - 8003d28: 187a adds r2, r7, r1 - 8003d2a: 215a movs r1, #90 ; 0x5a - 8003d2c: 8812 ldrh r2, [r2, #0] - 8003d2e: 525a strh r2, [r3, r1] + 8003db6: 687b ldr r3, [r7, #4] + 8003db8: 187a adds r2, r7, r1 + 8003dba: 215a movs r1, #90 ; 0x5a + 8003dbc: 8812 ldrh r2, [r2, #0] + 8003dbe: 525a strh r2, [r3, r1] /* In Normal mode, end DMA xfer and HAL UART Rx process*/ if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC)) - 8003d30: 687b ldr r3, [r7, #4] - 8003d32: 6f5b ldr r3, [r3, #116] ; 0x74 - 8003d34: 681b ldr r3, [r3, #0] - 8003d36: 681b ldr r3, [r3, #0] - 8003d38: 2220 movs r2, #32 - 8003d3a: 4013 ands r3, r2 - 8003d3c: d16f bne.n 8003e1e + 8003dc0: 687b ldr r3, [r7, #4] + 8003dc2: 6f5b ldr r3, [r3, #116] ; 0x74 + 8003dc4: 681b ldr r3, [r3, #0] + 8003dc6: 681b ldr r3, [r3, #0] + 8003dc8: 2220 movs r2, #32 + 8003dca: 4013 ands r3, r2 + 8003dcc: d16f bne.n 8003eae __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8003d3e: f3ef 8310 mrs r3, PRIMASK - 8003d42: 633b str r3, [r7, #48] ; 0x30 + 8003dce: f3ef 8310 mrs r3, PRIMASK + 8003dd2: 633b str r3, [r7, #48] ; 0x30 return(result); - 8003d44: 6b3b ldr r3, [r7, #48] ; 0x30 + 8003dd4: 6b3b ldr r3, [r7, #48] ; 0x30 { /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE); - 8003d46: 67bb str r3, [r7, #120] ; 0x78 - 8003d48: 2301 movs r3, #1 - 8003d4a: 637b str r3, [r7, #52] ; 0x34 + 8003dd6: 67bb str r3, [r7, #120] ; 0x78 + 8003dd8: 2301 movs r3, #1 + 8003dda: 637b str r3, [r7, #52] ; 0x34 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003d4c: 6b7b ldr r3, [r7, #52] ; 0x34 - 8003d4e: f383 8810 msr PRIMASK, r3 + 8003ddc: 6b7b ldr r3, [r7, #52] ; 0x34 + 8003dde: f383 8810 msr PRIMASK, r3 } - 8003d52: 46c0 nop ; (mov r8, r8) - 8003d54: 687b ldr r3, [r7, #4] - 8003d56: 681b ldr r3, [r3, #0] - 8003d58: 681a ldr r2, [r3, #0] - 8003d5a: 687b ldr r3, [r7, #4] - 8003d5c: 681b ldr r3, [r3, #0] - 8003d5e: 499e ldr r1, [pc, #632] ; (8003fd8 ) - 8003d60: 400a ands r2, r1 - 8003d62: 601a str r2, [r3, #0] - 8003d64: 6fbb ldr r3, [r7, #120] ; 0x78 - 8003d66: 63bb str r3, [r7, #56] ; 0x38 + 8003de2: 46c0 nop ; (mov r8, r8) + 8003de4: 687b ldr r3, [r7, #4] + 8003de6: 681b ldr r3, [r3, #0] + 8003de8: 681a ldr r2, [r3, #0] + 8003dea: 687b ldr r3, [r7, #4] + 8003dec: 681b ldr r3, [r3, #0] + 8003dee: 499e ldr r1, [pc, #632] ; (8004068 ) + 8003df0: 400a ands r2, r1 + 8003df2: 601a str r2, [r3, #0] + 8003df4: 6fbb ldr r3, [r7, #120] ; 0x78 + 8003df6: 63bb str r3, [r7, #56] ; 0x38 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003d68: 6bbb ldr r3, [r7, #56] ; 0x38 - 8003d6a: f383 8810 msr PRIMASK, r3 + 8003df8: 6bbb ldr r3, [r7, #56] ; 0x38 + 8003dfa: f383 8810 msr PRIMASK, r3 } - 8003d6e: 46c0 nop ; (mov r8, r8) + 8003dfe: 46c0 nop ; (mov r8, r8) __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8003d70: f3ef 8310 mrs r3, PRIMASK - 8003d74: 63fb str r3, [r7, #60] ; 0x3c + 8003e00: f3ef 8310 mrs r3, PRIMASK + 8003e04: 63fb str r3, [r7, #60] ; 0x3c return(result); - 8003d76: 6bfb ldr r3, [r7, #60] ; 0x3c + 8003e06: 6bfb ldr r3, [r7, #60] ; 0x3c ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8003d78: 677b str r3, [r7, #116] ; 0x74 - 8003d7a: 2301 movs r3, #1 - 8003d7c: 643b str r3, [r7, #64] ; 0x40 + 8003e08: 677b str r3, [r7, #116] ; 0x74 + 8003e0a: 2301 movs r3, #1 + 8003e0c: 643b str r3, [r7, #64] ; 0x40 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003d7e: 6c3b ldr r3, [r7, #64] ; 0x40 - 8003d80: f383 8810 msr PRIMASK, r3 + 8003e0e: 6c3b ldr r3, [r7, #64] ; 0x40 + 8003e10: f383 8810 msr PRIMASK, r3 } - 8003d84: 46c0 nop ; (mov r8, r8) - 8003d86: 687b ldr r3, [r7, #4] - 8003d88: 681b ldr r3, [r3, #0] - 8003d8a: 689a ldr r2, [r3, #8] - 8003d8c: 687b ldr r3, [r7, #4] - 8003d8e: 681b ldr r3, [r3, #0] - 8003d90: 2101 movs r1, #1 - 8003d92: 438a bics r2, r1 - 8003d94: 609a str r2, [r3, #8] - 8003d96: 6f7b ldr r3, [r7, #116] ; 0x74 - 8003d98: 647b str r3, [r7, #68] ; 0x44 + 8003e14: 46c0 nop ; (mov r8, r8) + 8003e16: 687b ldr r3, [r7, #4] + 8003e18: 681b ldr r3, [r3, #0] + 8003e1a: 689a ldr r2, [r3, #8] + 8003e1c: 687b ldr r3, [r7, #4] + 8003e1e: 681b ldr r3, [r3, #0] + 8003e20: 2101 movs r1, #1 + 8003e22: 438a bics r2, r1 + 8003e24: 609a str r2, [r3, #8] + 8003e26: 6f7b ldr r3, [r7, #116] ; 0x74 + 8003e28: 647b str r3, [r7, #68] ; 0x44 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003d9a: 6c7b ldr r3, [r7, #68] ; 0x44 - 8003d9c: f383 8810 msr PRIMASK, r3 + 8003e2a: 6c7b ldr r3, [r7, #68] ; 0x44 + 8003e2c: f383 8810 msr PRIMASK, r3 } - 8003da0: 46c0 nop ; (mov r8, r8) + 8003e30: 46c0 nop ; (mov r8, r8) __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8003da2: f3ef 8310 mrs r3, PRIMASK - 8003da6: 64bb str r3, [r7, #72] ; 0x48 + 8003e32: f3ef 8310 mrs r3, PRIMASK + 8003e36: 64bb str r3, [r7, #72] ; 0x48 return(result); - 8003da8: 6cbb ldr r3, [r7, #72] ; 0x48 + 8003e38: 6cbb ldr r3, [r7, #72] ; 0x48 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit in the UART CR3 register */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR); - 8003daa: 673b str r3, [r7, #112] ; 0x70 - 8003dac: 2301 movs r3, #1 - 8003dae: 64fb str r3, [r7, #76] ; 0x4c + 8003e3a: 673b str r3, [r7, #112] ; 0x70 + 8003e3c: 2301 movs r3, #1 + 8003e3e: 64fb str r3, [r7, #76] ; 0x4c __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003db0: 6cfb ldr r3, [r7, #76] ; 0x4c - 8003db2: f383 8810 msr PRIMASK, r3 + 8003e40: 6cfb ldr r3, [r7, #76] ; 0x4c + 8003e42: f383 8810 msr PRIMASK, r3 } - 8003db6: 46c0 nop ; (mov r8, r8) - 8003db8: 687b ldr r3, [r7, #4] - 8003dba: 681b ldr r3, [r3, #0] - 8003dbc: 689a ldr r2, [r3, #8] - 8003dbe: 687b ldr r3, [r7, #4] - 8003dc0: 681b ldr r3, [r3, #0] - 8003dc2: 2140 movs r1, #64 ; 0x40 - 8003dc4: 438a bics r2, r1 - 8003dc6: 609a str r2, [r3, #8] - 8003dc8: 6f3b ldr r3, [r7, #112] ; 0x70 - 8003dca: 653b str r3, [r7, #80] ; 0x50 + 8003e46: 46c0 nop ; (mov r8, r8) + 8003e48: 687b ldr r3, [r7, #4] + 8003e4a: 681b ldr r3, [r3, #0] + 8003e4c: 689a ldr r2, [r3, #8] + 8003e4e: 687b ldr r3, [r7, #4] + 8003e50: 681b ldr r3, [r3, #0] + 8003e52: 2140 movs r1, #64 ; 0x40 + 8003e54: 438a bics r2, r1 + 8003e56: 609a str r2, [r3, #8] + 8003e58: 6f3b ldr r3, [r7, #112] ; 0x70 + 8003e5a: 653b str r3, [r7, #80] ; 0x50 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003dcc: 6d3b ldr r3, [r7, #80] ; 0x50 - 8003dce: f383 8810 msr PRIMASK, r3 + 8003e5c: 6d3b ldr r3, [r7, #80] ; 0x50 + 8003e5e: f383 8810 msr PRIMASK, r3 } - 8003dd2: 46c0 nop ; (mov r8, r8) + 8003e62: 46c0 nop ; (mov r8, r8) /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8003dd4: 687b ldr r3, [r7, #4] - 8003dd6: 2280 movs r2, #128 ; 0x80 - 8003dd8: 2120 movs r1, #32 - 8003dda: 5099 str r1, [r3, r2] + 8003e64: 687b ldr r3, [r7, #4] + 8003e66: 2280 movs r2, #128 ; 0x80 + 8003e68: 2120 movs r1, #32 + 8003e6a: 5099 str r1, [r3, r2] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8003ddc: 687b ldr r3, [r7, #4] - 8003dde: 2200 movs r2, #0 - 8003de0: 661a str r2, [r3, #96] ; 0x60 + 8003e6c: 687b ldr r3, [r7, #4] + 8003e6e: 2200 movs r2, #0 + 8003e70: 661a str r2, [r3, #96] ; 0x60 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8003de2: f3ef 8310 mrs r3, PRIMASK - 8003de6: 657b str r3, [r7, #84] ; 0x54 + 8003e72: f3ef 8310 mrs r3, PRIMASK + 8003e76: 657b str r3, [r7, #84] ; 0x54 return(result); - 8003de8: 6d7b ldr r3, [r7, #84] ; 0x54 + 8003e78: 6d7b ldr r3, [r7, #84] ; 0x54 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8003dea: 66fb str r3, [r7, #108] ; 0x6c - 8003dec: 2301 movs r3, #1 - 8003dee: 65bb str r3, [r7, #88] ; 0x58 + 8003e7a: 66fb str r3, [r7, #108] ; 0x6c + 8003e7c: 2301 movs r3, #1 + 8003e7e: 65bb str r3, [r7, #88] ; 0x58 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003df0: 6dbb ldr r3, [r7, #88] ; 0x58 - 8003df2: f383 8810 msr PRIMASK, r3 + 8003e80: 6dbb ldr r3, [r7, #88] ; 0x58 + 8003e82: f383 8810 msr PRIMASK, r3 } - 8003df6: 46c0 nop ; (mov r8, r8) - 8003df8: 687b ldr r3, [r7, #4] - 8003dfa: 681b ldr r3, [r3, #0] - 8003dfc: 681a ldr r2, [r3, #0] - 8003dfe: 687b ldr r3, [r7, #4] - 8003e00: 681b ldr r3, [r3, #0] - 8003e02: 2110 movs r1, #16 - 8003e04: 438a bics r2, r1 - 8003e06: 601a str r2, [r3, #0] - 8003e08: 6efb ldr r3, [r7, #108] ; 0x6c - 8003e0a: 65fb str r3, [r7, #92] ; 0x5c + 8003e86: 46c0 nop ; (mov r8, r8) + 8003e88: 687b ldr r3, [r7, #4] + 8003e8a: 681b ldr r3, [r3, #0] + 8003e8c: 681a ldr r2, [r3, #0] + 8003e8e: 687b ldr r3, [r7, #4] + 8003e90: 681b ldr r3, [r3, #0] + 8003e92: 2110 movs r1, #16 + 8003e94: 438a bics r2, r1 + 8003e96: 601a str r2, [r3, #0] + 8003e98: 6efb ldr r3, [r7, #108] ; 0x6c + 8003e9a: 65fb str r3, [r7, #92] ; 0x5c __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003e0c: 6dfb ldr r3, [r7, #92] ; 0x5c - 8003e0e: f383 8810 msr PRIMASK, r3 + 8003e9c: 6dfb ldr r3, [r7, #92] ; 0x5c + 8003e9e: f383 8810 msr PRIMASK, r3 } - 8003e12: 46c0 nop ; (mov r8, r8) + 8003ea2: 46c0 nop ; (mov r8, r8) /* Last bytes received, so no need as the abort is immediate */ (void)HAL_DMA_Abort(huart->hdmarx); - 8003e14: 687b ldr r3, [r7, #4] - 8003e16: 6f5b ldr r3, [r3, #116] ; 0x74 - 8003e18: 0018 movs r0, r3 - 8003e1a: f7fd fd5d bl 80018d8 + 8003ea4: 687b ldr r3, [r7, #4] + 8003ea6: 6f5b ldr r3, [r3, #116] ; 0x74 + 8003ea8: 0018 movs r0, r3 + 8003eaa: f7fd fd5d bl 8001968 } /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 8003e1e: 687b ldr r3, [r7, #4] - 8003e20: 2202 movs r2, #2 - 8003e22: 665a str r2, [r3, #100] ; 0x64 + 8003eae: 687b ldr r3, [r7, #4] + 8003eb0: 2202 movs r2, #2 + 8003eb2: 665a str r2, [r3, #100] ; 0x64 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx Event callback*/ huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount)); - 8003e24: 687b ldr r3, [r7, #4] - 8003e26: 2258 movs r2, #88 ; 0x58 - 8003e28: 5a9a ldrh r2, [r3, r2] - 8003e2a: 687b ldr r3, [r7, #4] - 8003e2c: 215a movs r1, #90 ; 0x5a - 8003e2e: 5a5b ldrh r3, [r3, r1] - 8003e30: b29b uxth r3, r3 - 8003e32: 1ad3 subs r3, r2, r3 - 8003e34: b29a uxth r2, r3 - 8003e36: 687b ldr r3, [r7, #4] - 8003e38: 0011 movs r1, r2 - 8003e3a: 0018 movs r0, r3 - 8003e3c: f000 f8e0 bl 8004000 + 8003eb4: 687b ldr r3, [r7, #4] + 8003eb6: 2258 movs r2, #88 ; 0x58 + 8003eb8: 5a9a ldrh r2, [r3, r2] + 8003eba: 687b ldr r3, [r7, #4] + 8003ebc: 215a movs r1, #90 ; 0x5a + 8003ebe: 5a5b ldrh r3, [r3, r1] + 8003ec0: b29b uxth r3, r3 + 8003ec2: 1ad3 subs r3, r2, r3 + 8003ec4: b29a uxth r2, r3 + 8003ec6: 687b ldr r3, [r7, #4] + 8003ec8: 0011 movs r1, r2 + 8003eca: 0018 movs r0, r3 + 8003ecc: f000 f8e0 bl 8004090 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } return; - 8003e40: e0c2 b.n 8003fc8 + 8003ed0: e0c2 b.n 8004058 else { /* DMA mode not enabled */ /* Check received length : If all expected data are received, do nothing. Otherwise, if at least one data has already been received, IDLE event is to be notified to user */ uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount; - 8003e42: 687b ldr r3, [r7, #4] - 8003e44: 2258 movs r2, #88 ; 0x58 - 8003e46: 5a99 ldrh r1, [r3, r2] - 8003e48: 687b ldr r3, [r7, #4] - 8003e4a: 225a movs r2, #90 ; 0x5a - 8003e4c: 5a9b ldrh r3, [r3, r2] - 8003e4e: b29a uxth r2, r3 - 8003e50: 208e movs r0, #142 ; 0x8e - 8003e52: 183b adds r3, r7, r0 - 8003e54: 1a8a subs r2, r1, r2 - 8003e56: 801a strh r2, [r3, #0] + 8003ed2: 687b ldr r3, [r7, #4] + 8003ed4: 2258 movs r2, #88 ; 0x58 + 8003ed6: 5a99 ldrh r1, [r3, r2] + 8003ed8: 687b ldr r3, [r7, #4] + 8003eda: 225a movs r2, #90 ; 0x5a + 8003edc: 5a9b ldrh r3, [r3, r2] + 8003ede: b29a uxth r2, r3 + 8003ee0: 208e movs r0, #142 ; 0x8e + 8003ee2: 183b adds r3, r7, r0 + 8003ee4: 1a8a subs r2, r1, r2 + 8003ee6: 801a strh r2, [r3, #0] if ((huart->RxXferCount > 0U) - 8003e58: 687b ldr r3, [r7, #4] - 8003e5a: 225a movs r2, #90 ; 0x5a - 8003e5c: 5a9b ldrh r3, [r3, r2] - 8003e5e: b29b uxth r3, r3 - 8003e60: 2b00 cmp r3, #0 - 8003e62: d100 bne.n 8003e66 - 8003e64: e0b2 b.n 8003fcc + 8003ee8: 687b ldr r3, [r7, #4] + 8003eea: 225a movs r2, #90 ; 0x5a + 8003eec: 5a9b ldrh r3, [r3, r2] + 8003eee: b29b uxth r3, r3 + 8003ef0: 2b00 cmp r3, #0 + 8003ef2: d100 bne.n 8003ef6 + 8003ef4: e0b2 b.n 800405c && (nb_rx_data > 0U)) - 8003e66: 183b adds r3, r7, r0 - 8003e68: 881b ldrh r3, [r3, #0] - 8003e6a: 2b00 cmp r3, #0 - 8003e6c: d100 bne.n 8003e70 - 8003e6e: e0ad b.n 8003fcc + 8003ef6: 183b adds r3, r7, r0 + 8003ef8: 881b ldrh r3, [r3, #0] + 8003efa: 2b00 cmp r3, #0 + 8003efc: d100 bne.n 8003f00 + 8003efe: e0ad b.n 800405c __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8003e70: f3ef 8310 mrs r3, PRIMASK - 8003e74: 60fb str r3, [r7, #12] + 8003f00: f3ef 8310 mrs r3, PRIMASK + 8003f04: 60fb str r3, [r7, #12] return(result); - 8003e76: 68fb ldr r3, [r7, #12] + 8003f06: 68fb ldr r3, [r7, #12] { /* Disable the UART Parity Error Interrupt and RXNE interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8003e78: 2488 movs r4, #136 ; 0x88 - 8003e7a: 193a adds r2, r7, r4 - 8003e7c: 6013 str r3, [r2, #0] - 8003e7e: 2301 movs r3, #1 - 8003e80: 613b str r3, [r7, #16] + 8003f08: 2488 movs r4, #136 ; 0x88 + 8003f0a: 193a adds r2, r7, r4 + 8003f0c: 6013 str r3, [r2, #0] + 8003f0e: 2301 movs r3, #1 + 8003f10: 613b str r3, [r7, #16] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003e82: 693b ldr r3, [r7, #16] - 8003e84: f383 8810 msr PRIMASK, r3 + 8003f12: 693b ldr r3, [r7, #16] + 8003f14: f383 8810 msr PRIMASK, r3 } - 8003e88: 46c0 nop ; (mov r8, r8) - 8003e8a: 687b ldr r3, [r7, #4] - 8003e8c: 681b ldr r3, [r3, #0] - 8003e8e: 681a ldr r2, [r3, #0] - 8003e90: 687b ldr r3, [r7, #4] - 8003e92: 681b ldr r3, [r3, #0] - 8003e94: 4951 ldr r1, [pc, #324] ; (8003fdc ) - 8003e96: 400a ands r2, r1 - 8003e98: 601a str r2, [r3, #0] - 8003e9a: 193b adds r3, r7, r4 - 8003e9c: 681b ldr r3, [r3, #0] - 8003e9e: 617b str r3, [r7, #20] + 8003f18: 46c0 nop ; (mov r8, r8) + 8003f1a: 687b ldr r3, [r7, #4] + 8003f1c: 681b ldr r3, [r3, #0] + 8003f1e: 681a ldr r2, [r3, #0] + 8003f20: 687b ldr r3, [r7, #4] + 8003f22: 681b ldr r3, [r3, #0] + 8003f24: 4951 ldr r1, [pc, #324] ; (800406c ) + 8003f26: 400a ands r2, r1 + 8003f28: 601a str r2, [r3, #0] + 8003f2a: 193b adds r3, r7, r4 + 8003f2c: 681b ldr r3, [r3, #0] + 8003f2e: 617b str r3, [r7, #20] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003ea0: 697b ldr r3, [r7, #20] - 8003ea2: f383 8810 msr PRIMASK, r3 + 8003f30: 697b ldr r3, [r7, #20] + 8003f32: f383 8810 msr PRIMASK, r3 } - 8003ea6: 46c0 nop ; (mov r8, r8) + 8003f36: 46c0 nop ; (mov r8, r8) __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8003ea8: f3ef 8310 mrs r3, PRIMASK - 8003eac: 61bb str r3, [r7, #24] + 8003f38: f3ef 8310 mrs r3, PRIMASK + 8003f3c: 61bb str r3, [r7, #24] return(result); - 8003eae: 69bb ldr r3, [r7, #24] + 8003f3e: 69bb ldr r3, [r7, #24] /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */ ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8003eb0: 2484 movs r4, #132 ; 0x84 - 8003eb2: 193a adds r2, r7, r4 - 8003eb4: 6013 str r3, [r2, #0] - 8003eb6: 2301 movs r3, #1 - 8003eb8: 61fb str r3, [r7, #28] + 8003f40: 2484 movs r4, #132 ; 0x84 + 8003f42: 193a adds r2, r7, r4 + 8003f44: 6013 str r3, [r2, #0] + 8003f46: 2301 movs r3, #1 + 8003f48: 61fb str r3, [r7, #28] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003eba: 69fb ldr r3, [r7, #28] - 8003ebc: f383 8810 msr PRIMASK, r3 + 8003f4a: 69fb ldr r3, [r7, #28] + 8003f4c: f383 8810 msr PRIMASK, r3 } - 8003ec0: 46c0 nop ; (mov r8, r8) - 8003ec2: 687b ldr r3, [r7, #4] - 8003ec4: 681b ldr r3, [r3, #0] - 8003ec6: 689a ldr r2, [r3, #8] - 8003ec8: 687b ldr r3, [r7, #4] - 8003eca: 681b ldr r3, [r3, #0] - 8003ecc: 2101 movs r1, #1 - 8003ece: 438a bics r2, r1 - 8003ed0: 609a str r2, [r3, #8] - 8003ed2: 193b adds r3, r7, r4 - 8003ed4: 681b ldr r3, [r3, #0] - 8003ed6: 623b str r3, [r7, #32] + 8003f50: 46c0 nop ; (mov r8, r8) + 8003f52: 687b ldr r3, [r7, #4] + 8003f54: 681b ldr r3, [r3, #0] + 8003f56: 689a ldr r2, [r3, #8] + 8003f58: 687b ldr r3, [r7, #4] + 8003f5a: 681b ldr r3, [r3, #0] + 8003f5c: 2101 movs r1, #1 + 8003f5e: 438a bics r2, r1 + 8003f60: 609a str r2, [r3, #8] + 8003f62: 193b adds r3, r7, r4 + 8003f64: 681b ldr r3, [r3, #0] + 8003f66: 623b str r3, [r7, #32] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003ed8: 6a3b ldr r3, [r7, #32] - 8003eda: f383 8810 msr PRIMASK, r3 + 8003f68: 6a3b ldr r3, [r7, #32] + 8003f6a: f383 8810 msr PRIMASK, r3 } - 8003ede: 46c0 nop ; (mov r8, r8) + 8003f6e: 46c0 nop ; (mov r8, r8) /* Rx process is completed, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8003ee0: 687b ldr r3, [r7, #4] - 8003ee2: 2280 movs r2, #128 ; 0x80 - 8003ee4: 2120 movs r1, #32 - 8003ee6: 5099 str r1, [r3, r2] + 8003f70: 687b ldr r3, [r7, #4] + 8003f72: 2280 movs r2, #128 ; 0x80 + 8003f74: 2120 movs r1, #32 + 8003f76: 5099 str r1, [r3, r2] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 8003ee8: 687b ldr r3, [r7, #4] - 8003eea: 2200 movs r2, #0 - 8003eec: 661a str r2, [r3, #96] ; 0x60 + 8003f78: 687b ldr r3, [r7, #4] + 8003f7a: 2200 movs r2, #0 + 8003f7c: 661a str r2, [r3, #96] ; 0x60 /* Clear RxISR function pointer */ huart->RxISR = NULL; - 8003eee: 687b ldr r3, [r7, #4] - 8003ef0: 2200 movs r2, #0 - 8003ef2: 669a str r2, [r3, #104] ; 0x68 + 8003f7e: 687b ldr r3, [r7, #4] + 8003f80: 2200 movs r2, #0 + 8003f82: 669a str r2, [r3, #104] ; 0x68 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8003ef4: f3ef 8310 mrs r3, PRIMASK - 8003ef8: 627b str r3, [r7, #36] ; 0x24 + 8003f84: f3ef 8310 mrs r3, PRIMASK + 8003f88: 627b str r3, [r7, #36] ; 0x24 return(result); - 8003efa: 6a7b ldr r3, [r7, #36] ; 0x24 + 8003f8a: 6a7b ldr r3, [r7, #36] ; 0x24 ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8003efc: 2480 movs r4, #128 ; 0x80 - 8003efe: 193a adds r2, r7, r4 - 8003f00: 6013 str r3, [r2, #0] - 8003f02: 2301 movs r3, #1 - 8003f04: 62bb str r3, [r7, #40] ; 0x28 + 8003f8c: 2480 movs r4, #128 ; 0x80 + 8003f8e: 193a adds r2, r7, r4 + 8003f90: 6013 str r3, [r2, #0] + 8003f92: 2301 movs r3, #1 + 8003f94: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003f06: 6abb ldr r3, [r7, #40] ; 0x28 - 8003f08: f383 8810 msr PRIMASK, r3 + 8003f96: 6abb ldr r3, [r7, #40] ; 0x28 + 8003f98: f383 8810 msr PRIMASK, r3 } - 8003f0c: 46c0 nop ; (mov r8, r8) - 8003f0e: 687b ldr r3, [r7, #4] - 8003f10: 681b ldr r3, [r3, #0] - 8003f12: 681a ldr r2, [r3, #0] - 8003f14: 687b ldr r3, [r7, #4] - 8003f16: 681b ldr r3, [r3, #0] - 8003f18: 2110 movs r1, #16 - 8003f1a: 438a bics r2, r1 - 8003f1c: 601a str r2, [r3, #0] - 8003f1e: 193b adds r3, r7, r4 - 8003f20: 681b ldr r3, [r3, #0] - 8003f22: 62fb str r3, [r7, #44] ; 0x2c + 8003f9c: 46c0 nop ; (mov r8, r8) + 8003f9e: 687b ldr r3, [r7, #4] + 8003fa0: 681b ldr r3, [r3, #0] + 8003fa2: 681a ldr r2, [r3, #0] + 8003fa4: 687b ldr r3, [r7, #4] + 8003fa6: 681b ldr r3, [r3, #0] + 8003fa8: 2110 movs r1, #16 + 8003faa: 438a bics r2, r1 + 8003fac: 601a str r2, [r3, #0] + 8003fae: 193b adds r3, r7, r4 + 8003fb0: 681b ldr r3, [r3, #0] + 8003fb2: 62fb str r3, [r7, #44] ; 0x2c __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8003f24: 6afb ldr r3, [r7, #44] ; 0x2c - 8003f26: f383 8810 msr PRIMASK, r3 + 8003fb4: 6afb ldr r3, [r7, #44] ; 0x2c + 8003fb6: f383 8810 msr PRIMASK, r3 } - 8003f2a: 46c0 nop ; (mov r8, r8) + 8003fba: 46c0 nop ; (mov r8, r8) /* Initialize type of RxEvent that correspond to RxEvent callback execution; In this case, Rx Event type is Idle Event */ huart->RxEventType = HAL_UART_RXEVENT_IDLE; - 8003f2c: 687b ldr r3, [r7, #4] - 8003f2e: 2202 movs r2, #2 - 8003f30: 665a str r2, [r3, #100] ; 0x64 + 8003fbc: 687b ldr r3, [r7, #4] + 8003fbe: 2202 movs r2, #2 + 8003fc0: 665a str r2, [r3, #100] ; 0x64 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Rx complete callback*/ huart->RxEventCallback(huart, nb_rx_data); #else /*Call legacy weak Rx Event callback*/ HAL_UARTEx_RxEventCallback(huart, nb_rx_data); - 8003f32: 183b adds r3, r7, r0 - 8003f34: 881a ldrh r2, [r3, #0] - 8003f36: 687b ldr r3, [r7, #4] - 8003f38: 0011 movs r1, r2 - 8003f3a: 0018 movs r0, r3 - 8003f3c: f000 f860 bl 8004000 + 8003fc2: 183b adds r3, r7, r0 + 8003fc4: 881a ldrh r2, [r3, #0] + 8003fc6: 687b ldr r3, [r7, #4] + 8003fc8: 0011 movs r1, r2 + 8003fca: 0018 movs r0, r3 + 8003fcc: f000 f860 bl 8004090 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } return; - 8003f40: e044 b.n 8003fcc + 8003fd0: e044 b.n 800405c } } /* UART wakeup from Stop mode interrupt occurred ---------------------------*/ if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U)) - 8003f42: 23a4 movs r3, #164 ; 0xa4 - 8003f44: 18fb adds r3, r7, r3 - 8003f46: 681a ldr r2, [r3, #0] - 8003f48: 2380 movs r3, #128 ; 0x80 - 8003f4a: 035b lsls r3, r3, #13 - 8003f4c: 4013 ands r3, r2 - 8003f4e: d010 beq.n 8003f72 - 8003f50: 239c movs r3, #156 ; 0x9c - 8003f52: 18fb adds r3, r7, r3 - 8003f54: 681a ldr r2, [r3, #0] - 8003f56: 2380 movs r3, #128 ; 0x80 - 8003f58: 03db lsls r3, r3, #15 - 8003f5a: 4013 ands r3, r2 - 8003f5c: d009 beq.n 8003f72 + 8003fd2: 23a4 movs r3, #164 ; 0xa4 + 8003fd4: 18fb adds r3, r7, r3 + 8003fd6: 681a ldr r2, [r3, #0] + 8003fd8: 2380 movs r3, #128 ; 0x80 + 8003fda: 035b lsls r3, r3, #13 + 8003fdc: 4013 ands r3, r2 + 8003fde: d010 beq.n 8004002 + 8003fe0: 239c movs r3, #156 ; 0x9c + 8003fe2: 18fb adds r3, r7, r3 + 8003fe4: 681a ldr r2, [r3, #0] + 8003fe6: 2380 movs r3, #128 ; 0x80 + 8003fe8: 03db lsls r3, r3, #15 + 8003fea: 4013 ands r3, r2 + 8003fec: d009 beq.n 8004002 { __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF); - 8003f5e: 687b ldr r3, [r7, #4] - 8003f60: 681b ldr r3, [r3, #0] - 8003f62: 2280 movs r2, #128 ; 0x80 - 8003f64: 0352 lsls r2, r2, #13 - 8003f66: 621a str r2, [r3, #32] + 8003fee: 687b ldr r3, [r7, #4] + 8003ff0: 681b ldr r3, [r3, #0] + 8003ff2: 2280 movs r2, #128 ; 0x80 + 8003ff4: 0352 lsls r2, r2, #13 + 8003ff6: 621a str r2, [r3, #32] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /* Call registered Wakeup Callback */ huart->WakeupCallback(huart); #else /* Call legacy weak Wakeup Callback */ HAL_UARTEx_WakeupCallback(huart); - 8003f68: 687b ldr r3, [r7, #4] - 8003f6a: 0018 movs r0, r3 - 8003f6c: f000 fdfb bl 8004b66 + 8003ff8: 687b ldr r3, [r7, #4] + 8003ffa: 0018 movs r0, r3 + 8003ffc: f000 fdfb bl 8004bf6 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ return; - 8003f70: e02f b.n 8003fd2 + 8004000: e02f b.n 8004062 } /* UART in mode Transmitter ------------------------------------------------*/ if (((isrflags & USART_ISR_TXE) != 0U) - 8003f72: 23a4 movs r3, #164 ; 0xa4 - 8003f74: 18fb adds r3, r7, r3 - 8003f76: 681b ldr r3, [r3, #0] - 8003f78: 2280 movs r2, #128 ; 0x80 - 8003f7a: 4013 ands r3, r2 - 8003f7c: d00f beq.n 8003f9e + 8004002: 23a4 movs r3, #164 ; 0xa4 + 8004004: 18fb adds r3, r7, r3 + 8004006: 681b ldr r3, [r3, #0] + 8004008: 2280 movs r2, #128 ; 0x80 + 800400a: 4013 ands r3, r2 + 800400c: d00f beq.n 800402e && ((cr1its & USART_CR1_TXEIE) != 0U)) - 8003f7e: 23a0 movs r3, #160 ; 0xa0 - 8003f80: 18fb adds r3, r7, r3 - 8003f82: 681b ldr r3, [r3, #0] - 8003f84: 2280 movs r2, #128 ; 0x80 - 8003f86: 4013 ands r3, r2 - 8003f88: d009 beq.n 8003f9e + 800400e: 23a0 movs r3, #160 ; 0xa0 + 8004010: 18fb adds r3, r7, r3 + 8004012: 681b ldr r3, [r3, #0] + 8004014: 2280 movs r2, #128 ; 0x80 + 8004016: 4013 ands r3, r2 + 8004018: d009 beq.n 800402e { if (huart->TxISR != NULL) - 8003f8a: 687b ldr r3, [r7, #4] - 8003f8c: 6edb ldr r3, [r3, #108] ; 0x6c - 8003f8e: 2b00 cmp r3, #0 - 8003f90: d01e beq.n 8003fd0 + 800401a: 687b ldr r3, [r7, #4] + 800401c: 6edb ldr r3, [r3, #108] ; 0x6c + 800401e: 2b00 cmp r3, #0 + 8004020: d01e beq.n 8004060 { huart->TxISR(huart); - 8003f92: 687b ldr r3, [r7, #4] - 8003f94: 6edb ldr r3, [r3, #108] ; 0x6c - 8003f96: 687a ldr r2, [r7, #4] - 8003f98: 0010 movs r0, r2 - 8003f9a: 4798 blx r3 + 8004022: 687b ldr r3, [r7, #4] + 8004024: 6edb ldr r3, [r3, #108] ; 0x6c + 8004026: 687a ldr r2, [r7, #4] + 8004028: 0010 movs r0, r2 + 800402a: 4798 blx r3 } return; - 8003f9c: e018 b.n 8003fd0 + 800402c: e018 b.n 8004060 } /* UART in mode Transmitter (transmission end) -----------------------------*/ if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U)) - 8003f9e: 23a4 movs r3, #164 ; 0xa4 - 8003fa0: 18fb adds r3, r7, r3 - 8003fa2: 681b ldr r3, [r3, #0] - 8003fa4: 2240 movs r2, #64 ; 0x40 - 8003fa6: 4013 ands r3, r2 - 8003fa8: d013 beq.n 8003fd2 - 8003faa: 23a0 movs r3, #160 ; 0xa0 - 8003fac: 18fb adds r3, r7, r3 - 8003fae: 681b ldr r3, [r3, #0] - 8003fb0: 2240 movs r2, #64 ; 0x40 - 8003fb2: 4013 ands r3, r2 - 8003fb4: d00d beq.n 8003fd2 + 800402e: 23a4 movs r3, #164 ; 0xa4 + 8004030: 18fb adds r3, r7, r3 + 8004032: 681b ldr r3, [r3, #0] + 8004034: 2240 movs r2, #64 ; 0x40 + 8004036: 4013 ands r3, r2 + 8004038: d013 beq.n 8004062 + 800403a: 23a0 movs r3, #160 ; 0xa0 + 800403c: 18fb adds r3, r7, r3 + 800403e: 681b ldr r3, [r3, #0] + 8004040: 2240 movs r2, #64 ; 0x40 + 8004042: 4013 ands r3, r2 + 8004044: d00d beq.n 8004062 { UART_EndTransmit_IT(huart); - 8003fb6: 687b ldr r3, [r7, #4] - 8003fb8: 0018 movs r0, r3 - 8003fba: f000 fda9 bl 8004b10 + 8004046: 687b ldr r3, [r7, #4] + 8004048: 0018 movs r0, r3 + 800404a: f000 fda9 bl 8004ba0 return; - 8003fbe: e008 b.n 8003fd2 + 800404e: e008 b.n 8004062 return; - 8003fc0: 46c0 nop ; (mov r8, r8) - 8003fc2: e006 b.n 8003fd2 + 8004050: 46c0 nop ; (mov r8, r8) + 8004052: e006 b.n 8004062 return; - 8003fc4: 46c0 nop ; (mov r8, r8) - 8003fc6: e004 b.n 8003fd2 + 8004054: 46c0 nop ; (mov r8, r8) + 8004056: e004 b.n 8004062 return; - 8003fc8: 46c0 nop ; (mov r8, r8) - 8003fca: e002 b.n 8003fd2 + 8004058: 46c0 nop ; (mov r8, r8) + 800405a: e002 b.n 8004062 return; - 8003fcc: 46c0 nop ; (mov r8, r8) - 8003fce: e000 b.n 8003fd2 + 800405c: 46c0 nop ; (mov r8, r8) + 800405e: e000 b.n 8004062 return; - 8003fd0: 46c0 nop ; (mov r8, r8) + 8004060: 46c0 nop ; (mov r8, r8) } } - 8003fd2: 46bd mov sp, r7 - 8003fd4: b02b add sp, #172 ; 0xac - 8003fd6: bd90 pop {r4, r7, pc} - 8003fd8: fffffeff .word 0xfffffeff - 8003fdc: fffffedf .word 0xfffffedf + 8004062: 46bd mov sp, r7 + 8004064: b02b add sp, #172 ; 0xac + 8004066: bd90 pop {r4, r7, pc} + 8004068: fffffeff .word 0xfffffeff + 800406c: fffffedf .word 0xfffffedf -08003fe0 : +08004070 : * @brief Tx Transfer completed callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { - 8003fe0: b580 push {r7, lr} - 8003fe2: b082 sub sp, #8 - 8003fe4: af00 add r7, sp, #0 - 8003fe6: 6078 str r0, [r7, #4] + 8004070: b580 push {r7, lr} + 8004072: b082 sub sp, #8 + 8004074: af00 add r7, sp, #0 + 8004076: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UART_TxCpltCallback can be implemented in the user file. */ } - 8003fe8: 46c0 nop ; (mov r8, r8) - 8003fea: 46bd mov sp, r7 - 8003fec: b002 add sp, #8 - 8003fee: bd80 pop {r7, pc} + 8004078: 46c0 nop ; (mov r8, r8) + 800407a: 46bd mov sp, r7 + 800407c: b002 add sp, #8 + 800407e: bd80 pop {r7, pc} -08003ff0 : +08004080 : * @brief UART error callback. * @param huart UART handle. * @retval None */ __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) { - 8003ff0: b580 push {r7, lr} - 8003ff2: b082 sub sp, #8 - 8003ff4: af00 add r7, sp, #0 - 8003ff6: 6078 str r0, [r7, #4] + 8004080: b580 push {r7, lr} + 8004082: b082 sub sp, #8 + 8004084: af00 add r7, sp, #0 + 8004086: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UART_ErrorCallback can be implemented in the user file. */ } - 8003ff8: 46c0 nop ; (mov r8, r8) - 8003ffa: 46bd mov sp, r7 - 8003ffc: b002 add sp, #8 - 8003ffe: bd80 pop {r7, pc} + 8004088: 46c0 nop ; (mov r8, r8) + 800408a: 46bd mov sp, r7 + 800408c: b002 add sp, #8 + 800408e: bd80 pop {r7, pc} -08004000 : +08004090 : * @param Size Number of data available in application reception buffer (indicates a position in * reception buffer until which, data are available) * @retval None */ __weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size) { - 8004000: b580 push {r7, lr} - 8004002: b082 sub sp, #8 - 8004004: af00 add r7, sp, #0 - 8004006: 6078 str r0, [r7, #4] - 8004008: 000a movs r2, r1 - 800400a: 1cbb adds r3, r7, #2 - 800400c: 801a strh r2, [r3, #0] + 8004090: b580 push {r7, lr} + 8004092: b082 sub sp, #8 + 8004094: af00 add r7, sp, #0 + 8004096: 6078 str r0, [r7, #4] + 8004098: 000a movs r2, r1 + 800409a: 1cbb adds r3, r7, #2 + 800409c: 801a strh r2, [r3, #0] UNUSED(Size); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_RxEventCallback can be implemented in the user file. */ } - 800400e: 46c0 nop ; (mov r8, r8) - 8004010: 46bd mov sp, r7 - 8004012: b002 add sp, #8 - 8004014: bd80 pop {r7, pc} + 800409e: 46c0 nop ; (mov r8, r8) + 80040a0: 46bd mov sp, r7 + 80040a2: b002 add sp, #8 + 80040a4: bd80 pop {r7, pc} ... -08004018 : +080040a8 : * @brief Configure the UART peripheral. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) { - 8004018: b5b0 push {r4, r5, r7, lr} - 800401a: b08e sub sp, #56 ; 0x38 - 800401c: af00 add r7, sp, #0 - 800401e: 61f8 str r0, [r7, #28] + 80040a8: b5b0 push {r4, r5, r7, lr} + 80040aa: b08e sub sp, #56 ; 0x38 + 80040ac: af00 add r7, sp, #0 + 80040ae: 61f8 str r0, [r7, #28] uint32_t tmpreg; uint16_t brrtemp; UART_ClockSourceTypeDef clocksource; uint32_t usartdiv; HAL_StatusTypeDef ret = HAL_OK; - 8004020: 231a movs r3, #26 - 8004022: 2218 movs r2, #24 - 8004024: 189b adds r3, r3, r2 - 8004026: 19db adds r3, r3, r7 - 8004028: 2200 movs r2, #0 - 800402a: 701a strb r2, [r3, #0] + 80040b0: 231a movs r3, #26 + 80040b2: 2218 movs r2, #24 + 80040b4: 189b adds r3, r3, r2 + 80040b6: 19db adds r3, r3, r7 + 80040b8: 2200 movs r2, #0 + 80040ba: 701a strb r2, [r3, #0] * the UART Word Length, Parity, Mode and oversampling: * set the M bits according to huart->Init.WordLength value * set PCE and PS bits according to huart->Init.Parity value * set TE and RE bits according to huart->Init.Mode value * set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; - 800402c: 69fb ldr r3, [r7, #28] - 800402e: 689a ldr r2, [r3, #8] - 8004030: 69fb ldr r3, [r7, #28] - 8004032: 691b ldr r3, [r3, #16] - 8004034: 431a orrs r2, r3 - 8004036: 69fb ldr r3, [r7, #28] - 8004038: 695b ldr r3, [r3, #20] - 800403a: 431a orrs r2, r3 - 800403c: 69fb ldr r3, [r7, #28] - 800403e: 69db ldr r3, [r3, #28] - 8004040: 4313 orrs r3, r2 - 8004042: 637b str r3, [r7, #52] ; 0x34 + 80040bc: 69fb ldr r3, [r7, #28] + 80040be: 689a ldr r2, [r3, #8] + 80040c0: 69fb ldr r3, [r7, #28] + 80040c2: 691b ldr r3, [r3, #16] + 80040c4: 431a orrs r2, r3 + 80040c6: 69fb ldr r3, [r7, #28] + 80040c8: 695b ldr r3, [r3, #20] + 80040ca: 431a orrs r2, r3 + 80040cc: 69fb ldr r3, [r7, #28] + 80040ce: 69db ldr r3, [r3, #28] + 80040d0: 4313 orrs r3, r2 + 80040d2: 637b str r3, [r7, #52] ; 0x34 MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); - 8004044: 69fb ldr r3, [r7, #28] - 8004046: 681b ldr r3, [r3, #0] - 8004048: 681b ldr r3, [r3, #0] - 800404a: 4ac6 ldr r2, [pc, #792] ; (8004364 ) - 800404c: 4013 ands r3, r2 - 800404e: 0019 movs r1, r3 - 8004050: 69fb ldr r3, [r7, #28] - 8004052: 681b ldr r3, [r3, #0] - 8004054: 6b7a ldr r2, [r7, #52] ; 0x34 - 8004056: 430a orrs r2, r1 - 8004058: 601a str r2, [r3, #0] + 80040d4: 69fb ldr r3, [r7, #28] + 80040d6: 681b ldr r3, [r3, #0] + 80040d8: 681b ldr r3, [r3, #0] + 80040da: 4ac6 ldr r2, [pc, #792] ; (80043f4 ) + 80040dc: 4013 ands r3, r2 + 80040de: 0019 movs r1, r3 + 80040e0: 69fb ldr r3, [r7, #28] + 80040e2: 681b ldr r3, [r3, #0] + 80040e4: 6b7a ldr r2, [r7, #52] ; 0x34 + 80040e6: 430a orrs r2, r1 + 80040e8: 601a str r2, [r3, #0] /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); - 800405a: 69fb ldr r3, [r7, #28] - 800405c: 681b ldr r3, [r3, #0] - 800405e: 685b ldr r3, [r3, #4] - 8004060: 4ac1 ldr r2, [pc, #772] ; (8004368 ) - 8004062: 4013 ands r3, r2 - 8004064: 0019 movs r1, r3 - 8004066: 69fb ldr r3, [r7, #28] - 8004068: 68da ldr r2, [r3, #12] - 800406a: 69fb ldr r3, [r7, #28] - 800406c: 681b ldr r3, [r3, #0] - 800406e: 430a orrs r2, r1 - 8004070: 605a str r2, [r3, #4] + 80040ea: 69fb ldr r3, [r7, #28] + 80040ec: 681b ldr r3, [r3, #0] + 80040ee: 685b ldr r3, [r3, #4] + 80040f0: 4ac1 ldr r2, [pc, #772] ; (80043f8 ) + 80040f2: 4013 ands r3, r2 + 80040f4: 0019 movs r1, r3 + 80040f6: 69fb ldr r3, [r7, #28] + 80040f8: 68da ldr r2, [r3, #12] + 80040fa: 69fb ldr r3, [r7, #28] + 80040fc: 681b ldr r3, [r3, #0] + 80040fe: 430a orrs r2, r1 + 8004100: 605a str r2, [r3, #4] /* Configure * - UART HardWare Flow Control: set CTSE and RTSE bits according * to huart->Init.HwFlowCtl value * - one-bit sampling method versus three samples' majority rule according * to huart->Init.OneBitSampling (not applicable to LPUART) */ tmpreg = (uint32_t)huart->Init.HwFlowCtl; - 8004072: 69fb ldr r3, [r7, #28] - 8004074: 699b ldr r3, [r3, #24] - 8004076: 637b str r3, [r7, #52] ; 0x34 + 8004102: 69fb ldr r3, [r7, #28] + 8004104: 699b ldr r3, [r3, #24] + 8004106: 637b str r3, [r7, #52] ; 0x34 if (!(UART_INSTANCE_LOWPOWER(huart))) - 8004078: 69fb ldr r3, [r7, #28] - 800407a: 681b ldr r3, [r3, #0] - 800407c: 4abb ldr r2, [pc, #748] ; (800436c ) - 800407e: 4293 cmp r3, r2 - 8004080: d004 beq.n 800408c + 8004108: 69fb ldr r3, [r7, #28] + 800410a: 681b ldr r3, [r3, #0] + 800410c: 4abb ldr r2, [pc, #748] ; (80043fc ) + 800410e: 4293 cmp r3, r2 + 8004110: d004 beq.n 800411c { tmpreg |= huart->Init.OneBitSampling; - 8004082: 69fb ldr r3, [r7, #28] - 8004084: 6a1b ldr r3, [r3, #32] - 8004086: 6b7a ldr r2, [r7, #52] ; 0x34 - 8004088: 4313 orrs r3, r2 - 800408a: 637b str r3, [r7, #52] ; 0x34 + 8004112: 69fb ldr r3, [r7, #28] + 8004114: 6a1b ldr r3, [r3, #32] + 8004116: 6b7a ldr r2, [r7, #52] ; 0x34 + 8004118: 4313 orrs r3, r2 + 800411a: 637b str r3, [r7, #52] ; 0x34 } MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); - 800408c: 69fb ldr r3, [r7, #28] - 800408e: 681b ldr r3, [r3, #0] - 8004090: 689b ldr r3, [r3, #8] - 8004092: 4ab7 ldr r2, [pc, #732] ; (8004370 ) - 8004094: 4013 ands r3, r2 - 8004096: 0019 movs r1, r3 - 8004098: 69fb ldr r3, [r7, #28] - 800409a: 681b ldr r3, [r3, #0] - 800409c: 6b7a ldr r2, [r7, #52] ; 0x34 - 800409e: 430a orrs r2, r1 - 80040a0: 609a str r2, [r3, #8] + 800411c: 69fb ldr r3, [r7, #28] + 800411e: 681b ldr r3, [r3, #0] + 8004120: 689b ldr r3, [r3, #8] + 8004122: 4ab7 ldr r2, [pc, #732] ; (8004400 ) + 8004124: 4013 ands r3, r2 + 8004126: 0019 movs r1, r3 + 8004128: 69fb ldr r3, [r7, #28] + 800412a: 681b ldr r3, [r3, #0] + 800412c: 6b7a ldr r2, [r7, #52] ; 0x34 + 800412e: 430a orrs r2, r1 + 8004130: 609a str r2, [r3, #8] /*-------------------------- USART BRR Configuration -----------------------*/ UART_GETCLOCKSOURCE(huart, clocksource); - 80040a2: 69fb ldr r3, [r7, #28] - 80040a4: 681b ldr r3, [r3, #0] - 80040a6: 4ab3 ldr r2, [pc, #716] ; (8004374 ) - 80040a8: 4293 cmp r3, r2 - 80040aa: d131 bne.n 8004110 - 80040ac: 4bb2 ldr r3, [pc, #712] ; (8004378 ) - 80040ae: 6cdb ldr r3, [r3, #76] ; 0x4c - 80040b0: 2203 movs r2, #3 - 80040b2: 4013 ands r3, r2 - 80040b4: 2b03 cmp r3, #3 - 80040b6: d01d beq.n 80040f4 - 80040b8: d823 bhi.n 8004102 - 80040ba: 2b02 cmp r3, #2 - 80040bc: d00c beq.n 80040d8 - 80040be: d820 bhi.n 8004102 - 80040c0: 2b00 cmp r3, #0 - 80040c2: d002 beq.n 80040ca - 80040c4: 2b01 cmp r3, #1 - 80040c6: d00e beq.n 80040e6 - 80040c8: e01b b.n 8004102 - 80040ca: 231b movs r3, #27 - 80040cc: 2218 movs r2, #24 - 80040ce: 189b adds r3, r3, r2 - 80040d0: 19db adds r3, r3, r7 - 80040d2: 2201 movs r2, #1 - 80040d4: 701a strb r2, [r3, #0] - 80040d6: e09c b.n 8004212 - 80040d8: 231b movs r3, #27 - 80040da: 2218 movs r2, #24 - 80040dc: 189b adds r3, r3, r2 - 80040de: 19db adds r3, r3, r7 - 80040e0: 2202 movs r2, #2 - 80040e2: 701a strb r2, [r3, #0] - 80040e4: e095 b.n 8004212 - 80040e6: 231b movs r3, #27 - 80040e8: 2218 movs r2, #24 - 80040ea: 189b adds r3, r3, r2 - 80040ec: 19db adds r3, r3, r7 - 80040ee: 2204 movs r2, #4 - 80040f0: 701a strb r2, [r3, #0] - 80040f2: e08e b.n 8004212 - 80040f4: 231b movs r3, #27 - 80040f6: 2218 movs r2, #24 - 80040f8: 189b adds r3, r3, r2 - 80040fa: 19db adds r3, r3, r7 - 80040fc: 2208 movs r2, #8 - 80040fe: 701a strb r2, [r3, #0] - 8004100: e087 b.n 8004212 - 8004102: 231b movs r3, #27 - 8004104: 2218 movs r2, #24 - 8004106: 189b adds r3, r3, r2 - 8004108: 19db adds r3, r3, r7 - 800410a: 2210 movs r2, #16 - 800410c: 701a strb r2, [r3, #0] - 800410e: e080 b.n 8004212 - 8004110: 69fb ldr r3, [r7, #28] - 8004112: 681b ldr r3, [r3, #0] - 8004114: 4a99 ldr r2, [pc, #612] ; (800437c ) - 8004116: 4293 cmp r3, r2 - 8004118: d131 bne.n 800417e - 800411a: 4b97 ldr r3, [pc, #604] ; (8004378 ) - 800411c: 6cdb ldr r3, [r3, #76] ; 0x4c - 800411e: 220c movs r2, #12 - 8004120: 4013 ands r3, r2 - 8004122: 2b0c cmp r3, #12 - 8004124: d01d beq.n 8004162 - 8004126: d823 bhi.n 8004170 - 8004128: 2b08 cmp r3, #8 - 800412a: d00c beq.n 8004146 - 800412c: d820 bhi.n 8004170 - 800412e: 2b00 cmp r3, #0 - 8004130: d002 beq.n 8004138 - 8004132: 2b04 cmp r3, #4 - 8004134: d00e beq.n 8004154 - 8004136: e01b b.n 8004170 - 8004138: 231b movs r3, #27 - 800413a: 2218 movs r2, #24 - 800413c: 189b adds r3, r3, r2 - 800413e: 19db adds r3, r3, r7 - 8004140: 2200 movs r2, #0 - 8004142: 701a strb r2, [r3, #0] - 8004144: e065 b.n 8004212 - 8004146: 231b movs r3, #27 - 8004148: 2218 movs r2, #24 - 800414a: 189b adds r3, r3, r2 - 800414c: 19db adds r3, r3, r7 - 800414e: 2202 movs r2, #2 - 8004150: 701a strb r2, [r3, #0] - 8004152: e05e b.n 8004212 - 8004154: 231b movs r3, #27 - 8004156: 2218 movs r2, #24 - 8004158: 189b adds r3, r3, r2 - 800415a: 19db adds r3, r3, r7 - 800415c: 2204 movs r2, #4 - 800415e: 701a strb r2, [r3, #0] - 8004160: e057 b.n 8004212 - 8004162: 231b movs r3, #27 - 8004164: 2218 movs r2, #24 - 8004166: 189b adds r3, r3, r2 - 8004168: 19db adds r3, r3, r7 - 800416a: 2208 movs r2, #8 - 800416c: 701a strb r2, [r3, #0] - 800416e: e050 b.n 8004212 - 8004170: 231b movs r3, #27 - 8004172: 2218 movs r2, #24 - 8004174: 189b adds r3, r3, r2 - 8004176: 19db adds r3, r3, r7 - 8004178: 2210 movs r2, #16 - 800417a: 701a strb r2, [r3, #0] - 800417c: e049 b.n 8004212 - 800417e: 69fb ldr r3, [r7, #28] - 8004180: 681b ldr r3, [r3, #0] - 8004182: 4a7a ldr r2, [pc, #488] ; (800436c ) - 8004184: 4293 cmp r3, r2 - 8004186: d13e bne.n 8004206 - 8004188: 4b7b ldr r3, [pc, #492] ; (8004378 ) - 800418a: 6cda ldr r2, [r3, #76] ; 0x4c - 800418c: 23c0 movs r3, #192 ; 0xc0 - 800418e: 011b lsls r3, r3, #4 - 8004190: 4013 ands r3, r2 - 8004192: 22c0 movs r2, #192 ; 0xc0 - 8004194: 0112 lsls r2, r2, #4 - 8004196: 4293 cmp r3, r2 - 8004198: d027 beq.n 80041ea - 800419a: 22c0 movs r2, #192 ; 0xc0 - 800419c: 0112 lsls r2, r2, #4 - 800419e: 4293 cmp r3, r2 - 80041a0: d82a bhi.n 80041f8 - 80041a2: 2280 movs r2, #128 ; 0x80 - 80041a4: 0112 lsls r2, r2, #4 + 8004132: 69fb ldr r3, [r7, #28] + 8004134: 681b ldr r3, [r3, #0] + 8004136: 4ab3 ldr r2, [pc, #716] ; (8004404 ) + 8004138: 4293 cmp r3, r2 + 800413a: d131 bne.n 80041a0 + 800413c: 4bb2 ldr r3, [pc, #712] ; (8004408 ) + 800413e: 6cdb ldr r3, [r3, #76] ; 0x4c + 8004140: 2203 movs r2, #3 + 8004142: 4013 ands r3, r2 + 8004144: 2b03 cmp r3, #3 + 8004146: d01d beq.n 8004184 + 8004148: d823 bhi.n 8004192 + 800414a: 2b02 cmp r3, #2 + 800414c: d00c beq.n 8004168 + 800414e: d820 bhi.n 8004192 + 8004150: 2b00 cmp r3, #0 + 8004152: d002 beq.n 800415a + 8004154: 2b01 cmp r3, #1 + 8004156: d00e beq.n 8004176 + 8004158: e01b b.n 8004192 + 800415a: 231b movs r3, #27 + 800415c: 2218 movs r2, #24 + 800415e: 189b adds r3, r3, r2 + 8004160: 19db adds r3, r3, r7 + 8004162: 2201 movs r2, #1 + 8004164: 701a strb r2, [r3, #0] + 8004166: e09c b.n 80042a2 + 8004168: 231b movs r3, #27 + 800416a: 2218 movs r2, #24 + 800416c: 189b adds r3, r3, r2 + 800416e: 19db adds r3, r3, r7 + 8004170: 2202 movs r2, #2 + 8004172: 701a strb r2, [r3, #0] + 8004174: e095 b.n 80042a2 + 8004176: 231b movs r3, #27 + 8004178: 2218 movs r2, #24 + 800417a: 189b adds r3, r3, r2 + 800417c: 19db adds r3, r3, r7 + 800417e: 2204 movs r2, #4 + 8004180: 701a strb r2, [r3, #0] + 8004182: e08e b.n 80042a2 + 8004184: 231b movs r3, #27 + 8004186: 2218 movs r2, #24 + 8004188: 189b adds r3, r3, r2 + 800418a: 19db adds r3, r3, r7 + 800418c: 2208 movs r2, #8 + 800418e: 701a strb r2, [r3, #0] + 8004190: e087 b.n 80042a2 + 8004192: 231b movs r3, #27 + 8004194: 2218 movs r2, #24 + 8004196: 189b adds r3, r3, r2 + 8004198: 19db adds r3, r3, r7 + 800419a: 2210 movs r2, #16 + 800419c: 701a strb r2, [r3, #0] + 800419e: e080 b.n 80042a2 + 80041a0: 69fb ldr r3, [r7, #28] + 80041a2: 681b ldr r3, [r3, #0] + 80041a4: 4a99 ldr r2, [pc, #612] ; (800440c ) 80041a6: 4293 cmp r3, r2 - 80041a8: d011 beq.n 80041ce - 80041aa: 2280 movs r2, #128 ; 0x80 - 80041ac: 0112 lsls r2, r2, #4 - 80041ae: 4293 cmp r3, r2 - 80041b0: d822 bhi.n 80041f8 - 80041b2: 2b00 cmp r3, #0 - 80041b4: d004 beq.n 80041c0 - 80041b6: 2280 movs r2, #128 ; 0x80 - 80041b8: 00d2 lsls r2, r2, #3 - 80041ba: 4293 cmp r3, r2 - 80041bc: d00e beq.n 80041dc - 80041be: e01b b.n 80041f8 - 80041c0: 231b movs r3, #27 - 80041c2: 2218 movs r2, #24 - 80041c4: 189b adds r3, r3, r2 - 80041c6: 19db adds r3, r3, r7 - 80041c8: 2200 movs r2, #0 - 80041ca: 701a strb r2, [r3, #0] - 80041cc: e021 b.n 8004212 - 80041ce: 231b movs r3, #27 - 80041d0: 2218 movs r2, #24 - 80041d2: 189b adds r3, r3, r2 - 80041d4: 19db adds r3, r3, r7 - 80041d6: 2202 movs r2, #2 - 80041d8: 701a strb r2, [r3, #0] - 80041da: e01a b.n 8004212 - 80041dc: 231b movs r3, #27 - 80041de: 2218 movs r2, #24 - 80041e0: 189b adds r3, r3, r2 - 80041e2: 19db adds r3, r3, r7 - 80041e4: 2204 movs r2, #4 - 80041e6: 701a strb r2, [r3, #0] - 80041e8: e013 b.n 8004212 - 80041ea: 231b movs r3, #27 - 80041ec: 2218 movs r2, #24 - 80041ee: 189b adds r3, r3, r2 - 80041f0: 19db adds r3, r3, r7 - 80041f2: 2208 movs r2, #8 - 80041f4: 701a strb r2, [r3, #0] - 80041f6: e00c b.n 8004212 - 80041f8: 231b movs r3, #27 - 80041fa: 2218 movs r2, #24 - 80041fc: 189b adds r3, r3, r2 - 80041fe: 19db adds r3, r3, r7 - 8004200: 2210 movs r2, #16 - 8004202: 701a strb r2, [r3, #0] - 8004204: e005 b.n 8004212 - 8004206: 231b movs r3, #27 - 8004208: 2218 movs r2, #24 - 800420a: 189b adds r3, r3, r2 - 800420c: 19db adds r3, r3, r7 - 800420e: 2210 movs r2, #16 - 8004210: 701a strb r2, [r3, #0] + 80041a8: d131 bne.n 800420e + 80041aa: 4b97 ldr r3, [pc, #604] ; (8004408 ) + 80041ac: 6cdb ldr r3, [r3, #76] ; 0x4c + 80041ae: 220c movs r2, #12 + 80041b0: 4013 ands r3, r2 + 80041b2: 2b0c cmp r3, #12 + 80041b4: d01d beq.n 80041f2 + 80041b6: d823 bhi.n 8004200 + 80041b8: 2b08 cmp r3, #8 + 80041ba: d00c beq.n 80041d6 + 80041bc: d820 bhi.n 8004200 + 80041be: 2b00 cmp r3, #0 + 80041c0: d002 beq.n 80041c8 + 80041c2: 2b04 cmp r3, #4 + 80041c4: d00e beq.n 80041e4 + 80041c6: e01b b.n 8004200 + 80041c8: 231b movs r3, #27 + 80041ca: 2218 movs r2, #24 + 80041cc: 189b adds r3, r3, r2 + 80041ce: 19db adds r3, r3, r7 + 80041d0: 2200 movs r2, #0 + 80041d2: 701a strb r2, [r3, #0] + 80041d4: e065 b.n 80042a2 + 80041d6: 231b movs r3, #27 + 80041d8: 2218 movs r2, #24 + 80041da: 189b adds r3, r3, r2 + 80041dc: 19db adds r3, r3, r7 + 80041de: 2202 movs r2, #2 + 80041e0: 701a strb r2, [r3, #0] + 80041e2: e05e b.n 80042a2 + 80041e4: 231b movs r3, #27 + 80041e6: 2218 movs r2, #24 + 80041e8: 189b adds r3, r3, r2 + 80041ea: 19db adds r3, r3, r7 + 80041ec: 2204 movs r2, #4 + 80041ee: 701a strb r2, [r3, #0] + 80041f0: e057 b.n 80042a2 + 80041f2: 231b movs r3, #27 + 80041f4: 2218 movs r2, #24 + 80041f6: 189b adds r3, r3, r2 + 80041f8: 19db adds r3, r3, r7 + 80041fa: 2208 movs r2, #8 + 80041fc: 701a strb r2, [r3, #0] + 80041fe: e050 b.n 80042a2 + 8004200: 231b movs r3, #27 + 8004202: 2218 movs r2, #24 + 8004204: 189b adds r3, r3, r2 + 8004206: 19db adds r3, r3, r7 + 8004208: 2210 movs r2, #16 + 800420a: 701a strb r2, [r3, #0] + 800420c: e049 b.n 80042a2 + 800420e: 69fb ldr r3, [r7, #28] + 8004210: 681b ldr r3, [r3, #0] + 8004212: 4a7a ldr r2, [pc, #488] ; (80043fc ) + 8004214: 4293 cmp r3, r2 + 8004216: d13e bne.n 8004296 + 8004218: 4b7b ldr r3, [pc, #492] ; (8004408 ) + 800421a: 6cda ldr r2, [r3, #76] ; 0x4c + 800421c: 23c0 movs r3, #192 ; 0xc0 + 800421e: 011b lsls r3, r3, #4 + 8004220: 4013 ands r3, r2 + 8004222: 22c0 movs r2, #192 ; 0xc0 + 8004224: 0112 lsls r2, r2, #4 + 8004226: 4293 cmp r3, r2 + 8004228: d027 beq.n 800427a + 800422a: 22c0 movs r2, #192 ; 0xc0 + 800422c: 0112 lsls r2, r2, #4 + 800422e: 4293 cmp r3, r2 + 8004230: d82a bhi.n 8004288 + 8004232: 2280 movs r2, #128 ; 0x80 + 8004234: 0112 lsls r2, r2, #4 + 8004236: 4293 cmp r3, r2 + 8004238: d011 beq.n 800425e + 800423a: 2280 movs r2, #128 ; 0x80 + 800423c: 0112 lsls r2, r2, #4 + 800423e: 4293 cmp r3, r2 + 8004240: d822 bhi.n 8004288 + 8004242: 2b00 cmp r3, #0 + 8004244: d004 beq.n 8004250 + 8004246: 2280 movs r2, #128 ; 0x80 + 8004248: 00d2 lsls r2, r2, #3 + 800424a: 4293 cmp r3, r2 + 800424c: d00e beq.n 800426c + 800424e: e01b b.n 8004288 + 8004250: 231b movs r3, #27 + 8004252: 2218 movs r2, #24 + 8004254: 189b adds r3, r3, r2 + 8004256: 19db adds r3, r3, r7 + 8004258: 2200 movs r2, #0 + 800425a: 701a strb r2, [r3, #0] + 800425c: e021 b.n 80042a2 + 800425e: 231b movs r3, #27 + 8004260: 2218 movs r2, #24 + 8004262: 189b adds r3, r3, r2 + 8004264: 19db adds r3, r3, r7 + 8004266: 2202 movs r2, #2 + 8004268: 701a strb r2, [r3, #0] + 800426a: e01a b.n 80042a2 + 800426c: 231b movs r3, #27 + 800426e: 2218 movs r2, #24 + 8004270: 189b adds r3, r3, r2 + 8004272: 19db adds r3, r3, r7 + 8004274: 2204 movs r2, #4 + 8004276: 701a strb r2, [r3, #0] + 8004278: e013 b.n 80042a2 + 800427a: 231b movs r3, #27 + 800427c: 2218 movs r2, #24 + 800427e: 189b adds r3, r3, r2 + 8004280: 19db adds r3, r3, r7 + 8004282: 2208 movs r2, #8 + 8004284: 701a strb r2, [r3, #0] + 8004286: e00c b.n 80042a2 + 8004288: 231b movs r3, #27 + 800428a: 2218 movs r2, #24 + 800428c: 189b adds r3, r3, r2 + 800428e: 19db adds r3, r3, r7 + 8004290: 2210 movs r2, #16 + 8004292: 701a strb r2, [r3, #0] + 8004294: e005 b.n 80042a2 + 8004296: 231b movs r3, #27 + 8004298: 2218 movs r2, #24 + 800429a: 189b adds r3, r3, r2 + 800429c: 19db adds r3, r3, r7 + 800429e: 2210 movs r2, #16 + 80042a0: 701a strb r2, [r3, #0] /* Check LPUART instance */ if (UART_INSTANCE_LOWPOWER(huart)) - 8004212: 69fb ldr r3, [r7, #28] - 8004214: 681b ldr r3, [r3, #0] - 8004216: 4a55 ldr r2, [pc, #340] ; (800436c ) - 8004218: 4293 cmp r3, r2 - 800421a: d000 beq.n 800421e - 800421c: e084 b.n 8004328 + 80042a2: 69fb ldr r3, [r7, #28] + 80042a4: 681b ldr r3, [r3, #0] + 80042a6: 4a55 ldr r2, [pc, #340] ; (80043fc ) + 80042a8: 4293 cmp r3, r2 + 80042aa: d000 beq.n 80042ae + 80042ac: e084 b.n 80043b8 { /* Retrieve frequency clock */ switch (clocksource) - 800421e: 231b movs r3, #27 - 8004220: 2218 movs r2, #24 - 8004222: 189b adds r3, r3, r2 - 8004224: 19db adds r3, r3, r7 - 8004226: 781b ldrb r3, [r3, #0] - 8004228: 2b08 cmp r3, #8 - 800422a: d01d beq.n 8004268 - 800422c: dc20 bgt.n 8004270 - 800422e: 2b04 cmp r3, #4 - 8004230: d015 beq.n 800425e - 8004232: dc1d bgt.n 8004270 - 8004234: 2b00 cmp r3, #0 - 8004236: d002 beq.n 800423e - 8004238: 2b02 cmp r3, #2 - 800423a: d005 beq.n 8004248 - 800423c: e018 b.n 8004270 + 80042ae: 231b movs r3, #27 + 80042b0: 2218 movs r2, #24 + 80042b2: 189b adds r3, r3, r2 + 80042b4: 19db adds r3, r3, r7 + 80042b6: 781b ldrb r3, [r3, #0] + 80042b8: 2b08 cmp r3, #8 + 80042ba: d01d beq.n 80042f8 + 80042bc: dc20 bgt.n 8004300 + 80042be: 2b04 cmp r3, #4 + 80042c0: d015 beq.n 80042ee + 80042c2: dc1d bgt.n 8004300 + 80042c4: 2b00 cmp r3, #0 + 80042c6: d002 beq.n 80042ce + 80042c8: 2b02 cmp r3, #2 + 80042ca: d005 beq.n 80042d8 + 80042cc: e018 b.n 8004300 { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 800423e: f7fe fc23 bl 8002a88 - 8004242: 0003 movs r3, r0 - 8004244: 62fb str r3, [r7, #44] ; 0x2c + 80042ce: f7fe fc23 bl 8002b18 + 80042d2: 0003 movs r3, r0 + 80042d4: 62fb str r3, [r7, #44] ; 0x2c break; - 8004246: e01c b.n 8004282 + 80042d6: e01c b.n 8004312 case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 8004248: 4b4b ldr r3, [pc, #300] ; (8004378 ) - 800424a: 681b ldr r3, [r3, #0] - 800424c: 2210 movs r2, #16 - 800424e: 4013 ands r3, r2 - 8004250: d002 beq.n 8004258 + 80042d8: 4b4b ldr r3, [pc, #300] ; (8004408 ) + 80042da: 681b ldr r3, [r3, #0] + 80042dc: 2210 movs r2, #16 + 80042de: 4013 ands r3, r2 + 80042e0: d002 beq.n 80042e8 { pclk = (uint32_t)(HSI_VALUE >> 2U); - 8004252: 4b4b ldr r3, [pc, #300] ; (8004380 ) - 8004254: 62fb str r3, [r7, #44] ; 0x2c + 80042e2: 4b4b ldr r3, [pc, #300] ; (8004410 ) + 80042e4: 62fb str r3, [r7, #44] ; 0x2c } else { pclk = (uint32_t) HSI_VALUE; } break; - 8004256: e014 b.n 8004282 + 80042e6: e014 b.n 8004312 pclk = (uint32_t) HSI_VALUE; - 8004258: 4b4a ldr r3, [pc, #296] ; (8004384 ) - 800425a: 62fb str r3, [r7, #44] ; 0x2c + 80042e8: 4b4a ldr r3, [pc, #296] ; (8004414 ) + 80042ea: 62fb str r3, [r7, #44] ; 0x2c break; - 800425c: e011 b.n 8004282 + 80042ec: e011 b.n 8004312 case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); - 800425e: f7fe fb63 bl 8002928 - 8004262: 0003 movs r3, r0 - 8004264: 62fb str r3, [r7, #44] ; 0x2c + 80042ee: f7fe fb63 bl 80029b8 + 80042f2: 0003 movs r3, r0 + 80042f4: 62fb str r3, [r7, #44] ; 0x2c break; - 8004266: e00c b.n 8004282 + 80042f6: e00c b.n 8004312 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 8004268: 2380 movs r3, #128 ; 0x80 - 800426a: 021b lsls r3, r3, #8 - 800426c: 62fb str r3, [r7, #44] ; 0x2c + 80042f8: 2380 movs r3, #128 ; 0x80 + 80042fa: 021b lsls r3, r3, #8 + 80042fc: 62fb str r3, [r7, #44] ; 0x2c break; - 800426e: e008 b.n 8004282 + 80042fe: e008 b.n 8004312 default: pclk = 0U; - 8004270: 2300 movs r3, #0 - 8004272: 62fb str r3, [r7, #44] ; 0x2c + 8004300: 2300 movs r3, #0 + 8004302: 62fb str r3, [r7, #44] ; 0x2c ret = HAL_ERROR; - 8004274: 231a movs r3, #26 - 8004276: 2218 movs r2, #24 - 8004278: 189b adds r3, r3, r2 - 800427a: 19db adds r3, r3, r7 - 800427c: 2201 movs r2, #1 - 800427e: 701a strb r2, [r3, #0] + 8004304: 231a movs r3, #26 + 8004306: 2218 movs r2, #24 + 8004308: 189b adds r3, r3, r2 + 800430a: 19db adds r3, r3, r7 + 800430c: 2201 movs r2, #1 + 800430e: 701a strb r2, [r3, #0] break; - 8004280: 46c0 nop ; (mov r8, r8) + 8004310: 46c0 nop ; (mov r8, r8) } /* If proper clock source reported */ if (pclk != 0U) - 8004282: 6afb ldr r3, [r7, #44] ; 0x2c - 8004284: 2b00 cmp r3, #0 - 8004286: d100 bne.n 800428a - 8004288: e132 b.n 80044f0 + 8004312: 6afb ldr r3, [r7, #44] ; 0x2c + 8004314: 2b00 cmp r3, #0 + 8004316: d100 bne.n 800431a + 8004318: e132 b.n 8004580 { /* No Prescaler applicable */ /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */ if ((pclk < (3U * huart->Init.BaudRate)) || - 800428a: 69fb ldr r3, [r7, #28] - 800428c: 685a ldr r2, [r3, #4] - 800428e: 0013 movs r3, r2 - 8004290: 005b lsls r3, r3, #1 - 8004292: 189b adds r3, r3, r2 - 8004294: 6afa ldr r2, [r7, #44] ; 0x2c - 8004296: 429a cmp r2, r3 - 8004298: d305 bcc.n 80042a6 + 800431a: 69fb ldr r3, [r7, #28] + 800431c: 685a ldr r2, [r3, #4] + 800431e: 0013 movs r3, r2 + 8004320: 005b lsls r3, r3, #1 + 8004322: 189b adds r3, r3, r2 + 8004324: 6afa ldr r2, [r7, #44] ; 0x2c + 8004326: 429a cmp r2, r3 + 8004328: d305 bcc.n 8004336 (pclk > (4096U * huart->Init.BaudRate))) - 800429a: 69fb ldr r3, [r7, #28] - 800429c: 685b ldr r3, [r3, #4] - 800429e: 031b lsls r3, r3, #12 + 800432a: 69fb ldr r3, [r7, #28] + 800432c: 685b ldr r3, [r3, #4] + 800432e: 031b lsls r3, r3, #12 if ((pclk < (3U * huart->Init.BaudRate)) || - 80042a0: 6afa ldr r2, [r7, #44] ; 0x2c - 80042a2: 429a cmp r2, r3 - 80042a4: d906 bls.n 80042b4 + 8004330: 6afa ldr r2, [r7, #44] ; 0x2c + 8004332: 429a cmp r2, r3 + 8004334: d906 bls.n 8004344 { ret = HAL_ERROR; - 80042a6: 231a movs r3, #26 - 80042a8: 2218 movs r2, #24 - 80042aa: 189b adds r3, r3, r2 - 80042ac: 19db adds r3, r3, r7 - 80042ae: 2201 movs r2, #1 - 80042b0: 701a strb r2, [r3, #0] - 80042b2: e11d b.n 80044f0 + 8004336: 231a movs r3, #26 + 8004338: 2218 movs r2, #24 + 800433a: 189b adds r3, r3, r2 + 800433c: 19db adds r3, r3, r7 + 800433e: 2201 movs r2, #1 + 8004340: 701a strb r2, [r3, #0] + 8004342: e11d b.n 8004580 } else { usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate)); - 80042b4: 6afb ldr r3, [r7, #44] ; 0x2c - 80042b6: 613b str r3, [r7, #16] - 80042b8: 2300 movs r3, #0 - 80042ba: 617b str r3, [r7, #20] - 80042bc: 6939 ldr r1, [r7, #16] - 80042be: 697a ldr r2, [r7, #20] - 80042c0: 000b movs r3, r1 - 80042c2: 0e1b lsrs r3, r3, #24 - 80042c4: 0010 movs r0, r2 - 80042c6: 0205 lsls r5, r0, #8 - 80042c8: 431d orrs r5, r3 - 80042ca: 000b movs r3, r1 - 80042cc: 021c lsls r4, r3, #8 - 80042ce: 69fb ldr r3, [r7, #28] - 80042d0: 685b ldr r3, [r3, #4] - 80042d2: 085b lsrs r3, r3, #1 - 80042d4: 60bb str r3, [r7, #8] - 80042d6: 2300 movs r3, #0 - 80042d8: 60fb str r3, [r7, #12] - 80042da: 68b8 ldr r0, [r7, #8] - 80042dc: 68f9 ldr r1, [r7, #12] - 80042de: 1900 adds r0, r0, r4 - 80042e0: 4169 adcs r1, r5 - 80042e2: 69fb ldr r3, [r7, #28] - 80042e4: 685b ldr r3, [r3, #4] - 80042e6: 603b str r3, [r7, #0] - 80042e8: 2300 movs r3, #0 - 80042ea: 607b str r3, [r7, #4] - 80042ec: 683a ldr r2, [r7, #0] - 80042ee: 687b ldr r3, [r7, #4] - 80042f0: f7fb ff96 bl 8000220 <__aeabi_uldivmod> - 80042f4: 0002 movs r2, r0 - 80042f6: 000b movs r3, r1 - 80042f8: 0013 movs r3, r2 - 80042fa: 62bb str r3, [r7, #40] ; 0x28 + 8004344: 6afb ldr r3, [r7, #44] ; 0x2c + 8004346: 613b str r3, [r7, #16] + 8004348: 2300 movs r3, #0 + 800434a: 617b str r3, [r7, #20] + 800434c: 6939 ldr r1, [r7, #16] + 800434e: 697a ldr r2, [r7, #20] + 8004350: 000b movs r3, r1 + 8004352: 0e1b lsrs r3, r3, #24 + 8004354: 0010 movs r0, r2 + 8004356: 0205 lsls r5, r0, #8 + 8004358: 431d orrs r5, r3 + 800435a: 000b movs r3, r1 + 800435c: 021c lsls r4, r3, #8 + 800435e: 69fb ldr r3, [r7, #28] + 8004360: 685b ldr r3, [r3, #4] + 8004362: 085b lsrs r3, r3, #1 + 8004364: 60bb str r3, [r7, #8] + 8004366: 2300 movs r3, #0 + 8004368: 60fb str r3, [r7, #12] + 800436a: 68b8 ldr r0, [r7, #8] + 800436c: 68f9 ldr r1, [r7, #12] + 800436e: 1900 adds r0, r0, r4 + 8004370: 4169 adcs r1, r5 + 8004372: 69fb ldr r3, [r7, #28] + 8004374: 685b ldr r3, [r3, #4] + 8004376: 603b str r3, [r7, #0] + 8004378: 2300 movs r3, #0 + 800437a: 607b str r3, [r7, #4] + 800437c: 683a ldr r2, [r7, #0] + 800437e: 687b ldr r3, [r7, #4] + 8004380: f7fb ff4e bl 8000220 <__aeabi_uldivmod> + 8004384: 0002 movs r2, r0 + 8004386: 000b movs r3, r1 + 8004388: 0013 movs r3, r2 + 800438a: 62bb str r3, [r7, #40] ; 0x28 if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX)) - 80042fc: 6aba ldr r2, [r7, #40] ; 0x28 - 80042fe: 23c0 movs r3, #192 ; 0xc0 - 8004300: 009b lsls r3, r3, #2 - 8004302: 429a cmp r2, r3 - 8004304: d309 bcc.n 800431a - 8004306: 6aba ldr r2, [r7, #40] ; 0x28 - 8004308: 2380 movs r3, #128 ; 0x80 - 800430a: 035b lsls r3, r3, #13 - 800430c: 429a cmp r2, r3 - 800430e: d204 bcs.n 800431a + 800438c: 6aba ldr r2, [r7, #40] ; 0x28 + 800438e: 23c0 movs r3, #192 ; 0xc0 + 8004390: 009b lsls r3, r3, #2 + 8004392: 429a cmp r2, r3 + 8004394: d309 bcc.n 80043aa + 8004396: 6aba ldr r2, [r7, #40] ; 0x28 + 8004398: 2380 movs r3, #128 ; 0x80 + 800439a: 035b lsls r3, r3, #13 + 800439c: 429a cmp r2, r3 + 800439e: d204 bcs.n 80043aa { huart->Instance->BRR = usartdiv; - 8004310: 69fb ldr r3, [r7, #28] - 8004312: 681b ldr r3, [r3, #0] - 8004314: 6aba ldr r2, [r7, #40] ; 0x28 - 8004316: 60da str r2, [r3, #12] - 8004318: e0ea b.n 80044f0 + 80043a0: 69fb ldr r3, [r7, #28] + 80043a2: 681b ldr r3, [r3, #0] + 80043a4: 6aba ldr r2, [r7, #40] ; 0x28 + 80043a6: 60da str r2, [r3, #12] + 80043a8: e0ea b.n 8004580 } else { ret = HAL_ERROR; - 800431a: 231a movs r3, #26 - 800431c: 2218 movs r2, #24 - 800431e: 189b adds r3, r3, r2 - 8004320: 19db adds r3, r3, r7 - 8004322: 2201 movs r2, #1 - 8004324: 701a strb r2, [r3, #0] - 8004326: e0e3 b.n 80044f0 + 80043aa: 231a movs r3, #26 + 80043ac: 2218 movs r2, #24 + 80043ae: 189b adds r3, r3, r2 + 80043b0: 19db adds r3, r3, r7 + 80043b2: 2201 movs r2, #1 + 80043b4: 701a strb r2, [r3, #0] + 80043b6: e0e3 b.n 8004580 } } /* if ( (pclk < (3 * huart->Init.BaudRate) ) || (pclk > (4096 * huart->Init.BaudRate) )) */ } /* if (pclk != 0) */ } /* Check UART Over Sampling to set Baud Rate Register */ else if (huart->Init.OverSampling == UART_OVERSAMPLING_8) - 8004328: 69fb ldr r3, [r7, #28] - 800432a: 69da ldr r2, [r3, #28] - 800432c: 2380 movs r3, #128 ; 0x80 - 800432e: 021b lsls r3, r3, #8 - 8004330: 429a cmp r2, r3 - 8004332: d000 beq.n 8004336 - 8004334: e085 b.n 8004442 + 80043b8: 69fb ldr r3, [r7, #28] + 80043ba: 69da ldr r2, [r3, #28] + 80043bc: 2380 movs r3, #128 ; 0x80 + 80043be: 021b lsls r3, r3, #8 + 80043c0: 429a cmp r2, r3 + 80043c2: d000 beq.n 80043c6 + 80043c4: e085 b.n 80044d2 { switch (clocksource) - 8004336: 231b movs r3, #27 - 8004338: 2218 movs r2, #24 - 800433a: 189b adds r3, r3, r2 - 800433c: 19db adds r3, r3, r7 - 800433e: 781b ldrb r3, [r3, #0] - 8004340: 2b08 cmp r3, #8 - 8004342: d837 bhi.n 80043b4 - 8004344: 009a lsls r2, r3, #2 - 8004346: 4b10 ldr r3, [pc, #64] ; (8004388 ) - 8004348: 18d3 adds r3, r2, r3 - 800434a: 681b ldr r3, [r3, #0] - 800434c: 469f mov pc, r3 + 80043c6: 231b movs r3, #27 + 80043c8: 2218 movs r2, #24 + 80043ca: 189b adds r3, r3, r2 + 80043cc: 19db adds r3, r3, r7 + 80043ce: 781b ldrb r3, [r3, #0] + 80043d0: 2b08 cmp r3, #8 + 80043d2: d837 bhi.n 8004444 + 80043d4: 009a lsls r2, r3, #2 + 80043d6: 4b10 ldr r3, [pc, #64] ; (8004418 ) + 80043d8: 18d3 adds r3, r2, r3 + 80043da: 681b ldr r3, [r3, #0] + 80043dc: 469f mov pc, r3 { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 800434e: f7fe fb9b bl 8002a88 - 8004352: 0003 movs r3, r0 - 8004354: 62fb str r3, [r7, #44] ; 0x2c + 80043de: f7fe fb9b bl 8002b18 + 80043e2: 0003 movs r3, r0 + 80043e4: 62fb str r3, [r7, #44] ; 0x2c break; - 8004356: e036 b.n 80043c6 + 80043e6: e036 b.n 8004456 case UART_CLOCKSOURCE_PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); - 8004358: f7fe fbac bl 8002ab4 - 800435c: 0003 movs r3, r0 - 800435e: 62fb str r3, [r7, #44] ; 0x2c + 80043e8: f7fe fbac bl 8002b44 + 80043ec: 0003 movs r3, r0 + 80043ee: 62fb str r3, [r7, #44] ; 0x2c break; - 8004360: e031 b.n 80043c6 - 8004362: 46c0 nop ; (mov r8, r8) - 8004364: efff69f3 .word 0xefff69f3 - 8004368: ffffcfff .word 0xffffcfff - 800436c: 40004800 .word 0x40004800 - 8004370: fffff4ff .word 0xfffff4ff - 8004374: 40013800 .word 0x40013800 - 8004378: 40021000 .word 0x40021000 - 800437c: 40004400 .word 0x40004400 - 8004380: 003d0900 .word 0x003d0900 - 8004384: 00f42400 .word 0x00f42400 - 8004388: 08004c14 .word 0x08004c14 + 80043f0: e031 b.n 8004456 + 80043f2: 46c0 nop ; (mov r8, r8) + 80043f4: efff69f3 .word 0xefff69f3 + 80043f8: ffffcfff .word 0xffffcfff + 80043fc: 40004800 .word 0x40004800 + 8004400: fffff4ff .word 0xfffff4ff + 8004404: 40013800 .word 0x40013800 + 8004408: 40021000 .word 0x40021000 + 800440c: 40004400 .word 0x40004400 + 8004410: 003d0900 .word 0x003d0900 + 8004414: 00f42400 .word 0x00f42400 + 8004418: 08004ca4 .word 0x08004ca4 case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 800438c: 4b60 ldr r3, [pc, #384] ; (8004510 ) - 800438e: 681b ldr r3, [r3, #0] - 8004390: 2210 movs r2, #16 - 8004392: 4013 ands r3, r2 - 8004394: d002 beq.n 800439c + 800441c: 4b60 ldr r3, [pc, #384] ; (80045a0 ) + 800441e: 681b ldr r3, [r3, #0] + 8004420: 2210 movs r2, #16 + 8004422: 4013 ands r3, r2 + 8004424: d002 beq.n 800442c { pclk = (uint32_t)(HSI_VALUE >> 2U); - 8004396: 4b5f ldr r3, [pc, #380] ; (8004514 ) - 8004398: 62fb str r3, [r7, #44] ; 0x2c + 8004426: 4b5f ldr r3, [pc, #380] ; (80045a4 ) + 8004428: 62fb str r3, [r7, #44] ; 0x2c } else { pclk = (uint32_t) HSI_VALUE; } break; - 800439a: e014 b.n 80043c6 + 800442a: e014 b.n 8004456 pclk = (uint32_t) HSI_VALUE; - 800439c: 4b5e ldr r3, [pc, #376] ; (8004518 ) - 800439e: 62fb str r3, [r7, #44] ; 0x2c + 800442c: 4b5e ldr r3, [pc, #376] ; (80045a8 ) + 800442e: 62fb str r3, [r7, #44] ; 0x2c break; - 80043a0: e011 b.n 80043c6 + 8004430: e011 b.n 8004456 case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); - 80043a2: f7fe fac1 bl 8002928 - 80043a6: 0003 movs r3, r0 - 80043a8: 62fb str r3, [r7, #44] ; 0x2c + 8004432: f7fe fac1 bl 80029b8 + 8004436: 0003 movs r3, r0 + 8004438: 62fb str r3, [r7, #44] ; 0x2c break; - 80043aa: e00c b.n 80043c6 + 800443a: e00c b.n 8004456 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 80043ac: 2380 movs r3, #128 ; 0x80 - 80043ae: 021b lsls r3, r3, #8 - 80043b0: 62fb str r3, [r7, #44] ; 0x2c + 800443c: 2380 movs r3, #128 ; 0x80 + 800443e: 021b lsls r3, r3, #8 + 8004440: 62fb str r3, [r7, #44] ; 0x2c break; - 80043b2: e008 b.n 80043c6 + 8004442: e008 b.n 8004456 default: pclk = 0U; - 80043b4: 2300 movs r3, #0 - 80043b6: 62fb str r3, [r7, #44] ; 0x2c + 8004444: 2300 movs r3, #0 + 8004446: 62fb str r3, [r7, #44] ; 0x2c ret = HAL_ERROR; - 80043b8: 231a movs r3, #26 - 80043ba: 2218 movs r2, #24 - 80043bc: 189b adds r3, r3, r2 - 80043be: 19db adds r3, r3, r7 - 80043c0: 2201 movs r2, #1 - 80043c2: 701a strb r2, [r3, #0] + 8004448: 231a movs r3, #26 + 800444a: 2218 movs r2, #24 + 800444c: 189b adds r3, r3, r2 + 800444e: 19db adds r3, r3, r7 + 8004450: 2201 movs r2, #1 + 8004452: 701a strb r2, [r3, #0] break; - 80043c4: 46c0 nop ; (mov r8, r8) + 8004454: 46c0 nop ; (mov r8, r8) } /* USARTDIV must be greater than or equal to 0d16 */ if (pclk != 0U) - 80043c6: 6afb ldr r3, [r7, #44] ; 0x2c - 80043c8: 2b00 cmp r3, #0 - 80043ca: d100 bne.n 80043ce - 80043cc: e090 b.n 80044f0 + 8004456: 6afb ldr r3, [r7, #44] ; 0x2c + 8004458: 2b00 cmp r3, #0 + 800445a: d100 bne.n 800445e + 800445c: e090 b.n 8004580 { usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); - 80043ce: 6afb ldr r3, [r7, #44] ; 0x2c - 80043d0: 005a lsls r2, r3, #1 - 80043d2: 69fb ldr r3, [r7, #28] - 80043d4: 685b ldr r3, [r3, #4] - 80043d6: 085b lsrs r3, r3, #1 - 80043d8: 18d2 adds r2, r2, r3 - 80043da: 69fb ldr r3, [r7, #28] - 80043dc: 685b ldr r3, [r3, #4] - 80043de: 0019 movs r1, r3 - 80043e0: 0010 movs r0, r2 - 80043e2: f7fb fe91 bl 8000108 <__udivsi3> - 80043e6: 0003 movs r3, r0 - 80043e8: 62bb str r3, [r7, #40] ; 0x28 + 800445e: 6afb ldr r3, [r7, #44] ; 0x2c + 8004460: 005a lsls r2, r3, #1 + 8004462: 69fb ldr r3, [r7, #28] + 8004464: 685b ldr r3, [r3, #4] + 8004466: 085b lsrs r3, r3, #1 + 8004468: 18d2 adds r2, r2, r3 + 800446a: 69fb ldr r3, [r7, #28] + 800446c: 685b ldr r3, [r3, #4] + 800446e: 0019 movs r1, r3 + 8004470: 0010 movs r0, r2 + 8004472: f7fb fe49 bl 8000108 <__udivsi3> + 8004476: 0003 movs r3, r0 + 8004478: 62bb str r3, [r7, #40] ; 0x28 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 80043ea: 6abb ldr r3, [r7, #40] ; 0x28 - 80043ec: 2b0f cmp r3, #15 - 80043ee: d921 bls.n 8004434 - 80043f0: 6aba ldr r2, [r7, #40] ; 0x28 - 80043f2: 2380 movs r3, #128 ; 0x80 - 80043f4: 025b lsls r3, r3, #9 - 80043f6: 429a cmp r2, r3 - 80043f8: d21c bcs.n 8004434 + 800447a: 6abb ldr r3, [r7, #40] ; 0x28 + 800447c: 2b0f cmp r3, #15 + 800447e: d921 bls.n 80044c4 + 8004480: 6aba ldr r2, [r7, #40] ; 0x28 + 8004482: 2380 movs r3, #128 ; 0x80 + 8004484: 025b lsls r3, r3, #9 + 8004486: 429a cmp r2, r3 + 8004488: d21c bcs.n 80044c4 { brrtemp = (uint16_t)(usartdiv & 0xFFF0U); - 80043fa: 6abb ldr r3, [r7, #40] ; 0x28 - 80043fc: b29a uxth r2, r3 - 80043fe: 200e movs r0, #14 - 8004400: 2418 movs r4, #24 - 8004402: 1903 adds r3, r0, r4 - 8004404: 19db adds r3, r3, r7 - 8004406: 210f movs r1, #15 - 8004408: 438a bics r2, r1 - 800440a: 801a strh r2, [r3, #0] + 800448a: 6abb ldr r3, [r7, #40] ; 0x28 + 800448c: b29a uxth r2, r3 + 800448e: 200e movs r0, #14 + 8004490: 2418 movs r4, #24 + 8004492: 1903 adds r3, r0, r4 + 8004494: 19db adds r3, r3, r7 + 8004496: 210f movs r1, #15 + 8004498: 438a bics r2, r1 + 800449a: 801a strh r2, [r3, #0] brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); - 800440c: 6abb ldr r3, [r7, #40] ; 0x28 - 800440e: 085b lsrs r3, r3, #1 - 8004410: b29b uxth r3, r3 - 8004412: 2207 movs r2, #7 - 8004414: 4013 ands r3, r2 - 8004416: b299 uxth r1, r3 - 8004418: 1903 adds r3, r0, r4 - 800441a: 19db adds r3, r3, r7 - 800441c: 1902 adds r2, r0, r4 - 800441e: 19d2 adds r2, r2, r7 - 8004420: 8812 ldrh r2, [r2, #0] - 8004422: 430a orrs r2, r1 - 8004424: 801a strh r2, [r3, #0] + 800449c: 6abb ldr r3, [r7, #40] ; 0x28 + 800449e: 085b lsrs r3, r3, #1 + 80044a0: b29b uxth r3, r3 + 80044a2: 2207 movs r2, #7 + 80044a4: 4013 ands r3, r2 + 80044a6: b299 uxth r1, r3 + 80044a8: 1903 adds r3, r0, r4 + 80044aa: 19db adds r3, r3, r7 + 80044ac: 1902 adds r2, r0, r4 + 80044ae: 19d2 adds r2, r2, r7 + 80044b0: 8812 ldrh r2, [r2, #0] + 80044b2: 430a orrs r2, r1 + 80044b4: 801a strh r2, [r3, #0] huart->Instance->BRR = brrtemp; - 8004426: 69fb ldr r3, [r7, #28] - 8004428: 681b ldr r3, [r3, #0] - 800442a: 1902 adds r2, r0, r4 - 800442c: 19d2 adds r2, r2, r7 - 800442e: 8812 ldrh r2, [r2, #0] - 8004430: 60da str r2, [r3, #12] - 8004432: e05d b.n 80044f0 + 80044b6: 69fb ldr r3, [r7, #28] + 80044b8: 681b ldr r3, [r3, #0] + 80044ba: 1902 adds r2, r0, r4 + 80044bc: 19d2 adds r2, r2, r7 + 80044be: 8812 ldrh r2, [r2, #0] + 80044c0: 60da str r2, [r3, #12] + 80044c2: e05d b.n 8004580 } else { ret = HAL_ERROR; - 8004434: 231a movs r3, #26 - 8004436: 2218 movs r2, #24 - 8004438: 189b adds r3, r3, r2 - 800443a: 19db adds r3, r3, r7 - 800443c: 2201 movs r2, #1 - 800443e: 701a strb r2, [r3, #0] - 8004440: e056 b.n 80044f0 + 80044c4: 231a movs r3, #26 + 80044c6: 2218 movs r2, #24 + 80044c8: 189b adds r3, r3, r2 + 80044ca: 19db adds r3, r3, r7 + 80044cc: 2201 movs r2, #1 + 80044ce: 701a strb r2, [r3, #0] + 80044d0: e056 b.n 8004580 } } } else { switch (clocksource) - 8004442: 231b movs r3, #27 - 8004444: 2218 movs r2, #24 - 8004446: 189b adds r3, r3, r2 - 8004448: 19db adds r3, r3, r7 - 800444a: 781b ldrb r3, [r3, #0] - 800444c: 2b08 cmp r3, #8 - 800444e: d822 bhi.n 8004496 - 8004450: 009a lsls r2, r3, #2 - 8004452: 4b32 ldr r3, [pc, #200] ; (800451c ) - 8004454: 18d3 adds r3, r2, r3 - 8004456: 681b ldr r3, [r3, #0] - 8004458: 469f mov pc, r3 + 80044d2: 231b movs r3, #27 + 80044d4: 2218 movs r2, #24 + 80044d6: 189b adds r3, r3, r2 + 80044d8: 19db adds r3, r3, r7 + 80044da: 781b ldrb r3, [r3, #0] + 80044dc: 2b08 cmp r3, #8 + 80044de: d822 bhi.n 8004526 + 80044e0: 009a lsls r2, r3, #2 + 80044e2: 4b32 ldr r3, [pc, #200] ; (80045ac ) + 80044e4: 18d3 adds r3, r2, r3 + 80044e6: 681b ldr r3, [r3, #0] + 80044e8: 469f mov pc, r3 { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); - 800445a: f7fe fb15 bl 8002a88 - 800445e: 0003 movs r3, r0 - 8004460: 62fb str r3, [r7, #44] ; 0x2c + 80044ea: f7fe fb15 bl 8002b18 + 80044ee: 0003 movs r3, r0 + 80044f0: 62fb str r3, [r7, #44] ; 0x2c break; - 8004462: e021 b.n 80044a8 + 80044f2: e021 b.n 8004538 case UART_CLOCKSOURCE_PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); - 8004464: f7fe fb26 bl 8002ab4 - 8004468: 0003 movs r3, r0 - 800446a: 62fb str r3, [r7, #44] ; 0x2c + 80044f4: f7fe fb26 bl 8002b44 + 80044f8: 0003 movs r3, r0 + 80044fa: 62fb str r3, [r7, #44] ; 0x2c break; - 800446c: e01c b.n 80044a8 + 80044fc: e01c b.n 8004538 case UART_CLOCKSOURCE_HSI: if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U) - 800446e: 4b28 ldr r3, [pc, #160] ; (8004510 ) - 8004470: 681b ldr r3, [r3, #0] - 8004472: 2210 movs r2, #16 - 8004474: 4013 ands r3, r2 - 8004476: d002 beq.n 800447e + 80044fe: 4b28 ldr r3, [pc, #160] ; (80045a0 ) + 8004500: 681b ldr r3, [r3, #0] + 8004502: 2210 movs r2, #16 + 8004504: 4013 ands r3, r2 + 8004506: d002 beq.n 800450e { pclk = (uint32_t)(HSI_VALUE >> 2U); - 8004478: 4b26 ldr r3, [pc, #152] ; (8004514 ) - 800447a: 62fb str r3, [r7, #44] ; 0x2c + 8004508: 4b26 ldr r3, [pc, #152] ; (80045a4 ) + 800450a: 62fb str r3, [r7, #44] ; 0x2c } else { pclk = (uint32_t) HSI_VALUE; } break; - 800447c: e014 b.n 80044a8 + 800450c: e014 b.n 8004538 pclk = (uint32_t) HSI_VALUE; - 800447e: 4b26 ldr r3, [pc, #152] ; (8004518 ) - 8004480: 62fb str r3, [r7, #44] ; 0x2c + 800450e: 4b26 ldr r3, [pc, #152] ; (80045a8 ) + 8004510: 62fb str r3, [r7, #44] ; 0x2c break; - 8004482: e011 b.n 80044a8 + 8004512: e011 b.n 8004538 case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); - 8004484: f7fe fa50 bl 8002928 - 8004488: 0003 movs r3, r0 - 800448a: 62fb str r3, [r7, #44] ; 0x2c + 8004514: f7fe fa50 bl 80029b8 + 8004518: 0003 movs r3, r0 + 800451a: 62fb str r3, [r7, #44] ; 0x2c break; - 800448c: e00c b.n 80044a8 + 800451c: e00c b.n 8004538 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; - 800448e: 2380 movs r3, #128 ; 0x80 - 8004490: 021b lsls r3, r3, #8 - 8004492: 62fb str r3, [r7, #44] ; 0x2c + 800451e: 2380 movs r3, #128 ; 0x80 + 8004520: 021b lsls r3, r3, #8 + 8004522: 62fb str r3, [r7, #44] ; 0x2c break; - 8004494: e008 b.n 80044a8 + 8004524: e008 b.n 8004538 default: pclk = 0U; - 8004496: 2300 movs r3, #0 - 8004498: 62fb str r3, [r7, #44] ; 0x2c + 8004526: 2300 movs r3, #0 + 8004528: 62fb str r3, [r7, #44] ; 0x2c ret = HAL_ERROR; - 800449a: 231a movs r3, #26 - 800449c: 2218 movs r2, #24 - 800449e: 189b adds r3, r3, r2 - 80044a0: 19db adds r3, r3, r7 - 80044a2: 2201 movs r2, #1 - 80044a4: 701a strb r2, [r3, #0] + 800452a: 231a movs r3, #26 + 800452c: 2218 movs r2, #24 + 800452e: 189b adds r3, r3, r2 + 8004530: 19db adds r3, r3, r7 + 8004532: 2201 movs r2, #1 + 8004534: 701a strb r2, [r3, #0] break; - 80044a6: 46c0 nop ; (mov r8, r8) + 8004536: 46c0 nop ; (mov r8, r8) } if (pclk != 0U) - 80044a8: 6afb ldr r3, [r7, #44] ; 0x2c - 80044aa: 2b00 cmp r3, #0 - 80044ac: d020 beq.n 80044f0 + 8004538: 6afb ldr r3, [r7, #44] ; 0x2c + 800453a: 2b00 cmp r3, #0 + 800453c: d020 beq.n 8004580 { /* USARTDIV must be greater than or equal to 0d16 */ usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); - 80044ae: 69fb ldr r3, [r7, #28] - 80044b0: 685b ldr r3, [r3, #4] - 80044b2: 085a lsrs r2, r3, #1 - 80044b4: 6afb ldr r3, [r7, #44] ; 0x2c - 80044b6: 18d2 adds r2, r2, r3 - 80044b8: 69fb ldr r3, [r7, #28] - 80044ba: 685b ldr r3, [r3, #4] - 80044bc: 0019 movs r1, r3 - 80044be: 0010 movs r0, r2 - 80044c0: f7fb fe22 bl 8000108 <__udivsi3> - 80044c4: 0003 movs r3, r0 - 80044c6: 62bb str r3, [r7, #40] ; 0x28 + 800453e: 69fb ldr r3, [r7, #28] + 8004540: 685b ldr r3, [r3, #4] + 8004542: 085a lsrs r2, r3, #1 + 8004544: 6afb ldr r3, [r7, #44] ; 0x2c + 8004546: 18d2 adds r2, r2, r3 + 8004548: 69fb ldr r3, [r7, #28] + 800454a: 685b ldr r3, [r3, #4] + 800454c: 0019 movs r1, r3 + 800454e: 0010 movs r0, r2 + 8004550: f7fb fdda bl 8000108 <__udivsi3> + 8004554: 0003 movs r3, r0 + 8004556: 62bb str r3, [r7, #40] ; 0x28 if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) - 80044c8: 6abb ldr r3, [r7, #40] ; 0x28 - 80044ca: 2b0f cmp r3, #15 - 80044cc: d90a bls.n 80044e4 - 80044ce: 6aba ldr r2, [r7, #40] ; 0x28 - 80044d0: 2380 movs r3, #128 ; 0x80 - 80044d2: 025b lsls r3, r3, #9 - 80044d4: 429a cmp r2, r3 - 80044d6: d205 bcs.n 80044e4 + 8004558: 6abb ldr r3, [r7, #40] ; 0x28 + 800455a: 2b0f cmp r3, #15 + 800455c: d90a bls.n 8004574 + 800455e: 6aba ldr r2, [r7, #40] ; 0x28 + 8004560: 2380 movs r3, #128 ; 0x80 + 8004562: 025b lsls r3, r3, #9 + 8004564: 429a cmp r2, r3 + 8004566: d205 bcs.n 8004574 { huart->Instance->BRR = (uint16_t)usartdiv; - 80044d8: 6abb ldr r3, [r7, #40] ; 0x28 - 80044da: b29a uxth r2, r3 - 80044dc: 69fb ldr r3, [r7, #28] - 80044de: 681b ldr r3, [r3, #0] - 80044e0: 60da str r2, [r3, #12] - 80044e2: e005 b.n 80044f0 + 8004568: 6abb ldr r3, [r7, #40] ; 0x28 + 800456a: b29a uxth r2, r3 + 800456c: 69fb ldr r3, [r7, #28] + 800456e: 681b ldr r3, [r3, #0] + 8004570: 60da str r2, [r3, #12] + 8004572: e005 b.n 8004580 } else { ret = HAL_ERROR; - 80044e4: 231a movs r3, #26 - 80044e6: 2218 movs r2, #24 - 80044e8: 189b adds r3, r3, r2 - 80044ea: 19db adds r3, r3, r7 - 80044ec: 2201 movs r2, #1 - 80044ee: 701a strb r2, [r3, #0] + 8004574: 231a movs r3, #26 + 8004576: 2218 movs r2, #24 + 8004578: 189b adds r3, r3, r2 + 800457a: 19db adds r3, r3, r7 + 800457c: 2201 movs r2, #1 + 800457e: 701a strb r2, [r3, #0] } } /* Clear ISR function pointers */ huart->RxISR = NULL; - 80044f0: 69fb ldr r3, [r7, #28] - 80044f2: 2200 movs r2, #0 - 80044f4: 669a str r2, [r3, #104] ; 0x68 + 8004580: 69fb ldr r3, [r7, #28] + 8004582: 2200 movs r2, #0 + 8004584: 669a str r2, [r3, #104] ; 0x68 huart->TxISR = NULL; - 80044f6: 69fb ldr r3, [r7, #28] - 80044f8: 2200 movs r2, #0 - 80044fa: 66da str r2, [r3, #108] ; 0x6c + 8004586: 69fb ldr r3, [r7, #28] + 8004588: 2200 movs r2, #0 + 800458a: 66da str r2, [r3, #108] ; 0x6c return ret; - 80044fc: 231a movs r3, #26 - 80044fe: 2218 movs r2, #24 - 8004500: 189b adds r3, r3, r2 - 8004502: 19db adds r3, r3, r7 - 8004504: 781b ldrb r3, [r3, #0] + 800458c: 231a movs r3, #26 + 800458e: 2218 movs r2, #24 + 8004590: 189b adds r3, r3, r2 + 8004592: 19db adds r3, r3, r7 + 8004594: 781b ldrb r3, [r3, #0] } - 8004506: 0018 movs r0, r3 - 8004508: 46bd mov sp, r7 - 800450a: b00e add sp, #56 ; 0x38 - 800450c: bdb0 pop {r4, r5, r7, pc} - 800450e: 46c0 nop ; (mov r8, r8) - 8004510: 40021000 .word 0x40021000 - 8004514: 003d0900 .word 0x003d0900 - 8004518: 00f42400 .word 0x00f42400 - 800451c: 08004c38 .word 0x08004c38 + 8004596: 0018 movs r0, r3 + 8004598: 46bd mov sp, r7 + 800459a: b00e add sp, #56 ; 0x38 + 800459c: bdb0 pop {r4, r5, r7, pc} + 800459e: 46c0 nop ; (mov r8, r8) + 80045a0: 40021000 .word 0x40021000 + 80045a4: 003d0900 .word 0x003d0900 + 80045a8: 00f42400 .word 0x00f42400 + 80045ac: 08004cc8 .word 0x08004cc8 -08004520 : +080045b0 : * @brief Configure the UART peripheral advanced features. * @param huart UART handle. * @retval None */ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) { - 8004520: b580 push {r7, lr} - 8004522: b082 sub sp, #8 - 8004524: af00 add r7, sp, #0 - 8004526: 6078 str r0, [r7, #4] + 80045b0: b580 push {r7, lr} + 80045b2: b082 sub sp, #8 + 80045b4: af00 add r7, sp, #0 + 80045b6: 6078 str r0, [r7, #4] /* Check whether the set of advanced features to configure is properly set */ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); /* if required, configure TX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) - 8004528: 687b ldr r3, [r7, #4] - 800452a: 6a5b ldr r3, [r3, #36] ; 0x24 - 800452c: 2201 movs r2, #1 - 800452e: 4013 ands r3, r2 - 8004530: d00b beq.n 800454a + 80045b8: 687b ldr r3, [r7, #4] + 80045ba: 6a5b ldr r3, [r3, #36] ; 0x24 + 80045bc: 2201 movs r2, #1 + 80045be: 4013 ands r3, r2 + 80045c0: d00b beq.n 80045da { assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); - 8004532: 687b ldr r3, [r7, #4] - 8004534: 681b ldr r3, [r3, #0] - 8004536: 685b ldr r3, [r3, #4] - 8004538: 4a4a ldr r2, [pc, #296] ; (8004664 ) - 800453a: 4013 ands r3, r2 - 800453c: 0019 movs r1, r3 - 800453e: 687b ldr r3, [r7, #4] - 8004540: 6a9a ldr r2, [r3, #40] ; 0x28 - 8004542: 687b ldr r3, [r7, #4] - 8004544: 681b ldr r3, [r3, #0] - 8004546: 430a orrs r2, r1 - 8004548: 605a str r2, [r3, #4] + 80045c2: 687b ldr r3, [r7, #4] + 80045c4: 681b ldr r3, [r3, #0] + 80045c6: 685b ldr r3, [r3, #4] + 80045c8: 4a4a ldr r2, [pc, #296] ; (80046f4 ) + 80045ca: 4013 ands r3, r2 + 80045cc: 0019 movs r1, r3 + 80045ce: 687b ldr r3, [r7, #4] + 80045d0: 6a9a ldr r2, [r3, #40] ; 0x28 + 80045d2: 687b ldr r3, [r7, #4] + 80045d4: 681b ldr r3, [r3, #0] + 80045d6: 430a orrs r2, r1 + 80045d8: 605a str r2, [r3, #4] } /* if required, configure RX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) - 800454a: 687b ldr r3, [r7, #4] - 800454c: 6a5b ldr r3, [r3, #36] ; 0x24 - 800454e: 2202 movs r2, #2 - 8004550: 4013 ands r3, r2 - 8004552: d00b beq.n 800456c + 80045da: 687b ldr r3, [r7, #4] + 80045dc: 6a5b ldr r3, [r3, #36] ; 0x24 + 80045de: 2202 movs r2, #2 + 80045e0: 4013 ands r3, r2 + 80045e2: d00b beq.n 80045fc { assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); - 8004554: 687b ldr r3, [r7, #4] - 8004556: 681b ldr r3, [r3, #0] - 8004558: 685b ldr r3, [r3, #4] - 800455a: 4a43 ldr r2, [pc, #268] ; (8004668 ) - 800455c: 4013 ands r3, r2 - 800455e: 0019 movs r1, r3 - 8004560: 687b ldr r3, [r7, #4] - 8004562: 6ada ldr r2, [r3, #44] ; 0x2c - 8004564: 687b ldr r3, [r7, #4] - 8004566: 681b ldr r3, [r3, #0] - 8004568: 430a orrs r2, r1 - 800456a: 605a str r2, [r3, #4] + 80045e4: 687b ldr r3, [r7, #4] + 80045e6: 681b ldr r3, [r3, #0] + 80045e8: 685b ldr r3, [r3, #4] + 80045ea: 4a43 ldr r2, [pc, #268] ; (80046f8 ) + 80045ec: 4013 ands r3, r2 + 80045ee: 0019 movs r1, r3 + 80045f0: 687b ldr r3, [r7, #4] + 80045f2: 6ada ldr r2, [r3, #44] ; 0x2c + 80045f4: 687b ldr r3, [r7, #4] + 80045f6: 681b ldr r3, [r3, #0] + 80045f8: 430a orrs r2, r1 + 80045fa: 605a str r2, [r3, #4] } /* if required, configure data inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) - 800456c: 687b ldr r3, [r7, #4] - 800456e: 6a5b ldr r3, [r3, #36] ; 0x24 - 8004570: 2204 movs r2, #4 - 8004572: 4013 ands r3, r2 - 8004574: d00b beq.n 800458e + 80045fc: 687b ldr r3, [r7, #4] + 80045fe: 6a5b ldr r3, [r3, #36] ; 0x24 + 8004600: 2204 movs r2, #4 + 8004602: 4013 ands r3, r2 + 8004604: d00b beq.n 800461e { assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); - 8004576: 687b ldr r3, [r7, #4] - 8004578: 681b ldr r3, [r3, #0] - 800457a: 685b ldr r3, [r3, #4] - 800457c: 4a3b ldr r2, [pc, #236] ; (800466c ) - 800457e: 4013 ands r3, r2 - 8004580: 0019 movs r1, r3 - 8004582: 687b ldr r3, [r7, #4] - 8004584: 6b1a ldr r2, [r3, #48] ; 0x30 - 8004586: 687b ldr r3, [r7, #4] - 8004588: 681b ldr r3, [r3, #0] - 800458a: 430a orrs r2, r1 - 800458c: 605a str r2, [r3, #4] + 8004606: 687b ldr r3, [r7, #4] + 8004608: 681b ldr r3, [r3, #0] + 800460a: 685b ldr r3, [r3, #4] + 800460c: 4a3b ldr r2, [pc, #236] ; (80046fc ) + 800460e: 4013 ands r3, r2 + 8004610: 0019 movs r1, r3 + 8004612: 687b ldr r3, [r7, #4] + 8004614: 6b1a ldr r2, [r3, #48] ; 0x30 + 8004616: 687b ldr r3, [r7, #4] + 8004618: 681b ldr r3, [r3, #0] + 800461a: 430a orrs r2, r1 + 800461c: 605a str r2, [r3, #4] } /* if required, configure RX/TX pins swap */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) - 800458e: 687b ldr r3, [r7, #4] - 8004590: 6a5b ldr r3, [r3, #36] ; 0x24 - 8004592: 2208 movs r2, #8 - 8004594: 4013 ands r3, r2 - 8004596: d00b beq.n 80045b0 + 800461e: 687b ldr r3, [r7, #4] + 8004620: 6a5b ldr r3, [r3, #36] ; 0x24 + 8004622: 2208 movs r2, #8 + 8004624: 4013 ands r3, r2 + 8004626: d00b beq.n 8004640 { assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); - 8004598: 687b ldr r3, [r7, #4] - 800459a: 681b ldr r3, [r3, #0] - 800459c: 685b ldr r3, [r3, #4] - 800459e: 4a34 ldr r2, [pc, #208] ; (8004670 ) - 80045a0: 4013 ands r3, r2 - 80045a2: 0019 movs r1, r3 - 80045a4: 687b ldr r3, [r7, #4] - 80045a6: 6b5a ldr r2, [r3, #52] ; 0x34 - 80045a8: 687b ldr r3, [r7, #4] - 80045aa: 681b ldr r3, [r3, #0] - 80045ac: 430a orrs r2, r1 - 80045ae: 605a str r2, [r3, #4] + 8004628: 687b ldr r3, [r7, #4] + 800462a: 681b ldr r3, [r3, #0] + 800462c: 685b ldr r3, [r3, #4] + 800462e: 4a34 ldr r2, [pc, #208] ; (8004700 ) + 8004630: 4013 ands r3, r2 + 8004632: 0019 movs r1, r3 + 8004634: 687b ldr r3, [r7, #4] + 8004636: 6b5a ldr r2, [r3, #52] ; 0x34 + 8004638: 687b ldr r3, [r7, #4] + 800463a: 681b ldr r3, [r3, #0] + 800463c: 430a orrs r2, r1 + 800463e: 605a str r2, [r3, #4] } /* if required, configure RX overrun detection disabling */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) - 80045b0: 687b ldr r3, [r7, #4] - 80045b2: 6a5b ldr r3, [r3, #36] ; 0x24 - 80045b4: 2210 movs r2, #16 - 80045b6: 4013 ands r3, r2 - 80045b8: d00b beq.n 80045d2 + 8004640: 687b ldr r3, [r7, #4] + 8004642: 6a5b ldr r3, [r3, #36] ; 0x24 + 8004644: 2210 movs r2, #16 + 8004646: 4013 ands r3, r2 + 8004648: d00b beq.n 8004662 { assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); - 80045ba: 687b ldr r3, [r7, #4] - 80045bc: 681b ldr r3, [r3, #0] - 80045be: 689b ldr r3, [r3, #8] - 80045c0: 4a2c ldr r2, [pc, #176] ; (8004674 ) - 80045c2: 4013 ands r3, r2 - 80045c4: 0019 movs r1, r3 - 80045c6: 687b ldr r3, [r7, #4] - 80045c8: 6b9a ldr r2, [r3, #56] ; 0x38 - 80045ca: 687b ldr r3, [r7, #4] - 80045cc: 681b ldr r3, [r3, #0] - 80045ce: 430a orrs r2, r1 - 80045d0: 609a str r2, [r3, #8] + 800464a: 687b ldr r3, [r7, #4] + 800464c: 681b ldr r3, [r3, #0] + 800464e: 689b ldr r3, [r3, #8] + 8004650: 4a2c ldr r2, [pc, #176] ; (8004704 ) + 8004652: 4013 ands r3, r2 + 8004654: 0019 movs r1, r3 + 8004656: 687b ldr r3, [r7, #4] + 8004658: 6b9a ldr r2, [r3, #56] ; 0x38 + 800465a: 687b ldr r3, [r7, #4] + 800465c: 681b ldr r3, [r3, #0] + 800465e: 430a orrs r2, r1 + 8004660: 609a str r2, [r3, #8] } /* if required, configure DMA disabling on reception error */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) - 80045d2: 687b ldr r3, [r7, #4] - 80045d4: 6a5b ldr r3, [r3, #36] ; 0x24 - 80045d6: 2220 movs r2, #32 - 80045d8: 4013 ands r3, r2 - 80045da: d00b beq.n 80045f4 + 8004662: 687b ldr r3, [r7, #4] + 8004664: 6a5b ldr r3, [r3, #36] ; 0x24 + 8004666: 2220 movs r2, #32 + 8004668: 4013 ands r3, r2 + 800466a: d00b beq.n 8004684 { assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); - 80045dc: 687b ldr r3, [r7, #4] - 80045de: 681b ldr r3, [r3, #0] - 80045e0: 689b ldr r3, [r3, #8] - 80045e2: 4a25 ldr r2, [pc, #148] ; (8004678 ) - 80045e4: 4013 ands r3, r2 - 80045e6: 0019 movs r1, r3 - 80045e8: 687b ldr r3, [r7, #4] - 80045ea: 6bda ldr r2, [r3, #60] ; 0x3c - 80045ec: 687b ldr r3, [r7, #4] - 80045ee: 681b ldr r3, [r3, #0] - 80045f0: 430a orrs r2, r1 - 80045f2: 609a str r2, [r3, #8] + 800466c: 687b ldr r3, [r7, #4] + 800466e: 681b ldr r3, [r3, #0] + 8004670: 689b ldr r3, [r3, #8] + 8004672: 4a25 ldr r2, [pc, #148] ; (8004708 ) + 8004674: 4013 ands r3, r2 + 8004676: 0019 movs r1, r3 + 8004678: 687b ldr r3, [r7, #4] + 800467a: 6bda ldr r2, [r3, #60] ; 0x3c + 800467c: 687b ldr r3, [r7, #4] + 800467e: 681b ldr r3, [r3, #0] + 8004680: 430a orrs r2, r1 + 8004682: 609a str r2, [r3, #8] } /* if required, configure auto Baud rate detection scheme */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) - 80045f4: 687b ldr r3, [r7, #4] - 80045f6: 6a5b ldr r3, [r3, #36] ; 0x24 - 80045f8: 2240 movs r2, #64 ; 0x40 - 80045fa: 4013 ands r3, r2 - 80045fc: d01d beq.n 800463a + 8004684: 687b ldr r3, [r7, #4] + 8004686: 6a5b ldr r3, [r3, #36] ; 0x24 + 8004688: 2240 movs r2, #64 ; 0x40 + 800468a: 4013 ands r3, r2 + 800468c: d01d beq.n 80046ca { assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); - 80045fe: 687b ldr r3, [r7, #4] - 8004600: 681b ldr r3, [r3, #0] - 8004602: 685b ldr r3, [r3, #4] - 8004604: 4a1d ldr r2, [pc, #116] ; (800467c ) - 8004606: 4013 ands r3, r2 - 8004608: 0019 movs r1, r3 - 800460a: 687b ldr r3, [r7, #4] - 800460c: 6c1a ldr r2, [r3, #64] ; 0x40 - 800460e: 687b ldr r3, [r7, #4] - 8004610: 681b ldr r3, [r3, #0] - 8004612: 430a orrs r2, r1 - 8004614: 605a str r2, [r3, #4] + 800468e: 687b ldr r3, [r7, #4] + 8004690: 681b ldr r3, [r3, #0] + 8004692: 685b ldr r3, [r3, #4] + 8004694: 4a1d ldr r2, [pc, #116] ; (800470c ) + 8004696: 4013 ands r3, r2 + 8004698: 0019 movs r1, r3 + 800469a: 687b ldr r3, [r7, #4] + 800469c: 6c1a ldr r2, [r3, #64] ; 0x40 + 800469e: 687b ldr r3, [r7, #4] + 80046a0: 681b ldr r3, [r3, #0] + 80046a2: 430a orrs r2, r1 + 80046a4: 605a str r2, [r3, #4] /* set auto Baudrate detection parameters if detection is enabled */ if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) - 8004616: 687b ldr r3, [r7, #4] - 8004618: 6c1a ldr r2, [r3, #64] ; 0x40 - 800461a: 2380 movs r3, #128 ; 0x80 - 800461c: 035b lsls r3, r3, #13 - 800461e: 429a cmp r2, r3 - 8004620: d10b bne.n 800463a + 80046a6: 687b ldr r3, [r7, #4] + 80046a8: 6c1a ldr r2, [r3, #64] ; 0x40 + 80046aa: 2380 movs r3, #128 ; 0x80 + 80046ac: 035b lsls r3, r3, #13 + 80046ae: 429a cmp r2, r3 + 80046b0: d10b bne.n 80046ca { assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); - 8004622: 687b ldr r3, [r7, #4] - 8004624: 681b ldr r3, [r3, #0] - 8004626: 685b ldr r3, [r3, #4] - 8004628: 4a15 ldr r2, [pc, #84] ; (8004680 ) - 800462a: 4013 ands r3, r2 - 800462c: 0019 movs r1, r3 - 800462e: 687b ldr r3, [r7, #4] - 8004630: 6c5a ldr r2, [r3, #68] ; 0x44 - 8004632: 687b ldr r3, [r7, #4] - 8004634: 681b ldr r3, [r3, #0] - 8004636: 430a orrs r2, r1 - 8004638: 605a str r2, [r3, #4] + 80046b2: 687b ldr r3, [r7, #4] + 80046b4: 681b ldr r3, [r3, #0] + 80046b6: 685b ldr r3, [r3, #4] + 80046b8: 4a15 ldr r2, [pc, #84] ; (8004710 ) + 80046ba: 4013 ands r3, r2 + 80046bc: 0019 movs r1, r3 + 80046be: 687b ldr r3, [r7, #4] + 80046c0: 6c5a ldr r2, [r3, #68] ; 0x44 + 80046c2: 687b ldr r3, [r7, #4] + 80046c4: 681b ldr r3, [r3, #0] + 80046c6: 430a orrs r2, r1 + 80046c8: 605a str r2, [r3, #4] } } /* if required, configure MSB first on communication line */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) - 800463a: 687b ldr r3, [r7, #4] - 800463c: 6a5b ldr r3, [r3, #36] ; 0x24 - 800463e: 2280 movs r2, #128 ; 0x80 - 8004640: 4013 ands r3, r2 - 8004642: d00b beq.n 800465c + 80046ca: 687b ldr r3, [r7, #4] + 80046cc: 6a5b ldr r3, [r3, #36] ; 0x24 + 80046ce: 2280 movs r2, #128 ; 0x80 + 80046d0: 4013 ands r3, r2 + 80046d2: d00b beq.n 80046ec { assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); - 8004644: 687b ldr r3, [r7, #4] - 8004646: 681b ldr r3, [r3, #0] - 8004648: 685b ldr r3, [r3, #4] - 800464a: 4a0e ldr r2, [pc, #56] ; (8004684 ) - 800464c: 4013 ands r3, r2 - 800464e: 0019 movs r1, r3 - 8004650: 687b ldr r3, [r7, #4] - 8004652: 6c9a ldr r2, [r3, #72] ; 0x48 - 8004654: 687b ldr r3, [r7, #4] - 8004656: 681b ldr r3, [r3, #0] - 8004658: 430a orrs r2, r1 - 800465a: 605a str r2, [r3, #4] + 80046d4: 687b ldr r3, [r7, #4] + 80046d6: 681b ldr r3, [r3, #0] + 80046d8: 685b ldr r3, [r3, #4] + 80046da: 4a0e ldr r2, [pc, #56] ; (8004714 ) + 80046dc: 4013 ands r3, r2 + 80046de: 0019 movs r1, r3 + 80046e0: 687b ldr r3, [r7, #4] + 80046e2: 6c9a ldr r2, [r3, #72] ; 0x48 + 80046e4: 687b ldr r3, [r7, #4] + 80046e6: 681b ldr r3, [r3, #0] + 80046e8: 430a orrs r2, r1 + 80046ea: 605a str r2, [r3, #4] } } - 800465c: 46c0 nop ; (mov r8, r8) - 800465e: 46bd mov sp, r7 - 8004660: b002 add sp, #8 - 8004662: bd80 pop {r7, pc} - 8004664: fffdffff .word 0xfffdffff - 8004668: fffeffff .word 0xfffeffff - 800466c: fffbffff .word 0xfffbffff - 8004670: ffff7fff .word 0xffff7fff - 8004674: ffffefff .word 0xffffefff - 8004678: ffffdfff .word 0xffffdfff - 800467c: ffefffff .word 0xffefffff - 8004680: ff9fffff .word 0xff9fffff - 8004684: fff7ffff .word 0xfff7ffff + 80046ec: 46c0 nop ; (mov r8, r8) + 80046ee: 46bd mov sp, r7 + 80046f0: b002 add sp, #8 + 80046f2: bd80 pop {r7, pc} + 80046f4: fffdffff .word 0xfffdffff + 80046f8: fffeffff .word 0xfffeffff + 80046fc: fffbffff .word 0xfffbffff + 8004700: ffff7fff .word 0xffff7fff + 8004704: ffffefff .word 0xffffefff + 8004708: ffffdfff .word 0xffffdfff + 800470c: ffefffff .word 0xffefffff + 8004710: ff9fffff .word 0xff9fffff + 8004714: fff7ffff .word 0xfff7ffff -08004688 : +08004718 : * @brief Check the UART Idle State. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) { - 8004688: b580 push {r7, lr} - 800468a: b092 sub sp, #72 ; 0x48 - 800468c: af02 add r7, sp, #8 - 800468e: 6078 str r0, [r7, #4] + 8004718: b580 push {r7, lr} + 800471a: b092 sub sp, #72 ; 0x48 + 800471c: af02 add r7, sp, #8 + 800471e: 6078 str r0, [r7, #4] uint32_t tickstart; /* Initialize the UART ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; - 8004690: 687b ldr r3, [r7, #4] - 8004692: 2284 movs r2, #132 ; 0x84 - 8004694: 2100 movs r1, #0 - 8004696: 5099 str r1, [r3, r2] + 8004720: 687b ldr r3, [r7, #4] + 8004722: 2284 movs r2, #132 ; 0x84 + 8004724: 2100 movs r1, #0 + 8004726: 5099 str r1, [r3, r2] /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); - 8004698: f7fc fd80 bl 800119c - 800469c: 0003 movs r3, r0 - 800469e: 63fb str r3, [r7, #60] ; 0x3c + 8004728: f7fc fd80 bl 800122c + 800472c: 0003 movs r3, r0 + 800472e: 63fb str r3, [r7, #60] ; 0x3c /* Check if the Transmitter is enabled */ if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) - 80046a0: 687b ldr r3, [r7, #4] - 80046a2: 681b ldr r3, [r3, #0] - 80046a4: 681b ldr r3, [r3, #0] - 80046a6: 2208 movs r2, #8 - 80046a8: 4013 ands r3, r2 - 80046aa: 2b08 cmp r3, #8 - 80046ac: d12c bne.n 8004708 + 8004730: 687b ldr r3, [r7, #4] + 8004732: 681b ldr r3, [r3, #0] + 8004734: 681b ldr r3, [r3, #0] + 8004736: 2208 movs r2, #8 + 8004738: 4013 ands r3, r2 + 800473a: 2b08 cmp r3, #8 + 800473c: d12c bne.n 8004798 { /* Wait until TEACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 80046ae: 6bfb ldr r3, [r7, #60] ; 0x3c - 80046b0: 2280 movs r2, #128 ; 0x80 - 80046b2: 0391 lsls r1, r2, #14 - 80046b4: 6878 ldr r0, [r7, #4] - 80046b6: 4a46 ldr r2, [pc, #280] ; (80047d0 ) - 80046b8: 9200 str r2, [sp, #0] - 80046ba: 2200 movs r2, #0 - 80046bc: f000 f88c bl 80047d8 - 80046c0: 1e03 subs r3, r0, #0 - 80046c2: d021 beq.n 8004708 + 800473e: 6bfb ldr r3, [r7, #60] ; 0x3c + 8004740: 2280 movs r2, #128 ; 0x80 + 8004742: 0391 lsls r1, r2, #14 + 8004744: 6878 ldr r0, [r7, #4] + 8004746: 4a46 ldr r2, [pc, #280] ; (8004860 ) + 8004748: 9200 str r2, [sp, #0] + 800474a: 2200 movs r2, #0 + 800474c: f000 f88c bl 8004868 + 8004750: 1e03 subs r3, r0, #0 + 8004752: d021 beq.n 8004798 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 80046c4: f3ef 8310 mrs r3, PRIMASK - 80046c8: 627b str r3, [r7, #36] ; 0x24 + 8004754: f3ef 8310 mrs r3, PRIMASK + 8004758: 627b str r3, [r7, #36] ; 0x24 return(result); - 80046ca: 6a7b ldr r3, [r7, #36] ; 0x24 + 800475a: 6a7b ldr r3, [r7, #36] ; 0x24 { /* Disable TXE interrupt for the interrupt process */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE)); - 80046cc: 63bb str r3, [r7, #56] ; 0x38 - 80046ce: 2301 movs r3, #1 - 80046d0: 62bb str r3, [r7, #40] ; 0x28 + 800475c: 63bb str r3, [r7, #56] ; 0x38 + 800475e: 2301 movs r3, #1 + 8004760: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80046d2: 6abb ldr r3, [r7, #40] ; 0x28 - 80046d4: f383 8810 msr PRIMASK, r3 + 8004762: 6abb ldr r3, [r7, #40] ; 0x28 + 8004764: f383 8810 msr PRIMASK, r3 } - 80046d8: 46c0 nop ; (mov r8, r8) - 80046da: 687b ldr r3, [r7, #4] - 80046dc: 681b ldr r3, [r3, #0] - 80046de: 681a ldr r2, [r3, #0] - 80046e0: 687b ldr r3, [r7, #4] - 80046e2: 681b ldr r3, [r3, #0] - 80046e4: 2180 movs r1, #128 ; 0x80 - 80046e6: 438a bics r2, r1 - 80046e8: 601a str r2, [r3, #0] - 80046ea: 6bbb ldr r3, [r7, #56] ; 0x38 - 80046ec: 62fb str r3, [r7, #44] ; 0x2c + 8004768: 46c0 nop ; (mov r8, r8) + 800476a: 687b ldr r3, [r7, #4] + 800476c: 681b ldr r3, [r3, #0] + 800476e: 681a ldr r2, [r3, #0] + 8004770: 687b ldr r3, [r7, #4] + 8004772: 681b ldr r3, [r3, #0] + 8004774: 2180 movs r1, #128 ; 0x80 + 8004776: 438a bics r2, r1 + 8004778: 601a str r2, [r3, #0] + 800477a: 6bbb ldr r3, [r7, #56] ; 0x38 + 800477c: 62fb str r3, [r7, #44] ; 0x2c __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80046ee: 6afb ldr r3, [r7, #44] ; 0x2c - 80046f0: f383 8810 msr PRIMASK, r3 + 800477e: 6afb ldr r3, [r7, #44] ; 0x2c + 8004780: f383 8810 msr PRIMASK, r3 } - 80046f4: 46c0 nop ; (mov r8, r8) + 8004784: 46c0 nop ; (mov r8, r8) huart->gState = HAL_UART_STATE_READY; - 80046f6: 687b ldr r3, [r7, #4] - 80046f8: 2220 movs r2, #32 - 80046fa: 67da str r2, [r3, #124] ; 0x7c + 8004786: 687b ldr r3, [r7, #4] + 8004788: 2220 movs r2, #32 + 800478a: 67da str r2, [r3, #124] ; 0x7c __HAL_UNLOCK(huart); - 80046fc: 687b ldr r3, [r7, #4] - 80046fe: 2278 movs r2, #120 ; 0x78 - 8004700: 2100 movs r1, #0 - 8004702: 5499 strb r1, [r3, r2] + 800478c: 687b ldr r3, [r7, #4] + 800478e: 2278 movs r2, #120 ; 0x78 + 8004790: 2100 movs r1, #0 + 8004792: 5499 strb r1, [r3, r2] /* Timeout occurred */ return HAL_TIMEOUT; - 8004704: 2303 movs r3, #3 - 8004706: e05f b.n 80047c8 + 8004794: 2303 movs r3, #3 + 8004796: e05f b.n 8004858 } } /* Check if the Receiver is enabled */ if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE) - 8004708: 687b ldr r3, [r7, #4] - 800470a: 681b ldr r3, [r3, #0] - 800470c: 681b ldr r3, [r3, #0] - 800470e: 2204 movs r2, #4 - 8004710: 4013 ands r3, r2 - 8004712: 2b04 cmp r3, #4 - 8004714: d146 bne.n 80047a4 + 8004798: 687b ldr r3, [r7, #4] + 800479a: 681b ldr r3, [r3, #0] + 800479c: 681b ldr r3, [r3, #0] + 800479e: 2204 movs r2, #4 + 80047a0: 4013 ands r3, r2 + 80047a2: 2b04 cmp r3, #4 + 80047a4: d146 bne.n 8004834 { /* Wait until REACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) - 8004716: 6bfb ldr r3, [r7, #60] ; 0x3c - 8004718: 2280 movs r2, #128 ; 0x80 - 800471a: 03d1 lsls r1, r2, #15 - 800471c: 6878 ldr r0, [r7, #4] - 800471e: 4a2c ldr r2, [pc, #176] ; (80047d0 ) - 8004720: 9200 str r2, [sp, #0] - 8004722: 2200 movs r2, #0 - 8004724: f000 f858 bl 80047d8 - 8004728: 1e03 subs r3, r0, #0 - 800472a: d03b beq.n 80047a4 + 80047a6: 6bfb ldr r3, [r7, #60] ; 0x3c + 80047a8: 2280 movs r2, #128 ; 0x80 + 80047aa: 03d1 lsls r1, r2, #15 + 80047ac: 6878 ldr r0, [r7, #4] + 80047ae: 4a2c ldr r2, [pc, #176] ; (8004860 ) + 80047b0: 9200 str r2, [sp, #0] + 80047b2: 2200 movs r2, #0 + 80047b4: f000 f858 bl 8004868 + 80047b8: 1e03 subs r3, r0, #0 + 80047ba: d03b beq.n 8004834 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 800472c: f3ef 8310 mrs r3, PRIMASK - 8004730: 60fb str r3, [r7, #12] + 80047bc: f3ef 8310 mrs r3, PRIMASK + 80047c0: 60fb str r3, [r7, #12] return(result); - 8004732: 68fb ldr r3, [r7, #12] + 80047c2: 68fb ldr r3, [r7, #12] { /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 8004734: 637b str r3, [r7, #52] ; 0x34 - 8004736: 2301 movs r3, #1 - 8004738: 613b str r3, [r7, #16] + 80047c4: 637b str r3, [r7, #52] ; 0x34 + 80047c6: 2301 movs r3, #1 + 80047c8: 613b str r3, [r7, #16] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 800473a: 693b ldr r3, [r7, #16] - 800473c: f383 8810 msr PRIMASK, r3 + 80047ca: 693b ldr r3, [r7, #16] + 80047cc: f383 8810 msr PRIMASK, r3 } - 8004740: 46c0 nop ; (mov r8, r8) - 8004742: 687b ldr r3, [r7, #4] - 8004744: 681b ldr r3, [r3, #0] - 8004746: 681a ldr r2, [r3, #0] - 8004748: 687b ldr r3, [r7, #4] - 800474a: 681b ldr r3, [r3, #0] - 800474c: 4921 ldr r1, [pc, #132] ; (80047d4 ) - 800474e: 400a ands r2, r1 - 8004750: 601a str r2, [r3, #0] - 8004752: 6b7b ldr r3, [r7, #52] ; 0x34 - 8004754: 617b str r3, [r7, #20] + 80047d0: 46c0 nop ; (mov r8, r8) + 80047d2: 687b ldr r3, [r7, #4] + 80047d4: 681b ldr r3, [r3, #0] + 80047d6: 681a ldr r2, [r3, #0] + 80047d8: 687b ldr r3, [r7, #4] + 80047da: 681b ldr r3, [r3, #0] + 80047dc: 4921 ldr r1, [pc, #132] ; (8004864 ) + 80047de: 400a ands r2, r1 + 80047e0: 601a str r2, [r3, #0] + 80047e2: 6b7b ldr r3, [r7, #52] ; 0x34 + 80047e4: 617b str r3, [r7, #20] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004756: 697b ldr r3, [r7, #20] - 8004758: f383 8810 msr PRIMASK, r3 + 80047e6: 697b ldr r3, [r7, #20] + 80047e8: f383 8810 msr PRIMASK, r3 } - 800475c: 46c0 nop ; (mov r8, r8) + 80047ec: 46c0 nop ; (mov r8, r8) __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 800475e: f3ef 8310 mrs r3, PRIMASK - 8004762: 61bb str r3, [r7, #24] + 80047ee: f3ef 8310 mrs r3, PRIMASK + 80047f2: 61bb str r3, [r7, #24] return(result); - 8004764: 69bb ldr r3, [r7, #24] + 80047f4: 69bb ldr r3, [r7, #24] ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 8004766: 633b str r3, [r7, #48] ; 0x30 - 8004768: 2301 movs r3, #1 - 800476a: 61fb str r3, [r7, #28] + 80047f6: 633b str r3, [r7, #48] ; 0x30 + 80047f8: 2301 movs r3, #1 + 80047fa: 61fb str r3, [r7, #28] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 800476c: 69fb ldr r3, [r7, #28] - 800476e: f383 8810 msr PRIMASK, r3 + 80047fc: 69fb ldr r3, [r7, #28] + 80047fe: f383 8810 msr PRIMASK, r3 } - 8004772: 46c0 nop ; (mov r8, r8) - 8004774: 687b ldr r3, [r7, #4] - 8004776: 681b ldr r3, [r3, #0] - 8004778: 689a ldr r2, [r3, #8] - 800477a: 687b ldr r3, [r7, #4] - 800477c: 681b ldr r3, [r3, #0] - 800477e: 2101 movs r1, #1 - 8004780: 438a bics r2, r1 - 8004782: 609a str r2, [r3, #8] - 8004784: 6b3b ldr r3, [r7, #48] ; 0x30 - 8004786: 623b str r3, [r7, #32] + 8004802: 46c0 nop ; (mov r8, r8) + 8004804: 687b ldr r3, [r7, #4] + 8004806: 681b ldr r3, [r3, #0] + 8004808: 689a ldr r2, [r3, #8] + 800480a: 687b ldr r3, [r7, #4] + 800480c: 681b ldr r3, [r3, #0] + 800480e: 2101 movs r1, #1 + 8004810: 438a bics r2, r1 + 8004812: 609a str r2, [r3, #8] + 8004814: 6b3b ldr r3, [r7, #48] ; 0x30 + 8004816: 623b str r3, [r7, #32] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004788: 6a3b ldr r3, [r7, #32] - 800478a: f383 8810 msr PRIMASK, r3 + 8004818: 6a3b ldr r3, [r7, #32] + 800481a: f383 8810 msr PRIMASK, r3 } - 800478e: 46c0 nop ; (mov r8, r8) + 800481e: 46c0 nop ; (mov r8, r8) huart->RxState = HAL_UART_STATE_READY; - 8004790: 687b ldr r3, [r7, #4] - 8004792: 2280 movs r2, #128 ; 0x80 - 8004794: 2120 movs r1, #32 - 8004796: 5099 str r1, [r3, r2] + 8004820: 687b ldr r3, [r7, #4] + 8004822: 2280 movs r2, #128 ; 0x80 + 8004824: 2120 movs r1, #32 + 8004826: 5099 str r1, [r3, r2] __HAL_UNLOCK(huart); - 8004798: 687b ldr r3, [r7, #4] - 800479a: 2278 movs r2, #120 ; 0x78 - 800479c: 2100 movs r1, #0 - 800479e: 5499 strb r1, [r3, r2] + 8004828: 687b ldr r3, [r7, #4] + 800482a: 2278 movs r2, #120 ; 0x78 + 800482c: 2100 movs r1, #0 + 800482e: 5499 strb r1, [r3, r2] /* Timeout occurred */ return HAL_TIMEOUT; - 80047a0: 2303 movs r3, #3 - 80047a2: e011 b.n 80047c8 + 8004830: 2303 movs r3, #3 + 8004832: e011 b.n 8004858 } } /* Initialize the UART State */ huart->gState = HAL_UART_STATE_READY; - 80047a4: 687b ldr r3, [r7, #4] - 80047a6: 2220 movs r2, #32 - 80047a8: 67da str r2, [r3, #124] ; 0x7c + 8004834: 687b ldr r3, [r7, #4] + 8004836: 2220 movs r2, #32 + 8004838: 67da str r2, [r3, #124] ; 0x7c huart->RxState = HAL_UART_STATE_READY; - 80047aa: 687b ldr r3, [r7, #4] - 80047ac: 2280 movs r2, #128 ; 0x80 - 80047ae: 2120 movs r1, #32 - 80047b0: 5099 str r1, [r3, r2] + 800483a: 687b ldr r3, [r7, #4] + 800483c: 2280 movs r2, #128 ; 0x80 + 800483e: 2120 movs r1, #32 + 8004840: 5099 str r1, [r3, r2] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 80047b2: 687b ldr r3, [r7, #4] - 80047b4: 2200 movs r2, #0 - 80047b6: 661a str r2, [r3, #96] ; 0x60 + 8004842: 687b ldr r3, [r7, #4] + 8004844: 2200 movs r2, #0 + 8004846: 661a str r2, [r3, #96] ; 0x60 huart->RxEventType = HAL_UART_RXEVENT_TC; - 80047b8: 687b ldr r3, [r7, #4] - 80047ba: 2200 movs r2, #0 - 80047bc: 665a str r2, [r3, #100] ; 0x64 + 8004848: 687b ldr r3, [r7, #4] + 800484a: 2200 movs r2, #0 + 800484c: 665a str r2, [r3, #100] ; 0x64 __HAL_UNLOCK(huart); - 80047be: 687b ldr r3, [r7, #4] - 80047c0: 2278 movs r2, #120 ; 0x78 - 80047c2: 2100 movs r1, #0 - 80047c4: 5499 strb r1, [r3, r2] + 800484e: 687b ldr r3, [r7, #4] + 8004850: 2278 movs r2, #120 ; 0x78 + 8004852: 2100 movs r1, #0 + 8004854: 5499 strb r1, [r3, r2] return HAL_OK; - 80047c6: 2300 movs r3, #0 + 8004856: 2300 movs r3, #0 } - 80047c8: 0018 movs r0, r3 - 80047ca: 46bd mov sp, r7 - 80047cc: b010 add sp, #64 ; 0x40 - 80047ce: bd80 pop {r7, pc} - 80047d0: 01ffffff .word 0x01ffffff - 80047d4: fffffedf .word 0xfffffedf + 8004858: 0018 movs r0, r3 + 800485a: 46bd mov sp, r7 + 800485c: b010 add sp, #64 ; 0x40 + 800485e: bd80 pop {r7, pc} + 8004860: 01ffffff .word 0x01ffffff + 8004864: fffffedf .word 0xfffffedf -080047d8 : +08004868 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { - 80047d8: b580 push {r7, lr} - 80047da: b084 sub sp, #16 - 80047dc: af00 add r7, sp, #0 - 80047de: 60f8 str r0, [r7, #12] - 80047e0: 60b9 str r1, [r7, #8] - 80047e2: 603b str r3, [r7, #0] - 80047e4: 1dfb adds r3, r7, #7 - 80047e6: 701a strb r2, [r3, #0] + 8004868: b580 push {r7, lr} + 800486a: b084 sub sp, #16 + 800486c: af00 add r7, sp, #0 + 800486e: 60f8 str r0, [r7, #12] + 8004870: 60b9 str r1, [r7, #8] + 8004872: 603b str r3, [r7, #0] + 8004874: 1dfb adds r3, r7, #7 + 8004876: 701a strb r2, [r3, #0] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 80047e8: e04b b.n 8004882 + 8004878: e04b b.n 8004912 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) - 80047ea: 69bb ldr r3, [r7, #24] - 80047ec: 3301 adds r3, #1 - 80047ee: d048 beq.n 8004882 + 800487a: 69bb ldr r3, [r7, #24] + 800487c: 3301 adds r3, #1 + 800487e: d048 beq.n 8004912 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) - 80047f0: f7fc fcd4 bl 800119c - 80047f4: 0002 movs r2, r0 - 80047f6: 683b ldr r3, [r7, #0] - 80047f8: 1ad3 subs r3, r2, r3 - 80047fa: 69ba ldr r2, [r7, #24] - 80047fc: 429a cmp r2, r3 - 80047fe: d302 bcc.n 8004806 - 8004800: 69bb ldr r3, [r7, #24] - 8004802: 2b00 cmp r3, #0 - 8004804: d101 bne.n 800480a + 8004880: f7fc fcd4 bl 800122c + 8004884: 0002 movs r2, r0 + 8004886: 683b ldr r3, [r7, #0] + 8004888: 1ad3 subs r3, r2, r3 + 800488a: 69ba ldr r2, [r7, #24] + 800488c: 429a cmp r2, r3 + 800488e: d302 bcc.n 8004896 + 8004890: 69bb ldr r3, [r7, #24] + 8004892: 2b00 cmp r3, #0 + 8004894: d101 bne.n 800489a { return HAL_TIMEOUT; - 8004806: 2303 movs r3, #3 - 8004808: e04b b.n 80048a2 + 8004896: 2303 movs r3, #3 + 8004898: e04b b.n 8004932 } if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) - 800480a: 68fb ldr r3, [r7, #12] - 800480c: 681b ldr r3, [r3, #0] - 800480e: 681b ldr r3, [r3, #0] - 8004810: 2204 movs r2, #4 - 8004812: 4013 ands r3, r2 - 8004814: d035 beq.n 8004882 + 800489a: 68fb ldr r3, [r7, #12] + 800489c: 681b ldr r3, [r3, #0] + 800489e: 681b ldr r3, [r3, #0] + 80048a0: 2204 movs r2, #4 + 80048a2: 4013 ands r3, r2 + 80048a4: d035 beq.n 8004912 { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) - 8004816: 68fb ldr r3, [r7, #12] - 8004818: 681b ldr r3, [r3, #0] - 800481a: 69db ldr r3, [r3, #28] - 800481c: 2208 movs r2, #8 - 800481e: 4013 ands r3, r2 - 8004820: 2b08 cmp r3, #8 - 8004822: d111 bne.n 8004848 + 80048a6: 68fb ldr r3, [r7, #12] + 80048a8: 681b ldr r3, [r3, #0] + 80048aa: 69db ldr r3, [r3, #28] + 80048ac: 2208 movs r2, #8 + 80048ae: 4013 ands r3, r2 + 80048b0: 2b08 cmp r3, #8 + 80048b2: d111 bne.n 80048d8 { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); - 8004824: 68fb ldr r3, [r7, #12] - 8004826: 681b ldr r3, [r3, #0] - 8004828: 2208 movs r2, #8 - 800482a: 621a str r2, [r3, #32] + 80048b4: 68fb ldr r3, [r7, #12] + 80048b6: 681b ldr r3, [r3, #0] + 80048b8: 2208 movs r2, #8 + 80048ba: 621a str r2, [r3, #32] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); - 800482c: 68fb ldr r3, [r7, #12] - 800482e: 0018 movs r0, r3 - 8004830: f000 f83c bl 80048ac + 80048bc: 68fb ldr r3, [r7, #12] + 80048be: 0018 movs r0, r3 + 80048c0: f000 f83c bl 800493c huart->ErrorCode = HAL_UART_ERROR_ORE; - 8004834: 68fb ldr r3, [r7, #12] - 8004836: 2284 movs r2, #132 ; 0x84 - 8004838: 2108 movs r1, #8 - 800483a: 5099 str r1, [r3, r2] + 80048c4: 68fb ldr r3, [r7, #12] + 80048c6: 2284 movs r2, #132 ; 0x84 + 80048c8: 2108 movs r1, #8 + 80048ca: 5099 str r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(huart); - 800483c: 68fb ldr r3, [r7, #12] - 800483e: 2278 movs r2, #120 ; 0x78 - 8004840: 2100 movs r1, #0 - 8004842: 5499 strb r1, [r3, r2] + 80048cc: 68fb ldr r3, [r7, #12] + 80048ce: 2278 movs r2, #120 ; 0x78 + 80048d0: 2100 movs r1, #0 + 80048d2: 5499 strb r1, [r3, r2] return HAL_ERROR; - 8004844: 2301 movs r3, #1 - 8004846: e02c b.n 80048a2 + 80048d4: 2301 movs r3, #1 + 80048d6: e02c b.n 8004932 } if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) - 8004848: 68fb ldr r3, [r7, #12] - 800484a: 681b ldr r3, [r3, #0] - 800484c: 69da ldr r2, [r3, #28] - 800484e: 2380 movs r3, #128 ; 0x80 - 8004850: 011b lsls r3, r3, #4 - 8004852: 401a ands r2, r3 - 8004854: 2380 movs r3, #128 ; 0x80 - 8004856: 011b lsls r3, r3, #4 - 8004858: 429a cmp r2, r3 - 800485a: d112 bne.n 8004882 + 80048d8: 68fb ldr r3, [r7, #12] + 80048da: 681b ldr r3, [r3, #0] + 80048dc: 69da ldr r2, [r3, #28] + 80048de: 2380 movs r3, #128 ; 0x80 + 80048e0: 011b lsls r3, r3, #4 + 80048e2: 401a ands r2, r3 + 80048e4: 2380 movs r3, #128 ; 0x80 + 80048e6: 011b lsls r3, r3, #4 + 80048e8: 429a cmp r2, r3 + 80048ea: d112 bne.n 8004912 { /* Clear Receiver Timeout flag*/ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); - 800485c: 68fb ldr r3, [r7, #12] - 800485e: 681b ldr r3, [r3, #0] - 8004860: 2280 movs r2, #128 ; 0x80 - 8004862: 0112 lsls r2, r2, #4 - 8004864: 621a str r2, [r3, #32] + 80048ec: 68fb ldr r3, [r7, #12] + 80048ee: 681b ldr r3, [r3, #0] + 80048f0: 2280 movs r2, #128 ; 0x80 + 80048f2: 0112 lsls r2, r2, #4 + 80048f4: 621a str r2, [r3, #32] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); - 8004866: 68fb ldr r3, [r7, #12] - 8004868: 0018 movs r0, r3 - 800486a: f000 f81f bl 80048ac + 80048f6: 68fb ldr r3, [r7, #12] + 80048f8: 0018 movs r0, r3 + 80048fa: f000 f81f bl 800493c huart->ErrorCode = HAL_UART_ERROR_RTO; - 800486e: 68fb ldr r3, [r7, #12] - 8004870: 2284 movs r2, #132 ; 0x84 - 8004872: 2120 movs r1, #32 - 8004874: 5099 str r1, [r3, r2] + 80048fe: 68fb ldr r3, [r7, #12] + 8004900: 2284 movs r2, #132 ; 0x84 + 8004902: 2120 movs r1, #32 + 8004904: 5099 str r1, [r3, r2] /* Process Unlocked */ __HAL_UNLOCK(huart); - 8004876: 68fb ldr r3, [r7, #12] - 8004878: 2278 movs r2, #120 ; 0x78 - 800487a: 2100 movs r1, #0 - 800487c: 5499 strb r1, [r3, r2] + 8004906: 68fb ldr r3, [r7, #12] + 8004908: 2278 movs r2, #120 ; 0x78 + 800490a: 2100 movs r1, #0 + 800490c: 5499 strb r1, [r3, r2] return HAL_TIMEOUT; - 800487e: 2303 movs r3, #3 - 8004880: e00f b.n 80048a2 + 800490e: 2303 movs r3, #3 + 8004910: e00f b.n 8004932 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) - 8004882: 68fb ldr r3, [r7, #12] - 8004884: 681b ldr r3, [r3, #0] - 8004886: 69db ldr r3, [r3, #28] - 8004888: 68ba ldr r2, [r7, #8] - 800488a: 4013 ands r3, r2 - 800488c: 68ba ldr r2, [r7, #8] - 800488e: 1ad3 subs r3, r2, r3 - 8004890: 425a negs r2, r3 - 8004892: 4153 adcs r3, r2 - 8004894: b2db uxtb r3, r3 - 8004896: 001a movs r2, r3 - 8004898: 1dfb adds r3, r7, #7 - 800489a: 781b ldrb r3, [r3, #0] - 800489c: 429a cmp r2, r3 - 800489e: d0a4 beq.n 80047ea + 8004912: 68fb ldr r3, [r7, #12] + 8004914: 681b ldr r3, [r3, #0] + 8004916: 69db ldr r3, [r3, #28] + 8004918: 68ba ldr r2, [r7, #8] + 800491a: 4013 ands r3, r2 + 800491c: 68ba ldr r2, [r7, #8] + 800491e: 1ad3 subs r3, r2, r3 + 8004920: 425a negs r2, r3 + 8004922: 4153 adcs r3, r2 + 8004924: b2db uxtb r3, r3 + 8004926: 001a movs r2, r3 + 8004928: 1dfb adds r3, r7, #7 + 800492a: 781b ldrb r3, [r3, #0] + 800492c: 429a cmp r2, r3 + 800492e: d0a4 beq.n 800487a } } } } return HAL_OK; - 80048a0: 2300 movs r3, #0 + 8004930: 2300 movs r3, #0 } - 80048a2: 0018 movs r0, r3 - 80048a4: 46bd mov sp, r7 - 80048a6: b004 add sp, #16 - 80048a8: bd80 pop {r7, pc} + 8004932: 0018 movs r0, r3 + 8004934: 46bd mov sp, r7 + 8004936: b004 add sp, #16 + 8004938: bd80 pop {r7, pc} ... -080048ac : +0800493c : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { - 80048ac: b580 push {r7, lr} - 80048ae: b08e sub sp, #56 ; 0x38 - 80048b0: af00 add r7, sp, #0 - 80048b2: 6078 str r0, [r7, #4] + 800493c: b580 push {r7, lr} + 800493e: b08e sub sp, #56 ; 0x38 + 8004940: af00 add r7, sp, #0 + 8004942: 6078 str r0, [r7, #4] __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 80048b4: f3ef 8310 mrs r3, PRIMASK - 80048b8: 617b str r3, [r7, #20] + 8004944: f3ef 8310 mrs r3, PRIMASK + 8004948: 617b str r3, [r7, #20] return(result); - 80048ba: 697b ldr r3, [r7, #20] + 800494a: 697b ldr r3, [r7, #20] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); - 80048bc: 637b str r3, [r7, #52] ; 0x34 - 80048be: 2301 movs r3, #1 - 80048c0: 61bb str r3, [r7, #24] + 800494c: 637b str r3, [r7, #52] ; 0x34 + 800494e: 2301 movs r3, #1 + 8004950: 61bb str r3, [r7, #24] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80048c2: 69bb ldr r3, [r7, #24] - 80048c4: f383 8810 msr PRIMASK, r3 + 8004952: 69bb ldr r3, [r7, #24] + 8004954: f383 8810 msr PRIMASK, r3 } - 80048c8: 46c0 nop ; (mov r8, r8) - 80048ca: 687b ldr r3, [r7, #4] - 80048cc: 681b ldr r3, [r3, #0] - 80048ce: 681a ldr r2, [r3, #0] - 80048d0: 687b ldr r3, [r7, #4] - 80048d2: 681b ldr r3, [r3, #0] - 80048d4: 4926 ldr r1, [pc, #152] ; (8004970 ) - 80048d6: 400a ands r2, r1 - 80048d8: 601a str r2, [r3, #0] - 80048da: 6b7b ldr r3, [r7, #52] ; 0x34 - 80048dc: 61fb str r3, [r7, #28] + 8004958: 46c0 nop ; (mov r8, r8) + 800495a: 687b ldr r3, [r7, #4] + 800495c: 681b ldr r3, [r3, #0] + 800495e: 681a ldr r2, [r3, #0] + 8004960: 687b ldr r3, [r7, #4] + 8004962: 681b ldr r3, [r3, #0] + 8004964: 4926 ldr r1, [pc, #152] ; (8004a00 ) + 8004966: 400a ands r2, r1 + 8004968: 601a str r2, [r3, #0] + 800496a: 6b7b ldr r3, [r7, #52] ; 0x34 + 800496c: 61fb str r3, [r7, #28] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80048de: 69fb ldr r3, [r7, #28] - 80048e0: f383 8810 msr PRIMASK, r3 + 800496e: 69fb ldr r3, [r7, #28] + 8004970: f383 8810 msr PRIMASK, r3 } - 80048e4: 46c0 nop ; (mov r8, r8) + 8004974: 46c0 nop ; (mov r8, r8) __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 80048e6: f3ef 8310 mrs r3, PRIMASK - 80048ea: 623b str r3, [r7, #32] + 8004976: f3ef 8310 mrs r3, PRIMASK + 800497a: 623b str r3, [r7, #32] return(result); - 80048ec: 6a3b ldr r3, [r7, #32] + 800497c: 6a3b ldr r3, [r7, #32] ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); - 80048ee: 633b str r3, [r7, #48] ; 0x30 - 80048f0: 2301 movs r3, #1 - 80048f2: 627b str r3, [r7, #36] ; 0x24 + 800497e: 633b str r3, [r7, #48] ; 0x30 + 8004980: 2301 movs r3, #1 + 8004982: 627b str r3, [r7, #36] ; 0x24 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80048f4: 6a7b ldr r3, [r7, #36] ; 0x24 - 80048f6: f383 8810 msr PRIMASK, r3 + 8004984: 6a7b ldr r3, [r7, #36] ; 0x24 + 8004986: f383 8810 msr PRIMASK, r3 } - 80048fa: 46c0 nop ; (mov r8, r8) - 80048fc: 687b ldr r3, [r7, #4] - 80048fe: 681b ldr r3, [r3, #0] - 8004900: 689a ldr r2, [r3, #8] - 8004902: 687b ldr r3, [r7, #4] - 8004904: 681b ldr r3, [r3, #0] - 8004906: 2101 movs r1, #1 - 8004908: 438a bics r2, r1 - 800490a: 609a str r2, [r3, #8] - 800490c: 6b3b ldr r3, [r7, #48] ; 0x30 - 800490e: 62bb str r3, [r7, #40] ; 0x28 + 800498a: 46c0 nop ; (mov r8, r8) + 800498c: 687b ldr r3, [r7, #4] + 800498e: 681b ldr r3, [r3, #0] + 8004990: 689a ldr r2, [r3, #8] + 8004992: 687b ldr r3, [r7, #4] + 8004994: 681b ldr r3, [r3, #0] + 8004996: 2101 movs r1, #1 + 8004998: 438a bics r2, r1 + 800499a: 609a str r2, [r3, #8] + 800499c: 6b3b ldr r3, [r7, #48] ; 0x30 + 800499e: 62bb str r3, [r7, #40] ; 0x28 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004910: 6abb ldr r3, [r7, #40] ; 0x28 - 8004912: f383 8810 msr PRIMASK, r3 + 80049a0: 6abb ldr r3, [r7, #40] ; 0x28 + 80049a2: f383 8810 msr PRIMASK, r3 } - 8004916: 46c0 nop ; (mov r8, r8) + 80049a6: 46c0 nop ; (mov r8, r8) /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) - 8004918: 687b ldr r3, [r7, #4] - 800491a: 6e1b ldr r3, [r3, #96] ; 0x60 - 800491c: 2b01 cmp r3, #1 - 800491e: d118 bne.n 8004952 + 80049a8: 687b ldr r3, [r7, #4] + 80049aa: 6e1b ldr r3, [r3, #96] ; 0x60 + 80049ac: 2b01 cmp r3, #1 + 80049ae: d118 bne.n 80049e2 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8004920: f3ef 8310 mrs r3, PRIMASK - 8004924: 60bb str r3, [r7, #8] + 80049b0: f3ef 8310 mrs r3, PRIMASK + 80049b4: 60bb str r3, [r7, #8] return(result); - 8004926: 68bb ldr r3, [r7, #8] + 80049b6: 68bb ldr r3, [r7, #8] { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); - 8004928: 62fb str r3, [r7, #44] ; 0x2c - 800492a: 2301 movs r3, #1 - 800492c: 60fb str r3, [r7, #12] + 80049b8: 62fb str r3, [r7, #44] ; 0x2c + 80049ba: 2301 movs r3, #1 + 80049bc: 60fb str r3, [r7, #12] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 800492e: 68fb ldr r3, [r7, #12] - 8004930: f383 8810 msr PRIMASK, r3 + 80049be: 68fb ldr r3, [r7, #12] + 80049c0: f383 8810 msr PRIMASK, r3 } - 8004934: 46c0 nop ; (mov r8, r8) - 8004936: 687b ldr r3, [r7, #4] - 8004938: 681b ldr r3, [r3, #0] - 800493a: 681a ldr r2, [r3, #0] - 800493c: 687b ldr r3, [r7, #4] - 800493e: 681b ldr r3, [r3, #0] - 8004940: 2110 movs r1, #16 - 8004942: 438a bics r2, r1 - 8004944: 601a str r2, [r3, #0] - 8004946: 6afb ldr r3, [r7, #44] ; 0x2c - 8004948: 613b str r3, [r7, #16] + 80049c4: 46c0 nop ; (mov r8, r8) + 80049c6: 687b ldr r3, [r7, #4] + 80049c8: 681b ldr r3, [r3, #0] + 80049ca: 681a ldr r2, [r3, #0] + 80049cc: 687b ldr r3, [r7, #4] + 80049ce: 681b ldr r3, [r3, #0] + 80049d0: 2110 movs r1, #16 + 80049d2: 438a bics r2, r1 + 80049d4: 601a str r2, [r3, #0] + 80049d6: 6afb ldr r3, [r7, #44] ; 0x2c + 80049d8: 613b str r3, [r7, #16] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 800494a: 693b ldr r3, [r7, #16] - 800494c: f383 8810 msr PRIMASK, r3 + 80049da: 693b ldr r3, [r7, #16] + 80049dc: f383 8810 msr PRIMASK, r3 } - 8004950: 46c0 nop ; (mov r8, r8) + 80049e0: 46c0 nop ; (mov r8, r8) } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - 8004952: 687b ldr r3, [r7, #4] - 8004954: 2280 movs r2, #128 ; 0x80 - 8004956: 2120 movs r1, #32 - 8004958: 5099 str r1, [r3, r2] + 80049e2: 687b ldr r3, [r7, #4] + 80049e4: 2280 movs r2, #128 ; 0x80 + 80049e6: 2120 movs r1, #32 + 80049e8: 5099 str r1, [r3, r2] huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; - 800495a: 687b ldr r3, [r7, #4] - 800495c: 2200 movs r2, #0 - 800495e: 661a str r2, [r3, #96] ; 0x60 + 80049ea: 687b ldr r3, [r7, #4] + 80049ec: 2200 movs r2, #0 + 80049ee: 661a str r2, [r3, #96] ; 0x60 /* Reset RxIsr function pointer */ huart->RxISR = NULL; - 8004960: 687b ldr r3, [r7, #4] - 8004962: 2200 movs r2, #0 - 8004964: 669a str r2, [r3, #104] ; 0x68 + 80049f0: 687b ldr r3, [r7, #4] + 80049f2: 2200 movs r2, #0 + 80049f4: 669a str r2, [r3, #104] ; 0x68 } - 8004966: 46c0 nop ; (mov r8, r8) - 8004968: 46bd mov sp, r7 - 800496a: b00e add sp, #56 ; 0x38 - 800496c: bd80 pop {r7, pc} - 800496e: 46c0 nop ; (mov r8, r8) - 8004970: fffffedf .word 0xfffffedf + 80049f6: 46c0 nop ; (mov r8, r8) + 80049f8: 46bd mov sp, r7 + 80049fa: b00e add sp, #56 ; 0x38 + 80049fc: bd80 pop {r7, pc} + 80049fe: 46c0 nop ; (mov r8, r8) + 8004a00: fffffedf .word 0xfffffedf -08004974 : +08004a04 : * (To be called at end of DMA Abort procedure following error occurrence). * @param hdma DMA handle. * @retval None */ static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma) { - 8004974: b580 push {r7, lr} - 8004976: b084 sub sp, #16 - 8004978: af00 add r7, sp, #0 - 800497a: 6078 str r0, [r7, #4] + 8004a04: b580 push {r7, lr} + 8004a06: b084 sub sp, #16 + 8004a08: af00 add r7, sp, #0 + 8004a0a: 6078 str r0, [r7, #4] UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent); - 800497c: 687b ldr r3, [r7, #4] - 800497e: 6a9b ldr r3, [r3, #40] ; 0x28 - 8004980: 60fb str r3, [r7, #12] + 8004a0c: 687b ldr r3, [r7, #4] + 8004a0e: 6a9b ldr r3, [r3, #40] ; 0x28 + 8004a10: 60fb str r3, [r7, #12] huart->RxXferCount = 0U; - 8004982: 68fb ldr r3, [r7, #12] - 8004984: 225a movs r2, #90 ; 0x5a - 8004986: 2100 movs r1, #0 - 8004988: 5299 strh r1, [r3, r2] + 8004a12: 68fb ldr r3, [r7, #12] + 8004a14: 225a movs r2, #90 ; 0x5a + 8004a16: 2100 movs r1, #0 + 8004a18: 5299 strh r1, [r3, r2] huart->TxXferCount = 0U; - 800498a: 68fb ldr r3, [r7, #12] - 800498c: 2252 movs r2, #82 ; 0x52 - 800498e: 2100 movs r1, #0 - 8004990: 5299 strh r1, [r3, r2] + 8004a1a: 68fb ldr r3, [r7, #12] + 8004a1c: 2252 movs r2, #82 ; 0x52 + 8004a1e: 2100 movs r1, #0 + 8004a20: 5299 strh r1, [r3, r2] #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered error callback*/ huart->ErrorCallback(huart); #else /*Call legacy weak error callback*/ HAL_UART_ErrorCallback(huart); - 8004992: 68fb ldr r3, [r7, #12] - 8004994: 0018 movs r0, r3 - 8004996: f7ff fb2b bl 8003ff0 + 8004a22: 68fb ldr r3, [r7, #12] + 8004a24: 0018 movs r0, r3 + 8004a26: f7ff fb2b bl 8004080 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 800499a: 46c0 nop ; (mov r8, r8) - 800499c: 46bd mov sp, r7 - 800499e: b004 add sp, #16 - 80049a0: bd80 pop {r7, pc} + 8004a2a: 46c0 nop ; (mov r8, r8) + 8004a2c: 46bd mov sp, r7 + 8004a2e: b004 add sp, #16 + 8004a30: bd80 pop {r7, pc} -080049a2 : +08004a32 : * interruptions have been enabled by HAL_UART_Transmit_IT(). * @param huart UART handle. * @retval None */ static void UART_TxISR_8BIT(UART_HandleTypeDef *huart) { - 80049a2: b580 push {r7, lr} - 80049a4: b08a sub sp, #40 ; 0x28 - 80049a6: af00 add r7, sp, #0 - 80049a8: 6078 str r0, [r7, #4] + 8004a32: b580 push {r7, lr} + 8004a34: b08a sub sp, #40 ; 0x28 + 8004a36: af00 add r7, sp, #0 + 8004a38: 6078 str r0, [r7, #4] /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) - 80049aa: 687b ldr r3, [r7, #4] - 80049ac: 6fdb ldr r3, [r3, #124] ; 0x7c - 80049ae: 2b21 cmp r3, #33 ; 0x21 - 80049b0: d14c bne.n 8004a4c + 8004a3a: 687b ldr r3, [r7, #4] + 8004a3c: 6fdb ldr r3, [r3, #124] ; 0x7c + 8004a3e: 2b21 cmp r3, #33 ; 0x21 + 8004a40: d14c bne.n 8004adc { if (huart->TxXferCount == 0U) - 80049b2: 687b ldr r3, [r7, #4] - 80049b4: 2252 movs r2, #82 ; 0x52 - 80049b6: 5a9b ldrh r3, [r3, r2] - 80049b8: b29b uxth r3, r3 - 80049ba: 2b00 cmp r3, #0 - 80049bc: d132 bne.n 8004a24 + 8004a42: 687b ldr r3, [r7, #4] + 8004a44: 2252 movs r2, #82 ; 0x52 + 8004a46: 5a9b ldrh r3, [r3, r2] + 8004a48: b29b uxth r3, r3 + 8004a4a: 2b00 cmp r3, #0 + 8004a4c: d132 bne.n 8004ab4 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 80049be: f3ef 8310 mrs r3, PRIMASK - 80049c2: 60bb str r3, [r7, #8] + 8004a4e: f3ef 8310 mrs r3, PRIMASK + 8004a52: 60bb str r3, [r7, #8] return(result); - 80049c4: 68bb ldr r3, [r7, #8] + 8004a54: 68bb ldr r3, [r7, #8] { /* Disable the UART Transmit Data Register Empty Interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); - 80049c6: 627b str r3, [r7, #36] ; 0x24 - 80049c8: 2301 movs r3, #1 - 80049ca: 60fb str r3, [r7, #12] + 8004a56: 627b str r3, [r7, #36] ; 0x24 + 8004a58: 2301 movs r3, #1 + 8004a5a: 60fb str r3, [r7, #12] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80049cc: 68fb ldr r3, [r7, #12] - 80049ce: f383 8810 msr PRIMASK, r3 + 8004a5c: 68fb ldr r3, [r7, #12] + 8004a5e: f383 8810 msr PRIMASK, r3 } - 80049d2: 46c0 nop ; (mov r8, r8) - 80049d4: 687b ldr r3, [r7, #4] - 80049d6: 681b ldr r3, [r3, #0] - 80049d8: 681a ldr r2, [r3, #0] - 80049da: 687b ldr r3, [r7, #4] - 80049dc: 681b ldr r3, [r3, #0] - 80049de: 2180 movs r1, #128 ; 0x80 - 80049e0: 438a bics r2, r1 - 80049e2: 601a str r2, [r3, #0] - 80049e4: 6a7b ldr r3, [r7, #36] ; 0x24 - 80049e6: 613b str r3, [r7, #16] + 8004a62: 46c0 nop ; (mov r8, r8) + 8004a64: 687b ldr r3, [r7, #4] + 8004a66: 681b ldr r3, [r3, #0] + 8004a68: 681a ldr r2, [r3, #0] + 8004a6a: 687b ldr r3, [r7, #4] + 8004a6c: 681b ldr r3, [r3, #0] + 8004a6e: 2180 movs r1, #128 ; 0x80 + 8004a70: 438a bics r2, r1 + 8004a72: 601a str r2, [r3, #0] + 8004a74: 6a7b ldr r3, [r7, #36] ; 0x24 + 8004a76: 613b str r3, [r7, #16] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80049e8: 693b ldr r3, [r7, #16] - 80049ea: f383 8810 msr PRIMASK, r3 + 8004a78: 693b ldr r3, [r7, #16] + 8004a7a: f383 8810 msr PRIMASK, r3 } - 80049ee: 46c0 nop ; (mov r8, r8) + 8004a7e: 46c0 nop ; (mov r8, r8) __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 80049f0: f3ef 8310 mrs r3, PRIMASK - 80049f4: 617b str r3, [r7, #20] + 8004a80: f3ef 8310 mrs r3, PRIMASK + 8004a84: 617b str r3, [r7, #20] return(result); - 80049f6: 697b ldr r3, [r7, #20] + 8004a86: 697b ldr r3, [r7, #20] /* Enable the UART Transmit Complete Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 80049f8: 623b str r3, [r7, #32] - 80049fa: 2301 movs r3, #1 - 80049fc: 61bb str r3, [r7, #24] + 8004a88: 623b str r3, [r7, #32] + 8004a8a: 2301 movs r3, #1 + 8004a8c: 61bb str r3, [r7, #24] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 80049fe: 69bb ldr r3, [r7, #24] - 8004a00: f383 8810 msr PRIMASK, r3 + 8004a8e: 69bb ldr r3, [r7, #24] + 8004a90: f383 8810 msr PRIMASK, r3 } - 8004a04: 46c0 nop ; (mov r8, r8) - 8004a06: 687b ldr r3, [r7, #4] - 8004a08: 681b ldr r3, [r3, #0] - 8004a0a: 681a ldr r2, [r3, #0] - 8004a0c: 687b ldr r3, [r7, #4] - 8004a0e: 681b ldr r3, [r3, #0] - 8004a10: 2140 movs r1, #64 ; 0x40 - 8004a12: 430a orrs r2, r1 - 8004a14: 601a str r2, [r3, #0] - 8004a16: 6a3b ldr r3, [r7, #32] - 8004a18: 61fb str r3, [r7, #28] + 8004a94: 46c0 nop ; (mov r8, r8) + 8004a96: 687b ldr r3, [r7, #4] + 8004a98: 681b ldr r3, [r3, #0] + 8004a9a: 681a ldr r2, [r3, #0] + 8004a9c: 687b ldr r3, [r7, #4] + 8004a9e: 681b ldr r3, [r3, #0] + 8004aa0: 2140 movs r1, #64 ; 0x40 + 8004aa2: 430a orrs r2, r1 + 8004aa4: 601a str r2, [r3, #0] + 8004aa6: 6a3b ldr r3, [r7, #32] + 8004aa8: 61fb str r3, [r7, #28] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004a1a: 69fb ldr r3, [r7, #28] - 8004a1c: f383 8810 msr PRIMASK, r3 + 8004aaa: 69fb ldr r3, [r7, #28] + 8004aac: f383 8810 msr PRIMASK, r3 } - 8004a20: 46c0 nop ; (mov r8, r8) + 8004ab0: 46c0 nop ; (mov r8, r8) huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF); huart->pTxBuffPtr++; huart->TxXferCount--; } } } - 8004a22: e013 b.n 8004a4c + 8004ab2: e013 b.n 8004adc huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr & (uint8_t)0xFF); - 8004a24: 687b ldr r3, [r7, #4] - 8004a26: 6cdb ldr r3, [r3, #76] ; 0x4c - 8004a28: 781a ldrb r2, [r3, #0] - 8004a2a: 687b ldr r3, [r7, #4] - 8004a2c: 681b ldr r3, [r3, #0] - 8004a2e: 629a str r2, [r3, #40] ; 0x28 + 8004ab4: 687b ldr r3, [r7, #4] + 8004ab6: 6cdb ldr r3, [r3, #76] ; 0x4c + 8004ab8: 781a ldrb r2, [r3, #0] + 8004aba: 687b ldr r3, [r7, #4] + 8004abc: 681b ldr r3, [r3, #0] + 8004abe: 629a str r2, [r3, #40] ; 0x28 huart->pTxBuffPtr++; - 8004a30: 687b ldr r3, [r7, #4] - 8004a32: 6cdb ldr r3, [r3, #76] ; 0x4c - 8004a34: 1c5a adds r2, r3, #1 - 8004a36: 687b ldr r3, [r7, #4] - 8004a38: 64da str r2, [r3, #76] ; 0x4c + 8004ac0: 687b ldr r3, [r7, #4] + 8004ac2: 6cdb ldr r3, [r3, #76] ; 0x4c + 8004ac4: 1c5a adds r2, r3, #1 + 8004ac6: 687b ldr r3, [r7, #4] + 8004ac8: 64da str r2, [r3, #76] ; 0x4c huart->TxXferCount--; - 8004a3a: 687b ldr r3, [r7, #4] - 8004a3c: 2252 movs r2, #82 ; 0x52 - 8004a3e: 5a9b ldrh r3, [r3, r2] - 8004a40: b29b uxth r3, r3 - 8004a42: 3b01 subs r3, #1 - 8004a44: b299 uxth r1, r3 - 8004a46: 687b ldr r3, [r7, #4] - 8004a48: 2252 movs r2, #82 ; 0x52 - 8004a4a: 5299 strh r1, [r3, r2] + 8004aca: 687b ldr r3, [r7, #4] + 8004acc: 2252 movs r2, #82 ; 0x52 + 8004ace: 5a9b ldrh r3, [r3, r2] + 8004ad0: b29b uxth r3, r3 + 8004ad2: 3b01 subs r3, #1 + 8004ad4: b299 uxth r1, r3 + 8004ad6: 687b ldr r3, [r7, #4] + 8004ad8: 2252 movs r2, #82 ; 0x52 + 8004ada: 5299 strh r1, [r3, r2] } - 8004a4c: 46c0 nop ; (mov r8, r8) - 8004a4e: 46bd mov sp, r7 - 8004a50: b00a add sp, #40 ; 0x28 - 8004a52: bd80 pop {r7, pc} + 8004adc: 46c0 nop ; (mov r8, r8) + 8004ade: 46bd mov sp, r7 + 8004ae0: b00a add sp, #40 ; 0x28 + 8004ae2: bd80 pop {r7, pc} -08004a54 : +08004ae4 : * interruptions have been enabled by HAL_UART_Transmit_IT(). * @param huart UART handle. * @retval None */ static void UART_TxISR_16BIT(UART_HandleTypeDef *huart) { - 8004a54: b580 push {r7, lr} - 8004a56: b08c sub sp, #48 ; 0x30 - 8004a58: af00 add r7, sp, #0 - 8004a5a: 6078 str r0, [r7, #4] + 8004ae4: b580 push {r7, lr} + 8004ae6: b08c sub sp, #48 ; 0x30 + 8004ae8: af00 add r7, sp, #0 + 8004aea: 6078 str r0, [r7, #4] const uint16_t *tmp; /* Check that a Tx process is ongoing */ if (huart->gState == HAL_UART_STATE_BUSY_TX) - 8004a5c: 687b ldr r3, [r7, #4] - 8004a5e: 6fdb ldr r3, [r3, #124] ; 0x7c - 8004a60: 2b21 cmp r3, #33 ; 0x21 - 8004a62: d151 bne.n 8004b08 + 8004aec: 687b ldr r3, [r7, #4] + 8004aee: 6fdb ldr r3, [r3, #124] ; 0x7c + 8004af0: 2b21 cmp r3, #33 ; 0x21 + 8004af2: d151 bne.n 8004b98 { if (huart->TxXferCount == 0U) - 8004a64: 687b ldr r3, [r7, #4] - 8004a66: 2252 movs r2, #82 ; 0x52 - 8004a68: 5a9b ldrh r3, [r3, r2] - 8004a6a: b29b uxth r3, r3 - 8004a6c: 2b00 cmp r3, #0 - 8004a6e: d132 bne.n 8004ad6 + 8004af4: 687b ldr r3, [r7, #4] + 8004af6: 2252 movs r2, #82 ; 0x52 + 8004af8: 5a9b ldrh r3, [r3, r2] + 8004afa: b29b uxth r3, r3 + 8004afc: 2b00 cmp r3, #0 + 8004afe: d132 bne.n 8004b66 __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8004a70: f3ef 8310 mrs r3, PRIMASK - 8004a74: 60fb str r3, [r7, #12] + 8004b00: f3ef 8310 mrs r3, PRIMASK + 8004b04: 60fb str r3, [r7, #12] return(result); - 8004a76: 68fb ldr r3, [r7, #12] + 8004b06: 68fb ldr r3, [r7, #12] { /* Disable the UART Transmit Data Register Empty Interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE); - 8004a78: 62bb str r3, [r7, #40] ; 0x28 - 8004a7a: 2301 movs r3, #1 - 8004a7c: 613b str r3, [r7, #16] + 8004b08: 62bb str r3, [r7, #40] ; 0x28 + 8004b0a: 2301 movs r3, #1 + 8004b0c: 613b str r3, [r7, #16] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004a7e: 693b ldr r3, [r7, #16] - 8004a80: f383 8810 msr PRIMASK, r3 + 8004b0e: 693b ldr r3, [r7, #16] + 8004b10: f383 8810 msr PRIMASK, r3 } - 8004a84: 46c0 nop ; (mov r8, r8) - 8004a86: 687b ldr r3, [r7, #4] - 8004a88: 681b ldr r3, [r3, #0] - 8004a8a: 681a ldr r2, [r3, #0] - 8004a8c: 687b ldr r3, [r7, #4] - 8004a8e: 681b ldr r3, [r3, #0] - 8004a90: 2180 movs r1, #128 ; 0x80 - 8004a92: 438a bics r2, r1 - 8004a94: 601a str r2, [r3, #0] - 8004a96: 6abb ldr r3, [r7, #40] ; 0x28 - 8004a98: 617b str r3, [r7, #20] + 8004b14: 46c0 nop ; (mov r8, r8) + 8004b16: 687b ldr r3, [r7, #4] + 8004b18: 681b ldr r3, [r3, #0] + 8004b1a: 681a ldr r2, [r3, #0] + 8004b1c: 687b ldr r3, [r7, #4] + 8004b1e: 681b ldr r3, [r3, #0] + 8004b20: 2180 movs r1, #128 ; 0x80 + 8004b22: 438a bics r2, r1 + 8004b24: 601a str r2, [r3, #0] + 8004b26: 6abb ldr r3, [r7, #40] ; 0x28 + 8004b28: 617b str r3, [r7, #20] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004a9a: 697b ldr r3, [r7, #20] - 8004a9c: f383 8810 msr PRIMASK, r3 + 8004b2a: 697b ldr r3, [r7, #20] + 8004b2c: f383 8810 msr PRIMASK, r3 } - 8004aa0: 46c0 nop ; (mov r8, r8) + 8004b30: 46c0 nop ; (mov r8, r8) __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8004aa2: f3ef 8310 mrs r3, PRIMASK - 8004aa6: 61bb str r3, [r7, #24] + 8004b32: f3ef 8310 mrs r3, PRIMASK + 8004b36: 61bb str r3, [r7, #24] return(result); - 8004aa8: 69bb ldr r3, [r7, #24] + 8004b38: 69bb ldr r3, [r7, #24] /* Enable the UART Transmit Complete Interrupt */ ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 8004aaa: 627b str r3, [r7, #36] ; 0x24 - 8004aac: 2301 movs r3, #1 - 8004aae: 61fb str r3, [r7, #28] + 8004b3a: 627b str r3, [r7, #36] ; 0x24 + 8004b3c: 2301 movs r3, #1 + 8004b3e: 61fb str r3, [r7, #28] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004ab0: 69fb ldr r3, [r7, #28] - 8004ab2: f383 8810 msr PRIMASK, r3 + 8004b40: 69fb ldr r3, [r7, #28] + 8004b42: f383 8810 msr PRIMASK, r3 } - 8004ab6: 46c0 nop ; (mov r8, r8) - 8004ab8: 687b ldr r3, [r7, #4] - 8004aba: 681b ldr r3, [r3, #0] - 8004abc: 681a ldr r2, [r3, #0] - 8004abe: 687b ldr r3, [r7, #4] - 8004ac0: 681b ldr r3, [r3, #0] - 8004ac2: 2140 movs r1, #64 ; 0x40 - 8004ac4: 430a orrs r2, r1 - 8004ac6: 601a str r2, [r3, #0] - 8004ac8: 6a7b ldr r3, [r7, #36] ; 0x24 - 8004aca: 623b str r3, [r7, #32] + 8004b46: 46c0 nop ; (mov r8, r8) + 8004b48: 687b ldr r3, [r7, #4] + 8004b4a: 681b ldr r3, [r3, #0] + 8004b4c: 681a ldr r2, [r3, #0] + 8004b4e: 687b ldr r3, [r7, #4] + 8004b50: 681b ldr r3, [r3, #0] + 8004b52: 2140 movs r1, #64 ; 0x40 + 8004b54: 430a orrs r2, r1 + 8004b56: 601a str r2, [r3, #0] + 8004b58: 6a7b ldr r3, [r7, #36] ; 0x24 + 8004b5a: 623b str r3, [r7, #32] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004acc: 6a3b ldr r3, [r7, #32] - 8004ace: f383 8810 msr PRIMASK, r3 + 8004b5c: 6a3b ldr r3, [r7, #32] + 8004b5e: f383 8810 msr PRIMASK, r3 } - 8004ad2: 46c0 nop ; (mov r8, r8) + 8004b62: 46c0 nop ; (mov r8, r8) huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); huart->pTxBuffPtr += 2U; huart->TxXferCount--; } } } - 8004ad4: e018 b.n 8004b08 + 8004b64: e018 b.n 8004b98 tmp = (const uint16_t *) huart->pTxBuffPtr; - 8004ad6: 687b ldr r3, [r7, #4] - 8004ad8: 6cdb ldr r3, [r3, #76] ; 0x4c - 8004ada: 62fb str r3, [r7, #44] ; 0x2c + 8004b66: 687b ldr r3, [r7, #4] + 8004b68: 6cdb ldr r3, [r3, #76] ; 0x4c + 8004b6a: 62fb str r3, [r7, #44] ; 0x2c huart->Instance->TDR = (((uint32_t)(*tmp)) & 0x01FFUL); - 8004adc: 6afb ldr r3, [r7, #44] ; 0x2c - 8004ade: 881b ldrh r3, [r3, #0] - 8004ae0: 001a movs r2, r3 - 8004ae2: 687b ldr r3, [r7, #4] - 8004ae4: 681b ldr r3, [r3, #0] - 8004ae6: 05d2 lsls r2, r2, #23 - 8004ae8: 0dd2 lsrs r2, r2, #23 - 8004aea: 629a str r2, [r3, #40] ; 0x28 + 8004b6c: 6afb ldr r3, [r7, #44] ; 0x2c + 8004b6e: 881b ldrh r3, [r3, #0] + 8004b70: 001a movs r2, r3 + 8004b72: 687b ldr r3, [r7, #4] + 8004b74: 681b ldr r3, [r3, #0] + 8004b76: 05d2 lsls r2, r2, #23 + 8004b78: 0dd2 lsrs r2, r2, #23 + 8004b7a: 629a str r2, [r3, #40] ; 0x28 huart->pTxBuffPtr += 2U; - 8004aec: 687b ldr r3, [r7, #4] - 8004aee: 6cdb ldr r3, [r3, #76] ; 0x4c - 8004af0: 1c9a adds r2, r3, #2 - 8004af2: 687b ldr r3, [r7, #4] - 8004af4: 64da str r2, [r3, #76] ; 0x4c + 8004b7c: 687b ldr r3, [r7, #4] + 8004b7e: 6cdb ldr r3, [r3, #76] ; 0x4c + 8004b80: 1c9a adds r2, r3, #2 + 8004b82: 687b ldr r3, [r7, #4] + 8004b84: 64da str r2, [r3, #76] ; 0x4c huart->TxXferCount--; - 8004af6: 687b ldr r3, [r7, #4] - 8004af8: 2252 movs r2, #82 ; 0x52 - 8004afa: 5a9b ldrh r3, [r3, r2] - 8004afc: b29b uxth r3, r3 - 8004afe: 3b01 subs r3, #1 - 8004b00: b299 uxth r1, r3 - 8004b02: 687b ldr r3, [r7, #4] - 8004b04: 2252 movs r2, #82 ; 0x52 - 8004b06: 5299 strh r1, [r3, r2] + 8004b86: 687b ldr r3, [r7, #4] + 8004b88: 2252 movs r2, #82 ; 0x52 + 8004b8a: 5a9b ldrh r3, [r3, r2] + 8004b8c: b29b uxth r3, r3 + 8004b8e: 3b01 subs r3, #1 + 8004b90: b299 uxth r1, r3 + 8004b92: 687b ldr r3, [r7, #4] + 8004b94: 2252 movs r2, #82 ; 0x52 + 8004b96: 5299 strh r1, [r3, r2] } - 8004b08: 46c0 nop ; (mov r8, r8) - 8004b0a: 46bd mov sp, r7 - 8004b0c: b00c add sp, #48 ; 0x30 - 8004b0e: bd80 pop {r7, pc} + 8004b98: 46c0 nop ; (mov r8, r8) + 8004b9a: 46bd mov sp, r7 + 8004b9c: b00c add sp, #48 ; 0x30 + 8004b9e: bd80 pop {r7, pc} -08004b10 : +08004ba0 : * @param huart pointer to a UART_HandleTypeDef structure that contains * the configuration information for the specified UART module. * @retval None */ static void UART_EndTransmit_IT(UART_HandleTypeDef *huart) { - 8004b10: b580 push {r7, lr} - 8004b12: b086 sub sp, #24 - 8004b14: af00 add r7, sp, #0 - 8004b16: 6078 str r0, [r7, #4] + 8004ba0: b580 push {r7, lr} + 8004ba2: b086 sub sp, #24 + 8004ba4: af00 add r7, sp, #0 + 8004ba6: 6078 str r0, [r7, #4] __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); - 8004b18: f3ef 8310 mrs r3, PRIMASK - 8004b1c: 60bb str r3, [r7, #8] + 8004ba8: f3ef 8310 mrs r3, PRIMASK + 8004bac: 60bb str r3, [r7, #8] return(result); - 8004b1e: 68bb ldr r3, [r7, #8] + 8004bae: 68bb ldr r3, [r7, #8] /* Disable the UART Transmit Complete Interrupt */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE); - 8004b20: 617b str r3, [r7, #20] - 8004b22: 2301 movs r3, #1 - 8004b24: 60fb str r3, [r7, #12] + 8004bb0: 617b str r3, [r7, #20] + 8004bb2: 2301 movs r3, #1 + 8004bb4: 60fb str r3, [r7, #12] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004b26: 68fb ldr r3, [r7, #12] - 8004b28: f383 8810 msr PRIMASK, r3 + 8004bb6: 68fb ldr r3, [r7, #12] + 8004bb8: f383 8810 msr PRIMASK, r3 } - 8004b2c: 46c0 nop ; (mov r8, r8) - 8004b2e: 687b ldr r3, [r7, #4] - 8004b30: 681b ldr r3, [r3, #0] - 8004b32: 681a ldr r2, [r3, #0] - 8004b34: 687b ldr r3, [r7, #4] - 8004b36: 681b ldr r3, [r3, #0] - 8004b38: 2140 movs r1, #64 ; 0x40 - 8004b3a: 438a bics r2, r1 - 8004b3c: 601a str r2, [r3, #0] - 8004b3e: 697b ldr r3, [r7, #20] - 8004b40: 613b str r3, [r7, #16] + 8004bbc: 46c0 nop ; (mov r8, r8) + 8004bbe: 687b ldr r3, [r7, #4] + 8004bc0: 681b ldr r3, [r3, #0] + 8004bc2: 681a ldr r2, [r3, #0] + 8004bc4: 687b ldr r3, [r7, #4] + 8004bc6: 681b ldr r3, [r3, #0] + 8004bc8: 2140 movs r1, #64 ; 0x40 + 8004bca: 438a bics r2, r1 + 8004bcc: 601a str r2, [r3, #0] + 8004bce: 697b ldr r3, [r7, #20] + 8004bd0: 613b str r3, [r7, #16] __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); - 8004b42: 693b ldr r3, [r7, #16] - 8004b44: f383 8810 msr PRIMASK, r3 + 8004bd2: 693b ldr r3, [r7, #16] + 8004bd4: f383 8810 msr PRIMASK, r3 } - 8004b48: 46c0 nop ; (mov r8, r8) + 8004bd8: 46c0 nop ; (mov r8, r8) /* Tx process is ended, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - 8004b4a: 687b ldr r3, [r7, #4] - 8004b4c: 2220 movs r2, #32 - 8004b4e: 67da str r2, [r3, #124] ; 0x7c + 8004bda: 687b ldr r3, [r7, #4] + 8004bdc: 2220 movs r2, #32 + 8004bde: 67da str r2, [r3, #124] ; 0x7c /* Cleat TxISR function pointer */ huart->TxISR = NULL; - 8004b50: 687b ldr r3, [r7, #4] - 8004b52: 2200 movs r2, #0 - 8004b54: 66da str r2, [r3, #108] ; 0x6c + 8004be0: 687b ldr r3, [r7, #4] + 8004be2: 2200 movs r2, #0 + 8004be4: 66da str r2, [r3, #108] ; 0x6c #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) /*Call registered Tx complete callback*/ huart->TxCpltCallback(huart); #else /*Call legacy weak Tx complete callback*/ HAL_UART_TxCpltCallback(huart); - 8004b56: 687b ldr r3, [r7, #4] - 8004b58: 0018 movs r0, r3 - 8004b5a: f7ff fa41 bl 8003fe0 + 8004be6: 687b ldr r3, [r7, #4] + 8004be8: 0018 movs r0, r3 + 8004bea: f7ff fa41 bl 8004070 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ } - 8004b5e: 46c0 nop ; (mov r8, r8) - 8004b60: 46bd mov sp, r7 - 8004b62: b006 add sp, #24 - 8004b64: bd80 pop {r7, pc} + 8004bee: 46c0 nop ; (mov r8, r8) + 8004bf0: 46bd mov sp, r7 + 8004bf2: b006 add sp, #24 + 8004bf4: bd80 pop {r7, pc} -08004b66 : +08004bf6 : * @brief UART wakeup from Stop mode callback. * @param huart UART handle. * @retval None */ __weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart) { - 8004b66: b580 push {r7, lr} - 8004b68: b082 sub sp, #8 - 8004b6a: af00 add r7, sp, #0 - 8004b6c: 6078 str r0, [r7, #4] + 8004bf6: b580 push {r7, lr} + 8004bf8: b082 sub sp, #8 + 8004bfa: af00 add r7, sp, #0 + 8004bfc: 6078 str r0, [r7, #4] UNUSED(huart); /* NOTE : This function should not be modified, when the callback is needed, the HAL_UARTEx_WakeupCallback can be implemented in the user file. */ } - 8004b6e: 46c0 nop ; (mov r8, r8) - 8004b70: 46bd mov sp, r7 - 8004b72: b002 add sp, #8 - 8004b74: bd80 pop {r7, pc} + 8004bfe: 46c0 nop ; (mov r8, r8) + 8004c00: 46bd mov sp, r7 + 8004c02: b002 add sp, #8 + 8004c04: bd80 pop {r7, pc} -08004b76 : - 8004b76: 0003 movs r3, r0 - 8004b78: 1882 adds r2, r0, r2 - 8004b7a: 4293 cmp r3, r2 - 8004b7c: d100 bne.n 8004b80 - 8004b7e: 4770 bx lr - 8004b80: 7019 strb r1, [r3, #0] - 8004b82: 3301 adds r3, #1 - 8004b84: e7f9 b.n 8004b7a +08004c06 : + 8004c06: 0003 movs r3, r0 + 8004c08: 1882 adds r2, r0, r2 + 8004c0a: 4293 cmp r3, r2 + 8004c0c: d100 bne.n 8004c10 + 8004c0e: 4770 bx lr + 8004c10: 7019 strb r1, [r3, #0] + 8004c12: 3301 adds r3, #1 + 8004c14: e7f9 b.n 8004c0a ... -08004b88 <__libc_init_array>: - 8004b88: b570 push {r4, r5, r6, lr} - 8004b8a: 2600 movs r6, #0 - 8004b8c: 4c0c ldr r4, [pc, #48] ; (8004bc0 <__libc_init_array+0x38>) - 8004b8e: 4d0d ldr r5, [pc, #52] ; (8004bc4 <__libc_init_array+0x3c>) - 8004b90: 1b64 subs r4, r4, r5 - 8004b92: 10a4 asrs r4, r4, #2 - 8004b94: 42a6 cmp r6, r4 - 8004b96: d109 bne.n 8004bac <__libc_init_array+0x24> - 8004b98: 2600 movs r6, #0 - 8004b9a: f000 f819 bl 8004bd0 <_init> - 8004b9e: 4c0a ldr r4, [pc, #40] ; (8004bc8 <__libc_init_array+0x40>) - 8004ba0: 4d0a ldr r5, [pc, #40] ; (8004bcc <__libc_init_array+0x44>) - 8004ba2: 1b64 subs r4, r4, r5 - 8004ba4: 10a4 asrs r4, r4, #2 - 8004ba6: 42a6 cmp r6, r4 - 8004ba8: d105 bne.n 8004bb6 <__libc_init_array+0x2e> - 8004baa: bd70 pop {r4, r5, r6, pc} - 8004bac: 00b3 lsls r3, r6, #2 - 8004bae: 58eb ldr r3, [r5, r3] - 8004bb0: 4798 blx r3 - 8004bb2: 3601 adds r6, #1 - 8004bb4: e7ee b.n 8004b94 <__libc_init_array+0xc> - 8004bb6: 00b3 lsls r3, r6, #2 - 8004bb8: 58eb ldr r3, [r5, r3] - 8004bba: 4798 blx r3 - 8004bbc: 3601 adds r6, #1 - 8004bbe: e7f2 b.n 8004ba6 <__libc_init_array+0x1e> - 8004bc0: 08004c64 .word 0x08004c64 - 8004bc4: 08004c64 .word 0x08004c64 - 8004bc8: 08004c68 .word 0x08004c68 - 8004bcc: 08004c64 .word 0x08004c64 +08004c18 <__libc_init_array>: + 8004c18: b570 push {r4, r5, r6, lr} + 8004c1a: 2600 movs r6, #0 + 8004c1c: 4c0c ldr r4, [pc, #48] ; (8004c50 <__libc_init_array+0x38>) + 8004c1e: 4d0d ldr r5, [pc, #52] ; (8004c54 <__libc_init_array+0x3c>) + 8004c20: 1b64 subs r4, r4, r5 + 8004c22: 10a4 asrs r4, r4, #2 + 8004c24: 42a6 cmp r6, r4 + 8004c26: d109 bne.n 8004c3c <__libc_init_array+0x24> + 8004c28: 2600 movs r6, #0 + 8004c2a: f000 f819 bl 8004c60 <_init> + 8004c2e: 4c0a ldr r4, [pc, #40] ; (8004c58 <__libc_init_array+0x40>) + 8004c30: 4d0a ldr r5, [pc, #40] ; (8004c5c <__libc_init_array+0x44>) + 8004c32: 1b64 subs r4, r4, r5 + 8004c34: 10a4 asrs r4, r4, #2 + 8004c36: 42a6 cmp r6, r4 + 8004c38: d105 bne.n 8004c46 <__libc_init_array+0x2e> + 8004c3a: bd70 pop {r4, r5, r6, pc} + 8004c3c: 00b3 lsls r3, r6, #2 + 8004c3e: 58eb ldr r3, [r5, r3] + 8004c40: 4798 blx r3 + 8004c42: 3601 adds r6, #1 + 8004c44: e7ee b.n 8004c24 <__libc_init_array+0xc> + 8004c46: 00b3 lsls r3, r6, #2 + 8004c48: 58eb ldr r3, [r5, r3] + 8004c4a: 4798 blx r3 + 8004c4c: 3601 adds r6, #1 + 8004c4e: e7f2 b.n 8004c36 <__libc_init_array+0x1e> + 8004c50: 08004cf4 .word 0x08004cf4 + 8004c54: 08004cf4 .word 0x08004cf4 + 8004c58: 08004cf8 .word 0x08004cf8 + 8004c5c: 08004cf4 .word 0x08004cf4 -08004bd0 <_init>: - 8004bd0: b5f8 push {r3, r4, r5, r6, r7, lr} - 8004bd2: 46c0 nop ; (mov r8, r8) - 8004bd4: bcf8 pop {r3, r4, r5, r6, r7} - 8004bd6: bc08 pop {r3} - 8004bd8: 469e mov lr, r3 - 8004bda: 4770 bx lr +08004c60 <_init>: + 8004c60: b5f8 push {r3, r4, r5, r6, r7, lr} + 8004c62: 46c0 nop ; (mov r8, r8) + 8004c64: bcf8 pop {r3, r4, r5, r6, r7} + 8004c66: bc08 pop {r3} + 8004c68: 469e mov lr, r3 + 8004c6a: 4770 bx lr -08004bdc <_fini>: - 8004bdc: b5f8 push {r3, r4, r5, r6, r7, lr} - 8004bde: 46c0 nop ; (mov r8, r8) - 8004be0: bcf8 pop {r3, r4, r5, r6, r7} - 8004be2: bc08 pop {r3} - 8004be4: 469e mov lr, r3 - 8004be6: 4770 bx lr +08004c6c <_fini>: + 8004c6c: b5f8 push {r3, r4, r5, r6, r7, lr} + 8004c6e: 46c0 nop ; (mov r8, r8) + 8004c70: bcf8 pop {r3, r4, r5, r6, r7} + 8004c72: bc08 pop {r3} + 8004c74: 469e mov lr, r3 + 8004c76: 4770 bx lr diff --git a/code/Debug/radiosonda_m20.map b/code/Debug/radiosonda_m20.map index 1fefd42..d1a6da1 100644 --- a/code/Debug/radiosonda_m20.map +++ b/code/Debug/radiosonda_m20.map @@ -263,6 +263,7 @@ Discarded input sections .group 0x0000000000000000 0xc ./Core/Src/main.o .group 0x0000000000000000 0xc ./Core/Src/main.o .group 0x0000000000000000 0xc ./Core/Src/main.o + .group 0x0000000000000000 0xc ./Core/Src/main.o .text 0x0000000000000000 0x0 ./Core/Src/main.o .data 0x0000000000000000 0x0 ./Core/Src/main.o .bss 0x0000000000000000 0x0 ./Core/Src/main.o @@ -4134,7 +4135,7 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- 0x0000000008000000 g_pfnVectors 0x00000000080000c0 . = ALIGN (0x4) -.text 0x00000000080000c0 0x4b28 +.text 0x00000000080000c0 0x4bb8 0x00000000080000c0 . = ALIGN (0x4) *(.text) .text 0x00000000080000c0 0x48 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o @@ -4159,383 +4160,383 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- *(.text*) .text.myspi 0x00000000080004a8 0xd4 ./Core/Src/adf7012.o 0x00000000080004a8 myspi - .text.main 0x000000000800057c 0x168 ./Core/Src/main.o + .text.main 0x000000000800057c 0x1f8 ./Core/Src/main.o 0x000000000800057c main .text.SystemClock_Config - 0x00000000080006e4 0xf8 ./Core/Src/main.o - 0x00000000080006e4 SystemClock_Config + 0x0000000008000774 0xf8 ./Core/Src/main.o + 0x0000000008000774 SystemClock_Config .text.MX_ADC_Init - 0x00000000080007dc 0x108 ./Core/Src/main.o + 0x000000000800086c 0x108 ./Core/Src/main.o .text.MX_LPUART1_UART_Init - 0x00000000080008e4 0x5c ./Core/Src/main.o + 0x0000000008000974 0x5c ./Core/Src/main.o .text.MX_USART1_UART_Init - 0x0000000008000940 0x60 ./Core/Src/main.o + 0x00000000080009d0 0x60 ./Core/Src/main.o .text.MX_SPI1_Init - 0x00000000080009a0 0x70 ./Core/Src/main.o + 0x0000000008000a30 0x70 ./Core/Src/main.o .text.MX_TIM21_Init - 0x0000000008000a10 0xac ./Core/Src/main.o + 0x0000000008000aa0 0xac ./Core/Src/main.o .text.MX_DMA_Init - 0x0000000008000abc 0x3c ./Core/Src/main.o + 0x0000000008000b4c 0x3c ./Core/Src/main.o .text.MX_GPIO_Init - 0x0000000008000af8 0x1ec ./Core/Src/main.o + 0x0000000008000b88 0x1ec ./Core/Src/main.o .text.Error_Handler - 0x0000000008000ce4 0xa ./Core/Src/main.o - 0x0000000008000ce4 Error_Handler - *fill* 0x0000000008000cee 0x2 + 0x0000000008000d74 0xa ./Core/Src/main.o + 0x0000000008000d74 Error_Handler + *fill* 0x0000000008000d7e 0x2 .text.HAL_MspInit - 0x0000000008000cf0 0x28 ./Core/Src/stm32l0xx_hal_msp.o - 0x0000000008000cf0 HAL_MspInit + 0x0000000008000d80 0x28 ./Core/Src/stm32l0xx_hal_msp.o + 0x0000000008000d80 HAL_MspInit .text.HAL_ADC_MspInit - 0x0000000008000d18 0xb8 ./Core/Src/stm32l0xx_hal_msp.o - 0x0000000008000d18 HAL_ADC_MspInit + 0x0000000008000da8 0xb8 ./Core/Src/stm32l0xx_hal_msp.o + 0x0000000008000da8 HAL_ADC_MspInit .text.HAL_UART_MspInit - 0x0000000008000dd0 0x15c ./Core/Src/stm32l0xx_hal_msp.o - 0x0000000008000dd0 HAL_UART_MspInit + 0x0000000008000e60 0x15c ./Core/Src/stm32l0xx_hal_msp.o + 0x0000000008000e60 HAL_UART_MspInit .text.HAL_SPI_MspInit - 0x0000000008000f2c 0x88 ./Core/Src/stm32l0xx_hal_msp.o - 0x0000000008000f2c HAL_SPI_MspInit + 0x0000000008000fbc 0x88 ./Core/Src/stm32l0xx_hal_msp.o + 0x0000000008000fbc HAL_SPI_MspInit .text.HAL_TIM_Base_MspInit - 0x0000000008000fb4 0x40 ./Core/Src/stm32l0xx_hal_msp.o - 0x0000000008000fb4 HAL_TIM_Base_MspInit + 0x0000000008001044 0x40 ./Core/Src/stm32l0xx_hal_msp.o + 0x0000000008001044 HAL_TIM_Base_MspInit .text.NMI_Handler - 0x0000000008000ff4 0xa ./Core/Src/stm32l0xx_it.o - 0x0000000008000ff4 NMI_Handler + 0x0000000008001084 0xa ./Core/Src/stm32l0xx_it.o + 0x0000000008001084 NMI_Handler .text.HardFault_Handler - 0x0000000008000ffe 0x6 ./Core/Src/stm32l0xx_it.o - 0x0000000008000ffe HardFault_Handler + 0x000000000800108e 0x6 ./Core/Src/stm32l0xx_it.o + 0x000000000800108e HardFault_Handler .text.SVC_Handler - 0x0000000008001004 0xa ./Core/Src/stm32l0xx_it.o - 0x0000000008001004 SVC_Handler + 0x0000000008001094 0xa ./Core/Src/stm32l0xx_it.o + 0x0000000008001094 SVC_Handler .text.PendSV_Handler - 0x000000000800100e 0xa ./Core/Src/stm32l0xx_it.o - 0x000000000800100e PendSV_Handler + 0x000000000800109e 0xa ./Core/Src/stm32l0xx_it.o + 0x000000000800109e PendSV_Handler .text.SysTick_Handler - 0x0000000008001018 0xe ./Core/Src/stm32l0xx_it.o - 0x0000000008001018 SysTick_Handler - *fill* 0x0000000008001026 0x2 + 0x00000000080010a8 0xe ./Core/Src/stm32l0xx_it.o + 0x00000000080010a8 SysTick_Handler + *fill* 0x00000000080010b6 0x2 .text.DMA1_Channel2_3_IRQHandler - 0x0000000008001028 0x18 ./Core/Src/stm32l0xx_it.o - 0x0000000008001028 DMA1_Channel2_3_IRQHandler + 0x00000000080010b8 0x18 ./Core/Src/stm32l0xx_it.o + 0x00000000080010b8 DMA1_Channel2_3_IRQHandler .text.TIM21_IRQHandler - 0x0000000008001040 0x18 ./Core/Src/stm32l0xx_it.o - 0x0000000008001040 TIM21_IRQHandler + 0x00000000080010d0 0x18 ./Core/Src/stm32l0xx_it.o + 0x00000000080010d0 TIM21_IRQHandler .text.USART1_IRQHandler - 0x0000000008001058 0x18 ./Core/Src/stm32l0xx_it.o - 0x0000000008001058 USART1_IRQHandler + 0x00000000080010e8 0x18 ./Core/Src/stm32l0xx_it.o + 0x00000000080010e8 USART1_IRQHandler .text.SystemInit - 0x0000000008001070 0xa ./Core/Src/system_stm32l0xx.o - 0x0000000008001070 SystemInit - *fill* 0x000000000800107a 0x2 + 0x0000000008001100 0xa ./Core/Src/system_stm32l0xx.o + 0x0000000008001100 SystemInit + *fill* 0x000000000800110a 0x2 .text.Reset_Handler - 0x000000000800107c 0x50 ./Core/Startup/startup_stm32l051r6tx.o - 0x000000000800107c Reset_Handler + 0x000000000800110c 0x50 ./Core/Startup/startup_stm32l051r6tx.o + 0x000000000800110c Reset_Handler .text.Default_Handler - 0x00000000080010cc 0x2 ./Core/Startup/startup_stm32l051r6tx.o - 0x00000000080010cc ADC1_COMP_IRQHandler - 0x00000000080010cc TIM6_IRQHandler - 0x00000000080010cc PVD_IRQHandler - 0x00000000080010cc I2C1_IRQHandler - 0x00000000080010cc SPI1_IRQHandler - 0x00000000080010cc EXTI2_3_IRQHandler - 0x00000000080010cc I2C2_IRQHandler - 0x00000000080010cc RTC_IRQHandler - 0x00000000080010cc DMA1_Channel4_5_6_7_IRQHandler - 0x00000000080010cc EXTI4_15_IRQHandler - 0x00000000080010cc RCC_IRQHandler - 0x00000000080010cc DMA1_Channel1_IRQHandler - 0x00000000080010cc Default_Handler - 0x00000000080010cc TIM22_IRQHandler - 0x00000000080010cc EXTI0_1_IRQHandler - 0x00000000080010cc SPI2_IRQHandler - 0x00000000080010cc WWDG_IRQHandler - 0x00000000080010cc LPUART1_IRQHandler - 0x00000000080010cc TIM2_IRQHandler - 0x00000000080010cc USART2_IRQHandler - 0x00000000080010cc FLASH_IRQHandler - 0x00000000080010cc LPTIM1_IRQHandler - *fill* 0x00000000080010ce 0x2 + 0x000000000800115c 0x2 ./Core/Startup/startup_stm32l051r6tx.o + 0x000000000800115c ADC1_COMP_IRQHandler + 0x000000000800115c TIM6_IRQHandler + 0x000000000800115c PVD_IRQHandler + 0x000000000800115c I2C1_IRQHandler + 0x000000000800115c SPI1_IRQHandler + 0x000000000800115c EXTI2_3_IRQHandler + 0x000000000800115c I2C2_IRQHandler + 0x000000000800115c RTC_IRQHandler + 0x000000000800115c DMA1_Channel4_5_6_7_IRQHandler + 0x000000000800115c EXTI4_15_IRQHandler + 0x000000000800115c RCC_IRQHandler + 0x000000000800115c DMA1_Channel1_IRQHandler + 0x000000000800115c Default_Handler + 0x000000000800115c TIM22_IRQHandler + 0x000000000800115c EXTI0_1_IRQHandler + 0x000000000800115c SPI2_IRQHandler + 0x000000000800115c WWDG_IRQHandler + 0x000000000800115c LPUART1_IRQHandler + 0x000000000800115c TIM2_IRQHandler + 0x000000000800115c USART2_IRQHandler + 0x000000000800115c FLASH_IRQHandler + 0x000000000800115c LPTIM1_IRQHandler + *fill* 0x000000000800115e 0x2 .text.HAL_Init - 0x00000000080010d0 0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o - 0x00000000080010d0 HAL_Init + 0x0000000008001160 0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o + 0x0000000008001160 HAL_Init .text.HAL_InitTick - 0x0000000008001110 0x68 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o - 0x0000000008001110 HAL_InitTick + 0x00000000080011a0 0x68 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o + 0x00000000080011a0 HAL_InitTick .text.HAL_IncTick - 0x0000000008001178 0x24 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o - 0x0000000008001178 HAL_IncTick + 0x0000000008001208 0x24 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o + 0x0000000008001208 HAL_IncTick .text.HAL_GetTick - 0x000000000800119c 0x14 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o - 0x000000000800119c HAL_GetTick + 0x000000000800122c 0x14 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o + 0x000000000800122c HAL_GetTick .text.HAL_Delay - 0x00000000080011b0 0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o - 0x00000000080011b0 HAL_Delay + 0x0000000008001240 0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o + 0x0000000008001240 HAL_Delay .text.HAL_ADC_Init - 0x00000000080011f8 0x2e8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o - 0x00000000080011f8 HAL_ADC_Init + 0x0000000008001288 0x2e8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o + 0x0000000008001288 HAL_ADC_Init .text.HAL_ADC_ConfigChannel - 0x00000000080014e0 0x10c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o - 0x00000000080014e0 HAL_ADC_ConfigChannel + 0x0000000008001570 0x10c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o + 0x0000000008001570 HAL_ADC_ConfigChannel .text.ADC_DelayMicroSecond - 0x00000000080015ec 0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o + 0x000000000800167c 0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o .text.__NVIC_EnableIRQ - 0x000000000800162c 0x34 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o + 0x00000000080016bc 0x34 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o .text.__NVIC_SetPriority - 0x0000000008001660 0xdc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o + 0x00000000080016f0 0xdc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o .text.SysTick_Config - 0x000000000800173c 0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o + 0x00000000080017cc 0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o .text.HAL_NVIC_SetPriority - 0x0000000008001784 0x2a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o - 0x0000000008001784 HAL_NVIC_SetPriority + 0x0000000008001814 0x2a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o + 0x0000000008001814 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x00000000080017ae 0x20 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o - 0x00000000080017ae HAL_NVIC_EnableIRQ + 0x000000000800183e 0x20 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o + 0x000000000800183e HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x00000000080017ce 0x1a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o - 0x00000000080017ce HAL_SYSTICK_Config + 0x000000000800185e 0x1a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o + 0x000000000800185e HAL_SYSTICK_Config .text.HAL_DMA_Init - 0x00000000080017e8 0xf0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o - 0x00000000080017e8 HAL_DMA_Init + 0x0000000008001878 0xf0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o + 0x0000000008001878 HAL_DMA_Init .text.HAL_DMA_Abort - 0x00000000080018d8 0x80 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o - 0x00000000080018d8 HAL_DMA_Abort + 0x0000000008001968 0x80 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o + 0x0000000008001968 HAL_DMA_Abort .text.HAL_DMA_Abort_IT - 0x0000000008001958 0x8e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o - 0x0000000008001958 HAL_DMA_Abort_IT + 0x00000000080019e8 0x8e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o + 0x00000000080019e8 HAL_DMA_Abort_IT .text.HAL_DMA_IRQHandler - 0x00000000080019e6 0x15c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o - 0x00000000080019e6 HAL_DMA_IRQHandler - *fill* 0x0000000008001b42 0x2 + 0x0000000008001a76 0x15c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o + 0x0000000008001a76 HAL_DMA_IRQHandler + *fill* 0x0000000008001bd2 0x2 .text.HAL_GPIO_Init - 0x0000000008001b44 0x2ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o - 0x0000000008001b44 HAL_GPIO_Init + 0x0000000008001bd4 0x2ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o + 0x0000000008001bd4 HAL_GPIO_Init .text.HAL_GPIO_WritePin - 0x0000000008001e30 0x3a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o - 0x0000000008001e30 HAL_GPIO_WritePin + 0x0000000008001ec0 0x3a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o + 0x0000000008001ec0 HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x0000000008001e6a 0x36 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o - 0x0000000008001e6a HAL_GPIO_TogglePin + 0x0000000008001efa 0x36 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o + 0x0000000008001efa HAL_GPIO_TogglePin .text.HAL_RCC_OscConfig - 0x0000000008001ea0 0x6d4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - 0x0000000008001ea0 HAL_RCC_OscConfig + 0x0000000008001f30 0x6d4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + 0x0000000008001f30 HAL_RCC_OscConfig .text.HAL_RCC_ClockConfig - 0x0000000008002574 0x290 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - 0x0000000008002574 HAL_RCC_ClockConfig + 0x0000000008002604 0x290 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + 0x0000000008002604 HAL_RCC_ClockConfig .text.HAL_RCC_MCOConfig - 0x0000000008002804 0x108 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - 0x0000000008002804 HAL_RCC_MCOConfig + 0x0000000008002894 0x108 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + 0x0000000008002894 HAL_RCC_MCOConfig .text.HAL_RCC_EnableCSS - 0x000000000800290c 0x1c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - 0x000000000800290c HAL_RCC_EnableCSS + 0x000000000800299c 0x1c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + 0x000000000800299c HAL_RCC_EnableCSS .text.HAL_RCC_GetSysClockFreq - 0x0000000008002928 0x14c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - 0x0000000008002928 HAL_RCC_GetSysClockFreq + 0x00000000080029b8 0x14c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + 0x00000000080029b8 HAL_RCC_GetSysClockFreq .text.HAL_RCC_GetHCLKFreq - 0x0000000008002a74 0x14 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - 0x0000000008002a74 HAL_RCC_GetHCLKFreq + 0x0000000008002b04 0x14 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + 0x0000000008002b04 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x0000000008002a88 0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - 0x0000000008002a88 HAL_RCC_GetPCLK1Freq + 0x0000000008002b18 0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + 0x0000000008002b18 HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x0000000008002ab4 0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - 0x0000000008002ab4 HAL_RCC_GetPCLK2Freq + 0x0000000008002b44 0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + 0x0000000008002b44 HAL_RCC_GetPCLK2Freq .text.HAL_RCC_NMI_IRQHandler - 0x0000000008002ae0 0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - 0x0000000008002ae0 HAL_RCC_NMI_IRQHandler + 0x0000000008002b70 0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + 0x0000000008002b70 HAL_RCC_NMI_IRQHandler .text.HAL_RCC_CSSCallback - 0x0000000008002b0c 0xa ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - 0x0000000008002b0c HAL_RCC_CSSCallback - *fill* 0x0000000008002b16 0x2 + 0x0000000008002b9c 0xa ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + 0x0000000008002b9c HAL_RCC_CSSCallback + *fill* 0x0000000008002ba6 0x2 .text.HAL_RCCEx_PeriphCLKConfig - 0x0000000008002b18 0x274 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o - 0x0000000008002b18 HAL_RCCEx_PeriphCLKConfig + 0x0000000008002ba8 0x274 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o + 0x0000000008002ba8 HAL_RCCEx_PeriphCLKConfig .text.HAL_SPI_Init - 0x0000000008002d8c 0x128 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o - 0x0000000008002d8c HAL_SPI_Init + 0x0000000008002e1c 0x128 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o + 0x0000000008002e1c HAL_SPI_Init .text.HAL_TIM_Base_Init - 0x0000000008002eb4 0x80 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - 0x0000000008002eb4 HAL_TIM_Base_Init + 0x0000000008002f44 0x80 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x0000000008002f44 HAL_TIM_Base_Init .text.HAL_TIM_IRQHandler - 0x0000000008002f34 0x1d0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - 0x0000000008002f34 HAL_TIM_IRQHandler + 0x0000000008002fc4 0x1d0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x0000000008002fc4 HAL_TIM_IRQHandler .text.HAL_TIM_ConfigClockSource - 0x0000000008003104 0x1a8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - 0x0000000008003104 HAL_TIM_ConfigClockSource + 0x0000000008003194 0x1a8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x0000000008003194 HAL_TIM_ConfigClockSource .text.HAL_TIM_PeriodElapsedCallback - 0x00000000080032ac 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - 0x00000000080032ac HAL_TIM_PeriodElapsedCallback + 0x000000000800333c 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x000000000800333c HAL_TIM_PeriodElapsedCallback .text.HAL_TIM_OC_DelayElapsedCallback - 0x00000000080032bc 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - 0x00000000080032bc HAL_TIM_OC_DelayElapsedCallback + 0x000000000800334c 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x000000000800334c HAL_TIM_OC_DelayElapsedCallback .text.HAL_TIM_IC_CaptureCallback - 0x00000000080032cc 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - 0x00000000080032cc HAL_TIM_IC_CaptureCallback + 0x000000000800335c 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x000000000800335c HAL_TIM_IC_CaptureCallback .text.HAL_TIM_PWM_PulseFinishedCallback - 0x00000000080032dc 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - 0x00000000080032dc HAL_TIM_PWM_PulseFinishedCallback + 0x000000000800336c 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x000000000800336c HAL_TIM_PWM_PulseFinishedCallback .text.HAL_TIM_TriggerCallback - 0x00000000080032ec 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - 0x00000000080032ec HAL_TIM_TriggerCallback + 0x000000000800337c 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x000000000800337c HAL_TIM_TriggerCallback .text.TIM_Base_SetConfig - 0x00000000080032fc 0xa8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x000000000800338c 0xa8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o .text.TIM_TI1_ConfigInputStage - 0x00000000080033a4 0x5c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x0000000008003434 0x5c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o .text.TIM_TI2_ConfigInputStage - 0x0000000008003400 0x64 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x0000000008003490 0x64 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o .text.TIM_ITRx_SetConfig - 0x0000000008003464 0x32 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - *fill* 0x0000000008003496 0x2 + 0x00000000080034f4 0x32 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + *fill* 0x0000000008003526 0x2 .text.TIM_ETR_SetConfig - 0x0000000008003498 0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + 0x0000000008003528 0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o .text.HAL_TIMEx_MasterConfigSynchronization - 0x00000000080034d8 0xb0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o - 0x00000000080034d8 HAL_TIMEx_MasterConfigSynchronization + 0x0000000008003568 0xb0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o + 0x0000000008003568 HAL_TIMEx_MasterConfigSynchronization .text.HAL_UART_Init - 0x0000000008003588 0xa8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x0000000008003588 HAL_UART_Init + 0x0000000008003618 0xa8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008003618 HAL_UART_Init .text.HAL_UART_Transmit - 0x0000000008003630 0x13e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x0000000008003630 HAL_UART_Transmit - *fill* 0x000000000800376e 0x2 + 0x00000000080036c0 0x13e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x00000000080036c0 HAL_UART_Transmit + *fill* 0x00000000080037fe 0x2 .text.HAL_UART_Receive - 0x0000000008003770 0x1cc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x0000000008003770 HAL_UART_Receive + 0x0000000008003800 0x1cc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008003800 HAL_UART_Receive .text.HAL_UART_Transmit_IT - 0x000000000800393c 0xe0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x000000000800393c HAL_UART_Transmit_IT + 0x00000000080039cc 0xe0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x00000000080039cc HAL_UART_Transmit_IT .text.HAL_UART_IRQHandler - 0x0000000008003a1c 0x5c4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x0000000008003a1c HAL_UART_IRQHandler + 0x0000000008003aac 0x5c4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008003aac HAL_UART_IRQHandler .text.HAL_UART_TxCpltCallback - 0x0000000008003fe0 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x0000000008003fe0 HAL_UART_TxCpltCallback + 0x0000000008004070 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008004070 HAL_UART_TxCpltCallback .text.HAL_UART_ErrorCallback - 0x0000000008003ff0 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x0000000008003ff0 HAL_UART_ErrorCallback + 0x0000000008004080 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008004080 HAL_UART_ErrorCallback .text.HAL_UARTEx_RxEventCallback - 0x0000000008004000 0x16 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x0000000008004000 HAL_UARTEx_RxEventCallback - *fill* 0x0000000008004016 0x2 + 0x0000000008004090 0x16 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008004090 HAL_UARTEx_RxEventCallback + *fill* 0x00000000080040a6 0x2 .text.UART_SetConfig - 0x0000000008004018 0x508 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x0000000008004018 UART_SetConfig + 0x00000000080040a8 0x508 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x00000000080040a8 UART_SetConfig .text.UART_AdvFeatureConfig - 0x0000000008004520 0x168 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x0000000008004520 UART_AdvFeatureConfig + 0x00000000080045b0 0x168 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x00000000080045b0 UART_AdvFeatureConfig .text.UART_CheckIdleState - 0x0000000008004688 0x150 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x0000000008004688 UART_CheckIdleState + 0x0000000008004718 0x150 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008004718 UART_CheckIdleState .text.UART_WaitOnFlagUntilTimeout - 0x00000000080047d8 0xd2 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x00000000080047d8 UART_WaitOnFlagUntilTimeout - *fill* 0x00000000080048aa 0x2 + 0x0000000008004868 0xd2 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008004868 UART_WaitOnFlagUntilTimeout + *fill* 0x000000000800493a 0x2 .text.UART_EndRxTransfer - 0x00000000080048ac 0xc8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x000000000800493c 0xc8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o .text.UART_DMAAbortOnError - 0x0000000008004974 0x2e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008004a04 0x2e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o .text.UART_TxISR_8BIT - 0x00000000080049a2 0xb2 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008004a32 0xb2 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o .text.UART_TxISR_16BIT - 0x0000000008004a54 0xbc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008004ae4 0xbc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o .text.UART_EndTransmit_IT - 0x0000000008004b10 0x56 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008004ba0 0x56 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o .text.HAL_UARTEx_WakeupCallback - 0x0000000008004b66 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o - 0x0000000008004b66 HAL_UARTEx_WakeupCallback - .text.memset 0x0000000008004b76 0x10 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-memset.o) - 0x0000000008004b76 memset - *fill* 0x0000000008004b86 0x2 + 0x0000000008004bf6 0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o + 0x0000000008004bf6 HAL_UARTEx_WakeupCallback + .text.memset 0x0000000008004c06 0x10 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-memset.o) + 0x0000000008004c06 memset + *fill* 0x0000000008004c16 0x2 .text.__libc_init_array - 0x0000000008004b88 0x48 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-init.o) - 0x0000000008004b88 __libc_init_array + 0x0000000008004c18 0x48 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-init.o) + 0x0000000008004c18 __libc_init_array *(.glue_7) - .glue_7 0x0000000008004bd0 0x0 linker stubs + .glue_7 0x0000000008004c60 0x0 linker stubs *(.glue_7t) - .glue_7t 0x0000000008004bd0 0x0 linker stubs + .glue_7t 0x0000000008004c60 0x0 linker stubs *(.eh_frame) - .eh_frame 0x0000000008004bd0 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o + .eh_frame 0x0000000008004c60 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o *(.init) - .init 0x0000000008004bd0 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crti.o - 0x0000000008004bd0 _init - .init 0x0000000008004bd4 0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtn.o + .init 0x0000000008004c60 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crti.o + 0x0000000008004c60 _init + .init 0x0000000008004c64 0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtn.o *(.fini) - .fini 0x0000000008004bdc 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crti.o - 0x0000000008004bdc _fini - .fini 0x0000000008004be0 0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtn.o - 0x0000000008004be8 . = ALIGN (0x4) - 0x0000000008004be8 _etext = . + .fini 0x0000000008004c6c 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crti.o + 0x0000000008004c6c _fini + .fini 0x0000000008004c70 0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtn.o + 0x0000000008004c78 . = ALIGN (0x4) + 0x0000000008004c78 _etext = . -.vfp11_veneer 0x0000000008004be8 0x0 - .vfp11_veneer 0x0000000008004be8 0x0 linker stubs +.vfp11_veneer 0x0000000008004c78 0x0 + .vfp11_veneer 0x0000000008004c78 0x0 linker stubs -.v4_bx 0x0000000008004be8 0x0 - .v4_bx 0x0000000008004be8 0x0 linker stubs +.v4_bx 0x0000000008004c78 0x0 + .v4_bx 0x0000000008004c78 0x0 linker stubs -.iplt 0x0000000008004be8 0x0 - .iplt 0x0000000008004be8 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o +.iplt 0x0000000008004c78 0x0 + .iplt 0x0000000008004c78 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o -.rodata 0x0000000008004be8 0x74 - 0x0000000008004be8 . = ALIGN (0x4) +.rodata 0x0000000008004c78 0x74 + 0x0000000008004c78 . = ALIGN (0x4) *(.rodata) - .rodata 0x0000000008004be8 0x7 ./Core/Src/main.o + .rodata 0x0000000008004c78 0x7 ./Core/Src/main.o *(.rodata*) - *fill* 0x0000000008004bef 0x1 + *fill* 0x0000000008004c7f 0x1 .rodata.AHBPrescTable - 0x0000000008004bf0 0x10 ./Core/Src/system_stm32l0xx.o - 0x0000000008004bf0 AHBPrescTable + 0x0000000008004c80 0x10 ./Core/Src/system_stm32l0xx.o + 0x0000000008004c80 AHBPrescTable .rodata.APBPrescTable - 0x0000000008004c00 0x8 ./Core/Src/system_stm32l0xx.o - 0x0000000008004c00 APBPrescTable + 0x0000000008004c90 0x8 ./Core/Src/system_stm32l0xx.o + 0x0000000008004c90 APBPrescTable .rodata.PLLMulTable - 0x0000000008004c08 0x9 ./Core/Src/system_stm32l0xx.o - 0x0000000008004c08 PLLMulTable - *fill* 0x0000000008004c11 0x3 + 0x0000000008004c98 0x9 ./Core/Src/system_stm32l0xx.o + 0x0000000008004c98 PLLMulTable + *fill* 0x0000000008004ca1 0x3 .rodata.UART_SetConfig - 0x0000000008004c14 0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - 0x0000000008004c5c . = ALIGN (0x4) + 0x0000000008004ca4 0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + 0x0000000008004cec . = ALIGN (0x4) -.ARM.extab 0x0000000008004c5c 0x0 - 0x0000000008004c5c . = ALIGN (0x4) +.ARM.extab 0x0000000008004cec 0x0 + 0x0000000008004cec . = ALIGN (0x4) *(.ARM.extab* .gnu.linkonce.armextab.*) - 0x0000000008004c5c . = ALIGN (0x4) + 0x0000000008004cec . = ALIGN (0x4) -.ARM 0x0000000008004c5c 0x8 - 0x0000000008004c5c . = ALIGN (0x4) - 0x0000000008004c5c __exidx_start = . +.ARM 0x0000000008004cec 0x8 + 0x0000000008004cec . = ALIGN (0x4) + 0x0000000008004cec __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x0000000008004c5c 0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o) - 0x0000000008004c64 __exidx_end = . - 0x0000000008004c64 . = ALIGN (0x4) + .ARM.exidx 0x0000000008004cec 0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o) + 0x0000000008004cf4 __exidx_end = . + 0x0000000008004cf4 . = ALIGN (0x4) -.rel.dyn 0x0000000008004c64 0x0 - .rel.iplt 0x0000000008004c64 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o +.rel.dyn 0x0000000008004cf4 0x0 + .rel.iplt 0x0000000008004cf4 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o -.preinit_array 0x0000000008004c64 0x0 - 0x0000000008004c64 . = ALIGN (0x4) - 0x0000000008004c64 PROVIDE (__preinit_array_start = .) +.preinit_array 0x0000000008004cf4 0x0 + 0x0000000008004cf4 . = ALIGN (0x4) + 0x0000000008004cf4 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x0000000008004c64 PROVIDE (__preinit_array_end = .) - 0x0000000008004c64 . = ALIGN (0x4) + 0x0000000008004cf4 PROVIDE (__preinit_array_end = .) + 0x0000000008004cf4 . = ALIGN (0x4) -.init_array 0x0000000008004c64 0x4 - 0x0000000008004c64 . = ALIGN (0x4) - 0x0000000008004c64 PROVIDE (__init_array_start = .) +.init_array 0x0000000008004cf4 0x4 + 0x0000000008004cf4 . = ALIGN (0x4) + 0x0000000008004cf4 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x0000000008004c64 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o - 0x0000000008004c68 PROVIDE (__init_array_end = .) - 0x0000000008004c68 . = ALIGN (0x4) + .init_array 0x0000000008004cf4 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o + 0x0000000008004cf8 PROVIDE (__init_array_end = .) + 0x0000000008004cf8 . = ALIGN (0x4) -.fini_array 0x0000000008004c68 0x4 - 0x0000000008004c68 . = ALIGN (0x4) +.fini_array 0x0000000008004cf8 0x4 + 0x0000000008004cf8 . = ALIGN (0x4) [!provide] PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0000000008004c68 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o + .fini_array 0x0000000008004cf8 0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o [!provide] PROVIDE (__fini_array_end = .) - 0x0000000008004c6c . = ALIGN (0x4) - 0x0000000008004c6c _sidata = LOADADDR (.data) + 0x0000000008004cfc . = ALIGN (0x4) + 0x0000000008004cfc _sidata = LOADADDR (.data) -.data 0x0000000020000000 0xc load address 0x0000000008004c6c +.data 0x0000000020000000 0xc load address 0x0000000008004cfc 0x0000000020000000 . = ALIGN (0x4) 0x0000000020000000 _sdata = . *(.data) @@ -4555,11 +4556,11 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- *fill* 0x0000000020000009 0x3 0x000000002000000c _edata = . -.igot.plt 0x000000002000000c 0x0 load address 0x0000000008004c78 +.igot.plt 0x000000002000000c 0x0 load address 0x0000000008004d08 .igot.plt 0x000000002000000c 0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o 0x000000002000000c . = ALIGN (0x4) -.bss 0x000000002000000c 0x26c load address 0x0000000008004c78 +.bss 0x000000002000000c 0x26c load address 0x0000000008004d08 0x000000002000000c _sbss = . 0x000000002000000c __bss_start__ = _sbss *(.bss) @@ -4586,7 +4587,7 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- 0x0000000020000278 __bss_end__ = _ebss ._user_heap_stack - 0x0000000020000278 0x600 load address 0x0000000008004c78 + 0x0000000020000278 0x600 load address 0x0000000008004d08 0x0000000020000278 . = ALIGN (0x8) [!provide] PROVIDE (end = .) 0x0000000020000278 PROVIDE (_end = .) @@ -4691,45 +4692,45 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- .comment 0x0000000000000043 0x44 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o .comment 0x0000000000000043 0x44 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o -.debug_info 0x0000000000000000 0x104b3 +.debug_info 0x0000000000000000 0x10513 .debug_info 0x0000000000000000 0x477 ./Core/Src/adf7012.o - .debug_info 0x0000000000000477 0x198d ./Core/Src/main.o - .debug_info 0x0000000000001e04 0x1432 ./Core/Src/stm32l0xx_hal_msp.o - .debug_info 0x0000000000003236 0xa0e ./Core/Src/stm32l0xx_it.o - .debug_info 0x0000000000003c44 0x2d0 ./Core/Src/system_stm32l0xx.o - .debug_info 0x0000000000003f14 0x23 ./Core/Startup/startup_stm32l051r6tx.o - .debug_info 0x0000000000003f37 0x830 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o - .debug_info 0x0000000000004767 0xcea ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o - .debug_info 0x0000000000005451 0x83d ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o - .debug_info 0x0000000000005c8e 0x70b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o - .debug_info 0x0000000000006399 0x624 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o - .debug_info 0x00000000000069bd 0x970 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - .debug_info 0x000000000000732d 0x489 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o - .debug_info 0x00000000000077b6 0x15ca ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o - .debug_info 0x0000000000008d80 0x27b3 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - .debug_info 0x000000000000b533 0x6af ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o - .debug_info 0x000000000000bbe2 0x3b30 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - .debug_info 0x000000000000f712 0xda1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o + .debug_info 0x0000000000000477 0x19ed ./Core/Src/main.o + .debug_info 0x0000000000001e64 0x1432 ./Core/Src/stm32l0xx_hal_msp.o + .debug_info 0x0000000000003296 0xa0e ./Core/Src/stm32l0xx_it.o + .debug_info 0x0000000000003ca4 0x2d0 ./Core/Src/system_stm32l0xx.o + .debug_info 0x0000000000003f74 0x23 ./Core/Startup/startup_stm32l051r6tx.o + .debug_info 0x0000000000003f97 0x830 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o + .debug_info 0x00000000000047c7 0xcea ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o + .debug_info 0x00000000000054b1 0x83d ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o + .debug_info 0x0000000000005cee 0x70b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o + .debug_info 0x00000000000063f9 0x624 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o + .debug_info 0x0000000000006a1d 0x970 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + .debug_info 0x000000000000738d 0x489 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o + .debug_info 0x0000000000007816 0x15ca ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o + .debug_info 0x0000000000008de0 0x27b3 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + .debug_info 0x000000000000b593 0x6af ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o + .debug_info 0x000000000000bc42 0x3b30 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + .debug_info 0x000000000000f772 0xda1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o -.debug_abbrev 0x0000000000000000 0x2572 +.debug_abbrev 0x0000000000000000 0x2583 .debug_abbrev 0x0000000000000000 0x1a1 ./Core/Src/adf7012.o - .debug_abbrev 0x00000000000001a1 0x2db ./Core/Src/main.o - .debug_abbrev 0x000000000000047c 0x26a ./Core/Src/stm32l0xx_hal_msp.o - .debug_abbrev 0x00000000000006e6 0x1ac ./Core/Src/stm32l0xx_it.o - .debug_abbrev 0x0000000000000892 0x11c ./Core/Src/system_stm32l0xx.o - .debug_abbrev 0x00000000000009ae 0x12 ./Core/Startup/startup_stm32l051r6tx.o - .debug_abbrev 0x00000000000009c0 0x2a4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o - .debug_abbrev 0x0000000000000c64 0x241 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o - .debug_abbrev 0x0000000000000ea5 0x29b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o - .debug_abbrev 0x0000000000001140 0x1cd ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o - .debug_abbrev 0x000000000000130d 0x1ca ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o - .debug_abbrev 0x00000000000014d7 0x295 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - .debug_abbrev 0x000000000000176c 0x1d1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o - .debug_abbrev 0x000000000000193d 0x27e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o - .debug_abbrev 0x0000000000001bbb 0x272 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - .debug_abbrev 0x0000000000001e2d 0x1ab ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o - .debug_abbrev 0x0000000000001fd8 0x2e0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - .debug_abbrev 0x00000000000022b8 0x2ba ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o + .debug_abbrev 0x00000000000001a1 0x2ec ./Core/Src/main.o + .debug_abbrev 0x000000000000048d 0x26a ./Core/Src/stm32l0xx_hal_msp.o + .debug_abbrev 0x00000000000006f7 0x1ac ./Core/Src/stm32l0xx_it.o + .debug_abbrev 0x00000000000008a3 0x11c ./Core/Src/system_stm32l0xx.o + .debug_abbrev 0x00000000000009bf 0x12 ./Core/Startup/startup_stm32l051r6tx.o + .debug_abbrev 0x00000000000009d1 0x2a4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o + .debug_abbrev 0x0000000000000c75 0x241 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o + .debug_abbrev 0x0000000000000eb6 0x29b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o + .debug_abbrev 0x0000000000001151 0x1cd ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o + .debug_abbrev 0x000000000000131e 0x1ca ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o + .debug_abbrev 0x00000000000014e8 0x295 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + .debug_abbrev 0x000000000000177d 0x1d1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o + .debug_abbrev 0x000000000000194e 0x27e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o + .debug_abbrev 0x0000000000001bcc 0x272 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + .debug_abbrev 0x0000000000001e3e 0x1ab ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o + .debug_abbrev 0x0000000000001fe9 0x2e0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + .debug_abbrev 0x00000000000022c9 0x2ba ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o .debug_aranges 0x0000000000000000 0xeb0 .debug_aranges @@ -4808,7 +4809,7 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- .debug_rnglists 0x0000000000000b1a 0x60 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o -.debug_macro 0x0000000000000000 0x13612 +.debug_macro 0x0000000000000000 0x1363d .debug_macro 0x0000000000000000 0x203 ./Core/Src/adf7012.o .debug_macro 0x0000000000000203 0xa7e ./Core/Src/adf7012.o .debug_macro 0x0000000000000c81 0x131 ./Core/Src/adf7012.o @@ -4854,98 +4855,99 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools- .debug_macro 0x0000000000010969 0x44 ./Core/Src/adf7012.o .debug_macro 0x00000000000109ad 0x146 ./Core/Src/adf7012.o .debug_macro 0x0000000000010af3 0x154 ./Core/Src/adf7012.o - .debug_macro 0x0000000000010c47 0x2db ./Core/Src/main.o - .debug_macro 0x0000000000010f22 0x61 ./Core/Src/main.o - .debug_macro 0x0000000000010f83 0x24 ./Core/Src/main.o - .debug_macro 0x0000000000010fa7 0x43 ./Core/Src/main.o - .debug_macro 0x0000000000010fea 0x34 ./Core/Src/main.o - .debug_macro 0x000000000001101e 0x16 ./Core/Src/main.o - .debug_macro 0x0000000000011034 0x35 ./Core/Src/main.o - .debug_macro 0x0000000000011069 0x369 ./Core/Src/main.o - .debug_macro 0x00000000000113d2 0x10 ./Core/Src/main.o - .debug_macro 0x00000000000113e2 0x16 ./Core/Src/main.o - .debug_macro 0x00000000000113f8 0x43 ./Core/Src/main.o - .debug_macro 0x000000000001143b 0x34 ./Core/Src/main.o - .debug_macro 0x000000000001146f 0x10 ./Core/Src/main.o - .debug_macro 0x000000000001147f 0x58 ./Core/Src/main.o - .debug_macro 0x00000000000114d7 0x8e ./Core/Src/main.o - .debug_macro 0x0000000000011565 0x1c ./Core/Src/main.o - .debug_macro 0x0000000000011581 0x177 ./Core/Src/main.o - .debug_macro 0x00000000000116f8 0x16 ./Core/Src/main.o - .debug_macro 0x000000000001170e 0x16 ./Core/Src/main.o - .debug_macro 0x0000000000011724 0x147 ./Core/Src/main.o - .debug_macro 0x000000000001186b 0x1fb ./Core/Src/stm32l0xx_hal_msp.o - .debug_macro 0x0000000000011a66 0x205 ./Core/Src/stm32l0xx_it.o - .debug_macro 0x0000000000011c6b 0x1ec ./Core/Src/system_stm32l0xx.o - .debug_macro 0x0000000000011e57 0x210 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o - .debug_macro 0x0000000000012067 0x1fb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o - .debug_macro 0x0000000000012262 0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o - .debug_macro 0x000000000001244e 0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o - .debug_macro 0x000000000001263a 0x1f3 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o - .debug_macro 0x000000000001282d 0x222 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - .debug_macro 0x0000000000012a4f 0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o - .debug_macro 0x0000000000012c3b 0x1fb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o - .debug_macro 0x0000000000012e36 0x1ed ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - .debug_macro 0x0000000000013023 0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o - .debug_macro 0x000000000001320f 0x217 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - .debug_macro 0x0000000000013426 0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o + .debug_macro 0x0000000000010c47 0x2e4 ./Core/Src/main.o + .debug_macro 0x0000000000010f2b 0x61 ./Core/Src/main.o + .debug_macro 0x0000000000010f8c 0x24 ./Core/Src/main.o + .debug_macro 0x0000000000010fb0 0x43 ./Core/Src/main.o + .debug_macro 0x0000000000010ff3 0x34 ./Core/Src/main.o + .debug_macro 0x0000000000011027 0x16 ./Core/Src/main.o + .debug_macro 0x000000000001103d 0x35 ./Core/Src/main.o + .debug_macro 0x0000000000011072 0x369 ./Core/Src/main.o + .debug_macro 0x00000000000113db 0x10 ./Core/Src/main.o + .debug_macro 0x00000000000113eb 0x16 ./Core/Src/main.o + .debug_macro 0x0000000000011401 0x43 ./Core/Src/main.o + .debug_macro 0x0000000000011444 0x34 ./Core/Src/main.o + .debug_macro 0x0000000000011478 0x10 ./Core/Src/main.o + .debug_macro 0x0000000000011488 0x58 ./Core/Src/main.o + .debug_macro 0x00000000000114e0 0x8e ./Core/Src/main.o + .debug_macro 0x000000000001156e 0x1c ./Core/Src/main.o + .debug_macro 0x000000000001158a 0x177 ./Core/Src/main.o + .debug_macro 0x0000000000011701 0x16 ./Core/Src/main.o + .debug_macro 0x0000000000011717 0x16 ./Core/Src/main.o + .debug_macro 0x000000000001172d 0x147 ./Core/Src/main.o + .debug_macro 0x0000000000011874 0x22 ./Core/Src/main.o + .debug_macro 0x0000000000011896 0x1fb ./Core/Src/stm32l0xx_hal_msp.o + .debug_macro 0x0000000000011a91 0x205 ./Core/Src/stm32l0xx_it.o + .debug_macro 0x0000000000011c96 0x1ec ./Core/Src/system_stm32l0xx.o + .debug_macro 0x0000000000011e82 0x210 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o + .debug_macro 0x0000000000012092 0x1fb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o + .debug_macro 0x000000000001228d 0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o + .debug_macro 0x0000000000012479 0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o + .debug_macro 0x0000000000012665 0x1f3 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o + .debug_macro 0x0000000000012858 0x222 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + .debug_macro 0x0000000000012a7a 0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o + .debug_macro 0x0000000000012c66 0x1fb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o + .debug_macro 0x0000000000012e61 0x1ed ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + .debug_macro 0x000000000001304e 0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o + .debug_macro 0x000000000001323a 0x217 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + .debug_macro 0x0000000000013451 0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o -.debug_line 0x0000000000000000 0x10f1f +.debug_line 0x0000000000000000 0x10f65 .debug_line 0x0000000000000000 0x852 ./Core/Src/adf7012.o - .debug_line 0x0000000000000852 0xaf7 ./Core/Src/main.o - .debug_line 0x0000000000001349 0x86c ./Core/Src/stm32l0xx_hal_msp.o - .debug_line 0x0000000000001bb5 0x799 ./Core/Src/stm32l0xx_it.o - .debug_line 0x000000000000234e 0x79a ./Core/Src/system_stm32l0xx.o - .debug_line 0x0000000000002ae8 0x7b ./Core/Startup/startup_stm32l051r6tx.o - .debug_line 0x0000000000002b63 0xa3d ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o - .debug_line 0x00000000000035a0 0x114b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o - .debug_line 0x00000000000046eb 0xb1b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o - .debug_line 0x0000000000005206 0xc2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o - .debug_line 0x0000000000005e32 0xacb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o - .debug_line 0x00000000000068fd 0xe74 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o - .debug_line 0x0000000000007771 0xaa6 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o - .debug_line 0x0000000000008217 0x1c6a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o - .debug_line 0x0000000000009e81 0x2f5a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o - .debug_line 0x000000000000cddb 0x7b7 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o - .debug_line 0x000000000000d592 0x2d19 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o - .debug_line 0x00000000000102ab 0xc74 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o + .debug_line 0x0000000000000852 0xb3d ./Core/Src/main.o + .debug_line 0x000000000000138f 0x86c ./Core/Src/stm32l0xx_hal_msp.o + .debug_line 0x0000000000001bfb 0x799 ./Core/Src/stm32l0xx_it.o + .debug_line 0x0000000000002394 0x79a ./Core/Src/system_stm32l0xx.o + .debug_line 0x0000000000002b2e 0x7b ./Core/Startup/startup_stm32l051r6tx.o + .debug_line 0x0000000000002ba9 0xa3d ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o + .debug_line 0x00000000000035e6 0x114b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o + .debug_line 0x0000000000004731 0xb1b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o + .debug_line 0x000000000000524c 0xc2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o + .debug_line 0x0000000000005e78 0xacb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o + .debug_line 0x0000000000006943 0xe74 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + .debug_line 0x00000000000077b7 0xaa6 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o + .debug_line 0x000000000000825d 0x1c6a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o + .debug_line 0x0000000000009ec7 0x2f5a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + .debug_line 0x000000000000ce21 0x7b7 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o + .debug_line 0x000000000000d5d8 0x2d19 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + .debug_line 0x00000000000102f1 0xc74 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o -.debug_str 0x0000000000000000 0x78cf8 +.debug_str 0x0000000000000000 0x78d4c .debug_str 0x0000000000000000 0x714f7 ./Core/Src/adf7012.o 0x71800 (size before relaxing) - .debug_str 0x00000000000714f7 0x470d ./Core/Src/main.o - 0x7601a (size before relaxing) - .debug_str 0x0000000000075c04 0x115 ./Core/Src/stm32l0xx_hal_msp.o + .debug_str 0x00000000000714f7 0x4761 ./Core/Src/main.o + 0x76079 (size before relaxing) + .debug_str 0x0000000000075c58 0x115 ./Core/Src/stm32l0xx_hal_msp.o 0x724ff (size before relaxing) - .debug_str 0x0000000000075d19 0x111 ./Core/Src/stm32l0xx_it.o + .debug_str 0x0000000000075d6d 0x111 ./Core/Src/stm32l0xx_it.o 0x71e7e (size before relaxing) - .debug_str 0x0000000000075e2a 0x99 ./Core/Src/system_stm32l0xx.o + .debug_str 0x0000000000075e7e 0x99 ./Core/Src/system_stm32l0xx.o 0x7121d (size before relaxing) - .debug_str 0x0000000000075ec3 0x34 ./Core/Startup/startup_stm32l051r6tx.o + .debug_str 0x0000000000075f17 0x34 ./Core/Startup/startup_stm32l051r6tx.o 0x6a (size before relaxing) - .debug_str 0x0000000000075ef7 0x468 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o + .debug_str 0x0000000000075f4b 0x468 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o 0x718ee (size before relaxing) - .debug_str 0x000000000007635f 0x340 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o + .debug_str 0x00000000000763b3 0x340 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o 0x71909 (size before relaxing) - .debug_str 0x000000000007669f 0x26d ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o + .debug_str 0x00000000000766f3 0x26d ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o 0x71652 (size before relaxing) - .debug_str 0x000000000007690c 0x219 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o + .debug_str 0x0000000000076960 0x219 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o 0x71591 (size before relaxing) - .debug_str 0x0000000000076b25 0xe6 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o + .debug_str 0x0000000000076b79 0xe6 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o 0x713bd (size before relaxing) - .debug_str 0x0000000000076c0b 0x27c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o + .debug_str 0x0000000000076c5f 0x27c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o 0x7171e (size before relaxing) - .debug_str 0x0000000000076e87 0x120 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o + .debug_str 0x0000000000076edb 0x120 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o 0x7144b (size before relaxing) - .debug_str 0x0000000000076fa7 0x567 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o + .debug_str 0x0000000000076ffb 0x567 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o 0x71b1a (size before relaxing) - .debug_str 0x000000000007750e 0xd4a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o + .debug_str 0x0000000000077562 0xd4a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o 0x724e5 (size before relaxing) - .debug_str 0x0000000000078258 0x57 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o + .debug_str 0x00000000000782ac 0x57 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o 0x7169a (size before relaxing) - .debug_str 0x00000000000782af 0x852 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o + .debug_str 0x0000000000078303 0x852 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o 0x71fdd (size before relaxing) - .debug_str 0x0000000000078b01 0x1f7 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o + .debug_str 0x0000000000078b55 0x1f7 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o 0x71892 (size before relaxing) .debug_frame 0x0000000000000000 0x3508