diff --git a/code/Core/Inc/stm32l0xx_it.h b/code/Core/Inc/stm32l0xx_it.h
index 6d2a7b1..bcab620 100644
--- a/code/Core/Inc/stm32l0xx_it.h
+++ b/code/Core/Inc/stm32l0xx_it.h
@@ -53,7 +53,6 @@ void PendSV_Handler(void);
 void SysTick_Handler(void);
 void DMA1_Channel2_3_IRQHandler(void);
 void TIM21_IRQHandler(void);
-void LPUART1_IRQHandler(void);
 /* USER CODE BEGIN EFP */
 
 /* USER CODE END EFP */
diff --git a/code/Core/Src/main.c b/code/Core/Src/main.c
index 0ff2bf3..dee7d8b 100644
--- a/code/Core/Src/main.c
+++ b/code/Core/Src/main.c
@@ -73,8 +73,7 @@ static void MX_TIM21_Init(void);
 
 /* Private user code ---------------------------------------------------------*/
 /* USER CODE BEGIN 0 */
-uint8_t onebyte[1];
-uint8_t rec = 0;
+
 
 /* USER CODE END 0 */
 
@@ -85,6 +84,7 @@ uint8_t rec = 0;
 int main(void)
 {
   /* USER CODE BEGIN 1 */
+	uint8_t onebyte[1];
 	int32_t preambule;
 	uint8_t data[58];
 	uint8_t buffer[20];
@@ -127,12 +127,7 @@ int main(void)
   HAL_GPIO_WritePin(DC_boost_GPIO_Port, DC_boost_Pin, GPIO_PIN_SET);
   HAL_Delay(200);
  //HAL_GPIO_WritePin(Battery_on_GPIO_Port, Battery_on_Pin, GPIO_PIN_SET);
- // HAL_GPIO_WritePin(RADIO_EN_GPIO_Port, RADIO_EN_Pin, GPIO_PIN_RESET);
-
-  myspi(0b00000000000000000010000000100010);
-  myspi(0b00000000011101000001100010101111);
-  myspi(0b00000011110001000010000001001100);
-  myspi(0b00000000000011011111000011001101);
+ // HAL_GPIO_WritePin(RADIO_EN_GPIO_Port, RADIO_EN_Pin, GPIO_PIN_RESET)
 
 
     HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
@@ -152,8 +147,6 @@ int main(void)
     HAL_UART_Transmit(&huart1, (uint8_t*)&"START\r\n", 7, 10);
     HAL_Delay(500);
 
-    HAL_UART_Receive_IT(&huart1, onebyte, 1);
-
   /* USER CODE END 2 */
 
   /* Infinite loop */
@@ -163,12 +156,8 @@ int main(void)
     /* USER CODE END WHILE */
 
     /* USER CODE BEGIN 3 */
-	  	  	HAL_Delay(500);
-
-	        if(rec == 1)
+	        if(HAL_OK == HAL_UART_Receive(&hlpuart1, onebyte, 1, 100))
 	        {
-	        	HAL_GPIO_TogglePin (LED_GPIO_Port, LED_Pin);
-	        	rec = 0;
 	        	if (dt==1) {
 	            	if (count < 58){
 	            	  data[count] = onebyte[0];
@@ -607,11 +596,11 @@ static void MX_GPIO_Init(void)
 }
 
 /* USER CODE BEGIN 4 */
-void HAL_UART_RxCpltCallback(UART_HandleTypeDef *hlpuart)
-{
-    HAL_UART_Receive_IT(&hlpuart1, onebyte, 1);
-    rec = 1;
-}
+//void HAL_UART_RxCpltCallback(UART_HandleTypeDef *hlpuart)
+//{
+//    HAL_UART_Receive_IT(&hlpuart1, onebyte, 1);
+//    rec = 1;
+//}
 /* USER CODE END 4 */
 
 /**
diff --git a/code/Core/Src/stm32l0xx_hal_msp.c b/code/Core/Src/stm32l0xx_hal_msp.c
index ebbebf2..de9978b 100644
--- a/code/Core/Src/stm32l0xx_hal_msp.c
+++ b/code/Core/Src/stm32l0xx_hal_msp.c
@@ -180,9 +180,6 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart)
     GPIO_InitStruct.Alternate = GPIO_AF0_LPUART1;
     HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 
-    /* LPUART1 interrupt Init */
-    HAL_NVIC_SetPriority(LPUART1_IRQn, 0, 0);
-    HAL_NVIC_EnableIRQ(LPUART1_IRQn);
   /* USER CODE BEGIN LPUART1_MspInit 1 */
 
   /* USER CODE END LPUART1_MspInit 1 */
@@ -254,8 +251,6 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
     */
     HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11);
 
-    /* LPUART1 interrupt DeInit */
-    HAL_NVIC_DisableIRQ(LPUART1_IRQn);
   /* USER CODE BEGIN LPUART1_MspDeInit 1 */
 
   /* USER CODE END LPUART1_MspDeInit 1 */
diff --git a/code/Core/Src/stm32l0xx_it.c b/code/Core/Src/stm32l0xx_it.c
index e310b4c..062b99e 100644
--- a/code/Core/Src/stm32l0xx_it.c
+++ b/code/Core/Src/stm32l0xx_it.c
@@ -56,7 +56,6 @@
 
 /* External variables --------------------------------------------------------*/
 extern DMA_HandleTypeDef hdma_usart1_rx;
-extern UART_HandleTypeDef hlpuart1;
 extern TIM_HandleTypeDef htim21;
 /* USER CODE BEGIN EV */
 
@@ -171,20 +170,6 @@ void TIM21_IRQHandler(void)
   /* USER CODE END TIM21_IRQn 1 */
 }
 
-/**
-  * @brief This function handles LPUART1 global interrupt / LPUART1 wake-up interrupt through EXTI line 28.
-  */
-void LPUART1_IRQHandler(void)
-{
-  /* USER CODE BEGIN LPUART1_IRQn 0 */
-
-  /* USER CODE END LPUART1_IRQn 0 */
-  HAL_UART_IRQHandler(&hlpuart1);
-  /* USER CODE BEGIN LPUART1_IRQn 1 */
-
-  /* USER CODE END LPUART1_IRQn 1 */
-}
-
 /* USER CODE BEGIN 1 */
 
 /* USER CODE END 1 */
diff --git a/code/Debug/Core/Src/main.cyclo b/code/Debug/Core/Src/main.cyclo
index 9029ac8..d3e9c5e 100644
--- a/code/Debug/Core/Src/main.cyclo
+++ b/code/Debug/Core/Src/main.cyclo
@@ -1,11 +1,10 @@
-../Core/Src/main.c:85:5:main	8
-../Core/Src/main.c:227:6:SystemClock_Config	4
-../Core/Src/main.c:283:13:MX_ADC_Init	5
-../Core/Src/main.c:355:13:MX_LPUART1_UART_Init	2
-../Core/Src/main.c:389:13:MX_USART1_UART_Init	2
-../Core/Src/main.c:424:13:MX_SPI1_Init	2
-../Core/Src/main.c:462:13:MX_TIM21_Init	4
-../Core/Src/main.c:505:13:MX_DMA_Init	1
-../Core/Src/main.c:523:13:MX_GPIO_Init	1
-../Core/Src/main.c:610:6:HAL_UART_RxCpltCallback	1
-../Core/Src/main.c:621:6:Error_Handler	1
+../Core/Src/main.c:84:5:main	8
+../Core/Src/main.c:216:6:SystemClock_Config	4
+../Core/Src/main.c:272:13:MX_ADC_Init	5
+../Core/Src/main.c:344:13:MX_LPUART1_UART_Init	2
+../Core/Src/main.c:378:13:MX_USART1_UART_Init	2
+../Core/Src/main.c:413:13:MX_SPI1_Init	2
+../Core/Src/main.c:451:13:MX_TIM21_Init	4
+../Core/Src/main.c:494:13:MX_DMA_Init	1
+../Core/Src/main.c:512:13:MX_GPIO_Init	1
+../Core/Src/main.c:610:6:Error_Handler	1
diff --git a/code/Debug/Core/Src/main.o b/code/Debug/Core/Src/main.o
index 696c831..d92fce6 100644
Binary files a/code/Debug/Core/Src/main.o and b/code/Debug/Core/Src/main.o differ
diff --git a/code/Debug/Core/Src/main.su b/code/Debug/Core/Src/main.su
index b884411..875d480 100644
--- a/code/Debug/Core/Src/main.su
+++ b/code/Debug/Core/Src/main.su
@@ -1,11 +1,10 @@
-../Core/Src/main.c:85:5:main	120	static
-../Core/Src/main.c:227:6:SystemClock_Config	120	static
-../Core/Src/main.c:283:13:MX_ADC_Init	16	static
-../Core/Src/main.c:355:13:MX_LPUART1_UART_Init	8	static
-../Core/Src/main.c:389:13:MX_USART1_UART_Init	8	static
-../Core/Src/main.c:424:13:MX_SPI1_Init	8	static
-../Core/Src/main.c:462:13:MX_TIM21_Init	32	static
-../Core/Src/main.c:505:13:MX_DMA_Init	16	static
-../Core/Src/main.c:523:13:MX_GPIO_Init	56	static
-../Core/Src/main.c:610:6:HAL_UART_RxCpltCallback	16	static
-../Core/Src/main.c:621:6:Error_Handler	8	static,ignoring_inline_asm
+../Core/Src/main.c:84:5:main	128	static
+../Core/Src/main.c:216:6:SystemClock_Config	120	static
+../Core/Src/main.c:272:13:MX_ADC_Init	16	static
+../Core/Src/main.c:344:13:MX_LPUART1_UART_Init	8	static
+../Core/Src/main.c:378:13:MX_USART1_UART_Init	8	static
+../Core/Src/main.c:413:13:MX_SPI1_Init	8	static
+../Core/Src/main.c:451:13:MX_TIM21_Init	32	static
+../Core/Src/main.c:494:13:MX_DMA_Init	16	static
+../Core/Src/main.c:512:13:MX_GPIO_Init	56	static
+../Core/Src/main.c:610:6:Error_Handler	8	static,ignoring_inline_asm
diff --git a/code/Debug/Core/Src/stm32l0xx_hal_msp.cyclo b/code/Debug/Core/Src/stm32l0xx_hal_msp.cyclo
index 8442573..d3439a4 100644
--- a/code/Debug/Core/Src/stm32l0xx_hal_msp.cyclo
+++ b/code/Debug/Core/Src/stm32l0xx_hal_msp.cyclo
@@ -2,8 +2,8 @@
 ../Core/Src/stm32l0xx_hal_msp.c:87:6:HAL_ADC_MspInit	2
 ../Core/Src/stm32l0xx_hal_msp.c:128:6:HAL_ADC_MspDeInit	2
 ../Core/Src/stm32l0xx_hal_msp.c:160:6:HAL_UART_MspInit	4
-../Core/Src/stm32l0xx_hal_msp.c:241:6:HAL_UART_MspDeInit	3
-../Core/Src/stm32l0xx_hal_msp.c:292:6:HAL_SPI_MspInit	2
-../Core/Src/stm32l0xx_hal_msp.c:330:6:HAL_SPI_MspDeInit	2
-../Core/Src/stm32l0xx_hal_msp.c:361:6:HAL_TIM_Base_MspInit	2
-../Core/Src/stm32l0xx_hal_msp.c:386:6:HAL_TIM_Base_MspDeInit	2
+../Core/Src/stm32l0xx_hal_msp.c:238:6:HAL_UART_MspDeInit	3
+../Core/Src/stm32l0xx_hal_msp.c:287:6:HAL_SPI_MspInit	2
+../Core/Src/stm32l0xx_hal_msp.c:325:6:HAL_SPI_MspDeInit	2
+../Core/Src/stm32l0xx_hal_msp.c:356:6:HAL_TIM_Base_MspInit	2
+../Core/Src/stm32l0xx_hal_msp.c:381:6:HAL_TIM_Base_MspDeInit	2
diff --git a/code/Debug/Core/Src/stm32l0xx_hal_msp.o b/code/Debug/Core/Src/stm32l0xx_hal_msp.o
index 2b8c3e0..2128655 100644
Binary files a/code/Debug/Core/Src/stm32l0xx_hal_msp.o and b/code/Debug/Core/Src/stm32l0xx_hal_msp.o differ
diff --git a/code/Debug/Core/Src/stm32l0xx_hal_msp.su b/code/Debug/Core/Src/stm32l0xx_hal_msp.su
index aca92f0..38bb255 100644
--- a/code/Debug/Core/Src/stm32l0xx_hal_msp.su
+++ b/code/Debug/Core/Src/stm32l0xx_hal_msp.su
@@ -2,8 +2,8 @@
 ../Core/Src/stm32l0xx_hal_msp.c:87:6:HAL_ADC_MspInit	56	static
 ../Core/Src/stm32l0xx_hal_msp.c:128:6:HAL_ADC_MspDeInit	16	static
 ../Core/Src/stm32l0xx_hal_msp.c:160:6:HAL_UART_MspInit	56	static
-../Core/Src/stm32l0xx_hal_msp.c:241:6:HAL_UART_MspDeInit	16	static
-../Core/Src/stm32l0xx_hal_msp.c:292:6:HAL_SPI_MspInit	48	static
-../Core/Src/stm32l0xx_hal_msp.c:330:6:HAL_SPI_MspDeInit	16	static
-../Core/Src/stm32l0xx_hal_msp.c:361:6:HAL_TIM_Base_MspInit	16	static
-../Core/Src/stm32l0xx_hal_msp.c:386:6:HAL_TIM_Base_MspDeInit	16	static
+../Core/Src/stm32l0xx_hal_msp.c:238:6:HAL_UART_MspDeInit	16	static
+../Core/Src/stm32l0xx_hal_msp.c:287:6:HAL_SPI_MspInit	48	static
+../Core/Src/stm32l0xx_hal_msp.c:325:6:HAL_SPI_MspDeInit	16	static
+../Core/Src/stm32l0xx_hal_msp.c:356:6:HAL_TIM_Base_MspInit	16	static
+../Core/Src/stm32l0xx_hal_msp.c:381:6:HAL_TIM_Base_MspDeInit	16	static
diff --git a/code/Debug/Core/Src/stm32l0xx_it.cyclo b/code/Debug/Core/Src/stm32l0xx_it.cyclo
index 4e86a27..9653671 100644
--- a/code/Debug/Core/Src/stm32l0xx_it.cyclo
+++ b/code/Debug/Core/Src/stm32l0xx_it.cyclo
@@ -1,8 +1,7 @@
-../Core/Src/stm32l0xx_it.c:71:6:NMI_Handler	1
-../Core/Src/stm32l0xx_it.c:87:6:HardFault_Handler	1
-../Core/Src/stm32l0xx_it.c:102:6:SVC_Handler	1
-../Core/Src/stm32l0xx_it.c:115:6:PendSV_Handler	1
-../Core/Src/stm32l0xx_it.c:128:6:SysTick_Handler	1
-../Core/Src/stm32l0xx_it.c:149:6:DMA1_Channel2_3_IRQHandler	1
-../Core/Src/stm32l0xx_it.c:163:6:TIM21_IRQHandler	1
-../Core/Src/stm32l0xx_it.c:177:6:LPUART1_IRQHandler	1
+../Core/Src/stm32l0xx_it.c:70:6:NMI_Handler	1
+../Core/Src/stm32l0xx_it.c:86:6:HardFault_Handler	1
+../Core/Src/stm32l0xx_it.c:101:6:SVC_Handler	1
+../Core/Src/stm32l0xx_it.c:114:6:PendSV_Handler	1
+../Core/Src/stm32l0xx_it.c:127:6:SysTick_Handler	1
+../Core/Src/stm32l0xx_it.c:148:6:DMA1_Channel2_3_IRQHandler	1
+../Core/Src/stm32l0xx_it.c:162:6:TIM21_IRQHandler	1
diff --git a/code/Debug/Core/Src/stm32l0xx_it.o b/code/Debug/Core/Src/stm32l0xx_it.o
index e842a39..fedda4a 100644
Binary files a/code/Debug/Core/Src/stm32l0xx_it.o and b/code/Debug/Core/Src/stm32l0xx_it.o differ
diff --git a/code/Debug/Core/Src/stm32l0xx_it.su b/code/Debug/Core/Src/stm32l0xx_it.su
index da4780d..a41dea8 100644
--- a/code/Debug/Core/Src/stm32l0xx_it.su
+++ b/code/Debug/Core/Src/stm32l0xx_it.su
@@ -1,8 +1,7 @@
-../Core/Src/stm32l0xx_it.c:71:6:NMI_Handler	8	static
-../Core/Src/stm32l0xx_it.c:87:6:HardFault_Handler	8	static
-../Core/Src/stm32l0xx_it.c:102:6:SVC_Handler	8	static
-../Core/Src/stm32l0xx_it.c:115:6:PendSV_Handler	8	static
-../Core/Src/stm32l0xx_it.c:128:6:SysTick_Handler	8	static
-../Core/Src/stm32l0xx_it.c:149:6:DMA1_Channel2_3_IRQHandler	8	static
-../Core/Src/stm32l0xx_it.c:163:6:TIM21_IRQHandler	8	static
-../Core/Src/stm32l0xx_it.c:177:6:LPUART1_IRQHandler	8	static
+../Core/Src/stm32l0xx_it.c:70:6:NMI_Handler	8	static
+../Core/Src/stm32l0xx_it.c:86:6:HardFault_Handler	8	static
+../Core/Src/stm32l0xx_it.c:101:6:SVC_Handler	8	static
+../Core/Src/stm32l0xx_it.c:114:6:PendSV_Handler	8	static
+../Core/Src/stm32l0xx_it.c:127:6:SysTick_Handler	8	static
+../Core/Src/stm32l0xx_it.c:148:6:DMA1_Channel2_3_IRQHandler	8	static
+../Core/Src/stm32l0xx_it.c:162:6:TIM21_IRQHandler	8	static
diff --git a/code/Debug/radiosonda_m20.elf b/code/Debug/radiosonda_m20.elf
index 834d671..b018529 100755
Binary files a/code/Debug/radiosonda_m20.elf and b/code/Debug/radiosonda_m20.elf differ
diff --git a/code/Debug/radiosonda_m20.list b/code/Debug/radiosonda_m20.list
index 2283857..6a2dfe0 100644
--- a/code/Debug/radiosonda_m20.list
+++ b/code/Debug/radiosonda_m20.list
@@ -5,47 +5,47 @@ Sections:
 Idx Name          Size      VMA       LMA       File off  Algn
   0 .isr_vector   000000c0  08000000  08000000  00010000  2**0
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  1 .text         000058d4  080000c0  080000c0  000100c0  2**2
+  1 .text         00004bac  080000c0  080000c0  000100c0  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, CODE
-  2 .rodata       000000e4  08005994  08005994  00015994  2**2
+  2 .rodata       000000e4  08004c6c  08004c6c  00014c6c  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  3 .ARM.extab    00000000  08005a78  08005a78  0002005c  2**0
+  3 .ARM.extab    00000000  08004d50  08004d50  0002005c  2**0
                   CONTENTS
-  4 .ARM          00000008  08005a78  08005a78  00015a78  2**2
+  4 .ARM          00000008  08004d50  08004d50  00014d50  2**2
                   CONTENTS, ALLOC, LOAD, READONLY, DATA
-  5 .preinit_array 00000000  08005a80  08005a80  0002005c  2**0
+  5 .preinit_array 00000000  08004d58  08004d58  0002005c  2**0
                   CONTENTS, ALLOC, LOAD, DATA
-  6 .init_array   00000004  08005a80  08005a80  00015a80  2**2
+  6 .init_array   00000004  08004d58  08004d58  00014d58  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  7 .fini_array   00000004  08005a84  08005a84  00015a84  2**2
+  7 .fini_array   00000004  08004d5c  08004d5c  00014d5c  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  8 .data         0000005c  20000000  08005a88  00020000  2**2
+  8 .data         0000005c  20000000  08004d60  00020000  2**2
                   CONTENTS, ALLOC, LOAD, DATA
-  9 .bss          000003bc  2000005c  08005ae4  0002005c  2**2
+  9 .bss          000003b8  2000005c  08004dbc  0002005c  2**2
                   ALLOC
- 10 ._user_heap_stack 00000600  20000418  08005ae4  00020418  2**0
+ 10 ._user_heap_stack 00000604  20000414  08004dbc  00020414  2**0
                   ALLOC
  11 .ARM.attributes 00000028  00000000  00000000  0002005c  2**0
                   CONTENTS, READONLY
  12 .comment      00000043  00000000  00000000  00020084  2**0
                   CONTENTS, READONLY
- 13 .debug_info   00010744  00000000  00000000  000200c7  2**0
+ 13 .debug_info   0000f14c  00000000  00000000  000200c7  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 14 .debug_abbrev 00002682  00000000  00000000  0003080b  2**0
+ 14 .debug_abbrev 000021e2  00000000  00000000  0002f213  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 15 .debug_aranges 00000ed8  00000000  00000000  00032e90  2**3
+ 15 .debug_aranges 00000e10  00000000  00000000  000313f8  2**3
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 16 .debug_rnglists 00000b93  00000000  00000000  00033d68  2**0
+ 16 .debug_rnglists 00000aff  00000000  00000000  00032208  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 17 .debug_macro  00012f2c  00000000  00000000  000348fb  2**0
+ 17 .debug_macro  000020f9  00000000  00000000  00032d07  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 18 .debug_line   0001138e  00000000  00000000  00047827  2**0
+ 18 .debug_line   0000fe83  00000000  00000000  00034e00  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 19 .debug_str    00077639  00000000  00000000  00058bb5  2**0
+ 19 .debug_str    000773ef  00000000  00000000  00044c83  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 20 .debug_frame  00003a48  00000000  00000000  000d01f0  2**2
+ 20 .debug_frame  000037c8  00000000  00000000  000bc074  2**2
                   CONTENTS, READONLY, DEBUGGING, OCTETS
- 21 .debug_line_str 0000005e  00000000  00000000  000d3c38  2**0
+ 21 .debug_line_str 0000005e  00000000  00000000  000bf83c  2**0
                   CONTENTS, READONLY, DEBUGGING, OCTETS
 
 Disassembly of section .text:
@@ -67,7 +67,7 @@ Disassembly of section .text:
  80000da:	bd10      	pop	{r4, pc}
  80000dc:	2000005c 	.word	0x2000005c
  80000e0:	00000000 	.word	0x00000000
- 80000e4:	0800597c 	.word	0x0800597c
+ 80000e4:	08004c54 	.word	0x08004c54
 
 080000e8 <frame_dummy>:
  80000e8:	4b04      	ldr	r3, [pc, #16]	; (80000fc <frame_dummy+0x14>)
@@ -82,7 +82,7 @@ Disassembly of section .text:
  80000fa:	46c0      	nop			; (mov r8, r8)
  80000fc:	00000000 	.word	0x00000000
  8000100:	20000060 	.word	0x20000060
- 8000104:	0800597c 	.word	0x0800597c
+ 8000104:	08004c54 	.word	0x08004c54
 
 08000108 <strlen>:
  8000108:	2300      	movs	r3, #0
@@ -574,15122 +574,12743 @@ Disassembly of section .text:
  80004c8:	bd10      	pop	{r4, pc}
  80004ca:	46c0      	nop			; (mov r8, r8)
 
-080004cc <myspi>:
-
-	HAL_Delay(100);
-}
-
-void myspi(uint32_t data)
-{
- 80004cc:	b580      	push	{r7, lr}
- 80004ce:	b084      	sub	sp, #16
- 80004d0:	af00      	add	r7, sp, #0
- 80004d2:	6078      	str	r0, [r7, #4]
-	//uint32_t delay = 0;
-	HAL_GPIO_WritePin(ADF_LE_GPIO_Port, ADF_LE_Pin, GPIO_PIN_RESET);
- 80004d4:	2380      	movs	r3, #128	; 0x80
- 80004d6:	009b      	lsls	r3, r3, #2
- 80004d8:	482f      	ldr	r0, [pc, #188]	; (8000598 <myspi+0xcc>)
- 80004da:	2200      	movs	r2, #0
- 80004dc:	0019      	movs	r1, r3
- 80004de:	f001 fe25 	bl	800212c <HAL_GPIO_WritePin>
-
-	HAL_GPIO_WritePin(ADF_Data_GPIO_Port, ADF_Data_Pin, GPIO_PIN_RESET);
- 80004e2:	2380      	movs	r3, #128	; 0x80
- 80004e4:	005b      	lsls	r3, r3, #1
- 80004e6:	482c      	ldr	r0, [pc, #176]	; (8000598 <myspi+0xcc>)
- 80004e8:	2200      	movs	r2, #0
- 80004ea:	0019      	movs	r1, r3
- 80004ec:	f001 fe1e 	bl	800212c <HAL_GPIO_WritePin>
-	HAL_GPIO_WritePin(ADF_CLK_GPIO_Port, ADF_CLK_Pin, GPIO_PIN_RESET);
- 80004f0:	4b29      	ldr	r3, [pc, #164]	; (8000598 <myspi+0xcc>)
- 80004f2:	2200      	movs	r2, #0
- 80004f4:	2180      	movs	r1, #128	; 0x80
- 80004f6:	0018      	movs	r0, r3
- 80004f8:	f001 fe18 	bl	800212c <HAL_GPIO_WritePin>
-	//HAL_Delay(delay);
-	__HAL_RCC_GPIOA_CLK_ENABLE();
- 80004fc:	4b27      	ldr	r3, [pc, #156]	; (800059c <myspi+0xd0>)
- 80004fe:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8000500:	4b26      	ldr	r3, [pc, #152]	; (800059c <myspi+0xd0>)
- 8000502:	2101      	movs	r1, #1
- 8000504:	430a      	orrs	r2, r1
- 8000506:	62da      	str	r2, [r3, #44]	; 0x2c
- 8000508:	4b24      	ldr	r3, [pc, #144]	; (800059c <myspi+0xd0>)
- 800050a:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 800050c:	2201      	movs	r2, #1
- 800050e:	4013      	ands	r3, r2
- 8000510:	60bb      	str	r3, [r7, #8]
- 8000512:	68bb      	ldr	r3, [r7, #8]
-	for (int i = 0; i < 32; i++) {
- 8000514:	2300      	movs	r3, #0
- 8000516:	60fb      	str	r3, [r7, #12]
- 8000518:	e023      	b.n	8000562 <myspi+0x96>
-		HAL_GPIO_WritePin(ADF_CLK_GPIO_Port, ADF_CLK_Pin, GPIO_PIN_RESET);
- 800051a:	4b1f      	ldr	r3, [pc, #124]	; (8000598 <myspi+0xcc>)
- 800051c:	2200      	movs	r2, #0
- 800051e:	2180      	movs	r1, #128	; 0x80
- 8000520:	0018      	movs	r0, r3
- 8000522:	f001 fe03 	bl	800212c <HAL_GPIO_WritePin>
-		if (data & 0b10000000000000000000000000000000)
- 8000526:	687b      	ldr	r3, [r7, #4]
- 8000528:	2b00      	cmp	r3, #0
- 800052a:	da07      	bge.n	800053c <myspi+0x70>
-		{
-			HAL_GPIO_WritePin(ADF_Data_GPIO_Port, ADF_Data_Pin, GPIO_PIN_SET);
- 800052c:	2380      	movs	r3, #128	; 0x80
- 800052e:	005b      	lsls	r3, r3, #1
- 8000530:	4819      	ldr	r0, [pc, #100]	; (8000598 <myspi+0xcc>)
- 8000532:	2201      	movs	r2, #1
- 8000534:	0019      	movs	r1, r3
- 8000536:	f001 fdf9 	bl	800212c <HAL_GPIO_WritePin>
- 800053a:	e006      	b.n	800054a <myspi+0x7e>
-		} else {
-			HAL_GPIO_WritePin(ADF_Data_GPIO_Port, ADF_Data_Pin, GPIO_PIN_RESET);
- 800053c:	2380      	movs	r3, #128	; 0x80
- 800053e:	005b      	lsls	r3, r3, #1
- 8000540:	4815      	ldr	r0, [pc, #84]	; (8000598 <myspi+0xcc>)
- 8000542:	2200      	movs	r2, #0
- 8000544:	0019      	movs	r1, r3
- 8000546:	f001 fdf1 	bl	800212c <HAL_GPIO_WritePin>
-		}
-		//HAL_Delay(delay);
-		HAL_GPIO_WritePin(ADF_CLK_GPIO_Port, ADF_CLK_Pin, GPIO_PIN_SET);
- 800054a:	4b13      	ldr	r3, [pc, #76]	; (8000598 <myspi+0xcc>)
- 800054c:	2201      	movs	r2, #1
- 800054e:	2180      	movs	r1, #128	; 0x80
- 8000550:	0018      	movs	r0, r3
- 8000552:	f001 fdeb 	bl	800212c <HAL_GPIO_WritePin>
-		data = data << 1;
- 8000556:	687b      	ldr	r3, [r7, #4]
- 8000558:	005b      	lsls	r3, r3, #1
- 800055a:	607b      	str	r3, [r7, #4]
-	for (int i = 0; i < 32; i++) {
- 800055c:	68fb      	ldr	r3, [r7, #12]
- 800055e:	3301      	adds	r3, #1
- 8000560:	60fb      	str	r3, [r7, #12]
- 8000562:	68fb      	ldr	r3, [r7, #12]
- 8000564:	2b1f      	cmp	r3, #31
- 8000566:	ddd8      	ble.n	800051a <myspi+0x4e>
-	}
-	HAL_GPIO_WritePin(ADF_LE_GPIO_Port, ADF_LE_Pin, GPIO_PIN_SET);
- 8000568:	2380      	movs	r3, #128	; 0x80
- 800056a:	009b      	lsls	r3, r3, #2
- 800056c:	480a      	ldr	r0, [pc, #40]	; (8000598 <myspi+0xcc>)
- 800056e:	2201      	movs	r2, #1
- 8000570:	0019      	movs	r1, r3
- 8000572:	f001 fddb 	bl	800212c <HAL_GPIO_WritePin>
-	HAL_GPIO_WritePin(ADF_LE_GPIO_Port, ADF_LE_Pin, GPIO_PIN_RESET);
- 8000576:	2380      	movs	r3, #128	; 0x80
- 8000578:	009b      	lsls	r3, r3, #2
- 800057a:	4807      	ldr	r0, [pc, #28]	; (8000598 <myspi+0xcc>)
- 800057c:	2200      	movs	r2, #0
- 800057e:	0019      	movs	r1, r3
- 8000580:	f001 fdd4 	bl	800212c <HAL_GPIO_WritePin>
-	HAL_GPIO_WritePin(ADF_CLK_GPIO_Port, ADF_CLK_Pin, GPIO_PIN_RESET);
- 8000584:	4b04      	ldr	r3, [pc, #16]	; (8000598 <myspi+0xcc>)
- 8000586:	2200      	movs	r2, #0
- 8000588:	2180      	movs	r1, #128	; 0x80
- 800058a:	0018      	movs	r0, r3
- 800058c:	f001 fdce 	bl	800212c <HAL_GPIO_WritePin>
-
-}
- 8000590:	46c0      	nop			; (mov r8, r8)
- 8000592:	46bd      	mov	sp, r7
- 8000594:	b004      	add	sp, #16
- 8000596:	bd80      	pop	{r7, pc}
- 8000598:	50000800 	.word	0x50000800
- 800059c:	40021000 	.word	0x40021000
-
-080005a0 <main>:
+080004cc <main>:
 /**
   * @brief  The application entry point.
   * @retval int
   */
 int main(void)
 {
- 80005a0:	b590      	push	{r4, r7, lr}
- 80005a2:	b09b      	sub	sp, #108	; 0x6c
- 80005a4:	af00      	add	r7, sp, #0
+ 80004cc:	b590      	push	{r4, r7, lr}
+ 80004ce:	b09d      	sub	sp, #116	; 0x74
+ 80004d0:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN 1 */
+	uint8_t onebyte[1];
 	int32_t preambule;
 	uint8_t data[58];
 	uint8_t buffer[20];
 	uint8_t dt = 0;
- 80005a6:	2363      	movs	r3, #99	; 0x63
- 80005a8:	18fb      	adds	r3, r7, r3
- 80005aa:	2200      	movs	r2, #0
- 80005ac:	701a      	strb	r2, [r3, #0]
+ 80004d2:	236b      	movs	r3, #107	; 0x6b
+ 80004d4:	18fb      	adds	r3, r7, r3
+ 80004d6:	2200      	movs	r2, #0
+ 80004d8:	701a      	strb	r2, [r3, #0]
 	uint8_t count = 0;
- 80005ae:	2362      	movs	r3, #98	; 0x62
- 80005b0:	18fb      	adds	r3, r7, r3
- 80005b2:	2200      	movs	r2, #0
- 80005b4:	701a      	strb	r2, [r3, #0]
+ 80004da:	236a      	movs	r3, #106	; 0x6a
+ 80004dc:	18fb      	adds	r3, r7, r3
+ 80004de:	2200      	movs	r2, #0
+ 80004e0:	701a      	strb	r2, [r3, #0]
 	uint8_t satcount = 0;
- 80005b6:	2361      	movs	r3, #97	; 0x61
- 80005b8:	18fb      	adds	r3, r7, r3
- 80005ba:	2200      	movs	r2, #0
- 80005bc:	701a      	strb	r2, [r3, #0]
+ 80004e2:	2369      	movs	r3, #105	; 0x69
+ 80004e4:	18fb      	adds	r3, r7, r3
+ 80004e6:	2200      	movs	r2, #0
+ 80004e8:	701a      	strb	r2, [r3, #0]
   /* USER CODE END 1 */
 
   /* MCU Configuration--------------------------------------------------------*/
 
   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
   HAL_Init();
- 80005be:	f000 ff05 	bl	80013cc <HAL_Init>
+ 80004ea:	f000 feb1 	bl	8001250 <HAL_Init>
   /* USER CODE BEGIN Init */
 
   /* USER CODE END Init */
 
   /* Configure the system clock */
   SystemClock_Config();
- 80005c2:	f000 f9bf 	bl	8000944 <SystemClock_Config>
+ 80004ee:	f000 f997 	bl	8000820 <SystemClock_Config>
   /* USER CODE BEGIN SysInit */
 
   /* USER CODE END SysInit */
 
   /* Initialize all configured peripherals */
   MX_GPIO_Init();
- 80005c6:	f000 fbc7 	bl	8000d58 <MX_GPIO_Init>
+ 80004f2:	f000 fb9f 	bl	8000c34 <MX_GPIO_Init>
   MX_DMA_Init();
- 80005ca:	f000 fba7 	bl	8000d1c <MX_DMA_Init>
+ 80004f6:	f000 fb7f 	bl	8000bf8 <MX_DMA_Init>
   MX_LPUART1_UART_Init();
- 80005ce:	f000 fab9 	bl	8000b44 <MX_LPUART1_UART_Init>
+ 80004fa:	f000 fa91 	bl	8000a20 <MX_LPUART1_UART_Init>
   MX_ADC_Init();
- 80005d2:	f000 fa33 	bl	8000a3c <MX_ADC_Init>
+ 80004fe:	f000 fa0b 	bl	8000918 <MX_ADC_Init>
   MX_USART1_UART_Init();
- 80005d6:	f000 fae3 	bl	8000ba0 <MX_USART1_UART_Init>
+ 8000502:	f000 fabb 	bl	8000a7c <MX_USART1_UART_Init>
   MX_SPI1_Init();
- 80005da:	f000 fb11 	bl	8000c00 <MX_SPI1_Init>
+ 8000506:	f000 fae9 	bl	8000adc <MX_SPI1_Init>
   MX_TIM21_Init();
- 80005de:	f000 fb47 	bl	8000c70 <MX_TIM21_Init>
+ 800050a:	f000 fb1f 	bl	8000b4c <MX_TIM21_Init>
   /* USER CODE BEGIN 2 */
 
   HAL_GPIO_WritePin(DC_boost_GPIO_Port, DC_boost_Pin, GPIO_PIN_SET);
- 80005e2:	2380      	movs	r3, #128	; 0x80
- 80005e4:	0159      	lsls	r1, r3, #5
- 80005e6:	23a0      	movs	r3, #160	; 0xa0
- 80005e8:	05db      	lsls	r3, r3, #23
- 80005ea:	2201      	movs	r2, #1
- 80005ec:	0018      	movs	r0, r3
- 80005ee:	f001 fd9d 	bl	800212c <HAL_GPIO_WritePin>
+ 800050e:	2380      	movs	r3, #128	; 0x80
+ 8000510:	0159      	lsls	r1, r3, #5
+ 8000512:	23a0      	movs	r3, #160	; 0xa0
+ 8000514:	05db      	lsls	r3, r3, #23
+ 8000516:	2201      	movs	r2, #1
+ 8000518:	0018      	movs	r0, r3
+ 800051a:	f001 fcc1 	bl	8001ea0 <HAL_GPIO_WritePin>
   HAL_Delay(200);
- 80005f2:	20c8      	movs	r0, #200	; 0xc8
- 80005f4:	f000 ff5a 	bl	80014ac <HAL_Delay>
+ 800051e:	20c8      	movs	r0, #200	; 0xc8
+ 8000520:	f000 ff06 	bl	8001330 <HAL_Delay>
  //HAL_GPIO_WritePin(Battery_on_GPIO_Port, Battery_on_Pin, GPIO_PIN_SET);
- // HAL_GPIO_WritePin(RADIO_EN_GPIO_Port, RADIO_EN_Pin, GPIO_PIN_RESET);
-
-  myspi(0b00000000000000000010000000100010);
- 80005f8:	4bc0      	ldr	r3, [pc, #768]	; (80008fc <main+0x35c>)
- 80005fa:	0018      	movs	r0, r3
- 80005fc:	f7ff ff66 	bl	80004cc <myspi>
-  myspi(0b00000000011101000001100010101111);
- 8000600:	4bbf      	ldr	r3, [pc, #764]	; (8000900 <main+0x360>)
- 8000602:	0018      	movs	r0, r3
- 8000604:	f7ff ff62 	bl	80004cc <myspi>
-  myspi(0b00000011110001000010000001001100);
- 8000608:	4bbe      	ldr	r3, [pc, #760]	; (8000904 <main+0x364>)
- 800060a:	0018      	movs	r0, r3
- 800060c:	f7ff ff5e 	bl	80004cc <myspi>
-  myspi(0b00000000000011011111000011001101);
- 8000610:	4bbd      	ldr	r3, [pc, #756]	; (8000908 <main+0x368>)
- 8000612:	0018      	movs	r0, r3
- 8000614:	f7ff ff5a 	bl	80004cc <myspi>
+ // HAL_GPIO_WritePin(RADIO_EN_GPIO_Port, RADIO_EN_Pin, GPIO_PIN_RESET)
 
 
     HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
- 8000618:	2380      	movs	r3, #128	; 0x80
- 800061a:	01db      	lsls	r3, r3, #7
- 800061c:	4abb      	ldr	r2, [pc, #748]	; (800090c <main+0x36c>)
- 800061e:	0019      	movs	r1, r3
- 8000620:	0010      	movs	r0, r2
- 8000622:	f001 fda0 	bl	8002166 <HAL_GPIO_TogglePin>
+ 8000524:	2380      	movs	r3, #128	; 0x80
+ 8000526:	01db      	lsls	r3, r3, #7
+ 8000528:	4ab0      	ldr	r2, [pc, #704]	; (80007ec <main+0x320>)
+ 800052a:	0019      	movs	r1, r3
+ 800052c:	0010      	movs	r0, r2
+ 800052e:	f001 fcd4 	bl	8001eda <HAL_GPIO_TogglePin>
     HAL_Delay(200);
- 8000626:	20c8      	movs	r0, #200	; 0xc8
- 8000628:	f000 ff40 	bl	80014ac <HAL_Delay>
+ 8000532:	20c8      	movs	r0, #200	; 0xc8
+ 8000534:	f000 fefc 	bl	8001330 <HAL_Delay>
     HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
- 800062c:	2380      	movs	r3, #128	; 0x80
- 800062e:	01db      	lsls	r3, r3, #7
- 8000630:	4ab6      	ldr	r2, [pc, #728]	; (800090c <main+0x36c>)
- 8000632:	0019      	movs	r1, r3
- 8000634:	0010      	movs	r0, r2
- 8000636:	f001 fd96 	bl	8002166 <HAL_GPIO_TogglePin>
+ 8000538:	2380      	movs	r3, #128	; 0x80
+ 800053a:	01db      	lsls	r3, r3, #7
+ 800053c:	4aab      	ldr	r2, [pc, #684]	; (80007ec <main+0x320>)
+ 800053e:	0019      	movs	r1, r3
+ 8000540:	0010      	movs	r0, r2
+ 8000542:	f001 fcca 	bl	8001eda <HAL_GPIO_TogglePin>
     HAL_Delay(200);
- 800063a:	20c8      	movs	r0, #200	; 0xc8
- 800063c:	f000 ff36 	bl	80014ac <HAL_Delay>
+ 8000546:	20c8      	movs	r0, #200	; 0xc8
+ 8000548:	f000 fef2 	bl	8001330 <HAL_Delay>
     HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
- 8000640:	2380      	movs	r3, #128	; 0x80
- 8000642:	01db      	lsls	r3, r3, #7
- 8000644:	4ab1      	ldr	r2, [pc, #708]	; (800090c <main+0x36c>)
- 8000646:	0019      	movs	r1, r3
- 8000648:	0010      	movs	r0, r2
- 800064a:	f001 fd8c 	bl	8002166 <HAL_GPIO_TogglePin>
+ 800054c:	2380      	movs	r3, #128	; 0x80
+ 800054e:	01db      	lsls	r3, r3, #7
+ 8000550:	4aa6      	ldr	r2, [pc, #664]	; (80007ec <main+0x320>)
+ 8000552:	0019      	movs	r1, r3
+ 8000554:	0010      	movs	r0, r2
+ 8000556:	f001 fcc0 	bl	8001eda <HAL_GPIO_TogglePin>
     HAL_Delay(200);
- 800064e:	20c8      	movs	r0, #200	; 0xc8
- 8000650:	f000 ff2c 	bl	80014ac <HAL_Delay>
+ 800055a:	20c8      	movs	r0, #200	; 0xc8
+ 800055c:	f000 fee8 	bl	8001330 <HAL_Delay>
     HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
- 8000654:	2380      	movs	r3, #128	; 0x80
- 8000656:	01db      	lsls	r3, r3, #7
- 8000658:	4aac      	ldr	r2, [pc, #688]	; (800090c <main+0x36c>)
- 800065a:	0019      	movs	r1, r3
- 800065c:	0010      	movs	r0, r2
- 800065e:	f001 fd82 	bl	8002166 <HAL_GPIO_TogglePin>
+ 8000560:	2380      	movs	r3, #128	; 0x80
+ 8000562:	01db      	lsls	r3, r3, #7
+ 8000564:	4aa1      	ldr	r2, [pc, #644]	; (80007ec <main+0x320>)
+ 8000566:	0019      	movs	r1, r3
+ 8000568:	0010      	movs	r0, r2
+ 800056a:	f001 fcb6 	bl	8001eda <HAL_GPIO_TogglePin>
     HAL_Delay(200);
- 8000662:	20c8      	movs	r0, #200	; 0xc8
- 8000664:	f000 ff22 	bl	80014ac <HAL_Delay>
+ 800056e:	20c8      	movs	r0, #200	; 0xc8
+ 8000570:	f000 fede 	bl	8001330 <HAL_Delay>
     HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
- 8000668:	2380      	movs	r3, #128	; 0x80
- 800066a:	01db      	lsls	r3, r3, #7
- 800066c:	4aa7      	ldr	r2, [pc, #668]	; (800090c <main+0x36c>)
- 800066e:	0019      	movs	r1, r3
- 8000670:	0010      	movs	r0, r2
- 8000672:	f001 fd78 	bl	8002166 <HAL_GPIO_TogglePin>
+ 8000574:	2380      	movs	r3, #128	; 0x80
+ 8000576:	01db      	lsls	r3, r3, #7
+ 8000578:	4a9c      	ldr	r2, [pc, #624]	; (80007ec <main+0x320>)
+ 800057a:	0019      	movs	r1, r3
+ 800057c:	0010      	movs	r0, r2
+ 800057e:	f001 fcac 	bl	8001eda <HAL_GPIO_TogglePin>
     HAL_Delay(200);
- 8000676:	20c8      	movs	r0, #200	; 0xc8
- 8000678:	f000 ff18 	bl	80014ac <HAL_Delay>
+ 8000582:	20c8      	movs	r0, #200	; 0xc8
+ 8000584:	f000 fed4 	bl	8001330 <HAL_Delay>
     HAL_GPIO_TogglePin(LED_GPIO_Port, LED_Pin);
- 800067c:	2380      	movs	r3, #128	; 0x80
- 800067e:	01db      	lsls	r3, r3, #7
- 8000680:	4aa2      	ldr	r2, [pc, #648]	; (800090c <main+0x36c>)
- 8000682:	0019      	movs	r1, r3
- 8000684:	0010      	movs	r0, r2
- 8000686:	f001 fd6e 	bl	8002166 <HAL_GPIO_TogglePin>
+ 8000588:	2380      	movs	r3, #128	; 0x80
+ 800058a:	01db      	lsls	r3, r3, #7
+ 800058c:	4a97      	ldr	r2, [pc, #604]	; (80007ec <main+0x320>)
+ 800058e:	0019      	movs	r1, r3
+ 8000590:	0010      	movs	r0, r2
+ 8000592:	f001 fca2 	bl	8001eda <HAL_GPIO_TogglePin>
     HAL_Delay(200);
- 800068a:	20c8      	movs	r0, #200	; 0xc8
- 800068c:	f000 ff0e 	bl	80014ac <HAL_Delay>
+ 8000596:	20c8      	movs	r0, #200	; 0xc8
+ 8000598:	f000 feca 	bl	8001330 <HAL_Delay>
 
     HAL_GPIO_WritePin(GPS_ON_GPIO_Port, GPS_ON_Pin, GPIO_PIN_SET);
- 8000690:	2380      	movs	r3, #128	; 0x80
- 8000692:	01db      	lsls	r3, r3, #7
- 8000694:	489e      	ldr	r0, [pc, #632]	; (8000910 <main+0x370>)
- 8000696:	2201      	movs	r2, #1
- 8000698:	0019      	movs	r1, r3
- 800069a:	f001 fd47 	bl	800212c <HAL_GPIO_WritePin>
+ 800059c:	2380      	movs	r3, #128	; 0x80
+ 800059e:	01db      	lsls	r3, r3, #7
+ 80005a0:	4893      	ldr	r0, [pc, #588]	; (80007f0 <main+0x324>)
+ 80005a2:	2201      	movs	r2, #1
+ 80005a4:	0019      	movs	r1, r3
+ 80005a6:	f001 fc7b 	bl	8001ea0 <HAL_GPIO_WritePin>
     HAL_UART_Transmit(&huart1, (uint8_t*)&"START\r\n", 7, 10);
- 800069e:	499d      	ldr	r1, [pc, #628]	; (8000914 <main+0x374>)
- 80006a0:	489d      	ldr	r0, [pc, #628]	; (8000918 <main+0x378>)
- 80006a2:	230a      	movs	r3, #10
- 80006a4:	2207      	movs	r2, #7
- 80006a6:	f003 f941 	bl	800392c <HAL_UART_Transmit>
+ 80005aa:	4992      	ldr	r1, [pc, #584]	; (80007f4 <main+0x328>)
+ 80005ac:	4892      	ldr	r0, [pc, #584]	; (80007f8 <main+0x32c>)
+ 80005ae:	230a      	movs	r3, #10
+ 80005b0:	2207      	movs	r2, #7
+ 80005b2:	f003 f875 	bl	80036a0 <HAL_UART_Transmit>
     HAL_Delay(500);
- 80006aa:	23fa      	movs	r3, #250	; 0xfa
- 80006ac:	005b      	lsls	r3, r3, #1
- 80006ae:	0018      	movs	r0, r3
- 80006b0:	f000 fefc 	bl	80014ac <HAL_Delay>
-
-    HAL_UART_Receive_IT(&huart1, onebyte, 1);
- 80006b4:	4999      	ldr	r1, [pc, #612]	; (800091c <main+0x37c>)
- 80006b6:	4b98      	ldr	r3, [pc, #608]	; (8000918 <main+0x378>)
- 80006b8:	2201      	movs	r2, #1
- 80006ba:	0018      	movs	r0, r3
- 80006bc:	f003 f9d6 	bl	8003a6c <HAL_UART_Receive_IT>
+ 80005b6:	23fa      	movs	r3, #250	; 0xfa
+ 80005b8:	005b      	lsls	r3, r3, #1
+ 80005ba:	0018      	movs	r0, r3
+ 80005bc:	f000 feb8 	bl	8001330 <HAL_Delay>
   while (1)
   {
     /* USER CODE END WHILE */
 
     /* USER CODE BEGIN 3 */
-	  	  	HAL_Delay(500);
- 80006c0:	23fa      	movs	r3, #250	; 0xfa
- 80006c2:	005b      	lsls	r3, r3, #1
- 80006c4:	0018      	movs	r0, r3
- 80006c6:	f000 fef1 	bl	80014ac <HAL_Delay>
-
-	        if(rec == 1)
- 80006ca:	4b95      	ldr	r3, [pc, #596]	; (8000920 <main+0x380>)
- 80006cc:	781b      	ldrb	r3, [r3, #0]
- 80006ce:	2b01      	cmp	r3, #1
- 80006d0:	d1f6      	bne.n	80006c0 <main+0x120>
+	        if(HAL_OK == HAL_UART_Receive(&hlpuart1, onebyte, 1, 100))
+ 80005c0:	2454      	movs	r4, #84	; 0x54
+ 80005c2:	1939      	adds	r1, r7, r4
+ 80005c4:	488d      	ldr	r0, [pc, #564]	; (80007fc <main+0x330>)
+ 80005c6:	2364      	movs	r3, #100	; 0x64
+ 80005c8:	2201      	movs	r2, #1
+ 80005ca:	f003 f909 	bl	80037e0 <HAL_UART_Receive>
+ 80005ce:	1e03      	subs	r3, r0, #0
+ 80005d0:	d1f6      	bne.n	80005c0 <main+0xf4>
 	        {
-	        	HAL_GPIO_TogglePin (LED_GPIO_Port, LED_Pin);
- 80006d2:	2380      	movs	r3, #128	; 0x80
- 80006d4:	01db      	lsls	r3, r3, #7
- 80006d6:	4a8d      	ldr	r2, [pc, #564]	; (800090c <main+0x36c>)
- 80006d8:	0019      	movs	r1, r3
- 80006da:	0010      	movs	r0, r2
- 80006dc:	f001 fd43 	bl	8002166 <HAL_GPIO_TogglePin>
-	        	rec = 0;
- 80006e0:	4b8f      	ldr	r3, [pc, #572]	; (8000920 <main+0x380>)
- 80006e2:	2200      	movs	r2, #0
- 80006e4:	701a      	strb	r2, [r3, #0]
 	        	if (dt==1) {
- 80006e6:	2363      	movs	r3, #99	; 0x63
- 80006e8:	18fb      	adds	r3, r7, r3
- 80006ea:	781b      	ldrb	r3, [r3, #0]
- 80006ec:	2b01      	cmp	r3, #1
- 80006ee:	d000      	beq.n	80006f2 <main+0x152>
- 80006f0:	e0f0      	b.n	80008d4 <main+0x334>
+ 80005d2:	236b      	movs	r3, #107	; 0x6b
+ 80005d4:	18fb      	adds	r3, r7, r3
+ 80005d6:	781b      	ldrb	r3, [r3, #0]
+ 80005d8:	2b01      	cmp	r3, #1
+ 80005da:	d000      	beq.n	80005de <main+0x112>
+ 80005dc:	e0f0      	b.n	80007c0 <main+0x2f4>
 	            	if (count < 58){
- 80006f2:	2062      	movs	r0, #98	; 0x62
- 80006f4:	183b      	adds	r3, r7, r0
- 80006f6:	781b      	ldrb	r3, [r3, #0]
- 80006f8:	2b39      	cmp	r3, #57	; 0x39
- 80006fa:	d80b      	bhi.n	8000714 <main+0x174>
+ 80005de:	206a      	movs	r0, #106	; 0x6a
+ 80005e0:	183b      	adds	r3, r7, r0
+ 80005e2:	781b      	ldrb	r3, [r3, #0]
+ 80005e4:	2b39      	cmp	r3, #57	; 0x39
+ 80005e6:	d80b      	bhi.n	8000600 <main+0x134>
 	            	  data[count] = onebyte[0];
- 80006fc:	183b      	adds	r3, r7, r0
- 80006fe:	781b      	ldrb	r3, [r3, #0]
- 8000700:	4a86      	ldr	r2, [pc, #536]	; (800091c <main+0x37c>)
- 8000702:	7811      	ldrb	r1, [r2, #0]
- 8000704:	2214      	movs	r2, #20
- 8000706:	18ba      	adds	r2, r7, r2
- 8000708:	54d1      	strb	r1, [r2, r3]
+ 80005e8:	183b      	adds	r3, r7, r0
+ 80005ea:	781b      	ldrb	r3, [r3, #0]
+ 80005ec:	193a      	adds	r2, r7, r4
+ 80005ee:	7811      	ldrb	r1, [r2, #0]
+ 80005f0:	2218      	movs	r2, #24
+ 80005f2:	18ba      	adds	r2, r7, r2
+ 80005f4:	54d1      	strb	r1, [r2, r3]
 	            	  count++;
- 800070a:	183b      	adds	r3, r7, r0
- 800070c:	781a      	ldrb	r2, [r3, #0]
- 800070e:	183b      	adds	r3, r7, r0
- 8000710:	3201      	adds	r2, #1
- 8000712:	701a      	strb	r2, [r3, #0]
+ 80005f6:	183b      	adds	r3, r7, r0
+ 80005f8:	781a      	ldrb	r2, [r3, #0]
+ 80005fa:	183b      	adds	r3, r7, r0
+ 80005fc:	3201      	adds	r2, #1
+ 80005fe:	701a      	strb	r2, [r3, #0]
 	            	}
 	            	if (count > 57) {
- 8000714:	2362      	movs	r3, #98	; 0x62
- 8000716:	18fb      	adds	r3, r7, r3
- 8000718:	781b      	ldrb	r3, [r3, #0]
- 800071a:	2b39      	cmp	r3, #57	; 0x39
- 800071c:	d800      	bhi.n	8000720 <main+0x180>
- 800071e:	e0d9      	b.n	80008d4 <main+0x334>
+ 8000600:	236a      	movs	r3, #106	; 0x6a
+ 8000602:	18fb      	adds	r3, r7, r3
+ 8000604:	781b      	ldrb	r3, [r3, #0]
+ 8000606:	2b39      	cmp	r3, #57	; 0x39
+ 8000608:	d800      	bhi.n	800060c <main+0x140>
+ 800060a:	e0d9      	b.n	80007c0 <main+0x2f4>
 	            	  dt = 0;
- 8000720:	2363      	movs	r3, #99	; 0x63
- 8000722:	18fb      	adds	r3, r7, r3
- 8000724:	2200      	movs	r2, #0
- 8000726:	701a      	strb	r2, [r3, #0]
+ 800060c:	236b      	movs	r3, #107	; 0x6b
+ 800060e:	18fb      	adds	r3, r7, r3
+ 8000610:	2200      	movs	r2, #0
+ 8000612:	701a      	strb	r2, [r3, #0]
 	            	  int32_t lat = data[1] << 24  |  data[2] << 16  |  data[3] << 8 | data[4];
- 8000728:	2414      	movs	r4, #20
- 800072a:	193b      	adds	r3, r7, r4
- 800072c:	785b      	ldrb	r3, [r3, #1]
- 800072e:	061a      	lsls	r2, r3, #24
- 8000730:	193b      	adds	r3, r7, r4
- 8000732:	789b      	ldrb	r3, [r3, #2]
- 8000734:	041b      	lsls	r3, r3, #16
- 8000736:	431a      	orrs	r2, r3
- 8000738:	193b      	adds	r3, r7, r4
- 800073a:	78db      	ldrb	r3, [r3, #3]
- 800073c:	021b      	lsls	r3, r3, #8
- 800073e:	4313      	orrs	r3, r2
- 8000740:	193a      	adds	r2, r7, r4
- 8000742:	7912      	ldrb	r2, [r2, #4]
- 8000744:	4313      	orrs	r3, r2
- 8000746:	65fb      	str	r3, [r7, #92]	; 0x5c
+ 8000614:	2418      	movs	r4, #24
+ 8000616:	193b      	adds	r3, r7, r4
+ 8000618:	785b      	ldrb	r3, [r3, #1]
+ 800061a:	061a      	lsls	r2, r3, #24
+ 800061c:	193b      	adds	r3, r7, r4
+ 800061e:	789b      	ldrb	r3, [r3, #2]
+ 8000620:	041b      	lsls	r3, r3, #16
+ 8000622:	431a      	orrs	r2, r3
+ 8000624:	193b      	adds	r3, r7, r4
+ 8000626:	78db      	ldrb	r3, [r3, #3]
+ 8000628:	021b      	lsls	r3, r3, #8
+ 800062a:	4313      	orrs	r3, r2
+ 800062c:	193a      	adds	r2, r7, r4
+ 800062e:	7912      	ldrb	r2, [r2, #4]
+ 8000630:	4313      	orrs	r3, r2
+ 8000632:	667b      	str	r3, [r7, #100]	; 0x64
 	            	  int32_t lon = data[5] << 24  |  data[6] << 16  |  data[7] << 8 | data[8];
- 8000748:	193b      	adds	r3, r7, r4
- 800074a:	795b      	ldrb	r3, [r3, #5]
- 800074c:	061a      	lsls	r2, r3, #24
- 800074e:	193b      	adds	r3, r7, r4
- 8000750:	799b      	ldrb	r3, [r3, #6]
- 8000752:	041b      	lsls	r3, r3, #16
- 8000754:	431a      	orrs	r2, r3
- 8000756:	193b      	adds	r3, r7, r4
- 8000758:	79db      	ldrb	r3, [r3, #7]
- 800075a:	021b      	lsls	r3, r3, #8
- 800075c:	4313      	orrs	r3, r2
- 800075e:	193a      	adds	r2, r7, r4
- 8000760:	7a12      	ldrb	r2, [r2, #8]
- 8000762:	4313      	orrs	r3, r2
- 8000764:	65bb      	str	r3, [r7, #88]	; 0x58
+ 8000634:	193b      	adds	r3, r7, r4
+ 8000636:	795b      	ldrb	r3, [r3, #5]
+ 8000638:	061a      	lsls	r2, r3, #24
+ 800063a:	193b      	adds	r3, r7, r4
+ 800063c:	799b      	ldrb	r3, [r3, #6]
+ 800063e:	041b      	lsls	r3, r3, #16
+ 8000640:	431a      	orrs	r2, r3
+ 8000642:	193b      	adds	r3, r7, r4
+ 8000644:	79db      	ldrb	r3, [r3, #7]
+ 8000646:	021b      	lsls	r3, r3, #8
+ 8000648:	4313      	orrs	r3, r2
+ 800064a:	193a      	adds	r2, r7, r4
+ 800064c:	7a12      	ldrb	r2, [r2, #8]
+ 800064e:	4313      	orrs	r3, r2
+ 8000650:	663b      	str	r3, [r7, #96]	; 0x60
 	            	  int32_t alt =  data[9] << 16  |  data[10] << 8 | data[11];
- 8000766:	193b      	adds	r3, r7, r4
- 8000768:	7a5b      	ldrb	r3, [r3, #9]
- 800076a:	041a      	lsls	r2, r3, #16
- 800076c:	193b      	adds	r3, r7, r4
- 800076e:	7a9b      	ldrb	r3, [r3, #10]
- 8000770:	021b      	lsls	r3, r3, #8
- 8000772:	4313      	orrs	r3, r2
- 8000774:	193a      	adds	r2, r7, r4
- 8000776:	7ad2      	ldrb	r2, [r2, #11]
- 8000778:	4313      	orrs	r3, r2
- 800077a:	657b      	str	r3, [r7, #84]	; 0x54
+ 8000652:	193b      	adds	r3, r7, r4
+ 8000654:	7a5b      	ldrb	r3, [r3, #9]
+ 8000656:	041a      	lsls	r2, r3, #16
+ 8000658:	193b      	adds	r3, r7, r4
+ 800065a:	7a9b      	ldrb	r3, [r3, #10]
+ 800065c:	021b      	lsls	r3, r3, #8
+ 800065e:	4313      	orrs	r3, r2
+ 8000660:	193a      	adds	r2, r7, r4
+ 8000662:	7ad2      	ldrb	r2, [r2, #11]
+ 8000664:	4313      	orrs	r3, r2
+ 8000666:	65fb      	str	r3, [r7, #92]	; 0x5c
 	            	  int32_t gps_time =  data[18] << 16  |  data[19] << 8 | data[20];
- 800077c:	193b      	adds	r3, r7, r4
- 800077e:	7c9b      	ldrb	r3, [r3, #18]
- 8000780:	041a      	lsls	r2, r3, #16
- 8000782:	193b      	adds	r3, r7, r4
- 8000784:	7cdb      	ldrb	r3, [r3, #19]
- 8000786:	021b      	lsls	r3, r3, #8
- 8000788:	4313      	orrs	r3, r2
- 800078a:	193a      	adds	r2, r7, r4
- 800078c:	7d12      	ldrb	r2, [r2, #20]
- 800078e:	4313      	orrs	r3, r2
- 8000790:	653b      	str	r3, [r7, #80]	; 0x50
+ 8000668:	193b      	adds	r3, r7, r4
+ 800066a:	7c9b      	ldrb	r3, [r3, #18]
+ 800066c:	041a      	lsls	r2, r3, #16
+ 800066e:	193b      	adds	r3, r7, r4
+ 8000670:	7cdb      	ldrb	r3, [r3, #19]
+ 8000672:	021b      	lsls	r3, r3, #8
+ 8000674:	4313      	orrs	r3, r2
+ 8000676:	193a      	adds	r2, r7, r4
+ 8000678:	7d12      	ldrb	r2, [r2, #20]
+ 800067a:	4313      	orrs	r3, r2
+ 800067c:	65bb      	str	r3, [r7, #88]	; 0x58
 	     	          HAL_GPIO_TogglePin (LED_GPIO_Port, LED_Pin);
- 8000792:	2380      	movs	r3, #128	; 0x80
- 8000794:	01db      	lsls	r3, r3, #7
- 8000796:	4a5d      	ldr	r2, [pc, #372]	; (800090c <main+0x36c>)
- 8000798:	0019      	movs	r1, r3
- 800079a:	0010      	movs	r0, r2
- 800079c:	f001 fce3 	bl	8002166 <HAL_GPIO_TogglePin>
+ 800067e:	2380      	movs	r3, #128	; 0x80
+ 8000680:	01db      	lsls	r3, r3, #7
+ 8000682:	4a5a      	ldr	r2, [pc, #360]	; (80007ec <main+0x320>)
+ 8000684:	0019      	movs	r1, r3
+ 8000686:	0010      	movs	r0, r2
+ 8000688:	f001 fc27 	bl	8001eda <HAL_GPIO_TogglePin>
 
 	            	  sprintf(buffer, "Lat %d ", lat);
- 80007a0:	6dfa      	ldr	r2, [r7, #92]	; 0x5c
- 80007a2:	4960      	ldr	r1, [pc, #384]	; (8000924 <main+0x384>)
- 80007a4:	003b      	movs	r3, r7
- 80007a6:	0018      	movs	r0, r3
- 80007a8:	f004 fc42 	bl	8005030 <siprintf>
+ 800068c:	6e7a      	ldr	r2, [r7, #100]	; 0x64
+ 800068e:	495c      	ldr	r1, [pc, #368]	; (8000800 <main+0x334>)
+ 8000690:	1d3b      	adds	r3, r7, #4
+ 8000692:	0018      	movs	r0, r3
+ 8000694:	f003 fe38 	bl	8004308 <siprintf>
 	            	  HAL_UART_Transmit(&huart1, (uint8_t*)&buffer, strlen(buffer),10);
- 80007ac:	003b      	movs	r3, r7
- 80007ae:	0018      	movs	r0, r3
- 80007b0:	f7ff fcaa 	bl	8000108 <strlen>
- 80007b4:	0003      	movs	r3, r0
- 80007b6:	b29a      	uxth	r2, r3
- 80007b8:	0039      	movs	r1, r7
- 80007ba:	4857      	ldr	r0, [pc, #348]	; (8000918 <main+0x378>)
- 80007bc:	230a      	movs	r3, #10
- 80007be:	f003 f8b5 	bl	800392c <HAL_UART_Transmit>
+ 8000698:	1d3b      	adds	r3, r7, #4
+ 800069a:	0018      	movs	r0, r3
+ 800069c:	f7ff fd34 	bl	8000108 <strlen>
+ 80006a0:	0003      	movs	r3, r0
+ 80006a2:	b29a      	uxth	r2, r3
+ 80006a4:	1d39      	adds	r1, r7, #4
+ 80006a6:	4854      	ldr	r0, [pc, #336]	; (80007f8 <main+0x32c>)
+ 80006a8:	230a      	movs	r3, #10
+ 80006aa:	f002 fff9 	bl	80036a0 <HAL_UART_Transmit>
 	            	  sprintf(buffer, "Long %d ", lon);
- 80007c2:	6dba      	ldr	r2, [r7, #88]	; 0x58
- 80007c4:	4958      	ldr	r1, [pc, #352]	; (8000928 <main+0x388>)
- 80007c6:	003b      	movs	r3, r7
- 80007c8:	0018      	movs	r0, r3
- 80007ca:	f004 fc31 	bl	8005030 <siprintf>
+ 80006ae:	6e3a      	ldr	r2, [r7, #96]	; 0x60
+ 80006b0:	4954      	ldr	r1, [pc, #336]	; (8000804 <main+0x338>)
+ 80006b2:	1d3b      	adds	r3, r7, #4
+ 80006b4:	0018      	movs	r0, r3
+ 80006b6:	f003 fe27 	bl	8004308 <siprintf>
 	            	  HAL_UART_Transmit(&huart1, (uint8_t*)&buffer, strlen(buffer),10);
- 80007ce:	003b      	movs	r3, r7
- 80007d0:	0018      	movs	r0, r3
- 80007d2:	f7ff fc99 	bl	8000108 <strlen>
- 80007d6:	0003      	movs	r3, r0
- 80007d8:	b29a      	uxth	r2, r3
- 80007da:	0039      	movs	r1, r7
- 80007dc:	484e      	ldr	r0, [pc, #312]	; (8000918 <main+0x378>)
- 80007de:	230a      	movs	r3, #10
- 80007e0:	f003 f8a4 	bl	800392c <HAL_UART_Transmit>
+ 80006ba:	1d3b      	adds	r3, r7, #4
+ 80006bc:	0018      	movs	r0, r3
+ 80006be:	f7ff fd23 	bl	8000108 <strlen>
+ 80006c2:	0003      	movs	r3, r0
+ 80006c4:	b29a      	uxth	r2, r3
+ 80006c6:	1d39      	adds	r1, r7, #4
+ 80006c8:	484b      	ldr	r0, [pc, #300]	; (80007f8 <main+0x32c>)
+ 80006ca:	230a      	movs	r3, #10
+ 80006cc:	f002 ffe8 	bl	80036a0 <HAL_UART_Transmit>
 	            	  sprintf(buffer, "Alt %d ", alt);
- 80007e4:	6d7a      	ldr	r2, [r7, #84]	; 0x54
- 80007e6:	4951      	ldr	r1, [pc, #324]	; (800092c <main+0x38c>)
- 80007e8:	003b      	movs	r3, r7
- 80007ea:	0018      	movs	r0, r3
- 80007ec:	f004 fc20 	bl	8005030 <siprintf>
+ 80006d0:	6dfa      	ldr	r2, [r7, #92]	; 0x5c
+ 80006d2:	494d      	ldr	r1, [pc, #308]	; (8000808 <main+0x33c>)
+ 80006d4:	1d3b      	adds	r3, r7, #4
+ 80006d6:	0018      	movs	r0, r3
+ 80006d8:	f003 fe16 	bl	8004308 <siprintf>
 	            	  HAL_UART_Transmit(&huart1, (uint8_t*)&buffer, strlen(buffer),10);
- 80007f0:	003b      	movs	r3, r7
- 80007f2:	0018      	movs	r0, r3
- 80007f4:	f7ff fc88 	bl	8000108 <strlen>
- 80007f8:	0003      	movs	r3, r0
- 80007fa:	b29a      	uxth	r2, r3
- 80007fc:	0039      	movs	r1, r7
- 80007fe:	4846      	ldr	r0, [pc, #280]	; (8000918 <main+0x378>)
- 8000800:	230a      	movs	r3, #10
- 8000802:	f003 f893 	bl	800392c <HAL_UART_Transmit>
+ 80006dc:	1d3b      	adds	r3, r7, #4
+ 80006de:	0018      	movs	r0, r3
+ 80006e0:	f7ff fd12 	bl	8000108 <strlen>
+ 80006e4:	0003      	movs	r3, r0
+ 80006e6:	b29a      	uxth	r2, r3
+ 80006e8:	1d39      	adds	r1, r7, #4
+ 80006ea:	4843      	ldr	r0, [pc, #268]	; (80007f8 <main+0x32c>)
+ 80006ec:	230a      	movs	r3, #10
+ 80006ee:	f002 ffd7 	bl	80036a0 <HAL_UART_Transmit>
 	            	  sprintf(buffer, "Time %d ", gps_time);
- 8000806:	6d3a      	ldr	r2, [r7, #80]	; 0x50
- 8000808:	4949      	ldr	r1, [pc, #292]	; (8000930 <main+0x390>)
- 800080a:	003b      	movs	r3, r7
- 800080c:	0018      	movs	r0, r3
- 800080e:	f004 fc0f 	bl	8005030 <siprintf>
+ 80006f2:	6dba      	ldr	r2, [r7, #88]	; 0x58
+ 80006f4:	4945      	ldr	r1, [pc, #276]	; (800080c <main+0x340>)
+ 80006f6:	1d3b      	adds	r3, r7, #4
+ 80006f8:	0018      	movs	r0, r3
+ 80006fa:	f003 fe05 	bl	8004308 <siprintf>
 	            	  HAL_UART_Transmit(&huart1, (uint8_t*)&buffer, strlen(buffer),10);
- 8000812:	003b      	movs	r3, r7
- 8000814:	0018      	movs	r0, r3
- 8000816:	f7ff fc77 	bl	8000108 <strlen>
- 800081a:	0003      	movs	r3, r0
- 800081c:	b29a      	uxth	r2, r3
- 800081e:	0039      	movs	r1, r7
- 8000820:	483d      	ldr	r0, [pc, #244]	; (8000918 <main+0x378>)
- 8000822:	230a      	movs	r3, #10
- 8000824:	f003 f882 	bl	800392c <HAL_UART_Transmit>
+ 80006fe:	1d3b      	adds	r3, r7, #4
+ 8000700:	0018      	movs	r0, r3
+ 8000702:	f7ff fd01 	bl	8000108 <strlen>
+ 8000706:	0003      	movs	r3, r0
+ 8000708:	b29a      	uxth	r2, r3
+ 800070a:	1d39      	adds	r1, r7, #4
+ 800070c:	483a      	ldr	r0, [pc, #232]	; (80007f8 <main+0x32c>)
+ 800070e:	230a      	movs	r3, #10
+ 8000710:	f002 ffc6 	bl	80036a0 <HAL_UART_Transmit>
 	            	  sprintf(buffer, "Fix %d ", data[0]);
- 8000828:	193b      	adds	r3, r7, r4
- 800082a:	781b      	ldrb	r3, [r3, #0]
- 800082c:	001a      	movs	r2, r3
- 800082e:	4941      	ldr	r1, [pc, #260]	; (8000934 <main+0x394>)
- 8000830:	003b      	movs	r3, r7
- 8000832:	0018      	movs	r0, r3
- 8000834:	f004 fbfc 	bl	8005030 <siprintf>
+ 8000714:	193b      	adds	r3, r7, r4
+ 8000716:	781b      	ldrb	r3, [r3, #0]
+ 8000718:	001a      	movs	r2, r3
+ 800071a:	493d      	ldr	r1, [pc, #244]	; (8000810 <main+0x344>)
+ 800071c:	1d3b      	adds	r3, r7, #4
+ 800071e:	0018      	movs	r0, r3
+ 8000720:	f003 fdf2 	bl	8004308 <siprintf>
 	            	  HAL_UART_Transmit(&huart1, (uint8_t*)&buffer, strlen(buffer),10);
- 8000838:	003b      	movs	r3, r7
- 800083a:	0018      	movs	r0, r3
- 800083c:	f7ff fc64 	bl	8000108 <strlen>
- 8000840:	0003      	movs	r3, r0
- 8000842:	b29a      	uxth	r2, r3
- 8000844:	0039      	movs	r1, r7
- 8000846:	4834      	ldr	r0, [pc, #208]	; (8000918 <main+0x378>)
- 8000848:	230a      	movs	r3, #10
- 800084a:	f003 f86f 	bl	800392c <HAL_UART_Transmit>
+ 8000724:	1d3b      	adds	r3, r7, #4
+ 8000726:	0018      	movs	r0, r3
+ 8000728:	f7ff fcee 	bl	8000108 <strlen>
+ 800072c:	0003      	movs	r3, r0
+ 800072e:	b29a      	uxth	r2, r3
+ 8000730:	1d39      	adds	r1, r7, #4
+ 8000732:	4831      	ldr	r0, [pc, #196]	; (80007f8 <main+0x32c>)
+ 8000734:	230a      	movs	r3, #10
+ 8000736:	f002 ffb3 	bl	80036a0 <HAL_UART_Transmit>
 	            	  	 satcount=0;
- 800084e:	2361      	movs	r3, #97	; 0x61
- 8000850:	18fb      	adds	r3, r7, r3
- 8000852:	2200      	movs	r2, #0
- 8000854:	701a      	strb	r2, [r3, #0]
+ 800073a:	2369      	movs	r3, #105	; 0x69
+ 800073c:	18fb      	adds	r3, r7, r3
+ 800073e:	2200      	movs	r2, #0
+ 8000740:	701a      	strb	r2, [r3, #0]
 	            	  for(uint8_t i = 0; i<12; i++){
- 8000856:	2360      	movs	r3, #96	; 0x60
- 8000858:	18fb      	adds	r3, r7, r3
- 800085a:	2200      	movs	r2, #0
- 800085c:	701a      	strb	r2, [r3, #0]
- 800085e:	e014      	b.n	800088a <main+0x2ea>
+ 8000742:	2368      	movs	r3, #104	; 0x68
+ 8000744:	18fb      	adds	r3, r7, r3
+ 8000746:	2200      	movs	r2, #0
+ 8000748:	701a      	strb	r2, [r3, #0]
+ 800074a:	e014      	b.n	8000776 <main+0x2aa>
 	            		  if(data[24+i]>0){
- 8000860:	2360      	movs	r3, #96	; 0x60
- 8000862:	18fb      	adds	r3, r7, r3
- 8000864:	781b      	ldrb	r3, [r3, #0]
- 8000866:	3318      	adds	r3, #24
- 8000868:	2214      	movs	r2, #20
- 800086a:	18ba      	adds	r2, r7, r2
- 800086c:	5cd3      	ldrb	r3, [r2, r3]
- 800086e:	2b00      	cmp	r3, #0
- 8000870:	d005      	beq.n	800087e <main+0x2de>
+ 800074c:	2368      	movs	r3, #104	; 0x68
+ 800074e:	18fb      	adds	r3, r7, r3
+ 8000750:	781b      	ldrb	r3, [r3, #0]
+ 8000752:	3318      	adds	r3, #24
+ 8000754:	2218      	movs	r2, #24
+ 8000756:	18ba      	adds	r2, r7, r2
+ 8000758:	5cd3      	ldrb	r3, [r2, r3]
+ 800075a:	2b00      	cmp	r3, #0
+ 800075c:	d005      	beq.n	800076a <main+0x29e>
 	            			  satcount++;
- 8000872:	2161      	movs	r1, #97	; 0x61
- 8000874:	187b      	adds	r3, r7, r1
- 8000876:	781a      	ldrb	r2, [r3, #0]
- 8000878:	187b      	adds	r3, r7, r1
- 800087a:	3201      	adds	r2, #1
- 800087c:	701a      	strb	r2, [r3, #0]
+ 800075e:	2169      	movs	r1, #105	; 0x69
+ 8000760:	187b      	adds	r3, r7, r1
+ 8000762:	781a      	ldrb	r2, [r3, #0]
+ 8000764:	187b      	adds	r3, r7, r1
+ 8000766:	3201      	adds	r2, #1
+ 8000768:	701a      	strb	r2, [r3, #0]
 	            	  for(uint8_t i = 0; i<12; i++){
- 800087e:	2160      	movs	r1, #96	; 0x60
- 8000880:	187b      	adds	r3, r7, r1
- 8000882:	781a      	ldrb	r2, [r3, #0]
- 8000884:	187b      	adds	r3, r7, r1
- 8000886:	3201      	adds	r2, #1
- 8000888:	701a      	strb	r2, [r3, #0]
- 800088a:	2360      	movs	r3, #96	; 0x60
- 800088c:	18fb      	adds	r3, r7, r3
- 800088e:	781b      	ldrb	r3, [r3, #0]
- 8000890:	2b0b      	cmp	r3, #11
- 8000892:	d9e5      	bls.n	8000860 <main+0x2c0>
+ 800076a:	2168      	movs	r1, #104	; 0x68
+ 800076c:	187b      	adds	r3, r7, r1
+ 800076e:	781a      	ldrb	r2, [r3, #0]
+ 8000770:	187b      	adds	r3, r7, r1
+ 8000772:	3201      	adds	r2, #1
+ 8000774:	701a      	strb	r2, [r3, #0]
+ 8000776:	2368      	movs	r3, #104	; 0x68
+ 8000778:	18fb      	adds	r3, r7, r3
+ 800077a:	781b      	ldrb	r3, [r3, #0]
+ 800077c:	2b0b      	cmp	r3, #11
+ 800077e:	d9e5      	bls.n	800074c <main+0x280>
 	            		  }
 	            	  }
 	            	  sprintf(buffer, "Sat %d ", satcount);
- 8000894:	2361      	movs	r3, #97	; 0x61
- 8000896:	18fb      	adds	r3, r7, r3
- 8000898:	781a      	ldrb	r2, [r3, #0]
- 800089a:	4927      	ldr	r1, [pc, #156]	; (8000938 <main+0x398>)
- 800089c:	003b      	movs	r3, r7
- 800089e:	0018      	movs	r0, r3
- 80008a0:	f004 fbc6 	bl	8005030 <siprintf>
+ 8000780:	2369      	movs	r3, #105	; 0x69
+ 8000782:	18fb      	adds	r3, r7, r3
+ 8000784:	781a      	ldrb	r2, [r3, #0]
+ 8000786:	4923      	ldr	r1, [pc, #140]	; (8000814 <main+0x348>)
+ 8000788:	1d3b      	adds	r3, r7, #4
+ 800078a:	0018      	movs	r0, r3
+ 800078c:	f003 fdbc 	bl	8004308 <siprintf>
 	            	  HAL_UART_Transmit(&huart1, (uint8_t*)&buffer, strlen(buffer),10);
- 80008a4:	003b      	movs	r3, r7
- 80008a6:	0018      	movs	r0, r3
- 80008a8:	f7ff fc2e 	bl	8000108 <strlen>
- 80008ac:	0003      	movs	r3, r0
- 80008ae:	b29a      	uxth	r2, r3
- 80008b0:	0039      	movs	r1, r7
- 80008b2:	4819      	ldr	r0, [pc, #100]	; (8000918 <main+0x378>)
- 80008b4:	230a      	movs	r3, #10
- 80008b6:	f003 f839 	bl	800392c <HAL_UART_Transmit>
+ 8000790:	1d3b      	adds	r3, r7, #4
+ 8000792:	0018      	movs	r0, r3
+ 8000794:	f7ff fcb8 	bl	8000108 <strlen>
+ 8000798:	0003      	movs	r3, r0
+ 800079a:	b29a      	uxth	r2, r3
+ 800079c:	1d39      	adds	r1, r7, #4
+ 800079e:	4816      	ldr	r0, [pc, #88]	; (80007f8 <main+0x32c>)
+ 80007a0:	230a      	movs	r3, #10
+ 80007a2:	f002 ff7d 	bl	80036a0 <HAL_UART_Transmit>
 
 	            	  HAL_UART_Transmit(&huart1, (uint8_t*)&"\r\n", 2,10);
- 80008ba:	4920      	ldr	r1, [pc, #128]	; (800093c <main+0x39c>)
- 80008bc:	4816      	ldr	r0, [pc, #88]	; (8000918 <main+0x378>)
- 80008be:	230a      	movs	r3, #10
- 80008c0:	2202      	movs	r2, #2
- 80008c2:	f003 f833 	bl	800392c <HAL_UART_Transmit>
+ 80007a6:	491c      	ldr	r1, [pc, #112]	; (8000818 <main+0x34c>)
+ 80007a8:	4813      	ldr	r0, [pc, #76]	; (80007f8 <main+0x32c>)
+ 80007aa:	230a      	movs	r3, #10
+ 80007ac:	2202      	movs	r2, #2
+ 80007ae:	f002 ff77 	bl	80036a0 <HAL_UART_Transmit>
 
 	     	          HAL_GPIO_TogglePin (LED_GPIO_Port, LED_Pin);
- 80008c6:	2380      	movs	r3, #128	; 0x80
- 80008c8:	01db      	lsls	r3, r3, #7
- 80008ca:	4a10      	ldr	r2, [pc, #64]	; (800090c <main+0x36c>)
- 80008cc:	0019      	movs	r1, r3
- 80008ce:	0010      	movs	r0, r2
- 80008d0:	f001 fc49 	bl	8002166 <HAL_GPIO_TogglePin>
+ 80007b2:	2380      	movs	r3, #128	; 0x80
+ 80007b4:	01db      	lsls	r3, r3, #7
+ 80007b6:	4a0d      	ldr	r2, [pc, #52]	; (80007ec <main+0x320>)
+ 80007b8:	0019      	movs	r1, r3
+ 80007ba:	0010      	movs	r0, r2
+ 80007bc:	f001 fb8d 	bl	8001eda <HAL_GPIO_TogglePin>
 	                }
 	           }
 
 	        	preambule = (preambule << 8) | onebyte[0];
- 80008d4:	6e7b      	ldr	r3, [r7, #100]	; 0x64
- 80008d6:	021b      	lsls	r3, r3, #8
- 80008d8:	4a10      	ldr	r2, [pc, #64]	; (800091c <main+0x37c>)
- 80008da:	7812      	ldrb	r2, [r2, #0]
- 80008dc:	4313      	orrs	r3, r2
- 80008de:	667b      	str	r3, [r7, #100]	; 0x64
+ 80007c0:	6efb      	ldr	r3, [r7, #108]	; 0x6c
+ 80007c2:	021b      	lsls	r3, r3, #8
+ 80007c4:	2254      	movs	r2, #84	; 0x54
+ 80007c6:	18ba      	adds	r2, r7, r2
+ 80007c8:	7812      	ldrb	r2, [r2, #0]
+ 80007ca:	4313      	orrs	r3, r2
+ 80007cc:	66fb      	str	r3, [r7, #108]	; 0x6c
 
 	            if (preambule == 0xAAAAAA03){
- 80008e0:	6e7b      	ldr	r3, [r7, #100]	; 0x64
- 80008e2:	4a17      	ldr	r2, [pc, #92]	; (8000940 <main+0x3a0>)
- 80008e4:	4293      	cmp	r3, r2
- 80008e6:	d000      	beq.n	80008ea <main+0x34a>
- 80008e8:	e6ea      	b.n	80006c0 <main+0x120>
+ 80007ce:	6efb      	ldr	r3, [r7, #108]	; 0x6c
+ 80007d0:	4a12      	ldr	r2, [pc, #72]	; (800081c <main+0x350>)
+ 80007d2:	4293      	cmp	r3, r2
+ 80007d4:	d000      	beq.n	80007d8 <main+0x30c>
+ 80007d6:	e6f3      	b.n	80005c0 <main+0xf4>
 	              //  HAL_UART_Transmit(&huart1, "!!!", 3,10);
 	                dt = 1;
- 80008ea:	2363      	movs	r3, #99	; 0x63
- 80008ec:	18fb      	adds	r3, r7, r3
- 80008ee:	2201      	movs	r2, #1
- 80008f0:	701a      	strb	r2, [r3, #0]
+ 80007d8:	236b      	movs	r3, #107	; 0x6b
+ 80007da:	18fb      	adds	r3, r7, r3
+ 80007dc:	2201      	movs	r2, #1
+ 80007de:	701a      	strb	r2, [r3, #0]
 	                count = 0;
- 80008f2:	2362      	movs	r3, #98	; 0x62
- 80008f4:	18fb      	adds	r3, r7, r3
- 80008f6:	2200      	movs	r2, #0
- 80008f8:	701a      	strb	r2, [r3, #0]
-	  	  	HAL_Delay(500);
- 80008fa:	e6e1      	b.n	80006c0 <main+0x120>
- 80008fc:	00002022 	.word	0x00002022
- 8000900:	007418af 	.word	0x007418af
- 8000904:	03c4204c 	.word	0x03c4204c
- 8000908:	000df0cd 	.word	0x000df0cd
- 800090c:	50000800 	.word	0x50000800
- 8000910:	50000400 	.word	0x50000400
- 8000914:	08005994 	.word	0x08005994
- 8000918:	2000015c 	.word	0x2000015c
- 800091c:	200002c4 	.word	0x200002c4
- 8000920:	200002c5 	.word	0x200002c5
- 8000924:	0800599c 	.word	0x0800599c
- 8000928:	080059a4 	.word	0x080059a4
- 800092c:	080059b0 	.word	0x080059b0
- 8000930:	080059b8 	.word	0x080059b8
- 8000934:	080059c4 	.word	0x080059c4
- 8000938:	080059cc 	.word	0x080059cc
- 800093c:	080059d4 	.word	0x080059d4
- 8000940:	aaaaaa03 	.word	0xaaaaaa03
+ 80007e0:	236a      	movs	r3, #106	; 0x6a
+ 80007e2:	18fb      	adds	r3, r7, r3
+ 80007e4:	2200      	movs	r2, #0
+ 80007e6:	701a      	strb	r2, [r3, #0]
+	        if(HAL_OK == HAL_UART_Receive(&hlpuart1, onebyte, 1, 100))
+ 80007e8:	e6ea      	b.n	80005c0 <main+0xf4>
+ 80007ea:	46c0      	nop			; (mov r8, r8)
+ 80007ec:	50000800 	.word	0x50000800
+ 80007f0:	50000400 	.word	0x50000400
+ 80007f4:	08004c6c 	.word	0x08004c6c
+ 80007f8:	2000015c 	.word	0x2000015c
+ 80007fc:	200000d4 	.word	0x200000d4
+ 8000800:	08004c74 	.word	0x08004c74
+ 8000804:	08004c7c 	.word	0x08004c7c
+ 8000808:	08004c88 	.word	0x08004c88
+ 800080c:	08004c90 	.word	0x08004c90
+ 8000810:	08004c9c 	.word	0x08004c9c
+ 8000814:	08004ca4 	.word	0x08004ca4
+ 8000818:	08004cac 	.word	0x08004cac
+ 800081c:	aaaaaa03 	.word	0xaaaaaa03
 
-08000944 <SystemClock_Config>:
+08000820 <SystemClock_Config>:
 /**
   * @brief System Clock Configuration
   * @retval None
   */
 void SystemClock_Config(void)
 {
- 8000944:	b590      	push	{r4, r7, lr}
- 8000946:	b09b      	sub	sp, #108	; 0x6c
- 8000948:	af00      	add	r7, sp, #0
+ 8000820:	b590      	push	{r4, r7, lr}
+ 8000822:	b09b      	sub	sp, #108	; 0x6c
+ 8000824:	af00      	add	r7, sp, #0
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 800094a:	2434      	movs	r4, #52	; 0x34
- 800094c:	193b      	adds	r3, r7, r4
- 800094e:	0018      	movs	r0, r3
- 8000950:	2334      	movs	r3, #52	; 0x34
- 8000952:	001a      	movs	r2, r3
- 8000954:	2100      	movs	r1, #0
- 8000956:	f004 fb8b 	bl	8005070 <memset>
+ 8000826:	2434      	movs	r4, #52	; 0x34
+ 8000828:	193b      	adds	r3, r7, r4
+ 800082a:	0018      	movs	r0, r3
+ 800082c:	2334      	movs	r3, #52	; 0x34
+ 800082e:	001a      	movs	r2, r3
+ 8000830:	2100      	movs	r1, #0
+ 8000832:	f003 fd89 	bl	8004348 <memset>
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 800095a:	2320      	movs	r3, #32
- 800095c:	18fb      	adds	r3, r7, r3
- 800095e:	0018      	movs	r0, r3
- 8000960:	2314      	movs	r3, #20
- 8000962:	001a      	movs	r2, r3
- 8000964:	2100      	movs	r1, #0
- 8000966:	f004 fb83 	bl	8005070 <memset>
+ 8000836:	2320      	movs	r3, #32
+ 8000838:	18fb      	adds	r3, r7, r3
+ 800083a:	0018      	movs	r0, r3
+ 800083c:	2314      	movs	r3, #20
+ 800083e:	001a      	movs	r2, r3
+ 8000840:	2100      	movs	r1, #0
+ 8000842:	f003 fd81 	bl	8004348 <memset>
   RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
- 800096a:	1d3b      	adds	r3, r7, #4
- 800096c:	0018      	movs	r0, r3
- 800096e:	231c      	movs	r3, #28
- 8000970:	001a      	movs	r2, r3
- 8000972:	2100      	movs	r1, #0
- 8000974:	f004 fb7c 	bl	8005070 <memset>
+ 8000846:	1d3b      	adds	r3, r7, #4
+ 8000848:	0018      	movs	r0, r3
+ 800084a:	231c      	movs	r3, #28
+ 800084c:	001a      	movs	r2, r3
+ 800084e:	2100      	movs	r1, #0
+ 8000850:	f003 fd7a 	bl	8004348 <memset>
 
   /** Configure the main internal regulator output voltage
   */
   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 8000978:	4b2e      	ldr	r3, [pc, #184]	; (8000a34 <SystemClock_Config+0xf0>)
- 800097a:	681b      	ldr	r3, [r3, #0]
- 800097c:	4a2e      	ldr	r2, [pc, #184]	; (8000a38 <SystemClock_Config+0xf4>)
- 800097e:	401a      	ands	r2, r3
- 8000980:	4b2c      	ldr	r3, [pc, #176]	; (8000a34 <SystemClock_Config+0xf0>)
- 8000982:	2180      	movs	r1, #128	; 0x80
- 8000984:	0109      	lsls	r1, r1, #4
- 8000986:	430a      	orrs	r2, r1
- 8000988:	601a      	str	r2, [r3, #0]
+ 8000854:	4b2e      	ldr	r3, [pc, #184]	; (8000910 <SystemClock_Config+0xf0>)
+ 8000856:	681b      	ldr	r3, [r3, #0]
+ 8000858:	4a2e      	ldr	r2, [pc, #184]	; (8000914 <SystemClock_Config+0xf4>)
+ 800085a:	401a      	ands	r2, r3
+ 800085c:	4b2c      	ldr	r3, [pc, #176]	; (8000910 <SystemClock_Config+0xf0>)
+ 800085e:	2180      	movs	r1, #128	; 0x80
+ 8000860:	0109      	lsls	r1, r1, #4
+ 8000862:	430a      	orrs	r2, r1
+ 8000864:	601a      	str	r2, [r3, #0]
 
   /** Initializes the RCC Oscillators according to the specified parameters
   * in the RCC_OscInitTypeDef structure.
   */
   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- 800098a:	0021      	movs	r1, r4
- 800098c:	187b      	adds	r3, r7, r1
- 800098e:	2201      	movs	r2, #1
- 8000990:	601a      	str	r2, [r3, #0]
+ 8000866:	0021      	movs	r1, r4
+ 8000868:	187b      	adds	r3, r7, r1
+ 800086a:	2201      	movs	r2, #1
+ 800086c:	601a      	str	r2, [r3, #0]
   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- 8000992:	187b      	adds	r3, r7, r1
- 8000994:	2280      	movs	r2, #128	; 0x80
- 8000996:	0252      	lsls	r2, r2, #9
- 8000998:	605a      	str	r2, [r3, #4]
+ 800086e:	187b      	adds	r3, r7, r1
+ 8000870:	2280      	movs	r2, #128	; 0x80
+ 8000872:	0252      	lsls	r2, r2, #9
+ 8000874:	605a      	str	r2, [r3, #4]
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 800099a:	187b      	adds	r3, r7, r1
- 800099c:	2202      	movs	r2, #2
- 800099e:	625a      	str	r2, [r3, #36]	; 0x24
+ 8000876:	187b      	adds	r3, r7, r1
+ 8000878:	2202      	movs	r2, #2
+ 800087a:	625a      	str	r2, [r3, #36]	; 0x24
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- 80009a0:	187b      	adds	r3, r7, r1
- 80009a2:	2280      	movs	r2, #128	; 0x80
- 80009a4:	0252      	lsls	r2, r2, #9
- 80009a6:	629a      	str	r2, [r3, #40]	; 0x28
+ 800087c:	187b      	adds	r3, r7, r1
+ 800087e:	2280      	movs	r2, #128	; 0x80
+ 8000880:	0252      	lsls	r2, r2, #9
+ 8000882:	629a      	str	r2, [r3, #40]	; 0x28
   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLLMUL_3;
- 80009a8:	187b      	adds	r3, r7, r1
- 80009aa:	2200      	movs	r2, #0
- 80009ac:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000884:	187b      	adds	r3, r7, r1
+ 8000886:	2200      	movs	r2, #0
+ 8000888:	62da      	str	r2, [r3, #44]	; 0x2c
   RCC_OscInitStruct.PLL.PLLDIV = RCC_PLLDIV_3;
- 80009ae:	187b      	adds	r3, r7, r1
- 80009b0:	2280      	movs	r2, #128	; 0x80
- 80009b2:	0412      	lsls	r2, r2, #16
- 80009b4:	631a      	str	r2, [r3, #48]	; 0x30
+ 800088a:	187b      	adds	r3, r7, r1
+ 800088c:	2280      	movs	r2, #128	; 0x80
+ 800088e:	0412      	lsls	r2, r2, #16
+ 8000890:	631a      	str	r2, [r3, #48]	; 0x30
   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 80009b6:	187b      	adds	r3, r7, r1
- 80009b8:	0018      	movs	r0, r3
- 80009ba:	f001 fbef 	bl	800219c <HAL_RCC_OscConfig>
- 80009be:	1e03      	subs	r3, r0, #0
- 80009c0:	d001      	beq.n	80009c6 <SystemClock_Config+0x82>
+ 8000892:	187b      	adds	r3, r7, r1
+ 8000894:	0018      	movs	r0, r3
+ 8000896:	f001 fb3b 	bl	8001f10 <HAL_RCC_OscConfig>
+ 800089a:	1e03      	subs	r3, r0, #0
+ 800089c:	d001      	beq.n	80008a2 <SystemClock_Config+0x82>
   {
     Error_Handler();
- 80009c2:	f000 fad7 	bl	8000f74 <Error_Handler>
+ 800089e:	f000 fabf 	bl	8000e20 <Error_Handler>
   }
 
   /** Initializes the CPU, AHB and APB buses clocks
   */
   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- 80009c6:	2120      	movs	r1, #32
- 80009c8:	187b      	adds	r3, r7, r1
- 80009ca:	220f      	movs	r2, #15
- 80009cc:	601a      	str	r2, [r3, #0]
+ 80008a2:	2120      	movs	r1, #32
+ 80008a4:	187b      	adds	r3, r7, r1
+ 80008a6:	220f      	movs	r2, #15
+ 80008a8:	601a      	str	r2, [r3, #0]
                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- 80009ce:	187b      	adds	r3, r7, r1
- 80009d0:	2203      	movs	r2, #3
- 80009d2:	605a      	str	r2, [r3, #4]
+ 80008aa:	187b      	adds	r3, r7, r1
+ 80008ac:	2203      	movs	r2, #3
+ 80008ae:	605a      	str	r2, [r3, #4]
   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 80009d4:	187b      	adds	r3, r7, r1
- 80009d6:	2200      	movs	r2, #0
- 80009d8:	609a      	str	r2, [r3, #8]
+ 80008b0:	187b      	adds	r3, r7, r1
+ 80008b2:	2200      	movs	r2, #0
+ 80008b4:	609a      	str	r2, [r3, #8]
   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
- 80009da:	187b      	adds	r3, r7, r1
- 80009dc:	2200      	movs	r2, #0
- 80009de:	60da      	str	r2, [r3, #12]
+ 80008b6:	187b      	adds	r3, r7, r1
+ 80008b8:	2200      	movs	r2, #0
+ 80008ba:	60da      	str	r2, [r3, #12]
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
- 80009e0:	187b      	adds	r3, r7, r1
- 80009e2:	2200      	movs	r2, #0
- 80009e4:	611a      	str	r2, [r3, #16]
+ 80008bc:	187b      	adds	r3, r7, r1
+ 80008be:	2200      	movs	r2, #0
+ 80008c0:	611a      	str	r2, [r3, #16]
 
   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
- 80009e6:	187b      	adds	r3, r7, r1
- 80009e8:	2100      	movs	r1, #0
- 80009ea:	0018      	movs	r0, r3
- 80009ec:	f001 ff40 	bl	8002870 <HAL_RCC_ClockConfig>
- 80009f0:	1e03      	subs	r3, r0, #0
- 80009f2:	d001      	beq.n	80009f8 <SystemClock_Config+0xb4>
+ 80008c2:	187b      	adds	r3, r7, r1
+ 80008c4:	2100      	movs	r1, #0
+ 80008c6:	0018      	movs	r0, r3
+ 80008c8:	f001 fe8c 	bl	80025e4 <HAL_RCC_ClockConfig>
+ 80008cc:	1e03      	subs	r3, r0, #0
+ 80008ce:	d001      	beq.n	80008d4 <SystemClock_Config+0xb4>
   {
     Error_Handler();
- 80009f4:	f000 fabe 	bl	8000f74 <Error_Handler>
+ 80008d0:	f000 faa6 	bl	8000e20 <Error_Handler>
   }
   PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_LPUART1;
- 80009f8:	1d3b      	adds	r3, r7, #4
- 80009fa:	2205      	movs	r2, #5
- 80009fc:	601a      	str	r2, [r3, #0]
+ 80008d4:	1d3b      	adds	r3, r7, #4
+ 80008d6:	2205      	movs	r2, #5
+ 80008d8:	601a      	str	r2, [r3, #0]
   PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
- 80009fe:	1d3b      	adds	r3, r7, #4
- 8000a00:	2200      	movs	r2, #0
- 8000a02:	609a      	str	r2, [r3, #8]
+ 80008da:	1d3b      	adds	r3, r7, #4
+ 80008dc:	2200      	movs	r2, #0
+ 80008de:	609a      	str	r2, [r3, #8]
   PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
- 8000a04:	1d3b      	adds	r3, r7, #4
- 8000a06:	2200      	movs	r2, #0
- 8000a08:	611a      	str	r2, [r3, #16]
+ 80008e0:	1d3b      	adds	r3, r7, #4
+ 80008e2:	2200      	movs	r2, #0
+ 80008e4:	611a      	str	r2, [r3, #16]
   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
- 8000a0a:	1d3b      	adds	r3, r7, #4
- 8000a0c:	0018      	movs	r0, r3
- 8000a0e:	f002 fa01 	bl	8002e14 <HAL_RCCEx_PeriphCLKConfig>
- 8000a12:	1e03      	subs	r3, r0, #0
- 8000a14:	d001      	beq.n	8000a1a <SystemClock_Config+0xd6>
+ 80008e6:	1d3b      	adds	r3, r7, #4
+ 80008e8:	0018      	movs	r0, r3
+ 80008ea:	f002 f94d 	bl	8002b88 <HAL_RCCEx_PeriphCLKConfig>
+ 80008ee:	1e03      	subs	r3, r0, #0
+ 80008f0:	d001      	beq.n	80008f6 <SystemClock_Config+0xd6>
   {
     Error_Handler();
- 8000a16:	f000 faad 	bl	8000f74 <Error_Handler>
+ 80008f2:	f000 fa95 	bl	8000e20 <Error_Handler>
   }
   HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1);
- 8000a1a:	2380      	movs	r3, #128	; 0x80
- 8000a1c:	045b      	lsls	r3, r3, #17
- 8000a1e:	2200      	movs	r2, #0
- 8000a20:	0019      	movs	r1, r3
- 8000a22:	2000      	movs	r0, #0
- 8000a24:	f002 f86c 	bl	8002b00 <HAL_RCC_MCOConfig>
+ 80008f6:	2380      	movs	r3, #128	; 0x80
+ 80008f8:	045b      	lsls	r3, r3, #17
+ 80008fa:	2200      	movs	r2, #0
+ 80008fc:	0019      	movs	r1, r3
+ 80008fe:	2000      	movs	r0, #0
+ 8000900:	f001 ffb8 	bl	8002874 <HAL_RCC_MCOConfig>
 
   /** Enables the Clock Security System
   */
   HAL_RCC_EnableCSS();
- 8000a28:	f002 f8ee 	bl	8002c08 <HAL_RCC_EnableCSS>
+ 8000904:	f002 f83a 	bl	800297c <HAL_RCC_EnableCSS>
 }
- 8000a2c:	46c0      	nop			; (mov r8, r8)
- 8000a2e:	46bd      	mov	sp, r7
- 8000a30:	b01b      	add	sp, #108	; 0x6c
- 8000a32:	bd90      	pop	{r4, r7, pc}
- 8000a34:	40007000 	.word	0x40007000
- 8000a38:	ffffe7ff 	.word	0xffffe7ff
+ 8000908:	46c0      	nop			; (mov r8, r8)
+ 800090a:	46bd      	mov	sp, r7
+ 800090c:	b01b      	add	sp, #108	; 0x6c
+ 800090e:	bd90      	pop	{r4, r7, pc}
+ 8000910:	40007000 	.word	0x40007000
+ 8000914:	ffffe7ff 	.word	0xffffe7ff
 
-08000a3c <MX_ADC_Init>:
+08000918 <MX_ADC_Init>:
   * @brief ADC Initialization Function
   * @param None
   * @retval None
   */
 static void MX_ADC_Init(void)
 {
- 8000a3c:	b580      	push	{r7, lr}
- 8000a3e:	b082      	sub	sp, #8
- 8000a40:	af00      	add	r7, sp, #0
+ 8000918:	b580      	push	{r7, lr}
+ 800091a:	b082      	sub	sp, #8
+ 800091c:	af00      	add	r7, sp, #0
 
   /* USER CODE BEGIN ADC_Init 0 */
 
   /* USER CODE END ADC_Init 0 */
 
   ADC_ChannelConfTypeDef sConfig = {0};
- 8000a42:	003b      	movs	r3, r7
- 8000a44:	0018      	movs	r0, r3
- 8000a46:	2308      	movs	r3, #8
- 8000a48:	001a      	movs	r2, r3
- 8000a4a:	2100      	movs	r1, #0
- 8000a4c:	f004 fb10 	bl	8005070 <memset>
+ 800091e:	003b      	movs	r3, r7
+ 8000920:	0018      	movs	r0, r3
+ 8000922:	2308      	movs	r3, #8
+ 8000924:	001a      	movs	r2, r3
+ 8000926:	2100      	movs	r1, #0
+ 8000928:	f003 fd0e 	bl	8004348 <memset>
 
   /* USER CODE END ADC_Init 1 */
 
   /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
   */
   hadc.Instance = ADC1;
- 8000a50:	4b37      	ldr	r3, [pc, #220]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a52:	4a38      	ldr	r2, [pc, #224]	; (8000b34 <MX_ADC_Init+0xf8>)
- 8000a54:	601a      	str	r2, [r3, #0]
+ 800092c:	4b37      	ldr	r3, [pc, #220]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 800092e:	4a38      	ldr	r2, [pc, #224]	; (8000a10 <MX_ADC_Init+0xf8>)
+ 8000930:	601a      	str	r2, [r3, #0]
   hadc.Init.OversamplingMode = DISABLE;
- 8000a56:	4b36      	ldr	r3, [pc, #216]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a58:	2200      	movs	r2, #0
- 8000a5a:	63da      	str	r2, [r3, #60]	; 0x3c
+ 8000932:	4b36      	ldr	r3, [pc, #216]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 8000934:	2200      	movs	r2, #0
+ 8000936:	63da      	str	r2, [r3, #60]	; 0x3c
   hadc.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV1;
- 8000a5c:	4b34      	ldr	r3, [pc, #208]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a5e:	22c0      	movs	r2, #192	; 0xc0
- 8000a60:	0612      	lsls	r2, r2, #24
- 8000a62:	605a      	str	r2, [r3, #4]
+ 8000938:	4b34      	ldr	r3, [pc, #208]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 800093a:	22c0      	movs	r2, #192	; 0xc0
+ 800093c:	0612      	lsls	r2, r2, #24
+ 800093e:	605a      	str	r2, [r3, #4]
   hadc.Init.Resolution = ADC_RESOLUTION_12B;
- 8000a64:	4b32      	ldr	r3, [pc, #200]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a66:	2200      	movs	r2, #0
- 8000a68:	609a      	str	r2, [r3, #8]
+ 8000940:	4b32      	ldr	r3, [pc, #200]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 8000942:	2200      	movs	r2, #0
+ 8000944:	609a      	str	r2, [r3, #8]
   hadc.Init.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
- 8000a6a:	4b31      	ldr	r3, [pc, #196]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a6c:	2200      	movs	r2, #0
- 8000a6e:	639a      	str	r2, [r3, #56]	; 0x38
+ 8000946:	4b31      	ldr	r3, [pc, #196]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 8000948:	2200      	movs	r2, #0
+ 800094a:	639a      	str	r2, [r3, #56]	; 0x38
   hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD;
- 8000a70:	4b2f      	ldr	r3, [pc, #188]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a72:	2201      	movs	r2, #1
- 8000a74:	611a      	str	r2, [r3, #16]
+ 800094c:	4b2f      	ldr	r3, [pc, #188]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 800094e:	2201      	movs	r2, #1
+ 8000950:	611a      	str	r2, [r3, #16]
   hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- 8000a76:	4b2e      	ldr	r3, [pc, #184]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a78:	2200      	movs	r2, #0
- 8000a7a:	60da      	str	r2, [r3, #12]
+ 8000952:	4b2e      	ldr	r3, [pc, #184]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 8000954:	2200      	movs	r2, #0
+ 8000956:	60da      	str	r2, [r3, #12]
   hadc.Init.ContinuousConvMode = DISABLE;
- 8000a7c:	4b2c      	ldr	r3, [pc, #176]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a7e:	2220      	movs	r2, #32
- 8000a80:	2100      	movs	r1, #0
- 8000a82:	5499      	strb	r1, [r3, r2]
+ 8000958:	4b2c      	ldr	r3, [pc, #176]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 800095a:	2220      	movs	r2, #32
+ 800095c:	2100      	movs	r1, #0
+ 800095e:	5499      	strb	r1, [r3, r2]
   hadc.Init.DiscontinuousConvMode = DISABLE;
- 8000a84:	4b2a      	ldr	r3, [pc, #168]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a86:	2221      	movs	r2, #33	; 0x21
- 8000a88:	2100      	movs	r1, #0
- 8000a8a:	5499      	strb	r1, [r3, r2]
+ 8000960:	4b2a      	ldr	r3, [pc, #168]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 8000962:	2221      	movs	r2, #33	; 0x21
+ 8000964:	2100      	movs	r1, #0
+ 8000966:	5499      	strb	r1, [r3, r2]
   hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- 8000a8c:	4b28      	ldr	r3, [pc, #160]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a8e:	2200      	movs	r2, #0
- 8000a90:	629a      	str	r2, [r3, #40]	; 0x28
+ 8000968:	4b28      	ldr	r3, [pc, #160]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 800096a:	2200      	movs	r2, #0
+ 800096c:	629a      	str	r2, [r3, #40]	; 0x28
   hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- 8000a92:	4b27      	ldr	r3, [pc, #156]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a94:	22c2      	movs	r2, #194	; 0xc2
- 8000a96:	32ff      	adds	r2, #255	; 0xff
- 8000a98:	625a      	str	r2, [r3, #36]	; 0x24
+ 800096e:	4b27      	ldr	r3, [pc, #156]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 8000970:	22c2      	movs	r2, #194	; 0xc2
+ 8000972:	32ff      	adds	r2, #255	; 0xff
+ 8000974:	625a      	str	r2, [r3, #36]	; 0x24
   hadc.Init.DMAContinuousRequests = DISABLE;
- 8000a9a:	4b25      	ldr	r3, [pc, #148]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000a9c:	222c      	movs	r2, #44	; 0x2c
- 8000a9e:	2100      	movs	r1, #0
- 8000aa0:	5499      	strb	r1, [r3, r2]
+ 8000976:	4b25      	ldr	r3, [pc, #148]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 8000978:	222c      	movs	r2, #44	; 0x2c
+ 800097a:	2100      	movs	r1, #0
+ 800097c:	5499      	strb	r1, [r3, r2]
   hadc.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- 8000aa2:	4b23      	ldr	r3, [pc, #140]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000aa4:	2204      	movs	r2, #4
- 8000aa6:	615a      	str	r2, [r3, #20]
+ 800097e:	4b23      	ldr	r3, [pc, #140]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 8000980:	2204      	movs	r2, #4
+ 8000982:	615a      	str	r2, [r3, #20]
   hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED;
- 8000aa8:	4b21      	ldr	r3, [pc, #132]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000aaa:	2200      	movs	r2, #0
- 8000aac:	631a      	str	r2, [r3, #48]	; 0x30
+ 8000984:	4b21      	ldr	r3, [pc, #132]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 8000986:	2200      	movs	r2, #0
+ 8000988:	631a      	str	r2, [r3, #48]	; 0x30
   hadc.Init.LowPowerAutoWait = DISABLE;
- 8000aae:	4b20      	ldr	r3, [pc, #128]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000ab0:	2200      	movs	r2, #0
- 8000ab2:	619a      	str	r2, [r3, #24]
+ 800098a:	4b20      	ldr	r3, [pc, #128]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 800098c:	2200      	movs	r2, #0
+ 800098e:	619a      	str	r2, [r3, #24]
   hadc.Init.LowPowerFrequencyMode = DISABLE;
- 8000ab4:	4b1e      	ldr	r3, [pc, #120]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000ab6:	2200      	movs	r2, #0
- 8000ab8:	635a      	str	r2, [r3, #52]	; 0x34
+ 8000990:	4b1e      	ldr	r3, [pc, #120]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 8000992:	2200      	movs	r2, #0
+ 8000994:	635a      	str	r2, [r3, #52]	; 0x34
   hadc.Init.LowPowerAutoPowerOff = DISABLE;
- 8000aba:	4b1d      	ldr	r3, [pc, #116]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000abc:	2200      	movs	r2, #0
- 8000abe:	61da      	str	r2, [r3, #28]
+ 8000996:	4b1d      	ldr	r3, [pc, #116]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 8000998:	2200      	movs	r2, #0
+ 800099a:	61da      	str	r2, [r3, #28]
   if (HAL_ADC_Init(&hadc) != HAL_OK)
- 8000ac0:	4b1b      	ldr	r3, [pc, #108]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000ac2:	0018      	movs	r0, r3
- 8000ac4:	f000 fd16 	bl	80014f4 <HAL_ADC_Init>
- 8000ac8:	1e03      	subs	r3, r0, #0
- 8000aca:	d001      	beq.n	8000ad0 <MX_ADC_Init+0x94>
+ 800099c:	4b1b      	ldr	r3, [pc, #108]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 800099e:	0018      	movs	r0, r3
+ 80009a0:	f000 fcea 	bl	8001378 <HAL_ADC_Init>
+ 80009a4:	1e03      	subs	r3, r0, #0
+ 80009a6:	d001      	beq.n	80009ac <MX_ADC_Init+0x94>
   {
     Error_Handler();
- 8000acc:	f000 fa52 	bl	8000f74 <Error_Handler>
+ 80009a8:	f000 fa3a 	bl	8000e20 <Error_Handler>
   }
 
   /** Configure for the selected ADC regular channel to be converted.
   */
   sConfig.Channel = ADC_CHANNEL_9;
- 8000ad0:	003b      	movs	r3, r7
- 8000ad2:	4a19      	ldr	r2, [pc, #100]	; (8000b38 <MX_ADC_Init+0xfc>)
- 8000ad4:	601a      	str	r2, [r3, #0]
+ 80009ac:	003b      	movs	r3, r7
+ 80009ae:	4a19      	ldr	r2, [pc, #100]	; (8000a14 <MX_ADC_Init+0xfc>)
+ 80009b0:	601a      	str	r2, [r3, #0]
   sConfig.Rank = ADC_RANK_CHANNEL_NUMBER;
- 8000ad6:	003b      	movs	r3, r7
- 8000ad8:	2280      	movs	r2, #128	; 0x80
- 8000ada:	0152      	lsls	r2, r2, #5
- 8000adc:	605a      	str	r2, [r3, #4]
+ 80009b2:	003b      	movs	r3, r7
+ 80009b4:	2280      	movs	r2, #128	; 0x80
+ 80009b6:	0152      	lsls	r2, r2, #5
+ 80009b8:	605a      	str	r2, [r3, #4]
   if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
- 8000ade:	003a      	movs	r2, r7
- 8000ae0:	4b13      	ldr	r3, [pc, #76]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000ae2:	0011      	movs	r1, r2
- 8000ae4:	0018      	movs	r0, r3
- 8000ae6:	f000 fe79 	bl	80017dc <HAL_ADC_ConfigChannel>
- 8000aea:	1e03      	subs	r3, r0, #0
- 8000aec:	d001      	beq.n	8000af2 <MX_ADC_Init+0xb6>
+ 80009ba:	003a      	movs	r2, r7
+ 80009bc:	4b13      	ldr	r3, [pc, #76]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 80009be:	0011      	movs	r1, r2
+ 80009c0:	0018      	movs	r0, r3
+ 80009c2:	f000 fe4d 	bl	8001660 <HAL_ADC_ConfigChannel>
+ 80009c6:	1e03      	subs	r3, r0, #0
+ 80009c8:	d001      	beq.n	80009ce <MX_ADC_Init+0xb6>
   {
     Error_Handler();
- 8000aee:	f000 fa41 	bl	8000f74 <Error_Handler>
+ 80009ca:	f000 fa29 	bl	8000e20 <Error_Handler>
   }
 
   /** Configure for the selected ADC regular channel to be converted.
   */
   sConfig.Channel = ADC_CHANNEL_13;
- 8000af2:	003b      	movs	r3, r7
- 8000af4:	4a11      	ldr	r2, [pc, #68]	; (8000b3c <MX_ADC_Init+0x100>)
- 8000af6:	601a      	str	r2, [r3, #0]
+ 80009ce:	003b      	movs	r3, r7
+ 80009d0:	4a11      	ldr	r2, [pc, #68]	; (8000a18 <MX_ADC_Init+0x100>)
+ 80009d2:	601a      	str	r2, [r3, #0]
   if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
- 8000af8:	003a      	movs	r2, r7
- 8000afa:	4b0d      	ldr	r3, [pc, #52]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000afc:	0011      	movs	r1, r2
- 8000afe:	0018      	movs	r0, r3
- 8000b00:	f000 fe6c 	bl	80017dc <HAL_ADC_ConfigChannel>
- 8000b04:	1e03      	subs	r3, r0, #0
- 8000b06:	d001      	beq.n	8000b0c <MX_ADC_Init+0xd0>
+ 80009d4:	003a      	movs	r2, r7
+ 80009d6:	4b0d      	ldr	r3, [pc, #52]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 80009d8:	0011      	movs	r1, r2
+ 80009da:	0018      	movs	r0, r3
+ 80009dc:	f000 fe40 	bl	8001660 <HAL_ADC_ConfigChannel>
+ 80009e0:	1e03      	subs	r3, r0, #0
+ 80009e2:	d001      	beq.n	80009e8 <MX_ADC_Init+0xd0>
   {
     Error_Handler();
- 8000b08:	f000 fa34 	bl	8000f74 <Error_Handler>
+ 80009e4:	f000 fa1c 	bl	8000e20 <Error_Handler>
   }
 
   /** Configure for the selected ADC regular channel to be converted.
   */
   sConfig.Channel = ADC_CHANNEL_14;
- 8000b0c:	003b      	movs	r3, r7
- 8000b0e:	4a0c      	ldr	r2, [pc, #48]	; (8000b40 <MX_ADC_Init+0x104>)
- 8000b10:	601a      	str	r2, [r3, #0]
+ 80009e8:	003b      	movs	r3, r7
+ 80009ea:	4a0c      	ldr	r2, [pc, #48]	; (8000a1c <MX_ADC_Init+0x104>)
+ 80009ec:	601a      	str	r2, [r3, #0]
   if (HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
- 8000b12:	003a      	movs	r2, r7
- 8000b14:	4b06      	ldr	r3, [pc, #24]	; (8000b30 <MX_ADC_Init+0xf4>)
- 8000b16:	0011      	movs	r1, r2
- 8000b18:	0018      	movs	r0, r3
- 8000b1a:	f000 fe5f 	bl	80017dc <HAL_ADC_ConfigChannel>
- 8000b1e:	1e03      	subs	r3, r0, #0
- 8000b20:	d001      	beq.n	8000b26 <MX_ADC_Init+0xea>
+ 80009ee:	003a      	movs	r2, r7
+ 80009f0:	4b06      	ldr	r3, [pc, #24]	; (8000a0c <MX_ADC_Init+0xf4>)
+ 80009f2:	0011      	movs	r1, r2
+ 80009f4:	0018      	movs	r0, r3
+ 80009f6:	f000 fe33 	bl	8001660 <HAL_ADC_ConfigChannel>
+ 80009fa:	1e03      	subs	r3, r0, #0
+ 80009fc:	d001      	beq.n	8000a02 <MX_ADC_Init+0xea>
   {
     Error_Handler();
- 8000b22:	f000 fa27 	bl	8000f74 <Error_Handler>
+ 80009fe:	f000 fa0f 	bl	8000e20 <Error_Handler>
   }
   /* USER CODE BEGIN ADC_Init 2 */
 
   /* USER CODE END ADC_Init 2 */
 
 }
- 8000b26:	46c0      	nop			; (mov r8, r8)
- 8000b28:	46bd      	mov	sp, r7
- 8000b2a:	b002      	add	sp, #8
- 8000b2c:	bd80      	pop	{r7, pc}
- 8000b2e:	46c0      	nop			; (mov r8, r8)
- 8000b30:	20000078 	.word	0x20000078
- 8000b34:	40012400 	.word	0x40012400
- 8000b38:	24000200 	.word	0x24000200
- 8000b3c:	34002000 	.word	0x34002000
- 8000b40:	38004000 	.word	0x38004000
+ 8000a02:	46c0      	nop			; (mov r8, r8)
+ 8000a04:	46bd      	mov	sp, r7
+ 8000a06:	b002      	add	sp, #8
+ 8000a08:	bd80      	pop	{r7, pc}
+ 8000a0a:	46c0      	nop			; (mov r8, r8)
+ 8000a0c:	20000078 	.word	0x20000078
+ 8000a10:	40012400 	.word	0x40012400
+ 8000a14:	24000200 	.word	0x24000200
+ 8000a18:	34002000 	.word	0x34002000
+ 8000a1c:	38004000 	.word	0x38004000
 
-08000b44 <MX_LPUART1_UART_Init>:
+08000a20 <MX_LPUART1_UART_Init>:
   * @brief LPUART1 Initialization Function
   * @param None
   * @retval None
   */
 static void MX_LPUART1_UART_Init(void)
 {
- 8000b44:	b580      	push	{r7, lr}
- 8000b46:	af00      	add	r7, sp, #0
+ 8000a20:	b580      	push	{r7, lr}
+ 8000a22:	af00      	add	r7, sp, #0
   /* USER CODE END LPUART1_Init 0 */
 
   /* USER CODE BEGIN LPUART1_Init 1 */
 
   /* USER CODE END LPUART1_Init 1 */
   hlpuart1.Instance = LPUART1;
- 8000b48:	4b13      	ldr	r3, [pc, #76]	; (8000b98 <MX_LPUART1_UART_Init+0x54>)
- 8000b4a:	4a14      	ldr	r2, [pc, #80]	; (8000b9c <MX_LPUART1_UART_Init+0x58>)
- 8000b4c:	601a      	str	r2, [r3, #0]
+ 8000a24:	4b13      	ldr	r3, [pc, #76]	; (8000a74 <MX_LPUART1_UART_Init+0x54>)
+ 8000a26:	4a14      	ldr	r2, [pc, #80]	; (8000a78 <MX_LPUART1_UART_Init+0x58>)
+ 8000a28:	601a      	str	r2, [r3, #0]
   hlpuart1.Init.BaudRate = 38400;
- 8000b4e:	4b12      	ldr	r3, [pc, #72]	; (8000b98 <MX_LPUART1_UART_Init+0x54>)
- 8000b50:	2296      	movs	r2, #150	; 0x96
- 8000b52:	0212      	lsls	r2, r2, #8
- 8000b54:	605a      	str	r2, [r3, #4]
+ 8000a2a:	4b12      	ldr	r3, [pc, #72]	; (8000a74 <MX_LPUART1_UART_Init+0x54>)
+ 8000a2c:	2296      	movs	r2, #150	; 0x96
+ 8000a2e:	0212      	lsls	r2, r2, #8
+ 8000a30:	605a      	str	r2, [r3, #4]
   hlpuart1.Init.WordLength = UART_WORDLENGTH_8B;
- 8000b56:	4b10      	ldr	r3, [pc, #64]	; (8000b98 <MX_LPUART1_UART_Init+0x54>)
- 8000b58:	2200      	movs	r2, #0
- 8000b5a:	609a      	str	r2, [r3, #8]
+ 8000a32:	4b10      	ldr	r3, [pc, #64]	; (8000a74 <MX_LPUART1_UART_Init+0x54>)
+ 8000a34:	2200      	movs	r2, #0
+ 8000a36:	609a      	str	r2, [r3, #8]
   hlpuart1.Init.StopBits = UART_STOPBITS_1;
- 8000b5c:	4b0e      	ldr	r3, [pc, #56]	; (8000b98 <MX_LPUART1_UART_Init+0x54>)
- 8000b5e:	2200      	movs	r2, #0
- 8000b60:	60da      	str	r2, [r3, #12]
+ 8000a38:	4b0e      	ldr	r3, [pc, #56]	; (8000a74 <MX_LPUART1_UART_Init+0x54>)
+ 8000a3a:	2200      	movs	r2, #0
+ 8000a3c:	60da      	str	r2, [r3, #12]
   hlpuart1.Init.Parity = UART_PARITY_NONE;
- 8000b62:	4b0d      	ldr	r3, [pc, #52]	; (8000b98 <MX_LPUART1_UART_Init+0x54>)
- 8000b64:	2200      	movs	r2, #0
- 8000b66:	611a      	str	r2, [r3, #16]
+ 8000a3e:	4b0d      	ldr	r3, [pc, #52]	; (8000a74 <MX_LPUART1_UART_Init+0x54>)
+ 8000a40:	2200      	movs	r2, #0
+ 8000a42:	611a      	str	r2, [r3, #16]
   hlpuart1.Init.Mode = UART_MODE_TX_RX;
- 8000b68:	4b0b      	ldr	r3, [pc, #44]	; (8000b98 <MX_LPUART1_UART_Init+0x54>)
- 8000b6a:	220c      	movs	r2, #12
- 8000b6c:	615a      	str	r2, [r3, #20]
+ 8000a44:	4b0b      	ldr	r3, [pc, #44]	; (8000a74 <MX_LPUART1_UART_Init+0x54>)
+ 8000a46:	220c      	movs	r2, #12
+ 8000a48:	615a      	str	r2, [r3, #20]
   hlpuart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 8000b6e:	4b0a      	ldr	r3, [pc, #40]	; (8000b98 <MX_LPUART1_UART_Init+0x54>)
- 8000b70:	2200      	movs	r2, #0
- 8000b72:	619a      	str	r2, [r3, #24]
+ 8000a4a:	4b0a      	ldr	r3, [pc, #40]	; (8000a74 <MX_LPUART1_UART_Init+0x54>)
+ 8000a4c:	2200      	movs	r2, #0
+ 8000a4e:	619a      	str	r2, [r3, #24]
   hlpuart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 8000b74:	4b08      	ldr	r3, [pc, #32]	; (8000b98 <MX_LPUART1_UART_Init+0x54>)
- 8000b76:	2200      	movs	r2, #0
- 8000b78:	621a      	str	r2, [r3, #32]
+ 8000a50:	4b08      	ldr	r3, [pc, #32]	; (8000a74 <MX_LPUART1_UART_Init+0x54>)
+ 8000a52:	2200      	movs	r2, #0
+ 8000a54:	621a      	str	r2, [r3, #32]
   hlpuart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 8000b7a:	4b07      	ldr	r3, [pc, #28]	; (8000b98 <MX_LPUART1_UART_Init+0x54>)
- 8000b7c:	2200      	movs	r2, #0
- 8000b7e:	625a      	str	r2, [r3, #36]	; 0x24
+ 8000a56:	4b07      	ldr	r3, [pc, #28]	; (8000a74 <MX_LPUART1_UART_Init+0x54>)
+ 8000a58:	2200      	movs	r2, #0
+ 8000a5a:	625a      	str	r2, [r3, #36]	; 0x24
   if (HAL_UART_Init(&hlpuart1) != HAL_OK)
- 8000b80:	4b05      	ldr	r3, [pc, #20]	; (8000b98 <MX_LPUART1_UART_Init+0x54>)
- 8000b82:	0018      	movs	r0, r3
- 8000b84:	f002 fe7e 	bl	8003884 <HAL_UART_Init>
- 8000b88:	1e03      	subs	r3, r0, #0
- 8000b8a:	d001      	beq.n	8000b90 <MX_LPUART1_UART_Init+0x4c>
+ 8000a5c:	4b05      	ldr	r3, [pc, #20]	; (8000a74 <MX_LPUART1_UART_Init+0x54>)
+ 8000a5e:	0018      	movs	r0, r3
+ 8000a60:	f002 fdca 	bl	80035f8 <HAL_UART_Init>
+ 8000a64:	1e03      	subs	r3, r0, #0
+ 8000a66:	d001      	beq.n	8000a6c <MX_LPUART1_UART_Init+0x4c>
   {
     Error_Handler();
- 8000b8c:	f000 f9f2 	bl	8000f74 <Error_Handler>
+ 8000a68:	f000 f9da 	bl	8000e20 <Error_Handler>
   }
   /* USER CODE BEGIN LPUART1_Init 2 */
 
   /* USER CODE END LPUART1_Init 2 */
 
 }
- 8000b90:	46c0      	nop			; (mov r8, r8)
- 8000b92:	46bd      	mov	sp, r7
- 8000b94:	bd80      	pop	{r7, pc}
- 8000b96:	46c0      	nop			; (mov r8, r8)
- 8000b98:	200000d4 	.word	0x200000d4
- 8000b9c:	40004800 	.word	0x40004800
+ 8000a6c:	46c0      	nop			; (mov r8, r8)
+ 8000a6e:	46bd      	mov	sp, r7
+ 8000a70:	bd80      	pop	{r7, pc}
+ 8000a72:	46c0      	nop			; (mov r8, r8)
+ 8000a74:	200000d4 	.word	0x200000d4
+ 8000a78:	40004800 	.word	0x40004800
 
-08000ba0 <MX_USART1_UART_Init>:
+08000a7c <MX_USART1_UART_Init>:
   * @brief USART1 Initialization Function
   * @param None
   * @retval None
   */
 static void MX_USART1_UART_Init(void)
 {
- 8000ba0:	b580      	push	{r7, lr}
- 8000ba2:	af00      	add	r7, sp, #0
+ 8000a7c:	b580      	push	{r7, lr}
+ 8000a7e:	af00      	add	r7, sp, #0
   /* USER CODE END USART1_Init 0 */
 
   /* USER CODE BEGIN USART1_Init 1 */
 
   /* USER CODE END USART1_Init 1 */
   huart1.Instance = USART1;
- 8000ba4:	4b14      	ldr	r3, [pc, #80]	; (8000bf8 <MX_USART1_UART_Init+0x58>)
- 8000ba6:	4a15      	ldr	r2, [pc, #84]	; (8000bfc <MX_USART1_UART_Init+0x5c>)
- 8000ba8:	601a      	str	r2, [r3, #0]
+ 8000a80:	4b14      	ldr	r3, [pc, #80]	; (8000ad4 <MX_USART1_UART_Init+0x58>)
+ 8000a82:	4a15      	ldr	r2, [pc, #84]	; (8000ad8 <MX_USART1_UART_Init+0x5c>)
+ 8000a84:	601a      	str	r2, [r3, #0]
   huart1.Init.BaudRate = 115200;
- 8000baa:	4b13      	ldr	r3, [pc, #76]	; (8000bf8 <MX_USART1_UART_Init+0x58>)
- 8000bac:	22e1      	movs	r2, #225	; 0xe1
- 8000bae:	0252      	lsls	r2, r2, #9
- 8000bb0:	605a      	str	r2, [r3, #4]
+ 8000a86:	4b13      	ldr	r3, [pc, #76]	; (8000ad4 <MX_USART1_UART_Init+0x58>)
+ 8000a88:	22e1      	movs	r2, #225	; 0xe1
+ 8000a8a:	0252      	lsls	r2, r2, #9
+ 8000a8c:	605a      	str	r2, [r3, #4]
   huart1.Init.WordLength = UART_WORDLENGTH_8B;
- 8000bb2:	4b11      	ldr	r3, [pc, #68]	; (8000bf8 <MX_USART1_UART_Init+0x58>)
- 8000bb4:	2200      	movs	r2, #0
- 8000bb6:	609a      	str	r2, [r3, #8]
+ 8000a8e:	4b11      	ldr	r3, [pc, #68]	; (8000ad4 <MX_USART1_UART_Init+0x58>)
+ 8000a90:	2200      	movs	r2, #0
+ 8000a92:	609a      	str	r2, [r3, #8]
   huart1.Init.StopBits = UART_STOPBITS_1;
- 8000bb8:	4b0f      	ldr	r3, [pc, #60]	; (8000bf8 <MX_USART1_UART_Init+0x58>)
- 8000bba:	2200      	movs	r2, #0
- 8000bbc:	60da      	str	r2, [r3, #12]
+ 8000a94:	4b0f      	ldr	r3, [pc, #60]	; (8000ad4 <MX_USART1_UART_Init+0x58>)
+ 8000a96:	2200      	movs	r2, #0
+ 8000a98:	60da      	str	r2, [r3, #12]
   huart1.Init.Parity = UART_PARITY_NONE;
- 8000bbe:	4b0e      	ldr	r3, [pc, #56]	; (8000bf8 <MX_USART1_UART_Init+0x58>)
- 8000bc0:	2200      	movs	r2, #0
- 8000bc2:	611a      	str	r2, [r3, #16]
+ 8000a9a:	4b0e      	ldr	r3, [pc, #56]	; (8000ad4 <MX_USART1_UART_Init+0x58>)
+ 8000a9c:	2200      	movs	r2, #0
+ 8000a9e:	611a      	str	r2, [r3, #16]
   huart1.Init.Mode = UART_MODE_TX_RX;
- 8000bc4:	4b0c      	ldr	r3, [pc, #48]	; (8000bf8 <MX_USART1_UART_Init+0x58>)
- 8000bc6:	220c      	movs	r2, #12
- 8000bc8:	615a      	str	r2, [r3, #20]
+ 8000aa0:	4b0c      	ldr	r3, [pc, #48]	; (8000ad4 <MX_USART1_UART_Init+0x58>)
+ 8000aa2:	220c      	movs	r2, #12
+ 8000aa4:	615a      	str	r2, [r3, #20]
   huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 8000bca:	4b0b      	ldr	r3, [pc, #44]	; (8000bf8 <MX_USART1_UART_Init+0x58>)
- 8000bcc:	2200      	movs	r2, #0
- 8000bce:	619a      	str	r2, [r3, #24]
+ 8000aa6:	4b0b      	ldr	r3, [pc, #44]	; (8000ad4 <MX_USART1_UART_Init+0x58>)
+ 8000aa8:	2200      	movs	r2, #0
+ 8000aaa:	619a      	str	r2, [r3, #24]
   huart1.Init.OverSampling = UART_OVERSAMPLING_16;
- 8000bd0:	4b09      	ldr	r3, [pc, #36]	; (8000bf8 <MX_USART1_UART_Init+0x58>)
- 8000bd2:	2200      	movs	r2, #0
- 8000bd4:	61da      	str	r2, [r3, #28]
+ 8000aac:	4b09      	ldr	r3, [pc, #36]	; (8000ad4 <MX_USART1_UART_Init+0x58>)
+ 8000aae:	2200      	movs	r2, #0
+ 8000ab0:	61da      	str	r2, [r3, #28]
   huart1.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 8000bd6:	4b08      	ldr	r3, [pc, #32]	; (8000bf8 <MX_USART1_UART_Init+0x58>)
- 8000bd8:	2200      	movs	r2, #0
- 8000bda:	621a      	str	r2, [r3, #32]
+ 8000ab2:	4b08      	ldr	r3, [pc, #32]	; (8000ad4 <MX_USART1_UART_Init+0x58>)
+ 8000ab4:	2200      	movs	r2, #0
+ 8000ab6:	621a      	str	r2, [r3, #32]
   huart1.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 8000bdc:	4b06      	ldr	r3, [pc, #24]	; (8000bf8 <MX_USART1_UART_Init+0x58>)
- 8000bde:	2200      	movs	r2, #0
- 8000be0:	625a      	str	r2, [r3, #36]	; 0x24
+ 8000ab8:	4b06      	ldr	r3, [pc, #24]	; (8000ad4 <MX_USART1_UART_Init+0x58>)
+ 8000aba:	2200      	movs	r2, #0
+ 8000abc:	625a      	str	r2, [r3, #36]	; 0x24
   if (HAL_UART_Init(&huart1) != HAL_OK)
- 8000be2:	4b05      	ldr	r3, [pc, #20]	; (8000bf8 <MX_USART1_UART_Init+0x58>)
- 8000be4:	0018      	movs	r0, r3
- 8000be6:	f002 fe4d 	bl	8003884 <HAL_UART_Init>
- 8000bea:	1e03      	subs	r3, r0, #0
- 8000bec:	d001      	beq.n	8000bf2 <MX_USART1_UART_Init+0x52>
+ 8000abe:	4b05      	ldr	r3, [pc, #20]	; (8000ad4 <MX_USART1_UART_Init+0x58>)
+ 8000ac0:	0018      	movs	r0, r3
+ 8000ac2:	f002 fd99 	bl	80035f8 <HAL_UART_Init>
+ 8000ac6:	1e03      	subs	r3, r0, #0
+ 8000ac8:	d001      	beq.n	8000ace <MX_USART1_UART_Init+0x52>
   {
     Error_Handler();
- 8000bee:	f000 f9c1 	bl	8000f74 <Error_Handler>
+ 8000aca:	f000 f9a9 	bl	8000e20 <Error_Handler>
   }
   /* USER CODE BEGIN USART1_Init 2 */
 
   /* USER CODE END USART1_Init 2 */
 
 }
- 8000bf2:	46c0      	nop			; (mov r8, r8)
- 8000bf4:	46bd      	mov	sp, r7
- 8000bf6:	bd80      	pop	{r7, pc}
- 8000bf8:	2000015c 	.word	0x2000015c
- 8000bfc:	40013800 	.word	0x40013800
+ 8000ace:	46c0      	nop			; (mov r8, r8)
+ 8000ad0:	46bd      	mov	sp, r7
+ 8000ad2:	bd80      	pop	{r7, pc}
+ 8000ad4:	2000015c 	.word	0x2000015c
+ 8000ad8:	40013800 	.word	0x40013800
 
-08000c00 <MX_SPI1_Init>:
+08000adc <MX_SPI1_Init>:
   * @brief SPI1 Initialization Function
   * @param None
   * @retval None
   */
 static void MX_SPI1_Init(void)
 {
- 8000c00:	b580      	push	{r7, lr}
- 8000c02:	af00      	add	r7, sp, #0
+ 8000adc:	b580      	push	{r7, lr}
+ 8000ade:	af00      	add	r7, sp, #0
 
   /* USER CODE BEGIN SPI1_Init 1 */
 
   /* USER CODE END SPI1_Init 1 */
   /* SPI1 parameter configuration*/
   hspi1.Instance = SPI1;
- 8000c04:	4b18      	ldr	r3, [pc, #96]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c06:	4a19      	ldr	r2, [pc, #100]	; (8000c6c <MX_SPI1_Init+0x6c>)
- 8000c08:	601a      	str	r2, [r3, #0]
+ 8000ae0:	4b18      	ldr	r3, [pc, #96]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000ae2:	4a19      	ldr	r2, [pc, #100]	; (8000b48 <MX_SPI1_Init+0x6c>)
+ 8000ae4:	601a      	str	r2, [r3, #0]
   hspi1.Init.Mode = SPI_MODE_MASTER;
- 8000c0a:	4b17      	ldr	r3, [pc, #92]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c0c:	2282      	movs	r2, #130	; 0x82
- 8000c0e:	0052      	lsls	r2, r2, #1
- 8000c10:	605a      	str	r2, [r3, #4]
+ 8000ae6:	4b17      	ldr	r3, [pc, #92]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000ae8:	2282      	movs	r2, #130	; 0x82
+ 8000aea:	0052      	lsls	r2, r2, #1
+ 8000aec:	605a      	str	r2, [r3, #4]
   hspi1.Init.Direction = SPI_DIRECTION_2LINES;
- 8000c12:	4b15      	ldr	r3, [pc, #84]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c14:	2200      	movs	r2, #0
- 8000c16:	609a      	str	r2, [r3, #8]
+ 8000aee:	4b15      	ldr	r3, [pc, #84]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000af0:	2200      	movs	r2, #0
+ 8000af2:	609a      	str	r2, [r3, #8]
   hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
- 8000c18:	4b13      	ldr	r3, [pc, #76]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c1a:	2200      	movs	r2, #0
- 8000c1c:	60da      	str	r2, [r3, #12]
+ 8000af4:	4b13      	ldr	r3, [pc, #76]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000af6:	2200      	movs	r2, #0
+ 8000af8:	60da      	str	r2, [r3, #12]
   hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
- 8000c1e:	4b12      	ldr	r3, [pc, #72]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c20:	2200      	movs	r2, #0
- 8000c22:	611a      	str	r2, [r3, #16]
+ 8000afa:	4b12      	ldr	r3, [pc, #72]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000afc:	2200      	movs	r2, #0
+ 8000afe:	611a      	str	r2, [r3, #16]
   hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
- 8000c24:	4b10      	ldr	r3, [pc, #64]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c26:	2200      	movs	r2, #0
- 8000c28:	615a      	str	r2, [r3, #20]
+ 8000b00:	4b10      	ldr	r3, [pc, #64]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000b02:	2200      	movs	r2, #0
+ 8000b04:	615a      	str	r2, [r3, #20]
   hspi1.Init.NSS = SPI_NSS_HARD_OUTPUT;
- 8000c2a:	4b0f      	ldr	r3, [pc, #60]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c2c:	2280      	movs	r2, #128	; 0x80
- 8000c2e:	02d2      	lsls	r2, r2, #11
- 8000c30:	619a      	str	r2, [r3, #24]
+ 8000b06:	4b0f      	ldr	r3, [pc, #60]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000b08:	2280      	movs	r2, #128	; 0x80
+ 8000b0a:	02d2      	lsls	r2, r2, #11
+ 8000b0c:	619a      	str	r2, [r3, #24]
   hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
- 8000c32:	4b0d      	ldr	r3, [pc, #52]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c34:	2200      	movs	r2, #0
- 8000c36:	61da      	str	r2, [r3, #28]
+ 8000b0e:	4b0d      	ldr	r3, [pc, #52]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000b10:	2200      	movs	r2, #0
+ 8000b12:	61da      	str	r2, [r3, #28]
   hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
- 8000c38:	4b0b      	ldr	r3, [pc, #44]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c3a:	2200      	movs	r2, #0
- 8000c3c:	621a      	str	r2, [r3, #32]
+ 8000b14:	4b0b      	ldr	r3, [pc, #44]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000b16:	2200      	movs	r2, #0
+ 8000b18:	621a      	str	r2, [r3, #32]
   hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
- 8000c3e:	4b0a      	ldr	r3, [pc, #40]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c40:	2200      	movs	r2, #0
- 8000c42:	625a      	str	r2, [r3, #36]	; 0x24
+ 8000b1a:	4b0a      	ldr	r3, [pc, #40]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000b1c:	2200      	movs	r2, #0
+ 8000b1e:	625a      	str	r2, [r3, #36]	; 0x24
   hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- 8000c44:	4b08      	ldr	r3, [pc, #32]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c46:	2200      	movs	r2, #0
- 8000c48:	629a      	str	r2, [r3, #40]	; 0x28
+ 8000b20:	4b08      	ldr	r3, [pc, #32]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000b22:	2200      	movs	r2, #0
+ 8000b24:	629a      	str	r2, [r3, #40]	; 0x28
   hspi1.Init.CRCPolynomial = 7;
- 8000c4a:	4b07      	ldr	r3, [pc, #28]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c4c:	2207      	movs	r2, #7
- 8000c4e:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000b26:	4b07      	ldr	r3, [pc, #28]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000b28:	2207      	movs	r2, #7
+ 8000b2a:	62da      	str	r2, [r3, #44]	; 0x2c
   if (HAL_SPI_Init(&hspi1) != HAL_OK)
- 8000c50:	4b05      	ldr	r3, [pc, #20]	; (8000c68 <MX_SPI1_Init+0x68>)
- 8000c52:	0018      	movs	r0, r3
- 8000c54:	f002 fa18 	bl	8003088 <HAL_SPI_Init>
- 8000c58:	1e03      	subs	r3, r0, #0
- 8000c5a:	d001      	beq.n	8000c60 <MX_SPI1_Init+0x60>
+ 8000b2c:	4b05      	ldr	r3, [pc, #20]	; (8000b44 <MX_SPI1_Init+0x68>)
+ 8000b2e:	0018      	movs	r0, r3
+ 8000b30:	f002 f964 	bl	8002dfc <HAL_SPI_Init>
+ 8000b34:	1e03      	subs	r3, r0, #0
+ 8000b36:	d001      	beq.n	8000b3c <MX_SPI1_Init+0x60>
   {
     Error_Handler();
- 8000c5c:	f000 f98a 	bl	8000f74 <Error_Handler>
+ 8000b38:	f000 f972 	bl	8000e20 <Error_Handler>
   }
   /* USER CODE BEGIN SPI1_Init 2 */
 
   /* USER CODE END SPI1_Init 2 */
 
 }
- 8000c60:	46c0      	nop			; (mov r8, r8)
- 8000c62:	46bd      	mov	sp, r7
- 8000c64:	bd80      	pop	{r7, pc}
- 8000c66:	46c0      	nop			; (mov r8, r8)
- 8000c68:	2000022c 	.word	0x2000022c
- 8000c6c:	40013000 	.word	0x40013000
+ 8000b3c:	46c0      	nop			; (mov r8, r8)
+ 8000b3e:	46bd      	mov	sp, r7
+ 8000b40:	bd80      	pop	{r7, pc}
+ 8000b42:	46c0      	nop			; (mov r8, r8)
+ 8000b44:	2000022c 	.word	0x2000022c
+ 8000b48:	40013000 	.word	0x40013000
 
-08000c70 <MX_TIM21_Init>:
+08000b4c <MX_TIM21_Init>:
   * @brief TIM21 Initialization Function
   * @param None
   * @retval None
   */
 static void MX_TIM21_Init(void)
 {
- 8000c70:	b580      	push	{r7, lr}
- 8000c72:	b086      	sub	sp, #24
- 8000c74:	af00      	add	r7, sp, #0
+ 8000b4c:	b580      	push	{r7, lr}
+ 8000b4e:	b086      	sub	sp, #24
+ 8000b50:	af00      	add	r7, sp, #0
 
   /* USER CODE BEGIN TIM21_Init 0 */
 
   /* USER CODE END TIM21_Init 0 */
 
   TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- 8000c76:	2308      	movs	r3, #8
- 8000c78:	18fb      	adds	r3, r7, r3
- 8000c7a:	0018      	movs	r0, r3
- 8000c7c:	2310      	movs	r3, #16
- 8000c7e:	001a      	movs	r2, r3
- 8000c80:	2100      	movs	r1, #0
- 8000c82:	f004 f9f5 	bl	8005070 <memset>
+ 8000b52:	2308      	movs	r3, #8
+ 8000b54:	18fb      	adds	r3, r7, r3
+ 8000b56:	0018      	movs	r0, r3
+ 8000b58:	2310      	movs	r3, #16
+ 8000b5a:	001a      	movs	r2, r3
+ 8000b5c:	2100      	movs	r1, #0
+ 8000b5e:	f003 fbf3 	bl	8004348 <memset>
   TIM_MasterConfigTypeDef sMasterConfig = {0};
- 8000c86:	003b      	movs	r3, r7
- 8000c88:	0018      	movs	r0, r3
- 8000c8a:	2308      	movs	r3, #8
- 8000c8c:	001a      	movs	r2, r3
- 8000c8e:	2100      	movs	r1, #0
- 8000c90:	f004 f9ee 	bl	8005070 <memset>
+ 8000b62:	003b      	movs	r3, r7
+ 8000b64:	0018      	movs	r0, r3
+ 8000b66:	2308      	movs	r3, #8
+ 8000b68:	001a      	movs	r2, r3
+ 8000b6a:	2100      	movs	r1, #0
+ 8000b6c:	f003 fbec 	bl	8004348 <memset>
 
   /* USER CODE BEGIN TIM21_Init 1 */
 
   /* USER CODE END TIM21_Init 1 */
   htim21.Instance = TIM21;
- 8000c94:	4b1e      	ldr	r3, [pc, #120]	; (8000d10 <MX_TIM21_Init+0xa0>)
- 8000c96:	4a1f      	ldr	r2, [pc, #124]	; (8000d14 <MX_TIM21_Init+0xa4>)
- 8000c98:	601a      	str	r2, [r3, #0]
+ 8000b70:	4b1e      	ldr	r3, [pc, #120]	; (8000bec <MX_TIM21_Init+0xa0>)
+ 8000b72:	4a1f      	ldr	r2, [pc, #124]	; (8000bf0 <MX_TIM21_Init+0xa4>)
+ 8000b74:	601a      	str	r2, [r3, #0]
   htim21.Init.Prescaler = 0;
- 8000c9a:	4b1d      	ldr	r3, [pc, #116]	; (8000d10 <MX_TIM21_Init+0xa0>)
- 8000c9c:	2200      	movs	r2, #0
- 8000c9e:	605a      	str	r2, [r3, #4]
+ 8000b76:	4b1d      	ldr	r3, [pc, #116]	; (8000bec <MX_TIM21_Init+0xa0>)
+ 8000b78:	2200      	movs	r2, #0
+ 8000b7a:	605a      	str	r2, [r3, #4]
   htim21.Init.CounterMode = TIM_COUNTERMODE_UP;
- 8000ca0:	4b1b      	ldr	r3, [pc, #108]	; (8000d10 <MX_TIM21_Init+0xa0>)
- 8000ca2:	2200      	movs	r2, #0
- 8000ca4:	609a      	str	r2, [r3, #8]
+ 8000b7c:	4b1b      	ldr	r3, [pc, #108]	; (8000bec <MX_TIM21_Init+0xa0>)
+ 8000b7e:	2200      	movs	r2, #0
+ 8000b80:	609a      	str	r2, [r3, #8]
   htim21.Init.Period = 65535;
- 8000ca6:	4b1a      	ldr	r3, [pc, #104]	; (8000d10 <MX_TIM21_Init+0xa0>)
- 8000ca8:	4a1b      	ldr	r2, [pc, #108]	; (8000d18 <MX_TIM21_Init+0xa8>)
- 8000caa:	60da      	str	r2, [r3, #12]
+ 8000b82:	4b1a      	ldr	r3, [pc, #104]	; (8000bec <MX_TIM21_Init+0xa0>)
+ 8000b84:	4a1b      	ldr	r2, [pc, #108]	; (8000bf4 <MX_TIM21_Init+0xa8>)
+ 8000b86:	60da      	str	r2, [r3, #12]
   htim21.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 8000cac:	4b18      	ldr	r3, [pc, #96]	; (8000d10 <MX_TIM21_Init+0xa0>)
- 8000cae:	2200      	movs	r2, #0
- 8000cb0:	611a      	str	r2, [r3, #16]
+ 8000b88:	4b18      	ldr	r3, [pc, #96]	; (8000bec <MX_TIM21_Init+0xa0>)
+ 8000b8a:	2200      	movs	r2, #0
+ 8000b8c:	611a      	str	r2, [r3, #16]
   htim21.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 8000cb2:	4b17      	ldr	r3, [pc, #92]	; (8000d10 <MX_TIM21_Init+0xa0>)
- 8000cb4:	2200      	movs	r2, #0
- 8000cb6:	615a      	str	r2, [r3, #20]
+ 8000b8e:	4b17      	ldr	r3, [pc, #92]	; (8000bec <MX_TIM21_Init+0xa0>)
+ 8000b90:	2200      	movs	r2, #0
+ 8000b92:	615a      	str	r2, [r3, #20]
   if (HAL_TIM_Base_Init(&htim21) != HAL_OK)
- 8000cb8:	4b15      	ldr	r3, [pc, #84]	; (8000d10 <MX_TIM21_Init+0xa0>)
- 8000cba:	0018      	movs	r0, r3
- 8000cbc:	f002 fa78 	bl	80031b0 <HAL_TIM_Base_Init>
- 8000cc0:	1e03      	subs	r3, r0, #0
- 8000cc2:	d001      	beq.n	8000cc8 <MX_TIM21_Init+0x58>
+ 8000b94:	4b15      	ldr	r3, [pc, #84]	; (8000bec <MX_TIM21_Init+0xa0>)
+ 8000b96:	0018      	movs	r0, r3
+ 8000b98:	f002 f9c4 	bl	8002f24 <HAL_TIM_Base_Init>
+ 8000b9c:	1e03      	subs	r3, r0, #0
+ 8000b9e:	d001      	beq.n	8000ba4 <MX_TIM21_Init+0x58>
   {
     Error_Handler();
- 8000cc4:	f000 f956 	bl	8000f74 <Error_Handler>
+ 8000ba0:	f000 f93e 	bl	8000e20 <Error_Handler>
   }
   sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- 8000cc8:	2108      	movs	r1, #8
- 8000cca:	187b      	adds	r3, r7, r1
- 8000ccc:	2280      	movs	r2, #128	; 0x80
- 8000cce:	0152      	lsls	r2, r2, #5
- 8000cd0:	601a      	str	r2, [r3, #0]
+ 8000ba4:	2108      	movs	r1, #8
+ 8000ba6:	187b      	adds	r3, r7, r1
+ 8000ba8:	2280      	movs	r2, #128	; 0x80
+ 8000baa:	0152      	lsls	r2, r2, #5
+ 8000bac:	601a      	str	r2, [r3, #0]
   if (HAL_TIM_ConfigClockSource(&htim21, &sClockSourceConfig) != HAL_OK)
- 8000cd2:	187a      	adds	r2, r7, r1
- 8000cd4:	4b0e      	ldr	r3, [pc, #56]	; (8000d10 <MX_TIM21_Init+0xa0>)
- 8000cd6:	0011      	movs	r1, r2
- 8000cd8:	0018      	movs	r0, r3
- 8000cda:	f002 fb91 	bl	8003400 <HAL_TIM_ConfigClockSource>
- 8000cde:	1e03      	subs	r3, r0, #0
- 8000ce0:	d001      	beq.n	8000ce6 <MX_TIM21_Init+0x76>
+ 8000bae:	187a      	adds	r2, r7, r1
+ 8000bb0:	4b0e      	ldr	r3, [pc, #56]	; (8000bec <MX_TIM21_Init+0xa0>)
+ 8000bb2:	0011      	movs	r1, r2
+ 8000bb4:	0018      	movs	r0, r3
+ 8000bb6:	f002 fadd 	bl	8003174 <HAL_TIM_ConfigClockSource>
+ 8000bba:	1e03      	subs	r3, r0, #0
+ 8000bbc:	d001      	beq.n	8000bc2 <MX_TIM21_Init+0x76>
   {
     Error_Handler();
- 8000ce2:	f000 f947 	bl	8000f74 <Error_Handler>
+ 8000bbe:	f000 f92f 	bl	8000e20 <Error_Handler>
   }
   sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- 8000ce6:	003b      	movs	r3, r7
- 8000ce8:	2200      	movs	r2, #0
- 8000cea:	601a      	str	r2, [r3, #0]
+ 8000bc2:	003b      	movs	r3, r7
+ 8000bc4:	2200      	movs	r2, #0
+ 8000bc6:	601a      	str	r2, [r3, #0]
   sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 8000cec:	003b      	movs	r3, r7
- 8000cee:	2200      	movs	r2, #0
- 8000cf0:	605a      	str	r2, [r3, #4]
+ 8000bc8:	003b      	movs	r3, r7
+ 8000bca:	2200      	movs	r2, #0
+ 8000bcc:	605a      	str	r2, [r3, #4]
   if (HAL_TIMEx_MasterConfigSynchronization(&htim21, &sMasterConfig) != HAL_OK)
- 8000cf2:	003a      	movs	r2, r7
- 8000cf4:	4b06      	ldr	r3, [pc, #24]	; (8000d10 <MX_TIM21_Init+0xa0>)
- 8000cf6:	0011      	movs	r1, r2
- 8000cf8:	0018      	movs	r0, r3
- 8000cfa:	f002 fd6b 	bl	80037d4 <HAL_TIMEx_MasterConfigSynchronization>
- 8000cfe:	1e03      	subs	r3, r0, #0
- 8000d00:	d001      	beq.n	8000d06 <MX_TIM21_Init+0x96>
+ 8000bce:	003a      	movs	r2, r7
+ 8000bd0:	4b06      	ldr	r3, [pc, #24]	; (8000bec <MX_TIM21_Init+0xa0>)
+ 8000bd2:	0011      	movs	r1, r2
+ 8000bd4:	0018      	movs	r0, r3
+ 8000bd6:	f002 fcb7 	bl	8003548 <HAL_TIMEx_MasterConfigSynchronization>
+ 8000bda:	1e03      	subs	r3, r0, #0
+ 8000bdc:	d001      	beq.n	8000be2 <MX_TIM21_Init+0x96>
   {
     Error_Handler();
- 8000d02:	f000 f937 	bl	8000f74 <Error_Handler>
+ 8000bde:	f000 f91f 	bl	8000e20 <Error_Handler>
   }
   /* USER CODE BEGIN TIM21_Init 2 */
 
   /* USER CODE END TIM21_Init 2 */
 
 }
- 8000d06:	46c0      	nop			; (mov r8, r8)
- 8000d08:	46bd      	mov	sp, r7
- 8000d0a:	b006      	add	sp, #24
- 8000d0c:	bd80      	pop	{r7, pc}
- 8000d0e:	46c0      	nop			; (mov r8, r8)
- 8000d10:	20000284 	.word	0x20000284
- 8000d14:	40010800 	.word	0x40010800
- 8000d18:	0000ffff 	.word	0x0000ffff
+ 8000be2:	46c0      	nop			; (mov r8, r8)
+ 8000be4:	46bd      	mov	sp, r7
+ 8000be6:	b006      	add	sp, #24
+ 8000be8:	bd80      	pop	{r7, pc}
+ 8000bea:	46c0      	nop			; (mov r8, r8)
+ 8000bec:	20000284 	.word	0x20000284
+ 8000bf0:	40010800 	.word	0x40010800
+ 8000bf4:	0000ffff 	.word	0x0000ffff
 
-08000d1c <MX_DMA_Init>:
+08000bf8 <MX_DMA_Init>:
 
 /**
   * Enable DMA controller clock
   */
 static void MX_DMA_Init(void)
 {
- 8000d1c:	b580      	push	{r7, lr}
- 8000d1e:	b082      	sub	sp, #8
- 8000d20:	af00      	add	r7, sp, #0
+ 8000bf8:	b580      	push	{r7, lr}
+ 8000bfa:	b082      	sub	sp, #8
+ 8000bfc:	af00      	add	r7, sp, #0
 
   /* DMA controller clock enable */
   __HAL_RCC_DMA1_CLK_ENABLE();
- 8000d22:	4b0c      	ldr	r3, [pc, #48]	; (8000d54 <MX_DMA_Init+0x38>)
- 8000d24:	6b1a      	ldr	r2, [r3, #48]	; 0x30
- 8000d26:	4b0b      	ldr	r3, [pc, #44]	; (8000d54 <MX_DMA_Init+0x38>)
- 8000d28:	2101      	movs	r1, #1
- 8000d2a:	430a      	orrs	r2, r1
- 8000d2c:	631a      	str	r2, [r3, #48]	; 0x30
- 8000d2e:	4b09      	ldr	r3, [pc, #36]	; (8000d54 <MX_DMA_Init+0x38>)
- 8000d30:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8000d32:	2201      	movs	r2, #1
- 8000d34:	4013      	ands	r3, r2
- 8000d36:	607b      	str	r3, [r7, #4]
- 8000d38:	687b      	ldr	r3, [r7, #4]
+ 8000bfe:	4b0c      	ldr	r3, [pc, #48]	; (8000c30 <MX_DMA_Init+0x38>)
+ 8000c00:	6b1a      	ldr	r2, [r3, #48]	; 0x30
+ 8000c02:	4b0b      	ldr	r3, [pc, #44]	; (8000c30 <MX_DMA_Init+0x38>)
+ 8000c04:	2101      	movs	r1, #1
+ 8000c06:	430a      	orrs	r2, r1
+ 8000c08:	631a      	str	r2, [r3, #48]	; 0x30
+ 8000c0a:	4b09      	ldr	r3, [pc, #36]	; (8000c30 <MX_DMA_Init+0x38>)
+ 8000c0c:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8000c0e:	2201      	movs	r2, #1
+ 8000c10:	4013      	ands	r3, r2
+ 8000c12:	607b      	str	r3, [r7, #4]
+ 8000c14:	687b      	ldr	r3, [r7, #4]
 
   /* DMA interrupt init */
   /* DMA1_Channel2_3_IRQn interrupt configuration */
   HAL_NVIC_SetPriority(DMA1_Channel2_3_IRQn, 0, 0);
- 8000d3a:	2200      	movs	r2, #0
- 8000d3c:	2100      	movs	r1, #0
- 8000d3e:	200a      	movs	r0, #10
- 8000d40:	f000 fe9e 	bl	8001a80 <HAL_NVIC_SetPriority>
+ 8000c16:	2200      	movs	r2, #0
+ 8000c18:	2100      	movs	r1, #0
+ 8000c1a:	200a      	movs	r0, #10
+ 8000c1c:	f000 fe72 	bl	8001904 <HAL_NVIC_SetPriority>
   HAL_NVIC_EnableIRQ(DMA1_Channel2_3_IRQn);
- 8000d44:	200a      	movs	r0, #10
- 8000d46:	f000 feb0 	bl	8001aaa <HAL_NVIC_EnableIRQ>
+ 8000c20:	200a      	movs	r0, #10
+ 8000c22:	f000 fe84 	bl	800192e <HAL_NVIC_EnableIRQ>
 
 }
- 8000d4a:	46c0      	nop			; (mov r8, r8)
- 8000d4c:	46bd      	mov	sp, r7
- 8000d4e:	b002      	add	sp, #8
- 8000d50:	bd80      	pop	{r7, pc}
- 8000d52:	46c0      	nop			; (mov r8, r8)
- 8000d54:	40021000 	.word	0x40021000
+ 8000c26:	46c0      	nop			; (mov r8, r8)
+ 8000c28:	46bd      	mov	sp, r7
+ 8000c2a:	b002      	add	sp, #8
+ 8000c2c:	bd80      	pop	{r7, pc}
+ 8000c2e:	46c0      	nop			; (mov r8, r8)
+ 8000c30:	40021000 	.word	0x40021000
 
-08000d58 <MX_GPIO_Init>:
+08000c34 <MX_GPIO_Init>:
   * @brief GPIO Initialization Function
   * @param None
   * @retval None
   */
 static void MX_GPIO_Init(void)
 {
- 8000d58:	b590      	push	{r4, r7, lr}
- 8000d5a:	b08b      	sub	sp, #44	; 0x2c
- 8000d5c:	af00      	add	r7, sp, #0
+ 8000c34:	b590      	push	{r4, r7, lr}
+ 8000c36:	b08b      	sub	sp, #44	; 0x2c
+ 8000c38:	af00      	add	r7, sp, #0
   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8000d5e:	2414      	movs	r4, #20
- 8000d60:	193b      	adds	r3, r7, r4
- 8000d62:	0018      	movs	r0, r3
- 8000d64:	2314      	movs	r3, #20
- 8000d66:	001a      	movs	r2, r3
- 8000d68:	2100      	movs	r1, #0
- 8000d6a:	f004 f981 	bl	8005070 <memset>
+ 8000c3a:	2414      	movs	r4, #20
+ 8000c3c:	193b      	adds	r3, r7, r4
+ 8000c3e:	0018      	movs	r0, r3
+ 8000c40:	2314      	movs	r3, #20
+ 8000c42:	001a      	movs	r2, r3
+ 8000c44:	2100      	movs	r1, #0
+ 8000c46:	f003 fb7f 	bl	8004348 <memset>
 /* USER CODE BEGIN MX_GPIO_Init_1 */
 /* USER CODE END MX_GPIO_Init_1 */
 
   /* GPIO Ports Clock Enable */
   __HAL_RCC_GPIOC_CLK_ENABLE();
- 8000d6e:	4b6e      	ldr	r3, [pc, #440]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000d70:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8000d72:	4b6d      	ldr	r3, [pc, #436]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000d74:	2104      	movs	r1, #4
- 8000d76:	430a      	orrs	r2, r1
- 8000d78:	62da      	str	r2, [r3, #44]	; 0x2c
- 8000d7a:	4b6b      	ldr	r3, [pc, #428]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000d7c:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8000d7e:	2204      	movs	r2, #4
- 8000d80:	4013      	ands	r3, r2
- 8000d82:	613b      	str	r3, [r7, #16]
- 8000d84:	693b      	ldr	r3, [r7, #16]
+ 8000c4a:	4b6e      	ldr	r3, [pc, #440]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000c4c:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8000c4e:	4b6d      	ldr	r3, [pc, #436]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000c50:	2104      	movs	r1, #4
+ 8000c52:	430a      	orrs	r2, r1
+ 8000c54:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000c56:	4b6b      	ldr	r3, [pc, #428]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000c58:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8000c5a:	2204      	movs	r2, #4
+ 8000c5c:	4013      	ands	r3, r2
+ 8000c5e:	613b      	str	r3, [r7, #16]
+ 8000c60:	693b      	ldr	r3, [r7, #16]
   __HAL_RCC_GPIOH_CLK_ENABLE();
- 8000d86:	4b68      	ldr	r3, [pc, #416]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000d88:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8000d8a:	4b67      	ldr	r3, [pc, #412]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000d8c:	2180      	movs	r1, #128	; 0x80
- 8000d8e:	430a      	orrs	r2, r1
- 8000d90:	62da      	str	r2, [r3, #44]	; 0x2c
- 8000d92:	4b65      	ldr	r3, [pc, #404]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000d94:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8000d96:	2280      	movs	r2, #128	; 0x80
- 8000d98:	4013      	ands	r3, r2
- 8000d9a:	60fb      	str	r3, [r7, #12]
- 8000d9c:	68fb      	ldr	r3, [r7, #12]
+ 8000c62:	4b68      	ldr	r3, [pc, #416]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000c64:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8000c66:	4b67      	ldr	r3, [pc, #412]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000c68:	2180      	movs	r1, #128	; 0x80
+ 8000c6a:	430a      	orrs	r2, r1
+ 8000c6c:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000c6e:	4b65      	ldr	r3, [pc, #404]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000c70:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8000c72:	2280      	movs	r2, #128	; 0x80
+ 8000c74:	4013      	ands	r3, r2
+ 8000c76:	60fb      	str	r3, [r7, #12]
+ 8000c78:	68fb      	ldr	r3, [r7, #12]
   __HAL_RCC_GPIOA_CLK_ENABLE();
- 8000d9e:	4b62      	ldr	r3, [pc, #392]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000da0:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8000da2:	4b61      	ldr	r3, [pc, #388]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000da4:	2101      	movs	r1, #1
- 8000da6:	430a      	orrs	r2, r1
- 8000da8:	62da      	str	r2, [r3, #44]	; 0x2c
- 8000daa:	4b5f      	ldr	r3, [pc, #380]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000dac:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8000dae:	2201      	movs	r2, #1
- 8000db0:	4013      	ands	r3, r2
- 8000db2:	60bb      	str	r3, [r7, #8]
- 8000db4:	68bb      	ldr	r3, [r7, #8]
+ 8000c7a:	4b62      	ldr	r3, [pc, #392]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000c7c:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8000c7e:	4b61      	ldr	r3, [pc, #388]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000c80:	2101      	movs	r1, #1
+ 8000c82:	430a      	orrs	r2, r1
+ 8000c84:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000c86:	4b5f      	ldr	r3, [pc, #380]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000c88:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8000c8a:	2201      	movs	r2, #1
+ 8000c8c:	4013      	ands	r3, r2
+ 8000c8e:	60bb      	str	r3, [r7, #8]
+ 8000c90:	68bb      	ldr	r3, [r7, #8]
   __HAL_RCC_GPIOB_CLK_ENABLE();
- 8000db6:	4b5c      	ldr	r3, [pc, #368]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000db8:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8000dba:	4b5b      	ldr	r3, [pc, #364]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000dbc:	2102      	movs	r1, #2
- 8000dbe:	430a      	orrs	r2, r1
- 8000dc0:	62da      	str	r2, [r3, #44]	; 0x2c
- 8000dc2:	4b59      	ldr	r3, [pc, #356]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000dc4:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8000dc6:	2202      	movs	r2, #2
- 8000dc8:	4013      	ands	r3, r2
- 8000dca:	607b      	str	r3, [r7, #4]
- 8000dcc:	687b      	ldr	r3, [r7, #4]
+ 8000c92:	4b5c      	ldr	r3, [pc, #368]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000c94:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8000c96:	4b5b      	ldr	r3, [pc, #364]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000c98:	2102      	movs	r1, #2
+ 8000c9a:	430a      	orrs	r2, r1
+ 8000c9c:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000c9e:	4b59      	ldr	r3, [pc, #356]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000ca0:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8000ca2:	2202      	movs	r2, #2
+ 8000ca4:	4013      	ands	r3, r2
+ 8000ca6:	607b      	str	r3, [r7, #4]
+ 8000ca8:	687b      	ldr	r3, [r7, #4]
   __HAL_RCC_GPIOD_CLK_ENABLE();
- 8000dce:	4b56      	ldr	r3, [pc, #344]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000dd0:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8000dd2:	4b55      	ldr	r3, [pc, #340]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000dd4:	2108      	movs	r1, #8
- 8000dd6:	430a      	orrs	r2, r1
- 8000dd8:	62da      	str	r2, [r3, #44]	; 0x2c
- 8000dda:	4b53      	ldr	r3, [pc, #332]	; (8000f28 <MX_GPIO_Init+0x1d0>)
- 8000ddc:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8000dde:	2208      	movs	r2, #8
- 8000de0:	4013      	ands	r3, r2
- 8000de2:	603b      	str	r3, [r7, #0]
- 8000de4:	683b      	ldr	r3, [r7, #0]
+ 8000caa:	4b56      	ldr	r3, [pc, #344]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000cac:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8000cae:	4b55      	ldr	r3, [pc, #340]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000cb0:	2108      	movs	r1, #8
+ 8000cb2:	430a      	orrs	r2, r1
+ 8000cb4:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000cb6:	4b53      	ldr	r3, [pc, #332]	; (8000e04 <MX_GPIO_Init+0x1d0>)
+ 8000cb8:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8000cba:	2208      	movs	r2, #8
+ 8000cbc:	4013      	ands	r3, r2
+ 8000cbe:	603b      	str	r3, [r7, #0]
+ 8000cc0:	683b      	ldr	r3, [r7, #0]
 
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOC, LED_Pin|EXPANSION_1_Pin|EXPANSION_2_Pin|Temp_EN_Pin
- 8000de6:	4951      	ldr	r1, [pc, #324]	; (8000f2c <MX_GPIO_Init+0x1d4>)
- 8000de8:	4b51      	ldr	r3, [pc, #324]	; (8000f30 <MX_GPIO_Init+0x1d8>)
- 8000dea:	2200      	movs	r2, #0
- 8000dec:	0018      	movs	r0, r3
- 8000dee:	f001 f99d 	bl	800212c <HAL_GPIO_WritePin>
+ 8000cc2:	4951      	ldr	r1, [pc, #324]	; (8000e08 <MX_GPIO_Init+0x1d4>)
+ 8000cc4:	4b51      	ldr	r3, [pc, #324]	; (8000e0c <MX_GPIO_Init+0x1d8>)
+ 8000cc6:	2200      	movs	r2, #0
+ 8000cc8:	0018      	movs	r0, r3
+ 8000cca:	f001 f8e9 	bl	8001ea0 <HAL_GPIO_WritePin>
                           |ADF_CLK_Pin|ADF_Data_Pin|ADF_LE_Pin|Heater_Pin, GPIO_PIN_RESET);
 
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOA, EXPANSION_4_Pin|EXPANSION_PS_Pin|DC_boost_Pin, GPIO_PIN_RESET);
- 8000df2:	4950      	ldr	r1, [pc, #320]	; (8000f34 <MX_GPIO_Init+0x1dc>)
- 8000df4:	23a0      	movs	r3, #160	; 0xa0
- 8000df6:	05db      	lsls	r3, r3, #23
- 8000df8:	2200      	movs	r2, #0
- 8000dfa:	0018      	movs	r0, r3
- 8000dfc:	f001 f996 	bl	800212c <HAL_GPIO_WritePin>
+ 8000cce:	4950      	ldr	r1, [pc, #320]	; (8000e10 <MX_GPIO_Init+0x1dc>)
+ 8000cd0:	23a0      	movs	r3, #160	; 0xa0
+ 8000cd2:	05db      	lsls	r3, r3, #23
+ 8000cd4:	2200      	movs	r2, #0
+ 8000cd6:	0018      	movs	r0, r3
+ 8000cd8:	f001 f8e2 	bl	8001ea0 <HAL_GPIO_WritePin>
 
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(GPIOB, RF_Boost_Pin|ADF_TX_Data_Pin|GPS_ON_Pin|RADIO_EN_Pin
- 8000e00:	494d      	ldr	r1, [pc, #308]	; (8000f38 <MX_GPIO_Init+0x1e0>)
- 8000e02:	4b4e      	ldr	r3, [pc, #312]	; (8000f3c <MX_GPIO_Init+0x1e4>)
- 8000e04:	2200      	movs	r2, #0
- 8000e06:	0018      	movs	r0, r3
- 8000e08:	f001 f990 	bl	800212c <HAL_GPIO_WritePin>
+ 8000cdc:	494d      	ldr	r1, [pc, #308]	; (8000e14 <MX_GPIO_Init+0x1e0>)
+ 8000cde:	4b4e      	ldr	r3, [pc, #312]	; (8000e18 <MX_GPIO_Init+0x1e4>)
+ 8000ce0:	2200      	movs	r2, #0
+ 8000ce2:	0018      	movs	r0, r3
+ 8000ce4:	f001 f8dc 	bl	8001ea0 <HAL_GPIO_WritePin>
                           |Trmp_R4_Pin|Temp_R2_Pin|Temp_R1_Pin|EXPANSION_3_Pin
                           |Temp_R5_Pin|Temp_R3_Pin, GPIO_PIN_RESET);
 
   /*Configure GPIO pin Output Level */
   HAL_GPIO_WritePin(Battery_on_GPIO_Port, Battery_on_Pin, GPIO_PIN_RESET);
- 8000e0c:	4b4c      	ldr	r3, [pc, #304]	; (8000f40 <MX_GPIO_Init+0x1e8>)
- 8000e0e:	2200      	movs	r2, #0
- 8000e10:	2104      	movs	r1, #4
- 8000e12:	0018      	movs	r0, r3
- 8000e14:	f001 f98a 	bl	800212c <HAL_GPIO_WritePin>
+ 8000ce8:	4b4c      	ldr	r3, [pc, #304]	; (8000e1c <MX_GPIO_Init+0x1e8>)
+ 8000cea:	2200      	movs	r2, #0
+ 8000cec:	2104      	movs	r1, #4
+ 8000cee:	0018      	movs	r0, r3
+ 8000cf0:	f001 f8d6 	bl	8001ea0 <HAL_GPIO_WritePin>
 
   /*Configure GPIO pins : BUTTON_Pin TL555_in_Pin */
   GPIO_InitStruct.Pin = BUTTON_Pin|TL555_in_Pin;
- 8000e18:	193b      	adds	r3, r7, r4
- 8000e1a:	2281      	movs	r2, #129	; 0x81
- 8000e1c:	0192      	lsls	r2, r2, #6
- 8000e1e:	601a      	str	r2, [r3, #0]
+ 8000cf4:	193b      	adds	r3, r7, r4
+ 8000cf6:	2281      	movs	r2, #129	; 0x81
+ 8000cf8:	0192      	lsls	r2, r2, #6
+ 8000cfa:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8000e20:	193b      	adds	r3, r7, r4
- 8000e22:	2200      	movs	r2, #0
- 8000e24:	605a      	str	r2, [r3, #4]
+ 8000cfc:	193b      	adds	r3, r7, r4
+ 8000cfe:	2200      	movs	r2, #0
+ 8000d00:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8000e26:	193b      	adds	r3, r7, r4
- 8000e28:	2200      	movs	r2, #0
- 8000e2a:	609a      	str	r2, [r3, #8]
+ 8000d02:	193b      	adds	r3, r7, r4
+ 8000d04:	2200      	movs	r2, #0
+ 8000d06:	609a      	str	r2, [r3, #8]
   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 8000e2c:	193b      	adds	r3, r7, r4
- 8000e2e:	4a40      	ldr	r2, [pc, #256]	; (8000f30 <MX_GPIO_Init+0x1d8>)
- 8000e30:	0019      	movs	r1, r3
- 8000e32:	0010      	movs	r0, r2
- 8000e34:	f001 f804 	bl	8001e40 <HAL_GPIO_Init>
+ 8000d08:	193b      	adds	r3, r7, r4
+ 8000d0a:	4a40      	ldr	r2, [pc, #256]	; (8000e0c <MX_GPIO_Init+0x1d8>)
+ 8000d0c:	0019      	movs	r1, r3
+ 8000d0e:	0010      	movs	r0, r2
+ 8000d10:	f000 ff50 	bl	8001bb4 <HAL_GPIO_Init>
 
   /*Configure GPIO pins : LED_Pin EXPANSION_1_Pin EXPANSION_2_Pin Temp_EN_Pin
                            ADF_CLK_Pin ADF_Data_Pin ADF_LE_Pin Heater_Pin */
   GPIO_InitStruct.Pin = LED_Pin|EXPANSION_1_Pin|EXPANSION_2_Pin|Temp_EN_Pin
- 8000e38:	193b      	adds	r3, r7, r4
- 8000e3a:	4a3c      	ldr	r2, [pc, #240]	; (8000f2c <MX_GPIO_Init+0x1d4>)
- 8000e3c:	601a      	str	r2, [r3, #0]
+ 8000d14:	193b      	adds	r3, r7, r4
+ 8000d16:	4a3c      	ldr	r2, [pc, #240]	; (8000e08 <MX_GPIO_Init+0x1d4>)
+ 8000d18:	601a      	str	r2, [r3, #0]
                           |ADF_CLK_Pin|ADF_Data_Pin|ADF_LE_Pin|Heater_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8000e3e:	193b      	adds	r3, r7, r4
- 8000e40:	2201      	movs	r2, #1
- 8000e42:	605a      	str	r2, [r3, #4]
+ 8000d1a:	193b      	adds	r3, r7, r4
+ 8000d1c:	2201      	movs	r2, #1
+ 8000d1e:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8000e44:	193b      	adds	r3, r7, r4
- 8000e46:	2200      	movs	r2, #0
- 8000e48:	609a      	str	r2, [r3, #8]
+ 8000d20:	193b      	adds	r3, r7, r4
+ 8000d22:	2200      	movs	r2, #0
+ 8000d24:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8000e4a:	193b      	adds	r3, r7, r4
- 8000e4c:	2200      	movs	r2, #0
- 8000e4e:	60da      	str	r2, [r3, #12]
+ 8000d26:	193b      	adds	r3, r7, r4
+ 8000d28:	2200      	movs	r2, #0
+ 8000d2a:	60da      	str	r2, [r3, #12]
   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 8000e50:	193b      	adds	r3, r7, r4
- 8000e52:	4a37      	ldr	r2, [pc, #220]	; (8000f30 <MX_GPIO_Init+0x1d8>)
- 8000e54:	0019      	movs	r1, r3
- 8000e56:	0010      	movs	r0, r2
- 8000e58:	f000 fff2 	bl	8001e40 <HAL_GPIO_Init>
+ 8000d2c:	193b      	adds	r3, r7, r4
+ 8000d2e:	4a37      	ldr	r2, [pc, #220]	; (8000e0c <MX_GPIO_Init+0x1d8>)
+ 8000d30:	0019      	movs	r1, r3
+ 8000d32:	0010      	movs	r0, r2
+ 8000d34:	f000 ff3e 	bl	8001bb4 <HAL_GPIO_Init>
 
   /*Configure GPIO pin : IR_RX_Pin */
   GPIO_InitStruct.Pin = IR_RX_Pin;
- 8000e5c:	193b      	adds	r3, r7, r4
- 8000e5e:	2202      	movs	r2, #2
- 8000e60:	601a      	str	r2, [r3, #0]
+ 8000d38:	193b      	adds	r3, r7, r4
+ 8000d3a:	2202      	movs	r2, #2
+ 8000d3c:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- 8000e62:	193b      	adds	r3, r7, r4
- 8000e64:	2200      	movs	r2, #0
- 8000e66:	605a      	str	r2, [r3, #4]
+ 8000d3e:	193b      	adds	r3, r7, r4
+ 8000d40:	2200      	movs	r2, #0
+ 8000d42:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8000e68:	193b      	adds	r3, r7, r4
- 8000e6a:	2200      	movs	r2, #0
- 8000e6c:	609a      	str	r2, [r3, #8]
+ 8000d44:	193b      	adds	r3, r7, r4
+ 8000d46:	2200      	movs	r2, #0
+ 8000d48:	609a      	str	r2, [r3, #8]
   HAL_GPIO_Init(IR_RX_GPIO_Port, &GPIO_InitStruct);
- 8000e6e:	193a      	adds	r2, r7, r4
- 8000e70:	23a0      	movs	r3, #160	; 0xa0
- 8000e72:	05db      	lsls	r3, r3, #23
- 8000e74:	0011      	movs	r1, r2
- 8000e76:	0018      	movs	r0, r3
- 8000e78:	f000 ffe2 	bl	8001e40 <HAL_GPIO_Init>
+ 8000d4a:	193a      	adds	r2, r7, r4
+ 8000d4c:	23a0      	movs	r3, #160	; 0xa0
+ 8000d4e:	05db      	lsls	r3, r3, #23
+ 8000d50:	0011      	movs	r1, r2
+ 8000d52:	0018      	movs	r0, r3
+ 8000d54:	f000 ff2e 	bl	8001bb4 <HAL_GPIO_Init>
 
   /*Configure GPIO pins : EXPANSION_4_Pin EXPANSION_PS_Pin DC_boost_Pin */
   GPIO_InitStruct.Pin = EXPANSION_4_Pin|EXPANSION_PS_Pin|DC_boost_Pin;
- 8000e7c:	193b      	adds	r3, r7, r4
- 8000e7e:	4a2d      	ldr	r2, [pc, #180]	; (8000f34 <MX_GPIO_Init+0x1dc>)
- 8000e80:	601a      	str	r2, [r3, #0]
+ 8000d58:	193b      	adds	r3, r7, r4
+ 8000d5a:	4a2d      	ldr	r2, [pc, #180]	; (8000e10 <MX_GPIO_Init+0x1dc>)
+ 8000d5c:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8000e82:	193b      	adds	r3, r7, r4
- 8000e84:	2201      	movs	r2, #1
- 8000e86:	605a      	str	r2, [r3, #4]
+ 8000d5e:	193b      	adds	r3, r7, r4
+ 8000d60:	2201      	movs	r2, #1
+ 8000d62:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8000e88:	193b      	adds	r3, r7, r4
- 8000e8a:	2200      	movs	r2, #0
- 8000e8c:	609a      	str	r2, [r3, #8]
+ 8000d64:	193b      	adds	r3, r7, r4
+ 8000d66:	2200      	movs	r2, #0
+ 8000d68:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8000e8e:	193b      	adds	r3, r7, r4
- 8000e90:	2200      	movs	r2, #0
- 8000e92:	60da      	str	r2, [r3, #12]
+ 8000d6a:	193b      	adds	r3, r7, r4
+ 8000d6c:	2200      	movs	r2, #0
+ 8000d6e:	60da      	str	r2, [r3, #12]
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000e94:	193a      	adds	r2, r7, r4
- 8000e96:	23a0      	movs	r3, #160	; 0xa0
- 8000e98:	05db      	lsls	r3, r3, #23
- 8000e9a:	0011      	movs	r1, r2
- 8000e9c:	0018      	movs	r0, r3
- 8000e9e:	f000 ffcf 	bl	8001e40 <HAL_GPIO_Init>
+ 8000d70:	193a      	adds	r2, r7, r4
+ 8000d72:	23a0      	movs	r3, #160	; 0xa0
+ 8000d74:	05db      	lsls	r3, r3, #23
+ 8000d76:	0011      	movs	r1, r2
+ 8000d78:	0018      	movs	r0, r3
+ 8000d7a:	f000 ff1b 	bl	8001bb4 <HAL_GPIO_Init>
 
   /*Configure GPIO pins : RF_Boost_Pin ADF_TX_Data_Pin GPS_ON_Pin RADIO_EN_Pin
                            Trmp_R4_Pin Temp_R2_Pin Temp_R1_Pin EXPANSION_3_Pin
                            Temp_R5_Pin Temp_R3_Pin */
   GPIO_InitStruct.Pin = RF_Boost_Pin|ADF_TX_Data_Pin|GPS_ON_Pin|RADIO_EN_Pin
- 8000ea2:	193b      	adds	r3, r7, r4
- 8000ea4:	4a24      	ldr	r2, [pc, #144]	; (8000f38 <MX_GPIO_Init+0x1e0>)
- 8000ea6:	601a      	str	r2, [r3, #0]
+ 8000d7e:	193b      	adds	r3, r7, r4
+ 8000d80:	4a24      	ldr	r2, [pc, #144]	; (8000e14 <MX_GPIO_Init+0x1e0>)
+ 8000d82:	601a      	str	r2, [r3, #0]
                           |Trmp_R4_Pin|Temp_R2_Pin|Temp_R1_Pin|EXPANSION_3_Pin
                           |Temp_R5_Pin|Temp_R3_Pin;
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8000ea8:	193b      	adds	r3, r7, r4
- 8000eaa:	2201      	movs	r2, #1
- 8000eac:	605a      	str	r2, [r3, #4]
+ 8000d84:	193b      	adds	r3, r7, r4
+ 8000d86:	2201      	movs	r2, #1
+ 8000d88:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8000eae:	193b      	adds	r3, r7, r4
- 8000eb0:	2200      	movs	r2, #0
- 8000eb2:	609a      	str	r2, [r3, #8]
+ 8000d8a:	193b      	adds	r3, r7, r4
+ 8000d8c:	2200      	movs	r2, #0
+ 8000d8e:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8000eb4:	193b      	adds	r3, r7, r4
- 8000eb6:	2200      	movs	r2, #0
- 8000eb8:	60da      	str	r2, [r3, #12]
+ 8000d90:	193b      	adds	r3, r7, r4
+ 8000d92:	2200      	movs	r2, #0
+ 8000d94:	60da      	str	r2, [r3, #12]
   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 8000eba:	193b      	adds	r3, r7, r4
- 8000ebc:	4a1f      	ldr	r2, [pc, #124]	; (8000f3c <MX_GPIO_Init+0x1e4>)
- 8000ebe:	0019      	movs	r1, r3
- 8000ec0:	0010      	movs	r0, r2
- 8000ec2:	f000 ffbd 	bl	8001e40 <HAL_GPIO_Init>
+ 8000d96:	193b      	adds	r3, r7, r4
+ 8000d98:	4a1f      	ldr	r2, [pc, #124]	; (8000e18 <MX_GPIO_Init+0x1e4>)
+ 8000d9a:	0019      	movs	r1, r3
+ 8000d9c:	0010      	movs	r0, r2
+ 8000d9e:	f000 ff09 	bl	8001bb4 <HAL_GPIO_Init>
 
   /*Configure GPIO pin : PA8 */
   GPIO_InitStruct.Pin = GPIO_PIN_8;
- 8000ec6:	0021      	movs	r1, r4
- 8000ec8:	187b      	adds	r3, r7, r1
- 8000eca:	2280      	movs	r2, #128	; 0x80
- 8000ecc:	0052      	lsls	r2, r2, #1
- 8000ece:	601a      	str	r2, [r3, #0]
+ 8000da2:	0021      	movs	r1, r4
+ 8000da4:	187b      	adds	r3, r7, r1
+ 8000da6:	2280      	movs	r2, #128	; 0x80
+ 8000da8:	0052      	lsls	r2, r2, #1
+ 8000daa:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8000ed0:	000c      	movs	r4, r1
- 8000ed2:	193b      	adds	r3, r7, r4
- 8000ed4:	2202      	movs	r2, #2
- 8000ed6:	605a      	str	r2, [r3, #4]
+ 8000dac:	000c      	movs	r4, r1
+ 8000dae:	193b      	adds	r3, r7, r4
+ 8000db0:	2202      	movs	r2, #2
+ 8000db2:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8000ed8:	193b      	adds	r3, r7, r4
- 8000eda:	2200      	movs	r2, #0
- 8000edc:	609a      	str	r2, [r3, #8]
+ 8000db4:	193b      	adds	r3, r7, r4
+ 8000db6:	2200      	movs	r2, #0
+ 8000db8:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8000ede:	193b      	adds	r3, r7, r4
- 8000ee0:	2200      	movs	r2, #0
- 8000ee2:	60da      	str	r2, [r3, #12]
+ 8000dba:	193b      	adds	r3, r7, r4
+ 8000dbc:	2200      	movs	r2, #0
+ 8000dbe:	60da      	str	r2, [r3, #12]
   GPIO_InitStruct.Alternate = GPIO_AF0_MCO;
- 8000ee4:	193b      	adds	r3, r7, r4
- 8000ee6:	2200      	movs	r2, #0
- 8000ee8:	611a      	str	r2, [r3, #16]
+ 8000dc0:	193b      	adds	r3, r7, r4
+ 8000dc2:	2200      	movs	r2, #0
+ 8000dc4:	611a      	str	r2, [r3, #16]
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8000eea:	193a      	adds	r2, r7, r4
- 8000eec:	23a0      	movs	r3, #160	; 0xa0
- 8000eee:	05db      	lsls	r3, r3, #23
- 8000ef0:	0011      	movs	r1, r2
- 8000ef2:	0018      	movs	r0, r3
- 8000ef4:	f000 ffa4 	bl	8001e40 <HAL_GPIO_Init>
+ 8000dc6:	193a      	adds	r2, r7, r4
+ 8000dc8:	23a0      	movs	r3, #160	; 0xa0
+ 8000dca:	05db      	lsls	r3, r3, #23
+ 8000dcc:	0011      	movs	r1, r2
+ 8000dce:	0018      	movs	r0, r3
+ 8000dd0:	f000 fef0 	bl	8001bb4 <HAL_GPIO_Init>
 
   /*Configure GPIO pin : Battery_on_Pin */
   GPIO_InitStruct.Pin = Battery_on_Pin;
- 8000ef8:	0021      	movs	r1, r4
- 8000efa:	187b      	adds	r3, r7, r1
- 8000efc:	2204      	movs	r2, #4
- 8000efe:	601a      	str	r2, [r3, #0]
+ 8000dd4:	0021      	movs	r1, r4
+ 8000dd6:	187b      	adds	r3, r7, r1
+ 8000dd8:	2204      	movs	r2, #4
+ 8000dda:	601a      	str	r2, [r3, #0]
   GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- 8000f00:	187b      	adds	r3, r7, r1
- 8000f02:	2201      	movs	r2, #1
- 8000f04:	605a      	str	r2, [r3, #4]
+ 8000ddc:	187b      	adds	r3, r7, r1
+ 8000dde:	2201      	movs	r2, #1
+ 8000de0:	605a      	str	r2, [r3, #4]
   GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8000f06:	187b      	adds	r3, r7, r1
- 8000f08:	2200      	movs	r2, #0
- 8000f0a:	609a      	str	r2, [r3, #8]
+ 8000de2:	187b      	adds	r3, r7, r1
+ 8000de4:	2200      	movs	r2, #0
+ 8000de6:	609a      	str	r2, [r3, #8]
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- 8000f0c:	187b      	adds	r3, r7, r1
- 8000f0e:	2200      	movs	r2, #0
- 8000f10:	60da      	str	r2, [r3, #12]
+ 8000de8:	187b      	adds	r3, r7, r1
+ 8000dea:	2200      	movs	r2, #0
+ 8000dec:	60da      	str	r2, [r3, #12]
   HAL_GPIO_Init(Battery_on_GPIO_Port, &GPIO_InitStruct);
- 8000f12:	187b      	adds	r3, r7, r1
- 8000f14:	4a0a      	ldr	r2, [pc, #40]	; (8000f40 <MX_GPIO_Init+0x1e8>)
- 8000f16:	0019      	movs	r1, r3
- 8000f18:	0010      	movs	r0, r2
- 8000f1a:	f000 ff91 	bl	8001e40 <HAL_GPIO_Init>
+ 8000dee:	187b      	adds	r3, r7, r1
+ 8000df0:	4a0a      	ldr	r2, [pc, #40]	; (8000e1c <MX_GPIO_Init+0x1e8>)
+ 8000df2:	0019      	movs	r1, r3
+ 8000df4:	0010      	movs	r0, r2
+ 8000df6:	f000 fedd 	bl	8001bb4 <HAL_GPIO_Init>
 
 /* USER CODE BEGIN MX_GPIO_Init_2 */
 /* USER CODE END MX_GPIO_Init_2 */
 }
- 8000f1e:	46c0      	nop			; (mov r8, r8)
- 8000f20:	46bd      	mov	sp, r7
- 8000f22:	b00b      	add	sp, #44	; 0x2c
- 8000f24:	bd90      	pop	{r4, r7, pc}
- 8000f26:	46c0      	nop			; (mov r8, r8)
- 8000f28:	40021000 	.word	0x40021000
- 8000f2c:	000053a3 	.word	0x000053a3
- 8000f30:	50000800 	.word	0x50000800
- 8000f34:	0000100c 	.word	0x0000100c
- 8000f38:	0000f3f0 	.word	0x0000f3f0
- 8000f3c:	50000400 	.word	0x50000400
- 8000f40:	50000c00 	.word	0x50000c00
+ 8000dfa:	46c0      	nop			; (mov r8, r8)
+ 8000dfc:	46bd      	mov	sp, r7
+ 8000dfe:	b00b      	add	sp, #44	; 0x2c
+ 8000e00:	bd90      	pop	{r4, r7, pc}
+ 8000e02:	46c0      	nop			; (mov r8, r8)
+ 8000e04:	40021000 	.word	0x40021000
+ 8000e08:	000053a3 	.word	0x000053a3
+ 8000e0c:	50000800 	.word	0x50000800
+ 8000e10:	0000100c 	.word	0x0000100c
+ 8000e14:	0000f3f0 	.word	0x0000f3f0
+ 8000e18:	50000400 	.word	0x50000400
+ 8000e1c:	50000c00 	.word	0x50000c00
 
-08000f44 <HAL_UART_RxCpltCallback>:
-
-/* USER CODE BEGIN 4 */
-void HAL_UART_RxCpltCallback(UART_HandleTypeDef *hlpuart)
-{
- 8000f44:	b580      	push	{r7, lr}
- 8000f46:	b082      	sub	sp, #8
- 8000f48:	af00      	add	r7, sp, #0
- 8000f4a:	6078      	str	r0, [r7, #4]
-    HAL_UART_Receive_IT(&hlpuart1, onebyte, 1);
- 8000f4c:	4906      	ldr	r1, [pc, #24]	; (8000f68 <HAL_UART_RxCpltCallback+0x24>)
- 8000f4e:	4b07      	ldr	r3, [pc, #28]	; (8000f6c <HAL_UART_RxCpltCallback+0x28>)
- 8000f50:	2201      	movs	r2, #1
- 8000f52:	0018      	movs	r0, r3
- 8000f54:	f002 fd8a 	bl	8003a6c <HAL_UART_Receive_IT>
-    rec = 1;
- 8000f58:	4b05      	ldr	r3, [pc, #20]	; (8000f70 <HAL_UART_RxCpltCallback+0x2c>)
- 8000f5a:	2201      	movs	r2, #1
- 8000f5c:	701a      	strb	r2, [r3, #0]
-}
- 8000f5e:	46c0      	nop			; (mov r8, r8)
- 8000f60:	46bd      	mov	sp, r7
- 8000f62:	b002      	add	sp, #8
- 8000f64:	bd80      	pop	{r7, pc}
- 8000f66:	46c0      	nop			; (mov r8, r8)
- 8000f68:	200002c4 	.word	0x200002c4
- 8000f6c:	200000d4 	.word	0x200000d4
- 8000f70:	200002c5 	.word	0x200002c5
-
-08000f74 <Error_Handler>:
+08000e20 <Error_Handler>:
 /**
   * @brief  This function is executed in case of error occurrence.
   * @retval None
   */
 void Error_Handler(void)
 {
- 8000f74:	b580      	push	{r7, lr}
- 8000f76:	af00      	add	r7, sp, #0
+ 8000e20:	b580      	push	{r7, lr}
+ 8000e22:	af00      	add	r7, sp, #0
   \details Disables IRQ interrupts by setting the I-bit in the CPSR.
            Can only be executed in Privileged modes.
  */
 __STATIC_FORCEINLINE void __disable_irq(void)
 {
   __ASM volatile ("cpsid i" : : : "memory");
- 8000f78:	b672      	cpsid	i
+ 8000e24:	b672      	cpsid	i
 }
- 8000f7a:	46c0      	nop			; (mov r8, r8)
+ 8000e26:	46c0      	nop			; (mov r8, r8)
   /* USER CODE BEGIN Error_Handler_Debug */
   /* User can add his own implementation to report the HAL error return state */
   __disable_irq();
   while (1)
- 8000f7c:	e7fe      	b.n	8000f7c <Error_Handler+0x8>
+ 8000e28:	e7fe      	b.n	8000e28 <Error_Handler+0x8>
 	...
 
-08000f80 <HAL_MspInit>:
+08000e2c <HAL_MspInit>:
 /* USER CODE END 0 */
 /**
   * Initializes the Global MSP.
   */
 void HAL_MspInit(void)
 {
- 8000f80:	b580      	push	{r7, lr}
- 8000f82:	af00      	add	r7, sp, #0
+ 8000e2c:	b580      	push	{r7, lr}
+ 8000e2e:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN MspInit 0 */
 
   /* USER CODE END MspInit 0 */
 
   __HAL_RCC_SYSCFG_CLK_ENABLE();
- 8000f84:	4b07      	ldr	r3, [pc, #28]	; (8000fa4 <HAL_MspInit+0x24>)
- 8000f86:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 8000f88:	4b06      	ldr	r3, [pc, #24]	; (8000fa4 <HAL_MspInit+0x24>)
- 8000f8a:	2101      	movs	r1, #1
- 8000f8c:	430a      	orrs	r2, r1
- 8000f8e:	635a      	str	r2, [r3, #52]	; 0x34
+ 8000e30:	4b07      	ldr	r3, [pc, #28]	; (8000e50 <HAL_MspInit+0x24>)
+ 8000e32:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 8000e34:	4b06      	ldr	r3, [pc, #24]	; (8000e50 <HAL_MspInit+0x24>)
+ 8000e36:	2101      	movs	r1, #1
+ 8000e38:	430a      	orrs	r2, r1
+ 8000e3a:	635a      	str	r2, [r3, #52]	; 0x34
   __HAL_RCC_PWR_CLK_ENABLE();
- 8000f90:	4b04      	ldr	r3, [pc, #16]	; (8000fa4 <HAL_MspInit+0x24>)
- 8000f92:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 8000f94:	4b03      	ldr	r3, [pc, #12]	; (8000fa4 <HAL_MspInit+0x24>)
- 8000f96:	2180      	movs	r1, #128	; 0x80
- 8000f98:	0549      	lsls	r1, r1, #21
- 8000f9a:	430a      	orrs	r2, r1
- 8000f9c:	639a      	str	r2, [r3, #56]	; 0x38
+ 8000e3c:	4b04      	ldr	r3, [pc, #16]	; (8000e50 <HAL_MspInit+0x24>)
+ 8000e3e:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 8000e40:	4b03      	ldr	r3, [pc, #12]	; (8000e50 <HAL_MspInit+0x24>)
+ 8000e42:	2180      	movs	r1, #128	; 0x80
+ 8000e44:	0549      	lsls	r1, r1, #21
+ 8000e46:	430a      	orrs	r2, r1
+ 8000e48:	639a      	str	r2, [r3, #56]	; 0x38
   /* System interrupt init*/
 
   /* USER CODE BEGIN MspInit 1 */
 
   /* USER CODE END MspInit 1 */
 }
- 8000f9e:	46c0      	nop			; (mov r8, r8)
- 8000fa0:	46bd      	mov	sp, r7
- 8000fa2:	bd80      	pop	{r7, pc}
- 8000fa4:	40021000 	.word	0x40021000
+ 8000e4a:	46c0      	nop			; (mov r8, r8)
+ 8000e4c:	46bd      	mov	sp, r7
+ 8000e4e:	bd80      	pop	{r7, pc}
+ 8000e50:	40021000 	.word	0x40021000
 
-08000fa8 <HAL_ADC_MspInit>:
+08000e54 <HAL_ADC_MspInit>:
 * This function configures the hardware resources used in this example
 * @param hadc: ADC handle pointer
 * @retval None
 */
 void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
 {
- 8000fa8:	b590      	push	{r4, r7, lr}
- 8000faa:	b08b      	sub	sp, #44	; 0x2c
- 8000fac:	af00      	add	r7, sp, #0
- 8000fae:	6078      	str	r0, [r7, #4]
+ 8000e54:	b590      	push	{r4, r7, lr}
+ 8000e56:	b08b      	sub	sp, #44	; 0x2c
+ 8000e58:	af00      	add	r7, sp, #0
+ 8000e5a:	6078      	str	r0, [r7, #4]
   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8000fb0:	2414      	movs	r4, #20
- 8000fb2:	193b      	adds	r3, r7, r4
- 8000fb4:	0018      	movs	r0, r3
- 8000fb6:	2314      	movs	r3, #20
- 8000fb8:	001a      	movs	r2, r3
- 8000fba:	2100      	movs	r1, #0
- 8000fbc:	f004 f858 	bl	8005070 <memset>
+ 8000e5c:	2414      	movs	r4, #20
+ 8000e5e:	193b      	adds	r3, r7, r4
+ 8000e60:	0018      	movs	r0, r3
+ 8000e62:	2314      	movs	r3, #20
+ 8000e64:	001a      	movs	r2, r3
+ 8000e66:	2100      	movs	r1, #0
+ 8000e68:	f003 fa6e 	bl	8004348 <memset>
   if(hadc->Instance==ADC1)
- 8000fc0:	687b      	ldr	r3, [r7, #4]
- 8000fc2:	681b      	ldr	r3, [r3, #0]
- 8000fc4:	4a22      	ldr	r2, [pc, #136]	; (8001050 <HAL_ADC_MspInit+0xa8>)
- 8000fc6:	4293      	cmp	r3, r2
- 8000fc8:	d13d      	bne.n	8001046 <HAL_ADC_MspInit+0x9e>
+ 8000e6c:	687b      	ldr	r3, [r7, #4]
+ 8000e6e:	681b      	ldr	r3, [r3, #0]
+ 8000e70:	4a22      	ldr	r2, [pc, #136]	; (8000efc <HAL_ADC_MspInit+0xa8>)
+ 8000e72:	4293      	cmp	r3, r2
+ 8000e74:	d13d      	bne.n	8000ef2 <HAL_ADC_MspInit+0x9e>
   {
   /* USER CODE BEGIN ADC1_MspInit 0 */
 
   /* USER CODE END ADC1_MspInit 0 */
     /* Peripheral clock enable */
     __HAL_RCC_ADC1_CLK_ENABLE();
- 8000fca:	4b22      	ldr	r3, [pc, #136]	; (8001054 <HAL_ADC_MspInit+0xac>)
- 8000fcc:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 8000fce:	4b21      	ldr	r3, [pc, #132]	; (8001054 <HAL_ADC_MspInit+0xac>)
- 8000fd0:	2180      	movs	r1, #128	; 0x80
- 8000fd2:	0089      	lsls	r1, r1, #2
- 8000fd4:	430a      	orrs	r2, r1
- 8000fd6:	635a      	str	r2, [r3, #52]	; 0x34
+ 8000e76:	4b22      	ldr	r3, [pc, #136]	; (8000f00 <HAL_ADC_MspInit+0xac>)
+ 8000e78:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 8000e7a:	4b21      	ldr	r3, [pc, #132]	; (8000f00 <HAL_ADC_MspInit+0xac>)
+ 8000e7c:	2180      	movs	r1, #128	; 0x80
+ 8000e7e:	0089      	lsls	r1, r1, #2
+ 8000e80:	430a      	orrs	r2, r1
+ 8000e82:	635a      	str	r2, [r3, #52]	; 0x34
 
     __HAL_RCC_GPIOC_CLK_ENABLE();
- 8000fd8:	4b1e      	ldr	r3, [pc, #120]	; (8001054 <HAL_ADC_MspInit+0xac>)
- 8000fda:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8000fdc:	4b1d      	ldr	r3, [pc, #116]	; (8001054 <HAL_ADC_MspInit+0xac>)
- 8000fde:	2104      	movs	r1, #4
- 8000fe0:	430a      	orrs	r2, r1
- 8000fe2:	62da      	str	r2, [r3, #44]	; 0x2c
- 8000fe4:	4b1b      	ldr	r3, [pc, #108]	; (8001054 <HAL_ADC_MspInit+0xac>)
- 8000fe6:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8000fe8:	2204      	movs	r2, #4
- 8000fea:	4013      	ands	r3, r2
- 8000fec:	613b      	str	r3, [r7, #16]
- 8000fee:	693b      	ldr	r3, [r7, #16]
+ 8000e84:	4b1e      	ldr	r3, [pc, #120]	; (8000f00 <HAL_ADC_MspInit+0xac>)
+ 8000e86:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8000e88:	4b1d      	ldr	r3, [pc, #116]	; (8000f00 <HAL_ADC_MspInit+0xac>)
+ 8000e8a:	2104      	movs	r1, #4
+ 8000e8c:	430a      	orrs	r2, r1
+ 8000e8e:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000e90:	4b1b      	ldr	r3, [pc, #108]	; (8000f00 <HAL_ADC_MspInit+0xac>)
+ 8000e92:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8000e94:	2204      	movs	r2, #4
+ 8000e96:	4013      	ands	r3, r2
+ 8000e98:	613b      	str	r3, [r7, #16]
+ 8000e9a:	693b      	ldr	r3, [r7, #16]
     __HAL_RCC_GPIOB_CLK_ENABLE();
- 8000ff0:	4b18      	ldr	r3, [pc, #96]	; (8001054 <HAL_ADC_MspInit+0xac>)
- 8000ff2:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8000ff4:	4b17      	ldr	r3, [pc, #92]	; (8001054 <HAL_ADC_MspInit+0xac>)
- 8000ff6:	2102      	movs	r1, #2
- 8000ff8:	430a      	orrs	r2, r1
- 8000ffa:	62da      	str	r2, [r3, #44]	; 0x2c
- 8000ffc:	4b15      	ldr	r3, [pc, #84]	; (8001054 <HAL_ADC_MspInit+0xac>)
- 8000ffe:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8001000:	2202      	movs	r2, #2
- 8001002:	4013      	ands	r3, r2
- 8001004:	60fb      	str	r3, [r7, #12]
- 8001006:	68fb      	ldr	r3, [r7, #12]
+ 8000e9c:	4b18      	ldr	r3, [pc, #96]	; (8000f00 <HAL_ADC_MspInit+0xac>)
+ 8000e9e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8000ea0:	4b17      	ldr	r3, [pc, #92]	; (8000f00 <HAL_ADC_MspInit+0xac>)
+ 8000ea2:	2102      	movs	r1, #2
+ 8000ea4:	430a      	orrs	r2, r1
+ 8000ea6:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000ea8:	4b15      	ldr	r3, [pc, #84]	; (8000f00 <HAL_ADC_MspInit+0xac>)
+ 8000eaa:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8000eac:	2202      	movs	r2, #2
+ 8000eae:	4013      	ands	r3, r2
+ 8000eb0:	60fb      	str	r3, [r7, #12]
+ 8000eb2:	68fb      	ldr	r3, [r7, #12]
     /**ADC GPIO Configuration
     PC3     ------> ADC_IN13
     PC4     ------> ADC_IN14
     PB1     ------> ADC_IN9
     */
     GPIO_InitStruct.Pin = Heater_ADC_2_Pin|Temp_ADC_Pin;
- 8001008:	193b      	adds	r3, r7, r4
- 800100a:	2218      	movs	r2, #24
- 800100c:	601a      	str	r2, [r3, #0]
+ 8000eb4:	193b      	adds	r3, r7, r4
+ 8000eb6:	2218      	movs	r2, #24
+ 8000eb8:	601a      	str	r2, [r3, #0]
     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 800100e:	193b      	adds	r3, r7, r4
- 8001010:	2203      	movs	r2, #3
- 8001012:	605a      	str	r2, [r3, #4]
+ 8000eba:	193b      	adds	r3, r7, r4
+ 8000ebc:	2203      	movs	r2, #3
+ 8000ebe:	605a      	str	r2, [r3, #4]
     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001014:	193b      	adds	r3, r7, r4
- 8001016:	2200      	movs	r2, #0
- 8001018:	609a      	str	r2, [r3, #8]
+ 8000ec0:	193b      	adds	r3, r7, r4
+ 8000ec2:	2200      	movs	r2, #0
+ 8000ec4:	609a      	str	r2, [r3, #8]
     HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 800101a:	193b      	adds	r3, r7, r4
- 800101c:	4a0e      	ldr	r2, [pc, #56]	; (8001058 <HAL_ADC_MspInit+0xb0>)
- 800101e:	0019      	movs	r1, r3
- 8001020:	0010      	movs	r0, r2
- 8001022:	f000 ff0d 	bl	8001e40 <HAL_GPIO_Init>
+ 8000ec6:	193b      	adds	r3, r7, r4
+ 8000ec8:	4a0e      	ldr	r2, [pc, #56]	; (8000f04 <HAL_ADC_MspInit+0xb0>)
+ 8000eca:	0019      	movs	r1, r3
+ 8000ecc:	0010      	movs	r0, r2
+ 8000ece:	f000 fe71 	bl	8001bb4 <HAL_GPIO_Init>
 
     GPIO_InitStruct.Pin = Heater_ADC_1_Pin;
- 8001026:	0021      	movs	r1, r4
- 8001028:	187b      	adds	r3, r7, r1
- 800102a:	2202      	movs	r2, #2
- 800102c:	601a      	str	r2, [r3, #0]
+ 8000ed2:	0021      	movs	r1, r4
+ 8000ed4:	187b      	adds	r3, r7, r1
+ 8000ed6:	2202      	movs	r2, #2
+ 8000ed8:	601a      	str	r2, [r3, #0]
     GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- 800102e:	187b      	adds	r3, r7, r1
- 8001030:	2203      	movs	r2, #3
- 8001032:	605a      	str	r2, [r3, #4]
+ 8000eda:	187b      	adds	r3, r7, r1
+ 8000edc:	2203      	movs	r2, #3
+ 8000ede:	605a      	str	r2, [r3, #4]
     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001034:	187b      	adds	r3, r7, r1
- 8001036:	2200      	movs	r2, #0
- 8001038:	609a      	str	r2, [r3, #8]
+ 8000ee0:	187b      	adds	r3, r7, r1
+ 8000ee2:	2200      	movs	r2, #0
+ 8000ee4:	609a      	str	r2, [r3, #8]
     HAL_GPIO_Init(Heater_ADC_1_GPIO_Port, &GPIO_InitStruct);
- 800103a:	187b      	adds	r3, r7, r1
- 800103c:	4a07      	ldr	r2, [pc, #28]	; (800105c <HAL_ADC_MspInit+0xb4>)
- 800103e:	0019      	movs	r1, r3
- 8001040:	0010      	movs	r0, r2
- 8001042:	f000 fefd 	bl	8001e40 <HAL_GPIO_Init>
+ 8000ee6:	187b      	adds	r3, r7, r1
+ 8000ee8:	4a07      	ldr	r2, [pc, #28]	; (8000f08 <HAL_ADC_MspInit+0xb4>)
+ 8000eea:	0019      	movs	r1, r3
+ 8000eec:	0010      	movs	r0, r2
+ 8000eee:	f000 fe61 	bl	8001bb4 <HAL_GPIO_Init>
   /* USER CODE BEGIN ADC1_MspInit 1 */
 
   /* USER CODE END ADC1_MspInit 1 */
   }
 
 }
- 8001046:	46c0      	nop			; (mov r8, r8)
- 8001048:	46bd      	mov	sp, r7
- 800104a:	b00b      	add	sp, #44	; 0x2c
- 800104c:	bd90      	pop	{r4, r7, pc}
- 800104e:	46c0      	nop			; (mov r8, r8)
- 8001050:	40012400 	.word	0x40012400
- 8001054:	40021000 	.word	0x40021000
- 8001058:	50000800 	.word	0x50000800
- 800105c:	50000400 	.word	0x50000400
+ 8000ef2:	46c0      	nop			; (mov r8, r8)
+ 8000ef4:	46bd      	mov	sp, r7
+ 8000ef6:	b00b      	add	sp, #44	; 0x2c
+ 8000ef8:	bd90      	pop	{r4, r7, pc}
+ 8000efa:	46c0      	nop			; (mov r8, r8)
+ 8000efc:	40012400 	.word	0x40012400
+ 8000f00:	40021000 	.word	0x40021000
+ 8000f04:	50000800 	.word	0x50000800
+ 8000f08:	50000400 	.word	0x50000400
 
-08001060 <HAL_UART_MspInit>:
+08000f0c <HAL_UART_MspInit>:
 * This function configures the hardware resources used in this example
 * @param huart: UART handle pointer
 * @retval None
 */
 void HAL_UART_MspInit(UART_HandleTypeDef* huart)
 {
- 8001060:	b590      	push	{r4, r7, lr}
- 8001062:	b08b      	sub	sp, #44	; 0x2c
- 8001064:	af00      	add	r7, sp, #0
- 8001066:	6078      	str	r0, [r7, #4]
+ 8000f0c:	b590      	push	{r4, r7, lr}
+ 8000f0e:	b08b      	sub	sp, #44	; 0x2c
+ 8000f10:	af00      	add	r7, sp, #0
+ 8000f12:	6078      	str	r0, [r7, #4]
   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 8001068:	2414      	movs	r4, #20
- 800106a:	193b      	adds	r3, r7, r4
- 800106c:	0018      	movs	r0, r3
- 800106e:	2314      	movs	r3, #20
- 8001070:	001a      	movs	r2, r3
- 8001072:	2100      	movs	r1, #0
- 8001074:	f003 fffc 	bl	8005070 <memset>
+ 8000f14:	2414      	movs	r4, #20
+ 8000f16:	193b      	adds	r3, r7, r4
+ 8000f18:	0018      	movs	r0, r3
+ 8000f1a:	2314      	movs	r3, #20
+ 8000f1c:	001a      	movs	r2, r3
+ 8000f1e:	2100      	movs	r1, #0
+ 8000f20:	f003 fa12 	bl	8004348 <memset>
   if(huart->Instance==LPUART1)
- 8001078:	687b      	ldr	r3, [r7, #4]
- 800107a:	681b      	ldr	r3, [r3, #0]
- 800107c:	4a49      	ldr	r2, [pc, #292]	; (80011a4 <HAL_UART_MspInit+0x144>)
- 800107e:	4293      	cmp	r3, r2
- 8001080:	d132      	bne.n	80010e8 <HAL_UART_MspInit+0x88>
+ 8000f24:	687b      	ldr	r3, [r7, #4]
+ 8000f26:	681b      	ldr	r3, [r3, #0]
+ 8000f28:	4a45      	ldr	r2, [pc, #276]	; (8001040 <HAL_UART_MspInit+0x134>)
+ 8000f2a:	4293      	cmp	r3, r2
+ 8000f2c:	d12a      	bne.n	8000f84 <HAL_UART_MspInit+0x78>
   {
   /* USER CODE BEGIN LPUART1_MspInit 0 */
 
   /* USER CODE END LPUART1_MspInit 0 */
     /* Peripheral clock enable */
     __HAL_RCC_LPUART1_CLK_ENABLE();
- 8001082:	4b49      	ldr	r3, [pc, #292]	; (80011a8 <HAL_UART_MspInit+0x148>)
- 8001084:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 8001086:	4b48      	ldr	r3, [pc, #288]	; (80011a8 <HAL_UART_MspInit+0x148>)
- 8001088:	2180      	movs	r1, #128	; 0x80
- 800108a:	02c9      	lsls	r1, r1, #11
- 800108c:	430a      	orrs	r2, r1
- 800108e:	639a      	str	r2, [r3, #56]	; 0x38
+ 8000f2e:	4b45      	ldr	r3, [pc, #276]	; (8001044 <HAL_UART_MspInit+0x138>)
+ 8000f30:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 8000f32:	4b44      	ldr	r3, [pc, #272]	; (8001044 <HAL_UART_MspInit+0x138>)
+ 8000f34:	2180      	movs	r1, #128	; 0x80
+ 8000f36:	02c9      	lsls	r1, r1, #11
+ 8000f38:	430a      	orrs	r2, r1
+ 8000f3a:	639a      	str	r2, [r3, #56]	; 0x38
 
     __HAL_RCC_GPIOC_CLK_ENABLE();
- 8001090:	4b45      	ldr	r3, [pc, #276]	; (80011a8 <HAL_UART_MspInit+0x148>)
- 8001092:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8001094:	4b44      	ldr	r3, [pc, #272]	; (80011a8 <HAL_UART_MspInit+0x148>)
- 8001096:	2104      	movs	r1, #4
- 8001098:	430a      	orrs	r2, r1
- 800109a:	62da      	str	r2, [r3, #44]	; 0x2c
- 800109c:	4b42      	ldr	r3, [pc, #264]	; (80011a8 <HAL_UART_MspInit+0x148>)
- 800109e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 80010a0:	2204      	movs	r2, #4
- 80010a2:	4013      	ands	r3, r2
- 80010a4:	613b      	str	r3, [r7, #16]
- 80010a6:	693b      	ldr	r3, [r7, #16]
+ 8000f3c:	4b41      	ldr	r3, [pc, #260]	; (8001044 <HAL_UART_MspInit+0x138>)
+ 8000f3e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8000f40:	4b40      	ldr	r3, [pc, #256]	; (8001044 <HAL_UART_MspInit+0x138>)
+ 8000f42:	2104      	movs	r1, #4
+ 8000f44:	430a      	orrs	r2, r1
+ 8000f46:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000f48:	4b3e      	ldr	r3, [pc, #248]	; (8001044 <HAL_UART_MspInit+0x138>)
+ 8000f4a:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8000f4c:	2204      	movs	r2, #4
+ 8000f4e:	4013      	ands	r3, r2
+ 8000f50:	613b      	str	r3, [r7, #16]
+ 8000f52:	693b      	ldr	r3, [r7, #16]
     /**LPUART1 GPIO Configuration
     PC10     ------> LPUART1_TX
     PC11     ------> LPUART1_RX
     */
     GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
- 80010a8:	193b      	adds	r3, r7, r4
- 80010aa:	22c0      	movs	r2, #192	; 0xc0
- 80010ac:	0112      	lsls	r2, r2, #4
- 80010ae:	601a      	str	r2, [r3, #0]
+ 8000f54:	193b      	adds	r3, r7, r4
+ 8000f56:	22c0      	movs	r2, #192	; 0xc0
+ 8000f58:	0112      	lsls	r2, r2, #4
+ 8000f5a:	601a      	str	r2, [r3, #0]
     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 80010b0:	0021      	movs	r1, r4
- 80010b2:	187b      	adds	r3, r7, r1
- 80010b4:	2202      	movs	r2, #2
- 80010b6:	605a      	str	r2, [r3, #4]
+ 8000f5c:	0021      	movs	r1, r4
+ 8000f5e:	187b      	adds	r3, r7, r1
+ 8000f60:	2202      	movs	r2, #2
+ 8000f62:	605a      	str	r2, [r3, #4]
     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 80010b8:	187b      	adds	r3, r7, r1
- 80010ba:	2200      	movs	r2, #0
- 80010bc:	609a      	str	r2, [r3, #8]
+ 8000f64:	187b      	adds	r3, r7, r1
+ 8000f66:	2200      	movs	r2, #0
+ 8000f68:	609a      	str	r2, [r3, #8]
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 80010be:	187b      	adds	r3, r7, r1
- 80010c0:	2203      	movs	r2, #3
- 80010c2:	60da      	str	r2, [r3, #12]
+ 8000f6a:	187b      	adds	r3, r7, r1
+ 8000f6c:	2203      	movs	r2, #3
+ 8000f6e:	60da      	str	r2, [r3, #12]
     GPIO_InitStruct.Alternate = GPIO_AF0_LPUART1;
- 80010c4:	187b      	adds	r3, r7, r1
- 80010c6:	2200      	movs	r2, #0
- 80010c8:	611a      	str	r2, [r3, #16]
+ 8000f70:	187b      	adds	r3, r7, r1
+ 8000f72:	2200      	movs	r2, #0
+ 8000f74:	611a      	str	r2, [r3, #16]
     HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
- 80010ca:	187b      	adds	r3, r7, r1
- 80010cc:	4a37      	ldr	r2, [pc, #220]	; (80011ac <HAL_UART_MspInit+0x14c>)
- 80010ce:	0019      	movs	r1, r3
- 80010d0:	0010      	movs	r0, r2
- 80010d2:	f000 feb5 	bl	8001e40 <HAL_GPIO_Init>
-
-    /* LPUART1 interrupt Init */
-    HAL_NVIC_SetPriority(LPUART1_IRQn, 0, 0);
- 80010d6:	2200      	movs	r2, #0
- 80010d8:	2100      	movs	r1, #0
- 80010da:	201d      	movs	r0, #29
- 80010dc:	f000 fcd0 	bl	8001a80 <HAL_NVIC_SetPriority>
-    HAL_NVIC_EnableIRQ(LPUART1_IRQn);
- 80010e0:	201d      	movs	r0, #29
- 80010e2:	f000 fce2 	bl	8001aaa <HAL_NVIC_EnableIRQ>
+ 8000f76:	187b      	adds	r3, r7, r1
+ 8000f78:	4a33      	ldr	r2, [pc, #204]	; (8001048 <HAL_UART_MspInit+0x13c>)
+ 8000f7a:	0019      	movs	r1, r3
+ 8000f7c:	0010      	movs	r0, r2
+ 8000f7e:	f000 fe19 	bl	8001bb4 <HAL_GPIO_Init>
   /* USER CODE BEGIN USART1_MspInit 1 */
 
   /* USER CODE END USART1_MspInit 1 */
   }
 
 }
- 80010e6:	e058      	b.n	800119a <HAL_UART_MspInit+0x13a>
+ 8000f82:	e058      	b.n	8001036 <HAL_UART_MspInit+0x12a>
   else if(huart->Instance==USART1)
- 80010e8:	687b      	ldr	r3, [r7, #4]
- 80010ea:	681b      	ldr	r3, [r3, #0]
- 80010ec:	4a30      	ldr	r2, [pc, #192]	; (80011b0 <HAL_UART_MspInit+0x150>)
- 80010ee:	4293      	cmp	r3, r2
- 80010f0:	d153      	bne.n	800119a <HAL_UART_MspInit+0x13a>
+ 8000f84:	687b      	ldr	r3, [r7, #4]
+ 8000f86:	681b      	ldr	r3, [r3, #0]
+ 8000f88:	4a30      	ldr	r2, [pc, #192]	; (800104c <HAL_UART_MspInit+0x140>)
+ 8000f8a:	4293      	cmp	r3, r2
+ 8000f8c:	d153      	bne.n	8001036 <HAL_UART_MspInit+0x12a>
     __HAL_RCC_USART1_CLK_ENABLE();
- 80010f2:	4b2d      	ldr	r3, [pc, #180]	; (80011a8 <HAL_UART_MspInit+0x148>)
- 80010f4:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 80010f6:	4b2c      	ldr	r3, [pc, #176]	; (80011a8 <HAL_UART_MspInit+0x148>)
- 80010f8:	2180      	movs	r1, #128	; 0x80
- 80010fa:	01c9      	lsls	r1, r1, #7
- 80010fc:	430a      	orrs	r2, r1
- 80010fe:	635a      	str	r2, [r3, #52]	; 0x34
+ 8000f8e:	4b2d      	ldr	r3, [pc, #180]	; (8001044 <HAL_UART_MspInit+0x138>)
+ 8000f90:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 8000f92:	4b2c      	ldr	r3, [pc, #176]	; (8001044 <HAL_UART_MspInit+0x138>)
+ 8000f94:	2180      	movs	r1, #128	; 0x80
+ 8000f96:	01c9      	lsls	r1, r1, #7
+ 8000f98:	430a      	orrs	r2, r1
+ 8000f9a:	635a      	str	r2, [r3, #52]	; 0x34
     __HAL_RCC_GPIOA_CLK_ENABLE();
- 8001100:	4b29      	ldr	r3, [pc, #164]	; (80011a8 <HAL_UART_MspInit+0x148>)
- 8001102:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8001104:	4b28      	ldr	r3, [pc, #160]	; (80011a8 <HAL_UART_MspInit+0x148>)
- 8001106:	2101      	movs	r1, #1
- 8001108:	430a      	orrs	r2, r1
- 800110a:	62da      	str	r2, [r3, #44]	; 0x2c
- 800110c:	4b26      	ldr	r3, [pc, #152]	; (80011a8 <HAL_UART_MspInit+0x148>)
- 800110e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8001110:	2201      	movs	r2, #1
- 8001112:	4013      	ands	r3, r2
- 8001114:	60fb      	str	r3, [r7, #12]
- 8001116:	68fb      	ldr	r3, [r7, #12]
+ 8000f9c:	4b29      	ldr	r3, [pc, #164]	; (8001044 <HAL_UART_MspInit+0x138>)
+ 8000f9e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8000fa0:	4b28      	ldr	r3, [pc, #160]	; (8001044 <HAL_UART_MspInit+0x138>)
+ 8000fa2:	2101      	movs	r1, #1
+ 8000fa4:	430a      	orrs	r2, r1
+ 8000fa6:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8000fa8:	4b26      	ldr	r3, [pc, #152]	; (8001044 <HAL_UART_MspInit+0x138>)
+ 8000faa:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8000fac:	2201      	movs	r2, #1
+ 8000fae:	4013      	ands	r3, r2
+ 8000fb0:	60fb      	str	r3, [r7, #12]
+ 8000fb2:	68fb      	ldr	r3, [r7, #12]
     GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
- 8001118:	2114      	movs	r1, #20
- 800111a:	187b      	adds	r3, r7, r1
- 800111c:	22c0      	movs	r2, #192	; 0xc0
- 800111e:	00d2      	lsls	r2, r2, #3
- 8001120:	601a      	str	r2, [r3, #0]
+ 8000fb4:	2114      	movs	r1, #20
+ 8000fb6:	187b      	adds	r3, r7, r1
+ 8000fb8:	22c0      	movs	r2, #192	; 0xc0
+ 8000fba:	00d2      	lsls	r2, r2, #3
+ 8000fbc:	601a      	str	r2, [r3, #0]
     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 8001122:	187b      	adds	r3, r7, r1
- 8001124:	2202      	movs	r2, #2
- 8001126:	605a      	str	r2, [r3, #4]
+ 8000fbe:	187b      	adds	r3, r7, r1
+ 8000fc0:	2202      	movs	r2, #2
+ 8000fc2:	605a      	str	r2, [r3, #4]
     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001128:	187b      	adds	r3, r7, r1
- 800112a:	2200      	movs	r2, #0
- 800112c:	609a      	str	r2, [r3, #8]
+ 8000fc4:	187b      	adds	r3, r7, r1
+ 8000fc6:	2200      	movs	r2, #0
+ 8000fc8:	609a      	str	r2, [r3, #8]
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 800112e:	187b      	adds	r3, r7, r1
- 8001130:	2203      	movs	r2, #3
- 8001132:	60da      	str	r2, [r3, #12]
+ 8000fca:	187b      	adds	r3, r7, r1
+ 8000fcc:	2203      	movs	r2, #3
+ 8000fce:	60da      	str	r2, [r3, #12]
     GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
- 8001134:	187b      	adds	r3, r7, r1
- 8001136:	2204      	movs	r2, #4
- 8001138:	611a      	str	r2, [r3, #16]
+ 8000fd0:	187b      	adds	r3, r7, r1
+ 8000fd2:	2204      	movs	r2, #4
+ 8000fd4:	611a      	str	r2, [r3, #16]
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 800113a:	187a      	adds	r2, r7, r1
- 800113c:	23a0      	movs	r3, #160	; 0xa0
- 800113e:	05db      	lsls	r3, r3, #23
- 8001140:	0011      	movs	r1, r2
- 8001142:	0018      	movs	r0, r3
- 8001144:	f000 fe7c 	bl	8001e40 <HAL_GPIO_Init>
+ 8000fd6:	187a      	adds	r2, r7, r1
+ 8000fd8:	23a0      	movs	r3, #160	; 0xa0
+ 8000fda:	05db      	lsls	r3, r3, #23
+ 8000fdc:	0011      	movs	r1, r2
+ 8000fde:	0018      	movs	r0, r3
+ 8000fe0:	f000 fde8 	bl	8001bb4 <HAL_GPIO_Init>
     hdma_usart1_rx.Instance = DMA1_Channel3;
- 8001148:	4b1a      	ldr	r3, [pc, #104]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 800114a:	4a1b      	ldr	r2, [pc, #108]	; (80011b8 <HAL_UART_MspInit+0x158>)
- 800114c:	601a      	str	r2, [r3, #0]
+ 8000fe4:	4b1a      	ldr	r3, [pc, #104]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 8000fe6:	4a1b      	ldr	r2, [pc, #108]	; (8001054 <HAL_UART_MspInit+0x148>)
+ 8000fe8:	601a      	str	r2, [r3, #0]
     hdma_usart1_rx.Init.Request = DMA_REQUEST_3;
- 800114e:	4b19      	ldr	r3, [pc, #100]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 8001150:	2203      	movs	r2, #3
- 8001152:	605a      	str	r2, [r3, #4]
+ 8000fea:	4b19      	ldr	r3, [pc, #100]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 8000fec:	2203      	movs	r2, #3
+ 8000fee:	605a      	str	r2, [r3, #4]
     hdma_usart1_rx.Init.Direction = DMA_PERIPH_TO_MEMORY;
- 8001154:	4b17      	ldr	r3, [pc, #92]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 8001156:	2200      	movs	r2, #0
- 8001158:	609a      	str	r2, [r3, #8]
+ 8000ff0:	4b17      	ldr	r3, [pc, #92]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 8000ff2:	2200      	movs	r2, #0
+ 8000ff4:	609a      	str	r2, [r3, #8]
     hdma_usart1_rx.Init.PeriphInc = DMA_PINC_DISABLE;
- 800115a:	4b16      	ldr	r3, [pc, #88]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 800115c:	2200      	movs	r2, #0
- 800115e:	60da      	str	r2, [r3, #12]
+ 8000ff6:	4b16      	ldr	r3, [pc, #88]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 8000ff8:	2200      	movs	r2, #0
+ 8000ffa:	60da      	str	r2, [r3, #12]
     hdma_usart1_rx.Init.MemInc = DMA_MINC_ENABLE;
- 8001160:	4b14      	ldr	r3, [pc, #80]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 8001162:	2280      	movs	r2, #128	; 0x80
- 8001164:	611a      	str	r2, [r3, #16]
+ 8000ffc:	4b14      	ldr	r3, [pc, #80]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 8000ffe:	2280      	movs	r2, #128	; 0x80
+ 8001000:	611a      	str	r2, [r3, #16]
     hdma_usart1_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
- 8001166:	4b13      	ldr	r3, [pc, #76]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 8001168:	2200      	movs	r2, #0
- 800116a:	615a      	str	r2, [r3, #20]
+ 8001002:	4b13      	ldr	r3, [pc, #76]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 8001004:	2200      	movs	r2, #0
+ 8001006:	615a      	str	r2, [r3, #20]
     hdma_usart1_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
- 800116c:	4b11      	ldr	r3, [pc, #68]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 800116e:	2200      	movs	r2, #0
- 8001170:	619a      	str	r2, [r3, #24]
+ 8001008:	4b11      	ldr	r3, [pc, #68]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 800100a:	2200      	movs	r2, #0
+ 800100c:	619a      	str	r2, [r3, #24]
     hdma_usart1_rx.Init.Mode = DMA_NORMAL;
- 8001172:	4b10      	ldr	r3, [pc, #64]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 8001174:	2200      	movs	r2, #0
- 8001176:	61da      	str	r2, [r3, #28]
+ 800100e:	4b10      	ldr	r3, [pc, #64]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 8001010:	2200      	movs	r2, #0
+ 8001012:	61da      	str	r2, [r3, #28]
     hdma_usart1_rx.Init.Priority = DMA_PRIORITY_LOW;
- 8001178:	4b0e      	ldr	r3, [pc, #56]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 800117a:	2200      	movs	r2, #0
- 800117c:	621a      	str	r2, [r3, #32]
+ 8001014:	4b0e      	ldr	r3, [pc, #56]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 8001016:	2200      	movs	r2, #0
+ 8001018:	621a      	str	r2, [r3, #32]
     if (HAL_DMA_Init(&hdma_usart1_rx) != HAL_OK)
- 800117e:	4b0d      	ldr	r3, [pc, #52]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 8001180:	0018      	movs	r0, r3
- 8001182:	f000 fcaf 	bl	8001ae4 <HAL_DMA_Init>
- 8001186:	1e03      	subs	r3, r0, #0
- 8001188:	d001      	beq.n	800118e <HAL_UART_MspInit+0x12e>
+ 800101a:	4b0d      	ldr	r3, [pc, #52]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 800101c:	0018      	movs	r0, r3
+ 800101e:	f000 fca3 	bl	8001968 <HAL_DMA_Init>
+ 8001022:	1e03      	subs	r3, r0, #0
+ 8001024:	d001      	beq.n	800102a <HAL_UART_MspInit+0x11e>
       Error_Handler();
- 800118a:	f7ff fef3 	bl	8000f74 <Error_Handler>
+ 8001026:	f7ff fefb 	bl	8000e20 <Error_Handler>
     __HAL_LINKDMA(huart,hdmarx,hdma_usart1_rx);
- 800118e:	687b      	ldr	r3, [r7, #4]
- 8001190:	4a08      	ldr	r2, [pc, #32]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 8001192:	675a      	str	r2, [r3, #116]	; 0x74
- 8001194:	4b07      	ldr	r3, [pc, #28]	; (80011b4 <HAL_UART_MspInit+0x154>)
- 8001196:	687a      	ldr	r2, [r7, #4]
- 8001198:	629a      	str	r2, [r3, #40]	; 0x28
+ 800102a:	687b      	ldr	r3, [r7, #4]
+ 800102c:	4a08      	ldr	r2, [pc, #32]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 800102e:	675a      	str	r2, [r3, #116]	; 0x74
+ 8001030:	4b07      	ldr	r3, [pc, #28]	; (8001050 <HAL_UART_MspInit+0x144>)
+ 8001032:	687a      	ldr	r2, [r7, #4]
+ 8001034:	629a      	str	r2, [r3, #40]	; 0x28
 }
- 800119a:	46c0      	nop			; (mov r8, r8)
- 800119c:	46bd      	mov	sp, r7
- 800119e:	b00b      	add	sp, #44	; 0x2c
- 80011a0:	bd90      	pop	{r4, r7, pc}
- 80011a2:	46c0      	nop			; (mov r8, r8)
- 80011a4:	40004800 	.word	0x40004800
- 80011a8:	40021000 	.word	0x40021000
- 80011ac:	50000800 	.word	0x50000800
- 80011b0:	40013800 	.word	0x40013800
- 80011b4:	200001e4 	.word	0x200001e4
- 80011b8:	40020030 	.word	0x40020030
+ 8001036:	46c0      	nop			; (mov r8, r8)
+ 8001038:	46bd      	mov	sp, r7
+ 800103a:	b00b      	add	sp, #44	; 0x2c
+ 800103c:	bd90      	pop	{r4, r7, pc}
+ 800103e:	46c0      	nop			; (mov r8, r8)
+ 8001040:	40004800 	.word	0x40004800
+ 8001044:	40021000 	.word	0x40021000
+ 8001048:	50000800 	.word	0x50000800
+ 800104c:	40013800 	.word	0x40013800
+ 8001050:	200001e4 	.word	0x200001e4
+ 8001054:	40020030 	.word	0x40020030
 
-080011bc <HAL_SPI_MspInit>:
+08001058 <HAL_SPI_MspInit>:
 * This function configures the hardware resources used in this example
 * @param hspi: SPI handle pointer
 * @retval None
 */
 void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
 {
- 80011bc:	b590      	push	{r4, r7, lr}
- 80011be:	b089      	sub	sp, #36	; 0x24
- 80011c0:	af00      	add	r7, sp, #0
- 80011c2:	6078      	str	r0, [r7, #4]
+ 8001058:	b590      	push	{r4, r7, lr}
+ 800105a:	b089      	sub	sp, #36	; 0x24
+ 800105c:	af00      	add	r7, sp, #0
+ 800105e:	6078      	str	r0, [r7, #4]
   GPIO_InitTypeDef GPIO_InitStruct = {0};
- 80011c4:	240c      	movs	r4, #12
- 80011c6:	193b      	adds	r3, r7, r4
- 80011c8:	0018      	movs	r0, r3
- 80011ca:	2314      	movs	r3, #20
- 80011cc:	001a      	movs	r2, r3
- 80011ce:	2100      	movs	r1, #0
- 80011d0:	f003 ff4e 	bl	8005070 <memset>
+ 8001060:	240c      	movs	r4, #12
+ 8001062:	193b      	adds	r3, r7, r4
+ 8001064:	0018      	movs	r0, r3
+ 8001066:	2314      	movs	r3, #20
+ 8001068:	001a      	movs	r2, r3
+ 800106a:	2100      	movs	r1, #0
+ 800106c:	f003 f96c 	bl	8004348 <memset>
   if(hspi->Instance==SPI1)
- 80011d4:	687b      	ldr	r3, [r7, #4]
- 80011d6:	681b      	ldr	r3, [r3, #0]
- 80011d8:	4a18      	ldr	r2, [pc, #96]	; (800123c <HAL_SPI_MspInit+0x80>)
- 80011da:	4293      	cmp	r3, r2
- 80011dc:	d129      	bne.n	8001232 <HAL_SPI_MspInit+0x76>
+ 8001070:	687b      	ldr	r3, [r7, #4]
+ 8001072:	681b      	ldr	r3, [r3, #0]
+ 8001074:	4a18      	ldr	r2, [pc, #96]	; (80010d8 <HAL_SPI_MspInit+0x80>)
+ 8001076:	4293      	cmp	r3, r2
+ 8001078:	d129      	bne.n	80010ce <HAL_SPI_MspInit+0x76>
   {
   /* USER CODE BEGIN SPI1_MspInit 0 */
 
   /* USER CODE END SPI1_MspInit 0 */
     /* Peripheral clock enable */
     __HAL_RCC_SPI1_CLK_ENABLE();
- 80011de:	4b18      	ldr	r3, [pc, #96]	; (8001240 <HAL_SPI_MspInit+0x84>)
- 80011e0:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 80011e2:	4b17      	ldr	r3, [pc, #92]	; (8001240 <HAL_SPI_MspInit+0x84>)
- 80011e4:	2180      	movs	r1, #128	; 0x80
- 80011e6:	0149      	lsls	r1, r1, #5
- 80011e8:	430a      	orrs	r2, r1
- 80011ea:	635a      	str	r2, [r3, #52]	; 0x34
+ 800107a:	4b18      	ldr	r3, [pc, #96]	; (80010dc <HAL_SPI_MspInit+0x84>)
+ 800107c:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 800107e:	4b17      	ldr	r3, [pc, #92]	; (80010dc <HAL_SPI_MspInit+0x84>)
+ 8001080:	2180      	movs	r1, #128	; 0x80
+ 8001082:	0149      	lsls	r1, r1, #5
+ 8001084:	430a      	orrs	r2, r1
+ 8001086:	635a      	str	r2, [r3, #52]	; 0x34
 
     __HAL_RCC_GPIOA_CLK_ENABLE();
- 80011ec:	4b14      	ldr	r3, [pc, #80]	; (8001240 <HAL_SPI_MspInit+0x84>)
- 80011ee:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 80011f0:	4b13      	ldr	r3, [pc, #76]	; (8001240 <HAL_SPI_MspInit+0x84>)
- 80011f2:	2101      	movs	r1, #1
- 80011f4:	430a      	orrs	r2, r1
- 80011f6:	62da      	str	r2, [r3, #44]	; 0x2c
- 80011f8:	4b11      	ldr	r3, [pc, #68]	; (8001240 <HAL_SPI_MspInit+0x84>)
- 80011fa:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 80011fc:	2201      	movs	r2, #1
- 80011fe:	4013      	ands	r3, r2
- 8001200:	60bb      	str	r3, [r7, #8]
- 8001202:	68bb      	ldr	r3, [r7, #8]
+ 8001088:	4b14      	ldr	r3, [pc, #80]	; (80010dc <HAL_SPI_MspInit+0x84>)
+ 800108a:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 800108c:	4b13      	ldr	r3, [pc, #76]	; (80010dc <HAL_SPI_MspInit+0x84>)
+ 800108e:	2101      	movs	r1, #1
+ 8001090:	430a      	orrs	r2, r1
+ 8001092:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8001094:	4b11      	ldr	r3, [pc, #68]	; (80010dc <HAL_SPI_MspInit+0x84>)
+ 8001096:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8001098:	2201      	movs	r2, #1
+ 800109a:	4013      	ands	r3, r2
+ 800109c:	60bb      	str	r3, [r7, #8]
+ 800109e:	68bb      	ldr	r3, [r7, #8]
     PA4     ------> SPI1_NSS
     PA5     ------> SPI1_SCK
     PA6     ------> SPI1_MISO
     PA7     ------> SPI1_MOSI
     */
     GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
- 8001204:	0021      	movs	r1, r4
- 8001206:	187b      	adds	r3, r7, r1
- 8001208:	22f0      	movs	r2, #240	; 0xf0
- 800120a:	601a      	str	r2, [r3, #0]
+ 80010a0:	0021      	movs	r1, r4
+ 80010a2:	187b      	adds	r3, r7, r1
+ 80010a4:	22f0      	movs	r2, #240	; 0xf0
+ 80010a6:	601a      	str	r2, [r3, #0]
     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
- 800120c:	187b      	adds	r3, r7, r1
- 800120e:	2202      	movs	r2, #2
- 8001210:	605a      	str	r2, [r3, #4]
+ 80010a8:	187b      	adds	r3, r7, r1
+ 80010aa:	2202      	movs	r2, #2
+ 80010ac:	605a      	str	r2, [r3, #4]
     GPIO_InitStruct.Pull = GPIO_NOPULL;
- 8001212:	187b      	adds	r3, r7, r1
- 8001214:	2200      	movs	r2, #0
- 8001216:	609a      	str	r2, [r3, #8]
+ 80010ae:	187b      	adds	r3, r7, r1
+ 80010b0:	2200      	movs	r2, #0
+ 80010b2:	609a      	str	r2, [r3, #8]
     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- 8001218:	187b      	adds	r3, r7, r1
- 800121a:	2203      	movs	r2, #3
- 800121c:	60da      	str	r2, [r3, #12]
+ 80010b4:	187b      	adds	r3, r7, r1
+ 80010b6:	2203      	movs	r2, #3
+ 80010b8:	60da      	str	r2, [r3, #12]
     GPIO_InitStruct.Alternate = GPIO_AF0_SPI1;
- 800121e:	187b      	adds	r3, r7, r1
- 8001220:	2200      	movs	r2, #0
- 8001222:	611a      	str	r2, [r3, #16]
+ 80010ba:	187b      	adds	r3, r7, r1
+ 80010bc:	2200      	movs	r2, #0
+ 80010be:	611a      	str	r2, [r3, #16]
     HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 8001224:	187a      	adds	r2, r7, r1
- 8001226:	23a0      	movs	r3, #160	; 0xa0
- 8001228:	05db      	lsls	r3, r3, #23
- 800122a:	0011      	movs	r1, r2
- 800122c:	0018      	movs	r0, r3
- 800122e:	f000 fe07 	bl	8001e40 <HAL_GPIO_Init>
+ 80010c0:	187a      	adds	r2, r7, r1
+ 80010c2:	23a0      	movs	r3, #160	; 0xa0
+ 80010c4:	05db      	lsls	r3, r3, #23
+ 80010c6:	0011      	movs	r1, r2
+ 80010c8:	0018      	movs	r0, r3
+ 80010ca:	f000 fd73 	bl	8001bb4 <HAL_GPIO_Init>
   /* USER CODE BEGIN SPI1_MspInit 1 */
 
   /* USER CODE END SPI1_MspInit 1 */
   }
 
 }
- 8001232:	46c0      	nop			; (mov r8, r8)
- 8001234:	46bd      	mov	sp, r7
- 8001236:	b009      	add	sp, #36	; 0x24
- 8001238:	bd90      	pop	{r4, r7, pc}
- 800123a:	46c0      	nop			; (mov r8, r8)
- 800123c:	40013000 	.word	0x40013000
- 8001240:	40021000 	.word	0x40021000
+ 80010ce:	46c0      	nop			; (mov r8, r8)
+ 80010d0:	46bd      	mov	sp, r7
+ 80010d2:	b009      	add	sp, #36	; 0x24
+ 80010d4:	bd90      	pop	{r4, r7, pc}
+ 80010d6:	46c0      	nop			; (mov r8, r8)
+ 80010d8:	40013000 	.word	0x40013000
+ 80010dc:	40021000 	.word	0x40021000
 
-08001244 <HAL_TIM_Base_MspInit>:
+080010e0 <HAL_TIM_Base_MspInit>:
 * This function configures the hardware resources used in this example
 * @param htim_base: TIM_Base handle pointer
 * @retval None
 */
 void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
 {
- 8001244:	b580      	push	{r7, lr}
- 8001246:	b082      	sub	sp, #8
- 8001248:	af00      	add	r7, sp, #0
- 800124a:	6078      	str	r0, [r7, #4]
+ 80010e0:	b580      	push	{r7, lr}
+ 80010e2:	b082      	sub	sp, #8
+ 80010e4:	af00      	add	r7, sp, #0
+ 80010e6:	6078      	str	r0, [r7, #4]
   if(htim_base->Instance==TIM21)
- 800124c:	687b      	ldr	r3, [r7, #4]
- 800124e:	681b      	ldr	r3, [r3, #0]
- 8001250:	4a0a      	ldr	r2, [pc, #40]	; (800127c <HAL_TIM_Base_MspInit+0x38>)
- 8001252:	4293      	cmp	r3, r2
- 8001254:	d10d      	bne.n	8001272 <HAL_TIM_Base_MspInit+0x2e>
+ 80010e8:	687b      	ldr	r3, [r7, #4]
+ 80010ea:	681b      	ldr	r3, [r3, #0]
+ 80010ec:	4a0a      	ldr	r2, [pc, #40]	; (8001118 <HAL_TIM_Base_MspInit+0x38>)
+ 80010ee:	4293      	cmp	r3, r2
+ 80010f0:	d10d      	bne.n	800110e <HAL_TIM_Base_MspInit+0x2e>
   {
   /* USER CODE BEGIN TIM21_MspInit 0 */
 
   /* USER CODE END TIM21_MspInit 0 */
     /* Peripheral clock enable */
     __HAL_RCC_TIM21_CLK_ENABLE();
- 8001256:	4b0a      	ldr	r3, [pc, #40]	; (8001280 <HAL_TIM_Base_MspInit+0x3c>)
- 8001258:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 800125a:	4b09      	ldr	r3, [pc, #36]	; (8001280 <HAL_TIM_Base_MspInit+0x3c>)
- 800125c:	2104      	movs	r1, #4
- 800125e:	430a      	orrs	r2, r1
- 8001260:	635a      	str	r2, [r3, #52]	; 0x34
+ 80010f2:	4b0a      	ldr	r3, [pc, #40]	; (800111c <HAL_TIM_Base_MspInit+0x3c>)
+ 80010f4:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 80010f6:	4b09      	ldr	r3, [pc, #36]	; (800111c <HAL_TIM_Base_MspInit+0x3c>)
+ 80010f8:	2104      	movs	r1, #4
+ 80010fa:	430a      	orrs	r2, r1
+ 80010fc:	635a      	str	r2, [r3, #52]	; 0x34
     /* TIM21 interrupt Init */
     HAL_NVIC_SetPriority(TIM21_IRQn, 0, 0);
- 8001262:	2200      	movs	r2, #0
- 8001264:	2100      	movs	r1, #0
- 8001266:	2014      	movs	r0, #20
- 8001268:	f000 fc0a 	bl	8001a80 <HAL_NVIC_SetPriority>
+ 80010fe:	2200      	movs	r2, #0
+ 8001100:	2100      	movs	r1, #0
+ 8001102:	2014      	movs	r0, #20
+ 8001104:	f000 fbfe 	bl	8001904 <HAL_NVIC_SetPriority>
     HAL_NVIC_EnableIRQ(TIM21_IRQn);
- 800126c:	2014      	movs	r0, #20
- 800126e:	f000 fc1c 	bl	8001aaa <HAL_NVIC_EnableIRQ>
+ 8001108:	2014      	movs	r0, #20
+ 800110a:	f000 fc10 	bl	800192e <HAL_NVIC_EnableIRQ>
   /* USER CODE BEGIN TIM21_MspInit 1 */
 
   /* USER CODE END TIM21_MspInit 1 */
   }
 
 }
- 8001272:	46c0      	nop			; (mov r8, r8)
- 8001274:	46bd      	mov	sp, r7
- 8001276:	b002      	add	sp, #8
- 8001278:	bd80      	pop	{r7, pc}
- 800127a:	46c0      	nop			; (mov r8, r8)
- 800127c:	40010800 	.word	0x40010800
- 8001280:	40021000 	.word	0x40021000
+ 800110e:	46c0      	nop			; (mov r8, r8)
+ 8001110:	46bd      	mov	sp, r7
+ 8001112:	b002      	add	sp, #8
+ 8001114:	bd80      	pop	{r7, pc}
+ 8001116:	46c0      	nop			; (mov r8, r8)
+ 8001118:	40010800 	.word	0x40010800
+ 800111c:	40021000 	.word	0x40021000
 
-08001284 <NMI_Handler>:
+08001120 <NMI_Handler>:
 /******************************************************************************/
 /**
   * @brief This function handles Non maskable interrupt.
   */
 void NMI_Handler(void)
 {
- 8001284:	b580      	push	{r7, lr}
- 8001286:	af00      	add	r7, sp, #0
+ 8001120:	b580      	push	{r7, lr}
+ 8001122:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
 
   /* USER CODE END NonMaskableInt_IRQn 0 */
   HAL_RCC_NMI_IRQHandler();
- 8001288:	f001 fda8 	bl	8002ddc <HAL_RCC_NMI_IRQHandler>
+ 8001124:	f001 fd14 	bl	8002b50 <HAL_RCC_NMI_IRQHandler>
   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
   while (1)
- 800128c:	e7fe      	b.n	800128c <NMI_Handler+0x8>
+ 8001128:	e7fe      	b.n	8001128 <NMI_Handler+0x8>
 
-0800128e <HardFault_Handler>:
+0800112a <HardFault_Handler>:
 
 /**
   * @brief This function handles Hard fault interrupt.
   */
 void HardFault_Handler(void)
 {
- 800128e:	b580      	push	{r7, lr}
- 8001290:	af00      	add	r7, sp, #0
+ 800112a:	b580      	push	{r7, lr}
+ 800112c:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN HardFault_IRQn 0 */
 
   /* USER CODE END HardFault_IRQn 0 */
   while (1)
- 8001292:	e7fe      	b.n	8001292 <HardFault_Handler+0x4>
+ 800112e:	e7fe      	b.n	800112e <HardFault_Handler+0x4>
 
-08001294 <SVC_Handler>:
+08001130 <SVC_Handler>:
 
 /**
   * @brief This function handles System service call via SWI instruction.
   */
 void SVC_Handler(void)
 {
- 8001294:	b580      	push	{r7, lr}
- 8001296:	af00      	add	r7, sp, #0
+ 8001130:	b580      	push	{r7, lr}
+ 8001132:	af00      	add	r7, sp, #0
 
   /* USER CODE END SVC_IRQn 0 */
   /* USER CODE BEGIN SVC_IRQn 1 */
 
   /* USER CODE END SVC_IRQn 1 */
 }
- 8001298:	46c0      	nop			; (mov r8, r8)
- 800129a:	46bd      	mov	sp, r7
- 800129c:	bd80      	pop	{r7, pc}
+ 8001134:	46c0      	nop			; (mov r8, r8)
+ 8001136:	46bd      	mov	sp, r7
+ 8001138:	bd80      	pop	{r7, pc}
 
-0800129e <PendSV_Handler>:
+0800113a <PendSV_Handler>:
 
 /**
   * @brief This function handles Pendable request for system service.
   */
 void PendSV_Handler(void)
 {
- 800129e:	b580      	push	{r7, lr}
- 80012a0:	af00      	add	r7, sp, #0
+ 800113a:	b580      	push	{r7, lr}
+ 800113c:	af00      	add	r7, sp, #0
 
   /* USER CODE END PendSV_IRQn 0 */
   /* USER CODE BEGIN PendSV_IRQn 1 */
 
   /* USER CODE END PendSV_IRQn 1 */
 }
- 80012a2:	46c0      	nop			; (mov r8, r8)
- 80012a4:	46bd      	mov	sp, r7
- 80012a6:	bd80      	pop	{r7, pc}
+ 800113e:	46c0      	nop			; (mov r8, r8)
+ 8001140:	46bd      	mov	sp, r7
+ 8001142:	bd80      	pop	{r7, pc}
 
-080012a8 <SysTick_Handler>:
+08001144 <SysTick_Handler>:
 
 /**
   * @brief This function handles System tick timer.
   */
 void SysTick_Handler(void)
 {
- 80012a8:	b580      	push	{r7, lr}
- 80012aa:	af00      	add	r7, sp, #0
+ 8001144:	b580      	push	{r7, lr}
+ 8001146:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN SysTick_IRQn 0 */
 
   /* USER CODE END SysTick_IRQn 0 */
   HAL_IncTick();
- 80012ac:	f000 f8e2 	bl	8001474 <HAL_IncTick>
+ 8001148:	f000 f8d6 	bl	80012f8 <HAL_IncTick>
   /* USER CODE BEGIN SysTick_IRQn 1 */
 
   /* USER CODE END SysTick_IRQn 1 */
 }
- 80012b0:	46c0      	nop			; (mov r8, r8)
- 80012b2:	46bd      	mov	sp, r7
- 80012b4:	bd80      	pop	{r7, pc}
+ 800114c:	46c0      	nop			; (mov r8, r8)
+ 800114e:	46bd      	mov	sp, r7
+ 8001150:	bd80      	pop	{r7, pc}
 	...
 
-080012b8 <DMA1_Channel2_3_IRQHandler>:
+08001154 <DMA1_Channel2_3_IRQHandler>:
 
 /**
   * @brief This function handles DMA1 channel 2 and channel 3 interrupts.
   */
 void DMA1_Channel2_3_IRQHandler(void)
 {
- 80012b8:	b580      	push	{r7, lr}
- 80012ba:	af00      	add	r7, sp, #0
+ 8001154:	b580      	push	{r7, lr}
+ 8001156:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN DMA1_Channel2_3_IRQn 0 */
 
   /* USER CODE END DMA1_Channel2_3_IRQn 0 */
   HAL_DMA_IRQHandler(&hdma_usart1_rx);
- 80012bc:	4b03      	ldr	r3, [pc, #12]	; (80012cc <DMA1_Channel2_3_IRQHandler+0x14>)
- 80012be:	0018      	movs	r0, r3
- 80012c0:	f000 fd0f 	bl	8001ce2 <HAL_DMA_IRQHandler>
+ 8001158:	4b03      	ldr	r3, [pc, #12]	; (8001168 <DMA1_Channel2_3_IRQHandler+0x14>)
+ 800115a:	0018      	movs	r0, r3
+ 800115c:	f000 fc7c 	bl	8001a58 <HAL_DMA_IRQHandler>
   /* USER CODE BEGIN DMA1_Channel2_3_IRQn 1 */
 
   /* USER CODE END DMA1_Channel2_3_IRQn 1 */
 }
- 80012c4:	46c0      	nop			; (mov r8, r8)
- 80012c6:	46bd      	mov	sp, r7
- 80012c8:	bd80      	pop	{r7, pc}
- 80012ca:	46c0      	nop			; (mov r8, r8)
- 80012cc:	200001e4 	.word	0x200001e4
+ 8001160:	46c0      	nop			; (mov r8, r8)
+ 8001162:	46bd      	mov	sp, r7
+ 8001164:	bd80      	pop	{r7, pc}
+ 8001166:	46c0      	nop			; (mov r8, r8)
+ 8001168:	200001e4 	.word	0x200001e4
 
-080012d0 <TIM21_IRQHandler>:
+0800116c <TIM21_IRQHandler>:
 
 /**
   * @brief This function handles TIM21 global interrupt.
   */
 void TIM21_IRQHandler(void)
 {
- 80012d0:	b580      	push	{r7, lr}
- 80012d2:	af00      	add	r7, sp, #0
+ 800116c:	b580      	push	{r7, lr}
+ 800116e:	af00      	add	r7, sp, #0
   /* USER CODE BEGIN TIM21_IRQn 0 */
 
   /* USER CODE END TIM21_IRQn 0 */
   HAL_TIM_IRQHandler(&htim21);
- 80012d4:	4b03      	ldr	r3, [pc, #12]	; (80012e4 <TIM21_IRQHandler+0x14>)
- 80012d6:	0018      	movs	r0, r3
- 80012d8:	f001 ffaa 	bl	8003230 <HAL_TIM_IRQHandler>
+ 8001170:	4b03      	ldr	r3, [pc, #12]	; (8001180 <TIM21_IRQHandler+0x14>)
+ 8001172:	0018      	movs	r0, r3
+ 8001174:	f001 ff16 	bl	8002fa4 <HAL_TIM_IRQHandler>
   /* USER CODE BEGIN TIM21_IRQn 1 */
 
   /* USER CODE END TIM21_IRQn 1 */
 }
- 80012dc:	46c0      	nop			; (mov r8, r8)
- 80012de:	46bd      	mov	sp, r7
- 80012e0:	bd80      	pop	{r7, pc}
- 80012e2:	46c0      	nop			; (mov r8, r8)
- 80012e4:	20000284 	.word	0x20000284
+ 8001178:	46c0      	nop			; (mov r8, r8)
+ 800117a:	46bd      	mov	sp, r7
+ 800117c:	bd80      	pop	{r7, pc}
+ 800117e:	46c0      	nop			; (mov r8, r8)
+ 8001180:	20000284 	.word	0x20000284
 
-080012e8 <LPUART1_IRQHandler>:
-
-/**
-  * @brief This function handles LPUART1 global interrupt / LPUART1 wake-up interrupt through EXTI line 28.
-  */
-void LPUART1_IRQHandler(void)
-{
- 80012e8:	b580      	push	{r7, lr}
- 80012ea:	af00      	add	r7, sp, #0
-  /* USER CODE BEGIN LPUART1_IRQn 0 */
-
-  /* USER CODE END LPUART1_IRQn 0 */
-  HAL_UART_IRQHandler(&hlpuart1);
- 80012ec:	4b03      	ldr	r3, [pc, #12]	; (80012fc <LPUART1_IRQHandler+0x14>)
- 80012ee:	0018      	movs	r0, r3
- 80012f0:	f002 fc1a 	bl	8003b28 <HAL_UART_IRQHandler>
-  /* USER CODE BEGIN LPUART1_IRQn 1 */
-
-  /* USER CODE END LPUART1_IRQn 1 */
-}
- 80012f4:	46c0      	nop			; (mov r8, r8)
- 80012f6:	46bd      	mov	sp, r7
- 80012f8:	bd80      	pop	{r7, pc}
- 80012fa:	46c0      	nop			; (mov r8, r8)
- 80012fc:	200000d4 	.word	0x200000d4
-
-08001300 <_sbrk>:
+08001184 <_sbrk>:
  *
  * @param incr Memory size
  * @return Pointer to allocated memory
  */
 void *_sbrk(ptrdiff_t incr)
 {
- 8001300:	b580      	push	{r7, lr}
- 8001302:	b086      	sub	sp, #24
- 8001304:	af00      	add	r7, sp, #0
- 8001306:	6078      	str	r0, [r7, #4]
+ 8001184:	b580      	push	{r7, lr}
+ 8001186:	b086      	sub	sp, #24
+ 8001188:	af00      	add	r7, sp, #0
+ 800118a:	6078      	str	r0, [r7, #4]
   extern uint8_t _end; /* Symbol defined in the linker script */
   extern uint8_t _estack; /* Symbol defined in the linker script */
   extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
   const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
- 8001308:	4a14      	ldr	r2, [pc, #80]	; (800135c <_sbrk+0x5c>)
- 800130a:	4b15      	ldr	r3, [pc, #84]	; (8001360 <_sbrk+0x60>)
- 800130c:	1ad3      	subs	r3, r2, r3
- 800130e:	617b      	str	r3, [r7, #20]
+ 800118c:	4a14      	ldr	r2, [pc, #80]	; (80011e0 <_sbrk+0x5c>)
+ 800118e:	4b15      	ldr	r3, [pc, #84]	; (80011e4 <_sbrk+0x60>)
+ 8001190:	1ad3      	subs	r3, r2, r3
+ 8001192:	617b      	str	r3, [r7, #20]
   const uint8_t *max_heap = (uint8_t *)stack_limit;
- 8001310:	697b      	ldr	r3, [r7, #20]
- 8001312:	613b      	str	r3, [r7, #16]
+ 8001194:	697b      	ldr	r3, [r7, #20]
+ 8001196:	613b      	str	r3, [r7, #16]
   uint8_t *prev_heap_end;
 
   /* Initialize heap end at first call */
   if (NULL == __sbrk_heap_end)
- 8001314:	4b13      	ldr	r3, [pc, #76]	; (8001364 <_sbrk+0x64>)
- 8001316:	681b      	ldr	r3, [r3, #0]
- 8001318:	2b00      	cmp	r3, #0
- 800131a:	d102      	bne.n	8001322 <_sbrk+0x22>
+ 8001198:	4b13      	ldr	r3, [pc, #76]	; (80011e8 <_sbrk+0x64>)
+ 800119a:	681b      	ldr	r3, [r3, #0]
+ 800119c:	2b00      	cmp	r3, #0
+ 800119e:	d102      	bne.n	80011a6 <_sbrk+0x22>
   {
     __sbrk_heap_end = &_end;
- 800131c:	4b11      	ldr	r3, [pc, #68]	; (8001364 <_sbrk+0x64>)
- 800131e:	4a12      	ldr	r2, [pc, #72]	; (8001368 <_sbrk+0x68>)
- 8001320:	601a      	str	r2, [r3, #0]
+ 80011a0:	4b11      	ldr	r3, [pc, #68]	; (80011e8 <_sbrk+0x64>)
+ 80011a2:	4a12      	ldr	r2, [pc, #72]	; (80011ec <_sbrk+0x68>)
+ 80011a4:	601a      	str	r2, [r3, #0]
   }
 
   /* Protect heap from growing into the reserved MSP stack */
   if (__sbrk_heap_end + incr > max_heap)
- 8001322:	4b10      	ldr	r3, [pc, #64]	; (8001364 <_sbrk+0x64>)
- 8001324:	681a      	ldr	r2, [r3, #0]
- 8001326:	687b      	ldr	r3, [r7, #4]
- 8001328:	18d3      	adds	r3, r2, r3
- 800132a:	693a      	ldr	r2, [r7, #16]
- 800132c:	429a      	cmp	r2, r3
- 800132e:	d207      	bcs.n	8001340 <_sbrk+0x40>
+ 80011a6:	4b10      	ldr	r3, [pc, #64]	; (80011e8 <_sbrk+0x64>)
+ 80011a8:	681a      	ldr	r2, [r3, #0]
+ 80011aa:	687b      	ldr	r3, [r7, #4]
+ 80011ac:	18d3      	adds	r3, r2, r3
+ 80011ae:	693a      	ldr	r2, [r7, #16]
+ 80011b0:	429a      	cmp	r2, r3
+ 80011b2:	d207      	bcs.n	80011c4 <_sbrk+0x40>
   {
     errno = ENOMEM;
- 8001330:	f003 fea6 	bl	8005080 <__errno>
- 8001334:	0003      	movs	r3, r0
- 8001336:	220c      	movs	r2, #12
- 8001338:	601a      	str	r2, [r3, #0]
+ 80011b4:	f003 f8d0 	bl	8004358 <__errno>
+ 80011b8:	0003      	movs	r3, r0
+ 80011ba:	220c      	movs	r2, #12
+ 80011bc:	601a      	str	r2, [r3, #0]
     return (void *)-1;
- 800133a:	2301      	movs	r3, #1
- 800133c:	425b      	negs	r3, r3
- 800133e:	e009      	b.n	8001354 <_sbrk+0x54>
+ 80011be:	2301      	movs	r3, #1
+ 80011c0:	425b      	negs	r3, r3
+ 80011c2:	e009      	b.n	80011d8 <_sbrk+0x54>
   }
 
   prev_heap_end = __sbrk_heap_end;
- 8001340:	4b08      	ldr	r3, [pc, #32]	; (8001364 <_sbrk+0x64>)
- 8001342:	681b      	ldr	r3, [r3, #0]
- 8001344:	60fb      	str	r3, [r7, #12]
+ 80011c4:	4b08      	ldr	r3, [pc, #32]	; (80011e8 <_sbrk+0x64>)
+ 80011c6:	681b      	ldr	r3, [r3, #0]
+ 80011c8:	60fb      	str	r3, [r7, #12]
   __sbrk_heap_end += incr;
- 8001346:	4b07      	ldr	r3, [pc, #28]	; (8001364 <_sbrk+0x64>)
- 8001348:	681a      	ldr	r2, [r3, #0]
- 800134a:	687b      	ldr	r3, [r7, #4]
- 800134c:	18d2      	adds	r2, r2, r3
- 800134e:	4b05      	ldr	r3, [pc, #20]	; (8001364 <_sbrk+0x64>)
- 8001350:	601a      	str	r2, [r3, #0]
+ 80011ca:	4b07      	ldr	r3, [pc, #28]	; (80011e8 <_sbrk+0x64>)
+ 80011cc:	681a      	ldr	r2, [r3, #0]
+ 80011ce:	687b      	ldr	r3, [r7, #4]
+ 80011d0:	18d2      	adds	r2, r2, r3
+ 80011d2:	4b05      	ldr	r3, [pc, #20]	; (80011e8 <_sbrk+0x64>)
+ 80011d4:	601a      	str	r2, [r3, #0]
 
   return (void *)prev_heap_end;
- 8001352:	68fb      	ldr	r3, [r7, #12]
+ 80011d6:	68fb      	ldr	r3, [r7, #12]
 }
- 8001354:	0018      	movs	r0, r3
- 8001356:	46bd      	mov	sp, r7
- 8001358:	b006      	add	sp, #24
- 800135a:	bd80      	pop	{r7, pc}
- 800135c:	20002000 	.word	0x20002000
- 8001360:	00000400 	.word	0x00000400
- 8001364:	200002c8 	.word	0x200002c8
- 8001368:	20000418 	.word	0x20000418
+ 80011d8:	0018      	movs	r0, r3
+ 80011da:	46bd      	mov	sp, r7
+ 80011dc:	b006      	add	sp, #24
+ 80011de:	bd80      	pop	{r7, pc}
+ 80011e0:	20002000 	.word	0x20002000
+ 80011e4:	00000400 	.word	0x00000400
+ 80011e8:	200002c4 	.word	0x200002c4
+ 80011ec:	20000418 	.word	0x20000418
 
-0800136c <SystemInit>:
+080011f0 <SystemInit>:
   * @brief  Setup the microcontroller system.
   * @param  None
   * @retval None
   */
 void SystemInit (void)
 {
- 800136c:	b580      	push	{r7, lr}
- 800136e:	af00      	add	r7, sp, #0
+ 80011f0:	b580      	push	{r7, lr}
+ 80011f2:	af00      	add	r7, sp, #0
   /* Configure the Vector Table location add offset address ------------------*/
 #if defined (USER_VECT_TAB_ADDRESS)
   SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
 #endif /* USER_VECT_TAB_ADDRESS */
 }
- 8001370:	46c0      	nop			; (mov r8, r8)
- 8001372:	46bd      	mov	sp, r7
- 8001374:	bd80      	pop	{r7, pc}
+ 80011f4:	46c0      	nop			; (mov r8, r8)
+ 80011f6:	46bd      	mov	sp, r7
+ 80011f8:	bd80      	pop	{r7, pc}
 	...
 
-08001378 <Reset_Handler>:
+080011fc <Reset_Handler>:
 
     .section  .text.Reset_Handler
   .weak  Reset_Handler
   .type  Reset_Handler, %function
 Reset_Handler:  
    ldr   r0, =_estack
- 8001378:	480d      	ldr	r0, [pc, #52]	; (80013b0 <LoopForever+0x2>)
+ 80011fc:	480d      	ldr	r0, [pc, #52]	; (8001234 <LoopForever+0x2>)
    mov   sp, r0          /* set stack pointer */
- 800137a:	4685      	mov	sp, r0
+ 80011fe:	4685      	mov	sp, r0
 
 /* Call the clock system initialization function.*/
   bl  SystemInit
- 800137c:	f7ff fff6 	bl	800136c <SystemInit>
+ 8001200:	f7ff fff6 	bl	80011f0 <SystemInit>
   
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
- 8001380:	480c      	ldr	r0, [pc, #48]	; (80013b4 <LoopForever+0x6>)
+ 8001204:	480c      	ldr	r0, [pc, #48]	; (8001238 <LoopForever+0x6>)
   ldr r1, =_edata
- 8001382:	490d      	ldr	r1, [pc, #52]	; (80013b8 <LoopForever+0xa>)
+ 8001206:	490d      	ldr	r1, [pc, #52]	; (800123c <LoopForever+0xa>)
   ldr r2, =_sidata
- 8001384:	4a0d      	ldr	r2, [pc, #52]	; (80013bc <LoopForever+0xe>)
+ 8001208:	4a0d      	ldr	r2, [pc, #52]	; (8001240 <LoopForever+0xe>)
   movs r3, #0
- 8001386:	2300      	movs	r3, #0
+ 800120a:	2300      	movs	r3, #0
   b LoopCopyDataInit
- 8001388:	e002      	b.n	8001390 <LoopCopyDataInit>
+ 800120c:	e002      	b.n	8001214 <LoopCopyDataInit>
 
-0800138a <CopyDataInit>:
+0800120e <CopyDataInit>:
 
 CopyDataInit:
   ldr r4, [r2, r3]
- 800138a:	58d4      	ldr	r4, [r2, r3]
+ 800120e:	58d4      	ldr	r4, [r2, r3]
   str r4, [r0, r3]
- 800138c:	50c4      	str	r4, [r0, r3]
+ 8001210:	50c4      	str	r4, [r0, r3]
   adds r3, r3, #4
- 800138e:	3304      	adds	r3, #4
+ 8001212:	3304      	adds	r3, #4
 
-08001390 <LoopCopyDataInit>:
+08001214 <LoopCopyDataInit>:
 
 LoopCopyDataInit:
   adds r4, r0, r3
- 8001390:	18c4      	adds	r4, r0, r3
+ 8001214:	18c4      	adds	r4, r0, r3
   cmp r4, r1
- 8001392:	428c      	cmp	r4, r1
+ 8001216:	428c      	cmp	r4, r1
   bcc CopyDataInit
- 8001394:	d3f9      	bcc.n	800138a <CopyDataInit>
+ 8001218:	d3f9      	bcc.n	800120e <CopyDataInit>
   
 /* Zero fill the bss segment. */
   ldr r2, =_sbss
- 8001396:	4a0a      	ldr	r2, [pc, #40]	; (80013c0 <LoopForever+0x12>)
+ 800121a:	4a0a      	ldr	r2, [pc, #40]	; (8001244 <LoopForever+0x12>)
   ldr r4, =_ebss
- 8001398:	4c0a      	ldr	r4, [pc, #40]	; (80013c4 <LoopForever+0x16>)
+ 800121c:	4c0a      	ldr	r4, [pc, #40]	; (8001248 <LoopForever+0x16>)
   movs r3, #0
- 800139a:	2300      	movs	r3, #0
+ 800121e:	2300      	movs	r3, #0
   b LoopFillZerobss
- 800139c:	e001      	b.n	80013a2 <LoopFillZerobss>
+ 8001220:	e001      	b.n	8001226 <LoopFillZerobss>
 
-0800139e <FillZerobss>:
+08001222 <FillZerobss>:
 
 FillZerobss:
   str  r3, [r2]
- 800139e:	6013      	str	r3, [r2, #0]
+ 8001222:	6013      	str	r3, [r2, #0]
   adds r2, r2, #4
- 80013a0:	3204      	adds	r2, #4
+ 8001224:	3204      	adds	r2, #4
 
-080013a2 <LoopFillZerobss>:
+08001226 <LoopFillZerobss>:
 
 LoopFillZerobss:
   cmp r2, r4
- 80013a2:	42a2      	cmp	r2, r4
+ 8001226:	42a2      	cmp	r2, r4
   bcc FillZerobss
- 80013a4:	d3fb      	bcc.n	800139e <FillZerobss>
+ 8001228:	d3fb      	bcc.n	8001222 <FillZerobss>
 
 /* Call static constructors */
     bl __libc_init_array
- 80013a6:	f003 fe71 	bl	800508c <__libc_init_array>
+ 800122a:	f003 f89b 	bl	8004364 <__libc_init_array>
 /* Call the application's entry point.*/
   bl  main
- 80013aa:	f7ff f8f9 	bl	80005a0 <main>
+ 800122e:	f7ff f94d 	bl	80004cc <main>
 
-080013ae <LoopForever>:
+08001232 <LoopForever>:
 
 LoopForever:
     b LoopForever
- 80013ae:	e7fe      	b.n	80013ae <LoopForever>
+ 8001232:	e7fe      	b.n	8001232 <LoopForever>
    ldr   r0, =_estack
- 80013b0:	20002000 	.word	0x20002000
+ 8001234:	20002000 	.word	0x20002000
   ldr r0, =_sdata
- 80013b4:	20000000 	.word	0x20000000
+ 8001238:	20000000 	.word	0x20000000
   ldr r1, =_edata
- 80013b8:	2000005c 	.word	0x2000005c
+ 800123c:	2000005c 	.word	0x2000005c
   ldr r2, =_sidata
- 80013bc:	08005a88 	.word	0x08005a88
+ 8001240:	08004d60 	.word	0x08004d60
   ldr r2, =_sbss
- 80013c0:	2000005c 	.word	0x2000005c
+ 8001244:	2000005c 	.word	0x2000005c
   ldr r4, =_ebss
- 80013c4:	20000418 	.word	0x20000418
+ 8001248:	20000414 	.word	0x20000414
 
-080013c8 <ADC1_COMP_IRQHandler>:
+0800124c <ADC1_COMP_IRQHandler>:
  * @retval : None
 */
     .section  .text.Default_Handler,"ax",%progbits
 Default_Handler:
 Infinite_Loop:
   b  Infinite_Loop
- 80013c8:	e7fe      	b.n	80013c8 <ADC1_COMP_IRQHandler>
+ 800124c:	e7fe      	b.n	800124c <ADC1_COMP_IRQHandler>
 	...
 
-080013cc <HAL_Init>:
+08001250 <HAL_Init>:
   *        In the default implementation,Systick is used as source of time base.
   *        the tick variable is incremented each 1ms in its ISR.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_Init(void)
 {
- 80013cc:	b580      	push	{r7, lr}
- 80013ce:	b082      	sub	sp, #8
- 80013d0:	af00      	add	r7, sp, #0
+ 8001250:	b580      	push	{r7, lr}
+ 8001252:	b082      	sub	sp, #8
+ 8001254:	af00      	add	r7, sp, #0
   HAL_StatusTypeDef  status = HAL_OK;
- 80013d2:	1dfb      	adds	r3, r7, #7
- 80013d4:	2200      	movs	r2, #0
- 80013d6:	701a      	strb	r2, [r3, #0]
+ 8001256:	1dfb      	adds	r3, r7, #7
+ 8001258:	2200      	movs	r2, #0
+ 800125a:	701a      	strb	r2, [r3, #0]
 #if (BUFFER_CACHE_DISABLE != 0)
   __HAL_FLASH_BUFFER_CACHE_DISABLE();
 #endif /* BUFFER_CACHE_DISABLE */
 
 #if (PREREAD_ENABLE != 0)
   __HAL_FLASH_PREREAD_BUFFER_ENABLE();
- 80013d8:	4b0b      	ldr	r3, [pc, #44]	; (8001408 <HAL_Init+0x3c>)
- 80013da:	681a      	ldr	r2, [r3, #0]
- 80013dc:	4b0a      	ldr	r3, [pc, #40]	; (8001408 <HAL_Init+0x3c>)
- 80013de:	2140      	movs	r1, #64	; 0x40
- 80013e0:	430a      	orrs	r2, r1
- 80013e2:	601a      	str	r2, [r3, #0]
+ 800125c:	4b0b      	ldr	r3, [pc, #44]	; (800128c <HAL_Init+0x3c>)
+ 800125e:	681a      	ldr	r2, [r3, #0]
+ 8001260:	4b0a      	ldr	r3, [pc, #40]	; (800128c <HAL_Init+0x3c>)
+ 8001262:	2140      	movs	r1, #64	; 0x40
+ 8001264:	430a      	orrs	r2, r1
+ 8001266:	601a      	str	r2, [r3, #0]
 #if (PREFETCH_ENABLE != 0)
   __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
 #endif /* PREFETCH_ENABLE */
 
   /* Use SysTick as time base source and configure 1ms tick (default clock after Reset is MSI) */
   if (HAL_InitTick(TICK_INT_PRIORITY) != HAL_OK)
- 80013e4:	2003      	movs	r0, #3
- 80013e6:	f000 f811 	bl	800140c <HAL_InitTick>
- 80013ea:	1e03      	subs	r3, r0, #0
- 80013ec:	d003      	beq.n	80013f6 <HAL_Init+0x2a>
+ 8001268:	2003      	movs	r0, #3
+ 800126a:	f000 f811 	bl	8001290 <HAL_InitTick>
+ 800126e:	1e03      	subs	r3, r0, #0
+ 8001270:	d003      	beq.n	800127a <HAL_Init+0x2a>
   {
     status = HAL_ERROR;
- 80013ee:	1dfb      	adds	r3, r7, #7
- 80013f0:	2201      	movs	r2, #1
- 80013f2:	701a      	strb	r2, [r3, #0]
- 80013f4:	e001      	b.n	80013fa <HAL_Init+0x2e>
+ 8001272:	1dfb      	adds	r3, r7, #7
+ 8001274:	2201      	movs	r2, #1
+ 8001276:	701a      	strb	r2, [r3, #0]
+ 8001278:	e001      	b.n	800127e <HAL_Init+0x2e>
   }
   else
   {
     /* Init the low level hardware */
     HAL_MspInit();
- 80013f6:	f7ff fdc3 	bl	8000f80 <HAL_MspInit>
+ 800127a:	f7ff fdd7 	bl	8000e2c <HAL_MspInit>
   }
 
   /* Return function status */
   return status;
- 80013fa:	1dfb      	adds	r3, r7, #7
- 80013fc:	781b      	ldrb	r3, [r3, #0]
+ 800127e:	1dfb      	adds	r3, r7, #7
+ 8001280:	781b      	ldrb	r3, [r3, #0]
 }
- 80013fe:	0018      	movs	r0, r3
- 8001400:	46bd      	mov	sp, r7
- 8001402:	b002      	add	sp, #8
- 8001404:	bd80      	pop	{r7, pc}
- 8001406:	46c0      	nop			; (mov r8, r8)
- 8001408:	40022000 	.word	0x40022000
+ 8001282:	0018      	movs	r0, r3
+ 8001284:	46bd      	mov	sp, r7
+ 8001286:	b002      	add	sp, #8
+ 8001288:	bd80      	pop	{r7, pc}
+ 800128a:	46c0      	nop			; (mov r8, r8)
+ 800128c:	40022000 	.word	0x40022000
 
-0800140c <HAL_InitTick>:
+08001290 <HAL_InitTick>:
   *       implementation  in user file.
   * @param TickPriority Tick interrupt priority.
   * @retval HAL status
   */
 __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
 {
- 800140c:	b590      	push	{r4, r7, lr}
- 800140e:	b083      	sub	sp, #12
- 8001410:	af00      	add	r7, sp, #0
- 8001412:	6078      	str	r0, [r7, #4]
+ 8001290:	b590      	push	{r4, r7, lr}
+ 8001292:	b083      	sub	sp, #12
+ 8001294:	af00      	add	r7, sp, #0
+ 8001296:	6078      	str	r0, [r7, #4]
   /* Configure the SysTick to have interrupt in 1ms time basis*/
   if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
- 8001414:	4b14      	ldr	r3, [pc, #80]	; (8001468 <HAL_InitTick+0x5c>)
- 8001416:	681c      	ldr	r4, [r3, #0]
- 8001418:	4b14      	ldr	r3, [pc, #80]	; (800146c <HAL_InitTick+0x60>)
- 800141a:	781b      	ldrb	r3, [r3, #0]
- 800141c:	0019      	movs	r1, r3
- 800141e:	23fa      	movs	r3, #250	; 0xfa
- 8001420:	0098      	lsls	r0, r3, #2
- 8001422:	f7fe fe83 	bl	800012c <__udivsi3>
- 8001426:	0003      	movs	r3, r0
- 8001428:	0019      	movs	r1, r3
- 800142a:	0020      	movs	r0, r4
- 800142c:	f7fe fe7e 	bl	800012c <__udivsi3>
- 8001430:	0003      	movs	r3, r0
- 8001432:	0018      	movs	r0, r3
- 8001434:	f000 fb49 	bl	8001aca <HAL_SYSTICK_Config>
- 8001438:	1e03      	subs	r3, r0, #0
- 800143a:	d001      	beq.n	8001440 <HAL_InitTick+0x34>
+ 8001298:	4b14      	ldr	r3, [pc, #80]	; (80012ec <HAL_InitTick+0x5c>)
+ 800129a:	681c      	ldr	r4, [r3, #0]
+ 800129c:	4b14      	ldr	r3, [pc, #80]	; (80012f0 <HAL_InitTick+0x60>)
+ 800129e:	781b      	ldrb	r3, [r3, #0]
+ 80012a0:	0019      	movs	r1, r3
+ 80012a2:	23fa      	movs	r3, #250	; 0xfa
+ 80012a4:	0098      	lsls	r0, r3, #2
+ 80012a6:	f7fe ff41 	bl	800012c <__udivsi3>
+ 80012aa:	0003      	movs	r3, r0
+ 80012ac:	0019      	movs	r1, r3
+ 80012ae:	0020      	movs	r0, r4
+ 80012b0:	f7fe ff3c 	bl	800012c <__udivsi3>
+ 80012b4:	0003      	movs	r3, r0
+ 80012b6:	0018      	movs	r0, r3
+ 80012b8:	f000 fb49 	bl	800194e <HAL_SYSTICK_Config>
+ 80012bc:	1e03      	subs	r3, r0, #0
+ 80012be:	d001      	beq.n	80012c4 <HAL_InitTick+0x34>
   {
     return HAL_ERROR;
- 800143c:	2301      	movs	r3, #1
- 800143e:	e00f      	b.n	8001460 <HAL_InitTick+0x54>
+ 80012c0:	2301      	movs	r3, #1
+ 80012c2:	e00f      	b.n	80012e4 <HAL_InitTick+0x54>
   }
 
   /* Configure the SysTick IRQ priority */
   if (TickPriority < (1UL << __NVIC_PRIO_BITS))
- 8001440:	687b      	ldr	r3, [r7, #4]
- 8001442:	2b03      	cmp	r3, #3
- 8001444:	d80b      	bhi.n	800145e <HAL_InitTick+0x52>
+ 80012c4:	687b      	ldr	r3, [r7, #4]
+ 80012c6:	2b03      	cmp	r3, #3
+ 80012c8:	d80b      	bhi.n	80012e2 <HAL_InitTick+0x52>
   {
     HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
- 8001446:	6879      	ldr	r1, [r7, #4]
- 8001448:	2301      	movs	r3, #1
- 800144a:	425b      	negs	r3, r3
- 800144c:	2200      	movs	r2, #0
- 800144e:	0018      	movs	r0, r3
- 8001450:	f000 fb16 	bl	8001a80 <HAL_NVIC_SetPriority>
+ 80012ca:	6879      	ldr	r1, [r7, #4]
+ 80012cc:	2301      	movs	r3, #1
+ 80012ce:	425b      	negs	r3, r3
+ 80012d0:	2200      	movs	r2, #0
+ 80012d2:	0018      	movs	r0, r3
+ 80012d4:	f000 fb16 	bl	8001904 <HAL_NVIC_SetPriority>
     uwTickPrio = TickPriority;
- 8001454:	4b06      	ldr	r3, [pc, #24]	; (8001470 <HAL_InitTick+0x64>)
- 8001456:	687a      	ldr	r2, [r7, #4]
- 8001458:	601a      	str	r2, [r3, #0]
+ 80012d8:	4b06      	ldr	r3, [pc, #24]	; (80012f4 <HAL_InitTick+0x64>)
+ 80012da:	687a      	ldr	r2, [r7, #4]
+ 80012dc:	601a      	str	r2, [r3, #0]
   {
     return HAL_ERROR;
   }
 
   /* Return function status */
   return HAL_OK;
- 800145a:	2300      	movs	r3, #0
- 800145c:	e000      	b.n	8001460 <HAL_InitTick+0x54>
+ 80012de:	2300      	movs	r3, #0
+ 80012e0:	e000      	b.n	80012e4 <HAL_InitTick+0x54>
     return HAL_ERROR;
- 800145e:	2301      	movs	r3, #1
+ 80012e2:	2301      	movs	r3, #1
 }
- 8001460:	0018      	movs	r0, r3
- 8001462:	46bd      	mov	sp, r7
- 8001464:	b003      	add	sp, #12
- 8001466:	bd90      	pop	{r4, r7, pc}
- 8001468:	20000000 	.word	0x20000000
- 800146c:	20000008 	.word	0x20000008
- 8001470:	20000004 	.word	0x20000004
+ 80012e4:	0018      	movs	r0, r3
+ 80012e6:	46bd      	mov	sp, r7
+ 80012e8:	b003      	add	sp, #12
+ 80012ea:	bd90      	pop	{r4, r7, pc}
+ 80012ec:	20000000 	.word	0x20000000
+ 80012f0:	20000008 	.word	0x20000008
+ 80012f4:	20000004 	.word	0x20000004
 
-08001474 <HAL_IncTick>:
+080012f8 <HAL_IncTick>:
  * @note This function is declared as __weak to be overwritten in case of other
   *      implementations in user file.
   * @retval None
   */
 __weak void HAL_IncTick(void)
 {
- 8001474:	b580      	push	{r7, lr}
- 8001476:	af00      	add	r7, sp, #0
+ 80012f8:	b580      	push	{r7, lr}
+ 80012fa:	af00      	add	r7, sp, #0
   uwTick += uwTickFreq;
- 8001478:	4b05      	ldr	r3, [pc, #20]	; (8001490 <HAL_IncTick+0x1c>)
- 800147a:	781b      	ldrb	r3, [r3, #0]
- 800147c:	001a      	movs	r2, r3
- 800147e:	4b05      	ldr	r3, [pc, #20]	; (8001494 <HAL_IncTick+0x20>)
- 8001480:	681b      	ldr	r3, [r3, #0]
- 8001482:	18d2      	adds	r2, r2, r3
- 8001484:	4b03      	ldr	r3, [pc, #12]	; (8001494 <HAL_IncTick+0x20>)
- 8001486:	601a      	str	r2, [r3, #0]
+ 80012fc:	4b05      	ldr	r3, [pc, #20]	; (8001314 <HAL_IncTick+0x1c>)
+ 80012fe:	781b      	ldrb	r3, [r3, #0]
+ 8001300:	001a      	movs	r2, r3
+ 8001302:	4b05      	ldr	r3, [pc, #20]	; (8001318 <HAL_IncTick+0x20>)
+ 8001304:	681b      	ldr	r3, [r3, #0]
+ 8001306:	18d2      	adds	r2, r2, r3
+ 8001308:	4b03      	ldr	r3, [pc, #12]	; (8001318 <HAL_IncTick+0x20>)
+ 800130a:	601a      	str	r2, [r3, #0]
 }
- 8001488:	46c0      	nop			; (mov r8, r8)
- 800148a:	46bd      	mov	sp, r7
- 800148c:	bd80      	pop	{r7, pc}
- 800148e:	46c0      	nop			; (mov r8, r8)
- 8001490:	20000008 	.word	0x20000008
- 8001494:	200002cc 	.word	0x200002cc
+ 800130c:	46c0      	nop			; (mov r8, r8)
+ 800130e:	46bd      	mov	sp, r7
+ 8001310:	bd80      	pop	{r7, pc}
+ 8001312:	46c0      	nop			; (mov r8, r8)
+ 8001314:	20000008 	.word	0x20000008
+ 8001318:	200002c8 	.word	0x200002c8
 
-08001498 <HAL_GetTick>:
+0800131c <HAL_GetTick>:
   * @note This function is declared as __weak to be overwritten in case of other
   *       implementations in user file.
   * @retval tick value
   */
 __weak uint32_t HAL_GetTick(void)
 {
- 8001498:	b580      	push	{r7, lr}
- 800149a:	af00      	add	r7, sp, #0
+ 800131c:	b580      	push	{r7, lr}
+ 800131e:	af00      	add	r7, sp, #0
   return uwTick;
- 800149c:	4b02      	ldr	r3, [pc, #8]	; (80014a8 <HAL_GetTick+0x10>)
- 800149e:	681b      	ldr	r3, [r3, #0]
+ 8001320:	4b02      	ldr	r3, [pc, #8]	; (800132c <HAL_GetTick+0x10>)
+ 8001322:	681b      	ldr	r3, [r3, #0]
 }
- 80014a0:	0018      	movs	r0, r3
- 80014a2:	46bd      	mov	sp, r7
- 80014a4:	bd80      	pop	{r7, pc}
- 80014a6:	46c0      	nop			; (mov r8, r8)
- 80014a8:	200002cc 	.word	0x200002cc
+ 8001324:	0018      	movs	r0, r3
+ 8001326:	46bd      	mov	sp, r7
+ 8001328:	bd80      	pop	{r7, pc}
+ 800132a:	46c0      	nop			; (mov r8, r8)
+ 800132c:	200002c8 	.word	0x200002c8
 
-080014ac <HAL_Delay>:
+08001330 <HAL_Delay>:
   *       implementations in user file.
   * @param Delay specifies the delay time length, in milliseconds.
   * @retval None
   */
 __weak void HAL_Delay(uint32_t Delay)
 {
- 80014ac:	b580      	push	{r7, lr}
- 80014ae:	b084      	sub	sp, #16
- 80014b0:	af00      	add	r7, sp, #0
- 80014b2:	6078      	str	r0, [r7, #4]
+ 8001330:	b580      	push	{r7, lr}
+ 8001332:	b084      	sub	sp, #16
+ 8001334:	af00      	add	r7, sp, #0
+ 8001336:	6078      	str	r0, [r7, #4]
   uint32_t tickstart = HAL_GetTick();
- 80014b4:	f7ff fff0 	bl	8001498 <HAL_GetTick>
- 80014b8:	0003      	movs	r3, r0
- 80014ba:	60bb      	str	r3, [r7, #8]
+ 8001338:	f7ff fff0 	bl	800131c <HAL_GetTick>
+ 800133c:	0003      	movs	r3, r0
+ 800133e:	60bb      	str	r3, [r7, #8]
   uint32_t wait = Delay;
- 80014bc:	687b      	ldr	r3, [r7, #4]
- 80014be:	60fb      	str	r3, [r7, #12]
+ 8001340:	687b      	ldr	r3, [r7, #4]
+ 8001342:	60fb      	str	r3, [r7, #12]
 
   /* Add a freq to guarantee minimum wait */
   if (wait < HAL_MAX_DELAY)
- 80014c0:	68fb      	ldr	r3, [r7, #12]
- 80014c2:	3301      	adds	r3, #1
- 80014c4:	d005      	beq.n	80014d2 <HAL_Delay+0x26>
+ 8001344:	68fb      	ldr	r3, [r7, #12]
+ 8001346:	3301      	adds	r3, #1
+ 8001348:	d005      	beq.n	8001356 <HAL_Delay+0x26>
   {
     wait += (uint32_t)(uwTickFreq);
- 80014c6:	4b0a      	ldr	r3, [pc, #40]	; (80014f0 <HAL_Delay+0x44>)
- 80014c8:	781b      	ldrb	r3, [r3, #0]
- 80014ca:	001a      	movs	r2, r3
- 80014cc:	68fb      	ldr	r3, [r7, #12]
- 80014ce:	189b      	adds	r3, r3, r2
- 80014d0:	60fb      	str	r3, [r7, #12]
+ 800134a:	4b0a      	ldr	r3, [pc, #40]	; (8001374 <HAL_Delay+0x44>)
+ 800134c:	781b      	ldrb	r3, [r3, #0]
+ 800134e:	001a      	movs	r2, r3
+ 8001350:	68fb      	ldr	r3, [r7, #12]
+ 8001352:	189b      	adds	r3, r3, r2
+ 8001354:	60fb      	str	r3, [r7, #12]
   }
 
   while((HAL_GetTick() - tickstart) < wait)
- 80014d2:	46c0      	nop			; (mov r8, r8)
- 80014d4:	f7ff ffe0 	bl	8001498 <HAL_GetTick>
- 80014d8:	0002      	movs	r2, r0
- 80014da:	68bb      	ldr	r3, [r7, #8]
- 80014dc:	1ad3      	subs	r3, r2, r3
- 80014de:	68fa      	ldr	r2, [r7, #12]
- 80014e0:	429a      	cmp	r2, r3
- 80014e2:	d8f7      	bhi.n	80014d4 <HAL_Delay+0x28>
+ 8001356:	46c0      	nop			; (mov r8, r8)
+ 8001358:	f7ff ffe0 	bl	800131c <HAL_GetTick>
+ 800135c:	0002      	movs	r2, r0
+ 800135e:	68bb      	ldr	r3, [r7, #8]
+ 8001360:	1ad3      	subs	r3, r2, r3
+ 8001362:	68fa      	ldr	r2, [r7, #12]
+ 8001364:	429a      	cmp	r2, r3
+ 8001366:	d8f7      	bhi.n	8001358 <HAL_Delay+0x28>
   {
   }
 }
- 80014e4:	46c0      	nop			; (mov r8, r8)
- 80014e6:	46c0      	nop			; (mov r8, r8)
- 80014e8:	46bd      	mov	sp, r7
- 80014ea:	b004      	add	sp, #16
- 80014ec:	bd80      	pop	{r7, pc}
- 80014ee:	46c0      	nop			; (mov r8, r8)
- 80014f0:	20000008 	.word	0x20000008
+ 8001368:	46c0      	nop			; (mov r8, r8)
+ 800136a:	46c0      	nop			; (mov r8, r8)
+ 800136c:	46bd      	mov	sp, r7
+ 800136e:	b004      	add	sp, #16
+ 8001370:	bd80      	pop	{r7, pc}
+ 8001372:	46c0      	nop			; (mov r8, r8)
+ 8001374:	20000008 	.word	0x20000008
 
-080014f4 <HAL_ADC_Init>:
+08001378 <HAL_ADC_Init>:
   *         function "HAL_ADCEx_EnableVREFINTTempSensor()" must be called similarilly.
   * @param  hadc ADC handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef *hadc)
 {
- 80014f4:	b580      	push	{r7, lr}
- 80014f6:	b082      	sub	sp, #8
- 80014f8:	af00      	add	r7, sp, #0
- 80014fa:	6078      	str	r0, [r7, #4]
+ 8001378:	b580      	push	{r7, lr}
+ 800137a:	b082      	sub	sp, #8
+ 800137c:	af00      	add	r7, sp, #0
+ 800137e:	6078      	str	r0, [r7, #4]
 
   /* Check ADC handle */
   if (hadc == NULL)
- 80014fc:	687b      	ldr	r3, [r7, #4]
- 80014fe:	2b00      	cmp	r3, #0
- 8001500:	d101      	bne.n	8001506 <HAL_ADC_Init+0x12>
+ 8001380:	687b      	ldr	r3, [r7, #4]
+ 8001382:	2b00      	cmp	r3, #0
+ 8001384:	d101      	bne.n	800138a <HAL_ADC_Init+0x12>
   {
     return HAL_ERROR;
- 8001502:	2301      	movs	r3, #1
- 8001504:	e159      	b.n	80017ba <HAL_ADC_Init+0x2c6>
+ 8001386:	2301      	movs	r3, #1
+ 8001388:	e159      	b.n	800163e <HAL_ADC_Init+0x2c6>
   /* Refer to header of this file for more details on clock enabling procedure*/
 
   /* Actions performed only if ADC is coming from state reset:                */
   /* - Initialization of ADC MSP                                              */
   /* - ADC voltage regulator enable                                           */
   if (hadc->State == HAL_ADC_STATE_RESET)
- 8001506:	687b      	ldr	r3, [r7, #4]
- 8001508:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 800150a:	2b00      	cmp	r3, #0
- 800150c:	d10a      	bne.n	8001524 <HAL_ADC_Init+0x30>
+ 800138a:	687b      	ldr	r3, [r7, #4]
+ 800138c:	6d5b      	ldr	r3, [r3, #84]	; 0x54
+ 800138e:	2b00      	cmp	r3, #0
+ 8001390:	d10a      	bne.n	80013a8 <HAL_ADC_Init+0x30>
   {
     /* Initialize ADC error code */
     ADC_CLEAR_ERRORCODE(hadc);
- 800150e:	687b      	ldr	r3, [r7, #4]
- 8001510:	2200      	movs	r2, #0
- 8001512:	659a      	str	r2, [r3, #88]	; 0x58
+ 8001392:	687b      	ldr	r3, [r7, #4]
+ 8001394:	2200      	movs	r2, #0
+ 8001396:	659a      	str	r2, [r3, #88]	; 0x58
 
     /* Allocate lock resource and initialize it */
     hadc->Lock = HAL_UNLOCKED;
- 8001514:	687b      	ldr	r3, [r7, #4]
- 8001516:	2250      	movs	r2, #80	; 0x50
- 8001518:	2100      	movs	r1, #0
- 800151a:	5499      	strb	r1, [r3, r2]
+ 8001398:	687b      	ldr	r3, [r7, #4]
+ 800139a:	2250      	movs	r2, #80	; 0x50
+ 800139c:	2100      	movs	r1, #0
+ 800139e:	5499      	strb	r1, [r3, r2]
 
     /* Init the low level hardware */
     hadc->MspInitCallback(hadc);
 #else
     /* Init the low level hardware */
     HAL_ADC_MspInit(hadc);
- 800151c:	687b      	ldr	r3, [r7, #4]
- 800151e:	0018      	movs	r0, r3
- 8001520:	f7ff fd42 	bl	8000fa8 <HAL_ADC_MspInit>
+ 80013a0:	687b      	ldr	r3, [r7, #4]
+ 80013a2:	0018      	movs	r0, r3
+ 80013a4:	f7ff fd56 	bl	8000e54 <HAL_ADC_MspInit>
   /* Configuration of ADC parameters if previous preliminary actions are      */
   /* correctly completed.                                                     */
   /* and if there is no conversion on going on regular group (ADC can be      */
   /* enabled anyway, in case of call of this function to update a parameter   */
   /* on the fly).                                                             */
   if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) ||
- 8001524:	687b      	ldr	r3, [r7, #4]
- 8001526:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 8001528:	2210      	movs	r2, #16
- 800152a:	4013      	ands	r3, r2
- 800152c:	2b10      	cmp	r3, #16
- 800152e:	d005      	beq.n	800153c <HAL_ADC_Init+0x48>
+ 80013a8:	687b      	ldr	r3, [r7, #4]
+ 80013aa:	6d5b      	ldr	r3, [r3, #84]	; 0x54
+ 80013ac:	2210      	movs	r2, #16
+ 80013ae:	4013      	ands	r3, r2
+ 80013b0:	2b10      	cmp	r3, #16
+ 80013b2:	d005      	beq.n	80013c0 <HAL_ADC_Init+0x48>
       (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET))
- 8001530:	687b      	ldr	r3, [r7, #4]
- 8001532:	681b      	ldr	r3, [r3, #0]
- 8001534:	689b      	ldr	r3, [r3, #8]
- 8001536:	2204      	movs	r2, #4
- 8001538:	4013      	ands	r3, r2
+ 80013b4:	687b      	ldr	r3, [r7, #4]
+ 80013b6:	681b      	ldr	r3, [r3, #0]
+ 80013b8:	689b      	ldr	r3, [r3, #8]
+ 80013ba:	2204      	movs	r2, #4
+ 80013bc:	4013      	ands	r3, r2
   if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) ||
- 800153a:	d00b      	beq.n	8001554 <HAL_ADC_Init+0x60>
+ 80013be:	d00b      	beq.n	80013d8 <HAL_ADC_Init+0x60>
   {
     /* Update ADC state machine to error */
     SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
- 800153c:	687b      	ldr	r3, [r7, #4]
- 800153e:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 8001540:	2210      	movs	r2, #16
- 8001542:	431a      	orrs	r2, r3
- 8001544:	687b      	ldr	r3, [r7, #4]
- 8001546:	655a      	str	r2, [r3, #84]	; 0x54
+ 80013c0:	687b      	ldr	r3, [r7, #4]
+ 80013c2:	6d5b      	ldr	r3, [r3, #84]	; 0x54
+ 80013c4:	2210      	movs	r2, #16
+ 80013c6:	431a      	orrs	r2, r3
+ 80013c8:	687b      	ldr	r3, [r7, #4]
+ 80013ca:	655a      	str	r2, [r3, #84]	; 0x54
 
     /* Process unlocked */
     __HAL_UNLOCK(hadc);
- 8001548:	687b      	ldr	r3, [r7, #4]
- 800154a:	2250      	movs	r2, #80	; 0x50
- 800154c:	2100      	movs	r1, #0
- 800154e:	5499      	strb	r1, [r3, r2]
+ 80013cc:	687b      	ldr	r3, [r7, #4]
+ 80013ce:	2250      	movs	r2, #80	; 0x50
+ 80013d0:	2100      	movs	r1, #0
+ 80013d2:	5499      	strb	r1, [r3, r2]
     return HAL_ERROR;
- 8001550:	2301      	movs	r3, #1
- 8001552:	e132      	b.n	80017ba <HAL_ADC_Init+0x2c6>
+ 80013d4:	2301      	movs	r3, #1
+ 80013d6:	e132      	b.n	800163e <HAL_ADC_Init+0x2c6>
   }
 
   /* Set ADC state */
   ADC_STATE_CLR_SET(hadc->State,
- 8001554:	687b      	ldr	r3, [r7, #4]
- 8001556:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 8001558:	4a9a      	ldr	r2, [pc, #616]	; (80017c4 <HAL_ADC_Init+0x2d0>)
- 800155a:	4013      	ands	r3, r2
- 800155c:	2202      	movs	r2, #2
- 800155e:	431a      	orrs	r2, r3
- 8001560:	687b      	ldr	r3, [r7, #4]
- 8001562:	655a      	str	r2, [r3, #84]	; 0x54
+ 80013d8:	687b      	ldr	r3, [r7, #4]
+ 80013da:	6d5b      	ldr	r3, [r3, #84]	; 0x54
+ 80013dc:	4a9a      	ldr	r2, [pc, #616]	; (8001648 <HAL_ADC_Init+0x2d0>)
+ 80013de:	4013      	ands	r3, r2
+ 80013e0:	2202      	movs	r2, #2
+ 80013e2:	431a      	orrs	r2, r3
+ 80013e4:	687b      	ldr	r3, [r7, #4]
+ 80013e6:	655a      	str	r2, [r3, #84]	; 0x54
   /* Parameters update conditioned to ADC state:                            */
   /* Parameters that can be updated only when ADC is disabled:              */
   /*  - ADC clock mode                                                      */
   /*  - ADC clock prescaler                                                 */
   /*  - ADC Resolution                                                      */
   if (ADC_IS_ENABLE(hadc) == RESET)
- 8001564:	687b      	ldr	r3, [r7, #4]
- 8001566:	681b      	ldr	r3, [r3, #0]
- 8001568:	689b      	ldr	r3, [r3, #8]
- 800156a:	2203      	movs	r2, #3
- 800156c:	4013      	ands	r3, r2
- 800156e:	2b01      	cmp	r3, #1
- 8001570:	d108      	bne.n	8001584 <HAL_ADC_Init+0x90>
- 8001572:	687b      	ldr	r3, [r7, #4]
- 8001574:	681b      	ldr	r3, [r3, #0]
- 8001576:	681b      	ldr	r3, [r3, #0]
- 8001578:	2201      	movs	r2, #1
- 800157a:	4013      	ands	r3, r2
- 800157c:	2b01      	cmp	r3, #1
- 800157e:	d101      	bne.n	8001584 <HAL_ADC_Init+0x90>
- 8001580:	2301      	movs	r3, #1
- 8001582:	e000      	b.n	8001586 <HAL_ADC_Init+0x92>
- 8001584:	2300      	movs	r3, #0
- 8001586:	2b00      	cmp	r3, #0
- 8001588:	d149      	bne.n	800161e <HAL_ADC_Init+0x12a>
+ 80013e8:	687b      	ldr	r3, [r7, #4]
+ 80013ea:	681b      	ldr	r3, [r3, #0]
+ 80013ec:	689b      	ldr	r3, [r3, #8]
+ 80013ee:	2203      	movs	r2, #3
+ 80013f0:	4013      	ands	r3, r2
+ 80013f2:	2b01      	cmp	r3, #1
+ 80013f4:	d108      	bne.n	8001408 <HAL_ADC_Init+0x90>
+ 80013f6:	687b      	ldr	r3, [r7, #4]
+ 80013f8:	681b      	ldr	r3, [r3, #0]
+ 80013fa:	681b      	ldr	r3, [r3, #0]
+ 80013fc:	2201      	movs	r2, #1
+ 80013fe:	4013      	ands	r3, r2
+ 8001400:	2b01      	cmp	r3, #1
+ 8001402:	d101      	bne.n	8001408 <HAL_ADC_Init+0x90>
+ 8001404:	2301      	movs	r3, #1
+ 8001406:	e000      	b.n	800140a <HAL_ADC_Init+0x92>
+ 8001408:	2300      	movs	r3, #0
+ 800140a:	2b00      	cmp	r3, #0
+ 800140c:	d149      	bne.n	80014a2 <HAL_ADC_Init+0x12a>
     /*   - internal measurement paths: Vbat, temperature sensor, Vref       */
     /*     (set into HAL_ADC_ConfigChannel() )                              */
 
     /* Configuration of ADC clock: clock source PCLK or asynchronous with
     selectable prescaler */
     __HAL_ADC_CLOCK_PRESCALER(hadc);
- 800158a:	687b      	ldr	r3, [r7, #4]
- 800158c:	685a      	ldr	r2, [r3, #4]
- 800158e:	23c0      	movs	r3, #192	; 0xc0
- 8001590:	061b      	lsls	r3, r3, #24
- 8001592:	429a      	cmp	r2, r3
- 8001594:	d00b      	beq.n	80015ae <HAL_ADC_Init+0xba>
- 8001596:	687b      	ldr	r3, [r7, #4]
- 8001598:	685a      	ldr	r2, [r3, #4]
- 800159a:	2380      	movs	r3, #128	; 0x80
- 800159c:	05db      	lsls	r3, r3, #23
- 800159e:	429a      	cmp	r2, r3
- 80015a0:	d005      	beq.n	80015ae <HAL_ADC_Init+0xba>
- 80015a2:	687b      	ldr	r3, [r7, #4]
- 80015a4:	685a      	ldr	r2, [r3, #4]
- 80015a6:	2380      	movs	r3, #128	; 0x80
- 80015a8:	061b      	lsls	r3, r3, #24
- 80015aa:	429a      	cmp	r2, r3
- 80015ac:	d111      	bne.n	80015d2 <HAL_ADC_Init+0xde>
- 80015ae:	687b      	ldr	r3, [r7, #4]
- 80015b0:	681b      	ldr	r3, [r3, #0]
- 80015b2:	691a      	ldr	r2, [r3, #16]
- 80015b4:	687b      	ldr	r3, [r7, #4]
- 80015b6:	681b      	ldr	r3, [r3, #0]
- 80015b8:	0092      	lsls	r2, r2, #2
- 80015ba:	0892      	lsrs	r2, r2, #2
- 80015bc:	611a      	str	r2, [r3, #16]
- 80015be:	687b      	ldr	r3, [r7, #4]
- 80015c0:	681b      	ldr	r3, [r3, #0]
- 80015c2:	6919      	ldr	r1, [r3, #16]
- 80015c4:	687b      	ldr	r3, [r7, #4]
- 80015c6:	685a      	ldr	r2, [r3, #4]
- 80015c8:	687b      	ldr	r3, [r7, #4]
- 80015ca:	681b      	ldr	r3, [r3, #0]
- 80015cc:	430a      	orrs	r2, r1
- 80015ce:	611a      	str	r2, [r3, #16]
- 80015d0:	e014      	b.n	80015fc <HAL_ADC_Init+0x108>
- 80015d2:	687b      	ldr	r3, [r7, #4]
- 80015d4:	681b      	ldr	r3, [r3, #0]
- 80015d6:	691a      	ldr	r2, [r3, #16]
- 80015d8:	687b      	ldr	r3, [r7, #4]
- 80015da:	681b      	ldr	r3, [r3, #0]
- 80015dc:	0092      	lsls	r2, r2, #2
- 80015de:	0892      	lsrs	r2, r2, #2
- 80015e0:	611a      	str	r2, [r3, #16]
- 80015e2:	4b79      	ldr	r3, [pc, #484]	; (80017c8 <HAL_ADC_Init+0x2d4>)
- 80015e4:	681a      	ldr	r2, [r3, #0]
- 80015e6:	4b78      	ldr	r3, [pc, #480]	; (80017c8 <HAL_ADC_Init+0x2d4>)
- 80015e8:	4978      	ldr	r1, [pc, #480]	; (80017cc <HAL_ADC_Init+0x2d8>)
- 80015ea:	400a      	ands	r2, r1
- 80015ec:	601a      	str	r2, [r3, #0]
- 80015ee:	4b76      	ldr	r3, [pc, #472]	; (80017c8 <HAL_ADC_Init+0x2d4>)
- 80015f0:	6819      	ldr	r1, [r3, #0]
- 80015f2:	687b      	ldr	r3, [r7, #4]
- 80015f4:	685a      	ldr	r2, [r3, #4]
- 80015f6:	4b74      	ldr	r3, [pc, #464]	; (80017c8 <HAL_ADC_Init+0x2d4>)
- 80015f8:	430a      	orrs	r2, r1
- 80015fa:	601a      	str	r2, [r3, #0]
+ 800140e:	687b      	ldr	r3, [r7, #4]
+ 8001410:	685a      	ldr	r2, [r3, #4]
+ 8001412:	23c0      	movs	r3, #192	; 0xc0
+ 8001414:	061b      	lsls	r3, r3, #24
+ 8001416:	429a      	cmp	r2, r3
+ 8001418:	d00b      	beq.n	8001432 <HAL_ADC_Init+0xba>
+ 800141a:	687b      	ldr	r3, [r7, #4]
+ 800141c:	685a      	ldr	r2, [r3, #4]
+ 800141e:	2380      	movs	r3, #128	; 0x80
+ 8001420:	05db      	lsls	r3, r3, #23
+ 8001422:	429a      	cmp	r2, r3
+ 8001424:	d005      	beq.n	8001432 <HAL_ADC_Init+0xba>
+ 8001426:	687b      	ldr	r3, [r7, #4]
+ 8001428:	685a      	ldr	r2, [r3, #4]
+ 800142a:	2380      	movs	r3, #128	; 0x80
+ 800142c:	061b      	lsls	r3, r3, #24
+ 800142e:	429a      	cmp	r2, r3
+ 8001430:	d111      	bne.n	8001456 <HAL_ADC_Init+0xde>
+ 8001432:	687b      	ldr	r3, [r7, #4]
+ 8001434:	681b      	ldr	r3, [r3, #0]
+ 8001436:	691a      	ldr	r2, [r3, #16]
+ 8001438:	687b      	ldr	r3, [r7, #4]
+ 800143a:	681b      	ldr	r3, [r3, #0]
+ 800143c:	0092      	lsls	r2, r2, #2
+ 800143e:	0892      	lsrs	r2, r2, #2
+ 8001440:	611a      	str	r2, [r3, #16]
+ 8001442:	687b      	ldr	r3, [r7, #4]
+ 8001444:	681b      	ldr	r3, [r3, #0]
+ 8001446:	6919      	ldr	r1, [r3, #16]
+ 8001448:	687b      	ldr	r3, [r7, #4]
+ 800144a:	685a      	ldr	r2, [r3, #4]
+ 800144c:	687b      	ldr	r3, [r7, #4]
+ 800144e:	681b      	ldr	r3, [r3, #0]
+ 8001450:	430a      	orrs	r2, r1
+ 8001452:	611a      	str	r2, [r3, #16]
+ 8001454:	e014      	b.n	8001480 <HAL_ADC_Init+0x108>
+ 8001456:	687b      	ldr	r3, [r7, #4]
+ 8001458:	681b      	ldr	r3, [r3, #0]
+ 800145a:	691a      	ldr	r2, [r3, #16]
+ 800145c:	687b      	ldr	r3, [r7, #4]
+ 800145e:	681b      	ldr	r3, [r3, #0]
+ 8001460:	0092      	lsls	r2, r2, #2
+ 8001462:	0892      	lsrs	r2, r2, #2
+ 8001464:	611a      	str	r2, [r3, #16]
+ 8001466:	4b79      	ldr	r3, [pc, #484]	; (800164c <HAL_ADC_Init+0x2d4>)
+ 8001468:	681a      	ldr	r2, [r3, #0]
+ 800146a:	4b78      	ldr	r3, [pc, #480]	; (800164c <HAL_ADC_Init+0x2d4>)
+ 800146c:	4978      	ldr	r1, [pc, #480]	; (8001650 <HAL_ADC_Init+0x2d8>)
+ 800146e:	400a      	ands	r2, r1
+ 8001470:	601a      	str	r2, [r3, #0]
+ 8001472:	4b76      	ldr	r3, [pc, #472]	; (800164c <HAL_ADC_Init+0x2d4>)
+ 8001474:	6819      	ldr	r1, [r3, #0]
+ 8001476:	687b      	ldr	r3, [r7, #4]
+ 8001478:	685a      	ldr	r2, [r3, #4]
+ 800147a:	4b74      	ldr	r3, [pc, #464]	; (800164c <HAL_ADC_Init+0x2d4>)
+ 800147c:	430a      	orrs	r2, r1
+ 800147e:	601a      	str	r2, [r3, #0]
 
     /* Configuration of ADC:                                                */
     /*  - Resolution                                                        */
     hadc->Instance->CFGR1 &= ~(ADC_CFGR1_RES);
- 80015fc:	687b      	ldr	r3, [r7, #4]
- 80015fe:	681b      	ldr	r3, [r3, #0]
- 8001600:	68da      	ldr	r2, [r3, #12]
- 8001602:	687b      	ldr	r3, [r7, #4]
- 8001604:	681b      	ldr	r3, [r3, #0]
- 8001606:	2118      	movs	r1, #24
- 8001608:	438a      	bics	r2, r1
- 800160a:	60da      	str	r2, [r3, #12]
+ 8001480:	687b      	ldr	r3, [r7, #4]
+ 8001482:	681b      	ldr	r3, [r3, #0]
+ 8001484:	68da      	ldr	r2, [r3, #12]
+ 8001486:	687b      	ldr	r3, [r7, #4]
+ 8001488:	681b      	ldr	r3, [r3, #0]
+ 800148a:	2118      	movs	r1, #24
+ 800148c:	438a      	bics	r2, r1
+ 800148e:	60da      	str	r2, [r3, #12]
     hadc->Instance->CFGR1 |= hadc->Init.Resolution;
- 800160c:	687b      	ldr	r3, [r7, #4]
- 800160e:	681b      	ldr	r3, [r3, #0]
- 8001610:	68d9      	ldr	r1, [r3, #12]
- 8001612:	687b      	ldr	r3, [r7, #4]
- 8001614:	689a      	ldr	r2, [r3, #8]
- 8001616:	687b      	ldr	r3, [r7, #4]
- 8001618:	681b      	ldr	r3, [r3, #0]
- 800161a:	430a      	orrs	r2, r1
- 800161c:	60da      	str	r2, [r3, #12]
+ 8001490:	687b      	ldr	r3, [r7, #4]
+ 8001492:	681b      	ldr	r3, [r3, #0]
+ 8001494:	68d9      	ldr	r1, [r3, #12]
+ 8001496:	687b      	ldr	r3, [r7, #4]
+ 8001498:	689a      	ldr	r2, [r3, #8]
+ 800149a:	687b      	ldr	r3, [r7, #4]
+ 800149c:	681b      	ldr	r3, [r3, #0]
+ 800149e:	430a      	orrs	r2, r1
+ 80014a0:	60da      	str	r2, [r3, #12]
   }
 
   /* Set the Low Frequency mode */
   ADC->CCR &= (uint32_t)~ADC_CCR_LFMEN;
- 800161e:	4b6a      	ldr	r3, [pc, #424]	; (80017c8 <HAL_ADC_Init+0x2d4>)
- 8001620:	681a      	ldr	r2, [r3, #0]
- 8001622:	4b69      	ldr	r3, [pc, #420]	; (80017c8 <HAL_ADC_Init+0x2d4>)
- 8001624:	496a      	ldr	r1, [pc, #424]	; (80017d0 <HAL_ADC_Init+0x2dc>)
- 8001626:	400a      	ands	r2, r1
- 8001628:	601a      	str	r2, [r3, #0]
+ 80014a2:	4b6a      	ldr	r3, [pc, #424]	; (800164c <HAL_ADC_Init+0x2d4>)
+ 80014a4:	681a      	ldr	r2, [r3, #0]
+ 80014a6:	4b69      	ldr	r3, [pc, #420]	; (800164c <HAL_ADC_Init+0x2d4>)
+ 80014a8:	496a      	ldr	r1, [pc, #424]	; (8001654 <HAL_ADC_Init+0x2dc>)
+ 80014aa:	400a      	ands	r2, r1
+ 80014ac:	601a      	str	r2, [r3, #0]
   ADC->CCR |= __HAL_ADC_CCR_LOWFREQUENCY(hadc->Init.LowPowerFrequencyMode);
- 800162a:	4b67      	ldr	r3, [pc, #412]	; (80017c8 <HAL_ADC_Init+0x2d4>)
- 800162c:	6819      	ldr	r1, [r3, #0]
- 800162e:	687b      	ldr	r3, [r7, #4]
- 8001630:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 8001632:	065a      	lsls	r2, r3, #25
- 8001634:	4b64      	ldr	r3, [pc, #400]	; (80017c8 <HAL_ADC_Init+0x2d4>)
- 8001636:	430a      	orrs	r2, r1
- 8001638:	601a      	str	r2, [r3, #0]
+ 80014ae:	4b67      	ldr	r3, [pc, #412]	; (800164c <HAL_ADC_Init+0x2d4>)
+ 80014b0:	6819      	ldr	r1, [r3, #0]
+ 80014b2:	687b      	ldr	r3, [r7, #4]
+ 80014b4:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 80014b6:	065a      	lsls	r2, r3, #25
+ 80014b8:	4b64      	ldr	r3, [pc, #400]	; (800164c <HAL_ADC_Init+0x2d4>)
+ 80014ba:	430a      	orrs	r2, r1
+ 80014bc:	601a      	str	r2, [r3, #0]
 
   /* Enable voltage regulator (if disabled at this step) */
   if (HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADVREGEN))
- 800163a:	687b      	ldr	r3, [r7, #4]
- 800163c:	681b      	ldr	r3, [r3, #0]
- 800163e:	689a      	ldr	r2, [r3, #8]
- 8001640:	2380      	movs	r3, #128	; 0x80
- 8001642:	055b      	lsls	r3, r3, #21
- 8001644:	4013      	ands	r3, r2
- 8001646:	d108      	bne.n	800165a <HAL_ADC_Init+0x166>
+ 80014be:	687b      	ldr	r3, [r7, #4]
+ 80014c0:	681b      	ldr	r3, [r3, #0]
+ 80014c2:	689a      	ldr	r2, [r3, #8]
+ 80014c4:	2380      	movs	r3, #128	; 0x80
+ 80014c6:	055b      	lsls	r3, r3, #21
+ 80014c8:	4013      	ands	r3, r2
+ 80014ca:	d108      	bne.n	80014de <HAL_ADC_Init+0x166>
   {
     /* Set ADVREGEN bit */
     hadc->Instance->CR |= ADC_CR_ADVREGEN;
- 8001648:	687b      	ldr	r3, [r7, #4]
- 800164a:	681b      	ldr	r3, [r3, #0]
- 800164c:	689a      	ldr	r2, [r3, #8]
- 800164e:	687b      	ldr	r3, [r7, #4]
- 8001650:	681b      	ldr	r3, [r3, #0]
- 8001652:	2180      	movs	r1, #128	; 0x80
- 8001654:	0549      	lsls	r1, r1, #21
- 8001656:	430a      	orrs	r2, r1
- 8001658:	609a      	str	r2, [r3, #8]
+ 80014cc:	687b      	ldr	r3, [r7, #4]
+ 80014ce:	681b      	ldr	r3, [r3, #0]
+ 80014d0:	689a      	ldr	r2, [r3, #8]
+ 80014d2:	687b      	ldr	r3, [r7, #4]
+ 80014d4:	681b      	ldr	r3, [r3, #0]
+ 80014d6:	2180      	movs	r1, #128	; 0x80
+ 80014d8:	0549      	lsls	r1, r1, #21
+ 80014da:	430a      	orrs	r2, r1
+ 80014dc:	609a      	str	r2, [r3, #8]
   /*  - Continuous conversion mode                                            */
   /*  - DMA continuous request                                                */
   /*  - Overrun                                                               */
   /*  - AutoDelay feature                                                     */
   /*  - Discontinuous mode                                                    */
   hadc->Instance->CFGR1 &= ~(ADC_CFGR1_ALIGN   |
- 800165a:	687b      	ldr	r3, [r7, #4]
- 800165c:	681b      	ldr	r3, [r3, #0]
- 800165e:	68da      	ldr	r2, [r3, #12]
- 8001660:	687b      	ldr	r3, [r7, #4]
- 8001662:	681b      	ldr	r3, [r3, #0]
- 8001664:	495b      	ldr	r1, [pc, #364]	; (80017d4 <HAL_ADC_Init+0x2e0>)
- 8001666:	400a      	ands	r2, r1
- 8001668:	60da      	str	r2, [r3, #12]
+ 80014de:	687b      	ldr	r3, [r7, #4]
+ 80014e0:	681b      	ldr	r3, [r3, #0]
+ 80014e2:	68da      	ldr	r2, [r3, #12]
+ 80014e4:	687b      	ldr	r3, [r7, #4]
+ 80014e6:	681b      	ldr	r3, [r3, #0]
+ 80014e8:	495b      	ldr	r1, [pc, #364]	; (8001658 <HAL_ADC_Init+0x2e0>)
+ 80014ea:	400a      	ands	r2, r1
+ 80014ec:	60da      	str	r2, [r3, #12]
                              ADC_CFGR1_OVRMOD  |
                              ADC_CFGR1_AUTDLY  |
                              ADC_CFGR1_AUTOFF  |
                              ADC_CFGR1_DISCEN);
 
   hadc->Instance->CFGR1 |= (hadc->Init.DataAlign                             |
- 800166a:	687b      	ldr	r3, [r7, #4]
- 800166c:	681b      	ldr	r3, [r3, #0]
- 800166e:	68d9      	ldr	r1, [r3, #12]
- 8001670:	687b      	ldr	r3, [r7, #4]
- 8001672:	68da      	ldr	r2, [r3, #12]
+ 80014ee:	687b      	ldr	r3, [r7, #4]
+ 80014f0:	681b      	ldr	r3, [r3, #0]
+ 80014f2:	68d9      	ldr	r1, [r3, #12]
+ 80014f4:	687b      	ldr	r3, [r7, #4]
+ 80014f6:	68da      	ldr	r2, [r3, #12]
                             ADC_SCANDIR(hadc->Init.ScanConvMode)             |
- 8001674:	687b      	ldr	r3, [r7, #4]
- 8001676:	691b      	ldr	r3, [r3, #16]
- 8001678:	2b02      	cmp	r3, #2
- 800167a:	d101      	bne.n	8001680 <HAL_ADC_Init+0x18c>
- 800167c:	2304      	movs	r3, #4
- 800167e:	e000      	b.n	8001682 <HAL_ADC_Init+0x18e>
- 8001680:	2300      	movs	r3, #0
+ 80014f8:	687b      	ldr	r3, [r7, #4]
+ 80014fa:	691b      	ldr	r3, [r3, #16]
+ 80014fc:	2b02      	cmp	r3, #2
+ 80014fe:	d101      	bne.n	8001504 <HAL_ADC_Init+0x18c>
+ 8001500:	2304      	movs	r3, #4
+ 8001502:	e000      	b.n	8001506 <HAL_ADC_Init+0x18e>
+ 8001504:	2300      	movs	r3, #0
   hadc->Instance->CFGR1 |= (hadc->Init.DataAlign                             |
- 8001682:	431a      	orrs	r2, r3
+ 8001506:	431a      	orrs	r2, r3
                             ADC_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode)    |
- 8001684:	687b      	ldr	r3, [r7, #4]
- 8001686:	2020      	movs	r0, #32
- 8001688:	5c1b      	ldrb	r3, [r3, r0]
- 800168a:	035b      	lsls	r3, r3, #13
+ 8001508:	687b      	ldr	r3, [r7, #4]
+ 800150a:	2020      	movs	r0, #32
+ 800150c:	5c1b      	ldrb	r3, [r3, r0]
+ 800150e:	035b      	lsls	r3, r3, #13
                             ADC_SCANDIR(hadc->Init.ScanConvMode)             |
- 800168c:	431a      	orrs	r2, r3
+ 8001510:	431a      	orrs	r2, r3
                             ADC_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) |
- 800168e:	687b      	ldr	r3, [r7, #4]
- 8001690:	202c      	movs	r0, #44	; 0x2c
- 8001692:	5c1b      	ldrb	r3, [r3, r0]
- 8001694:	005b      	lsls	r3, r3, #1
+ 8001512:	687b      	ldr	r3, [r7, #4]
+ 8001514:	202c      	movs	r0, #44	; 0x2c
+ 8001516:	5c1b      	ldrb	r3, [r3, r0]
+ 8001518:	005b      	lsls	r3, r3, #1
                             ADC_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode)    |
- 8001696:	431a      	orrs	r2, r3
+ 800151a:	431a      	orrs	r2, r3
                             hadc->Init.Overrun                               |
- 8001698:	687b      	ldr	r3, [r7, #4]
- 800169a:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 800151c:	687b      	ldr	r3, [r7, #4]
+ 800151e:	6b1b      	ldr	r3, [r3, #48]	; 0x30
                             ADC_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) |
- 800169c:	431a      	orrs	r2, r3
+ 8001520:	431a      	orrs	r2, r3
                             __HAL_ADC_CFGR1_AutoDelay(hadc->Init.LowPowerAutoWait) |
- 800169e:	687b      	ldr	r3, [r7, #4]
- 80016a0:	699b      	ldr	r3, [r3, #24]
- 80016a2:	039b      	lsls	r3, r3, #14
+ 8001522:	687b      	ldr	r3, [r7, #4]
+ 8001524:	699b      	ldr	r3, [r3, #24]
+ 8001526:	039b      	lsls	r3, r3, #14
                             hadc->Init.Overrun                               |
- 80016a4:	431a      	orrs	r2, r3
+ 8001528:	431a      	orrs	r2, r3
                             __HAL_ADC_CFGR1_AUTOFF(hadc->Init.LowPowerAutoPowerOff));
- 80016a6:	687b      	ldr	r3, [r7, #4]
- 80016a8:	69db      	ldr	r3, [r3, #28]
- 80016aa:	03db      	lsls	r3, r3, #15
+ 800152a:	687b      	ldr	r3, [r7, #4]
+ 800152c:	69db      	ldr	r3, [r3, #28]
+ 800152e:	03db      	lsls	r3, r3, #15
                             __HAL_ADC_CFGR1_AutoDelay(hadc->Init.LowPowerAutoWait) |
- 80016ac:	431a      	orrs	r2, r3
+ 8001530:	431a      	orrs	r2, r3
   hadc->Instance->CFGR1 |= (hadc->Init.DataAlign                             |
- 80016ae:	687b      	ldr	r3, [r7, #4]
- 80016b0:	681b      	ldr	r3, [r3, #0]
- 80016b2:	430a      	orrs	r2, r1
- 80016b4:	60da      	str	r2, [r3, #12]
+ 8001532:	687b      	ldr	r3, [r7, #4]
+ 8001534:	681b      	ldr	r3, [r3, #0]
+ 8001536:	430a      	orrs	r2, r1
+ 8001538:	60da      	str	r2, [r3, #12]
   /* Enable external trigger if trigger selection is different of software  */
   /* start.                                                                 */
   /* Note: This configuration keeps the hardware feature of parameter       */
   /*       ExternalTrigConvEdge "trigger edge none" equivalent to           */
   /*       software start.                                                  */
   if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
- 80016b6:	687b      	ldr	r3, [r7, #4]
- 80016b8:	6a5a      	ldr	r2, [r3, #36]	; 0x24
- 80016ba:	23c2      	movs	r3, #194	; 0xc2
- 80016bc:	33ff      	adds	r3, #255	; 0xff
- 80016be:	429a      	cmp	r2, r3
- 80016c0:	d00b      	beq.n	80016da <HAL_ADC_Init+0x1e6>
+ 800153a:	687b      	ldr	r3, [r7, #4]
+ 800153c:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 800153e:	23c2      	movs	r3, #194	; 0xc2
+ 8001540:	33ff      	adds	r3, #255	; 0xff
+ 8001542:	429a      	cmp	r2, r3
+ 8001544:	d00b      	beq.n	800155e <HAL_ADC_Init+0x1e6>
   {
     hadc->Instance->CFGR1 |= hadc->Init.ExternalTrigConv |
- 80016c2:	687b      	ldr	r3, [r7, #4]
- 80016c4:	681b      	ldr	r3, [r3, #0]
- 80016c6:	68d9      	ldr	r1, [r3, #12]
- 80016c8:	687b      	ldr	r3, [r7, #4]
- 80016ca:	6a5a      	ldr	r2, [r3, #36]	; 0x24
+ 8001546:	687b      	ldr	r3, [r7, #4]
+ 8001548:	681b      	ldr	r3, [r3, #0]
+ 800154a:	68d9      	ldr	r1, [r3, #12]
+ 800154c:	687b      	ldr	r3, [r7, #4]
+ 800154e:	6a5a      	ldr	r2, [r3, #36]	; 0x24
                              hadc->Init.ExternalTrigConvEdge;
- 80016cc:	687b      	ldr	r3, [r7, #4]
- 80016ce:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 8001550:	687b      	ldr	r3, [r7, #4]
+ 8001552:	6a9b      	ldr	r3, [r3, #40]	; 0x28
     hadc->Instance->CFGR1 |= hadc->Init.ExternalTrigConv |
- 80016d0:	431a      	orrs	r2, r3
- 80016d2:	687b      	ldr	r3, [r7, #4]
- 80016d4:	681b      	ldr	r3, [r3, #0]
- 80016d6:	430a      	orrs	r2, r1
- 80016d8:	60da      	str	r2, [r3, #12]
+ 8001554:	431a      	orrs	r2, r3
+ 8001556:	687b      	ldr	r3, [r7, #4]
+ 8001558:	681b      	ldr	r3, [r3, #0]
+ 800155a:	430a      	orrs	r2, r1
+ 800155c:	60da      	str	r2, [r3, #12]
   }
 
   /* Enable discontinuous mode only if continuous mode is disabled */
   if (hadc->Init.DiscontinuousConvMode == ENABLE)
- 80016da:	687b      	ldr	r3, [r7, #4]
- 80016dc:	2221      	movs	r2, #33	; 0x21
- 80016de:	5c9b      	ldrb	r3, [r3, r2]
- 80016e0:	2b01      	cmp	r3, #1
- 80016e2:	d11a      	bne.n	800171a <HAL_ADC_Init+0x226>
+ 800155e:	687b      	ldr	r3, [r7, #4]
+ 8001560:	2221      	movs	r2, #33	; 0x21
+ 8001562:	5c9b      	ldrb	r3, [r3, r2]
+ 8001564:	2b01      	cmp	r3, #1
+ 8001566:	d11a      	bne.n	800159e <HAL_ADC_Init+0x226>
   {
     if (hadc->Init.ContinuousConvMode == DISABLE)
- 80016e4:	687b      	ldr	r3, [r7, #4]
- 80016e6:	2220      	movs	r2, #32
- 80016e8:	5c9b      	ldrb	r3, [r3, r2]
- 80016ea:	2b00      	cmp	r3, #0
- 80016ec:	d109      	bne.n	8001702 <HAL_ADC_Init+0x20e>
+ 8001568:	687b      	ldr	r3, [r7, #4]
+ 800156a:	2220      	movs	r2, #32
+ 800156c:	5c9b      	ldrb	r3, [r3, r2]
+ 800156e:	2b00      	cmp	r3, #0
+ 8001570:	d109      	bne.n	8001586 <HAL_ADC_Init+0x20e>
     {
       /* Enable the selected ADC group regular discontinuous mode */
       hadc->Instance->CFGR1 |= (ADC_CFGR1_DISCEN);
- 80016ee:	687b      	ldr	r3, [r7, #4]
- 80016f0:	681b      	ldr	r3, [r3, #0]
- 80016f2:	68da      	ldr	r2, [r3, #12]
- 80016f4:	687b      	ldr	r3, [r7, #4]
- 80016f6:	681b      	ldr	r3, [r3, #0]
- 80016f8:	2180      	movs	r1, #128	; 0x80
- 80016fa:	0249      	lsls	r1, r1, #9
- 80016fc:	430a      	orrs	r2, r1
- 80016fe:	60da      	str	r2, [r3, #12]
- 8001700:	e00b      	b.n	800171a <HAL_ADC_Init+0x226>
+ 8001572:	687b      	ldr	r3, [r7, #4]
+ 8001574:	681b      	ldr	r3, [r3, #0]
+ 8001576:	68da      	ldr	r2, [r3, #12]
+ 8001578:	687b      	ldr	r3, [r7, #4]
+ 800157a:	681b      	ldr	r3, [r3, #0]
+ 800157c:	2180      	movs	r1, #128	; 0x80
+ 800157e:	0249      	lsls	r1, r1, #9
+ 8001580:	430a      	orrs	r2, r1
+ 8001582:	60da      	str	r2, [r3, #12]
+ 8001584:	e00b      	b.n	800159e <HAL_ADC_Init+0x226>
       /* ADC regular group discontinuous was intended to be enabled,        */
       /* but ADC regular group modes continuous and sequencer discontinuous */
       /* cannot be enabled simultaneously.                                  */
 
       /* Update ADC state machine to error */
       SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
- 8001702:	687b      	ldr	r3, [r7, #4]
- 8001704:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 8001706:	2220      	movs	r2, #32
- 8001708:	431a      	orrs	r2, r3
- 800170a:	687b      	ldr	r3, [r7, #4]
- 800170c:	655a      	str	r2, [r3, #84]	; 0x54
+ 8001586:	687b      	ldr	r3, [r7, #4]
+ 8001588:	6d5b      	ldr	r3, [r3, #84]	; 0x54
+ 800158a:	2220      	movs	r2, #32
+ 800158c:	431a      	orrs	r2, r3
+ 800158e:	687b      	ldr	r3, [r7, #4]
+ 8001590:	655a      	str	r2, [r3, #84]	; 0x54
 
       /* Set ADC error code to ADC peripheral internal error */
       SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
- 800170e:	687b      	ldr	r3, [r7, #4]
- 8001710:	6d9b      	ldr	r3, [r3, #88]	; 0x58
- 8001712:	2201      	movs	r2, #1
- 8001714:	431a      	orrs	r2, r3
- 8001716:	687b      	ldr	r3, [r7, #4]
- 8001718:	659a      	str	r2, [r3, #88]	; 0x58
+ 8001592:	687b      	ldr	r3, [r7, #4]
+ 8001594:	6d9b      	ldr	r3, [r3, #88]	; 0x58
+ 8001596:	2201      	movs	r2, #1
+ 8001598:	431a      	orrs	r2, r3
+ 800159a:	687b      	ldr	r3, [r7, #4]
+ 800159c:	659a      	str	r2, [r3, #88]	; 0x58
     }
   }
 
   if (hadc->Init.OversamplingMode == ENABLE)
- 800171a:	687b      	ldr	r3, [r7, #4]
- 800171c:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
- 800171e:	2b01      	cmp	r3, #1
- 8001720:	d11f      	bne.n	8001762 <HAL_ADC_Init+0x26e>
+ 800159e:	687b      	ldr	r3, [r7, #4]
+ 80015a0:	6bdb      	ldr	r3, [r3, #60]	; 0x3c
+ 80015a2:	2b01      	cmp	r3, #1
+ 80015a4:	d11f      	bne.n	80015e6 <HAL_ADC_Init+0x26e>
     /* Configuration of Oversampler:                                          */
     /*  - Oversampling Ratio                                                  */
     /*  - Right bit shift                                                     */
     /*  - Triggered mode                                                      */
 
     hadc->Instance->CFGR2 &= ~(ADC_CFGR2_OVSR |
- 8001722:	687b      	ldr	r3, [r7, #4]
- 8001724:	681b      	ldr	r3, [r3, #0]
- 8001726:	691a      	ldr	r2, [r3, #16]
- 8001728:	687b      	ldr	r3, [r7, #4]
- 800172a:	681b      	ldr	r3, [r3, #0]
- 800172c:	492a      	ldr	r1, [pc, #168]	; (80017d8 <HAL_ADC_Init+0x2e4>)
- 800172e:	400a      	ands	r2, r1
- 8001730:	611a      	str	r2, [r3, #16]
+ 80015a6:	687b      	ldr	r3, [r7, #4]
+ 80015a8:	681b      	ldr	r3, [r3, #0]
+ 80015aa:	691a      	ldr	r2, [r3, #16]
+ 80015ac:	687b      	ldr	r3, [r7, #4]
+ 80015ae:	681b      	ldr	r3, [r3, #0]
+ 80015b0:	492a      	ldr	r1, [pc, #168]	; (800165c <HAL_ADC_Init+0x2e4>)
+ 80015b2:	400a      	ands	r2, r1
+ 80015b4:	611a      	str	r2, [r3, #16]
                                ADC_CFGR2_OVSS |
                                ADC_CFGR2_TOVS);
 
     hadc->Instance->CFGR2 |= (hadc->Init.Oversample.Ratio         |
- 8001732:	687b      	ldr	r3, [r7, #4]
- 8001734:	681b      	ldr	r3, [r3, #0]
- 8001736:	6919      	ldr	r1, [r3, #16]
- 8001738:	687b      	ldr	r3, [r7, #4]
- 800173a:	6c1a      	ldr	r2, [r3, #64]	; 0x40
+ 80015b6:	687b      	ldr	r3, [r7, #4]
+ 80015b8:	681b      	ldr	r3, [r3, #0]
+ 80015ba:	6919      	ldr	r1, [r3, #16]
+ 80015bc:	687b      	ldr	r3, [r7, #4]
+ 80015be:	6c1a      	ldr	r2, [r3, #64]	; 0x40
                               hadc->Init.Oversample.RightBitShift             |
- 800173c:	687b      	ldr	r3, [r7, #4]
- 800173e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 80015c0:	687b      	ldr	r3, [r7, #4]
+ 80015c2:	6c5b      	ldr	r3, [r3, #68]	; 0x44
     hadc->Instance->CFGR2 |= (hadc->Init.Oversample.Ratio         |
- 8001740:	431a      	orrs	r2, r3
+ 80015c4:	431a      	orrs	r2, r3
                               hadc->Init.Oversample.TriggeredMode);
- 8001742:	687b      	ldr	r3, [r7, #4]
- 8001744:	6c9b      	ldr	r3, [r3, #72]	; 0x48
+ 80015c6:	687b      	ldr	r3, [r7, #4]
+ 80015c8:	6c9b      	ldr	r3, [r3, #72]	; 0x48
                               hadc->Init.Oversample.RightBitShift             |
- 8001746:	431a      	orrs	r2, r3
+ 80015ca:	431a      	orrs	r2, r3
     hadc->Instance->CFGR2 |= (hadc->Init.Oversample.Ratio         |
- 8001748:	687b      	ldr	r3, [r7, #4]
- 800174a:	681b      	ldr	r3, [r3, #0]
- 800174c:	430a      	orrs	r2, r1
- 800174e:	611a      	str	r2, [r3, #16]
+ 80015cc:	687b      	ldr	r3, [r7, #4]
+ 80015ce:	681b      	ldr	r3, [r3, #0]
+ 80015d0:	430a      	orrs	r2, r1
+ 80015d2:	611a      	str	r2, [r3, #16]
 
     /* Enable OverSampling mode */
     hadc->Instance->CFGR2 |= ADC_CFGR2_OVSE;
- 8001750:	687b      	ldr	r3, [r7, #4]
- 8001752:	681b      	ldr	r3, [r3, #0]
- 8001754:	691a      	ldr	r2, [r3, #16]
- 8001756:	687b      	ldr	r3, [r7, #4]
- 8001758:	681b      	ldr	r3, [r3, #0]
- 800175a:	2101      	movs	r1, #1
- 800175c:	430a      	orrs	r2, r1
- 800175e:	611a      	str	r2, [r3, #16]
- 8001760:	e00e      	b.n	8001780 <HAL_ADC_Init+0x28c>
+ 80015d4:	687b      	ldr	r3, [r7, #4]
+ 80015d6:	681b      	ldr	r3, [r3, #0]
+ 80015d8:	691a      	ldr	r2, [r3, #16]
+ 80015da:	687b      	ldr	r3, [r7, #4]
+ 80015dc:	681b      	ldr	r3, [r3, #0]
+ 80015de:	2101      	movs	r1, #1
+ 80015e0:	430a      	orrs	r2, r1
+ 80015e2:	611a      	str	r2, [r3, #16]
+ 80015e4:	e00e      	b.n	8001604 <HAL_ADC_Init+0x28c>
   }
   else
   {
     if (HAL_IS_BIT_SET(hadc->Instance->CFGR2, ADC_CFGR2_OVSE))
- 8001762:	687b      	ldr	r3, [r7, #4]
- 8001764:	681b      	ldr	r3, [r3, #0]
- 8001766:	691b      	ldr	r3, [r3, #16]
- 8001768:	2201      	movs	r2, #1
- 800176a:	4013      	ands	r3, r2
- 800176c:	2b01      	cmp	r3, #1
- 800176e:	d107      	bne.n	8001780 <HAL_ADC_Init+0x28c>
+ 80015e6:	687b      	ldr	r3, [r7, #4]
+ 80015e8:	681b      	ldr	r3, [r3, #0]
+ 80015ea:	691b      	ldr	r3, [r3, #16]
+ 80015ec:	2201      	movs	r2, #1
+ 80015ee:	4013      	ands	r3, r2
+ 80015f0:	2b01      	cmp	r3, #1
+ 80015f2:	d107      	bne.n	8001604 <HAL_ADC_Init+0x28c>
     {
       /* Disable OverSampling mode if needed */
       hadc->Instance->CFGR2 &= ~ADC_CFGR2_OVSE;
- 8001770:	687b      	ldr	r3, [r7, #4]
- 8001772:	681b      	ldr	r3, [r3, #0]
- 8001774:	691a      	ldr	r2, [r3, #16]
- 8001776:	687b      	ldr	r3, [r7, #4]
- 8001778:	681b      	ldr	r3, [r3, #0]
- 800177a:	2101      	movs	r1, #1
- 800177c:	438a      	bics	r2, r1
- 800177e:	611a      	str	r2, [r3, #16]
+ 80015f4:	687b      	ldr	r3, [r7, #4]
+ 80015f6:	681b      	ldr	r3, [r3, #0]
+ 80015f8:	691a      	ldr	r2, [r3, #16]
+ 80015fa:	687b      	ldr	r3, [r7, #4]
+ 80015fc:	681b      	ldr	r3, [r3, #0]
+ 80015fe:	2101      	movs	r1, #1
+ 8001600:	438a      	bics	r2, r1
+ 8001602:	611a      	str	r2, [r3, #16]
     }
   }
 
   /* Clear the old sampling time */
   hadc->Instance->SMPR &= (uint32_t)(~ADC_SMPR_SMPR);
- 8001780:	687b      	ldr	r3, [r7, #4]
- 8001782:	681b      	ldr	r3, [r3, #0]
- 8001784:	695a      	ldr	r2, [r3, #20]
- 8001786:	687b      	ldr	r3, [r7, #4]
- 8001788:	681b      	ldr	r3, [r3, #0]
- 800178a:	2107      	movs	r1, #7
- 800178c:	438a      	bics	r2, r1
- 800178e:	615a      	str	r2, [r3, #20]
+ 8001604:	687b      	ldr	r3, [r7, #4]
+ 8001606:	681b      	ldr	r3, [r3, #0]
+ 8001608:	695a      	ldr	r2, [r3, #20]
+ 800160a:	687b      	ldr	r3, [r7, #4]
+ 800160c:	681b      	ldr	r3, [r3, #0]
+ 800160e:	2107      	movs	r1, #7
+ 8001610:	438a      	bics	r2, r1
+ 8001612:	615a      	str	r2, [r3, #20]
 
   /* Set the new sample time */
   hadc->Instance->SMPR |= hadc->Init.SamplingTime;
- 8001790:	687b      	ldr	r3, [r7, #4]
- 8001792:	681b      	ldr	r3, [r3, #0]
- 8001794:	6959      	ldr	r1, [r3, #20]
- 8001796:	687b      	ldr	r3, [r7, #4]
- 8001798:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 800179a:	687b      	ldr	r3, [r7, #4]
- 800179c:	681b      	ldr	r3, [r3, #0]
- 800179e:	430a      	orrs	r2, r1
- 80017a0:	615a      	str	r2, [r3, #20]
+ 8001614:	687b      	ldr	r3, [r7, #4]
+ 8001616:	681b      	ldr	r3, [r3, #0]
+ 8001618:	6959      	ldr	r1, [r3, #20]
+ 800161a:	687b      	ldr	r3, [r7, #4]
+ 800161c:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 800161e:	687b      	ldr	r3, [r7, #4]
+ 8001620:	681b      	ldr	r3, [r3, #0]
+ 8001622:	430a      	orrs	r2, r1
+ 8001624:	615a      	str	r2, [r3, #20]
 
   /* Clear ADC error code */
   ADC_CLEAR_ERRORCODE(hadc);
- 80017a2:	687b      	ldr	r3, [r7, #4]
- 80017a4:	2200      	movs	r2, #0
- 80017a6:	659a      	str	r2, [r3, #88]	; 0x58
+ 8001626:	687b      	ldr	r3, [r7, #4]
+ 8001628:	2200      	movs	r2, #0
+ 800162a:	659a      	str	r2, [r3, #88]	; 0x58
 
   /* Set the ADC state */
   ADC_STATE_CLR_SET(hadc->State,
- 80017a8:	687b      	ldr	r3, [r7, #4]
- 80017aa:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 80017ac:	2203      	movs	r2, #3
- 80017ae:	4393      	bics	r3, r2
- 80017b0:	2201      	movs	r2, #1
- 80017b2:	431a      	orrs	r2, r3
- 80017b4:	687b      	ldr	r3, [r7, #4]
- 80017b6:	655a      	str	r2, [r3, #84]	; 0x54
+ 800162c:	687b      	ldr	r3, [r7, #4]
+ 800162e:	6d5b      	ldr	r3, [r3, #84]	; 0x54
+ 8001630:	2203      	movs	r2, #3
+ 8001632:	4393      	bics	r3, r2
+ 8001634:	2201      	movs	r2, #1
+ 8001636:	431a      	orrs	r2, r3
+ 8001638:	687b      	ldr	r3, [r7, #4]
+ 800163a:	655a      	str	r2, [r3, #84]	; 0x54
                     HAL_ADC_STATE_BUSY_INTERNAL,
                     HAL_ADC_STATE_READY);
 
 
   /* Return function status */
   return HAL_OK;
- 80017b8:	2300      	movs	r3, #0
+ 800163c:	2300      	movs	r3, #0
 }
- 80017ba:	0018      	movs	r0, r3
- 80017bc:	46bd      	mov	sp, r7
- 80017be:	b002      	add	sp, #8
- 80017c0:	bd80      	pop	{r7, pc}
- 80017c2:	46c0      	nop			; (mov r8, r8)
- 80017c4:	fffffefd 	.word	0xfffffefd
- 80017c8:	40012708 	.word	0x40012708
- 80017cc:	ffc3ffff 	.word	0xffc3ffff
- 80017d0:	fdffffff 	.word	0xfdffffff
- 80017d4:	fffe0219 	.word	0xfffe0219
- 80017d8:	fffffc03 	.word	0xfffffc03
+ 800163e:	0018      	movs	r0, r3
+ 8001640:	46bd      	mov	sp, r7
+ 8001642:	b002      	add	sp, #8
+ 8001644:	bd80      	pop	{r7, pc}
+ 8001646:	46c0      	nop			; (mov r8, r8)
+ 8001648:	fffffefd 	.word	0xfffffefd
+ 800164c:	40012708 	.word	0x40012708
+ 8001650:	ffc3ffff 	.word	0xffc3ffff
+ 8001654:	fdffffff 	.word	0xfdffffff
+ 8001658:	fffe0219 	.word	0xfffe0219
+ 800165c:	fffffc03 	.word	0xfffffc03
 
-080017dc <HAL_ADC_ConfigChannel>:
+08001660 <HAL_ADC_ConfigChannel>:
   * @param  hadc ADC handle
   * @param  sConfig Structure of ADC channel assigned to ADC group regular.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *sConfig)
 {
- 80017dc:	b580      	push	{r7, lr}
- 80017de:	b082      	sub	sp, #8
- 80017e0:	af00      	add	r7, sp, #0
- 80017e2:	6078      	str	r0, [r7, #4]
- 80017e4:	6039      	str	r1, [r7, #0]
+ 8001660:	b580      	push	{r7, lr}
+ 8001662:	b082      	sub	sp, #8
+ 8001664:	af00      	add	r7, sp, #0
+ 8001666:	6078      	str	r0, [r7, #4]
+ 8001668:	6039      	str	r1, [r7, #0]
   assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
   assert_param(IS_ADC_CHANNEL(sConfig->Channel));
   assert_param(IS_ADC_RANK(sConfig->Rank));
 
   /* Process locked */
   __HAL_LOCK(hadc);
- 80017e6:	687b      	ldr	r3, [r7, #4]
- 80017e8:	2250      	movs	r2, #80	; 0x50
- 80017ea:	5c9b      	ldrb	r3, [r3, r2]
- 80017ec:	2b01      	cmp	r3, #1
- 80017ee:	d101      	bne.n	80017f4 <HAL_ADC_ConfigChannel+0x18>
- 80017f0:	2302      	movs	r3, #2
- 80017f2:	e06c      	b.n	80018ce <HAL_ADC_ConfigChannel+0xf2>
- 80017f4:	687b      	ldr	r3, [r7, #4]
- 80017f6:	2250      	movs	r2, #80	; 0x50
- 80017f8:	2101      	movs	r1, #1
- 80017fa:	5499      	strb	r1, [r3, r2]
+ 800166a:	687b      	ldr	r3, [r7, #4]
+ 800166c:	2250      	movs	r2, #80	; 0x50
+ 800166e:	5c9b      	ldrb	r3, [r3, r2]
+ 8001670:	2b01      	cmp	r3, #1
+ 8001672:	d101      	bne.n	8001678 <HAL_ADC_ConfigChannel+0x18>
+ 8001674:	2302      	movs	r3, #2
+ 8001676:	e06c      	b.n	8001752 <HAL_ADC_ConfigChannel+0xf2>
+ 8001678:	687b      	ldr	r3, [r7, #4]
+ 800167a:	2250      	movs	r2, #80	; 0x50
+ 800167c:	2101      	movs	r1, #1
+ 800167e:	5499      	strb	r1, [r3, r2]
   /* Parameters update conditioned to ADC state:                              */
   /* Parameters that can be updated when ADC is disabled or enabled without   */
   /* conversion on going on regular group:                                    */
   /*  - Channel number                                                        */
   /*  - Management of internal measurement channels: Vbat/VrefInt/TempSensor  */
   if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) != RESET)
- 80017fc:	687b      	ldr	r3, [r7, #4]
- 80017fe:	681b      	ldr	r3, [r3, #0]
- 8001800:	689b      	ldr	r3, [r3, #8]
- 8001802:	2204      	movs	r2, #4
- 8001804:	4013      	ands	r3, r2
- 8001806:	d00b      	beq.n	8001820 <HAL_ADC_ConfigChannel+0x44>
+ 8001680:	687b      	ldr	r3, [r7, #4]
+ 8001682:	681b      	ldr	r3, [r3, #0]
+ 8001684:	689b      	ldr	r3, [r3, #8]
+ 8001686:	2204      	movs	r2, #4
+ 8001688:	4013      	ands	r3, r2
+ 800168a:	d00b      	beq.n	80016a4 <HAL_ADC_ConfigChannel+0x44>
   {
     /* Update ADC state machine to error */
     SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
- 8001808:	687b      	ldr	r3, [r7, #4]
- 800180a:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 800180c:	2220      	movs	r2, #32
- 800180e:	431a      	orrs	r2, r3
- 8001810:	687b      	ldr	r3, [r7, #4]
- 8001812:	655a      	str	r2, [r3, #84]	; 0x54
+ 800168c:	687b      	ldr	r3, [r7, #4]
+ 800168e:	6d5b      	ldr	r3, [r3, #84]	; 0x54
+ 8001690:	2220      	movs	r2, #32
+ 8001692:	431a      	orrs	r2, r3
+ 8001694:	687b      	ldr	r3, [r7, #4]
+ 8001696:	655a      	str	r2, [r3, #84]	; 0x54
     /* Process unlocked */
     __HAL_UNLOCK(hadc);
- 8001814:	687b      	ldr	r3, [r7, #4]
- 8001816:	2250      	movs	r2, #80	; 0x50
- 8001818:	2100      	movs	r1, #0
- 800181a:	5499      	strb	r1, [r3, r2]
+ 8001698:	687b      	ldr	r3, [r7, #4]
+ 800169a:	2250      	movs	r2, #80	; 0x50
+ 800169c:	2100      	movs	r1, #0
+ 800169e:	5499      	strb	r1, [r3, r2]
     return HAL_ERROR;
- 800181c:	2301      	movs	r3, #1
- 800181e:	e056      	b.n	80018ce <HAL_ADC_ConfigChannel+0xf2>
+ 80016a0:	2301      	movs	r3, #1
+ 80016a2:	e056      	b.n	8001752 <HAL_ADC_ConfigChannel+0xf2>
   }
 
   if (sConfig->Rank != ADC_RANK_NONE)
- 8001820:	683b      	ldr	r3, [r7, #0]
- 8001822:	685b      	ldr	r3, [r3, #4]
- 8001824:	4a2c      	ldr	r2, [pc, #176]	; (80018d8 <HAL_ADC_ConfigChannel+0xfc>)
- 8001826:	4293      	cmp	r3, r2
- 8001828:	d028      	beq.n	800187c <HAL_ADC_ConfigChannel+0xa0>
+ 80016a4:	683b      	ldr	r3, [r7, #0]
+ 80016a6:	685b      	ldr	r3, [r3, #4]
+ 80016a8:	4a2c      	ldr	r2, [pc, #176]	; (800175c <HAL_ADC_ConfigChannel+0xfc>)
+ 80016aa:	4293      	cmp	r3, r2
+ 80016ac:	d028      	beq.n	8001700 <HAL_ADC_ConfigChannel+0xa0>
   {
     /* Enable selected channels */
     hadc->Instance->CHSELR |= (uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK);
- 800182a:	687b      	ldr	r3, [r7, #4]
- 800182c:	681b      	ldr	r3, [r3, #0]
- 800182e:	6a99      	ldr	r1, [r3, #40]	; 0x28
- 8001830:	683b      	ldr	r3, [r7, #0]
- 8001832:	681b      	ldr	r3, [r3, #0]
- 8001834:	035b      	lsls	r3, r3, #13
- 8001836:	0b5a      	lsrs	r2, r3, #13
- 8001838:	687b      	ldr	r3, [r7, #4]
- 800183a:	681b      	ldr	r3, [r3, #0]
- 800183c:	430a      	orrs	r2, r1
- 800183e:	629a      	str	r2, [r3, #40]	; 0x28
+ 80016ae:	687b      	ldr	r3, [r7, #4]
+ 80016b0:	681b      	ldr	r3, [r3, #0]
+ 80016b2:	6a99      	ldr	r1, [r3, #40]	; 0x28
+ 80016b4:	683b      	ldr	r3, [r7, #0]
+ 80016b6:	681b      	ldr	r3, [r3, #0]
+ 80016b8:	035b      	lsls	r3, r3, #13
+ 80016ba:	0b5a      	lsrs	r2, r3, #13
+ 80016bc:	687b      	ldr	r3, [r7, #4]
+ 80016be:	681b      	ldr	r3, [r3, #0]
+ 80016c0:	430a      	orrs	r2, r1
+ 80016c2:	629a      	str	r2, [r3, #40]	; 0x28
     /* dedicated internal buffers and path.                                     */
 
 #if defined(ADC_CCR_TSEN)
     /* If Temperature sensor channel is selected, then enable the internal      */
     /* buffers and path  */
     if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK))
- 8001840:	683b      	ldr	r3, [r7, #0]
- 8001842:	681a      	ldr	r2, [r3, #0]
- 8001844:	2380      	movs	r3, #128	; 0x80
- 8001846:	02db      	lsls	r3, r3, #11
- 8001848:	4013      	ands	r3, r2
- 800184a:	d009      	beq.n	8001860 <HAL_ADC_ConfigChannel+0x84>
+ 80016c4:	683b      	ldr	r3, [r7, #0]
+ 80016c6:	681a      	ldr	r2, [r3, #0]
+ 80016c8:	2380      	movs	r3, #128	; 0x80
+ 80016ca:	02db      	lsls	r3, r3, #11
+ 80016cc:	4013      	ands	r3, r2
+ 80016ce:	d009      	beq.n	80016e4 <HAL_ADC_ConfigChannel+0x84>
     {
       ADC->CCR |= ADC_CCR_TSEN;
- 800184c:	4b23      	ldr	r3, [pc, #140]	; (80018dc <HAL_ADC_ConfigChannel+0x100>)
- 800184e:	681a      	ldr	r2, [r3, #0]
- 8001850:	4b22      	ldr	r3, [pc, #136]	; (80018dc <HAL_ADC_ConfigChannel+0x100>)
- 8001852:	2180      	movs	r1, #128	; 0x80
- 8001854:	0409      	lsls	r1, r1, #16
- 8001856:	430a      	orrs	r2, r1
- 8001858:	601a      	str	r2, [r3, #0]
+ 80016d0:	4b23      	ldr	r3, [pc, #140]	; (8001760 <HAL_ADC_ConfigChannel+0x100>)
+ 80016d2:	681a      	ldr	r2, [r3, #0]
+ 80016d4:	4b22      	ldr	r3, [pc, #136]	; (8001760 <HAL_ADC_ConfigChannel+0x100>)
+ 80016d6:	2180      	movs	r1, #128	; 0x80
+ 80016d8:	0409      	lsls	r1, r1, #16
+ 80016da:	430a      	orrs	r2, r1
+ 80016dc:	601a      	str	r2, [r3, #0]
 
       /* Delay for temperature sensor stabilization time */
       ADC_DelayMicroSecond(ADC_TEMPSENSOR_DELAY_US);
- 800185a:	200a      	movs	r0, #10
- 800185c:	f000 f844 	bl	80018e8 <ADC_DelayMicroSecond>
+ 80016de:	200a      	movs	r0, #10
+ 80016e0:	f000 f844 	bl	800176c <ADC_DelayMicroSecond>
     }
 #endif
 
     /* If VRefInt channel is selected, then enable the internal buffers and path   */
     if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK))
- 8001860:	683b      	ldr	r3, [r7, #0]
- 8001862:	681a      	ldr	r2, [r3, #0]
- 8001864:	2380      	movs	r3, #128	; 0x80
- 8001866:	029b      	lsls	r3, r3, #10
- 8001868:	4013      	ands	r3, r2
- 800186a:	d02b      	beq.n	80018c4 <HAL_ADC_ConfigChannel+0xe8>
+ 80016e4:	683b      	ldr	r3, [r7, #0]
+ 80016e6:	681a      	ldr	r2, [r3, #0]
+ 80016e8:	2380      	movs	r3, #128	; 0x80
+ 80016ea:	029b      	lsls	r3, r3, #10
+ 80016ec:	4013      	ands	r3, r2
+ 80016ee:	d02b      	beq.n	8001748 <HAL_ADC_ConfigChannel+0xe8>
     {
       ADC->CCR |= ADC_CCR_VREFEN;
- 800186c:	4b1b      	ldr	r3, [pc, #108]	; (80018dc <HAL_ADC_ConfigChannel+0x100>)
- 800186e:	681a      	ldr	r2, [r3, #0]
- 8001870:	4b1a      	ldr	r3, [pc, #104]	; (80018dc <HAL_ADC_ConfigChannel+0x100>)
- 8001872:	2180      	movs	r1, #128	; 0x80
- 8001874:	03c9      	lsls	r1, r1, #15
- 8001876:	430a      	orrs	r2, r1
- 8001878:	601a      	str	r2, [r3, #0]
- 800187a:	e023      	b.n	80018c4 <HAL_ADC_ConfigChannel+0xe8>
+ 80016f0:	4b1b      	ldr	r3, [pc, #108]	; (8001760 <HAL_ADC_ConfigChannel+0x100>)
+ 80016f2:	681a      	ldr	r2, [r3, #0]
+ 80016f4:	4b1a      	ldr	r3, [pc, #104]	; (8001760 <HAL_ADC_ConfigChannel+0x100>)
+ 80016f6:	2180      	movs	r1, #128	; 0x80
+ 80016f8:	03c9      	lsls	r1, r1, #15
+ 80016fa:	430a      	orrs	r2, r1
+ 80016fc:	601a      	str	r2, [r3, #0]
+ 80016fe:	e023      	b.n	8001748 <HAL_ADC_ConfigChannel+0xe8>
   }
   else
   {
     /* Regular sequence configuration */
     /* Reset the channel selection register from the selected channel */
     hadc->Instance->CHSELR &= ~((uint32_t)(sConfig->Channel & ADC_CHANNEL_MASK));
- 800187c:	687b      	ldr	r3, [r7, #4]
- 800187e:	681b      	ldr	r3, [r3, #0]
- 8001880:	6a9a      	ldr	r2, [r3, #40]	; 0x28
- 8001882:	683b      	ldr	r3, [r7, #0]
- 8001884:	681b      	ldr	r3, [r3, #0]
- 8001886:	035b      	lsls	r3, r3, #13
- 8001888:	0b5b      	lsrs	r3, r3, #13
- 800188a:	43d9      	mvns	r1, r3
- 800188c:	687b      	ldr	r3, [r7, #4]
- 800188e:	681b      	ldr	r3, [r3, #0]
- 8001890:	400a      	ands	r2, r1
- 8001892:	629a      	str	r2, [r3, #40]	; 0x28
+ 8001700:	687b      	ldr	r3, [r7, #4]
+ 8001702:	681b      	ldr	r3, [r3, #0]
+ 8001704:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 8001706:	683b      	ldr	r3, [r7, #0]
+ 8001708:	681b      	ldr	r3, [r3, #0]
+ 800170a:	035b      	lsls	r3, r3, #13
+ 800170c:	0b5b      	lsrs	r3, r3, #13
+ 800170e:	43d9      	mvns	r1, r3
+ 8001710:	687b      	ldr	r3, [r7, #4]
+ 8001712:	681b      	ldr	r3, [r3, #0]
+ 8001714:	400a      	ands	r2, r1
+ 8001716:	629a      	str	r2, [r3, #40]	; 0x28
 
     /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
     /* internal measurement paths disable: If internal channel selected,    */
     /* disable dedicated internal buffers and path.                         */
 #if defined(ADC_CCR_TSEN)
     if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_TEMPSENSOR) == (ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_MASK))
- 8001894:	683b      	ldr	r3, [r7, #0]
- 8001896:	681a      	ldr	r2, [r3, #0]
- 8001898:	2380      	movs	r3, #128	; 0x80
- 800189a:	02db      	lsls	r3, r3, #11
- 800189c:	4013      	ands	r3, r2
- 800189e:	d005      	beq.n	80018ac <HAL_ADC_ConfigChannel+0xd0>
+ 8001718:	683b      	ldr	r3, [r7, #0]
+ 800171a:	681a      	ldr	r2, [r3, #0]
+ 800171c:	2380      	movs	r3, #128	; 0x80
+ 800171e:	02db      	lsls	r3, r3, #11
+ 8001720:	4013      	ands	r3, r2
+ 8001722:	d005      	beq.n	8001730 <HAL_ADC_ConfigChannel+0xd0>
     {
       ADC->CCR &= ~ADC_CCR_TSEN;
- 80018a0:	4b0e      	ldr	r3, [pc, #56]	; (80018dc <HAL_ADC_ConfigChannel+0x100>)
- 80018a2:	681a      	ldr	r2, [r3, #0]
- 80018a4:	4b0d      	ldr	r3, [pc, #52]	; (80018dc <HAL_ADC_ConfigChannel+0x100>)
- 80018a6:	490e      	ldr	r1, [pc, #56]	; (80018e0 <HAL_ADC_ConfigChannel+0x104>)
- 80018a8:	400a      	ands	r2, r1
- 80018aa:	601a      	str	r2, [r3, #0]
+ 8001724:	4b0e      	ldr	r3, [pc, #56]	; (8001760 <HAL_ADC_ConfigChannel+0x100>)
+ 8001726:	681a      	ldr	r2, [r3, #0]
+ 8001728:	4b0d      	ldr	r3, [pc, #52]	; (8001760 <HAL_ADC_ConfigChannel+0x100>)
+ 800172a:	490e      	ldr	r1, [pc, #56]	; (8001764 <HAL_ADC_ConfigChannel+0x104>)
+ 800172c:	400a      	ands	r2, r1
+ 800172e:	601a      	str	r2, [r3, #0]
     }
 #endif
 
     /* If VRefInt channel is selected, then enable the internal buffers and path   */
     if (((sConfig->Channel & ADC_CHANNEL_MASK) & ADC_CHANNEL_VREFINT) == (ADC_CHANNEL_VREFINT & ADC_CHANNEL_MASK))
- 80018ac:	683b      	ldr	r3, [r7, #0]
- 80018ae:	681a      	ldr	r2, [r3, #0]
- 80018b0:	2380      	movs	r3, #128	; 0x80
- 80018b2:	029b      	lsls	r3, r3, #10
- 80018b4:	4013      	ands	r3, r2
- 80018b6:	d005      	beq.n	80018c4 <HAL_ADC_ConfigChannel+0xe8>
+ 8001730:	683b      	ldr	r3, [r7, #0]
+ 8001732:	681a      	ldr	r2, [r3, #0]
+ 8001734:	2380      	movs	r3, #128	; 0x80
+ 8001736:	029b      	lsls	r3, r3, #10
+ 8001738:	4013      	ands	r3, r2
+ 800173a:	d005      	beq.n	8001748 <HAL_ADC_ConfigChannel+0xe8>
     {
       ADC->CCR &= ~ADC_CCR_VREFEN;
- 80018b8:	4b08      	ldr	r3, [pc, #32]	; (80018dc <HAL_ADC_ConfigChannel+0x100>)
- 80018ba:	681a      	ldr	r2, [r3, #0]
- 80018bc:	4b07      	ldr	r3, [pc, #28]	; (80018dc <HAL_ADC_ConfigChannel+0x100>)
- 80018be:	4909      	ldr	r1, [pc, #36]	; (80018e4 <HAL_ADC_ConfigChannel+0x108>)
- 80018c0:	400a      	ands	r2, r1
- 80018c2:	601a      	str	r2, [r3, #0]
+ 800173c:	4b08      	ldr	r3, [pc, #32]	; (8001760 <HAL_ADC_ConfigChannel+0x100>)
+ 800173e:	681a      	ldr	r2, [r3, #0]
+ 8001740:	4b07      	ldr	r3, [pc, #28]	; (8001760 <HAL_ADC_ConfigChannel+0x100>)
+ 8001742:	4909      	ldr	r1, [pc, #36]	; (8001768 <HAL_ADC_ConfigChannel+0x108>)
+ 8001744:	400a      	ands	r2, r1
+ 8001746:	601a      	str	r2, [r3, #0]
     }
 #endif
   }
 
   /* Process unlocked */
   __HAL_UNLOCK(hadc);
- 80018c4:	687b      	ldr	r3, [r7, #4]
- 80018c6:	2250      	movs	r2, #80	; 0x50
- 80018c8:	2100      	movs	r1, #0
- 80018ca:	5499      	strb	r1, [r3, r2]
+ 8001748:	687b      	ldr	r3, [r7, #4]
+ 800174a:	2250      	movs	r2, #80	; 0x50
+ 800174c:	2100      	movs	r1, #0
+ 800174e:	5499      	strb	r1, [r3, r2]
 
   /* Return function status */
   return HAL_OK;
- 80018cc:	2300      	movs	r3, #0
+ 8001750:	2300      	movs	r3, #0
 }
- 80018ce:	0018      	movs	r0, r3
- 80018d0:	46bd      	mov	sp, r7
- 80018d2:	b002      	add	sp, #8
- 80018d4:	bd80      	pop	{r7, pc}
- 80018d6:	46c0      	nop			; (mov r8, r8)
- 80018d8:	00001001 	.word	0x00001001
- 80018dc:	40012708 	.word	0x40012708
- 80018e0:	ff7fffff 	.word	0xff7fffff
- 80018e4:	ffbfffff 	.word	0xffbfffff
+ 8001752:	0018      	movs	r0, r3
+ 8001754:	46bd      	mov	sp, r7
+ 8001756:	b002      	add	sp, #8
+ 8001758:	bd80      	pop	{r7, pc}
+ 800175a:	46c0      	nop			; (mov r8, r8)
+ 800175c:	00001001 	.word	0x00001001
+ 8001760:	40012708 	.word	0x40012708
+ 8001764:	ff7fffff 	.word	0xff7fffff
+ 8001768:	ffbfffff 	.word	0xffbfffff
 
-080018e8 <ADC_DelayMicroSecond>:
+0800176c <ADC_DelayMicroSecond>:
   * @brief  Delay micro seconds
   * @param  microSecond  delay
   * @retval None
   */
 static void ADC_DelayMicroSecond(uint32_t microSecond)
 {
- 80018e8:	b580      	push	{r7, lr}
- 80018ea:	b084      	sub	sp, #16
- 80018ec:	af00      	add	r7, sp, #0
- 80018ee:	6078      	str	r0, [r7, #4]
+ 800176c:	b580      	push	{r7, lr}
+ 800176e:	b084      	sub	sp, #16
+ 8001770:	af00      	add	r7, sp, #0
+ 8001772:	6078      	str	r0, [r7, #4]
   /* Compute number of CPU cycles to wait for */
   __IO uint32_t waitLoopIndex = (microSecond * (SystemCoreClock / 1000000U));
- 80018f0:	4b0b      	ldr	r3, [pc, #44]	; (8001920 <ADC_DelayMicroSecond+0x38>)
- 80018f2:	681b      	ldr	r3, [r3, #0]
- 80018f4:	490b      	ldr	r1, [pc, #44]	; (8001924 <ADC_DelayMicroSecond+0x3c>)
- 80018f6:	0018      	movs	r0, r3
- 80018f8:	f7fe fc18 	bl	800012c <__udivsi3>
- 80018fc:	0003      	movs	r3, r0
- 80018fe:	001a      	movs	r2, r3
- 8001900:	687b      	ldr	r3, [r7, #4]
- 8001902:	4353      	muls	r3, r2
- 8001904:	60fb      	str	r3, [r7, #12]
+ 8001774:	4b0b      	ldr	r3, [pc, #44]	; (80017a4 <ADC_DelayMicroSecond+0x38>)
+ 8001776:	681b      	ldr	r3, [r3, #0]
+ 8001778:	490b      	ldr	r1, [pc, #44]	; (80017a8 <ADC_DelayMicroSecond+0x3c>)
+ 800177a:	0018      	movs	r0, r3
+ 800177c:	f7fe fcd6 	bl	800012c <__udivsi3>
+ 8001780:	0003      	movs	r3, r0
+ 8001782:	001a      	movs	r2, r3
+ 8001784:	687b      	ldr	r3, [r7, #4]
+ 8001786:	4353      	muls	r3, r2
+ 8001788:	60fb      	str	r3, [r7, #12]
 
   while (waitLoopIndex != 0U)
- 8001906:	e002      	b.n	800190e <ADC_DelayMicroSecond+0x26>
+ 800178a:	e002      	b.n	8001792 <ADC_DelayMicroSecond+0x26>
   {
     waitLoopIndex--;
- 8001908:	68fb      	ldr	r3, [r7, #12]
- 800190a:	3b01      	subs	r3, #1
- 800190c:	60fb      	str	r3, [r7, #12]
+ 800178c:	68fb      	ldr	r3, [r7, #12]
+ 800178e:	3b01      	subs	r3, #1
+ 8001790:	60fb      	str	r3, [r7, #12]
   while (waitLoopIndex != 0U)
- 800190e:	68fb      	ldr	r3, [r7, #12]
- 8001910:	2b00      	cmp	r3, #0
- 8001912:	d1f9      	bne.n	8001908 <ADC_DelayMicroSecond+0x20>
+ 8001792:	68fb      	ldr	r3, [r7, #12]
+ 8001794:	2b00      	cmp	r3, #0
+ 8001796:	d1f9      	bne.n	800178c <ADC_DelayMicroSecond+0x20>
   }
 }
- 8001914:	46c0      	nop			; (mov r8, r8)
- 8001916:	46c0      	nop			; (mov r8, r8)
- 8001918:	46bd      	mov	sp, r7
- 800191a:	b004      	add	sp, #16
- 800191c:	bd80      	pop	{r7, pc}
- 800191e:	46c0      	nop			; (mov r8, r8)
- 8001920:	20000000 	.word	0x20000000
- 8001924:	000f4240 	.word	0x000f4240
+ 8001798:	46c0      	nop			; (mov r8, r8)
+ 800179a:	46c0      	nop			; (mov r8, r8)
+ 800179c:	46bd      	mov	sp, r7
+ 800179e:	b004      	add	sp, #16
+ 80017a0:	bd80      	pop	{r7, pc}
+ 80017a2:	46c0      	nop			; (mov r8, r8)
+ 80017a4:	20000000 	.word	0x20000000
+ 80017a8:	000f4240 	.word	0x000f4240
 
-08001928 <__NVIC_EnableIRQ>:
+080017ac <__NVIC_EnableIRQ>:
   \details Enables a device specific interrupt in the NVIC interrupt controller.
   \param [in]      IRQn  Device specific interrupt number.
   \note    IRQn must not be negative.
  */
 __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 {
- 8001928:	b580      	push	{r7, lr}
- 800192a:	b082      	sub	sp, #8
- 800192c:	af00      	add	r7, sp, #0
- 800192e:	0002      	movs	r2, r0
- 8001930:	1dfb      	adds	r3, r7, #7
- 8001932:	701a      	strb	r2, [r3, #0]
+ 80017ac:	b580      	push	{r7, lr}
+ 80017ae:	b082      	sub	sp, #8
+ 80017b0:	af00      	add	r7, sp, #0
+ 80017b2:	0002      	movs	r2, r0
+ 80017b4:	1dfb      	adds	r3, r7, #7
+ 80017b6:	701a      	strb	r2, [r3, #0]
   if ((int32_t)(IRQn) >= 0)
- 8001934:	1dfb      	adds	r3, r7, #7
- 8001936:	781b      	ldrb	r3, [r3, #0]
- 8001938:	2b7f      	cmp	r3, #127	; 0x7f
- 800193a:	d809      	bhi.n	8001950 <__NVIC_EnableIRQ+0x28>
+ 80017b8:	1dfb      	adds	r3, r7, #7
+ 80017ba:	781b      	ldrb	r3, [r3, #0]
+ 80017bc:	2b7f      	cmp	r3, #127	; 0x7f
+ 80017be:	d809      	bhi.n	80017d4 <__NVIC_EnableIRQ+0x28>
   {
     NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
- 800193c:	1dfb      	adds	r3, r7, #7
- 800193e:	781b      	ldrb	r3, [r3, #0]
- 8001940:	001a      	movs	r2, r3
- 8001942:	231f      	movs	r3, #31
- 8001944:	401a      	ands	r2, r3
- 8001946:	4b04      	ldr	r3, [pc, #16]	; (8001958 <__NVIC_EnableIRQ+0x30>)
- 8001948:	2101      	movs	r1, #1
- 800194a:	4091      	lsls	r1, r2
- 800194c:	000a      	movs	r2, r1
- 800194e:	601a      	str	r2, [r3, #0]
+ 80017c0:	1dfb      	adds	r3, r7, #7
+ 80017c2:	781b      	ldrb	r3, [r3, #0]
+ 80017c4:	001a      	movs	r2, r3
+ 80017c6:	231f      	movs	r3, #31
+ 80017c8:	401a      	ands	r2, r3
+ 80017ca:	4b04      	ldr	r3, [pc, #16]	; (80017dc <__NVIC_EnableIRQ+0x30>)
+ 80017cc:	2101      	movs	r1, #1
+ 80017ce:	4091      	lsls	r1, r2
+ 80017d0:	000a      	movs	r2, r1
+ 80017d2:	601a      	str	r2, [r3, #0]
   }
 }
- 8001950:	46c0      	nop			; (mov r8, r8)
- 8001952:	46bd      	mov	sp, r7
- 8001954:	b002      	add	sp, #8
- 8001956:	bd80      	pop	{r7, pc}
- 8001958:	e000e100 	.word	0xe000e100
+ 80017d4:	46c0      	nop			; (mov r8, r8)
+ 80017d6:	46bd      	mov	sp, r7
+ 80017d8:	b002      	add	sp, #8
+ 80017da:	bd80      	pop	{r7, pc}
+ 80017dc:	e000e100 	.word	0xe000e100
 
-0800195c <__NVIC_SetPriority>:
+080017e0 <__NVIC_SetPriority>:
   \param [in]      IRQn  Interrupt number.
   \param [in]  priority  Priority to set.
   \note    The priority cannot be set for every processor exception.
  */
 __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
 {
- 800195c:	b590      	push	{r4, r7, lr}
- 800195e:	b083      	sub	sp, #12
- 8001960:	af00      	add	r7, sp, #0
- 8001962:	0002      	movs	r2, r0
- 8001964:	6039      	str	r1, [r7, #0]
- 8001966:	1dfb      	adds	r3, r7, #7
- 8001968:	701a      	strb	r2, [r3, #0]
+ 80017e0:	b590      	push	{r4, r7, lr}
+ 80017e2:	b083      	sub	sp, #12
+ 80017e4:	af00      	add	r7, sp, #0
+ 80017e6:	0002      	movs	r2, r0
+ 80017e8:	6039      	str	r1, [r7, #0]
+ 80017ea:	1dfb      	adds	r3, r7, #7
+ 80017ec:	701a      	strb	r2, [r3, #0]
   if ((int32_t)(IRQn) >= 0)
- 800196a:	1dfb      	adds	r3, r7, #7
- 800196c:	781b      	ldrb	r3, [r3, #0]
- 800196e:	2b7f      	cmp	r3, #127	; 0x7f
- 8001970:	d828      	bhi.n	80019c4 <__NVIC_SetPriority+0x68>
+ 80017ee:	1dfb      	adds	r3, r7, #7
+ 80017f0:	781b      	ldrb	r3, [r3, #0]
+ 80017f2:	2b7f      	cmp	r3, #127	; 0x7f
+ 80017f4:	d828      	bhi.n	8001848 <__NVIC_SetPriority+0x68>
   {
     NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- 8001972:	4a2f      	ldr	r2, [pc, #188]	; (8001a30 <__NVIC_SetPriority+0xd4>)
- 8001974:	1dfb      	adds	r3, r7, #7
- 8001976:	781b      	ldrb	r3, [r3, #0]
- 8001978:	b25b      	sxtb	r3, r3
- 800197a:	089b      	lsrs	r3, r3, #2
- 800197c:	33c0      	adds	r3, #192	; 0xc0
- 800197e:	009b      	lsls	r3, r3, #2
- 8001980:	589b      	ldr	r3, [r3, r2]
- 8001982:	1dfa      	adds	r2, r7, #7
- 8001984:	7812      	ldrb	r2, [r2, #0]
- 8001986:	0011      	movs	r1, r2
- 8001988:	2203      	movs	r2, #3
- 800198a:	400a      	ands	r2, r1
- 800198c:	00d2      	lsls	r2, r2, #3
- 800198e:	21ff      	movs	r1, #255	; 0xff
- 8001990:	4091      	lsls	r1, r2
- 8001992:	000a      	movs	r2, r1
- 8001994:	43d2      	mvns	r2, r2
- 8001996:	401a      	ands	r2, r3
- 8001998:	0011      	movs	r1, r2
+ 80017f6:	4a2f      	ldr	r2, [pc, #188]	; (80018b4 <__NVIC_SetPriority+0xd4>)
+ 80017f8:	1dfb      	adds	r3, r7, #7
+ 80017fa:	781b      	ldrb	r3, [r3, #0]
+ 80017fc:	b25b      	sxtb	r3, r3
+ 80017fe:	089b      	lsrs	r3, r3, #2
+ 8001800:	33c0      	adds	r3, #192	; 0xc0
+ 8001802:	009b      	lsls	r3, r3, #2
+ 8001804:	589b      	ldr	r3, [r3, r2]
+ 8001806:	1dfa      	adds	r2, r7, #7
+ 8001808:	7812      	ldrb	r2, [r2, #0]
+ 800180a:	0011      	movs	r1, r2
+ 800180c:	2203      	movs	r2, #3
+ 800180e:	400a      	ands	r2, r1
+ 8001810:	00d2      	lsls	r2, r2, #3
+ 8001812:	21ff      	movs	r1, #255	; 0xff
+ 8001814:	4091      	lsls	r1, r2
+ 8001816:	000a      	movs	r2, r1
+ 8001818:	43d2      	mvns	r2, r2
+ 800181a:	401a      	ands	r2, r3
+ 800181c:	0011      	movs	r1, r2
        (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- 800199a:	683b      	ldr	r3, [r7, #0]
- 800199c:	019b      	lsls	r3, r3, #6
- 800199e:	22ff      	movs	r2, #255	; 0xff
- 80019a0:	401a      	ands	r2, r3
- 80019a2:	1dfb      	adds	r3, r7, #7
- 80019a4:	781b      	ldrb	r3, [r3, #0]
- 80019a6:	0018      	movs	r0, r3
- 80019a8:	2303      	movs	r3, #3
- 80019aa:	4003      	ands	r3, r0
- 80019ac:	00db      	lsls	r3, r3, #3
- 80019ae:	409a      	lsls	r2, r3
+ 800181e:	683b      	ldr	r3, [r7, #0]
+ 8001820:	019b      	lsls	r3, r3, #6
+ 8001822:	22ff      	movs	r2, #255	; 0xff
+ 8001824:	401a      	ands	r2, r3
+ 8001826:	1dfb      	adds	r3, r7, #7
+ 8001828:	781b      	ldrb	r3, [r3, #0]
+ 800182a:	0018      	movs	r0, r3
+ 800182c:	2303      	movs	r3, #3
+ 800182e:	4003      	ands	r3, r0
+ 8001830:	00db      	lsls	r3, r3, #3
+ 8001832:	409a      	lsls	r2, r3
     NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- 80019b0:	481f      	ldr	r0, [pc, #124]	; (8001a30 <__NVIC_SetPriority+0xd4>)
- 80019b2:	1dfb      	adds	r3, r7, #7
- 80019b4:	781b      	ldrb	r3, [r3, #0]
- 80019b6:	b25b      	sxtb	r3, r3
- 80019b8:	089b      	lsrs	r3, r3, #2
- 80019ba:	430a      	orrs	r2, r1
- 80019bc:	33c0      	adds	r3, #192	; 0xc0
- 80019be:	009b      	lsls	r3, r3, #2
- 80019c0:	501a      	str	r2, [r3, r0]
+ 8001834:	481f      	ldr	r0, [pc, #124]	; (80018b4 <__NVIC_SetPriority+0xd4>)
+ 8001836:	1dfb      	adds	r3, r7, #7
+ 8001838:	781b      	ldrb	r3, [r3, #0]
+ 800183a:	b25b      	sxtb	r3, r3
+ 800183c:	089b      	lsrs	r3, r3, #2
+ 800183e:	430a      	orrs	r2, r1
+ 8001840:	33c0      	adds	r3, #192	; 0xc0
+ 8001842:	009b      	lsls	r3, r3, #2
+ 8001844:	501a      	str	r2, [r3, r0]
   else
   {
     SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
        (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
   }
 }
- 80019c2:	e031      	b.n	8001a28 <__NVIC_SetPriority+0xcc>
+ 8001846:	e031      	b.n	80018ac <__NVIC_SetPriority+0xcc>
     SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- 80019c4:	4a1b      	ldr	r2, [pc, #108]	; (8001a34 <__NVIC_SetPriority+0xd8>)
- 80019c6:	1dfb      	adds	r3, r7, #7
- 80019c8:	781b      	ldrb	r3, [r3, #0]
- 80019ca:	0019      	movs	r1, r3
- 80019cc:	230f      	movs	r3, #15
- 80019ce:	400b      	ands	r3, r1
- 80019d0:	3b08      	subs	r3, #8
- 80019d2:	089b      	lsrs	r3, r3, #2
- 80019d4:	3306      	adds	r3, #6
- 80019d6:	009b      	lsls	r3, r3, #2
- 80019d8:	18d3      	adds	r3, r2, r3
- 80019da:	3304      	adds	r3, #4
- 80019dc:	681b      	ldr	r3, [r3, #0]
- 80019de:	1dfa      	adds	r2, r7, #7
- 80019e0:	7812      	ldrb	r2, [r2, #0]
- 80019e2:	0011      	movs	r1, r2
- 80019e4:	2203      	movs	r2, #3
- 80019e6:	400a      	ands	r2, r1
- 80019e8:	00d2      	lsls	r2, r2, #3
- 80019ea:	21ff      	movs	r1, #255	; 0xff
- 80019ec:	4091      	lsls	r1, r2
- 80019ee:	000a      	movs	r2, r1
- 80019f0:	43d2      	mvns	r2, r2
- 80019f2:	401a      	ands	r2, r3
- 80019f4:	0011      	movs	r1, r2
+ 8001848:	4a1b      	ldr	r2, [pc, #108]	; (80018b8 <__NVIC_SetPriority+0xd8>)
+ 800184a:	1dfb      	adds	r3, r7, #7
+ 800184c:	781b      	ldrb	r3, [r3, #0]
+ 800184e:	0019      	movs	r1, r3
+ 8001850:	230f      	movs	r3, #15
+ 8001852:	400b      	ands	r3, r1
+ 8001854:	3b08      	subs	r3, #8
+ 8001856:	089b      	lsrs	r3, r3, #2
+ 8001858:	3306      	adds	r3, #6
+ 800185a:	009b      	lsls	r3, r3, #2
+ 800185c:	18d3      	adds	r3, r2, r3
+ 800185e:	3304      	adds	r3, #4
+ 8001860:	681b      	ldr	r3, [r3, #0]
+ 8001862:	1dfa      	adds	r2, r7, #7
+ 8001864:	7812      	ldrb	r2, [r2, #0]
+ 8001866:	0011      	movs	r1, r2
+ 8001868:	2203      	movs	r2, #3
+ 800186a:	400a      	ands	r2, r1
+ 800186c:	00d2      	lsls	r2, r2, #3
+ 800186e:	21ff      	movs	r1, #255	; 0xff
+ 8001870:	4091      	lsls	r1, r2
+ 8001872:	000a      	movs	r2, r1
+ 8001874:	43d2      	mvns	r2, r2
+ 8001876:	401a      	ands	r2, r3
+ 8001878:	0011      	movs	r1, r2
        (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
- 80019f6:	683b      	ldr	r3, [r7, #0]
- 80019f8:	019b      	lsls	r3, r3, #6
- 80019fa:	22ff      	movs	r2, #255	; 0xff
- 80019fc:	401a      	ands	r2, r3
- 80019fe:	1dfb      	adds	r3, r7, #7
- 8001a00:	781b      	ldrb	r3, [r3, #0]
- 8001a02:	0018      	movs	r0, r3
- 8001a04:	2303      	movs	r3, #3
- 8001a06:	4003      	ands	r3, r0
- 8001a08:	00db      	lsls	r3, r3, #3
- 8001a0a:	409a      	lsls	r2, r3
+ 800187a:	683b      	ldr	r3, [r7, #0]
+ 800187c:	019b      	lsls	r3, r3, #6
+ 800187e:	22ff      	movs	r2, #255	; 0xff
+ 8001880:	401a      	ands	r2, r3
+ 8001882:	1dfb      	adds	r3, r7, #7
+ 8001884:	781b      	ldrb	r3, [r3, #0]
+ 8001886:	0018      	movs	r0, r3
+ 8001888:	2303      	movs	r3, #3
+ 800188a:	4003      	ands	r3, r0
+ 800188c:	00db      	lsls	r3, r3, #3
+ 800188e:	409a      	lsls	r2, r3
     SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
- 8001a0c:	4809      	ldr	r0, [pc, #36]	; (8001a34 <__NVIC_SetPriority+0xd8>)
- 8001a0e:	1dfb      	adds	r3, r7, #7
- 8001a10:	781b      	ldrb	r3, [r3, #0]
- 8001a12:	001c      	movs	r4, r3
- 8001a14:	230f      	movs	r3, #15
- 8001a16:	4023      	ands	r3, r4
- 8001a18:	3b08      	subs	r3, #8
- 8001a1a:	089b      	lsrs	r3, r3, #2
- 8001a1c:	430a      	orrs	r2, r1
- 8001a1e:	3306      	adds	r3, #6
- 8001a20:	009b      	lsls	r3, r3, #2
- 8001a22:	18c3      	adds	r3, r0, r3
- 8001a24:	3304      	adds	r3, #4
- 8001a26:	601a      	str	r2, [r3, #0]
+ 8001890:	4809      	ldr	r0, [pc, #36]	; (80018b8 <__NVIC_SetPriority+0xd8>)
+ 8001892:	1dfb      	adds	r3, r7, #7
+ 8001894:	781b      	ldrb	r3, [r3, #0]
+ 8001896:	001c      	movs	r4, r3
+ 8001898:	230f      	movs	r3, #15
+ 800189a:	4023      	ands	r3, r4
+ 800189c:	3b08      	subs	r3, #8
+ 800189e:	089b      	lsrs	r3, r3, #2
+ 80018a0:	430a      	orrs	r2, r1
+ 80018a2:	3306      	adds	r3, #6
+ 80018a4:	009b      	lsls	r3, r3, #2
+ 80018a6:	18c3      	adds	r3, r0, r3
+ 80018a8:	3304      	adds	r3, #4
+ 80018aa:	601a      	str	r2, [r3, #0]
 }
- 8001a28:	46c0      	nop			; (mov r8, r8)
- 8001a2a:	46bd      	mov	sp, r7
- 8001a2c:	b003      	add	sp, #12
- 8001a2e:	bd90      	pop	{r4, r7, pc}
- 8001a30:	e000e100 	.word	0xe000e100
- 8001a34:	e000ed00 	.word	0xe000ed00
+ 80018ac:	46c0      	nop			; (mov r8, r8)
+ 80018ae:	46bd      	mov	sp, r7
+ 80018b0:	b003      	add	sp, #12
+ 80018b2:	bd90      	pop	{r4, r7, pc}
+ 80018b4:	e000e100 	.word	0xe000e100
+ 80018b8:	e000ed00 	.word	0xe000ed00
 
-08001a38 <SysTick_Config>:
+080018bc <SysTick_Config>:
   \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
            function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
            must contain a vendor-specific implementation of this function.
  */
 __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 {
- 8001a38:	b580      	push	{r7, lr}
- 8001a3a:	b082      	sub	sp, #8
- 8001a3c:	af00      	add	r7, sp, #0
- 8001a3e:	6078      	str	r0, [r7, #4]
+ 80018bc:	b580      	push	{r7, lr}
+ 80018be:	b082      	sub	sp, #8
+ 80018c0:	af00      	add	r7, sp, #0
+ 80018c2:	6078      	str	r0, [r7, #4]
   if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
- 8001a40:	687b      	ldr	r3, [r7, #4]
- 8001a42:	1e5a      	subs	r2, r3, #1
- 8001a44:	2380      	movs	r3, #128	; 0x80
- 8001a46:	045b      	lsls	r3, r3, #17
- 8001a48:	429a      	cmp	r2, r3
- 8001a4a:	d301      	bcc.n	8001a50 <SysTick_Config+0x18>
+ 80018c4:	687b      	ldr	r3, [r7, #4]
+ 80018c6:	1e5a      	subs	r2, r3, #1
+ 80018c8:	2380      	movs	r3, #128	; 0x80
+ 80018ca:	045b      	lsls	r3, r3, #17
+ 80018cc:	429a      	cmp	r2, r3
+ 80018ce:	d301      	bcc.n	80018d4 <SysTick_Config+0x18>
   {
     return (1UL);                                                   /* Reload value impossible */
- 8001a4c:	2301      	movs	r3, #1
- 8001a4e:	e010      	b.n	8001a72 <SysTick_Config+0x3a>
+ 80018d0:	2301      	movs	r3, #1
+ 80018d2:	e010      	b.n	80018f6 <SysTick_Config+0x3a>
   }
 
   SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
- 8001a50:	4b0a      	ldr	r3, [pc, #40]	; (8001a7c <SysTick_Config+0x44>)
- 8001a52:	687a      	ldr	r2, [r7, #4]
- 8001a54:	3a01      	subs	r2, #1
- 8001a56:	605a      	str	r2, [r3, #4]
+ 80018d4:	4b0a      	ldr	r3, [pc, #40]	; (8001900 <SysTick_Config+0x44>)
+ 80018d6:	687a      	ldr	r2, [r7, #4]
+ 80018d8:	3a01      	subs	r2, #1
+ 80018da:	605a      	str	r2, [r3, #4]
   NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
- 8001a58:	2301      	movs	r3, #1
- 8001a5a:	425b      	negs	r3, r3
- 8001a5c:	2103      	movs	r1, #3
- 8001a5e:	0018      	movs	r0, r3
- 8001a60:	f7ff ff7c 	bl	800195c <__NVIC_SetPriority>
+ 80018dc:	2301      	movs	r3, #1
+ 80018de:	425b      	negs	r3, r3
+ 80018e0:	2103      	movs	r1, #3
+ 80018e2:	0018      	movs	r0, r3
+ 80018e4:	f7ff ff7c 	bl	80017e0 <__NVIC_SetPriority>
   SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
- 8001a64:	4b05      	ldr	r3, [pc, #20]	; (8001a7c <SysTick_Config+0x44>)
- 8001a66:	2200      	movs	r2, #0
- 8001a68:	609a      	str	r2, [r3, #8]
+ 80018e8:	4b05      	ldr	r3, [pc, #20]	; (8001900 <SysTick_Config+0x44>)
+ 80018ea:	2200      	movs	r2, #0
+ 80018ec:	609a      	str	r2, [r3, #8]
   SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
- 8001a6a:	4b04      	ldr	r3, [pc, #16]	; (8001a7c <SysTick_Config+0x44>)
- 8001a6c:	2207      	movs	r2, #7
- 8001a6e:	601a      	str	r2, [r3, #0]
+ 80018ee:	4b04      	ldr	r3, [pc, #16]	; (8001900 <SysTick_Config+0x44>)
+ 80018f0:	2207      	movs	r2, #7
+ 80018f2:	601a      	str	r2, [r3, #0]
                    SysTick_CTRL_TICKINT_Msk   |
                    SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
   return (0UL);                                                     /* Function successful */
- 8001a70:	2300      	movs	r3, #0
+ 80018f4:	2300      	movs	r3, #0
 }
- 8001a72:	0018      	movs	r0, r3
- 8001a74:	46bd      	mov	sp, r7
- 8001a76:	b002      	add	sp, #8
- 8001a78:	bd80      	pop	{r7, pc}
- 8001a7a:	46c0      	nop			; (mov r8, r8)
- 8001a7c:	e000e010 	.word	0xe000e010
+ 80018f6:	0018      	movs	r0, r3
+ 80018f8:	46bd      	mov	sp, r7
+ 80018fa:	b002      	add	sp, #8
+ 80018fc:	bd80      	pop	{r7, pc}
+ 80018fe:	46c0      	nop			; (mov r8, r8)
+ 8001900:	e000e010 	.word	0xe000e010
 
-08001a80 <HAL_NVIC_SetPriority>:
+08001904 <HAL_NVIC_SetPriority>:
   *         with stm32l0xx devices, this parameter is a dummy value and it is ignored, because 
   *         no subpriority supported in Cortex M0+ based products.   
   * @retval None
   */
 void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
 { 
- 8001a80:	b580      	push	{r7, lr}
- 8001a82:	b084      	sub	sp, #16
- 8001a84:	af00      	add	r7, sp, #0
- 8001a86:	60b9      	str	r1, [r7, #8]
- 8001a88:	607a      	str	r2, [r7, #4]
- 8001a8a:	210f      	movs	r1, #15
- 8001a8c:	187b      	adds	r3, r7, r1
- 8001a8e:	1c02      	adds	r2, r0, #0
- 8001a90:	701a      	strb	r2, [r3, #0]
+ 8001904:	b580      	push	{r7, lr}
+ 8001906:	b084      	sub	sp, #16
+ 8001908:	af00      	add	r7, sp, #0
+ 800190a:	60b9      	str	r1, [r7, #8]
+ 800190c:	607a      	str	r2, [r7, #4]
+ 800190e:	210f      	movs	r1, #15
+ 8001910:	187b      	adds	r3, r7, r1
+ 8001912:	1c02      	adds	r2, r0, #0
+ 8001914:	701a      	strb	r2, [r3, #0]
     /* Check the parameters */
   assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
   NVIC_SetPriority(IRQn,PreemptPriority);
- 8001a92:	68ba      	ldr	r2, [r7, #8]
- 8001a94:	187b      	adds	r3, r7, r1
- 8001a96:	781b      	ldrb	r3, [r3, #0]
- 8001a98:	b25b      	sxtb	r3, r3
- 8001a9a:	0011      	movs	r1, r2
- 8001a9c:	0018      	movs	r0, r3
- 8001a9e:	f7ff ff5d 	bl	800195c <__NVIC_SetPriority>
+ 8001916:	68ba      	ldr	r2, [r7, #8]
+ 8001918:	187b      	adds	r3, r7, r1
+ 800191a:	781b      	ldrb	r3, [r3, #0]
+ 800191c:	b25b      	sxtb	r3, r3
+ 800191e:	0011      	movs	r1, r2
+ 8001920:	0018      	movs	r0, r3
+ 8001922:	f7ff ff5d 	bl	80017e0 <__NVIC_SetPriority>
 }
- 8001aa2:	46c0      	nop			; (mov r8, r8)
- 8001aa4:	46bd      	mov	sp, r7
- 8001aa6:	b004      	add	sp, #16
- 8001aa8:	bd80      	pop	{r7, pc}
+ 8001926:	46c0      	nop			; (mov r8, r8)
+ 8001928:	46bd      	mov	sp, r7
+ 800192a:	b004      	add	sp, #16
+ 800192c:	bd80      	pop	{r7, pc}
 
-08001aaa <HAL_NVIC_EnableIRQ>:
+0800192e <HAL_NVIC_EnableIRQ>:
   *         This parameter can be an enumerator of  IRQn_Type enumeration
   *         (For the complete STM32 Devices IRQ Channels list, please refer to stm32l0xx.h file)  
   * @retval None
   */
 void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
 {
- 8001aaa:	b580      	push	{r7, lr}
- 8001aac:	b082      	sub	sp, #8
- 8001aae:	af00      	add	r7, sp, #0
- 8001ab0:	0002      	movs	r2, r0
- 8001ab2:	1dfb      	adds	r3, r7, #7
- 8001ab4:	701a      	strb	r2, [r3, #0]
+ 800192e:	b580      	push	{r7, lr}
+ 8001930:	b082      	sub	sp, #8
+ 8001932:	af00      	add	r7, sp, #0
+ 8001934:	0002      	movs	r2, r0
+ 8001936:	1dfb      	adds	r3, r7, #7
+ 8001938:	701a      	strb	r2, [r3, #0]
   /* Check the parameters */
   assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
   
   /* Enable interrupt */
   NVIC_EnableIRQ(IRQn);
- 8001ab6:	1dfb      	adds	r3, r7, #7
- 8001ab8:	781b      	ldrb	r3, [r3, #0]
- 8001aba:	b25b      	sxtb	r3, r3
- 8001abc:	0018      	movs	r0, r3
- 8001abe:	f7ff ff33 	bl	8001928 <__NVIC_EnableIRQ>
+ 800193a:	1dfb      	adds	r3, r7, #7
+ 800193c:	781b      	ldrb	r3, [r3, #0]
+ 800193e:	b25b      	sxtb	r3, r3
+ 8001940:	0018      	movs	r0, r3
+ 8001942:	f7ff ff33 	bl	80017ac <__NVIC_EnableIRQ>
 }
- 8001ac2:	46c0      	nop			; (mov r8, r8)
- 8001ac4:	46bd      	mov	sp, r7
- 8001ac6:	b002      	add	sp, #8
- 8001ac8:	bd80      	pop	{r7, pc}
+ 8001946:	46c0      	nop			; (mov r8, r8)
+ 8001948:	46bd      	mov	sp, r7
+ 800194a:	b002      	add	sp, #8
+ 800194c:	bd80      	pop	{r7, pc}
 
-08001aca <HAL_SYSTICK_Config>:
+0800194e <HAL_SYSTICK_Config>:
   * @param  TicksNumb Specifies the ticks Number of ticks between two interrupts.
   * @retval status:  - 0  Function succeeded.
   *                  - 1  Function failed.
   */
 uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
 {
- 8001aca:	b580      	push	{r7, lr}
- 8001acc:	b082      	sub	sp, #8
- 8001ace:	af00      	add	r7, sp, #0
- 8001ad0:	6078      	str	r0, [r7, #4]
+ 800194e:	b580      	push	{r7, lr}
+ 8001950:	b082      	sub	sp, #8
+ 8001952:	af00      	add	r7, sp, #0
+ 8001954:	6078      	str	r0, [r7, #4]
    return SysTick_Config(TicksNumb);
- 8001ad2:	687b      	ldr	r3, [r7, #4]
- 8001ad4:	0018      	movs	r0, r3
- 8001ad6:	f7ff ffaf 	bl	8001a38 <SysTick_Config>
- 8001ada:	0003      	movs	r3, r0
+ 8001956:	687b      	ldr	r3, [r7, #4]
+ 8001958:	0018      	movs	r0, r3
+ 800195a:	f7ff ffaf 	bl	80018bc <SysTick_Config>
+ 800195e:	0003      	movs	r3, r0
 }
- 8001adc:	0018      	movs	r0, r3
- 8001ade:	46bd      	mov	sp, r7
- 8001ae0:	b002      	add	sp, #8
- 8001ae2:	bd80      	pop	{r7, pc}
+ 8001960:	0018      	movs	r0, r3
+ 8001962:	46bd      	mov	sp, r7
+ 8001964:	b002      	add	sp, #8
+ 8001966:	bd80      	pop	{r7, pc}
 
-08001ae4 <HAL_DMA_Init>:
+08001968 <HAL_DMA_Init>:
   * @param  hdma Pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA Channel.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
 {
- 8001ae4:	b580      	push	{r7, lr}
- 8001ae6:	b084      	sub	sp, #16
- 8001ae8:	af00      	add	r7, sp, #0
- 8001aea:	6078      	str	r0, [r7, #4]
+ 8001968:	b580      	push	{r7, lr}
+ 800196a:	b084      	sub	sp, #16
+ 800196c:	af00      	add	r7, sp, #0
+ 800196e:	6078      	str	r0, [r7, #4]
   uint32_t tmp;
 
   /* Check the DMA handle allocation */
   if(hdma == NULL)
- 8001aec:	687b      	ldr	r3, [r7, #4]
- 8001aee:	2b00      	cmp	r3, #0
- 8001af0:	d101      	bne.n	8001af6 <HAL_DMA_Init+0x12>
+ 8001970:	687b      	ldr	r3, [r7, #4]
+ 8001972:	2b00      	cmp	r3, #0
+ 8001974:	d101      	bne.n	800197a <HAL_DMA_Init+0x12>
   {
     return HAL_ERROR;
- 8001af2:	2301      	movs	r3, #1
- 8001af4:	e061      	b.n	8001bba <HAL_DMA_Init+0xd6>
+ 8001976:	2301      	movs	r3, #1
+ 8001978:	e061      	b.n	8001a3e <HAL_DMA_Init+0xd6>
   assert_param(IS_DMA_MODE(hdma->Init.Mode));
   assert_param(IS_DMA_PRIORITY(hdma->Init.Priority));
 
   /* Compute the channel index */
   /* Only one DMA: DMA1 */
   hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
- 8001af6:	687b      	ldr	r3, [r7, #4]
- 8001af8:	681b      	ldr	r3, [r3, #0]
- 8001afa:	4a32      	ldr	r2, [pc, #200]	; (8001bc4 <HAL_DMA_Init+0xe0>)
- 8001afc:	4694      	mov	ip, r2
- 8001afe:	4463      	add	r3, ip
- 8001b00:	2114      	movs	r1, #20
- 8001b02:	0018      	movs	r0, r3
- 8001b04:	f7fe fb12 	bl	800012c <__udivsi3>
- 8001b08:	0003      	movs	r3, r0
- 8001b0a:	009a      	lsls	r2, r3, #2
- 8001b0c:	687b      	ldr	r3, [r7, #4]
- 8001b0e:	645a      	str	r2, [r3, #68]	; 0x44
+ 800197a:	687b      	ldr	r3, [r7, #4]
+ 800197c:	681b      	ldr	r3, [r3, #0]
+ 800197e:	4a32      	ldr	r2, [pc, #200]	; (8001a48 <HAL_DMA_Init+0xe0>)
+ 8001980:	4694      	mov	ip, r2
+ 8001982:	4463      	add	r3, ip
+ 8001984:	2114      	movs	r1, #20
+ 8001986:	0018      	movs	r0, r3
+ 8001988:	f7fe fbd0 	bl	800012c <__udivsi3>
+ 800198c:	0003      	movs	r3, r0
+ 800198e:	009a      	lsls	r2, r3, #2
+ 8001990:	687b      	ldr	r3, [r7, #4]
+ 8001992:	645a      	str	r2, [r3, #68]	; 0x44
   hdma->DmaBaseAddress = DMA1;
- 8001b10:	687b      	ldr	r3, [r7, #4]
- 8001b12:	4a2d      	ldr	r2, [pc, #180]	; (8001bc8 <HAL_DMA_Init+0xe4>)
- 8001b14:	641a      	str	r2, [r3, #64]	; 0x40
+ 8001994:	687b      	ldr	r3, [r7, #4]
+ 8001996:	4a2d      	ldr	r2, [pc, #180]	; (8001a4c <HAL_DMA_Init+0xe4>)
+ 8001998:	641a      	str	r2, [r3, #64]	; 0x40
 
   /* Change DMA peripheral state */
   hdma->State = HAL_DMA_STATE_BUSY;
- 8001b16:	687b      	ldr	r3, [r7, #4]
- 8001b18:	2225      	movs	r2, #37	; 0x25
- 8001b1a:	2102      	movs	r1, #2
- 8001b1c:	5499      	strb	r1, [r3, r2]
+ 800199a:	687b      	ldr	r3, [r7, #4]
+ 800199c:	2225      	movs	r2, #37	; 0x25
+ 800199e:	2102      	movs	r1, #2
+ 80019a0:	5499      	strb	r1, [r3, r2]
 
   /* Get the CR register value */
   tmp = hdma->Instance->CCR;
- 8001b1e:	687b      	ldr	r3, [r7, #4]
- 8001b20:	681b      	ldr	r3, [r3, #0]
- 8001b22:	681b      	ldr	r3, [r3, #0]
- 8001b24:	60fb      	str	r3, [r7, #12]
+ 80019a2:	687b      	ldr	r3, [r7, #4]
+ 80019a4:	681b      	ldr	r3, [r3, #0]
+ 80019a6:	681b      	ldr	r3, [r3, #0]
+ 80019a8:	60fb      	str	r3, [r7, #12]
 
   /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR and MEM2MEM bits */
   tmp &= ((uint32_t)~(DMA_CCR_PL    | DMA_CCR_MSIZE  | DMA_CCR_PSIZE  |
- 8001b26:	68fb      	ldr	r3, [r7, #12]
- 8001b28:	4a28      	ldr	r2, [pc, #160]	; (8001bcc <HAL_DMA_Init+0xe8>)
- 8001b2a:	4013      	ands	r3, r2
- 8001b2c:	60fb      	str	r3, [r7, #12]
+ 80019aa:	68fb      	ldr	r3, [r7, #12]
+ 80019ac:	4a28      	ldr	r2, [pc, #160]	; (8001a50 <HAL_DMA_Init+0xe8>)
+ 80019ae:	4013      	ands	r3, r2
+ 80019b0:	60fb      	str	r3, [r7, #12]
                       DMA_CCR_MINC  | DMA_CCR_PINC   | DMA_CCR_CIRC   |
                       DMA_CCR_DIR   | DMA_CCR_MEM2MEM));
 
   /* Prepare the DMA Channel configuration */
   tmp |=  hdma->Init.Direction        |
- 8001b2e:	687b      	ldr	r3, [r7, #4]
- 8001b30:	689a      	ldr	r2, [r3, #8]
+ 80019b2:	687b      	ldr	r3, [r7, #4]
+ 80019b4:	689a      	ldr	r2, [r3, #8]
           hdma->Init.PeriphInc           | hdma->Init.MemInc           |
- 8001b32:	687b      	ldr	r3, [r7, #4]
- 8001b34:	68db      	ldr	r3, [r3, #12]
+ 80019b6:	687b      	ldr	r3, [r7, #4]
+ 80019b8:	68db      	ldr	r3, [r3, #12]
   tmp |=  hdma->Init.Direction        |
- 8001b36:	431a      	orrs	r2, r3
+ 80019ba:	431a      	orrs	r2, r3
           hdma->Init.PeriphInc           | hdma->Init.MemInc           |
- 8001b38:	687b      	ldr	r3, [r7, #4]
- 8001b3a:	691b      	ldr	r3, [r3, #16]
- 8001b3c:	431a      	orrs	r2, r3
+ 80019bc:	687b      	ldr	r3, [r7, #4]
+ 80019be:	691b      	ldr	r3, [r3, #16]
+ 80019c0:	431a      	orrs	r2, r3
           hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 8001b3e:	687b      	ldr	r3, [r7, #4]
- 8001b40:	695b      	ldr	r3, [r3, #20]
+ 80019c2:	687b      	ldr	r3, [r7, #4]
+ 80019c4:	695b      	ldr	r3, [r3, #20]
           hdma->Init.PeriphInc           | hdma->Init.MemInc           |
- 8001b42:	431a      	orrs	r2, r3
+ 80019c6:	431a      	orrs	r2, r3
           hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 8001b44:	687b      	ldr	r3, [r7, #4]
- 8001b46:	699b      	ldr	r3, [r3, #24]
- 8001b48:	431a      	orrs	r2, r3
+ 80019c8:	687b      	ldr	r3, [r7, #4]
+ 80019ca:	699b      	ldr	r3, [r3, #24]
+ 80019cc:	431a      	orrs	r2, r3
           hdma->Init.Mode                | hdma->Init.Priority;
- 8001b4a:	687b      	ldr	r3, [r7, #4]
- 8001b4c:	69db      	ldr	r3, [r3, #28]
+ 80019ce:	687b      	ldr	r3, [r7, #4]
+ 80019d0:	69db      	ldr	r3, [r3, #28]
           hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
- 8001b4e:	431a      	orrs	r2, r3
+ 80019d2:	431a      	orrs	r2, r3
           hdma->Init.Mode                | hdma->Init.Priority;
- 8001b50:	687b      	ldr	r3, [r7, #4]
- 8001b52:	6a1b      	ldr	r3, [r3, #32]
- 8001b54:	4313      	orrs	r3, r2
+ 80019d4:	687b      	ldr	r3, [r7, #4]
+ 80019d6:	6a1b      	ldr	r3, [r3, #32]
+ 80019d8:	4313      	orrs	r3, r2
   tmp |=  hdma->Init.Direction        |
- 8001b56:	68fa      	ldr	r2, [r7, #12]
- 8001b58:	4313      	orrs	r3, r2
- 8001b5a:	60fb      	str	r3, [r7, #12]
+ 80019da:	68fa      	ldr	r2, [r7, #12]
+ 80019dc:	4313      	orrs	r3, r2
+ 80019de:	60fb      	str	r3, [r7, #12]
 
   /* Write to DMA Channel CR register */
   hdma->Instance->CCR = tmp;
- 8001b5c:	687b      	ldr	r3, [r7, #4]
- 8001b5e:	681b      	ldr	r3, [r3, #0]
- 8001b60:	68fa      	ldr	r2, [r7, #12]
- 8001b62:	601a      	str	r2, [r3, #0]
+ 80019e0:	687b      	ldr	r3, [r7, #4]
+ 80019e2:	681b      	ldr	r3, [r3, #0]
+ 80019e4:	68fa      	ldr	r2, [r7, #12]
+ 80019e6:	601a      	str	r2, [r3, #0]
 
   /* Set request selection */
   if(hdma->Init.Direction != DMA_MEMORY_TO_MEMORY)
- 8001b64:	687b      	ldr	r3, [r7, #4]
- 8001b66:	689a      	ldr	r2, [r3, #8]
- 8001b68:	2380      	movs	r3, #128	; 0x80
- 8001b6a:	01db      	lsls	r3, r3, #7
- 8001b6c:	429a      	cmp	r2, r3
- 8001b6e:	d018      	beq.n	8001ba2 <HAL_DMA_Init+0xbe>
+ 80019e8:	687b      	ldr	r3, [r7, #4]
+ 80019ea:	689a      	ldr	r2, [r3, #8]
+ 80019ec:	2380      	movs	r3, #128	; 0x80
+ 80019ee:	01db      	lsls	r3, r3, #7
+ 80019f0:	429a      	cmp	r2, r3
+ 80019f2:	d018      	beq.n	8001a26 <HAL_DMA_Init+0xbe>
   {
     /* Write to DMA channel selection register */
     /* Reset request selection for DMA1 Channelx */
     DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU));
- 8001b70:	4b17      	ldr	r3, [pc, #92]	; (8001bd0 <HAL_DMA_Init+0xec>)
- 8001b72:	681a      	ldr	r2, [r3, #0]
- 8001b74:	687b      	ldr	r3, [r7, #4]
- 8001b76:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8001b78:	211c      	movs	r1, #28
- 8001b7a:	400b      	ands	r3, r1
- 8001b7c:	210f      	movs	r1, #15
- 8001b7e:	4099      	lsls	r1, r3
- 8001b80:	000b      	movs	r3, r1
- 8001b82:	43d9      	mvns	r1, r3
- 8001b84:	4b12      	ldr	r3, [pc, #72]	; (8001bd0 <HAL_DMA_Init+0xec>)
- 8001b86:	400a      	ands	r2, r1
- 8001b88:	601a      	str	r2, [r3, #0]
+ 80019f4:	4b17      	ldr	r3, [pc, #92]	; (8001a54 <HAL_DMA_Init+0xec>)
+ 80019f6:	681a      	ldr	r2, [r3, #0]
+ 80019f8:	687b      	ldr	r3, [r7, #4]
+ 80019fa:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 80019fc:	211c      	movs	r1, #28
+ 80019fe:	400b      	ands	r3, r1
+ 8001a00:	210f      	movs	r1, #15
+ 8001a02:	4099      	lsls	r1, r3
+ 8001a04:	000b      	movs	r3, r1
+ 8001a06:	43d9      	mvns	r1, r3
+ 8001a08:	4b12      	ldr	r3, [pc, #72]	; (8001a54 <HAL_DMA_Init+0xec>)
+ 8001a0a:	400a      	ands	r2, r1
+ 8001a0c:	601a      	str	r2, [r3, #0]
 
     /* Configure request selection for DMA1 Channelx */
     DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex & 0x1cU));
- 8001b8a:	4b11      	ldr	r3, [pc, #68]	; (8001bd0 <HAL_DMA_Init+0xec>)
- 8001b8c:	6819      	ldr	r1, [r3, #0]
- 8001b8e:	687b      	ldr	r3, [r7, #4]
- 8001b90:	685a      	ldr	r2, [r3, #4]
- 8001b92:	687b      	ldr	r3, [r7, #4]
- 8001b94:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8001b96:	201c      	movs	r0, #28
- 8001b98:	4003      	ands	r3, r0
- 8001b9a:	409a      	lsls	r2, r3
- 8001b9c:	4b0c      	ldr	r3, [pc, #48]	; (8001bd0 <HAL_DMA_Init+0xec>)
- 8001b9e:	430a      	orrs	r2, r1
- 8001ba0:	601a      	str	r2, [r3, #0]
+ 8001a0e:	4b11      	ldr	r3, [pc, #68]	; (8001a54 <HAL_DMA_Init+0xec>)
+ 8001a10:	6819      	ldr	r1, [r3, #0]
+ 8001a12:	687b      	ldr	r3, [r7, #4]
+ 8001a14:	685a      	ldr	r2, [r3, #4]
+ 8001a16:	687b      	ldr	r3, [r7, #4]
+ 8001a18:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8001a1a:	201c      	movs	r0, #28
+ 8001a1c:	4003      	ands	r3, r0
+ 8001a1e:	409a      	lsls	r2, r3
+ 8001a20:	4b0c      	ldr	r3, [pc, #48]	; (8001a54 <HAL_DMA_Init+0xec>)
+ 8001a22:	430a      	orrs	r2, r1
+ 8001a24:	601a      	str	r2, [r3, #0]
   }
 
   /* Initialise the error code */
   hdma->ErrorCode = HAL_DMA_ERROR_NONE;
- 8001ba2:	687b      	ldr	r3, [r7, #4]
- 8001ba4:	2200      	movs	r2, #0
- 8001ba6:	63da      	str	r2, [r3, #60]	; 0x3c
+ 8001a26:	687b      	ldr	r3, [r7, #4]
+ 8001a28:	2200      	movs	r2, #0
+ 8001a2a:	63da      	str	r2, [r3, #60]	; 0x3c
 
   /* Initialize the DMA state*/
   hdma->State  = HAL_DMA_STATE_READY;
- 8001ba8:	687b      	ldr	r3, [r7, #4]
- 8001baa:	2225      	movs	r2, #37	; 0x25
- 8001bac:	2101      	movs	r1, #1
- 8001bae:	5499      	strb	r1, [r3, r2]
+ 8001a2c:	687b      	ldr	r3, [r7, #4]
+ 8001a2e:	2225      	movs	r2, #37	; 0x25
+ 8001a30:	2101      	movs	r1, #1
+ 8001a32:	5499      	strb	r1, [r3, r2]
 
   /* Allocate lock resource and initialize it */
   hdma->Lock = HAL_UNLOCKED;
- 8001bb0:	687b      	ldr	r3, [r7, #4]
- 8001bb2:	2224      	movs	r2, #36	; 0x24
- 8001bb4:	2100      	movs	r1, #0
- 8001bb6:	5499      	strb	r1, [r3, r2]
+ 8001a34:	687b      	ldr	r3, [r7, #4]
+ 8001a36:	2224      	movs	r2, #36	; 0x24
+ 8001a38:	2100      	movs	r1, #0
+ 8001a3a:	5499      	strb	r1, [r3, r2]
 
   return HAL_OK;
- 8001bb8:	2300      	movs	r3, #0
+ 8001a3c:	2300      	movs	r3, #0
 }
- 8001bba:	0018      	movs	r0, r3
- 8001bbc:	46bd      	mov	sp, r7
- 8001bbe:	b004      	add	sp, #16
- 8001bc0:	bd80      	pop	{r7, pc}
- 8001bc2:	46c0      	nop			; (mov r8, r8)
- 8001bc4:	bffdfff8 	.word	0xbffdfff8
- 8001bc8:	40020000 	.word	0x40020000
- 8001bcc:	ffff800f 	.word	0xffff800f
- 8001bd0:	400200a8 	.word	0x400200a8
+ 8001a3e:	0018      	movs	r0, r3
+ 8001a40:	46bd      	mov	sp, r7
+ 8001a42:	b004      	add	sp, #16
+ 8001a44:	bd80      	pop	{r7, pc}
+ 8001a46:	46c0      	nop			; (mov r8, r8)
+ 8001a48:	bffdfff8 	.word	0xbffdfff8
+ 8001a4c:	40020000 	.word	0x40020000
+ 8001a50:	ffff800f 	.word	0xffff800f
+ 8001a54:	400200a8 	.word	0x400200a8
 
-08001bd4 <HAL_DMA_Abort>:
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Channel.
-    * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma)
-{
- 8001bd4:	b580      	push	{r7, lr}
- 8001bd6:	b084      	sub	sp, #16
- 8001bd8:	af00      	add	r7, sp, #0
- 8001bda:	6078      	str	r0, [r7, #4]
-  HAL_StatusTypeDef status = HAL_OK;
- 8001bdc:	230f      	movs	r3, #15
- 8001bde:	18fb      	adds	r3, r7, r3
- 8001be0:	2200      	movs	r2, #0
- 8001be2:	701a      	strb	r2, [r3, #0]
-
-  /* Check the DMA peripheral state */
-  if(hdma->State != HAL_DMA_STATE_BUSY)
- 8001be4:	687b      	ldr	r3, [r7, #4]
- 8001be6:	2225      	movs	r2, #37	; 0x25
- 8001be8:	5c9b      	ldrb	r3, [r3, r2]
- 8001bea:	b2db      	uxtb	r3, r3
- 8001bec:	2b02      	cmp	r3, #2
- 8001bee:	d008      	beq.n	8001c02 <HAL_DMA_Abort+0x2e>
-  {
-    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
- 8001bf0:	687b      	ldr	r3, [r7, #4]
- 8001bf2:	2204      	movs	r2, #4
- 8001bf4:	63da      	str	r2, [r3, #60]	; 0x3c
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hdma);
- 8001bf6:	687b      	ldr	r3, [r7, #4]
- 8001bf8:	2224      	movs	r2, #36	; 0x24
- 8001bfa:	2100      	movs	r1, #0
- 8001bfc:	5499      	strb	r1, [r3, r2]
-
-    return HAL_ERROR;
- 8001bfe:	2301      	movs	r3, #1
- 8001c00:	e024      	b.n	8001c4c <HAL_DMA_Abort+0x78>
-  }
-  else
-  {
-    /* Disable DMA IT */
-    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
- 8001c02:	687b      	ldr	r3, [r7, #4]
- 8001c04:	681b      	ldr	r3, [r3, #0]
- 8001c06:	681a      	ldr	r2, [r3, #0]
- 8001c08:	687b      	ldr	r3, [r7, #4]
- 8001c0a:	681b      	ldr	r3, [r3, #0]
- 8001c0c:	210e      	movs	r1, #14
- 8001c0e:	438a      	bics	r2, r1
- 8001c10:	601a      	str	r2, [r3, #0]
-
-    /* Disable the channel */
-    __HAL_DMA_DISABLE(hdma);
- 8001c12:	687b      	ldr	r3, [r7, #4]
- 8001c14:	681b      	ldr	r3, [r3, #0]
- 8001c16:	681a      	ldr	r2, [r3, #0]
- 8001c18:	687b      	ldr	r3, [r7, #4]
- 8001c1a:	681b      	ldr	r3, [r3, #0]
- 8001c1c:	2101      	movs	r1, #1
- 8001c1e:	438a      	bics	r2, r1
- 8001c20:	601a      	str	r2, [r3, #0]
-
-    /* Clear all flags */
-    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));
- 8001c22:	687b      	ldr	r3, [r7, #4]
- 8001c24:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8001c26:	221c      	movs	r2, #28
- 8001c28:	401a      	ands	r2, r3
- 8001c2a:	687b      	ldr	r3, [r7, #4]
- 8001c2c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8001c2e:	2101      	movs	r1, #1
- 8001c30:	4091      	lsls	r1, r2
- 8001c32:	000a      	movs	r2, r1
- 8001c34:	605a      	str	r2, [r3, #4]
-
-    /* Change the DMA state */
-    hdma->State = HAL_DMA_STATE_READY;
- 8001c36:	687b      	ldr	r3, [r7, #4]
- 8001c38:	2225      	movs	r2, #37	; 0x25
- 8001c3a:	2101      	movs	r1, #1
- 8001c3c:	5499      	strb	r1, [r3, r2]
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hdma);
- 8001c3e:	687b      	ldr	r3, [r7, #4]
- 8001c40:	2224      	movs	r2, #36	; 0x24
- 8001c42:	2100      	movs	r1, #0
- 8001c44:	5499      	strb	r1, [r3, r2]
-
-    return status;
- 8001c46:	230f      	movs	r3, #15
- 8001c48:	18fb      	adds	r3, r7, r3
- 8001c4a:	781b      	ldrb	r3, [r3, #0]
-  }
-}
- 8001c4c:	0018      	movs	r0, r3
- 8001c4e:	46bd      	mov	sp, r7
- 8001c50:	b004      	add	sp, #16
- 8001c52:	bd80      	pop	{r7, pc}
-
-08001c54 <HAL_DMA_Abort_IT>:
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *                 the configuration information for the specified DMA Channel.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
-{
- 8001c54:	b580      	push	{r7, lr}
- 8001c56:	b084      	sub	sp, #16
- 8001c58:	af00      	add	r7, sp, #0
- 8001c5a:	6078      	str	r0, [r7, #4]
-  HAL_StatusTypeDef status = HAL_OK;
- 8001c5c:	210f      	movs	r1, #15
- 8001c5e:	187b      	adds	r3, r7, r1
- 8001c60:	2200      	movs	r2, #0
- 8001c62:	701a      	strb	r2, [r3, #0]
-
-  if(HAL_DMA_STATE_BUSY != hdma->State)
- 8001c64:	687b      	ldr	r3, [r7, #4]
- 8001c66:	2225      	movs	r2, #37	; 0x25
- 8001c68:	5c9b      	ldrb	r3, [r3, r2]
- 8001c6a:	b2db      	uxtb	r3, r3
- 8001c6c:	2b02      	cmp	r3, #2
- 8001c6e:	d006      	beq.n	8001c7e <HAL_DMA_Abort_IT+0x2a>
-  {
-    /* no transfer ongoing */
-    hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER;
- 8001c70:	687b      	ldr	r3, [r7, #4]
- 8001c72:	2204      	movs	r2, #4
- 8001c74:	63da      	str	r2, [r3, #60]	; 0x3c
-
-    status = HAL_ERROR;
- 8001c76:	187b      	adds	r3, r7, r1
- 8001c78:	2201      	movs	r2, #1
- 8001c7a:	701a      	strb	r2, [r3, #0]
- 8001c7c:	e02a      	b.n	8001cd4 <HAL_DMA_Abort_IT+0x80>
-  }
-  else
-  {
-    /* Disable DMA IT */
-    __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
- 8001c7e:	687b      	ldr	r3, [r7, #4]
- 8001c80:	681b      	ldr	r3, [r3, #0]
- 8001c82:	681a      	ldr	r2, [r3, #0]
- 8001c84:	687b      	ldr	r3, [r7, #4]
- 8001c86:	681b      	ldr	r3, [r3, #0]
- 8001c88:	210e      	movs	r1, #14
- 8001c8a:	438a      	bics	r2, r1
- 8001c8c:	601a      	str	r2, [r3, #0]
-
-    /* Disable the channel */
-    __HAL_DMA_DISABLE(hdma);
- 8001c8e:	687b      	ldr	r3, [r7, #4]
- 8001c90:	681b      	ldr	r3, [r3, #0]
- 8001c92:	681a      	ldr	r2, [r3, #0]
- 8001c94:	687b      	ldr	r3, [r7, #4]
- 8001c96:	681b      	ldr	r3, [r3, #0]
- 8001c98:	2101      	movs	r1, #1
- 8001c9a:	438a      	bics	r2, r1
- 8001c9c:	601a      	str	r2, [r3, #0]
-
-    /* Clear all flags */
-    hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));
- 8001c9e:	687b      	ldr	r3, [r7, #4]
- 8001ca0:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8001ca2:	221c      	movs	r2, #28
- 8001ca4:	401a      	ands	r2, r3
- 8001ca6:	687b      	ldr	r3, [r7, #4]
- 8001ca8:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8001caa:	2101      	movs	r1, #1
- 8001cac:	4091      	lsls	r1, r2
- 8001cae:	000a      	movs	r2, r1
- 8001cb0:	605a      	str	r2, [r3, #4]
-
-    /* Change the DMA state */
-    hdma->State = HAL_DMA_STATE_READY;
- 8001cb2:	687b      	ldr	r3, [r7, #4]
- 8001cb4:	2225      	movs	r2, #37	; 0x25
- 8001cb6:	2101      	movs	r1, #1
- 8001cb8:	5499      	strb	r1, [r3, r2]
-
-    /* Process Unlocked */
-    __HAL_UNLOCK(hdma);
- 8001cba:	687b      	ldr	r3, [r7, #4]
- 8001cbc:	2224      	movs	r2, #36	; 0x24
- 8001cbe:	2100      	movs	r1, #0
- 8001cc0:	5499      	strb	r1, [r3, r2]
-
-    /* Call User Abort callback */
-    if(hdma->XferAbortCallback != NULL)
- 8001cc2:	687b      	ldr	r3, [r7, #4]
- 8001cc4:	6b9b      	ldr	r3, [r3, #56]	; 0x38
- 8001cc6:	2b00      	cmp	r3, #0
- 8001cc8:	d004      	beq.n	8001cd4 <HAL_DMA_Abort_IT+0x80>
-    {
-      hdma->XferAbortCallback(hdma);
- 8001cca:	687b      	ldr	r3, [r7, #4]
- 8001ccc:	6b9b      	ldr	r3, [r3, #56]	; 0x38
- 8001cce:	687a      	ldr	r2, [r7, #4]
- 8001cd0:	0010      	movs	r0, r2
- 8001cd2:	4798      	blx	r3
-    }
-  }
-  return status;
- 8001cd4:	230f      	movs	r3, #15
- 8001cd6:	18fb      	adds	r3, r7, r3
- 8001cd8:	781b      	ldrb	r3, [r3, #0]
-}
- 8001cda:	0018      	movs	r0, r3
- 8001cdc:	46bd      	mov	sp, r7
- 8001cde:	b004      	add	sp, #16
- 8001ce0:	bd80      	pop	{r7, pc}
-
-08001ce2 <HAL_DMA_IRQHandler>:
+08001a58 <HAL_DMA_IRQHandler>:
   * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
   *               the configuration information for the specified DMA Channel.
   * @retval None
   */
 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
 {
- 8001ce2:	b580      	push	{r7, lr}
- 8001ce4:	b084      	sub	sp, #16
- 8001ce6:	af00      	add	r7, sp, #0
- 8001ce8:	6078      	str	r0, [r7, #4]
+ 8001a58:	b580      	push	{r7, lr}
+ 8001a5a:	b084      	sub	sp, #16
+ 8001a5c:	af00      	add	r7, sp, #0
+ 8001a5e:	6078      	str	r0, [r7, #4]
   uint32_t flag_it = hdma->DmaBaseAddress->ISR;
- 8001cea:	687b      	ldr	r3, [r7, #4]
- 8001cec:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8001cee:	681b      	ldr	r3, [r3, #0]
- 8001cf0:	60fb      	str	r3, [r7, #12]
+ 8001a60:	687b      	ldr	r3, [r7, #4]
+ 8001a62:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8001a64:	681b      	ldr	r3, [r3, #0]
+ 8001a66:	60fb      	str	r3, [r7, #12]
   uint32_t source_it = hdma->Instance->CCR;
- 8001cf2:	687b      	ldr	r3, [r7, #4]
- 8001cf4:	681b      	ldr	r3, [r3, #0]
- 8001cf6:	681b      	ldr	r3, [r3, #0]
- 8001cf8:	60bb      	str	r3, [r7, #8]
+ 8001a68:	687b      	ldr	r3, [r7, #4]
+ 8001a6a:	681b      	ldr	r3, [r3, #0]
+ 8001a6c:	681b      	ldr	r3, [r3, #0]
+ 8001a6e:	60bb      	str	r3, [r7, #8]
 
   /* Half Transfer Complete Interrupt management ******************************/
   if ((0U != (flag_it & (DMA_FLAG_HT1 << (hdma->ChannelIndex & 0x1cU)))) && (0U != (source_it & DMA_IT_HT)))
- 8001cfa:	687b      	ldr	r3, [r7, #4]
- 8001cfc:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8001cfe:	221c      	movs	r2, #28
- 8001d00:	4013      	ands	r3, r2
- 8001d02:	2204      	movs	r2, #4
- 8001d04:	409a      	lsls	r2, r3
- 8001d06:	0013      	movs	r3, r2
- 8001d08:	68fa      	ldr	r2, [r7, #12]
- 8001d0a:	4013      	ands	r3, r2
- 8001d0c:	d026      	beq.n	8001d5c <HAL_DMA_IRQHandler+0x7a>
- 8001d0e:	68bb      	ldr	r3, [r7, #8]
- 8001d10:	2204      	movs	r2, #4
- 8001d12:	4013      	ands	r3, r2
- 8001d14:	d022      	beq.n	8001d5c <HAL_DMA_IRQHandler+0x7a>
+ 8001a70:	687b      	ldr	r3, [r7, #4]
+ 8001a72:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8001a74:	221c      	movs	r2, #28
+ 8001a76:	4013      	ands	r3, r2
+ 8001a78:	2204      	movs	r2, #4
+ 8001a7a:	409a      	lsls	r2, r3
+ 8001a7c:	0013      	movs	r3, r2
+ 8001a7e:	68fa      	ldr	r2, [r7, #12]
+ 8001a80:	4013      	ands	r3, r2
+ 8001a82:	d026      	beq.n	8001ad2 <HAL_DMA_IRQHandler+0x7a>
+ 8001a84:	68bb      	ldr	r3, [r7, #8]
+ 8001a86:	2204      	movs	r2, #4
+ 8001a88:	4013      	ands	r3, r2
+ 8001a8a:	d022      	beq.n	8001ad2 <HAL_DMA_IRQHandler+0x7a>
   {
       /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
       if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
- 8001d16:	687b      	ldr	r3, [r7, #4]
- 8001d18:	681b      	ldr	r3, [r3, #0]
- 8001d1a:	681b      	ldr	r3, [r3, #0]
- 8001d1c:	2220      	movs	r2, #32
- 8001d1e:	4013      	ands	r3, r2
- 8001d20:	d107      	bne.n	8001d32 <HAL_DMA_IRQHandler+0x50>
+ 8001a8c:	687b      	ldr	r3, [r7, #4]
+ 8001a8e:	681b      	ldr	r3, [r3, #0]
+ 8001a90:	681b      	ldr	r3, [r3, #0]
+ 8001a92:	2220      	movs	r2, #32
+ 8001a94:	4013      	ands	r3, r2
+ 8001a96:	d107      	bne.n	8001aa8 <HAL_DMA_IRQHandler+0x50>
       {
         /* Disable the half transfer interrupt */
         __HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
- 8001d22:	687b      	ldr	r3, [r7, #4]
- 8001d24:	681b      	ldr	r3, [r3, #0]
- 8001d26:	681a      	ldr	r2, [r3, #0]
- 8001d28:	687b      	ldr	r3, [r7, #4]
- 8001d2a:	681b      	ldr	r3, [r3, #0]
- 8001d2c:	2104      	movs	r1, #4
- 8001d2e:	438a      	bics	r2, r1
- 8001d30:	601a      	str	r2, [r3, #0]
+ 8001a98:	687b      	ldr	r3, [r7, #4]
+ 8001a9a:	681b      	ldr	r3, [r3, #0]
+ 8001a9c:	681a      	ldr	r2, [r3, #0]
+ 8001a9e:	687b      	ldr	r3, [r7, #4]
+ 8001aa0:	681b      	ldr	r3, [r3, #0]
+ 8001aa2:	2104      	movs	r1, #4
+ 8001aa4:	438a      	bics	r2, r1
+ 8001aa6:	601a      	str	r2, [r3, #0]
       }
       /* Clear the half transfer complete flag */
       hdma->DmaBaseAddress->IFCR = DMA_ISR_HTIF1 << (hdma->ChannelIndex & 0x1cU);
- 8001d32:	687b      	ldr	r3, [r7, #4]
- 8001d34:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8001d36:	221c      	movs	r2, #28
- 8001d38:	401a      	ands	r2, r3
- 8001d3a:	687b      	ldr	r3, [r7, #4]
- 8001d3c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8001d3e:	2104      	movs	r1, #4
- 8001d40:	4091      	lsls	r1, r2
- 8001d42:	000a      	movs	r2, r1
- 8001d44:	605a      	str	r2, [r3, #4]
+ 8001aa8:	687b      	ldr	r3, [r7, #4]
+ 8001aaa:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8001aac:	221c      	movs	r2, #28
+ 8001aae:	401a      	ands	r2, r3
+ 8001ab0:	687b      	ldr	r3, [r7, #4]
+ 8001ab2:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8001ab4:	2104      	movs	r1, #4
+ 8001ab6:	4091      	lsls	r1, r2
+ 8001ab8:	000a      	movs	r2, r1
+ 8001aba:	605a      	str	r2, [r3, #4]
 
       /* DMA peripheral state is not updated in Half Transfer */
       /* but in Transfer Complete case */
 
      if(hdma->XferHalfCpltCallback != NULL)
- 8001d46:	687b      	ldr	r3, [r7, #4]
- 8001d48:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001d4a:	2b00      	cmp	r3, #0
- 8001d4c:	d100      	bne.n	8001d50 <HAL_DMA_IRQHandler+0x6e>
- 8001d4e:	e071      	b.n	8001e34 <HAL_DMA_IRQHandler+0x152>
+ 8001abc:	687b      	ldr	r3, [r7, #4]
+ 8001abe:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001ac0:	2b00      	cmp	r3, #0
+ 8001ac2:	d100      	bne.n	8001ac6 <HAL_DMA_IRQHandler+0x6e>
+ 8001ac4:	e071      	b.n	8001baa <HAL_DMA_IRQHandler+0x152>
       {
         /* Half transfer callback */
         hdma->XferHalfCpltCallback(hdma);
- 8001d50:	687b      	ldr	r3, [r7, #4]
- 8001d52:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8001d54:	687a      	ldr	r2, [r7, #4]
- 8001d56:	0010      	movs	r0, r2
- 8001d58:	4798      	blx	r3
+ 8001ac6:	687b      	ldr	r3, [r7, #4]
+ 8001ac8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 8001aca:	687a      	ldr	r2, [r7, #4]
+ 8001acc:	0010      	movs	r0, r2
+ 8001ace:	4798      	blx	r3
      if(hdma->XferHalfCpltCallback != NULL)
- 8001d5a:	e06b      	b.n	8001e34 <HAL_DMA_IRQHandler+0x152>
+ 8001ad0:	e06b      	b.n	8001baa <HAL_DMA_IRQHandler+0x152>
       }
   }
 
   /* Transfer Complete Interrupt management ***********************************/
   else if ((0U != (flag_it & (DMA_FLAG_TC1 << (hdma->ChannelIndex & 0x1cU)))) && (0U != (source_it & DMA_IT_TC)))
- 8001d5c:	687b      	ldr	r3, [r7, #4]
- 8001d5e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8001d60:	221c      	movs	r2, #28
- 8001d62:	4013      	ands	r3, r2
- 8001d64:	2202      	movs	r2, #2
- 8001d66:	409a      	lsls	r2, r3
- 8001d68:	0013      	movs	r3, r2
- 8001d6a:	68fa      	ldr	r2, [r7, #12]
- 8001d6c:	4013      	ands	r3, r2
- 8001d6e:	d02d      	beq.n	8001dcc <HAL_DMA_IRQHandler+0xea>
- 8001d70:	68bb      	ldr	r3, [r7, #8]
- 8001d72:	2202      	movs	r2, #2
- 8001d74:	4013      	ands	r3, r2
- 8001d76:	d029      	beq.n	8001dcc <HAL_DMA_IRQHandler+0xea>
+ 8001ad2:	687b      	ldr	r3, [r7, #4]
+ 8001ad4:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8001ad6:	221c      	movs	r2, #28
+ 8001ad8:	4013      	ands	r3, r2
+ 8001ada:	2202      	movs	r2, #2
+ 8001adc:	409a      	lsls	r2, r3
+ 8001ade:	0013      	movs	r3, r2
+ 8001ae0:	68fa      	ldr	r2, [r7, #12]
+ 8001ae2:	4013      	ands	r3, r2
+ 8001ae4:	d02d      	beq.n	8001b42 <HAL_DMA_IRQHandler+0xea>
+ 8001ae6:	68bb      	ldr	r3, [r7, #8]
+ 8001ae8:	2202      	movs	r2, #2
+ 8001aea:	4013      	ands	r3, r2
+ 8001aec:	d029      	beq.n	8001b42 <HAL_DMA_IRQHandler+0xea>
   {
     if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
- 8001d78:	687b      	ldr	r3, [r7, #4]
- 8001d7a:	681b      	ldr	r3, [r3, #0]
- 8001d7c:	681b      	ldr	r3, [r3, #0]
- 8001d7e:	2220      	movs	r2, #32
- 8001d80:	4013      	ands	r3, r2
- 8001d82:	d10b      	bne.n	8001d9c <HAL_DMA_IRQHandler+0xba>
+ 8001aee:	687b      	ldr	r3, [r7, #4]
+ 8001af0:	681b      	ldr	r3, [r3, #0]
+ 8001af2:	681b      	ldr	r3, [r3, #0]
+ 8001af4:	2220      	movs	r2, #32
+ 8001af6:	4013      	ands	r3, r2
+ 8001af8:	d10b      	bne.n	8001b12 <HAL_DMA_IRQHandler+0xba>
     {
       /* Disable the transfer complete and error interrupt */
       __HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
- 8001d84:	687b      	ldr	r3, [r7, #4]
- 8001d86:	681b      	ldr	r3, [r3, #0]
- 8001d88:	681a      	ldr	r2, [r3, #0]
- 8001d8a:	687b      	ldr	r3, [r7, #4]
- 8001d8c:	681b      	ldr	r3, [r3, #0]
- 8001d8e:	210a      	movs	r1, #10
- 8001d90:	438a      	bics	r2, r1
- 8001d92:	601a      	str	r2, [r3, #0]
+ 8001afa:	687b      	ldr	r3, [r7, #4]
+ 8001afc:	681b      	ldr	r3, [r3, #0]
+ 8001afe:	681a      	ldr	r2, [r3, #0]
+ 8001b00:	687b      	ldr	r3, [r7, #4]
+ 8001b02:	681b      	ldr	r3, [r3, #0]
+ 8001b04:	210a      	movs	r1, #10
+ 8001b06:	438a      	bics	r2, r1
+ 8001b08:	601a      	str	r2, [r3, #0]
 
       /* Change the DMA state */
       hdma->State = HAL_DMA_STATE_READY;
- 8001d94:	687b      	ldr	r3, [r7, #4]
- 8001d96:	2225      	movs	r2, #37	; 0x25
- 8001d98:	2101      	movs	r1, #1
- 8001d9a:	5499      	strb	r1, [r3, r2]
+ 8001b0a:	687b      	ldr	r3, [r7, #4]
+ 8001b0c:	2225      	movs	r2, #37	; 0x25
+ 8001b0e:	2101      	movs	r1, #1
+ 8001b10:	5499      	strb	r1, [r3, r2]
     }
     /* Clear the transfer complete flag */
     hdma->DmaBaseAddress->IFCR = (DMA_ISR_TCIF1 << (hdma->ChannelIndex & 0x1cU));
- 8001d9c:	687b      	ldr	r3, [r7, #4]
- 8001d9e:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8001da0:	221c      	movs	r2, #28
- 8001da2:	401a      	ands	r2, r3
- 8001da4:	687b      	ldr	r3, [r7, #4]
- 8001da6:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8001da8:	2102      	movs	r1, #2
- 8001daa:	4091      	lsls	r1, r2
- 8001dac:	000a      	movs	r2, r1
- 8001dae:	605a      	str	r2, [r3, #4]
+ 8001b12:	687b      	ldr	r3, [r7, #4]
+ 8001b14:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8001b16:	221c      	movs	r2, #28
+ 8001b18:	401a      	ands	r2, r3
+ 8001b1a:	687b      	ldr	r3, [r7, #4]
+ 8001b1c:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8001b1e:	2102      	movs	r1, #2
+ 8001b20:	4091      	lsls	r1, r2
+ 8001b22:	000a      	movs	r2, r1
+ 8001b24:	605a      	str	r2, [r3, #4]
 
     /* Process Unlocked */
     __HAL_UNLOCK(hdma);
- 8001db0:	687b      	ldr	r3, [r7, #4]
- 8001db2:	2224      	movs	r2, #36	; 0x24
- 8001db4:	2100      	movs	r1, #0
- 8001db6:	5499      	strb	r1, [r3, r2]
+ 8001b26:	687b      	ldr	r3, [r7, #4]
+ 8001b28:	2224      	movs	r2, #36	; 0x24
+ 8001b2a:	2100      	movs	r1, #0
+ 8001b2c:	5499      	strb	r1, [r3, r2]
 
     if(hdma->XferCpltCallback != NULL)
- 8001db8:	687b      	ldr	r3, [r7, #4]
- 8001dba:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8001dbc:	2b00      	cmp	r3, #0
- 8001dbe:	d039      	beq.n	8001e34 <HAL_DMA_IRQHandler+0x152>
+ 8001b2e:	687b      	ldr	r3, [r7, #4]
+ 8001b30:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8001b32:	2b00      	cmp	r3, #0
+ 8001b34:	d039      	beq.n	8001baa <HAL_DMA_IRQHandler+0x152>
     {
       /* Transfer complete callback */
       hdma->XferCpltCallback(hdma);
- 8001dc0:	687b      	ldr	r3, [r7, #4]
- 8001dc2:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8001dc4:	687a      	ldr	r2, [r7, #4]
- 8001dc6:	0010      	movs	r0, r2
- 8001dc8:	4798      	blx	r3
+ 8001b36:	687b      	ldr	r3, [r7, #4]
+ 8001b38:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8001b3a:	687a      	ldr	r2, [r7, #4]
+ 8001b3c:	0010      	movs	r0, r2
+ 8001b3e:	4798      	blx	r3
     if(hdma->XferCpltCallback != NULL)
- 8001dca:	e033      	b.n	8001e34 <HAL_DMA_IRQHandler+0x152>
+ 8001b40:	e033      	b.n	8001baa <HAL_DMA_IRQHandler+0x152>
     }
   }
 
   /* Transfer Error Interrupt management **************************************/
   else if ((0U != (flag_it & (DMA_FLAG_TE1 << (hdma->ChannelIndex & 0x1cU)))) && (0U != (source_it & DMA_IT_TE)))
- 8001dcc:	687b      	ldr	r3, [r7, #4]
- 8001dce:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8001dd0:	221c      	movs	r2, #28
- 8001dd2:	4013      	ands	r3, r2
- 8001dd4:	2208      	movs	r2, #8
- 8001dd6:	409a      	lsls	r2, r3
- 8001dd8:	0013      	movs	r3, r2
- 8001dda:	68fa      	ldr	r2, [r7, #12]
- 8001ddc:	4013      	ands	r3, r2
- 8001dde:	d02a      	beq.n	8001e36 <HAL_DMA_IRQHandler+0x154>
- 8001de0:	68bb      	ldr	r3, [r7, #8]
- 8001de2:	2208      	movs	r2, #8
- 8001de4:	4013      	ands	r3, r2
- 8001de6:	d026      	beq.n	8001e36 <HAL_DMA_IRQHandler+0x154>
+ 8001b42:	687b      	ldr	r3, [r7, #4]
+ 8001b44:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8001b46:	221c      	movs	r2, #28
+ 8001b48:	4013      	ands	r3, r2
+ 8001b4a:	2208      	movs	r2, #8
+ 8001b4c:	409a      	lsls	r2, r3
+ 8001b4e:	0013      	movs	r3, r2
+ 8001b50:	68fa      	ldr	r2, [r7, #12]
+ 8001b52:	4013      	ands	r3, r2
+ 8001b54:	d02a      	beq.n	8001bac <HAL_DMA_IRQHandler+0x154>
+ 8001b56:	68bb      	ldr	r3, [r7, #8]
+ 8001b58:	2208      	movs	r2, #8
+ 8001b5a:	4013      	ands	r3, r2
+ 8001b5c:	d026      	beq.n	8001bac <HAL_DMA_IRQHandler+0x154>
   {
     /* When a DMA transfer error occurs */
     /* A hardware clear of its EN bits is performed */
     /* Disable ALL DMA IT */
     __HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
- 8001de8:	687b      	ldr	r3, [r7, #4]
- 8001dea:	681b      	ldr	r3, [r3, #0]
- 8001dec:	681a      	ldr	r2, [r3, #0]
- 8001dee:	687b      	ldr	r3, [r7, #4]
- 8001df0:	681b      	ldr	r3, [r3, #0]
- 8001df2:	210e      	movs	r1, #14
- 8001df4:	438a      	bics	r2, r1
- 8001df6:	601a      	str	r2, [r3, #0]
+ 8001b5e:	687b      	ldr	r3, [r7, #4]
+ 8001b60:	681b      	ldr	r3, [r3, #0]
+ 8001b62:	681a      	ldr	r2, [r3, #0]
+ 8001b64:	687b      	ldr	r3, [r7, #4]
+ 8001b66:	681b      	ldr	r3, [r3, #0]
+ 8001b68:	210e      	movs	r1, #14
+ 8001b6a:	438a      	bics	r2, r1
+ 8001b6c:	601a      	str	r2, [r3, #0]
 
     /* Clear all flags */
     hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << (hdma->ChannelIndex & 0x1cU));
- 8001df8:	687b      	ldr	r3, [r7, #4]
- 8001dfa:	6c5b      	ldr	r3, [r3, #68]	; 0x44
- 8001dfc:	221c      	movs	r2, #28
- 8001dfe:	401a      	ands	r2, r3
- 8001e00:	687b      	ldr	r3, [r7, #4]
- 8001e02:	6c1b      	ldr	r3, [r3, #64]	; 0x40
- 8001e04:	2101      	movs	r1, #1
- 8001e06:	4091      	lsls	r1, r2
- 8001e08:	000a      	movs	r2, r1
- 8001e0a:	605a      	str	r2, [r3, #4]
+ 8001b6e:	687b      	ldr	r3, [r7, #4]
+ 8001b70:	6c5b      	ldr	r3, [r3, #68]	; 0x44
+ 8001b72:	221c      	movs	r2, #28
+ 8001b74:	401a      	ands	r2, r3
+ 8001b76:	687b      	ldr	r3, [r7, #4]
+ 8001b78:	6c1b      	ldr	r3, [r3, #64]	; 0x40
+ 8001b7a:	2101      	movs	r1, #1
+ 8001b7c:	4091      	lsls	r1, r2
+ 8001b7e:	000a      	movs	r2, r1
+ 8001b80:	605a      	str	r2, [r3, #4]
 
     /* Update error code */
     hdma->ErrorCode = HAL_DMA_ERROR_TE;
- 8001e0c:	687b      	ldr	r3, [r7, #4]
- 8001e0e:	2201      	movs	r2, #1
- 8001e10:	63da      	str	r2, [r3, #60]	; 0x3c
+ 8001b82:	687b      	ldr	r3, [r7, #4]
+ 8001b84:	2201      	movs	r2, #1
+ 8001b86:	63da      	str	r2, [r3, #60]	; 0x3c
 
     /* Change the DMA state */
     hdma->State = HAL_DMA_STATE_READY;
- 8001e12:	687b      	ldr	r3, [r7, #4]
- 8001e14:	2225      	movs	r2, #37	; 0x25
- 8001e16:	2101      	movs	r1, #1
- 8001e18:	5499      	strb	r1, [r3, r2]
+ 8001b88:	687b      	ldr	r3, [r7, #4]
+ 8001b8a:	2225      	movs	r2, #37	; 0x25
+ 8001b8c:	2101      	movs	r1, #1
+ 8001b8e:	5499      	strb	r1, [r3, r2]
 
     /* Process Unlocked */
     __HAL_UNLOCK(hdma);
- 8001e1a:	687b      	ldr	r3, [r7, #4]
- 8001e1c:	2224      	movs	r2, #36	; 0x24
- 8001e1e:	2100      	movs	r1, #0
- 8001e20:	5499      	strb	r1, [r3, r2]
+ 8001b90:	687b      	ldr	r3, [r7, #4]
+ 8001b92:	2224      	movs	r2, #36	; 0x24
+ 8001b94:	2100      	movs	r1, #0
+ 8001b96:	5499      	strb	r1, [r3, r2]
 
     if (hdma->XferErrorCallback != NULL)
- 8001e22:	687b      	ldr	r3, [r7, #4]
- 8001e24:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 8001e26:	2b00      	cmp	r3, #0
- 8001e28:	d005      	beq.n	8001e36 <HAL_DMA_IRQHandler+0x154>
+ 8001b98:	687b      	ldr	r3, [r7, #4]
+ 8001b9a:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8001b9c:	2b00      	cmp	r3, #0
+ 8001b9e:	d005      	beq.n	8001bac <HAL_DMA_IRQHandler+0x154>
     {
       /* Transfer error callback */
       hdma->XferErrorCallback(hdma);
- 8001e2a:	687b      	ldr	r3, [r7, #4]
- 8001e2c:	6b5b      	ldr	r3, [r3, #52]	; 0x34
- 8001e2e:	687a      	ldr	r2, [r7, #4]
- 8001e30:	0010      	movs	r0, r2
- 8001e32:	4798      	blx	r3
+ 8001ba0:	687b      	ldr	r3, [r7, #4]
+ 8001ba2:	6b5b      	ldr	r3, [r3, #52]	; 0x34
+ 8001ba4:	687a      	ldr	r2, [r7, #4]
+ 8001ba6:	0010      	movs	r0, r2
+ 8001ba8:	4798      	blx	r3
   }
   else
   {
     /* Nothing To Do */
   }
   return;
- 8001e34:	46c0      	nop			; (mov r8, r8)
- 8001e36:	46c0      	nop			; (mov r8, r8)
+ 8001baa:	46c0      	nop			; (mov r8, r8)
+ 8001bac:	46c0      	nop			; (mov r8, r8)
 }
- 8001e38:	46bd      	mov	sp, r7
- 8001e3a:	b004      	add	sp, #16
- 8001e3c:	bd80      	pop	{r7, pc}
-	...
+ 8001bae:	46bd      	mov	sp, r7
+ 8001bb0:	b004      	add	sp, #16
+ 8001bb2:	bd80      	pop	{r7, pc}
 
-08001e40 <HAL_GPIO_Init>:
+08001bb4 <HAL_GPIO_Init>:
   * @param  GPIO_Init pointer to a GPIO_InitTypeDef structure that contains
   *                    the configuration information for the specified GPIO peripheral.
   * @retval None
   */
 void HAL_GPIO_Init(GPIO_TypeDef  *GPIOx, GPIO_InitTypeDef *GPIO_Init)
 {
- 8001e40:	b580      	push	{r7, lr}
- 8001e42:	b086      	sub	sp, #24
- 8001e44:	af00      	add	r7, sp, #0
- 8001e46:	6078      	str	r0, [r7, #4]
- 8001e48:	6039      	str	r1, [r7, #0]
+ 8001bb4:	b580      	push	{r7, lr}
+ 8001bb6:	b086      	sub	sp, #24
+ 8001bb8:	af00      	add	r7, sp, #0
+ 8001bba:	6078      	str	r0, [r7, #4]
+ 8001bbc:	6039      	str	r1, [r7, #0]
   uint32_t position = 0x00U;
- 8001e4a:	2300      	movs	r3, #0
- 8001e4c:	617b      	str	r3, [r7, #20]
+ 8001bbe:	2300      	movs	r3, #0
+ 8001bc0:	617b      	str	r3, [r7, #20]
   uint32_t iocurrent = 0x00U;
- 8001e4e:	2300      	movs	r3, #0
- 8001e50:	60fb      	str	r3, [r7, #12]
+ 8001bc2:	2300      	movs	r3, #0
+ 8001bc4:	60fb      	str	r3, [r7, #12]
   uint32_t temp = 0x00U;
- 8001e52:	2300      	movs	r3, #0
- 8001e54:	613b      	str	r3, [r7, #16]
+ 8001bc6:	2300      	movs	r3, #0
+ 8001bc8:	613b      	str	r3, [r7, #16]
   /* Check the parameters */
   assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
   assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, (GPIO_Init->Pin)));
 
   /* Configure the port pins */
   while (((GPIO_Init->Pin) >> position) != 0)
- 8001e56:	e14f      	b.n	80020f8 <HAL_GPIO_Init+0x2b8>
+ 8001bca:	e14f      	b.n	8001e6c <HAL_GPIO_Init+0x2b8>
   {
     /* Get the IO position */
     iocurrent = (GPIO_Init->Pin) & (1U << position);
- 8001e58:	683b      	ldr	r3, [r7, #0]
- 8001e5a:	681b      	ldr	r3, [r3, #0]
- 8001e5c:	2101      	movs	r1, #1
- 8001e5e:	697a      	ldr	r2, [r7, #20]
- 8001e60:	4091      	lsls	r1, r2
- 8001e62:	000a      	movs	r2, r1
- 8001e64:	4013      	ands	r3, r2
- 8001e66:	60fb      	str	r3, [r7, #12]
+ 8001bcc:	683b      	ldr	r3, [r7, #0]
+ 8001bce:	681b      	ldr	r3, [r3, #0]
+ 8001bd0:	2101      	movs	r1, #1
+ 8001bd2:	697a      	ldr	r2, [r7, #20]
+ 8001bd4:	4091      	lsls	r1, r2
+ 8001bd6:	000a      	movs	r2, r1
+ 8001bd8:	4013      	ands	r3, r2
+ 8001bda:	60fb      	str	r3, [r7, #12]
 
     if (iocurrent)
- 8001e68:	68fb      	ldr	r3, [r7, #12]
- 8001e6a:	2b00      	cmp	r3, #0
- 8001e6c:	d100      	bne.n	8001e70 <HAL_GPIO_Init+0x30>
- 8001e6e:	e140      	b.n	80020f2 <HAL_GPIO_Init+0x2b2>
+ 8001bdc:	68fb      	ldr	r3, [r7, #12]
+ 8001bde:	2b00      	cmp	r3, #0
+ 8001be0:	d100      	bne.n	8001be4 <HAL_GPIO_Init+0x30>
+ 8001be2:	e140      	b.n	8001e66 <HAL_GPIO_Init+0x2b2>
     {
       /*--------------------- GPIO Mode Configuration ------------------------*/
       /* In case of Output or Alternate function mode selection */
       if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
- 8001e70:	683b      	ldr	r3, [r7, #0]
- 8001e72:	685b      	ldr	r3, [r3, #4]
- 8001e74:	2203      	movs	r2, #3
- 8001e76:	4013      	ands	r3, r2
- 8001e78:	2b01      	cmp	r3, #1
- 8001e7a:	d005      	beq.n	8001e88 <HAL_GPIO_Init+0x48>
+ 8001be4:	683b      	ldr	r3, [r7, #0]
+ 8001be6:	685b      	ldr	r3, [r3, #4]
+ 8001be8:	2203      	movs	r2, #3
+ 8001bea:	4013      	ands	r3, r2
+ 8001bec:	2b01      	cmp	r3, #1
+ 8001bee:	d005      	beq.n	8001bfc <HAL_GPIO_Init+0x48>
           ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF))
- 8001e7c:	683b      	ldr	r3, [r7, #0]
- 8001e7e:	685b      	ldr	r3, [r3, #4]
- 8001e80:	2203      	movs	r2, #3
- 8001e82:	4013      	ands	r3, r2
+ 8001bf0:	683b      	ldr	r3, [r7, #0]
+ 8001bf2:	685b      	ldr	r3, [r3, #4]
+ 8001bf4:	2203      	movs	r2, #3
+ 8001bf6:	4013      	ands	r3, r2
       if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) ||
- 8001e84:	2b02      	cmp	r3, #2
- 8001e86:	d130      	bne.n	8001eea <HAL_GPIO_Init+0xaa>
+ 8001bf8:	2b02      	cmp	r3, #2
+ 8001bfa:	d130      	bne.n	8001c5e <HAL_GPIO_Init+0xaa>
       {
         /* Check the Speed parameter */
         assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
         /* Configure the IO Speed */
         temp = GPIOx->OSPEEDR;
- 8001e88:	687b      	ldr	r3, [r7, #4]
- 8001e8a:	689b      	ldr	r3, [r3, #8]
- 8001e8c:	613b      	str	r3, [r7, #16]
+ 8001bfc:	687b      	ldr	r3, [r7, #4]
+ 8001bfe:	689b      	ldr	r3, [r3, #8]
+ 8001c00:	613b      	str	r3, [r7, #16]
         temp &= ~(GPIO_OSPEEDER_OSPEED0 << (position * 2U));
- 8001e8e:	697b      	ldr	r3, [r7, #20]
- 8001e90:	005b      	lsls	r3, r3, #1
- 8001e92:	2203      	movs	r2, #3
- 8001e94:	409a      	lsls	r2, r3
- 8001e96:	0013      	movs	r3, r2
- 8001e98:	43da      	mvns	r2, r3
- 8001e9a:	693b      	ldr	r3, [r7, #16]
- 8001e9c:	4013      	ands	r3, r2
- 8001e9e:	613b      	str	r3, [r7, #16]
+ 8001c02:	697b      	ldr	r3, [r7, #20]
+ 8001c04:	005b      	lsls	r3, r3, #1
+ 8001c06:	2203      	movs	r2, #3
+ 8001c08:	409a      	lsls	r2, r3
+ 8001c0a:	0013      	movs	r3, r2
+ 8001c0c:	43da      	mvns	r2, r3
+ 8001c0e:	693b      	ldr	r3, [r7, #16]
+ 8001c10:	4013      	ands	r3, r2
+ 8001c12:	613b      	str	r3, [r7, #16]
         temp |= (GPIO_Init->Speed << (position * 2U));
- 8001ea0:	683b      	ldr	r3, [r7, #0]
- 8001ea2:	68da      	ldr	r2, [r3, #12]
- 8001ea4:	697b      	ldr	r3, [r7, #20]
- 8001ea6:	005b      	lsls	r3, r3, #1
- 8001ea8:	409a      	lsls	r2, r3
- 8001eaa:	0013      	movs	r3, r2
- 8001eac:	693a      	ldr	r2, [r7, #16]
- 8001eae:	4313      	orrs	r3, r2
- 8001eb0:	613b      	str	r3, [r7, #16]
+ 8001c14:	683b      	ldr	r3, [r7, #0]
+ 8001c16:	68da      	ldr	r2, [r3, #12]
+ 8001c18:	697b      	ldr	r3, [r7, #20]
+ 8001c1a:	005b      	lsls	r3, r3, #1
+ 8001c1c:	409a      	lsls	r2, r3
+ 8001c1e:	0013      	movs	r3, r2
+ 8001c20:	693a      	ldr	r2, [r7, #16]
+ 8001c22:	4313      	orrs	r3, r2
+ 8001c24:	613b      	str	r3, [r7, #16]
         GPIOx->OSPEEDR = temp;
- 8001eb2:	687b      	ldr	r3, [r7, #4]
- 8001eb4:	693a      	ldr	r2, [r7, #16]
- 8001eb6:	609a      	str	r2, [r3, #8]
+ 8001c26:	687b      	ldr	r3, [r7, #4]
+ 8001c28:	693a      	ldr	r2, [r7, #16]
+ 8001c2a:	609a      	str	r2, [r3, #8]
 
         /* Configure the IO Output Type */
         temp = GPIOx->OTYPER;
- 8001eb8:	687b      	ldr	r3, [r7, #4]
- 8001eba:	685b      	ldr	r3, [r3, #4]
- 8001ebc:	613b      	str	r3, [r7, #16]
+ 8001c2c:	687b      	ldr	r3, [r7, #4]
+ 8001c2e:	685b      	ldr	r3, [r3, #4]
+ 8001c30:	613b      	str	r3, [r7, #16]
         temp &= ~(GPIO_OTYPER_OT_0 << position) ;
- 8001ebe:	2201      	movs	r2, #1
- 8001ec0:	697b      	ldr	r3, [r7, #20]
- 8001ec2:	409a      	lsls	r2, r3
- 8001ec4:	0013      	movs	r3, r2
- 8001ec6:	43da      	mvns	r2, r3
- 8001ec8:	693b      	ldr	r3, [r7, #16]
- 8001eca:	4013      	ands	r3, r2
- 8001ecc:	613b      	str	r3, [r7, #16]
+ 8001c32:	2201      	movs	r2, #1
+ 8001c34:	697b      	ldr	r3, [r7, #20]
+ 8001c36:	409a      	lsls	r2, r3
+ 8001c38:	0013      	movs	r3, r2
+ 8001c3a:	43da      	mvns	r2, r3
+ 8001c3c:	693b      	ldr	r3, [r7, #16]
+ 8001c3e:	4013      	ands	r3, r2
+ 8001c40:	613b      	str	r3, [r7, #16]
         temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position);
- 8001ece:	683b      	ldr	r3, [r7, #0]
- 8001ed0:	685b      	ldr	r3, [r3, #4]
- 8001ed2:	091b      	lsrs	r3, r3, #4
- 8001ed4:	2201      	movs	r2, #1
- 8001ed6:	401a      	ands	r2, r3
- 8001ed8:	697b      	ldr	r3, [r7, #20]
- 8001eda:	409a      	lsls	r2, r3
- 8001edc:	0013      	movs	r3, r2
- 8001ede:	693a      	ldr	r2, [r7, #16]
- 8001ee0:	4313      	orrs	r3, r2
- 8001ee2:	613b      	str	r3, [r7, #16]
+ 8001c42:	683b      	ldr	r3, [r7, #0]
+ 8001c44:	685b      	ldr	r3, [r3, #4]
+ 8001c46:	091b      	lsrs	r3, r3, #4
+ 8001c48:	2201      	movs	r2, #1
+ 8001c4a:	401a      	ands	r2, r3
+ 8001c4c:	697b      	ldr	r3, [r7, #20]
+ 8001c4e:	409a      	lsls	r2, r3
+ 8001c50:	0013      	movs	r3, r2
+ 8001c52:	693a      	ldr	r2, [r7, #16]
+ 8001c54:	4313      	orrs	r3, r2
+ 8001c56:	613b      	str	r3, [r7, #16]
         GPIOx->OTYPER = temp;
- 8001ee4:	687b      	ldr	r3, [r7, #4]
- 8001ee6:	693a      	ldr	r2, [r7, #16]
- 8001ee8:	605a      	str	r2, [r3, #4]
+ 8001c58:	687b      	ldr	r3, [r7, #4]
+ 8001c5a:	693a      	ldr	r2, [r7, #16]
+ 8001c5c:	605a      	str	r2, [r3, #4]
       }
 
       if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG)
- 8001eea:	683b      	ldr	r3, [r7, #0]
- 8001eec:	685b      	ldr	r3, [r3, #4]
- 8001eee:	2203      	movs	r2, #3
- 8001ef0:	4013      	ands	r3, r2
- 8001ef2:	2b03      	cmp	r3, #3
- 8001ef4:	d017      	beq.n	8001f26 <HAL_GPIO_Init+0xe6>
+ 8001c5e:	683b      	ldr	r3, [r7, #0]
+ 8001c60:	685b      	ldr	r3, [r3, #4]
+ 8001c62:	2203      	movs	r2, #3
+ 8001c64:	4013      	ands	r3, r2
+ 8001c66:	2b03      	cmp	r3, #3
+ 8001c68:	d017      	beq.n	8001c9a <HAL_GPIO_Init+0xe6>
       {
         /* Check the Pull parameter */
         assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
 
         /* Activate the Pull-up or Pull down resistor for the current IO */
         temp = GPIOx->PUPDR;
- 8001ef6:	687b      	ldr	r3, [r7, #4]
- 8001ef8:	68db      	ldr	r3, [r3, #12]
- 8001efa:	613b      	str	r3, [r7, #16]
+ 8001c6a:	687b      	ldr	r3, [r7, #4]
+ 8001c6c:	68db      	ldr	r3, [r3, #12]
+ 8001c6e:	613b      	str	r3, [r7, #16]
         temp &= ~(GPIO_PUPDR_PUPD0 << (position * 2U));
- 8001efc:	697b      	ldr	r3, [r7, #20]
- 8001efe:	005b      	lsls	r3, r3, #1
- 8001f00:	2203      	movs	r2, #3
- 8001f02:	409a      	lsls	r2, r3
- 8001f04:	0013      	movs	r3, r2
- 8001f06:	43da      	mvns	r2, r3
- 8001f08:	693b      	ldr	r3, [r7, #16]
- 8001f0a:	4013      	ands	r3, r2
- 8001f0c:	613b      	str	r3, [r7, #16]
+ 8001c70:	697b      	ldr	r3, [r7, #20]
+ 8001c72:	005b      	lsls	r3, r3, #1
+ 8001c74:	2203      	movs	r2, #3
+ 8001c76:	409a      	lsls	r2, r3
+ 8001c78:	0013      	movs	r3, r2
+ 8001c7a:	43da      	mvns	r2, r3
+ 8001c7c:	693b      	ldr	r3, [r7, #16]
+ 8001c7e:	4013      	ands	r3, r2
+ 8001c80:	613b      	str	r3, [r7, #16]
         temp |= ((GPIO_Init->Pull) << (position * 2U));
- 8001f0e:	683b      	ldr	r3, [r7, #0]
- 8001f10:	689a      	ldr	r2, [r3, #8]
- 8001f12:	697b      	ldr	r3, [r7, #20]
- 8001f14:	005b      	lsls	r3, r3, #1
- 8001f16:	409a      	lsls	r2, r3
- 8001f18:	0013      	movs	r3, r2
- 8001f1a:	693a      	ldr	r2, [r7, #16]
- 8001f1c:	4313      	orrs	r3, r2
- 8001f1e:	613b      	str	r3, [r7, #16]
+ 8001c82:	683b      	ldr	r3, [r7, #0]
+ 8001c84:	689a      	ldr	r2, [r3, #8]
+ 8001c86:	697b      	ldr	r3, [r7, #20]
+ 8001c88:	005b      	lsls	r3, r3, #1
+ 8001c8a:	409a      	lsls	r2, r3
+ 8001c8c:	0013      	movs	r3, r2
+ 8001c8e:	693a      	ldr	r2, [r7, #16]
+ 8001c90:	4313      	orrs	r3, r2
+ 8001c92:	613b      	str	r3, [r7, #16]
         GPIOx->PUPDR = temp;
- 8001f20:	687b      	ldr	r3, [r7, #4]
- 8001f22:	693a      	ldr	r2, [r7, #16]
- 8001f24:	60da      	str	r2, [r3, #12]
+ 8001c94:	687b      	ldr	r3, [r7, #4]
+ 8001c96:	693a      	ldr	r2, [r7, #16]
+ 8001c98:	60da      	str	r2, [r3, #12]
       }
 
       /* In case of Alternate function mode selection */
       if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)
- 8001f26:	683b      	ldr	r3, [r7, #0]
- 8001f28:	685b      	ldr	r3, [r3, #4]
- 8001f2a:	2203      	movs	r2, #3
- 8001f2c:	4013      	ands	r3, r2
- 8001f2e:	2b02      	cmp	r3, #2
- 8001f30:	d123      	bne.n	8001f7a <HAL_GPIO_Init+0x13a>
+ 8001c9a:	683b      	ldr	r3, [r7, #0]
+ 8001c9c:	685b      	ldr	r3, [r3, #4]
+ 8001c9e:	2203      	movs	r2, #3
+ 8001ca0:	4013      	ands	r3, r2
+ 8001ca2:	2b02      	cmp	r3, #2
+ 8001ca4:	d123      	bne.n	8001cee <HAL_GPIO_Init+0x13a>
         /* Check the Alternate function parameters */
         assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
         assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
 
         /* Configure Alternate function mapped with the current IO */
         temp = GPIOx->AFR[position >> 3U];
- 8001f32:	697b      	ldr	r3, [r7, #20]
- 8001f34:	08da      	lsrs	r2, r3, #3
- 8001f36:	687b      	ldr	r3, [r7, #4]
- 8001f38:	3208      	adds	r2, #8
- 8001f3a:	0092      	lsls	r2, r2, #2
- 8001f3c:	58d3      	ldr	r3, [r2, r3]
- 8001f3e:	613b      	str	r3, [r7, #16]
+ 8001ca6:	697b      	ldr	r3, [r7, #20]
+ 8001ca8:	08da      	lsrs	r2, r3, #3
+ 8001caa:	687b      	ldr	r3, [r7, #4]
+ 8001cac:	3208      	adds	r2, #8
+ 8001cae:	0092      	lsls	r2, r2, #2
+ 8001cb0:	58d3      	ldr	r3, [r2, r3]
+ 8001cb2:	613b      	str	r3, [r7, #16]
         temp &= ~(0xFUL << ((uint32_t)(position & 0x07UL) * 4U));
- 8001f40:	697b      	ldr	r3, [r7, #20]
- 8001f42:	2207      	movs	r2, #7
- 8001f44:	4013      	ands	r3, r2
- 8001f46:	009b      	lsls	r3, r3, #2
- 8001f48:	220f      	movs	r2, #15
- 8001f4a:	409a      	lsls	r2, r3
- 8001f4c:	0013      	movs	r3, r2
- 8001f4e:	43da      	mvns	r2, r3
- 8001f50:	693b      	ldr	r3, [r7, #16]
- 8001f52:	4013      	ands	r3, r2
- 8001f54:	613b      	str	r3, [r7, #16]
+ 8001cb4:	697b      	ldr	r3, [r7, #20]
+ 8001cb6:	2207      	movs	r2, #7
+ 8001cb8:	4013      	ands	r3, r2
+ 8001cba:	009b      	lsls	r3, r3, #2
+ 8001cbc:	220f      	movs	r2, #15
+ 8001cbe:	409a      	lsls	r2, r3
+ 8001cc0:	0013      	movs	r3, r2
+ 8001cc2:	43da      	mvns	r2, r3
+ 8001cc4:	693b      	ldr	r3, [r7, #16]
+ 8001cc6:	4013      	ands	r3, r2
+ 8001cc8:	613b      	str	r3, [r7, #16]
         temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07U) * 4U));
- 8001f56:	683b      	ldr	r3, [r7, #0]
- 8001f58:	691a      	ldr	r2, [r3, #16]
- 8001f5a:	697b      	ldr	r3, [r7, #20]
- 8001f5c:	2107      	movs	r1, #7
- 8001f5e:	400b      	ands	r3, r1
- 8001f60:	009b      	lsls	r3, r3, #2
- 8001f62:	409a      	lsls	r2, r3
- 8001f64:	0013      	movs	r3, r2
- 8001f66:	693a      	ldr	r2, [r7, #16]
- 8001f68:	4313      	orrs	r3, r2
- 8001f6a:	613b      	str	r3, [r7, #16]
+ 8001cca:	683b      	ldr	r3, [r7, #0]
+ 8001ccc:	691a      	ldr	r2, [r3, #16]
+ 8001cce:	697b      	ldr	r3, [r7, #20]
+ 8001cd0:	2107      	movs	r1, #7
+ 8001cd2:	400b      	ands	r3, r1
+ 8001cd4:	009b      	lsls	r3, r3, #2
+ 8001cd6:	409a      	lsls	r2, r3
+ 8001cd8:	0013      	movs	r3, r2
+ 8001cda:	693a      	ldr	r2, [r7, #16]
+ 8001cdc:	4313      	orrs	r3, r2
+ 8001cde:	613b      	str	r3, [r7, #16]
         GPIOx->AFR[position >> 3U] = temp;
- 8001f6c:	697b      	ldr	r3, [r7, #20]
- 8001f6e:	08da      	lsrs	r2, r3, #3
- 8001f70:	687b      	ldr	r3, [r7, #4]
- 8001f72:	3208      	adds	r2, #8
- 8001f74:	0092      	lsls	r2, r2, #2
- 8001f76:	6939      	ldr	r1, [r7, #16]
- 8001f78:	50d1      	str	r1, [r2, r3]
+ 8001ce0:	697b      	ldr	r3, [r7, #20]
+ 8001ce2:	08da      	lsrs	r2, r3, #3
+ 8001ce4:	687b      	ldr	r3, [r7, #4]
+ 8001ce6:	3208      	adds	r2, #8
+ 8001ce8:	0092      	lsls	r2, r2, #2
+ 8001cea:	6939      	ldr	r1, [r7, #16]
+ 8001cec:	50d1      	str	r1, [r2, r3]
       }
 
       /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
       temp = GPIOx->MODER;
- 8001f7a:	687b      	ldr	r3, [r7, #4]
- 8001f7c:	681b      	ldr	r3, [r3, #0]
- 8001f7e:	613b      	str	r3, [r7, #16]
+ 8001cee:	687b      	ldr	r3, [r7, #4]
+ 8001cf0:	681b      	ldr	r3, [r3, #0]
+ 8001cf2:	613b      	str	r3, [r7, #16]
       temp &= ~(GPIO_MODER_MODE0 << (position * 2U));
- 8001f80:	697b      	ldr	r3, [r7, #20]
- 8001f82:	005b      	lsls	r3, r3, #1
- 8001f84:	2203      	movs	r2, #3
- 8001f86:	409a      	lsls	r2, r3
- 8001f88:	0013      	movs	r3, r2
- 8001f8a:	43da      	mvns	r2, r3
- 8001f8c:	693b      	ldr	r3, [r7, #16]
- 8001f8e:	4013      	ands	r3, r2
- 8001f90:	613b      	str	r3, [r7, #16]
+ 8001cf4:	697b      	ldr	r3, [r7, #20]
+ 8001cf6:	005b      	lsls	r3, r3, #1
+ 8001cf8:	2203      	movs	r2, #3
+ 8001cfa:	409a      	lsls	r2, r3
+ 8001cfc:	0013      	movs	r3, r2
+ 8001cfe:	43da      	mvns	r2, r3
+ 8001d00:	693b      	ldr	r3, [r7, #16]
+ 8001d02:	4013      	ands	r3, r2
+ 8001d04:	613b      	str	r3, [r7, #16]
       temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
- 8001f92:	683b      	ldr	r3, [r7, #0]
- 8001f94:	685b      	ldr	r3, [r3, #4]
- 8001f96:	2203      	movs	r2, #3
- 8001f98:	401a      	ands	r2, r3
- 8001f9a:	697b      	ldr	r3, [r7, #20]
- 8001f9c:	005b      	lsls	r3, r3, #1
- 8001f9e:	409a      	lsls	r2, r3
- 8001fa0:	0013      	movs	r3, r2
- 8001fa2:	693a      	ldr	r2, [r7, #16]
- 8001fa4:	4313      	orrs	r3, r2
- 8001fa6:	613b      	str	r3, [r7, #16]
+ 8001d06:	683b      	ldr	r3, [r7, #0]
+ 8001d08:	685b      	ldr	r3, [r3, #4]
+ 8001d0a:	2203      	movs	r2, #3
+ 8001d0c:	401a      	ands	r2, r3
+ 8001d0e:	697b      	ldr	r3, [r7, #20]
+ 8001d10:	005b      	lsls	r3, r3, #1
+ 8001d12:	409a      	lsls	r2, r3
+ 8001d14:	0013      	movs	r3, r2
+ 8001d16:	693a      	ldr	r2, [r7, #16]
+ 8001d18:	4313      	orrs	r3, r2
+ 8001d1a:	613b      	str	r3, [r7, #16]
       GPIOx->MODER = temp;
- 8001fa8:	687b      	ldr	r3, [r7, #4]
- 8001faa:	693a      	ldr	r2, [r7, #16]
- 8001fac:	601a      	str	r2, [r3, #0]
+ 8001d1c:	687b      	ldr	r3, [r7, #4]
+ 8001d1e:	693a      	ldr	r2, [r7, #16]
+ 8001d20:	601a      	str	r2, [r3, #0]
 
       /*--------------------- EXTI Mode Configuration ------------------------*/
       /* Configure the External Interrupt or event for the current IO */
       if ((GPIO_Init->Mode & EXTI_MODE) != 0x00U)
- 8001fae:	683b      	ldr	r3, [r7, #0]
- 8001fb0:	685a      	ldr	r2, [r3, #4]
- 8001fb2:	23c0      	movs	r3, #192	; 0xc0
- 8001fb4:	029b      	lsls	r3, r3, #10
- 8001fb6:	4013      	ands	r3, r2
- 8001fb8:	d100      	bne.n	8001fbc <HAL_GPIO_Init+0x17c>
- 8001fba:	e09a      	b.n	80020f2 <HAL_GPIO_Init+0x2b2>
+ 8001d22:	683b      	ldr	r3, [r7, #0]
+ 8001d24:	685a      	ldr	r2, [r3, #4]
+ 8001d26:	23c0      	movs	r3, #192	; 0xc0
+ 8001d28:	029b      	lsls	r3, r3, #10
+ 8001d2a:	4013      	ands	r3, r2
+ 8001d2c:	d100      	bne.n	8001d30 <HAL_GPIO_Init+0x17c>
+ 8001d2e:	e09a      	b.n	8001e66 <HAL_GPIO_Init+0x2b2>
       {
         /* Enable SYSCFG Clock */
         __HAL_RCC_SYSCFG_CLK_ENABLE();
- 8001fbc:	4b54      	ldr	r3, [pc, #336]	; (8002110 <HAL_GPIO_Init+0x2d0>)
- 8001fbe:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 8001fc0:	4b53      	ldr	r3, [pc, #332]	; (8002110 <HAL_GPIO_Init+0x2d0>)
- 8001fc2:	2101      	movs	r1, #1
- 8001fc4:	430a      	orrs	r2, r1
- 8001fc6:	635a      	str	r2, [r3, #52]	; 0x34
+ 8001d30:	4b54      	ldr	r3, [pc, #336]	; (8001e84 <HAL_GPIO_Init+0x2d0>)
+ 8001d32:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 8001d34:	4b53      	ldr	r3, [pc, #332]	; (8001e84 <HAL_GPIO_Init+0x2d0>)
+ 8001d36:	2101      	movs	r1, #1
+ 8001d38:	430a      	orrs	r2, r1
+ 8001d3a:	635a      	str	r2, [r3, #52]	; 0x34
 
         temp = SYSCFG->EXTICR[position >> 2U];
- 8001fc8:	4a52      	ldr	r2, [pc, #328]	; (8002114 <HAL_GPIO_Init+0x2d4>)
- 8001fca:	697b      	ldr	r3, [r7, #20]
- 8001fcc:	089b      	lsrs	r3, r3, #2
- 8001fce:	3302      	adds	r3, #2
- 8001fd0:	009b      	lsls	r3, r3, #2
- 8001fd2:	589b      	ldr	r3, [r3, r2]
- 8001fd4:	613b      	str	r3, [r7, #16]
+ 8001d3c:	4a52      	ldr	r2, [pc, #328]	; (8001e88 <HAL_GPIO_Init+0x2d4>)
+ 8001d3e:	697b      	ldr	r3, [r7, #20]
+ 8001d40:	089b      	lsrs	r3, r3, #2
+ 8001d42:	3302      	adds	r3, #2
+ 8001d44:	009b      	lsls	r3, r3, #2
+ 8001d46:	589b      	ldr	r3, [r3, r2]
+ 8001d48:	613b      	str	r3, [r7, #16]
         CLEAR_BIT(temp, (0x0FUL) << (4U * (position & 0x03U)));
- 8001fd6:	697b      	ldr	r3, [r7, #20]
- 8001fd8:	2203      	movs	r2, #3
- 8001fda:	4013      	ands	r3, r2
- 8001fdc:	009b      	lsls	r3, r3, #2
- 8001fde:	220f      	movs	r2, #15
- 8001fe0:	409a      	lsls	r2, r3
- 8001fe2:	0013      	movs	r3, r2
- 8001fe4:	43da      	mvns	r2, r3
- 8001fe6:	693b      	ldr	r3, [r7, #16]
- 8001fe8:	4013      	ands	r3, r2
- 8001fea:	613b      	str	r3, [r7, #16]
+ 8001d4a:	697b      	ldr	r3, [r7, #20]
+ 8001d4c:	2203      	movs	r2, #3
+ 8001d4e:	4013      	ands	r3, r2
+ 8001d50:	009b      	lsls	r3, r3, #2
+ 8001d52:	220f      	movs	r2, #15
+ 8001d54:	409a      	lsls	r2, r3
+ 8001d56:	0013      	movs	r3, r2
+ 8001d58:	43da      	mvns	r2, r3
+ 8001d5a:	693b      	ldr	r3, [r7, #16]
+ 8001d5c:	4013      	ands	r3, r2
+ 8001d5e:	613b      	str	r3, [r7, #16]
         SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03U)));
- 8001fec:	687a      	ldr	r2, [r7, #4]
- 8001fee:	23a0      	movs	r3, #160	; 0xa0
- 8001ff0:	05db      	lsls	r3, r3, #23
- 8001ff2:	429a      	cmp	r2, r3
- 8001ff4:	d019      	beq.n	800202a <HAL_GPIO_Init+0x1ea>
- 8001ff6:	687b      	ldr	r3, [r7, #4]
- 8001ff8:	4a47      	ldr	r2, [pc, #284]	; (8002118 <HAL_GPIO_Init+0x2d8>)
- 8001ffa:	4293      	cmp	r3, r2
- 8001ffc:	d013      	beq.n	8002026 <HAL_GPIO_Init+0x1e6>
- 8001ffe:	687b      	ldr	r3, [r7, #4]
- 8002000:	4a46      	ldr	r2, [pc, #280]	; (800211c <HAL_GPIO_Init+0x2dc>)
- 8002002:	4293      	cmp	r3, r2
- 8002004:	d00d      	beq.n	8002022 <HAL_GPIO_Init+0x1e2>
- 8002006:	687b      	ldr	r3, [r7, #4]
- 8002008:	4a45      	ldr	r2, [pc, #276]	; (8002120 <HAL_GPIO_Init+0x2e0>)
- 800200a:	4293      	cmp	r3, r2
- 800200c:	d007      	beq.n	800201e <HAL_GPIO_Init+0x1de>
- 800200e:	687b      	ldr	r3, [r7, #4]
- 8002010:	4a44      	ldr	r2, [pc, #272]	; (8002124 <HAL_GPIO_Init+0x2e4>)
- 8002012:	4293      	cmp	r3, r2
- 8002014:	d101      	bne.n	800201a <HAL_GPIO_Init+0x1da>
- 8002016:	2305      	movs	r3, #5
- 8002018:	e008      	b.n	800202c <HAL_GPIO_Init+0x1ec>
- 800201a:	2306      	movs	r3, #6
- 800201c:	e006      	b.n	800202c <HAL_GPIO_Init+0x1ec>
- 800201e:	2303      	movs	r3, #3
- 8002020:	e004      	b.n	800202c <HAL_GPIO_Init+0x1ec>
- 8002022:	2302      	movs	r3, #2
- 8002024:	e002      	b.n	800202c <HAL_GPIO_Init+0x1ec>
- 8002026:	2301      	movs	r3, #1
- 8002028:	e000      	b.n	800202c <HAL_GPIO_Init+0x1ec>
- 800202a:	2300      	movs	r3, #0
- 800202c:	697a      	ldr	r2, [r7, #20]
- 800202e:	2103      	movs	r1, #3
- 8002030:	400a      	ands	r2, r1
- 8002032:	0092      	lsls	r2, r2, #2
- 8002034:	4093      	lsls	r3, r2
- 8002036:	693a      	ldr	r2, [r7, #16]
- 8002038:	4313      	orrs	r3, r2
- 800203a:	613b      	str	r3, [r7, #16]
+ 8001d60:	687a      	ldr	r2, [r7, #4]
+ 8001d62:	23a0      	movs	r3, #160	; 0xa0
+ 8001d64:	05db      	lsls	r3, r3, #23
+ 8001d66:	429a      	cmp	r2, r3
+ 8001d68:	d019      	beq.n	8001d9e <HAL_GPIO_Init+0x1ea>
+ 8001d6a:	687b      	ldr	r3, [r7, #4]
+ 8001d6c:	4a47      	ldr	r2, [pc, #284]	; (8001e8c <HAL_GPIO_Init+0x2d8>)
+ 8001d6e:	4293      	cmp	r3, r2
+ 8001d70:	d013      	beq.n	8001d9a <HAL_GPIO_Init+0x1e6>
+ 8001d72:	687b      	ldr	r3, [r7, #4]
+ 8001d74:	4a46      	ldr	r2, [pc, #280]	; (8001e90 <HAL_GPIO_Init+0x2dc>)
+ 8001d76:	4293      	cmp	r3, r2
+ 8001d78:	d00d      	beq.n	8001d96 <HAL_GPIO_Init+0x1e2>
+ 8001d7a:	687b      	ldr	r3, [r7, #4]
+ 8001d7c:	4a45      	ldr	r2, [pc, #276]	; (8001e94 <HAL_GPIO_Init+0x2e0>)
+ 8001d7e:	4293      	cmp	r3, r2
+ 8001d80:	d007      	beq.n	8001d92 <HAL_GPIO_Init+0x1de>
+ 8001d82:	687b      	ldr	r3, [r7, #4]
+ 8001d84:	4a44      	ldr	r2, [pc, #272]	; (8001e98 <HAL_GPIO_Init+0x2e4>)
+ 8001d86:	4293      	cmp	r3, r2
+ 8001d88:	d101      	bne.n	8001d8e <HAL_GPIO_Init+0x1da>
+ 8001d8a:	2305      	movs	r3, #5
+ 8001d8c:	e008      	b.n	8001da0 <HAL_GPIO_Init+0x1ec>
+ 8001d8e:	2306      	movs	r3, #6
+ 8001d90:	e006      	b.n	8001da0 <HAL_GPIO_Init+0x1ec>
+ 8001d92:	2303      	movs	r3, #3
+ 8001d94:	e004      	b.n	8001da0 <HAL_GPIO_Init+0x1ec>
+ 8001d96:	2302      	movs	r3, #2
+ 8001d98:	e002      	b.n	8001da0 <HAL_GPIO_Init+0x1ec>
+ 8001d9a:	2301      	movs	r3, #1
+ 8001d9c:	e000      	b.n	8001da0 <HAL_GPIO_Init+0x1ec>
+ 8001d9e:	2300      	movs	r3, #0
+ 8001da0:	697a      	ldr	r2, [r7, #20]
+ 8001da2:	2103      	movs	r1, #3
+ 8001da4:	400a      	ands	r2, r1
+ 8001da6:	0092      	lsls	r2, r2, #2
+ 8001da8:	4093      	lsls	r3, r2
+ 8001daa:	693a      	ldr	r2, [r7, #16]
+ 8001dac:	4313      	orrs	r3, r2
+ 8001dae:	613b      	str	r3, [r7, #16]
         SYSCFG->EXTICR[position >> 2U] = temp;
- 800203c:	4935      	ldr	r1, [pc, #212]	; (8002114 <HAL_GPIO_Init+0x2d4>)
- 800203e:	697b      	ldr	r3, [r7, #20]
- 8002040:	089b      	lsrs	r3, r3, #2
- 8002042:	3302      	adds	r3, #2
- 8002044:	009b      	lsls	r3, r3, #2
- 8002046:	693a      	ldr	r2, [r7, #16]
- 8002048:	505a      	str	r2, [r3, r1]
+ 8001db0:	4935      	ldr	r1, [pc, #212]	; (8001e88 <HAL_GPIO_Init+0x2d4>)
+ 8001db2:	697b      	ldr	r3, [r7, #20]
+ 8001db4:	089b      	lsrs	r3, r3, #2
+ 8001db6:	3302      	adds	r3, #2
+ 8001db8:	009b      	lsls	r3, r3, #2
+ 8001dba:	693a      	ldr	r2, [r7, #16]
+ 8001dbc:	505a      	str	r2, [r3, r1]
 
         /* Clear Rising Falling edge configuration */
         temp = EXTI->RTSR;
- 800204a:	4b37      	ldr	r3, [pc, #220]	; (8002128 <HAL_GPIO_Init+0x2e8>)
- 800204c:	689b      	ldr	r3, [r3, #8]
- 800204e:	613b      	str	r3, [r7, #16]
+ 8001dbe:	4b37      	ldr	r3, [pc, #220]	; (8001e9c <HAL_GPIO_Init+0x2e8>)
+ 8001dc0:	689b      	ldr	r3, [r3, #8]
+ 8001dc2:	613b      	str	r3, [r7, #16]
         temp &= ~((uint32_t)iocurrent);
- 8002050:	68fb      	ldr	r3, [r7, #12]
- 8002052:	43da      	mvns	r2, r3
- 8002054:	693b      	ldr	r3, [r7, #16]
- 8002056:	4013      	ands	r3, r2
- 8002058:	613b      	str	r3, [r7, #16]
+ 8001dc4:	68fb      	ldr	r3, [r7, #12]
+ 8001dc6:	43da      	mvns	r2, r3
+ 8001dc8:	693b      	ldr	r3, [r7, #16]
+ 8001dca:	4013      	ands	r3, r2
+ 8001dcc:	613b      	str	r3, [r7, #16]
         if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00U)
- 800205a:	683b      	ldr	r3, [r7, #0]
- 800205c:	685a      	ldr	r2, [r3, #4]
- 800205e:	2380      	movs	r3, #128	; 0x80
- 8002060:	035b      	lsls	r3, r3, #13
- 8002062:	4013      	ands	r3, r2
- 8002064:	d003      	beq.n	800206e <HAL_GPIO_Init+0x22e>
+ 8001dce:	683b      	ldr	r3, [r7, #0]
+ 8001dd0:	685a      	ldr	r2, [r3, #4]
+ 8001dd2:	2380      	movs	r3, #128	; 0x80
+ 8001dd4:	035b      	lsls	r3, r3, #13
+ 8001dd6:	4013      	ands	r3, r2
+ 8001dd8:	d003      	beq.n	8001de2 <HAL_GPIO_Init+0x22e>
         {
           temp |= iocurrent;
- 8002066:	693a      	ldr	r2, [r7, #16]
- 8002068:	68fb      	ldr	r3, [r7, #12]
- 800206a:	4313      	orrs	r3, r2
- 800206c:	613b      	str	r3, [r7, #16]
+ 8001dda:	693a      	ldr	r2, [r7, #16]
+ 8001ddc:	68fb      	ldr	r3, [r7, #12]
+ 8001dde:	4313      	orrs	r3, r2
+ 8001de0:	613b      	str	r3, [r7, #16]
         }
         EXTI->RTSR = temp;
- 800206e:	4b2e      	ldr	r3, [pc, #184]	; (8002128 <HAL_GPIO_Init+0x2e8>)
- 8002070:	693a      	ldr	r2, [r7, #16]
- 8002072:	609a      	str	r2, [r3, #8]
+ 8001de2:	4b2e      	ldr	r3, [pc, #184]	; (8001e9c <HAL_GPIO_Init+0x2e8>)
+ 8001de4:	693a      	ldr	r2, [r7, #16]
+ 8001de6:	609a      	str	r2, [r3, #8]
 
         temp = EXTI->FTSR;
- 8002074:	4b2c      	ldr	r3, [pc, #176]	; (8002128 <HAL_GPIO_Init+0x2e8>)
- 8002076:	68db      	ldr	r3, [r3, #12]
- 8002078:	613b      	str	r3, [r7, #16]
+ 8001de8:	4b2c      	ldr	r3, [pc, #176]	; (8001e9c <HAL_GPIO_Init+0x2e8>)
+ 8001dea:	68db      	ldr	r3, [r3, #12]
+ 8001dec:	613b      	str	r3, [r7, #16]
         temp &= ~((uint32_t)iocurrent);
- 800207a:	68fb      	ldr	r3, [r7, #12]
- 800207c:	43da      	mvns	r2, r3
- 800207e:	693b      	ldr	r3, [r7, #16]
- 8002080:	4013      	ands	r3, r2
- 8002082:	613b      	str	r3, [r7, #16]
+ 8001dee:	68fb      	ldr	r3, [r7, #12]
+ 8001df0:	43da      	mvns	r2, r3
+ 8001df2:	693b      	ldr	r3, [r7, #16]
+ 8001df4:	4013      	ands	r3, r2
+ 8001df6:	613b      	str	r3, [r7, #16]
         if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00U)
- 8002084:	683b      	ldr	r3, [r7, #0]
- 8002086:	685a      	ldr	r2, [r3, #4]
- 8002088:	2380      	movs	r3, #128	; 0x80
- 800208a:	039b      	lsls	r3, r3, #14
- 800208c:	4013      	ands	r3, r2
- 800208e:	d003      	beq.n	8002098 <HAL_GPIO_Init+0x258>
+ 8001df8:	683b      	ldr	r3, [r7, #0]
+ 8001dfa:	685a      	ldr	r2, [r3, #4]
+ 8001dfc:	2380      	movs	r3, #128	; 0x80
+ 8001dfe:	039b      	lsls	r3, r3, #14
+ 8001e00:	4013      	ands	r3, r2
+ 8001e02:	d003      	beq.n	8001e0c <HAL_GPIO_Init+0x258>
         {
           temp |= iocurrent;
- 8002090:	693a      	ldr	r2, [r7, #16]
- 8002092:	68fb      	ldr	r3, [r7, #12]
- 8002094:	4313      	orrs	r3, r2
- 8002096:	613b      	str	r3, [r7, #16]
+ 8001e04:	693a      	ldr	r2, [r7, #16]
+ 8001e06:	68fb      	ldr	r3, [r7, #12]
+ 8001e08:	4313      	orrs	r3, r2
+ 8001e0a:	613b      	str	r3, [r7, #16]
         }
         EXTI->FTSR = temp;
- 8002098:	4b23      	ldr	r3, [pc, #140]	; (8002128 <HAL_GPIO_Init+0x2e8>)
- 800209a:	693a      	ldr	r2, [r7, #16]
- 800209c:	60da      	str	r2, [r3, #12]
+ 8001e0c:	4b23      	ldr	r3, [pc, #140]	; (8001e9c <HAL_GPIO_Init+0x2e8>)
+ 8001e0e:	693a      	ldr	r2, [r7, #16]
+ 8001e10:	60da      	str	r2, [r3, #12]
 
         temp = EXTI->EMR;
- 800209e:	4b22      	ldr	r3, [pc, #136]	; (8002128 <HAL_GPIO_Init+0x2e8>)
- 80020a0:	685b      	ldr	r3, [r3, #4]
- 80020a2:	613b      	str	r3, [r7, #16]
+ 8001e12:	4b22      	ldr	r3, [pc, #136]	; (8001e9c <HAL_GPIO_Init+0x2e8>)
+ 8001e14:	685b      	ldr	r3, [r3, #4]
+ 8001e16:	613b      	str	r3, [r7, #16]
         temp &= ~((uint32_t)iocurrent);
- 80020a4:	68fb      	ldr	r3, [r7, #12]
- 80020a6:	43da      	mvns	r2, r3
- 80020a8:	693b      	ldr	r3, [r7, #16]
- 80020aa:	4013      	ands	r3, r2
- 80020ac:	613b      	str	r3, [r7, #16]
+ 8001e18:	68fb      	ldr	r3, [r7, #12]
+ 8001e1a:	43da      	mvns	r2, r3
+ 8001e1c:	693b      	ldr	r3, [r7, #16]
+ 8001e1e:	4013      	ands	r3, r2
+ 8001e20:	613b      	str	r3, [r7, #16]
         if ((GPIO_Init->Mode & EXTI_EVT) != 0x00U)
- 80020ae:	683b      	ldr	r3, [r7, #0]
- 80020b0:	685a      	ldr	r2, [r3, #4]
- 80020b2:	2380      	movs	r3, #128	; 0x80
- 80020b4:	029b      	lsls	r3, r3, #10
- 80020b6:	4013      	ands	r3, r2
- 80020b8:	d003      	beq.n	80020c2 <HAL_GPIO_Init+0x282>
+ 8001e22:	683b      	ldr	r3, [r7, #0]
+ 8001e24:	685a      	ldr	r2, [r3, #4]
+ 8001e26:	2380      	movs	r3, #128	; 0x80
+ 8001e28:	029b      	lsls	r3, r3, #10
+ 8001e2a:	4013      	ands	r3, r2
+ 8001e2c:	d003      	beq.n	8001e36 <HAL_GPIO_Init+0x282>
         {
           temp |= iocurrent;
- 80020ba:	693a      	ldr	r2, [r7, #16]
- 80020bc:	68fb      	ldr	r3, [r7, #12]
- 80020be:	4313      	orrs	r3, r2
- 80020c0:	613b      	str	r3, [r7, #16]
+ 8001e2e:	693a      	ldr	r2, [r7, #16]
+ 8001e30:	68fb      	ldr	r3, [r7, #12]
+ 8001e32:	4313      	orrs	r3, r2
+ 8001e34:	613b      	str	r3, [r7, #16]
         }
         EXTI->EMR = temp;
- 80020c2:	4b19      	ldr	r3, [pc, #100]	; (8002128 <HAL_GPIO_Init+0x2e8>)
- 80020c4:	693a      	ldr	r2, [r7, #16]
- 80020c6:	605a      	str	r2, [r3, #4]
+ 8001e36:	4b19      	ldr	r3, [pc, #100]	; (8001e9c <HAL_GPIO_Init+0x2e8>)
+ 8001e38:	693a      	ldr	r2, [r7, #16]
+ 8001e3a:	605a      	str	r2, [r3, #4]
 
         /* Clear EXTI line configuration */
         temp = EXTI->IMR;
- 80020c8:	4b17      	ldr	r3, [pc, #92]	; (8002128 <HAL_GPIO_Init+0x2e8>)
- 80020ca:	681b      	ldr	r3, [r3, #0]
- 80020cc:	613b      	str	r3, [r7, #16]
+ 8001e3c:	4b17      	ldr	r3, [pc, #92]	; (8001e9c <HAL_GPIO_Init+0x2e8>)
+ 8001e3e:	681b      	ldr	r3, [r3, #0]
+ 8001e40:	613b      	str	r3, [r7, #16]
         temp &= ~((uint32_t)iocurrent);
- 80020ce:	68fb      	ldr	r3, [r7, #12]
- 80020d0:	43da      	mvns	r2, r3
- 80020d2:	693b      	ldr	r3, [r7, #16]
- 80020d4:	4013      	ands	r3, r2
- 80020d6:	613b      	str	r3, [r7, #16]
+ 8001e42:	68fb      	ldr	r3, [r7, #12]
+ 8001e44:	43da      	mvns	r2, r3
+ 8001e46:	693b      	ldr	r3, [r7, #16]
+ 8001e48:	4013      	ands	r3, r2
+ 8001e4a:	613b      	str	r3, [r7, #16]
         if ((GPIO_Init->Mode & EXTI_IT) != 0x00U)
- 80020d8:	683b      	ldr	r3, [r7, #0]
- 80020da:	685a      	ldr	r2, [r3, #4]
- 80020dc:	2380      	movs	r3, #128	; 0x80
- 80020de:	025b      	lsls	r3, r3, #9
- 80020e0:	4013      	ands	r3, r2
- 80020e2:	d003      	beq.n	80020ec <HAL_GPIO_Init+0x2ac>
+ 8001e4c:	683b      	ldr	r3, [r7, #0]
+ 8001e4e:	685a      	ldr	r2, [r3, #4]
+ 8001e50:	2380      	movs	r3, #128	; 0x80
+ 8001e52:	025b      	lsls	r3, r3, #9
+ 8001e54:	4013      	ands	r3, r2
+ 8001e56:	d003      	beq.n	8001e60 <HAL_GPIO_Init+0x2ac>
         {
           temp |= iocurrent;
- 80020e4:	693a      	ldr	r2, [r7, #16]
- 80020e6:	68fb      	ldr	r3, [r7, #12]
- 80020e8:	4313      	orrs	r3, r2
- 80020ea:	613b      	str	r3, [r7, #16]
+ 8001e58:	693a      	ldr	r2, [r7, #16]
+ 8001e5a:	68fb      	ldr	r3, [r7, #12]
+ 8001e5c:	4313      	orrs	r3, r2
+ 8001e5e:	613b      	str	r3, [r7, #16]
         }
         EXTI->IMR = temp;
- 80020ec:	4b0e      	ldr	r3, [pc, #56]	; (8002128 <HAL_GPIO_Init+0x2e8>)
- 80020ee:	693a      	ldr	r2, [r7, #16]
- 80020f0:	601a      	str	r2, [r3, #0]
+ 8001e60:	4b0e      	ldr	r3, [pc, #56]	; (8001e9c <HAL_GPIO_Init+0x2e8>)
+ 8001e62:	693a      	ldr	r2, [r7, #16]
+ 8001e64:	601a      	str	r2, [r3, #0]
       }
     }
     position++;
- 80020f2:	697b      	ldr	r3, [r7, #20]
- 80020f4:	3301      	adds	r3, #1
- 80020f6:	617b      	str	r3, [r7, #20]
+ 8001e66:	697b      	ldr	r3, [r7, #20]
+ 8001e68:	3301      	adds	r3, #1
+ 8001e6a:	617b      	str	r3, [r7, #20]
   while (((GPIO_Init->Pin) >> position) != 0)
- 80020f8:	683b      	ldr	r3, [r7, #0]
- 80020fa:	681a      	ldr	r2, [r3, #0]
- 80020fc:	697b      	ldr	r3, [r7, #20]
- 80020fe:	40da      	lsrs	r2, r3
- 8002100:	1e13      	subs	r3, r2, #0
- 8002102:	d000      	beq.n	8002106 <HAL_GPIO_Init+0x2c6>
- 8002104:	e6a8      	b.n	8001e58 <HAL_GPIO_Init+0x18>
+ 8001e6c:	683b      	ldr	r3, [r7, #0]
+ 8001e6e:	681a      	ldr	r2, [r3, #0]
+ 8001e70:	697b      	ldr	r3, [r7, #20]
+ 8001e72:	40da      	lsrs	r2, r3
+ 8001e74:	1e13      	subs	r3, r2, #0
+ 8001e76:	d000      	beq.n	8001e7a <HAL_GPIO_Init+0x2c6>
+ 8001e78:	e6a8      	b.n	8001bcc <HAL_GPIO_Init+0x18>
   }
 }
- 8002106:	46c0      	nop			; (mov r8, r8)
- 8002108:	46c0      	nop			; (mov r8, r8)
- 800210a:	46bd      	mov	sp, r7
- 800210c:	b006      	add	sp, #24
- 800210e:	bd80      	pop	{r7, pc}
- 8002110:	40021000 	.word	0x40021000
- 8002114:	40010000 	.word	0x40010000
- 8002118:	50000400 	.word	0x50000400
- 800211c:	50000800 	.word	0x50000800
- 8002120:	50000c00 	.word	0x50000c00
- 8002124:	50001c00 	.word	0x50001c00
- 8002128:	40010400 	.word	0x40010400
+ 8001e7a:	46c0      	nop			; (mov r8, r8)
+ 8001e7c:	46c0      	nop			; (mov r8, r8)
+ 8001e7e:	46bd      	mov	sp, r7
+ 8001e80:	b006      	add	sp, #24
+ 8001e82:	bd80      	pop	{r7, pc}
+ 8001e84:	40021000 	.word	0x40021000
+ 8001e88:	40010000 	.word	0x40010000
+ 8001e8c:	50000400 	.word	0x50000400
+ 8001e90:	50000800 	.word	0x50000800
+ 8001e94:	50000c00 	.word	0x50000c00
+ 8001e98:	50001c00 	.word	0x50001c00
+ 8001e9c:	40010400 	.word	0x40010400
 
-0800212c <HAL_GPIO_WritePin>:
+08001ea0 <HAL_GPIO_WritePin>:
   *                        GPIO_PIN_RESET: to clear the port pin
   *                        GPIO_PIN_SET: to set the port pin
   * @retval None
   */
 void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
 {
- 800212c:	b580      	push	{r7, lr}
- 800212e:	b082      	sub	sp, #8
- 8002130:	af00      	add	r7, sp, #0
- 8002132:	6078      	str	r0, [r7, #4]
- 8002134:	0008      	movs	r0, r1
- 8002136:	0011      	movs	r1, r2
- 8002138:	1cbb      	adds	r3, r7, #2
- 800213a:	1c02      	adds	r2, r0, #0
- 800213c:	801a      	strh	r2, [r3, #0]
- 800213e:	1c7b      	adds	r3, r7, #1
- 8002140:	1c0a      	adds	r2, r1, #0
- 8002142:	701a      	strb	r2, [r3, #0]
+ 8001ea0:	b580      	push	{r7, lr}
+ 8001ea2:	b082      	sub	sp, #8
+ 8001ea4:	af00      	add	r7, sp, #0
+ 8001ea6:	6078      	str	r0, [r7, #4]
+ 8001ea8:	0008      	movs	r0, r1
+ 8001eaa:	0011      	movs	r1, r2
+ 8001eac:	1cbb      	adds	r3, r7, #2
+ 8001eae:	1c02      	adds	r2, r0, #0
+ 8001eb0:	801a      	strh	r2, [r3, #0]
+ 8001eb2:	1c7b      	adds	r3, r7, #1
+ 8001eb4:	1c0a      	adds	r2, r1, #0
+ 8001eb6:	701a      	strb	r2, [r3, #0]
   /* Check the parameters */
   assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, GPIO_Pin));
   assert_param(IS_GPIO_PIN_ACTION(PinState));
 
   if (PinState != GPIO_PIN_RESET)
- 8002144:	1c7b      	adds	r3, r7, #1
- 8002146:	781b      	ldrb	r3, [r3, #0]
- 8002148:	2b00      	cmp	r3, #0
- 800214a:	d004      	beq.n	8002156 <HAL_GPIO_WritePin+0x2a>
+ 8001eb8:	1c7b      	adds	r3, r7, #1
+ 8001eba:	781b      	ldrb	r3, [r3, #0]
+ 8001ebc:	2b00      	cmp	r3, #0
+ 8001ebe:	d004      	beq.n	8001eca <HAL_GPIO_WritePin+0x2a>
   {
     GPIOx->BSRR = GPIO_Pin;
- 800214c:	1cbb      	adds	r3, r7, #2
- 800214e:	881a      	ldrh	r2, [r3, #0]
- 8002150:	687b      	ldr	r3, [r7, #4]
- 8002152:	619a      	str	r2, [r3, #24]
+ 8001ec0:	1cbb      	adds	r3, r7, #2
+ 8001ec2:	881a      	ldrh	r2, [r3, #0]
+ 8001ec4:	687b      	ldr	r3, [r7, #4]
+ 8001ec6:	619a      	str	r2, [r3, #24]
   }
   else
   {
     GPIOx->BRR = GPIO_Pin ;
   }
 }
- 8002154:	e003      	b.n	800215e <HAL_GPIO_WritePin+0x32>
+ 8001ec8:	e003      	b.n	8001ed2 <HAL_GPIO_WritePin+0x32>
     GPIOx->BRR = GPIO_Pin ;
- 8002156:	1cbb      	adds	r3, r7, #2
- 8002158:	881a      	ldrh	r2, [r3, #0]
- 800215a:	687b      	ldr	r3, [r7, #4]
- 800215c:	629a      	str	r2, [r3, #40]	; 0x28
+ 8001eca:	1cbb      	adds	r3, r7, #2
+ 8001ecc:	881a      	ldrh	r2, [r3, #0]
+ 8001ece:	687b      	ldr	r3, [r7, #4]
+ 8001ed0:	629a      	str	r2, [r3, #40]	; 0x28
 }
- 800215e:	46c0      	nop			; (mov r8, r8)
- 8002160:	46bd      	mov	sp, r7
- 8002162:	b002      	add	sp, #8
- 8002164:	bd80      	pop	{r7, pc}
+ 8001ed2:	46c0      	nop			; (mov r8, r8)
+ 8001ed4:	46bd      	mov	sp, r7
+ 8001ed6:	b002      	add	sp, #8
+ 8001ed8:	bd80      	pop	{r7, pc}
 
-08002166 <HAL_GPIO_TogglePin>:
+08001eda <HAL_GPIO_TogglePin>:
   *                All port bits are not necessarily available on all GPIOs.
   * @param  GPIO_Pin Specifies the pins to be toggled.
   * @retval None
   */
 void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
 {
- 8002166:	b580      	push	{r7, lr}
- 8002168:	b084      	sub	sp, #16
- 800216a:	af00      	add	r7, sp, #0
- 800216c:	6078      	str	r0, [r7, #4]
- 800216e:	000a      	movs	r2, r1
- 8002170:	1cbb      	adds	r3, r7, #2
- 8002172:	801a      	strh	r2, [r3, #0]
+ 8001eda:	b580      	push	{r7, lr}
+ 8001edc:	b084      	sub	sp, #16
+ 8001ede:	af00      	add	r7, sp, #0
+ 8001ee0:	6078      	str	r0, [r7, #4]
+ 8001ee2:	000a      	movs	r2, r1
+ 8001ee4:	1cbb      	adds	r3, r7, #2
+ 8001ee6:	801a      	strh	r2, [r3, #0]
 
   /* Check the parameters */
   assert_param(IS_GPIO_PIN_AVAILABLE(GPIOx, GPIO_Pin));
 
   /* get current Output Data Register value */
   odr = GPIOx->ODR;
- 8002174:	687b      	ldr	r3, [r7, #4]
- 8002176:	695b      	ldr	r3, [r3, #20]
- 8002178:	60fb      	str	r3, [r7, #12]
+ 8001ee8:	687b      	ldr	r3, [r7, #4]
+ 8001eea:	695b      	ldr	r3, [r3, #20]
+ 8001eec:	60fb      	str	r3, [r7, #12]
 
   /* Set selected pins that were at low level, and reset ones that were high */
   GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
- 800217a:	1cbb      	adds	r3, r7, #2
- 800217c:	881b      	ldrh	r3, [r3, #0]
- 800217e:	68fa      	ldr	r2, [r7, #12]
- 8002180:	4013      	ands	r3, r2
- 8002182:	041a      	lsls	r2, r3, #16
- 8002184:	68fb      	ldr	r3, [r7, #12]
- 8002186:	43db      	mvns	r3, r3
- 8002188:	1cb9      	adds	r1, r7, #2
- 800218a:	8809      	ldrh	r1, [r1, #0]
- 800218c:	400b      	ands	r3, r1
- 800218e:	431a      	orrs	r2, r3
- 8002190:	687b      	ldr	r3, [r7, #4]
- 8002192:	619a      	str	r2, [r3, #24]
+ 8001eee:	1cbb      	adds	r3, r7, #2
+ 8001ef0:	881b      	ldrh	r3, [r3, #0]
+ 8001ef2:	68fa      	ldr	r2, [r7, #12]
+ 8001ef4:	4013      	ands	r3, r2
+ 8001ef6:	041a      	lsls	r2, r3, #16
+ 8001ef8:	68fb      	ldr	r3, [r7, #12]
+ 8001efa:	43db      	mvns	r3, r3
+ 8001efc:	1cb9      	adds	r1, r7, #2
+ 8001efe:	8809      	ldrh	r1, [r1, #0]
+ 8001f00:	400b      	ands	r3, r1
+ 8001f02:	431a      	orrs	r2, r3
+ 8001f04:	687b      	ldr	r3, [r7, #4]
+ 8001f06:	619a      	str	r2, [r3, #24]
 }
- 8002194:	46c0      	nop			; (mov r8, r8)
- 8002196:	46bd      	mov	sp, r7
- 8002198:	b004      	add	sp, #16
- 800219a:	bd80      	pop	{r7, pc}
+ 8001f08:	46c0      	nop			; (mov r8, r8)
+ 8001f0a:	46bd      	mov	sp, r7
+ 8001f0c:	b004      	add	sp, #16
+ 8001f0e:	bd80      	pop	{r7, pc}
 
-0800219c <HAL_RCC_OscConfig>:
+08001f10 <HAL_RCC_OscConfig>:
   *         supported by this macro. User should request a transition to HSE Off
   *         first and then HSE On or HSE Bypass.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 {
- 800219c:	b5b0      	push	{r4, r5, r7, lr}
- 800219e:	b08a      	sub	sp, #40	; 0x28
- 80021a0:	af00      	add	r7, sp, #0
- 80021a2:	6078      	str	r0, [r7, #4]
+ 8001f10:	b5b0      	push	{r4, r5, r7, lr}
+ 8001f12:	b08a      	sub	sp, #40	; 0x28
+ 8001f14:	af00      	add	r7, sp, #0
+ 8001f16:	6078      	str	r0, [r7, #4]
   uint32_t hsi_state;
   HAL_StatusTypeDef status;
   uint32_t sysclk_source, pll_config;
 
   /* Check Null pointer */
   if(RCC_OscInitStruct == NULL)
- 80021a4:	687b      	ldr	r3, [r7, #4]
- 80021a6:	2b00      	cmp	r3, #0
- 80021a8:	d102      	bne.n	80021b0 <HAL_RCC_OscConfig+0x14>
+ 8001f18:	687b      	ldr	r3, [r7, #4]
+ 8001f1a:	2b00      	cmp	r3, #0
+ 8001f1c:	d102      	bne.n	8001f24 <HAL_RCC_OscConfig+0x14>
   {
     return HAL_ERROR;
- 80021aa:	2301      	movs	r3, #1
- 80021ac:	f000 fb5a 	bl	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 8001f1e:	2301      	movs	r3, #1
+ 8001f20:	f000 fb5a 	bl	80025d8 <HAL_RCC_OscConfig+0x6c8>
   }
 
   /* Check the parameters */
   assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
 
   sysclk_source = __HAL_RCC_GET_SYSCLK_SOURCE();
- 80021b0:	4bce      	ldr	r3, [pc, #824]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80021b2:	68db      	ldr	r3, [r3, #12]
- 80021b4:	220c      	movs	r2, #12
- 80021b6:	4013      	ands	r3, r2
- 80021b8:	623b      	str	r3, [r7, #32]
+ 8001f24:	4bce      	ldr	r3, [pc, #824]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001f26:	68db      	ldr	r3, [r3, #12]
+ 8001f28:	220c      	movs	r2, #12
+ 8001f2a:	4013      	ands	r3, r2
+ 8001f2c:	623b      	str	r3, [r7, #32]
   pll_config = __HAL_RCC_GET_PLL_OSCSOURCE();
- 80021ba:	4bcc      	ldr	r3, [pc, #816]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80021bc:	68da      	ldr	r2, [r3, #12]
- 80021be:	2380      	movs	r3, #128	; 0x80
- 80021c0:	025b      	lsls	r3, r3, #9
- 80021c2:	4013      	ands	r3, r2
- 80021c4:	61fb      	str	r3, [r7, #28]
+ 8001f2e:	4bcc      	ldr	r3, [pc, #816]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001f30:	68da      	ldr	r2, [r3, #12]
+ 8001f32:	2380      	movs	r3, #128	; 0x80
+ 8001f34:	025b      	lsls	r3, r3, #9
+ 8001f36:	4013      	ands	r3, r2
+ 8001f38:	61fb      	str	r3, [r7, #28]
 
   /*------------------------------- HSE Configuration ------------------------*/
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
- 80021c6:	687b      	ldr	r3, [r7, #4]
- 80021c8:	681b      	ldr	r3, [r3, #0]
- 80021ca:	2201      	movs	r2, #1
- 80021cc:	4013      	ands	r3, r2
- 80021ce:	d100      	bne.n	80021d2 <HAL_RCC_OscConfig+0x36>
- 80021d0:	e07c      	b.n	80022cc <HAL_RCC_OscConfig+0x130>
+ 8001f3a:	687b      	ldr	r3, [r7, #4]
+ 8001f3c:	681b      	ldr	r3, [r3, #0]
+ 8001f3e:	2201      	movs	r2, #1
+ 8001f40:	4013      	ands	r3, r2
+ 8001f42:	d100      	bne.n	8001f46 <HAL_RCC_OscConfig+0x36>
+ 8001f44:	e07c      	b.n	8002040 <HAL_RCC_OscConfig+0x130>
   {
     /* Check the parameters */
     assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
 
     /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
     if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSE)
- 80021d2:	6a3b      	ldr	r3, [r7, #32]
- 80021d4:	2b08      	cmp	r3, #8
- 80021d6:	d007      	beq.n	80021e8 <HAL_RCC_OscConfig+0x4c>
+ 8001f46:	6a3b      	ldr	r3, [r7, #32]
+ 8001f48:	2b08      	cmp	r3, #8
+ 8001f4a:	d007      	beq.n	8001f5c <HAL_RCC_OscConfig+0x4c>
        || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSE)))
- 80021d8:	6a3b      	ldr	r3, [r7, #32]
- 80021da:	2b0c      	cmp	r3, #12
- 80021dc:	d111      	bne.n	8002202 <HAL_RCC_OscConfig+0x66>
- 80021de:	69fa      	ldr	r2, [r7, #28]
- 80021e0:	2380      	movs	r3, #128	; 0x80
- 80021e2:	025b      	lsls	r3, r3, #9
- 80021e4:	429a      	cmp	r2, r3
- 80021e6:	d10c      	bne.n	8002202 <HAL_RCC_OscConfig+0x66>
+ 8001f4c:	6a3b      	ldr	r3, [r7, #32]
+ 8001f4e:	2b0c      	cmp	r3, #12
+ 8001f50:	d111      	bne.n	8001f76 <HAL_RCC_OscConfig+0x66>
+ 8001f52:	69fa      	ldr	r2, [r7, #28]
+ 8001f54:	2380      	movs	r3, #128	; 0x80
+ 8001f56:	025b      	lsls	r3, r3, #9
+ 8001f58:	429a      	cmp	r2, r3
+ 8001f5a:	d10c      	bne.n	8001f76 <HAL_RCC_OscConfig+0x66>
     {
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 80021e8:	4bc0      	ldr	r3, [pc, #768]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80021ea:	681a      	ldr	r2, [r3, #0]
- 80021ec:	2380      	movs	r3, #128	; 0x80
- 80021ee:	029b      	lsls	r3, r3, #10
- 80021f0:	4013      	ands	r3, r2
- 80021f2:	d100      	bne.n	80021f6 <HAL_RCC_OscConfig+0x5a>
- 80021f4:	e069      	b.n	80022ca <HAL_RCC_OscConfig+0x12e>
- 80021f6:	687b      	ldr	r3, [r7, #4]
- 80021f8:	685b      	ldr	r3, [r3, #4]
- 80021fa:	2b00      	cmp	r3, #0
- 80021fc:	d165      	bne.n	80022ca <HAL_RCC_OscConfig+0x12e>
+ 8001f5c:	4bc0      	ldr	r3, [pc, #768]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001f5e:	681a      	ldr	r2, [r3, #0]
+ 8001f60:	2380      	movs	r3, #128	; 0x80
+ 8001f62:	029b      	lsls	r3, r3, #10
+ 8001f64:	4013      	ands	r3, r2
+ 8001f66:	d100      	bne.n	8001f6a <HAL_RCC_OscConfig+0x5a>
+ 8001f68:	e069      	b.n	800203e <HAL_RCC_OscConfig+0x12e>
+ 8001f6a:	687b      	ldr	r3, [r7, #4]
+ 8001f6c:	685b      	ldr	r3, [r3, #4]
+ 8001f6e:	2b00      	cmp	r3, #0
+ 8001f70:	d165      	bne.n	800203e <HAL_RCC_OscConfig+0x12e>
       {
         return HAL_ERROR;
- 80021fe:	2301      	movs	r3, #1
- 8002200:	e330      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 8001f72:	2301      	movs	r3, #1
+ 8001f74:	e330      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
       }
     }
     else
     {
       /* Set the new HSE configuration ---------------------------------------*/
       __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
- 8002202:	687b      	ldr	r3, [r7, #4]
- 8002204:	685a      	ldr	r2, [r3, #4]
- 8002206:	2380      	movs	r3, #128	; 0x80
- 8002208:	025b      	lsls	r3, r3, #9
- 800220a:	429a      	cmp	r2, r3
- 800220c:	d107      	bne.n	800221e <HAL_RCC_OscConfig+0x82>
- 800220e:	4bb7      	ldr	r3, [pc, #732]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002210:	681a      	ldr	r2, [r3, #0]
- 8002212:	4bb6      	ldr	r3, [pc, #728]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002214:	2180      	movs	r1, #128	; 0x80
- 8002216:	0249      	lsls	r1, r1, #9
- 8002218:	430a      	orrs	r2, r1
- 800221a:	601a      	str	r2, [r3, #0]
- 800221c:	e027      	b.n	800226e <HAL_RCC_OscConfig+0xd2>
- 800221e:	687b      	ldr	r3, [r7, #4]
- 8002220:	685a      	ldr	r2, [r3, #4]
- 8002222:	23a0      	movs	r3, #160	; 0xa0
- 8002224:	02db      	lsls	r3, r3, #11
- 8002226:	429a      	cmp	r2, r3
- 8002228:	d10e      	bne.n	8002248 <HAL_RCC_OscConfig+0xac>
- 800222a:	4bb0      	ldr	r3, [pc, #704]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800222c:	681a      	ldr	r2, [r3, #0]
- 800222e:	4baf      	ldr	r3, [pc, #700]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002230:	2180      	movs	r1, #128	; 0x80
- 8002232:	02c9      	lsls	r1, r1, #11
- 8002234:	430a      	orrs	r2, r1
- 8002236:	601a      	str	r2, [r3, #0]
- 8002238:	4bac      	ldr	r3, [pc, #688]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800223a:	681a      	ldr	r2, [r3, #0]
- 800223c:	4bab      	ldr	r3, [pc, #684]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800223e:	2180      	movs	r1, #128	; 0x80
- 8002240:	0249      	lsls	r1, r1, #9
- 8002242:	430a      	orrs	r2, r1
- 8002244:	601a      	str	r2, [r3, #0]
- 8002246:	e012      	b.n	800226e <HAL_RCC_OscConfig+0xd2>
- 8002248:	4ba8      	ldr	r3, [pc, #672]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800224a:	681a      	ldr	r2, [r3, #0]
- 800224c:	4ba7      	ldr	r3, [pc, #668]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800224e:	49a8      	ldr	r1, [pc, #672]	; (80024f0 <HAL_RCC_OscConfig+0x354>)
- 8002250:	400a      	ands	r2, r1
- 8002252:	601a      	str	r2, [r3, #0]
- 8002254:	4ba5      	ldr	r3, [pc, #660]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002256:	681a      	ldr	r2, [r3, #0]
- 8002258:	2380      	movs	r3, #128	; 0x80
- 800225a:	025b      	lsls	r3, r3, #9
- 800225c:	4013      	ands	r3, r2
- 800225e:	60fb      	str	r3, [r7, #12]
- 8002260:	68fb      	ldr	r3, [r7, #12]
- 8002262:	4ba2      	ldr	r3, [pc, #648]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002264:	681a      	ldr	r2, [r3, #0]
- 8002266:	4ba1      	ldr	r3, [pc, #644]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002268:	49a2      	ldr	r1, [pc, #648]	; (80024f4 <HAL_RCC_OscConfig+0x358>)
- 800226a:	400a      	ands	r2, r1
- 800226c:	601a      	str	r2, [r3, #0]
+ 8001f76:	687b      	ldr	r3, [r7, #4]
+ 8001f78:	685a      	ldr	r2, [r3, #4]
+ 8001f7a:	2380      	movs	r3, #128	; 0x80
+ 8001f7c:	025b      	lsls	r3, r3, #9
+ 8001f7e:	429a      	cmp	r2, r3
+ 8001f80:	d107      	bne.n	8001f92 <HAL_RCC_OscConfig+0x82>
+ 8001f82:	4bb7      	ldr	r3, [pc, #732]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001f84:	681a      	ldr	r2, [r3, #0]
+ 8001f86:	4bb6      	ldr	r3, [pc, #728]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001f88:	2180      	movs	r1, #128	; 0x80
+ 8001f8a:	0249      	lsls	r1, r1, #9
+ 8001f8c:	430a      	orrs	r2, r1
+ 8001f8e:	601a      	str	r2, [r3, #0]
+ 8001f90:	e027      	b.n	8001fe2 <HAL_RCC_OscConfig+0xd2>
+ 8001f92:	687b      	ldr	r3, [r7, #4]
+ 8001f94:	685a      	ldr	r2, [r3, #4]
+ 8001f96:	23a0      	movs	r3, #160	; 0xa0
+ 8001f98:	02db      	lsls	r3, r3, #11
+ 8001f9a:	429a      	cmp	r2, r3
+ 8001f9c:	d10e      	bne.n	8001fbc <HAL_RCC_OscConfig+0xac>
+ 8001f9e:	4bb0      	ldr	r3, [pc, #704]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001fa0:	681a      	ldr	r2, [r3, #0]
+ 8001fa2:	4baf      	ldr	r3, [pc, #700]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001fa4:	2180      	movs	r1, #128	; 0x80
+ 8001fa6:	02c9      	lsls	r1, r1, #11
+ 8001fa8:	430a      	orrs	r2, r1
+ 8001faa:	601a      	str	r2, [r3, #0]
+ 8001fac:	4bac      	ldr	r3, [pc, #688]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001fae:	681a      	ldr	r2, [r3, #0]
+ 8001fb0:	4bab      	ldr	r3, [pc, #684]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001fb2:	2180      	movs	r1, #128	; 0x80
+ 8001fb4:	0249      	lsls	r1, r1, #9
+ 8001fb6:	430a      	orrs	r2, r1
+ 8001fb8:	601a      	str	r2, [r3, #0]
+ 8001fba:	e012      	b.n	8001fe2 <HAL_RCC_OscConfig+0xd2>
+ 8001fbc:	4ba8      	ldr	r3, [pc, #672]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001fbe:	681a      	ldr	r2, [r3, #0]
+ 8001fc0:	4ba7      	ldr	r3, [pc, #668]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001fc2:	49a8      	ldr	r1, [pc, #672]	; (8002264 <HAL_RCC_OscConfig+0x354>)
+ 8001fc4:	400a      	ands	r2, r1
+ 8001fc6:	601a      	str	r2, [r3, #0]
+ 8001fc8:	4ba5      	ldr	r3, [pc, #660]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001fca:	681a      	ldr	r2, [r3, #0]
+ 8001fcc:	2380      	movs	r3, #128	; 0x80
+ 8001fce:	025b      	lsls	r3, r3, #9
+ 8001fd0:	4013      	ands	r3, r2
+ 8001fd2:	60fb      	str	r3, [r7, #12]
+ 8001fd4:	68fb      	ldr	r3, [r7, #12]
+ 8001fd6:	4ba2      	ldr	r3, [pc, #648]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001fd8:	681a      	ldr	r2, [r3, #0]
+ 8001fda:	4ba1      	ldr	r3, [pc, #644]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8001fdc:	49a2      	ldr	r1, [pc, #648]	; (8002268 <HAL_RCC_OscConfig+0x358>)
+ 8001fde:	400a      	ands	r2, r1
+ 8001fe0:	601a      	str	r2, [r3, #0]
 
       /* Check the HSE State */
       if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
- 800226e:	687b      	ldr	r3, [r7, #4]
- 8002270:	685b      	ldr	r3, [r3, #4]
- 8002272:	2b00      	cmp	r3, #0
- 8002274:	d014      	beq.n	80022a0 <HAL_RCC_OscConfig+0x104>
+ 8001fe2:	687b      	ldr	r3, [r7, #4]
+ 8001fe4:	685b      	ldr	r3, [r3, #4]
+ 8001fe6:	2b00      	cmp	r3, #0
+ 8001fe8:	d014      	beq.n	8002014 <HAL_RCC_OscConfig+0x104>
       {
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002276:	f7ff f90f 	bl	8001498 <HAL_GetTick>
- 800227a:	0003      	movs	r3, r0
- 800227c:	61bb      	str	r3, [r7, #24]
+ 8001fea:	f7ff f997 	bl	800131c <HAL_GetTick>
+ 8001fee:	0003      	movs	r3, r0
+ 8001ff0:	61bb      	str	r3, [r7, #24]
 
         /* Wait till HSE is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
- 800227e:	e008      	b.n	8002292 <HAL_RCC_OscConfig+0xf6>
+ 8001ff2:	e008      	b.n	8002006 <HAL_RCC_OscConfig+0xf6>
         {
           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 8002280:	f7ff f90a 	bl	8001498 <HAL_GetTick>
- 8002284:	0002      	movs	r2, r0
- 8002286:	69bb      	ldr	r3, [r7, #24]
- 8002288:	1ad3      	subs	r3, r2, r3
- 800228a:	2b64      	cmp	r3, #100	; 0x64
- 800228c:	d901      	bls.n	8002292 <HAL_RCC_OscConfig+0xf6>
+ 8001ff4:	f7ff f992 	bl	800131c <HAL_GetTick>
+ 8001ff8:	0002      	movs	r2, r0
+ 8001ffa:	69bb      	ldr	r3, [r7, #24]
+ 8001ffc:	1ad3      	subs	r3, r2, r3
+ 8001ffe:	2b64      	cmp	r3, #100	; 0x64
+ 8002000:	d901      	bls.n	8002006 <HAL_RCC_OscConfig+0xf6>
           {
             return HAL_TIMEOUT;
- 800228e:	2303      	movs	r3, #3
- 8002290:	e2e8      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 8002002:	2303      	movs	r3, #3
+ 8002004:	e2e8      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
- 8002292:	4b96      	ldr	r3, [pc, #600]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002294:	681a      	ldr	r2, [r3, #0]
- 8002296:	2380      	movs	r3, #128	; 0x80
- 8002298:	029b      	lsls	r3, r3, #10
- 800229a:	4013      	ands	r3, r2
- 800229c:	d0f0      	beq.n	8002280 <HAL_RCC_OscConfig+0xe4>
- 800229e:	e015      	b.n	80022cc <HAL_RCC_OscConfig+0x130>
+ 8002006:	4b96      	ldr	r3, [pc, #600]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002008:	681a      	ldr	r2, [r3, #0]
+ 800200a:	2380      	movs	r3, #128	; 0x80
+ 800200c:	029b      	lsls	r3, r3, #10
+ 800200e:	4013      	ands	r3, r2
+ 8002010:	d0f0      	beq.n	8001ff4 <HAL_RCC_OscConfig+0xe4>
+ 8002012:	e015      	b.n	8002040 <HAL_RCC_OscConfig+0x130>
         }
       }
       else
       {
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 80022a0:	f7ff f8fa 	bl	8001498 <HAL_GetTick>
- 80022a4:	0003      	movs	r3, r0
- 80022a6:	61bb      	str	r3, [r7, #24]
+ 8002014:	f7ff f982 	bl	800131c <HAL_GetTick>
+ 8002018:	0003      	movs	r3, r0
+ 800201a:	61bb      	str	r3, [r7, #24]
 
         /* Wait till HSE is disabled */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
- 80022a8:	e008      	b.n	80022bc <HAL_RCC_OscConfig+0x120>
+ 800201c:	e008      	b.n	8002030 <HAL_RCC_OscConfig+0x120>
         {
            if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
- 80022aa:	f7ff f8f5 	bl	8001498 <HAL_GetTick>
- 80022ae:	0002      	movs	r2, r0
- 80022b0:	69bb      	ldr	r3, [r7, #24]
- 80022b2:	1ad3      	subs	r3, r2, r3
- 80022b4:	2b64      	cmp	r3, #100	; 0x64
- 80022b6:	d901      	bls.n	80022bc <HAL_RCC_OscConfig+0x120>
+ 800201e:	f7ff f97d 	bl	800131c <HAL_GetTick>
+ 8002022:	0002      	movs	r2, r0
+ 8002024:	69bb      	ldr	r3, [r7, #24]
+ 8002026:	1ad3      	subs	r3, r2, r3
+ 8002028:	2b64      	cmp	r3, #100	; 0x64
+ 800202a:	d901      	bls.n	8002030 <HAL_RCC_OscConfig+0x120>
           {
             return HAL_TIMEOUT;
- 80022b8:	2303      	movs	r3, #3
- 80022ba:	e2d3      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 800202c:	2303      	movs	r3, #3
+ 800202e:	e2d3      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U)
- 80022bc:	4b8b      	ldr	r3, [pc, #556]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80022be:	681a      	ldr	r2, [r3, #0]
- 80022c0:	2380      	movs	r3, #128	; 0x80
- 80022c2:	029b      	lsls	r3, r3, #10
- 80022c4:	4013      	ands	r3, r2
- 80022c6:	d1f0      	bne.n	80022aa <HAL_RCC_OscConfig+0x10e>
- 80022c8:	e000      	b.n	80022cc <HAL_RCC_OscConfig+0x130>
+ 8002030:	4b8b      	ldr	r3, [pc, #556]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002032:	681a      	ldr	r2, [r3, #0]
+ 8002034:	2380      	movs	r3, #128	; 0x80
+ 8002036:	029b      	lsls	r3, r3, #10
+ 8002038:	4013      	ands	r3, r2
+ 800203a:	d1f0      	bne.n	800201e <HAL_RCC_OscConfig+0x10e>
+ 800203c:	e000      	b.n	8002040 <HAL_RCC_OscConfig+0x130>
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != 0U) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
- 80022ca:	46c0      	nop			; (mov r8, r8)
+ 800203e:	46c0      	nop			; (mov r8, r8)
         }
       }
     }
   }
   /*----------------------------- HSI Configuration --------------------------*/
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
- 80022cc:	687b      	ldr	r3, [r7, #4]
- 80022ce:	681b      	ldr	r3, [r3, #0]
- 80022d0:	2202      	movs	r2, #2
- 80022d2:	4013      	ands	r3, r2
- 80022d4:	d100      	bne.n	80022d8 <HAL_RCC_OscConfig+0x13c>
- 80022d6:	e08b      	b.n	80023f0 <HAL_RCC_OscConfig+0x254>
+ 8002040:	687b      	ldr	r3, [r7, #4]
+ 8002042:	681b      	ldr	r3, [r3, #0]
+ 8002044:	2202      	movs	r2, #2
+ 8002046:	4013      	ands	r3, r2
+ 8002048:	d100      	bne.n	800204c <HAL_RCC_OscConfig+0x13c>
+ 800204a:	e08b      	b.n	8002164 <HAL_RCC_OscConfig+0x254>
   {
     /* Check the parameters */
     assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
     assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
 
     hsi_state = RCC_OscInitStruct->HSIState;
- 80022d8:	687b      	ldr	r3, [r7, #4]
- 80022da:	68db      	ldr	r3, [r3, #12]
- 80022dc:	617b      	str	r3, [r7, #20]
+ 800204c:	687b      	ldr	r3, [r7, #4]
+ 800204e:	68db      	ldr	r3, [r3, #12]
+ 8002050:	617b      	str	r3, [r7, #20]
       hsi_state &= ~RCC_CR_HSIOUTEN;
     }
 #endif
 
     /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
     if((sysclk_source == RCC_SYSCLKSOURCE_STATUS_HSI)
- 80022de:	6a3b      	ldr	r3, [r7, #32]
- 80022e0:	2b04      	cmp	r3, #4
- 80022e2:	d005      	beq.n	80022f0 <HAL_RCC_OscConfig+0x154>
+ 8002052:	6a3b      	ldr	r3, [r7, #32]
+ 8002054:	2b04      	cmp	r3, #4
+ 8002056:	d005      	beq.n	8002064 <HAL_RCC_OscConfig+0x154>
        || ((sysclk_source == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (pll_config == RCC_PLLSOURCE_HSI)))
- 80022e4:	6a3b      	ldr	r3, [r7, #32]
- 80022e6:	2b0c      	cmp	r3, #12
- 80022e8:	d13e      	bne.n	8002368 <HAL_RCC_OscConfig+0x1cc>
- 80022ea:	69fb      	ldr	r3, [r7, #28]
- 80022ec:	2b00      	cmp	r3, #0
- 80022ee:	d13b      	bne.n	8002368 <HAL_RCC_OscConfig+0x1cc>
+ 8002058:	6a3b      	ldr	r3, [r7, #32]
+ 800205a:	2b0c      	cmp	r3, #12
+ 800205c:	d13e      	bne.n	80020dc <HAL_RCC_OscConfig+0x1cc>
+ 800205e:	69fb      	ldr	r3, [r7, #28]
+ 8002060:	2b00      	cmp	r3, #0
+ 8002062:	d13b      	bne.n	80020dc <HAL_RCC_OscConfig+0x1cc>
     {
       /* When HSI is used as system clock it will not disabled */
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U) && (hsi_state == RCC_HSI_OFF))
- 80022f0:	4b7e      	ldr	r3, [pc, #504]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80022f2:	681b      	ldr	r3, [r3, #0]
- 80022f4:	2204      	movs	r2, #4
- 80022f6:	4013      	ands	r3, r2
- 80022f8:	d004      	beq.n	8002304 <HAL_RCC_OscConfig+0x168>
- 80022fa:	697b      	ldr	r3, [r7, #20]
- 80022fc:	2b00      	cmp	r3, #0
- 80022fe:	d101      	bne.n	8002304 <HAL_RCC_OscConfig+0x168>
+ 8002064:	4b7e      	ldr	r3, [pc, #504]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002066:	681b      	ldr	r3, [r3, #0]
+ 8002068:	2204      	movs	r2, #4
+ 800206a:	4013      	ands	r3, r2
+ 800206c:	d004      	beq.n	8002078 <HAL_RCC_OscConfig+0x168>
+ 800206e:	697b      	ldr	r3, [r7, #20]
+ 8002070:	2b00      	cmp	r3, #0
+ 8002072:	d101      	bne.n	8002078 <HAL_RCC_OscConfig+0x168>
       {
         return HAL_ERROR;
- 8002300:	2301      	movs	r3, #1
- 8002302:	e2af      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 8002074:	2301      	movs	r3, #1
+ 8002076:	e2af      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
       }
       /* Otherwise, just the calibration and HSI or HSIdiv4 are allowed */
       else
       {
         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 8002304:	4b79      	ldr	r3, [pc, #484]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002306:	685b      	ldr	r3, [r3, #4]
- 8002308:	4a7b      	ldr	r2, [pc, #492]	; (80024f8 <HAL_RCC_OscConfig+0x35c>)
- 800230a:	4013      	ands	r3, r2
- 800230c:	0019      	movs	r1, r3
- 800230e:	687b      	ldr	r3, [r7, #4]
- 8002310:	691b      	ldr	r3, [r3, #16]
- 8002312:	021a      	lsls	r2, r3, #8
- 8002314:	4b75      	ldr	r3, [pc, #468]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002316:	430a      	orrs	r2, r1
- 8002318:	605a      	str	r2, [r3, #4]
+ 8002078:	4b79      	ldr	r3, [pc, #484]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 800207a:	685b      	ldr	r3, [r3, #4]
+ 800207c:	4a7b      	ldr	r2, [pc, #492]	; (800226c <HAL_RCC_OscConfig+0x35c>)
+ 800207e:	4013      	ands	r3, r2
+ 8002080:	0019      	movs	r1, r3
+ 8002082:	687b      	ldr	r3, [r7, #4]
+ 8002084:	691b      	ldr	r3, [r3, #16]
+ 8002086:	021a      	lsls	r2, r3, #8
+ 8002088:	4b75      	ldr	r3, [pc, #468]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 800208a:	430a      	orrs	r2, r1
+ 800208c:	605a      	str	r2, [r3, #4]
 
         /* Enable the Internal High Speed oscillator (HSI or HSIdiv4) */
         __HAL_RCC_HSI_CONFIG(hsi_state);
- 800231a:	4b74      	ldr	r3, [pc, #464]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800231c:	681b      	ldr	r3, [r3, #0]
- 800231e:	2209      	movs	r2, #9
- 8002320:	4393      	bics	r3, r2
- 8002322:	0019      	movs	r1, r3
- 8002324:	4b71      	ldr	r3, [pc, #452]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002326:	697a      	ldr	r2, [r7, #20]
- 8002328:	430a      	orrs	r2, r1
- 800232a:	601a      	str	r2, [r3, #0]
+ 800208e:	4b74      	ldr	r3, [pc, #464]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002090:	681b      	ldr	r3, [r3, #0]
+ 8002092:	2209      	movs	r2, #9
+ 8002094:	4393      	bics	r3, r2
+ 8002096:	0019      	movs	r1, r3
+ 8002098:	4b71      	ldr	r3, [pc, #452]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 800209a:	697a      	ldr	r2, [r7, #20]
+ 800209c:	430a      	orrs	r2, r1
+ 800209e:	601a      	str	r2, [r3, #0]
       }
 
       /* Update the SystemCoreClock global variable */
       SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
- 800232c:	f000 fc7a 	bl	8002c24 <HAL_RCC_GetSysClockFreq>
- 8002330:	0001      	movs	r1, r0
- 8002332:	4b6e      	ldr	r3, [pc, #440]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002334:	68db      	ldr	r3, [r3, #12]
- 8002336:	091b      	lsrs	r3, r3, #4
- 8002338:	220f      	movs	r2, #15
- 800233a:	4013      	ands	r3, r2
- 800233c:	4a6f      	ldr	r2, [pc, #444]	; (80024fc <HAL_RCC_OscConfig+0x360>)
- 800233e:	5cd3      	ldrb	r3, [r2, r3]
- 8002340:	000a      	movs	r2, r1
- 8002342:	40da      	lsrs	r2, r3
- 8002344:	4b6e      	ldr	r3, [pc, #440]	; (8002500 <HAL_RCC_OscConfig+0x364>)
- 8002346:	601a      	str	r2, [r3, #0]
+ 80020a0:	f000 fc7a 	bl	8002998 <HAL_RCC_GetSysClockFreq>
+ 80020a4:	0001      	movs	r1, r0
+ 80020a6:	4b6e      	ldr	r3, [pc, #440]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 80020a8:	68db      	ldr	r3, [r3, #12]
+ 80020aa:	091b      	lsrs	r3, r3, #4
+ 80020ac:	220f      	movs	r2, #15
+ 80020ae:	4013      	ands	r3, r2
+ 80020b0:	4a6f      	ldr	r2, [pc, #444]	; (8002270 <HAL_RCC_OscConfig+0x360>)
+ 80020b2:	5cd3      	ldrb	r3, [r2, r3]
+ 80020b4:	000a      	movs	r2, r1
+ 80020b6:	40da      	lsrs	r2, r3
+ 80020b8:	4b6e      	ldr	r3, [pc, #440]	; (8002274 <HAL_RCC_OscConfig+0x364>)
+ 80020ba:	601a      	str	r2, [r3, #0]
 
       /* Configure the source of time base considering new system clocks settings*/
       status = HAL_InitTick (uwTickPrio);
- 8002348:	4b6e      	ldr	r3, [pc, #440]	; (8002504 <HAL_RCC_OscConfig+0x368>)
- 800234a:	681b      	ldr	r3, [r3, #0]
- 800234c:	2513      	movs	r5, #19
- 800234e:	197c      	adds	r4, r7, r5
- 8002350:	0018      	movs	r0, r3
- 8002352:	f7ff f85b 	bl	800140c <HAL_InitTick>
- 8002356:	0003      	movs	r3, r0
- 8002358:	7023      	strb	r3, [r4, #0]
+ 80020bc:	4b6e      	ldr	r3, [pc, #440]	; (8002278 <HAL_RCC_OscConfig+0x368>)
+ 80020be:	681b      	ldr	r3, [r3, #0]
+ 80020c0:	2513      	movs	r5, #19
+ 80020c2:	197c      	adds	r4, r7, r5
+ 80020c4:	0018      	movs	r0, r3
+ 80020c6:	f7ff f8e3 	bl	8001290 <HAL_InitTick>
+ 80020ca:	0003      	movs	r3, r0
+ 80020cc:	7023      	strb	r3, [r4, #0]
       if(status != HAL_OK)
- 800235a:	197b      	adds	r3, r7, r5
- 800235c:	781b      	ldrb	r3, [r3, #0]
- 800235e:	2b00      	cmp	r3, #0
- 8002360:	d046      	beq.n	80023f0 <HAL_RCC_OscConfig+0x254>
+ 80020ce:	197b      	adds	r3, r7, r5
+ 80020d0:	781b      	ldrb	r3, [r3, #0]
+ 80020d2:	2b00      	cmp	r3, #0
+ 80020d4:	d046      	beq.n	8002164 <HAL_RCC_OscConfig+0x254>
       {
         return status;
- 8002362:	197b      	adds	r3, r7, r5
- 8002364:	781b      	ldrb	r3, [r3, #0]
- 8002366:	e27d      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 80020d6:	197b      	adds	r3, r7, r5
+ 80020d8:	781b      	ldrb	r3, [r3, #0]
+ 80020da:	e27d      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
       }
     }
     else
     {
       /* Check the HSI State */
       if(hsi_state != RCC_HSI_OFF)
- 8002368:	697b      	ldr	r3, [r7, #20]
- 800236a:	2b00      	cmp	r3, #0
- 800236c:	d027      	beq.n	80023be <HAL_RCC_OscConfig+0x222>
+ 80020dc:	697b      	ldr	r3, [r7, #20]
+ 80020de:	2b00      	cmp	r3, #0
+ 80020e0:	d027      	beq.n	8002132 <HAL_RCC_OscConfig+0x222>
       {
         /* Enable the Internal High Speed oscillator (HSI or HSIdiv4) */
         __HAL_RCC_HSI_CONFIG(hsi_state);
- 800236e:	4b5f      	ldr	r3, [pc, #380]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002370:	681b      	ldr	r3, [r3, #0]
- 8002372:	2209      	movs	r2, #9
- 8002374:	4393      	bics	r3, r2
- 8002376:	0019      	movs	r1, r3
- 8002378:	4b5c      	ldr	r3, [pc, #368]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800237a:	697a      	ldr	r2, [r7, #20]
- 800237c:	430a      	orrs	r2, r1
- 800237e:	601a      	str	r2, [r3, #0]
+ 80020e2:	4b5f      	ldr	r3, [pc, #380]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 80020e4:	681b      	ldr	r3, [r3, #0]
+ 80020e6:	2209      	movs	r2, #9
+ 80020e8:	4393      	bics	r3, r2
+ 80020ea:	0019      	movs	r1, r3
+ 80020ec:	4b5c      	ldr	r3, [pc, #368]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 80020ee:	697a      	ldr	r2, [r7, #20]
+ 80020f0:	430a      	orrs	r2, r1
+ 80020f2:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002380:	f7ff f88a 	bl	8001498 <HAL_GetTick>
- 8002384:	0003      	movs	r3, r0
- 8002386:	61bb      	str	r3, [r7, #24]
+ 80020f4:	f7ff f912 	bl	800131c <HAL_GetTick>
+ 80020f8:	0003      	movs	r3, r0
+ 80020fa:	61bb      	str	r3, [r7, #24]
 
         /* Wait till HSI is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
- 8002388:	e008      	b.n	800239c <HAL_RCC_OscConfig+0x200>
+ 80020fc:	e008      	b.n	8002110 <HAL_RCC_OscConfig+0x200>
         {
           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 800238a:	f7ff f885 	bl	8001498 <HAL_GetTick>
- 800238e:	0002      	movs	r2, r0
- 8002390:	69bb      	ldr	r3, [r7, #24]
- 8002392:	1ad3      	subs	r3, r2, r3
- 8002394:	2b02      	cmp	r3, #2
- 8002396:	d901      	bls.n	800239c <HAL_RCC_OscConfig+0x200>
+ 80020fe:	f7ff f90d 	bl	800131c <HAL_GetTick>
+ 8002102:	0002      	movs	r2, r0
+ 8002104:	69bb      	ldr	r3, [r7, #24]
+ 8002106:	1ad3      	subs	r3, r2, r3
+ 8002108:	2b02      	cmp	r3, #2
+ 800210a:	d901      	bls.n	8002110 <HAL_RCC_OscConfig+0x200>
           {
             return HAL_TIMEOUT;
- 8002398:	2303      	movs	r3, #3
- 800239a:	e263      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 800210c:	2303      	movs	r3, #3
+ 800210e:	e263      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
- 800239c:	4b53      	ldr	r3, [pc, #332]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800239e:	681b      	ldr	r3, [r3, #0]
- 80023a0:	2204      	movs	r2, #4
- 80023a2:	4013      	ands	r3, r2
- 80023a4:	d0f1      	beq.n	800238a <HAL_RCC_OscConfig+0x1ee>
+ 8002110:	4b53      	ldr	r3, [pc, #332]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002112:	681b      	ldr	r3, [r3, #0]
+ 8002114:	2204      	movs	r2, #4
+ 8002116:	4013      	ands	r3, r2
+ 8002118:	d0f1      	beq.n	80020fe <HAL_RCC_OscConfig+0x1ee>
           }
         }
 
         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
- 80023a6:	4b51      	ldr	r3, [pc, #324]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80023a8:	685b      	ldr	r3, [r3, #4]
- 80023aa:	4a53      	ldr	r2, [pc, #332]	; (80024f8 <HAL_RCC_OscConfig+0x35c>)
- 80023ac:	4013      	ands	r3, r2
- 80023ae:	0019      	movs	r1, r3
- 80023b0:	687b      	ldr	r3, [r7, #4]
- 80023b2:	691b      	ldr	r3, [r3, #16]
- 80023b4:	021a      	lsls	r2, r3, #8
- 80023b6:	4b4d      	ldr	r3, [pc, #308]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80023b8:	430a      	orrs	r2, r1
- 80023ba:	605a      	str	r2, [r3, #4]
- 80023bc:	e018      	b.n	80023f0 <HAL_RCC_OscConfig+0x254>
+ 800211a:	4b51      	ldr	r3, [pc, #324]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 800211c:	685b      	ldr	r3, [r3, #4]
+ 800211e:	4a53      	ldr	r2, [pc, #332]	; (800226c <HAL_RCC_OscConfig+0x35c>)
+ 8002120:	4013      	ands	r3, r2
+ 8002122:	0019      	movs	r1, r3
+ 8002124:	687b      	ldr	r3, [r7, #4]
+ 8002126:	691b      	ldr	r3, [r3, #16]
+ 8002128:	021a      	lsls	r2, r3, #8
+ 800212a:	4b4d      	ldr	r3, [pc, #308]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 800212c:	430a      	orrs	r2, r1
+ 800212e:	605a      	str	r2, [r3, #4]
+ 8002130:	e018      	b.n	8002164 <HAL_RCC_OscConfig+0x254>
       }
       else
       {
         /* Disable the Internal High Speed oscillator (HSI). */
         __HAL_RCC_HSI_DISABLE();
- 80023be:	4b4b      	ldr	r3, [pc, #300]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80023c0:	681a      	ldr	r2, [r3, #0]
- 80023c2:	4b4a      	ldr	r3, [pc, #296]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80023c4:	2101      	movs	r1, #1
- 80023c6:	438a      	bics	r2, r1
- 80023c8:	601a      	str	r2, [r3, #0]
+ 8002132:	4b4b      	ldr	r3, [pc, #300]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002134:	681a      	ldr	r2, [r3, #0]
+ 8002136:	4b4a      	ldr	r3, [pc, #296]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002138:	2101      	movs	r1, #1
+ 800213a:	438a      	bics	r2, r1
+ 800213c:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 80023ca:	f7ff f865 	bl	8001498 <HAL_GetTick>
- 80023ce:	0003      	movs	r3, r0
- 80023d0:	61bb      	str	r3, [r7, #24]
+ 800213e:	f7ff f8ed 	bl	800131c <HAL_GetTick>
+ 8002142:	0003      	movs	r3, r0
+ 8002144:	61bb      	str	r3, [r7, #24]
 
         /* Wait till HSI is disabled */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
- 80023d2:	e008      	b.n	80023e6 <HAL_RCC_OscConfig+0x24a>
+ 8002146:	e008      	b.n	800215a <HAL_RCC_OscConfig+0x24a>
         {
           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
- 80023d4:	f7ff f860 	bl	8001498 <HAL_GetTick>
- 80023d8:	0002      	movs	r2, r0
- 80023da:	69bb      	ldr	r3, [r7, #24]
- 80023dc:	1ad3      	subs	r3, r2, r3
- 80023de:	2b02      	cmp	r3, #2
- 80023e0:	d901      	bls.n	80023e6 <HAL_RCC_OscConfig+0x24a>
+ 8002148:	f7ff f8e8 	bl	800131c <HAL_GetTick>
+ 800214c:	0002      	movs	r2, r0
+ 800214e:	69bb      	ldr	r3, [r7, #24]
+ 8002150:	1ad3      	subs	r3, r2, r3
+ 8002152:	2b02      	cmp	r3, #2
+ 8002154:	d901      	bls.n	800215a <HAL_RCC_OscConfig+0x24a>
           {
             return HAL_TIMEOUT;
- 80023e2:	2303      	movs	r3, #3
- 80023e4:	e23e      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 8002156:	2303      	movs	r3, #3
+ 8002158:	e23e      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != 0U)
- 80023e6:	4b41      	ldr	r3, [pc, #260]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80023e8:	681b      	ldr	r3, [r3, #0]
- 80023ea:	2204      	movs	r2, #4
- 80023ec:	4013      	ands	r3, r2
- 80023ee:	d1f1      	bne.n	80023d4 <HAL_RCC_OscConfig+0x238>
+ 800215a:	4b41      	ldr	r3, [pc, #260]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 800215c:	681b      	ldr	r3, [r3, #0]
+ 800215e:	2204      	movs	r2, #4
+ 8002160:	4013      	ands	r3, r2
+ 8002162:	d1f1      	bne.n	8002148 <HAL_RCC_OscConfig+0x238>
         }
       }
     }
   }
   /*----------------------------- MSI Configuration --------------------------*/
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_MSI) == RCC_OSCILLATORTYPE_MSI)
- 80023f0:	687b      	ldr	r3, [r7, #4]
- 80023f2:	681b      	ldr	r3, [r3, #0]
- 80023f4:	2210      	movs	r2, #16
- 80023f6:	4013      	ands	r3, r2
- 80023f8:	d100      	bne.n	80023fc <HAL_RCC_OscConfig+0x260>
- 80023fa:	e0a1      	b.n	8002540 <HAL_RCC_OscConfig+0x3a4>
+ 8002164:	687b      	ldr	r3, [r7, #4]
+ 8002166:	681b      	ldr	r3, [r3, #0]
+ 8002168:	2210      	movs	r2, #16
+ 800216a:	4013      	ands	r3, r2
+ 800216c:	d100      	bne.n	8002170 <HAL_RCC_OscConfig+0x260>
+ 800216e:	e0a1      	b.n	80022b4 <HAL_RCC_OscConfig+0x3a4>
   {
     /* When the MSI is used as system clock it will not be disabled */
     if(sysclk_source == RCC_CFGR_SWS_MSI)
- 80023fc:	6a3b      	ldr	r3, [r7, #32]
- 80023fe:	2b00      	cmp	r3, #0
- 8002400:	d140      	bne.n	8002484 <HAL_RCC_OscConfig+0x2e8>
+ 8002170:	6a3b      	ldr	r3, [r7, #32]
+ 8002172:	2b00      	cmp	r3, #0
+ 8002174:	d140      	bne.n	80021f8 <HAL_RCC_OscConfig+0x2e8>
     {
       if((__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U) && (RCC_OscInitStruct->MSIState == RCC_MSI_OFF))
- 8002402:	4b3a      	ldr	r3, [pc, #232]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002404:	681a      	ldr	r2, [r3, #0]
- 8002406:	2380      	movs	r3, #128	; 0x80
- 8002408:	009b      	lsls	r3, r3, #2
- 800240a:	4013      	ands	r3, r2
- 800240c:	d005      	beq.n	800241a <HAL_RCC_OscConfig+0x27e>
- 800240e:	687b      	ldr	r3, [r7, #4]
- 8002410:	699b      	ldr	r3, [r3, #24]
- 8002412:	2b00      	cmp	r3, #0
- 8002414:	d101      	bne.n	800241a <HAL_RCC_OscConfig+0x27e>
+ 8002176:	4b3a      	ldr	r3, [pc, #232]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002178:	681a      	ldr	r2, [r3, #0]
+ 800217a:	2380      	movs	r3, #128	; 0x80
+ 800217c:	009b      	lsls	r3, r3, #2
+ 800217e:	4013      	ands	r3, r2
+ 8002180:	d005      	beq.n	800218e <HAL_RCC_OscConfig+0x27e>
+ 8002182:	687b      	ldr	r3, [r7, #4]
+ 8002184:	699b      	ldr	r3, [r3, #24]
+ 8002186:	2b00      	cmp	r3, #0
+ 8002188:	d101      	bne.n	800218e <HAL_RCC_OscConfig+0x27e>
       {
         return HAL_ERROR;
- 8002416:	2301      	movs	r3, #1
- 8002418:	e224      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 800218a:	2301      	movs	r3, #1
+ 800218c:	e224      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
         /* Check MSICalibrationValue and MSIClockRange input parameters */
         assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue));
         assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange));
 
         /* Selects the Multiple Speed oscillator (MSI) clock range .*/
         __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
- 800241a:	4b34      	ldr	r3, [pc, #208]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800241c:	685b      	ldr	r3, [r3, #4]
- 800241e:	4a3a      	ldr	r2, [pc, #232]	; (8002508 <HAL_RCC_OscConfig+0x36c>)
- 8002420:	4013      	ands	r3, r2
- 8002422:	0019      	movs	r1, r3
- 8002424:	687b      	ldr	r3, [r7, #4]
- 8002426:	6a1a      	ldr	r2, [r3, #32]
- 8002428:	4b30      	ldr	r3, [pc, #192]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800242a:	430a      	orrs	r2, r1
- 800242c:	605a      	str	r2, [r3, #4]
+ 800218e:	4b34      	ldr	r3, [pc, #208]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002190:	685b      	ldr	r3, [r3, #4]
+ 8002192:	4a3a      	ldr	r2, [pc, #232]	; (800227c <HAL_RCC_OscConfig+0x36c>)
+ 8002194:	4013      	ands	r3, r2
+ 8002196:	0019      	movs	r1, r3
+ 8002198:	687b      	ldr	r3, [r7, #4]
+ 800219a:	6a1a      	ldr	r2, [r3, #32]
+ 800219c:	4b30      	ldr	r3, [pc, #192]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 800219e:	430a      	orrs	r2, r1
+ 80021a0:	605a      	str	r2, [r3, #4]
         /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
         __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
- 800242e:	4b2f      	ldr	r3, [pc, #188]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002430:	685b      	ldr	r3, [r3, #4]
- 8002432:	021b      	lsls	r3, r3, #8
- 8002434:	0a19      	lsrs	r1, r3, #8
- 8002436:	687b      	ldr	r3, [r7, #4]
- 8002438:	69db      	ldr	r3, [r3, #28]
- 800243a:	061a      	lsls	r2, r3, #24
- 800243c:	4b2b      	ldr	r3, [pc, #172]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800243e:	430a      	orrs	r2, r1
- 8002440:	605a      	str	r2, [r3, #4]
+ 80021a2:	4b2f      	ldr	r3, [pc, #188]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 80021a4:	685b      	ldr	r3, [r3, #4]
+ 80021a6:	021b      	lsls	r3, r3, #8
+ 80021a8:	0a19      	lsrs	r1, r3, #8
+ 80021aa:	687b      	ldr	r3, [r7, #4]
+ 80021ac:	69db      	ldr	r3, [r3, #28]
+ 80021ae:	061a      	lsls	r2, r3, #24
+ 80021b0:	4b2b      	ldr	r3, [pc, #172]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 80021b2:	430a      	orrs	r2, r1
+ 80021b4:	605a      	str	r2, [r3, #4]
 
 
         /* Update the SystemCoreClock global variable */
         SystemCoreClock =  (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U)))
- 8002442:	687b      	ldr	r3, [r7, #4]
- 8002444:	6a1b      	ldr	r3, [r3, #32]
- 8002446:	0b5b      	lsrs	r3, r3, #13
- 8002448:	3301      	adds	r3, #1
- 800244a:	2280      	movs	r2, #128	; 0x80
- 800244c:	0212      	lsls	r2, r2, #8
- 800244e:	409a      	lsls	r2, r3
+ 80021b6:	687b      	ldr	r3, [r7, #4]
+ 80021b8:	6a1b      	ldr	r3, [r3, #32]
+ 80021ba:	0b5b      	lsrs	r3, r3, #13
+ 80021bc:	3301      	adds	r3, #1
+ 80021be:	2280      	movs	r2, #128	; 0x80
+ 80021c0:	0212      	lsls	r2, r2, #8
+ 80021c2:	409a      	lsls	r2, r3
                            >> AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos)];
- 8002450:	4b26      	ldr	r3, [pc, #152]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002452:	68db      	ldr	r3, [r3, #12]
- 8002454:	091b      	lsrs	r3, r3, #4
- 8002456:	210f      	movs	r1, #15
- 8002458:	400b      	ands	r3, r1
- 800245a:	4928      	ldr	r1, [pc, #160]	; (80024fc <HAL_RCC_OscConfig+0x360>)
- 800245c:	5ccb      	ldrb	r3, [r1, r3]
- 800245e:	40da      	lsrs	r2, r3
+ 80021c4:	4b26      	ldr	r3, [pc, #152]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 80021c6:	68db      	ldr	r3, [r3, #12]
+ 80021c8:	091b      	lsrs	r3, r3, #4
+ 80021ca:	210f      	movs	r1, #15
+ 80021cc:	400b      	ands	r3, r1
+ 80021ce:	4928      	ldr	r1, [pc, #160]	; (8002270 <HAL_RCC_OscConfig+0x360>)
+ 80021d0:	5ccb      	ldrb	r3, [r1, r3]
+ 80021d2:	40da      	lsrs	r2, r3
         SystemCoreClock =  (32768U * (1UL << ((RCC_OscInitStruct->MSIClockRange >> RCC_ICSCR_MSIRANGE_Pos) + 1U)))
- 8002460:	4b27      	ldr	r3, [pc, #156]	; (8002500 <HAL_RCC_OscConfig+0x364>)
- 8002462:	601a      	str	r2, [r3, #0]
+ 80021d4:	4b27      	ldr	r3, [pc, #156]	; (8002274 <HAL_RCC_OscConfig+0x364>)
+ 80021d6:	601a      	str	r2, [r3, #0]
 
         /* Configure the source of time base considering new system clocks settings*/
         status = HAL_InitTick (uwTickPrio);
- 8002464:	4b27      	ldr	r3, [pc, #156]	; (8002504 <HAL_RCC_OscConfig+0x368>)
- 8002466:	681b      	ldr	r3, [r3, #0]
- 8002468:	2513      	movs	r5, #19
- 800246a:	197c      	adds	r4, r7, r5
- 800246c:	0018      	movs	r0, r3
- 800246e:	f7fe ffcd 	bl	800140c <HAL_InitTick>
- 8002472:	0003      	movs	r3, r0
- 8002474:	7023      	strb	r3, [r4, #0]
+ 80021d8:	4b27      	ldr	r3, [pc, #156]	; (8002278 <HAL_RCC_OscConfig+0x368>)
+ 80021da:	681b      	ldr	r3, [r3, #0]
+ 80021dc:	2513      	movs	r5, #19
+ 80021de:	197c      	adds	r4, r7, r5
+ 80021e0:	0018      	movs	r0, r3
+ 80021e2:	f7ff f855 	bl	8001290 <HAL_InitTick>
+ 80021e6:	0003      	movs	r3, r0
+ 80021e8:	7023      	strb	r3, [r4, #0]
         if(status != HAL_OK)
- 8002476:	197b      	adds	r3, r7, r5
- 8002478:	781b      	ldrb	r3, [r3, #0]
- 800247a:	2b00      	cmp	r3, #0
- 800247c:	d060      	beq.n	8002540 <HAL_RCC_OscConfig+0x3a4>
+ 80021ea:	197b      	adds	r3, r7, r5
+ 80021ec:	781b      	ldrb	r3, [r3, #0]
+ 80021ee:	2b00      	cmp	r3, #0
+ 80021f0:	d060      	beq.n	80022b4 <HAL_RCC_OscConfig+0x3a4>
         {
           return status;
- 800247e:	197b      	adds	r3, r7, r5
- 8002480:	781b      	ldrb	r3, [r3, #0]
- 8002482:	e1ef      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 80021f2:	197b      	adds	r3, r7, r5
+ 80021f4:	781b      	ldrb	r3, [r3, #0]
+ 80021f6:	e1ef      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
     {
       /* Check MSI State */
       assert_param(IS_RCC_MSI(RCC_OscInitStruct->MSIState));
 
       /* Check the MSI State */
       if(RCC_OscInitStruct->MSIState != RCC_MSI_OFF)
- 8002484:	687b      	ldr	r3, [r7, #4]
- 8002486:	699b      	ldr	r3, [r3, #24]
- 8002488:	2b00      	cmp	r3, #0
- 800248a:	d03f      	beq.n	800250c <HAL_RCC_OscConfig+0x370>
+ 80021f8:	687b      	ldr	r3, [r7, #4]
+ 80021fa:	699b      	ldr	r3, [r3, #24]
+ 80021fc:	2b00      	cmp	r3, #0
+ 80021fe:	d03f      	beq.n	8002280 <HAL_RCC_OscConfig+0x370>
       {
         /* Enable the Multi Speed oscillator (MSI). */
         __HAL_RCC_MSI_ENABLE();
- 800248c:	4b17      	ldr	r3, [pc, #92]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 800248e:	681a      	ldr	r2, [r3, #0]
- 8002490:	4b16      	ldr	r3, [pc, #88]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 8002492:	2180      	movs	r1, #128	; 0x80
- 8002494:	0049      	lsls	r1, r1, #1
- 8002496:	430a      	orrs	r2, r1
- 8002498:	601a      	str	r2, [r3, #0]
+ 8002200:	4b17      	ldr	r3, [pc, #92]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002202:	681a      	ldr	r2, [r3, #0]
+ 8002204:	4b16      	ldr	r3, [pc, #88]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002206:	2180      	movs	r1, #128	; 0x80
+ 8002208:	0049      	lsls	r1, r1, #1
+ 800220a:	430a      	orrs	r2, r1
+ 800220c:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 800249a:	f7fe fffd 	bl	8001498 <HAL_GetTick>
- 800249e:	0003      	movs	r3, r0
- 80024a0:	61bb      	str	r3, [r7, #24]
+ 800220e:	f7ff f885 	bl	800131c <HAL_GetTick>
+ 8002212:	0003      	movs	r3, r0
+ 8002214:	61bb      	str	r3, [r7, #24]
 
         /* Wait till MSI is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
- 80024a2:	e008      	b.n	80024b6 <HAL_RCC_OscConfig+0x31a>
+ 8002216:	e008      	b.n	800222a <HAL_RCC_OscConfig+0x31a>
         {
           if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
- 80024a4:	f7fe fff8 	bl	8001498 <HAL_GetTick>
- 80024a8:	0002      	movs	r2, r0
- 80024aa:	69bb      	ldr	r3, [r7, #24]
- 80024ac:	1ad3      	subs	r3, r2, r3
- 80024ae:	2b02      	cmp	r3, #2
- 80024b0:	d901      	bls.n	80024b6 <HAL_RCC_OscConfig+0x31a>
+ 8002218:	f7ff f880 	bl	800131c <HAL_GetTick>
+ 800221c:	0002      	movs	r2, r0
+ 800221e:	69bb      	ldr	r3, [r7, #24]
+ 8002220:	1ad3      	subs	r3, r2, r3
+ 8002222:	2b02      	cmp	r3, #2
+ 8002224:	d901      	bls.n	800222a <HAL_RCC_OscConfig+0x31a>
           {
             return HAL_TIMEOUT;
- 80024b2:	2303      	movs	r3, #3
- 80024b4:	e1d6      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 8002226:	2303      	movs	r3, #3
+ 8002228:	e1d6      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
- 80024b6:	4b0d      	ldr	r3, [pc, #52]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80024b8:	681a      	ldr	r2, [r3, #0]
- 80024ba:	2380      	movs	r3, #128	; 0x80
- 80024bc:	009b      	lsls	r3, r3, #2
- 80024be:	4013      	ands	r3, r2
- 80024c0:	d0f0      	beq.n	80024a4 <HAL_RCC_OscConfig+0x308>
+ 800222a:	4b0d      	ldr	r3, [pc, #52]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 800222c:	681a      	ldr	r2, [r3, #0]
+ 800222e:	2380      	movs	r3, #128	; 0x80
+ 8002230:	009b      	lsls	r3, r3, #2
+ 8002232:	4013      	ands	r3, r2
+ 8002234:	d0f0      	beq.n	8002218 <HAL_RCC_OscConfig+0x308>
         /* Check MSICalibrationValue and MSIClockRange input parameters */
         assert_param(IS_RCC_MSICALIBRATION_VALUE(RCC_OscInitStruct->MSICalibrationValue));
         assert_param(IS_RCC_MSI_CLOCK_RANGE(RCC_OscInitStruct->MSIClockRange));
 
         /* Selects the Multiple Speed oscillator (MSI) clock range .*/
         __HAL_RCC_MSI_RANGE_CONFIG(RCC_OscInitStruct->MSIClockRange);
- 80024c2:	4b0a      	ldr	r3, [pc, #40]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80024c4:	685b      	ldr	r3, [r3, #4]
- 80024c6:	4a10      	ldr	r2, [pc, #64]	; (8002508 <HAL_RCC_OscConfig+0x36c>)
- 80024c8:	4013      	ands	r3, r2
- 80024ca:	0019      	movs	r1, r3
- 80024cc:	687b      	ldr	r3, [r7, #4]
- 80024ce:	6a1a      	ldr	r2, [r3, #32]
- 80024d0:	4b06      	ldr	r3, [pc, #24]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80024d2:	430a      	orrs	r2, r1
- 80024d4:	605a      	str	r2, [r3, #4]
+ 8002236:	4b0a      	ldr	r3, [pc, #40]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002238:	685b      	ldr	r3, [r3, #4]
+ 800223a:	4a10      	ldr	r2, [pc, #64]	; (800227c <HAL_RCC_OscConfig+0x36c>)
+ 800223c:	4013      	ands	r3, r2
+ 800223e:	0019      	movs	r1, r3
+ 8002240:	687b      	ldr	r3, [r7, #4]
+ 8002242:	6a1a      	ldr	r2, [r3, #32]
+ 8002244:	4b06      	ldr	r3, [pc, #24]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 8002246:	430a      	orrs	r2, r1
+ 8002248:	605a      	str	r2, [r3, #4]
          /* Adjusts the Multiple Speed oscillator (MSI) calibration value.*/
         __HAL_RCC_MSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->MSICalibrationValue);
- 80024d6:	4b05      	ldr	r3, [pc, #20]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80024d8:	685b      	ldr	r3, [r3, #4]
- 80024da:	021b      	lsls	r3, r3, #8
- 80024dc:	0a19      	lsrs	r1, r3, #8
- 80024de:	687b      	ldr	r3, [r7, #4]
- 80024e0:	69db      	ldr	r3, [r3, #28]
- 80024e2:	061a      	lsls	r2, r3, #24
- 80024e4:	4b01      	ldr	r3, [pc, #4]	; (80024ec <HAL_RCC_OscConfig+0x350>)
- 80024e6:	430a      	orrs	r2, r1
- 80024e8:	605a      	str	r2, [r3, #4]
- 80024ea:	e029      	b.n	8002540 <HAL_RCC_OscConfig+0x3a4>
- 80024ec:	40021000 	.word	0x40021000
- 80024f0:	fffeffff 	.word	0xfffeffff
- 80024f4:	fffbffff 	.word	0xfffbffff
- 80024f8:	ffffe0ff 	.word	0xffffe0ff
- 80024fc:	080059d8 	.word	0x080059d8
- 8002500:	20000000 	.word	0x20000000
- 8002504:	20000004 	.word	0x20000004
- 8002508:	ffff1fff 	.word	0xffff1fff
+ 800224a:	4b05      	ldr	r3, [pc, #20]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 800224c:	685b      	ldr	r3, [r3, #4]
+ 800224e:	021b      	lsls	r3, r3, #8
+ 8002250:	0a19      	lsrs	r1, r3, #8
+ 8002252:	687b      	ldr	r3, [r7, #4]
+ 8002254:	69db      	ldr	r3, [r3, #28]
+ 8002256:	061a      	lsls	r2, r3, #24
+ 8002258:	4b01      	ldr	r3, [pc, #4]	; (8002260 <HAL_RCC_OscConfig+0x350>)
+ 800225a:	430a      	orrs	r2, r1
+ 800225c:	605a      	str	r2, [r3, #4]
+ 800225e:	e029      	b.n	80022b4 <HAL_RCC_OscConfig+0x3a4>
+ 8002260:	40021000 	.word	0x40021000
+ 8002264:	fffeffff 	.word	0xfffeffff
+ 8002268:	fffbffff 	.word	0xfffbffff
+ 800226c:	ffffe0ff 	.word	0xffffe0ff
+ 8002270:	08004cb0 	.word	0x08004cb0
+ 8002274:	20000000 	.word	0x20000000
+ 8002278:	20000004 	.word	0x20000004
+ 800227c:	ffff1fff 	.word	0xffff1fff
       }
       else
       {
         /* Disable the Multi Speed oscillator (MSI). */
         __HAL_RCC_MSI_DISABLE();
- 800250c:	4bbe      	ldr	r3, [pc, #760]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 800250e:	681a      	ldr	r2, [r3, #0]
- 8002510:	4bbd      	ldr	r3, [pc, #756]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002512:	49be      	ldr	r1, [pc, #760]	; (800280c <HAL_RCC_OscConfig+0x670>)
- 8002514:	400a      	ands	r2, r1
- 8002516:	601a      	str	r2, [r3, #0]
+ 8002280:	4bbe      	ldr	r3, [pc, #760]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002282:	681a      	ldr	r2, [r3, #0]
+ 8002284:	4bbd      	ldr	r3, [pc, #756]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002286:	49be      	ldr	r1, [pc, #760]	; (8002580 <HAL_RCC_OscConfig+0x670>)
+ 8002288:	400a      	ands	r2, r1
+ 800228a:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002518:	f7fe ffbe 	bl	8001498 <HAL_GetTick>
- 800251c:	0003      	movs	r3, r0
- 800251e:	61bb      	str	r3, [r7, #24]
+ 800228c:	f7ff f846 	bl	800131c <HAL_GetTick>
+ 8002290:	0003      	movs	r3, r0
+ 8002292:	61bb      	str	r3, [r7, #24]
 
         /* Wait till MSI is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U)
- 8002520:	e008      	b.n	8002534 <HAL_RCC_OscConfig+0x398>
+ 8002294:	e008      	b.n	80022a8 <HAL_RCC_OscConfig+0x398>
         {
           if((HAL_GetTick() - tickstart) > MSI_TIMEOUT_VALUE)
- 8002522:	f7fe ffb9 	bl	8001498 <HAL_GetTick>
- 8002526:	0002      	movs	r2, r0
- 8002528:	69bb      	ldr	r3, [r7, #24]
- 800252a:	1ad3      	subs	r3, r2, r3
- 800252c:	2b02      	cmp	r3, #2
- 800252e:	d901      	bls.n	8002534 <HAL_RCC_OscConfig+0x398>
+ 8002296:	f7ff f841 	bl	800131c <HAL_GetTick>
+ 800229a:	0002      	movs	r2, r0
+ 800229c:	69bb      	ldr	r3, [r7, #24]
+ 800229e:	1ad3      	subs	r3, r2, r3
+ 80022a0:	2b02      	cmp	r3, #2
+ 80022a2:	d901      	bls.n	80022a8 <HAL_RCC_OscConfig+0x398>
           {
             return HAL_TIMEOUT;
- 8002530:	2303      	movs	r3, #3
- 8002532:	e197      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 80022a4:	2303      	movs	r3, #3
+ 80022a6:	e197      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) != 0U)
- 8002534:	4bb4      	ldr	r3, [pc, #720]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002536:	681a      	ldr	r2, [r3, #0]
- 8002538:	2380      	movs	r3, #128	; 0x80
- 800253a:	009b      	lsls	r3, r3, #2
- 800253c:	4013      	ands	r3, r2
- 800253e:	d1f0      	bne.n	8002522 <HAL_RCC_OscConfig+0x386>
+ 80022a8:	4bb4      	ldr	r3, [pc, #720]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80022aa:	681a      	ldr	r2, [r3, #0]
+ 80022ac:	2380      	movs	r3, #128	; 0x80
+ 80022ae:	009b      	lsls	r3, r3, #2
+ 80022b0:	4013      	ands	r3, r2
+ 80022b2:	d1f0      	bne.n	8002296 <HAL_RCC_OscConfig+0x386>
         }
       }
     }
   }
   /*------------------------------ LSI Configuration -------------------------*/
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
- 8002540:	687b      	ldr	r3, [r7, #4]
- 8002542:	681b      	ldr	r3, [r3, #0]
- 8002544:	2208      	movs	r2, #8
- 8002546:	4013      	ands	r3, r2
- 8002548:	d036      	beq.n	80025b8 <HAL_RCC_OscConfig+0x41c>
+ 80022b4:	687b      	ldr	r3, [r7, #4]
+ 80022b6:	681b      	ldr	r3, [r3, #0]
+ 80022b8:	2208      	movs	r2, #8
+ 80022ba:	4013      	ands	r3, r2
+ 80022bc:	d036      	beq.n	800232c <HAL_RCC_OscConfig+0x41c>
   {
     /* Check the parameters */
     assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
 
     /* Check the LSI State */
     if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
- 800254a:	687b      	ldr	r3, [r7, #4]
- 800254c:	695b      	ldr	r3, [r3, #20]
- 800254e:	2b00      	cmp	r3, #0
- 8002550:	d019      	beq.n	8002586 <HAL_RCC_OscConfig+0x3ea>
+ 80022be:	687b      	ldr	r3, [r7, #4]
+ 80022c0:	695b      	ldr	r3, [r3, #20]
+ 80022c2:	2b00      	cmp	r3, #0
+ 80022c4:	d019      	beq.n	80022fa <HAL_RCC_OscConfig+0x3ea>
     {
       /* Enable the Internal Low Speed oscillator (LSI). */
       __HAL_RCC_LSI_ENABLE();
- 8002552:	4bad      	ldr	r3, [pc, #692]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002554:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 8002556:	4bac      	ldr	r3, [pc, #688]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002558:	2101      	movs	r1, #1
- 800255a:	430a      	orrs	r2, r1
- 800255c:	651a      	str	r2, [r3, #80]	; 0x50
+ 80022c6:	4bad      	ldr	r3, [pc, #692]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80022c8:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 80022ca:	4bac      	ldr	r3, [pc, #688]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80022cc:	2101      	movs	r1, #1
+ 80022ce:	430a      	orrs	r2, r1
+ 80022d0:	651a      	str	r2, [r3, #80]	; 0x50
 
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 800255e:	f7fe ff9b 	bl	8001498 <HAL_GetTick>
- 8002562:	0003      	movs	r3, r0
- 8002564:	61bb      	str	r3, [r7, #24]
+ 80022d2:	f7ff f823 	bl	800131c <HAL_GetTick>
+ 80022d6:	0003      	movs	r3, r0
+ 80022d8:	61bb      	str	r3, [r7, #24]
 
       /* Wait till LSI is ready */
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
- 8002566:	e008      	b.n	800257a <HAL_RCC_OscConfig+0x3de>
+ 80022da:	e008      	b.n	80022ee <HAL_RCC_OscConfig+0x3de>
       {
         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 8002568:	f7fe ff96 	bl	8001498 <HAL_GetTick>
- 800256c:	0002      	movs	r2, r0
- 800256e:	69bb      	ldr	r3, [r7, #24]
- 8002570:	1ad3      	subs	r3, r2, r3
- 8002572:	2b02      	cmp	r3, #2
- 8002574:	d901      	bls.n	800257a <HAL_RCC_OscConfig+0x3de>
+ 80022dc:	f7ff f81e 	bl	800131c <HAL_GetTick>
+ 80022e0:	0002      	movs	r2, r0
+ 80022e2:	69bb      	ldr	r3, [r7, #24]
+ 80022e4:	1ad3      	subs	r3, r2, r3
+ 80022e6:	2b02      	cmp	r3, #2
+ 80022e8:	d901      	bls.n	80022ee <HAL_RCC_OscConfig+0x3de>
         {
           return HAL_TIMEOUT;
- 8002576:	2303      	movs	r3, #3
- 8002578:	e174      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 80022ea:	2303      	movs	r3, #3
+ 80022ec:	e174      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == 0U)
- 800257a:	4ba3      	ldr	r3, [pc, #652]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 800257c:	6d1b      	ldr	r3, [r3, #80]	; 0x50
- 800257e:	2202      	movs	r2, #2
- 8002580:	4013      	ands	r3, r2
- 8002582:	d0f1      	beq.n	8002568 <HAL_RCC_OscConfig+0x3cc>
- 8002584:	e018      	b.n	80025b8 <HAL_RCC_OscConfig+0x41c>
+ 80022ee:	4ba3      	ldr	r3, [pc, #652]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80022f0:	6d1b      	ldr	r3, [r3, #80]	; 0x50
+ 80022f2:	2202      	movs	r2, #2
+ 80022f4:	4013      	ands	r3, r2
+ 80022f6:	d0f1      	beq.n	80022dc <HAL_RCC_OscConfig+0x3cc>
+ 80022f8:	e018      	b.n	800232c <HAL_RCC_OscConfig+0x41c>
       }
     }
     else
     {
       /* Disable the Internal Low Speed oscillator (LSI). */
       __HAL_RCC_LSI_DISABLE();
- 8002586:	4ba0      	ldr	r3, [pc, #640]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002588:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 800258a:	4b9f      	ldr	r3, [pc, #636]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 800258c:	2101      	movs	r1, #1
- 800258e:	438a      	bics	r2, r1
- 8002590:	651a      	str	r2, [r3, #80]	; 0x50
+ 80022fa:	4ba0      	ldr	r3, [pc, #640]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80022fc:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 80022fe:	4b9f      	ldr	r3, [pc, #636]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002300:	2101      	movs	r1, #1
+ 8002302:	438a      	bics	r2, r1
+ 8002304:	651a      	str	r2, [r3, #80]	; 0x50
 
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 8002592:	f7fe ff81 	bl	8001498 <HAL_GetTick>
- 8002596:	0003      	movs	r3, r0
- 8002598:	61bb      	str	r3, [r7, #24]
+ 8002306:	f7ff f809 	bl	800131c <HAL_GetTick>
+ 800230a:	0003      	movs	r3, r0
+ 800230c:	61bb      	str	r3, [r7, #24]
 
       /* Wait till LSI is disabled */
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
- 800259a:	e008      	b.n	80025ae <HAL_RCC_OscConfig+0x412>
+ 800230e:	e008      	b.n	8002322 <HAL_RCC_OscConfig+0x412>
       {
         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
- 800259c:	f7fe ff7c 	bl	8001498 <HAL_GetTick>
- 80025a0:	0002      	movs	r2, r0
- 80025a2:	69bb      	ldr	r3, [r7, #24]
- 80025a4:	1ad3      	subs	r3, r2, r3
- 80025a6:	2b02      	cmp	r3, #2
- 80025a8:	d901      	bls.n	80025ae <HAL_RCC_OscConfig+0x412>
+ 8002310:	f7ff f804 	bl	800131c <HAL_GetTick>
+ 8002314:	0002      	movs	r2, r0
+ 8002316:	69bb      	ldr	r3, [r7, #24]
+ 8002318:	1ad3      	subs	r3, r2, r3
+ 800231a:	2b02      	cmp	r3, #2
+ 800231c:	d901      	bls.n	8002322 <HAL_RCC_OscConfig+0x412>
         {
           return HAL_TIMEOUT;
- 80025aa:	2303      	movs	r3, #3
- 80025ac:	e15a      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 800231e:	2303      	movs	r3, #3
+ 8002320:	e15a      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != 0U)
- 80025ae:	4b96      	ldr	r3, [pc, #600]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 80025b0:	6d1b      	ldr	r3, [r3, #80]	; 0x50
- 80025b2:	2202      	movs	r2, #2
- 80025b4:	4013      	ands	r3, r2
- 80025b6:	d1f1      	bne.n	800259c <HAL_RCC_OscConfig+0x400>
+ 8002322:	4b96      	ldr	r3, [pc, #600]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002324:	6d1b      	ldr	r3, [r3, #80]	; 0x50
+ 8002326:	2202      	movs	r2, #2
+ 8002328:	4013      	ands	r3, r2
+ 800232a:	d1f1      	bne.n	8002310 <HAL_RCC_OscConfig+0x400>
         }
       }
     }
   }
   /*------------------------------ LSE Configuration -------------------------*/
   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
- 80025b8:	687b      	ldr	r3, [r7, #4]
- 80025ba:	681b      	ldr	r3, [r3, #0]
- 80025bc:	2204      	movs	r2, #4
- 80025be:	4013      	ands	r3, r2
- 80025c0:	d100      	bne.n	80025c4 <HAL_RCC_OscConfig+0x428>
- 80025c2:	e0ae      	b.n	8002722 <HAL_RCC_OscConfig+0x586>
+ 800232c:	687b      	ldr	r3, [r7, #4]
+ 800232e:	681b      	ldr	r3, [r3, #0]
+ 8002330:	2204      	movs	r2, #4
+ 8002332:	4013      	ands	r3, r2
+ 8002334:	d100      	bne.n	8002338 <HAL_RCC_OscConfig+0x428>
+ 8002336:	e0ae      	b.n	8002496 <HAL_RCC_OscConfig+0x586>
   {
     FlagStatus       pwrclkchanged = RESET;
- 80025c4:	2027      	movs	r0, #39	; 0x27
- 80025c6:	183b      	adds	r3, r7, r0
- 80025c8:	2200      	movs	r2, #0
- 80025ca:	701a      	strb	r2, [r3, #0]
+ 8002338:	2027      	movs	r0, #39	; 0x27
+ 800233a:	183b      	adds	r3, r7, r0
+ 800233c:	2200      	movs	r2, #0
+ 800233e:	701a      	strb	r2, [r3, #0]
     /* Check the parameters */
     assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
 
     /* Update LSE configuration in Backup Domain control register    */
     /* Requires to enable write access to Backup Domain of necessary */
     if(__HAL_RCC_PWR_IS_CLK_DISABLED())
- 80025cc:	4b8e      	ldr	r3, [pc, #568]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 80025ce:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 80025d0:	2380      	movs	r3, #128	; 0x80
- 80025d2:	055b      	lsls	r3, r3, #21
- 80025d4:	4013      	ands	r3, r2
- 80025d6:	d109      	bne.n	80025ec <HAL_RCC_OscConfig+0x450>
+ 8002340:	4b8e      	ldr	r3, [pc, #568]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002342:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 8002344:	2380      	movs	r3, #128	; 0x80
+ 8002346:	055b      	lsls	r3, r3, #21
+ 8002348:	4013      	ands	r3, r2
+ 800234a:	d109      	bne.n	8002360 <HAL_RCC_OscConfig+0x450>
     {
       __HAL_RCC_PWR_CLK_ENABLE();
- 80025d8:	4b8b      	ldr	r3, [pc, #556]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 80025da:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 80025dc:	4b8a      	ldr	r3, [pc, #552]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 80025de:	2180      	movs	r1, #128	; 0x80
- 80025e0:	0549      	lsls	r1, r1, #21
- 80025e2:	430a      	orrs	r2, r1
- 80025e4:	639a      	str	r2, [r3, #56]	; 0x38
+ 800234c:	4b8b      	ldr	r3, [pc, #556]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 800234e:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 8002350:	4b8a      	ldr	r3, [pc, #552]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002352:	2180      	movs	r1, #128	; 0x80
+ 8002354:	0549      	lsls	r1, r1, #21
+ 8002356:	430a      	orrs	r2, r1
+ 8002358:	639a      	str	r2, [r3, #56]	; 0x38
       pwrclkchanged = SET;
- 80025e6:	183b      	adds	r3, r7, r0
- 80025e8:	2201      	movs	r2, #1
- 80025ea:	701a      	strb	r2, [r3, #0]
+ 800235a:	183b      	adds	r3, r7, r0
+ 800235c:	2201      	movs	r2, #1
+ 800235e:	701a      	strb	r2, [r3, #0]
     }
 
     if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 80025ec:	4b88      	ldr	r3, [pc, #544]	; (8002810 <HAL_RCC_OscConfig+0x674>)
- 80025ee:	681a      	ldr	r2, [r3, #0]
- 80025f0:	2380      	movs	r3, #128	; 0x80
- 80025f2:	005b      	lsls	r3, r3, #1
- 80025f4:	4013      	ands	r3, r2
- 80025f6:	d11a      	bne.n	800262e <HAL_RCC_OscConfig+0x492>
+ 8002360:	4b88      	ldr	r3, [pc, #544]	; (8002584 <HAL_RCC_OscConfig+0x674>)
+ 8002362:	681a      	ldr	r2, [r3, #0]
+ 8002364:	2380      	movs	r3, #128	; 0x80
+ 8002366:	005b      	lsls	r3, r3, #1
+ 8002368:	4013      	ands	r3, r2
+ 800236a:	d11a      	bne.n	80023a2 <HAL_RCC_OscConfig+0x492>
     {
       /* Enable write access to Backup domain */
       SET_BIT(PWR->CR, PWR_CR_DBP);
- 80025f8:	4b85      	ldr	r3, [pc, #532]	; (8002810 <HAL_RCC_OscConfig+0x674>)
- 80025fa:	681a      	ldr	r2, [r3, #0]
- 80025fc:	4b84      	ldr	r3, [pc, #528]	; (8002810 <HAL_RCC_OscConfig+0x674>)
- 80025fe:	2180      	movs	r1, #128	; 0x80
- 8002600:	0049      	lsls	r1, r1, #1
- 8002602:	430a      	orrs	r2, r1
- 8002604:	601a      	str	r2, [r3, #0]
+ 800236c:	4b85      	ldr	r3, [pc, #532]	; (8002584 <HAL_RCC_OscConfig+0x674>)
+ 800236e:	681a      	ldr	r2, [r3, #0]
+ 8002370:	4b84      	ldr	r3, [pc, #528]	; (8002584 <HAL_RCC_OscConfig+0x674>)
+ 8002372:	2180      	movs	r1, #128	; 0x80
+ 8002374:	0049      	lsls	r1, r1, #1
+ 8002376:	430a      	orrs	r2, r1
+ 8002378:	601a      	str	r2, [r3, #0]
 
       /* Wait for Backup domain Write protection disable */
       tickstart = HAL_GetTick();
- 8002606:	f7fe ff47 	bl	8001498 <HAL_GetTick>
- 800260a:	0003      	movs	r3, r0
- 800260c:	61bb      	str	r3, [r7, #24]
+ 800237a:	f7fe ffcf 	bl	800131c <HAL_GetTick>
+ 800237e:	0003      	movs	r3, r0
+ 8002380:	61bb      	str	r3, [r7, #24]
 
       while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 800260e:	e008      	b.n	8002622 <HAL_RCC_OscConfig+0x486>
+ 8002382:	e008      	b.n	8002396 <HAL_RCC_OscConfig+0x486>
       {
         if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- 8002610:	f7fe ff42 	bl	8001498 <HAL_GetTick>
- 8002614:	0002      	movs	r2, r0
- 8002616:	69bb      	ldr	r3, [r7, #24]
- 8002618:	1ad3      	subs	r3, r2, r3
- 800261a:	2b64      	cmp	r3, #100	; 0x64
- 800261c:	d901      	bls.n	8002622 <HAL_RCC_OscConfig+0x486>
+ 8002384:	f7fe ffca 	bl	800131c <HAL_GetTick>
+ 8002388:	0002      	movs	r2, r0
+ 800238a:	69bb      	ldr	r3, [r7, #24]
+ 800238c:	1ad3      	subs	r3, r2, r3
+ 800238e:	2b64      	cmp	r3, #100	; 0x64
+ 8002390:	d901      	bls.n	8002396 <HAL_RCC_OscConfig+0x486>
         {
           return HAL_TIMEOUT;
- 800261e:	2303      	movs	r3, #3
- 8002620:	e120      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 8002392:	2303      	movs	r3, #3
+ 8002394:	e120      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
       while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 8002622:	4b7b      	ldr	r3, [pc, #492]	; (8002810 <HAL_RCC_OscConfig+0x674>)
- 8002624:	681a      	ldr	r2, [r3, #0]
- 8002626:	2380      	movs	r3, #128	; 0x80
- 8002628:	005b      	lsls	r3, r3, #1
- 800262a:	4013      	ands	r3, r2
- 800262c:	d0f0      	beq.n	8002610 <HAL_RCC_OscConfig+0x474>
+ 8002396:	4b7b      	ldr	r3, [pc, #492]	; (8002584 <HAL_RCC_OscConfig+0x674>)
+ 8002398:	681a      	ldr	r2, [r3, #0]
+ 800239a:	2380      	movs	r3, #128	; 0x80
+ 800239c:	005b      	lsls	r3, r3, #1
+ 800239e:	4013      	ands	r3, r2
+ 80023a0:	d0f0      	beq.n	8002384 <HAL_RCC_OscConfig+0x474>
         }
       }
     }
 
     /* Set the new LSE configuration -----------------------------------------*/
     __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
- 800262e:	687b      	ldr	r3, [r7, #4]
- 8002630:	689a      	ldr	r2, [r3, #8]
- 8002632:	2380      	movs	r3, #128	; 0x80
- 8002634:	005b      	lsls	r3, r3, #1
- 8002636:	429a      	cmp	r2, r3
- 8002638:	d107      	bne.n	800264a <HAL_RCC_OscConfig+0x4ae>
- 800263a:	4b73      	ldr	r3, [pc, #460]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 800263c:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 800263e:	4b72      	ldr	r3, [pc, #456]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002640:	2180      	movs	r1, #128	; 0x80
- 8002642:	0049      	lsls	r1, r1, #1
- 8002644:	430a      	orrs	r2, r1
- 8002646:	651a      	str	r2, [r3, #80]	; 0x50
- 8002648:	e031      	b.n	80026ae <HAL_RCC_OscConfig+0x512>
- 800264a:	687b      	ldr	r3, [r7, #4]
- 800264c:	689b      	ldr	r3, [r3, #8]
- 800264e:	2b00      	cmp	r3, #0
- 8002650:	d10c      	bne.n	800266c <HAL_RCC_OscConfig+0x4d0>
- 8002652:	4b6d      	ldr	r3, [pc, #436]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002654:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 8002656:	4b6c      	ldr	r3, [pc, #432]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002658:	496c      	ldr	r1, [pc, #432]	; (800280c <HAL_RCC_OscConfig+0x670>)
- 800265a:	400a      	ands	r2, r1
- 800265c:	651a      	str	r2, [r3, #80]	; 0x50
- 800265e:	4b6a      	ldr	r3, [pc, #424]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002660:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 8002662:	4b69      	ldr	r3, [pc, #420]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002664:	496b      	ldr	r1, [pc, #428]	; (8002814 <HAL_RCC_OscConfig+0x678>)
- 8002666:	400a      	ands	r2, r1
- 8002668:	651a      	str	r2, [r3, #80]	; 0x50
- 800266a:	e020      	b.n	80026ae <HAL_RCC_OscConfig+0x512>
- 800266c:	687b      	ldr	r3, [r7, #4]
- 800266e:	689a      	ldr	r2, [r3, #8]
- 8002670:	23a0      	movs	r3, #160	; 0xa0
- 8002672:	00db      	lsls	r3, r3, #3
- 8002674:	429a      	cmp	r2, r3
- 8002676:	d10e      	bne.n	8002696 <HAL_RCC_OscConfig+0x4fa>
- 8002678:	4b63      	ldr	r3, [pc, #396]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 800267a:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 800267c:	4b62      	ldr	r3, [pc, #392]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 800267e:	2180      	movs	r1, #128	; 0x80
- 8002680:	00c9      	lsls	r1, r1, #3
- 8002682:	430a      	orrs	r2, r1
- 8002684:	651a      	str	r2, [r3, #80]	; 0x50
- 8002686:	4b60      	ldr	r3, [pc, #384]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002688:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 800268a:	4b5f      	ldr	r3, [pc, #380]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 800268c:	2180      	movs	r1, #128	; 0x80
- 800268e:	0049      	lsls	r1, r1, #1
- 8002690:	430a      	orrs	r2, r1
- 8002692:	651a      	str	r2, [r3, #80]	; 0x50
- 8002694:	e00b      	b.n	80026ae <HAL_RCC_OscConfig+0x512>
- 8002696:	4b5c      	ldr	r3, [pc, #368]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002698:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 800269a:	4b5b      	ldr	r3, [pc, #364]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 800269c:	495b      	ldr	r1, [pc, #364]	; (800280c <HAL_RCC_OscConfig+0x670>)
- 800269e:	400a      	ands	r2, r1
- 80026a0:	651a      	str	r2, [r3, #80]	; 0x50
- 80026a2:	4b59      	ldr	r3, [pc, #356]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 80026a4:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 80026a6:	4b58      	ldr	r3, [pc, #352]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 80026a8:	495a      	ldr	r1, [pc, #360]	; (8002814 <HAL_RCC_OscConfig+0x678>)
- 80026aa:	400a      	ands	r2, r1
- 80026ac:	651a      	str	r2, [r3, #80]	; 0x50
+ 80023a2:	687b      	ldr	r3, [r7, #4]
+ 80023a4:	689a      	ldr	r2, [r3, #8]
+ 80023a6:	2380      	movs	r3, #128	; 0x80
+ 80023a8:	005b      	lsls	r3, r3, #1
+ 80023aa:	429a      	cmp	r2, r3
+ 80023ac:	d107      	bne.n	80023be <HAL_RCC_OscConfig+0x4ae>
+ 80023ae:	4b73      	ldr	r3, [pc, #460]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80023b0:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 80023b2:	4b72      	ldr	r3, [pc, #456]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80023b4:	2180      	movs	r1, #128	; 0x80
+ 80023b6:	0049      	lsls	r1, r1, #1
+ 80023b8:	430a      	orrs	r2, r1
+ 80023ba:	651a      	str	r2, [r3, #80]	; 0x50
+ 80023bc:	e031      	b.n	8002422 <HAL_RCC_OscConfig+0x512>
+ 80023be:	687b      	ldr	r3, [r7, #4]
+ 80023c0:	689b      	ldr	r3, [r3, #8]
+ 80023c2:	2b00      	cmp	r3, #0
+ 80023c4:	d10c      	bne.n	80023e0 <HAL_RCC_OscConfig+0x4d0>
+ 80023c6:	4b6d      	ldr	r3, [pc, #436]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80023c8:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 80023ca:	4b6c      	ldr	r3, [pc, #432]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80023cc:	496c      	ldr	r1, [pc, #432]	; (8002580 <HAL_RCC_OscConfig+0x670>)
+ 80023ce:	400a      	ands	r2, r1
+ 80023d0:	651a      	str	r2, [r3, #80]	; 0x50
+ 80023d2:	4b6a      	ldr	r3, [pc, #424]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80023d4:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 80023d6:	4b69      	ldr	r3, [pc, #420]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80023d8:	496b      	ldr	r1, [pc, #428]	; (8002588 <HAL_RCC_OscConfig+0x678>)
+ 80023da:	400a      	ands	r2, r1
+ 80023dc:	651a      	str	r2, [r3, #80]	; 0x50
+ 80023de:	e020      	b.n	8002422 <HAL_RCC_OscConfig+0x512>
+ 80023e0:	687b      	ldr	r3, [r7, #4]
+ 80023e2:	689a      	ldr	r2, [r3, #8]
+ 80023e4:	23a0      	movs	r3, #160	; 0xa0
+ 80023e6:	00db      	lsls	r3, r3, #3
+ 80023e8:	429a      	cmp	r2, r3
+ 80023ea:	d10e      	bne.n	800240a <HAL_RCC_OscConfig+0x4fa>
+ 80023ec:	4b63      	ldr	r3, [pc, #396]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80023ee:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 80023f0:	4b62      	ldr	r3, [pc, #392]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80023f2:	2180      	movs	r1, #128	; 0x80
+ 80023f4:	00c9      	lsls	r1, r1, #3
+ 80023f6:	430a      	orrs	r2, r1
+ 80023f8:	651a      	str	r2, [r3, #80]	; 0x50
+ 80023fa:	4b60      	ldr	r3, [pc, #384]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80023fc:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 80023fe:	4b5f      	ldr	r3, [pc, #380]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002400:	2180      	movs	r1, #128	; 0x80
+ 8002402:	0049      	lsls	r1, r1, #1
+ 8002404:	430a      	orrs	r2, r1
+ 8002406:	651a      	str	r2, [r3, #80]	; 0x50
+ 8002408:	e00b      	b.n	8002422 <HAL_RCC_OscConfig+0x512>
+ 800240a:	4b5c      	ldr	r3, [pc, #368]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 800240c:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 800240e:	4b5b      	ldr	r3, [pc, #364]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002410:	495b      	ldr	r1, [pc, #364]	; (8002580 <HAL_RCC_OscConfig+0x670>)
+ 8002412:	400a      	ands	r2, r1
+ 8002414:	651a      	str	r2, [r3, #80]	; 0x50
+ 8002416:	4b59      	ldr	r3, [pc, #356]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002418:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 800241a:	4b58      	ldr	r3, [pc, #352]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 800241c:	495a      	ldr	r1, [pc, #360]	; (8002588 <HAL_RCC_OscConfig+0x678>)
+ 800241e:	400a      	ands	r2, r1
+ 8002420:	651a      	str	r2, [r3, #80]	; 0x50
 
     /* Check the LSE State */
     if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
- 80026ae:	687b      	ldr	r3, [r7, #4]
- 80026b0:	689b      	ldr	r3, [r3, #8]
- 80026b2:	2b00      	cmp	r3, #0
- 80026b4:	d015      	beq.n	80026e2 <HAL_RCC_OscConfig+0x546>
+ 8002422:	687b      	ldr	r3, [r7, #4]
+ 8002424:	689b      	ldr	r3, [r3, #8]
+ 8002426:	2b00      	cmp	r3, #0
+ 8002428:	d015      	beq.n	8002456 <HAL_RCC_OscConfig+0x546>
     {
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 80026b6:	f7fe feef 	bl	8001498 <HAL_GetTick>
- 80026ba:	0003      	movs	r3, r0
- 80026bc:	61bb      	str	r3, [r7, #24]
+ 800242a:	f7fe ff77 	bl	800131c <HAL_GetTick>
+ 800242e:	0003      	movs	r3, r0
+ 8002430:	61bb      	str	r3, [r7, #24]
 
       /* Wait till LSE is ready */
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
- 80026be:	e009      	b.n	80026d4 <HAL_RCC_OscConfig+0x538>
+ 8002432:	e009      	b.n	8002448 <HAL_RCC_OscConfig+0x538>
       {
         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 80026c0:	f7fe feea 	bl	8001498 <HAL_GetTick>
- 80026c4:	0002      	movs	r2, r0
- 80026c6:	69bb      	ldr	r3, [r7, #24]
- 80026c8:	1ad3      	subs	r3, r2, r3
- 80026ca:	4a53      	ldr	r2, [pc, #332]	; (8002818 <HAL_RCC_OscConfig+0x67c>)
- 80026cc:	4293      	cmp	r3, r2
- 80026ce:	d901      	bls.n	80026d4 <HAL_RCC_OscConfig+0x538>
+ 8002434:	f7fe ff72 	bl	800131c <HAL_GetTick>
+ 8002438:	0002      	movs	r2, r0
+ 800243a:	69bb      	ldr	r3, [r7, #24]
+ 800243c:	1ad3      	subs	r3, r2, r3
+ 800243e:	4a53      	ldr	r2, [pc, #332]	; (800258c <HAL_RCC_OscConfig+0x67c>)
+ 8002440:	4293      	cmp	r3, r2
+ 8002442:	d901      	bls.n	8002448 <HAL_RCC_OscConfig+0x538>
         {
           return HAL_TIMEOUT;
- 80026d0:	2303      	movs	r3, #3
- 80026d2:	e0c7      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 8002444:	2303      	movs	r3, #3
+ 8002446:	e0c7      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
- 80026d4:	4b4c      	ldr	r3, [pc, #304]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 80026d6:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 80026d8:	2380      	movs	r3, #128	; 0x80
- 80026da:	009b      	lsls	r3, r3, #2
- 80026dc:	4013      	ands	r3, r2
- 80026de:	d0ef      	beq.n	80026c0 <HAL_RCC_OscConfig+0x524>
- 80026e0:	e014      	b.n	800270c <HAL_RCC_OscConfig+0x570>
+ 8002448:	4b4c      	ldr	r3, [pc, #304]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 800244a:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 800244c:	2380      	movs	r3, #128	; 0x80
+ 800244e:	009b      	lsls	r3, r3, #2
+ 8002450:	4013      	ands	r3, r2
+ 8002452:	d0ef      	beq.n	8002434 <HAL_RCC_OscConfig+0x524>
+ 8002454:	e014      	b.n	8002480 <HAL_RCC_OscConfig+0x570>
       }
     }
     else
     {
       /* Get Start Tick */
       tickstart = HAL_GetTick();
- 80026e2:	f7fe fed9 	bl	8001498 <HAL_GetTick>
- 80026e6:	0003      	movs	r3, r0
- 80026e8:	61bb      	str	r3, [r7, #24]
+ 8002456:	f7fe ff61 	bl	800131c <HAL_GetTick>
+ 800245a:	0003      	movs	r3, r0
+ 800245c:	61bb      	str	r3, [r7, #24]
 
       /* Wait till LSE is disabled */
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
- 80026ea:	e009      	b.n	8002700 <HAL_RCC_OscConfig+0x564>
+ 800245e:	e009      	b.n	8002474 <HAL_RCC_OscConfig+0x564>
       {
         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 80026ec:	f7fe fed4 	bl	8001498 <HAL_GetTick>
- 80026f0:	0002      	movs	r2, r0
- 80026f2:	69bb      	ldr	r3, [r7, #24]
- 80026f4:	1ad3      	subs	r3, r2, r3
- 80026f6:	4a48      	ldr	r2, [pc, #288]	; (8002818 <HAL_RCC_OscConfig+0x67c>)
- 80026f8:	4293      	cmp	r3, r2
- 80026fa:	d901      	bls.n	8002700 <HAL_RCC_OscConfig+0x564>
+ 8002460:	f7fe ff5c 	bl	800131c <HAL_GetTick>
+ 8002464:	0002      	movs	r2, r0
+ 8002466:	69bb      	ldr	r3, [r7, #24]
+ 8002468:	1ad3      	subs	r3, r2, r3
+ 800246a:	4a48      	ldr	r2, [pc, #288]	; (800258c <HAL_RCC_OscConfig+0x67c>)
+ 800246c:	4293      	cmp	r3, r2
+ 800246e:	d901      	bls.n	8002474 <HAL_RCC_OscConfig+0x564>
         {
           return HAL_TIMEOUT;
- 80026fc:	2303      	movs	r3, #3
- 80026fe:	e0b1      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 8002470:	2303      	movs	r3, #3
+ 8002472:	e0b1      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != 0U)
- 8002700:	4b41      	ldr	r3, [pc, #260]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002702:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 8002704:	2380      	movs	r3, #128	; 0x80
- 8002706:	009b      	lsls	r3, r3, #2
- 8002708:	4013      	ands	r3, r2
- 800270a:	d1ef      	bne.n	80026ec <HAL_RCC_OscConfig+0x550>
+ 8002474:	4b41      	ldr	r3, [pc, #260]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002476:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 8002478:	2380      	movs	r3, #128	; 0x80
+ 800247a:	009b      	lsls	r3, r3, #2
+ 800247c:	4013      	ands	r3, r2
+ 800247e:	d1ef      	bne.n	8002460 <HAL_RCC_OscConfig+0x550>
         }
       }
     }
 
     /* Require to disable power clock if necessary */
     if(pwrclkchanged == SET)
- 800270c:	2327      	movs	r3, #39	; 0x27
- 800270e:	18fb      	adds	r3, r7, r3
- 8002710:	781b      	ldrb	r3, [r3, #0]
- 8002712:	2b01      	cmp	r3, #1
- 8002714:	d105      	bne.n	8002722 <HAL_RCC_OscConfig+0x586>
+ 8002480:	2327      	movs	r3, #39	; 0x27
+ 8002482:	18fb      	adds	r3, r7, r3
+ 8002484:	781b      	ldrb	r3, [r3, #0]
+ 8002486:	2b01      	cmp	r3, #1
+ 8002488:	d105      	bne.n	8002496 <HAL_RCC_OscConfig+0x586>
     {
       __HAL_RCC_PWR_CLK_DISABLE();
- 8002716:	4b3c      	ldr	r3, [pc, #240]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002718:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 800271a:	4b3b      	ldr	r3, [pc, #236]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 800271c:	493f      	ldr	r1, [pc, #252]	; (800281c <HAL_RCC_OscConfig+0x680>)
- 800271e:	400a      	ands	r2, r1
- 8002720:	639a      	str	r2, [r3, #56]	; 0x38
+ 800248a:	4b3c      	ldr	r3, [pc, #240]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 800248c:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 800248e:	4b3b      	ldr	r3, [pc, #236]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002490:	493f      	ldr	r1, [pc, #252]	; (8002590 <HAL_RCC_OscConfig+0x680>)
+ 8002492:	400a      	ands	r2, r1
+ 8002494:	639a      	str	r2, [r3, #56]	; 0x38
 #endif /* RCC_HSI48_SUPPORT */
 
   /*-------------------------------- PLL Configuration -----------------------*/
   /* Check the parameters */
   assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
   if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
- 8002722:	687b      	ldr	r3, [r7, #4]
- 8002724:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8002726:	2b00      	cmp	r3, #0
- 8002728:	d100      	bne.n	800272c <HAL_RCC_OscConfig+0x590>
- 800272a:	e09a      	b.n	8002862 <HAL_RCC_OscConfig+0x6c6>
+ 8002496:	687b      	ldr	r3, [r7, #4]
+ 8002498:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800249a:	2b00      	cmp	r3, #0
+ 800249c:	d100      	bne.n	80024a0 <HAL_RCC_OscConfig+0x590>
+ 800249e:	e09a      	b.n	80025d6 <HAL_RCC_OscConfig+0x6c6>
   {
     /* Check if the PLL is used as system clock or not */
     if(sysclk_source != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 800272c:	6a3b      	ldr	r3, [r7, #32]
- 800272e:	2b0c      	cmp	r3, #12
- 8002730:	d064      	beq.n	80027fc <HAL_RCC_OscConfig+0x660>
+ 80024a0:	6a3b      	ldr	r3, [r7, #32]
+ 80024a2:	2b0c      	cmp	r3, #12
+ 80024a4:	d064      	beq.n	8002570 <HAL_RCC_OscConfig+0x660>
     {
       if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
- 8002732:	687b      	ldr	r3, [r7, #4]
- 8002734:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8002736:	2b02      	cmp	r3, #2
- 8002738:	d145      	bne.n	80027c6 <HAL_RCC_OscConfig+0x62a>
+ 80024a6:	687b      	ldr	r3, [r7, #4]
+ 80024a8:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 80024aa:	2b02      	cmp	r3, #2
+ 80024ac:	d145      	bne.n	800253a <HAL_RCC_OscConfig+0x62a>
         assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
         assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
         assert_param(IS_RCC_PLL_DIV(RCC_OscInitStruct->PLL.PLLDIV));
 
         /* Disable the main PLL. */
         __HAL_RCC_PLL_DISABLE();
- 800273a:	4b33      	ldr	r3, [pc, #204]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 800273c:	681a      	ldr	r2, [r3, #0]
- 800273e:	4b32      	ldr	r3, [pc, #200]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002740:	4937      	ldr	r1, [pc, #220]	; (8002820 <HAL_RCC_OscConfig+0x684>)
- 8002742:	400a      	ands	r2, r1
- 8002744:	601a      	str	r2, [r3, #0]
+ 80024ae:	4b33      	ldr	r3, [pc, #204]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80024b0:	681a      	ldr	r2, [r3, #0]
+ 80024b2:	4b32      	ldr	r3, [pc, #200]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80024b4:	4937      	ldr	r1, [pc, #220]	; (8002594 <HAL_RCC_OscConfig+0x684>)
+ 80024b6:	400a      	ands	r2, r1
+ 80024b8:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002746:	f7fe fea7 	bl	8001498 <HAL_GetTick>
- 800274a:	0003      	movs	r3, r0
- 800274c:	61bb      	str	r3, [r7, #24]
+ 80024ba:	f7fe ff2f 	bl	800131c <HAL_GetTick>
+ 80024be:	0003      	movs	r3, r0
+ 80024c0:	61bb      	str	r3, [r7, #24]
 
         /* Wait till PLL is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != 0U)
- 800274e:	e008      	b.n	8002762 <HAL_RCC_OscConfig+0x5c6>
+ 80024c2:	e008      	b.n	80024d6 <HAL_RCC_OscConfig+0x5c6>
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 8002750:	f7fe fea2 	bl	8001498 <HAL_GetTick>
- 8002754:	0002      	movs	r2, r0
- 8002756:	69bb      	ldr	r3, [r7, #24]
- 8002758:	1ad3      	subs	r3, r2, r3
- 800275a:	2b02      	cmp	r3, #2
- 800275c:	d901      	bls.n	8002762 <HAL_RCC_OscConfig+0x5c6>
+ 80024c4:	f7fe ff2a 	bl	800131c <HAL_GetTick>
+ 80024c8:	0002      	movs	r2, r0
+ 80024ca:	69bb      	ldr	r3, [r7, #24]
+ 80024cc:	1ad3      	subs	r3, r2, r3
+ 80024ce:	2b02      	cmp	r3, #2
+ 80024d0:	d901      	bls.n	80024d6 <HAL_RCC_OscConfig+0x5c6>
           {
             return HAL_TIMEOUT;
- 800275e:	2303      	movs	r3, #3
- 8002760:	e080      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 80024d2:	2303      	movs	r3, #3
+ 80024d4:	e080      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != 0U)
- 8002762:	4b29      	ldr	r3, [pc, #164]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002764:	681a      	ldr	r2, [r3, #0]
- 8002766:	2380      	movs	r3, #128	; 0x80
- 8002768:	049b      	lsls	r3, r3, #18
- 800276a:	4013      	ands	r3, r2
- 800276c:	d1f0      	bne.n	8002750 <HAL_RCC_OscConfig+0x5b4>
+ 80024d6:	4b29      	ldr	r3, [pc, #164]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80024d8:	681a      	ldr	r2, [r3, #0]
+ 80024da:	2380      	movs	r3, #128	; 0x80
+ 80024dc:	049b      	lsls	r3, r3, #18
+ 80024de:	4013      	ands	r3, r2
+ 80024e0:	d1f0      	bne.n	80024c4 <HAL_RCC_OscConfig+0x5b4>
           }
         }
 
         /* Configure the main PLL clock source, multiplication and division factors. */
         __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
- 800276e:	4b26      	ldr	r3, [pc, #152]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002770:	68db      	ldr	r3, [r3, #12]
- 8002772:	4a2c      	ldr	r2, [pc, #176]	; (8002824 <HAL_RCC_OscConfig+0x688>)
- 8002774:	4013      	ands	r3, r2
- 8002776:	0019      	movs	r1, r3
- 8002778:	687b      	ldr	r3, [r7, #4]
- 800277a:	6a9a      	ldr	r2, [r3, #40]	; 0x28
- 800277c:	687b      	ldr	r3, [r7, #4]
- 800277e:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8002780:	431a      	orrs	r2, r3
- 8002782:	687b      	ldr	r3, [r7, #4]
- 8002784:	6b1b      	ldr	r3, [r3, #48]	; 0x30
- 8002786:	431a      	orrs	r2, r3
- 8002788:	4b1f      	ldr	r3, [pc, #124]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 800278a:	430a      	orrs	r2, r1
- 800278c:	60da      	str	r2, [r3, #12]
+ 80024e2:	4b26      	ldr	r3, [pc, #152]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80024e4:	68db      	ldr	r3, [r3, #12]
+ 80024e6:	4a2c      	ldr	r2, [pc, #176]	; (8002598 <HAL_RCC_OscConfig+0x688>)
+ 80024e8:	4013      	ands	r3, r2
+ 80024ea:	0019      	movs	r1, r3
+ 80024ec:	687b      	ldr	r3, [r7, #4]
+ 80024ee:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 80024f0:	687b      	ldr	r3, [r7, #4]
+ 80024f2:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80024f4:	431a      	orrs	r2, r3
+ 80024f6:	687b      	ldr	r3, [r7, #4]
+ 80024f8:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80024fa:	431a      	orrs	r2, r3
+ 80024fc:	4b1f      	ldr	r3, [pc, #124]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 80024fe:	430a      	orrs	r2, r1
+ 8002500:	60da      	str	r2, [r3, #12]
                              RCC_OscInitStruct->PLL.PLLMUL,
                              RCC_OscInitStruct->PLL.PLLDIV);
         /* Enable the main PLL. */
         __HAL_RCC_PLL_ENABLE();
- 800278e:	4b1e      	ldr	r3, [pc, #120]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002790:	681a      	ldr	r2, [r3, #0]
- 8002792:	4b1d      	ldr	r3, [pc, #116]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 8002794:	2180      	movs	r1, #128	; 0x80
- 8002796:	0449      	lsls	r1, r1, #17
- 8002798:	430a      	orrs	r2, r1
- 800279a:	601a      	str	r2, [r3, #0]
+ 8002502:	4b1e      	ldr	r3, [pc, #120]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002504:	681a      	ldr	r2, [r3, #0]
+ 8002506:	4b1d      	ldr	r3, [pc, #116]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002508:	2180      	movs	r1, #128	; 0x80
+ 800250a:	0449      	lsls	r1, r1, #17
+ 800250c:	430a      	orrs	r2, r1
+ 800250e:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 800279c:	f7fe fe7c 	bl	8001498 <HAL_GetTick>
- 80027a0:	0003      	movs	r3, r0
- 80027a2:	61bb      	str	r3, [r7, #24]
+ 8002510:	f7fe ff04 	bl	800131c <HAL_GetTick>
+ 8002514:	0003      	movs	r3, r0
+ 8002516:	61bb      	str	r3, [r7, #24]
 
         /* Wait till PLL is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == 0U)
- 80027a4:	e008      	b.n	80027b8 <HAL_RCC_OscConfig+0x61c>
+ 8002518:	e008      	b.n	800252c <HAL_RCC_OscConfig+0x61c>
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 80027a6:	f7fe fe77 	bl	8001498 <HAL_GetTick>
- 80027aa:	0002      	movs	r2, r0
- 80027ac:	69bb      	ldr	r3, [r7, #24]
- 80027ae:	1ad3      	subs	r3, r2, r3
- 80027b0:	2b02      	cmp	r3, #2
- 80027b2:	d901      	bls.n	80027b8 <HAL_RCC_OscConfig+0x61c>
+ 800251a:	f7fe feff 	bl	800131c <HAL_GetTick>
+ 800251e:	0002      	movs	r2, r0
+ 8002520:	69bb      	ldr	r3, [r7, #24]
+ 8002522:	1ad3      	subs	r3, r2, r3
+ 8002524:	2b02      	cmp	r3, #2
+ 8002526:	d901      	bls.n	800252c <HAL_RCC_OscConfig+0x61c>
           {
             return HAL_TIMEOUT;
- 80027b4:	2303      	movs	r3, #3
- 80027b6:	e055      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 8002528:	2303      	movs	r3, #3
+ 800252a:	e055      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == 0U)
- 80027b8:	4b13      	ldr	r3, [pc, #76]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 80027ba:	681a      	ldr	r2, [r3, #0]
- 80027bc:	2380      	movs	r3, #128	; 0x80
- 80027be:	049b      	lsls	r3, r3, #18
- 80027c0:	4013      	ands	r3, r2
- 80027c2:	d0f0      	beq.n	80027a6 <HAL_RCC_OscConfig+0x60a>
- 80027c4:	e04d      	b.n	8002862 <HAL_RCC_OscConfig+0x6c6>
+ 800252c:	4b13      	ldr	r3, [pc, #76]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 800252e:	681a      	ldr	r2, [r3, #0]
+ 8002530:	2380      	movs	r3, #128	; 0x80
+ 8002532:	049b      	lsls	r3, r3, #18
+ 8002534:	4013      	ands	r3, r2
+ 8002536:	d0f0      	beq.n	800251a <HAL_RCC_OscConfig+0x60a>
+ 8002538:	e04d      	b.n	80025d6 <HAL_RCC_OscConfig+0x6c6>
         }
       }
       else
       {
         /* Disable the main PLL. */
         __HAL_RCC_PLL_DISABLE();
- 80027c6:	4b10      	ldr	r3, [pc, #64]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 80027c8:	681a      	ldr	r2, [r3, #0]
- 80027ca:	4b0f      	ldr	r3, [pc, #60]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 80027cc:	4914      	ldr	r1, [pc, #80]	; (8002820 <HAL_RCC_OscConfig+0x684>)
- 80027ce:	400a      	ands	r2, r1
- 80027d0:	601a      	str	r2, [r3, #0]
+ 800253a:	4b10      	ldr	r3, [pc, #64]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 800253c:	681a      	ldr	r2, [r3, #0]
+ 800253e:	4b0f      	ldr	r3, [pc, #60]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002540:	4914      	ldr	r1, [pc, #80]	; (8002594 <HAL_RCC_OscConfig+0x684>)
+ 8002542:	400a      	ands	r2, r1
+ 8002544:	601a      	str	r2, [r3, #0]
 
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 80027d2:	f7fe fe61 	bl	8001498 <HAL_GetTick>
- 80027d6:	0003      	movs	r3, r0
- 80027d8:	61bb      	str	r3, [r7, #24]
+ 8002546:	f7fe fee9 	bl	800131c <HAL_GetTick>
+ 800254a:	0003      	movs	r3, r0
+ 800254c:	61bb      	str	r3, [r7, #24]
 
         /* Wait till PLL is disabled */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != 0U)
- 80027da:	e008      	b.n	80027ee <HAL_RCC_OscConfig+0x652>
+ 800254e:	e008      	b.n	8002562 <HAL_RCC_OscConfig+0x652>
         {
           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
- 80027dc:	f7fe fe5c 	bl	8001498 <HAL_GetTick>
- 80027e0:	0002      	movs	r2, r0
- 80027e2:	69bb      	ldr	r3, [r7, #24]
- 80027e4:	1ad3      	subs	r3, r2, r3
- 80027e6:	2b02      	cmp	r3, #2
- 80027e8:	d901      	bls.n	80027ee <HAL_RCC_OscConfig+0x652>
+ 8002550:	f7fe fee4 	bl	800131c <HAL_GetTick>
+ 8002554:	0002      	movs	r2, r0
+ 8002556:	69bb      	ldr	r3, [r7, #24]
+ 8002558:	1ad3      	subs	r3, r2, r3
+ 800255a:	2b02      	cmp	r3, #2
+ 800255c:	d901      	bls.n	8002562 <HAL_RCC_OscConfig+0x652>
           {
             return HAL_TIMEOUT;
- 80027ea:	2303      	movs	r3, #3
- 80027ec:	e03a      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 800255e:	2303      	movs	r3, #3
+ 8002560:	e03a      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != 0U)
- 80027ee:	4b06      	ldr	r3, [pc, #24]	; (8002808 <HAL_RCC_OscConfig+0x66c>)
- 80027f0:	681a      	ldr	r2, [r3, #0]
- 80027f2:	2380      	movs	r3, #128	; 0x80
- 80027f4:	049b      	lsls	r3, r3, #18
- 80027f6:	4013      	ands	r3, r2
- 80027f8:	d1f0      	bne.n	80027dc <HAL_RCC_OscConfig+0x640>
- 80027fa:	e032      	b.n	8002862 <HAL_RCC_OscConfig+0x6c6>
+ 8002562:	4b06      	ldr	r3, [pc, #24]	; (800257c <HAL_RCC_OscConfig+0x66c>)
+ 8002564:	681a      	ldr	r2, [r3, #0]
+ 8002566:	2380      	movs	r3, #128	; 0x80
+ 8002568:	049b      	lsls	r3, r3, #18
+ 800256a:	4013      	ands	r3, r2
+ 800256c:	d1f0      	bne.n	8002550 <HAL_RCC_OscConfig+0x640>
+ 800256e:	e032      	b.n	80025d6 <HAL_RCC_OscConfig+0x6c6>
       }
     }
     else
     {
       /* Check if there is a request to disable the PLL used as System clock source */
       if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
- 80027fc:	687b      	ldr	r3, [r7, #4]
- 80027fe:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8002800:	2b01      	cmp	r3, #1
- 8002802:	d111      	bne.n	8002828 <HAL_RCC_OscConfig+0x68c>
+ 8002570:	687b      	ldr	r3, [r7, #4]
+ 8002572:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8002574:	2b01      	cmp	r3, #1
+ 8002576:	d111      	bne.n	800259c <HAL_RCC_OscConfig+0x68c>
       {
         return HAL_ERROR;
- 8002804:	2301      	movs	r3, #1
- 8002806:	e02d      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
- 8002808:	40021000 	.word	0x40021000
- 800280c:	fffffeff 	.word	0xfffffeff
- 8002810:	40007000 	.word	0x40007000
- 8002814:	fffffbff 	.word	0xfffffbff
- 8002818:	00001388 	.word	0x00001388
- 800281c:	efffffff 	.word	0xefffffff
- 8002820:	feffffff 	.word	0xfeffffff
- 8002824:	ff02ffff 	.word	0xff02ffff
+ 8002578:	2301      	movs	r3, #1
+ 800257a:	e02d      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
+ 800257c:	40021000 	.word	0x40021000
+ 8002580:	fffffeff 	.word	0xfffffeff
+ 8002584:	40007000 	.word	0x40007000
+ 8002588:	fffffbff 	.word	0xfffffbff
+ 800258c:	00001388 	.word	0x00001388
+ 8002590:	efffffff 	.word	0xefffffff
+ 8002594:	feffffff 	.word	0xfeffffff
+ 8002598:	ff02ffff 	.word	0xff02ffff
       }
       else
       {
         /* Do not return HAL_ERROR if request repeats the current configuration */
         pll_config = RCC->CFGR;
- 8002828:	4b10      	ldr	r3, [pc, #64]	; (800286c <HAL_RCC_OscConfig+0x6d0>)
- 800282a:	68db      	ldr	r3, [r3, #12]
- 800282c:	61fb      	str	r3, [r7, #28]
+ 800259c:	4b10      	ldr	r3, [pc, #64]	; (80025e0 <HAL_RCC_OscConfig+0x6d0>)
+ 800259e:	68db      	ldr	r3, [r3, #12]
+ 80025a0:	61fb      	str	r3, [r7, #28]
         if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- 800282e:	69fa      	ldr	r2, [r7, #28]
- 8002830:	2380      	movs	r3, #128	; 0x80
- 8002832:	025b      	lsls	r3, r3, #9
- 8002834:	401a      	ands	r2, r3
- 8002836:	687b      	ldr	r3, [r7, #4]
- 8002838:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 800283a:	429a      	cmp	r2, r3
- 800283c:	d10f      	bne.n	800285e <HAL_RCC_OscConfig+0x6c2>
+ 80025a2:	69fa      	ldr	r2, [r7, #28]
+ 80025a4:	2380      	movs	r3, #128	; 0x80
+ 80025a6:	025b      	lsls	r3, r3, #9
+ 80025a8:	401a      	ands	r2, r3
+ 80025aa:	687b      	ldr	r3, [r7, #4]
+ 80025ac:	6a9b      	ldr	r3, [r3, #40]	; 0x28
+ 80025ae:	429a      	cmp	r2, r3
+ 80025b0:	d10f      	bne.n	80025d2 <HAL_RCC_OscConfig+0x6c2>
            (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
- 800283e:	69fa      	ldr	r2, [r7, #28]
- 8002840:	23f0      	movs	r3, #240	; 0xf0
- 8002842:	039b      	lsls	r3, r3, #14
- 8002844:	401a      	ands	r2, r3
- 8002846:	687b      	ldr	r3, [r7, #4]
- 8002848:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80025b2:	69fa      	ldr	r2, [r7, #28]
+ 80025b4:	23f0      	movs	r3, #240	; 0xf0
+ 80025b6:	039b      	lsls	r3, r3, #14
+ 80025b8:	401a      	ands	r2, r3
+ 80025ba:	687b      	ldr	r3, [r7, #4]
+ 80025bc:	6adb      	ldr	r3, [r3, #44]	; 0x2c
         if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
- 800284a:	429a      	cmp	r2, r3
- 800284c:	d107      	bne.n	800285e <HAL_RCC_OscConfig+0x6c2>
+ 80025be:	429a      	cmp	r2, r3
+ 80025c0:	d107      	bne.n	80025d2 <HAL_RCC_OscConfig+0x6c2>
            (READ_BIT(pll_config, RCC_CFGR_PLLDIV) != RCC_OscInitStruct->PLL.PLLDIV))
- 800284e:	69fa      	ldr	r2, [r7, #28]
- 8002850:	23c0      	movs	r3, #192	; 0xc0
- 8002852:	041b      	lsls	r3, r3, #16
- 8002854:	401a      	ands	r2, r3
- 8002856:	687b      	ldr	r3, [r7, #4]
- 8002858:	6b1b      	ldr	r3, [r3, #48]	; 0x30
+ 80025c2:	69fa      	ldr	r2, [r7, #28]
+ 80025c4:	23c0      	movs	r3, #192	; 0xc0
+ 80025c6:	041b      	lsls	r3, r3, #16
+ 80025c8:	401a      	ands	r2, r3
+ 80025ca:	687b      	ldr	r3, [r7, #4]
+ 80025cc:	6b1b      	ldr	r3, [r3, #48]	; 0x30
            (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) ||
- 800285a:	429a      	cmp	r2, r3
- 800285c:	d001      	beq.n	8002862 <HAL_RCC_OscConfig+0x6c6>
+ 80025ce:	429a      	cmp	r2, r3
+ 80025d0:	d001      	beq.n	80025d6 <HAL_RCC_OscConfig+0x6c6>
         {
           return HAL_ERROR;
- 800285e:	2301      	movs	r3, #1
- 8002860:	e000      	b.n	8002864 <HAL_RCC_OscConfig+0x6c8>
+ 80025d2:	2301      	movs	r3, #1
+ 80025d4:	e000      	b.n	80025d8 <HAL_RCC_OscConfig+0x6c8>
         }
       }
     }
   }
   return HAL_OK;
- 8002862:	2300      	movs	r3, #0
+ 80025d6:	2300      	movs	r3, #0
 }
- 8002864:	0018      	movs	r0, r3
- 8002866:	46bd      	mov	sp, r7
- 8002868:	b00a      	add	sp, #40	; 0x28
- 800286a:	bdb0      	pop	{r4, r5, r7, pc}
- 800286c:	40021000 	.word	0x40021000
+ 80025d8:	0018      	movs	r0, r3
+ 80025da:	46bd      	mov	sp, r7
+ 80025dc:	b00a      	add	sp, #40	; 0x28
+ 80025de:	bdb0      	pop	{r4, r5, r7, pc}
+ 80025e0:	40021000 	.word	0x40021000
 
-08002870 <HAL_RCC_ClockConfig>:
+080025e4 <HAL_RCC_ClockConfig>:
   *         HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency
   *         (for more details refer to section above "Initialization/de-initialization functions")
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
 {
- 8002870:	b5b0      	push	{r4, r5, r7, lr}
- 8002872:	b084      	sub	sp, #16
- 8002874:	af00      	add	r7, sp, #0
- 8002876:	6078      	str	r0, [r7, #4]
- 8002878:	6039      	str	r1, [r7, #0]
+ 80025e4:	b5b0      	push	{r4, r5, r7, lr}
+ 80025e6:	b084      	sub	sp, #16
+ 80025e8:	af00      	add	r7, sp, #0
+ 80025ea:	6078      	str	r0, [r7, #4]
+ 80025ec:	6039      	str	r1, [r7, #0]
   uint32_t tickstart;
   HAL_StatusTypeDef status;
 
   /* Check Null pointer */
   if(RCC_ClkInitStruct == NULL)
- 800287a:	687b      	ldr	r3, [r7, #4]
- 800287c:	2b00      	cmp	r3, #0
- 800287e:	d101      	bne.n	8002884 <HAL_RCC_ClockConfig+0x14>
+ 80025ee:	687b      	ldr	r3, [r7, #4]
+ 80025f0:	2b00      	cmp	r3, #0
+ 80025f2:	d101      	bne.n	80025f8 <HAL_RCC_ClockConfig+0x14>
   {
     return HAL_ERROR;
- 8002880:	2301      	movs	r3, #1
- 8002882:	e128      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 80025f4:	2301      	movs	r3, #1
+ 80025f6:	e128      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
   /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
   must be correctly programmed according to the frequency of the CPU clock
   (HCLK) and the supply voltage of the device. */
 
   /* Increasing the number of wait states because of higher CPU frequency */
   if(FLatency > __HAL_FLASH_GET_LATENCY())
- 8002884:	4b96      	ldr	r3, [pc, #600]	; (8002ae0 <HAL_RCC_ClockConfig+0x270>)
- 8002886:	681b      	ldr	r3, [r3, #0]
- 8002888:	2201      	movs	r2, #1
- 800288a:	4013      	ands	r3, r2
- 800288c:	683a      	ldr	r2, [r7, #0]
- 800288e:	429a      	cmp	r2, r3
- 8002890:	d91e      	bls.n	80028d0 <HAL_RCC_ClockConfig+0x60>
+ 80025f8:	4b96      	ldr	r3, [pc, #600]	; (8002854 <HAL_RCC_ClockConfig+0x270>)
+ 80025fa:	681b      	ldr	r3, [r3, #0]
+ 80025fc:	2201      	movs	r2, #1
+ 80025fe:	4013      	ands	r3, r2
+ 8002600:	683a      	ldr	r2, [r7, #0]
+ 8002602:	429a      	cmp	r2, r3
+ 8002604:	d91e      	bls.n	8002644 <HAL_RCC_ClockConfig+0x60>
   {
     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
     __HAL_FLASH_SET_LATENCY(FLatency);
- 8002892:	4b93      	ldr	r3, [pc, #588]	; (8002ae0 <HAL_RCC_ClockConfig+0x270>)
- 8002894:	681b      	ldr	r3, [r3, #0]
- 8002896:	2201      	movs	r2, #1
- 8002898:	4393      	bics	r3, r2
- 800289a:	0019      	movs	r1, r3
- 800289c:	4b90      	ldr	r3, [pc, #576]	; (8002ae0 <HAL_RCC_ClockConfig+0x270>)
- 800289e:	683a      	ldr	r2, [r7, #0]
- 80028a0:	430a      	orrs	r2, r1
- 80028a2:	601a      	str	r2, [r3, #0]
+ 8002606:	4b93      	ldr	r3, [pc, #588]	; (8002854 <HAL_RCC_ClockConfig+0x270>)
+ 8002608:	681b      	ldr	r3, [r3, #0]
+ 800260a:	2201      	movs	r2, #1
+ 800260c:	4393      	bics	r3, r2
+ 800260e:	0019      	movs	r1, r3
+ 8002610:	4b90      	ldr	r3, [pc, #576]	; (8002854 <HAL_RCC_ClockConfig+0x270>)
+ 8002612:	683a      	ldr	r2, [r7, #0]
+ 8002614:	430a      	orrs	r2, r1
+ 8002616:	601a      	str	r2, [r3, #0]
 
     /* Check that the new number of wait states is taken into account to access the Flash
     memory by polling the FLASH_ACR register */
     tickstart = HAL_GetTick();
- 80028a4:	f7fe fdf8 	bl	8001498 <HAL_GetTick>
- 80028a8:	0003      	movs	r3, r0
- 80028aa:	60fb      	str	r3, [r7, #12]
+ 8002618:	f7fe fe80 	bl	800131c <HAL_GetTick>
+ 800261c:	0003      	movs	r3, r0
+ 800261e:	60fb      	str	r3, [r7, #12]
 
     while (__HAL_FLASH_GET_LATENCY() != FLatency)
- 80028ac:	e009      	b.n	80028c2 <HAL_RCC_ClockConfig+0x52>
+ 8002620:	e009      	b.n	8002636 <HAL_RCC_ClockConfig+0x52>
     {
       if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
- 80028ae:	f7fe fdf3 	bl	8001498 <HAL_GetTick>
- 80028b2:	0002      	movs	r2, r0
- 80028b4:	68fb      	ldr	r3, [r7, #12]
- 80028b6:	1ad3      	subs	r3, r2, r3
- 80028b8:	4a8a      	ldr	r2, [pc, #552]	; (8002ae4 <HAL_RCC_ClockConfig+0x274>)
- 80028ba:	4293      	cmp	r3, r2
- 80028bc:	d901      	bls.n	80028c2 <HAL_RCC_ClockConfig+0x52>
+ 8002622:	f7fe fe7b 	bl	800131c <HAL_GetTick>
+ 8002626:	0002      	movs	r2, r0
+ 8002628:	68fb      	ldr	r3, [r7, #12]
+ 800262a:	1ad3      	subs	r3, r2, r3
+ 800262c:	4a8a      	ldr	r2, [pc, #552]	; (8002858 <HAL_RCC_ClockConfig+0x274>)
+ 800262e:	4293      	cmp	r3, r2
+ 8002630:	d901      	bls.n	8002636 <HAL_RCC_ClockConfig+0x52>
       {
         return HAL_TIMEOUT;
- 80028be:	2303      	movs	r3, #3
- 80028c0:	e109      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 8002632:	2303      	movs	r3, #3
+ 8002634:	e109      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
     while (__HAL_FLASH_GET_LATENCY() != FLatency)
- 80028c2:	4b87      	ldr	r3, [pc, #540]	; (8002ae0 <HAL_RCC_ClockConfig+0x270>)
- 80028c4:	681b      	ldr	r3, [r3, #0]
- 80028c6:	2201      	movs	r2, #1
- 80028c8:	4013      	ands	r3, r2
- 80028ca:	683a      	ldr	r2, [r7, #0]
- 80028cc:	429a      	cmp	r2, r3
- 80028ce:	d1ee      	bne.n	80028ae <HAL_RCC_ClockConfig+0x3e>
+ 8002636:	4b87      	ldr	r3, [pc, #540]	; (8002854 <HAL_RCC_ClockConfig+0x270>)
+ 8002638:	681b      	ldr	r3, [r3, #0]
+ 800263a:	2201      	movs	r2, #1
+ 800263c:	4013      	ands	r3, r2
+ 800263e:	683a      	ldr	r2, [r7, #0]
+ 8002640:	429a      	cmp	r2, r3
+ 8002642:	d1ee      	bne.n	8002622 <HAL_RCC_ClockConfig+0x3e>
       }
     }
   }
 
   /*-------------------------- HCLK Configuration --------------------------*/
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
- 80028d0:	687b      	ldr	r3, [r7, #4]
- 80028d2:	681b      	ldr	r3, [r3, #0]
- 80028d4:	2202      	movs	r2, #2
- 80028d6:	4013      	ands	r3, r2
- 80028d8:	d009      	beq.n	80028ee <HAL_RCC_ClockConfig+0x7e>
+ 8002644:	687b      	ldr	r3, [r7, #4]
+ 8002646:	681b      	ldr	r3, [r3, #0]
+ 8002648:	2202      	movs	r2, #2
+ 800264a:	4013      	ands	r3, r2
+ 800264c:	d009      	beq.n	8002662 <HAL_RCC_ClockConfig+0x7e>
   {
     assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
- 80028da:	4b83      	ldr	r3, [pc, #524]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 80028dc:	68db      	ldr	r3, [r3, #12]
- 80028de:	22f0      	movs	r2, #240	; 0xf0
- 80028e0:	4393      	bics	r3, r2
- 80028e2:	0019      	movs	r1, r3
- 80028e4:	687b      	ldr	r3, [r7, #4]
- 80028e6:	689a      	ldr	r2, [r3, #8]
- 80028e8:	4b7f      	ldr	r3, [pc, #508]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 80028ea:	430a      	orrs	r2, r1
- 80028ec:	60da      	str	r2, [r3, #12]
+ 800264e:	4b83      	ldr	r3, [pc, #524]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 8002650:	68db      	ldr	r3, [r3, #12]
+ 8002652:	22f0      	movs	r2, #240	; 0xf0
+ 8002654:	4393      	bics	r3, r2
+ 8002656:	0019      	movs	r1, r3
+ 8002658:	687b      	ldr	r3, [r7, #4]
+ 800265a:	689a      	ldr	r2, [r3, #8]
+ 800265c:	4b7f      	ldr	r3, [pc, #508]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 800265e:	430a      	orrs	r2, r1
+ 8002660:	60da      	str	r2, [r3, #12]
   }
 
   /*------------------------- SYSCLK Configuration ---------------------------*/
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
- 80028ee:	687b      	ldr	r3, [r7, #4]
- 80028f0:	681b      	ldr	r3, [r3, #0]
- 80028f2:	2201      	movs	r2, #1
- 80028f4:	4013      	ands	r3, r2
- 80028f6:	d100      	bne.n	80028fa <HAL_RCC_ClockConfig+0x8a>
- 80028f8:	e089      	b.n	8002a0e <HAL_RCC_ClockConfig+0x19e>
+ 8002662:	687b      	ldr	r3, [r7, #4]
+ 8002664:	681b      	ldr	r3, [r3, #0]
+ 8002666:	2201      	movs	r2, #1
+ 8002668:	4013      	ands	r3, r2
+ 800266a:	d100      	bne.n	800266e <HAL_RCC_ClockConfig+0x8a>
+ 800266c:	e089      	b.n	8002782 <HAL_RCC_ClockConfig+0x19e>
   {
     assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
 
     /* HSE is selected as System Clock Source */
     if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- 80028fa:	687b      	ldr	r3, [r7, #4]
- 80028fc:	685b      	ldr	r3, [r3, #4]
- 80028fe:	2b02      	cmp	r3, #2
- 8002900:	d107      	bne.n	8002912 <HAL_RCC_ClockConfig+0xa2>
+ 800266e:	687b      	ldr	r3, [r7, #4]
+ 8002670:	685b      	ldr	r3, [r3, #4]
+ 8002672:	2b02      	cmp	r3, #2
+ 8002674:	d107      	bne.n	8002686 <HAL_RCC_ClockConfig+0xa2>
     {
       /* Check the HSE ready flag */
       if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == 0U)
- 8002902:	4b79      	ldr	r3, [pc, #484]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 8002904:	681a      	ldr	r2, [r3, #0]
- 8002906:	2380      	movs	r3, #128	; 0x80
- 8002908:	029b      	lsls	r3, r3, #10
- 800290a:	4013      	ands	r3, r2
- 800290c:	d120      	bne.n	8002950 <HAL_RCC_ClockConfig+0xe0>
+ 8002676:	4b79      	ldr	r3, [pc, #484]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 8002678:	681a      	ldr	r2, [r3, #0]
+ 800267a:	2380      	movs	r3, #128	; 0x80
+ 800267c:	029b      	lsls	r3, r3, #10
+ 800267e:	4013      	ands	r3, r2
+ 8002680:	d120      	bne.n	80026c4 <HAL_RCC_ClockConfig+0xe0>
       {
         return HAL_ERROR;
- 800290e:	2301      	movs	r3, #1
- 8002910:	e0e1      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 8002682:	2301      	movs	r3, #1
+ 8002684:	e0e1      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
       }
     }
     /* PLL is selected as System Clock Source */
     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
- 8002912:	687b      	ldr	r3, [r7, #4]
- 8002914:	685b      	ldr	r3, [r3, #4]
- 8002916:	2b03      	cmp	r3, #3
- 8002918:	d107      	bne.n	800292a <HAL_RCC_ClockConfig+0xba>
+ 8002686:	687b      	ldr	r3, [r7, #4]
+ 8002688:	685b      	ldr	r3, [r3, #4]
+ 800268a:	2b03      	cmp	r3, #3
+ 800268c:	d107      	bne.n	800269e <HAL_RCC_ClockConfig+0xba>
     {
       /* Check the PLL ready flag */
       if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == 0U)
- 800291a:	4b73      	ldr	r3, [pc, #460]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 800291c:	681a      	ldr	r2, [r3, #0]
- 800291e:	2380      	movs	r3, #128	; 0x80
- 8002920:	049b      	lsls	r3, r3, #18
- 8002922:	4013      	ands	r3, r2
- 8002924:	d114      	bne.n	8002950 <HAL_RCC_ClockConfig+0xe0>
+ 800268e:	4b73      	ldr	r3, [pc, #460]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 8002690:	681a      	ldr	r2, [r3, #0]
+ 8002692:	2380      	movs	r3, #128	; 0x80
+ 8002694:	049b      	lsls	r3, r3, #18
+ 8002696:	4013      	ands	r3, r2
+ 8002698:	d114      	bne.n	80026c4 <HAL_RCC_ClockConfig+0xe0>
       {
         return HAL_ERROR;
- 8002926:	2301      	movs	r3, #1
- 8002928:	e0d5      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 800269a:	2301      	movs	r3, #1
+ 800269c:	e0d5      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
       }
     }
     /* HSI is selected as System Clock Source */
     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
- 800292a:	687b      	ldr	r3, [r7, #4]
- 800292c:	685b      	ldr	r3, [r3, #4]
- 800292e:	2b01      	cmp	r3, #1
- 8002930:	d106      	bne.n	8002940 <HAL_RCC_ClockConfig+0xd0>
+ 800269e:	687b      	ldr	r3, [r7, #4]
+ 80026a0:	685b      	ldr	r3, [r3, #4]
+ 80026a2:	2b01      	cmp	r3, #1
+ 80026a4:	d106      	bne.n	80026b4 <HAL_RCC_ClockConfig+0xd0>
     {
       /* Check the HSI ready flag */
       if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == 0U)
- 8002932:	4b6d      	ldr	r3, [pc, #436]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 8002934:	681b      	ldr	r3, [r3, #0]
- 8002936:	2204      	movs	r2, #4
- 8002938:	4013      	ands	r3, r2
- 800293a:	d109      	bne.n	8002950 <HAL_RCC_ClockConfig+0xe0>
+ 80026a6:	4b6d      	ldr	r3, [pc, #436]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 80026a8:	681b      	ldr	r3, [r3, #0]
+ 80026aa:	2204      	movs	r2, #4
+ 80026ac:	4013      	ands	r3, r2
+ 80026ae:	d109      	bne.n	80026c4 <HAL_RCC_ClockConfig+0xe0>
       {
         return HAL_ERROR;
- 800293c:	2301      	movs	r3, #1
- 800293e:	e0ca      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 80026b0:	2301      	movs	r3, #1
+ 80026b2:	e0ca      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
     }
     /* MSI is selected as System Clock Source */
     else
     {
       /* Check the MSI ready flag */
       if(__HAL_RCC_GET_FLAG(RCC_FLAG_MSIRDY) == 0U)
- 8002940:	4b69      	ldr	r3, [pc, #420]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 8002942:	681a      	ldr	r2, [r3, #0]
- 8002944:	2380      	movs	r3, #128	; 0x80
- 8002946:	009b      	lsls	r3, r3, #2
- 8002948:	4013      	ands	r3, r2
- 800294a:	d101      	bne.n	8002950 <HAL_RCC_ClockConfig+0xe0>
+ 80026b4:	4b69      	ldr	r3, [pc, #420]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 80026b6:	681a      	ldr	r2, [r3, #0]
+ 80026b8:	2380      	movs	r3, #128	; 0x80
+ 80026ba:	009b      	lsls	r3, r3, #2
+ 80026bc:	4013      	ands	r3, r2
+ 80026be:	d101      	bne.n	80026c4 <HAL_RCC_ClockConfig+0xe0>
       {
         return HAL_ERROR;
- 800294c:	2301      	movs	r3, #1
- 800294e:	e0c2      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 80026c0:	2301      	movs	r3, #1
+ 80026c2:	e0c2      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
       }
     }
     __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
- 8002950:	4b65      	ldr	r3, [pc, #404]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 8002952:	68db      	ldr	r3, [r3, #12]
- 8002954:	2203      	movs	r2, #3
- 8002956:	4393      	bics	r3, r2
- 8002958:	0019      	movs	r1, r3
- 800295a:	687b      	ldr	r3, [r7, #4]
- 800295c:	685a      	ldr	r2, [r3, #4]
- 800295e:	4b62      	ldr	r3, [pc, #392]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 8002960:	430a      	orrs	r2, r1
- 8002962:	60da      	str	r2, [r3, #12]
+ 80026c4:	4b65      	ldr	r3, [pc, #404]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 80026c6:	68db      	ldr	r3, [r3, #12]
+ 80026c8:	2203      	movs	r2, #3
+ 80026ca:	4393      	bics	r3, r2
+ 80026cc:	0019      	movs	r1, r3
+ 80026ce:	687b      	ldr	r3, [r7, #4]
+ 80026d0:	685a      	ldr	r2, [r3, #4]
+ 80026d2:	4b62      	ldr	r3, [pc, #392]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 80026d4:	430a      	orrs	r2, r1
+ 80026d6:	60da      	str	r2, [r3, #12]
 
     /* Get Start Tick */
     tickstart = HAL_GetTick();
- 8002964:	f7fe fd98 	bl	8001498 <HAL_GetTick>
- 8002968:	0003      	movs	r3, r0
- 800296a:	60fb      	str	r3, [r7, #12]
+ 80026d8:	f7fe fe20 	bl	800131c <HAL_GetTick>
+ 80026dc:	0003      	movs	r3, r0
+ 80026de:	60fb      	str	r3, [r7, #12]
 
     if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- 800296c:	687b      	ldr	r3, [r7, #4]
- 800296e:	685b      	ldr	r3, [r3, #4]
- 8002970:	2b02      	cmp	r3, #2
- 8002972:	d111      	bne.n	8002998 <HAL_RCC_ClockConfig+0x128>
+ 80026e0:	687b      	ldr	r3, [r7, #4]
+ 80026e2:	685b      	ldr	r3, [r3, #4]
+ 80026e4:	2b02      	cmp	r3, #2
+ 80026e6:	d111      	bne.n	800270c <HAL_RCC_ClockConfig+0x128>
     {
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
- 8002974:	e009      	b.n	800298a <HAL_RCC_ClockConfig+0x11a>
+ 80026e8:	e009      	b.n	80026fe <HAL_RCC_ClockConfig+0x11a>
       {
         if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
- 8002976:	f7fe fd8f 	bl	8001498 <HAL_GetTick>
- 800297a:	0002      	movs	r2, r0
- 800297c:	68fb      	ldr	r3, [r7, #12]
- 800297e:	1ad3      	subs	r3, r2, r3
- 8002980:	4a58      	ldr	r2, [pc, #352]	; (8002ae4 <HAL_RCC_ClockConfig+0x274>)
- 8002982:	4293      	cmp	r3, r2
- 8002984:	d901      	bls.n	800298a <HAL_RCC_ClockConfig+0x11a>
+ 80026ea:	f7fe fe17 	bl	800131c <HAL_GetTick>
+ 80026ee:	0002      	movs	r2, r0
+ 80026f0:	68fb      	ldr	r3, [r7, #12]
+ 80026f2:	1ad3      	subs	r3, r2, r3
+ 80026f4:	4a58      	ldr	r2, [pc, #352]	; (8002858 <HAL_RCC_ClockConfig+0x274>)
+ 80026f6:	4293      	cmp	r3, r2
+ 80026f8:	d901      	bls.n	80026fe <HAL_RCC_ClockConfig+0x11a>
         {
           return HAL_TIMEOUT;
- 8002986:	2303      	movs	r3, #3
- 8002988:	e0a5      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 80026fa:	2303      	movs	r3, #3
+ 80026fc:	e0a5      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
- 800298a:	4b57      	ldr	r3, [pc, #348]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 800298c:	68db      	ldr	r3, [r3, #12]
- 800298e:	220c      	movs	r2, #12
- 8002990:	4013      	ands	r3, r2
- 8002992:	2b08      	cmp	r3, #8
- 8002994:	d1ef      	bne.n	8002976 <HAL_RCC_ClockConfig+0x106>
- 8002996:	e03a      	b.n	8002a0e <HAL_RCC_ClockConfig+0x19e>
+ 80026fe:	4b57      	ldr	r3, [pc, #348]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 8002700:	68db      	ldr	r3, [r3, #12]
+ 8002702:	220c      	movs	r2, #12
+ 8002704:	4013      	ands	r3, r2
+ 8002706:	2b08      	cmp	r3, #8
+ 8002708:	d1ef      	bne.n	80026ea <HAL_RCC_ClockConfig+0x106>
+ 800270a:	e03a      	b.n	8002782 <HAL_RCC_ClockConfig+0x19e>
         }
       }
     }
     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
- 8002998:	687b      	ldr	r3, [r7, #4]
- 800299a:	685b      	ldr	r3, [r3, #4]
- 800299c:	2b03      	cmp	r3, #3
- 800299e:	d111      	bne.n	80029c4 <HAL_RCC_ClockConfig+0x154>
+ 800270c:	687b      	ldr	r3, [r7, #4]
+ 800270e:	685b      	ldr	r3, [r3, #4]
+ 8002710:	2b03      	cmp	r3, #3
+ 8002712:	d111      	bne.n	8002738 <HAL_RCC_ClockConfig+0x154>
     {
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 80029a0:	e009      	b.n	80029b6 <HAL_RCC_ClockConfig+0x146>
+ 8002714:	e009      	b.n	800272a <HAL_RCC_ClockConfig+0x146>
       {
         if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
- 80029a2:	f7fe fd79 	bl	8001498 <HAL_GetTick>
- 80029a6:	0002      	movs	r2, r0
- 80029a8:	68fb      	ldr	r3, [r7, #12]
- 80029aa:	1ad3      	subs	r3, r2, r3
- 80029ac:	4a4d      	ldr	r2, [pc, #308]	; (8002ae4 <HAL_RCC_ClockConfig+0x274>)
- 80029ae:	4293      	cmp	r3, r2
- 80029b0:	d901      	bls.n	80029b6 <HAL_RCC_ClockConfig+0x146>
+ 8002716:	f7fe fe01 	bl	800131c <HAL_GetTick>
+ 800271a:	0002      	movs	r2, r0
+ 800271c:	68fb      	ldr	r3, [r7, #12]
+ 800271e:	1ad3      	subs	r3, r2, r3
+ 8002720:	4a4d      	ldr	r2, [pc, #308]	; (8002858 <HAL_RCC_ClockConfig+0x274>)
+ 8002722:	4293      	cmp	r3, r2
+ 8002724:	d901      	bls.n	800272a <HAL_RCC_ClockConfig+0x146>
         {
           return HAL_TIMEOUT;
- 80029b2:	2303      	movs	r3, #3
- 80029b4:	e08f      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 8002726:	2303      	movs	r3, #3
+ 8002728:	e08f      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
- 80029b6:	4b4c      	ldr	r3, [pc, #304]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 80029b8:	68db      	ldr	r3, [r3, #12]
- 80029ba:	220c      	movs	r2, #12
- 80029bc:	4013      	ands	r3, r2
- 80029be:	2b0c      	cmp	r3, #12
- 80029c0:	d1ef      	bne.n	80029a2 <HAL_RCC_ClockConfig+0x132>
- 80029c2:	e024      	b.n	8002a0e <HAL_RCC_ClockConfig+0x19e>
+ 800272a:	4b4c      	ldr	r3, [pc, #304]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 800272c:	68db      	ldr	r3, [r3, #12]
+ 800272e:	220c      	movs	r2, #12
+ 8002730:	4013      	ands	r3, r2
+ 8002732:	2b0c      	cmp	r3, #12
+ 8002734:	d1ef      	bne.n	8002716 <HAL_RCC_ClockConfig+0x132>
+ 8002736:	e024      	b.n	8002782 <HAL_RCC_ClockConfig+0x19e>
         }
       }
     }
     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI)
- 80029c4:	687b      	ldr	r3, [r7, #4]
- 80029c6:	685b      	ldr	r3, [r3, #4]
- 80029c8:	2b01      	cmp	r3, #1
- 80029ca:	d11b      	bne.n	8002a04 <HAL_RCC_ClockConfig+0x194>
+ 8002738:	687b      	ldr	r3, [r7, #4]
+ 800273a:	685b      	ldr	r3, [r3, #4]
+ 800273c:	2b01      	cmp	r3, #1
+ 800273e:	d11b      	bne.n	8002778 <HAL_RCC_ClockConfig+0x194>
     {
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
- 80029cc:	e009      	b.n	80029e2 <HAL_RCC_ClockConfig+0x172>
+ 8002740:	e009      	b.n	8002756 <HAL_RCC_ClockConfig+0x172>
       {
         if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
- 80029ce:	f7fe fd63 	bl	8001498 <HAL_GetTick>
- 80029d2:	0002      	movs	r2, r0
- 80029d4:	68fb      	ldr	r3, [r7, #12]
- 80029d6:	1ad3      	subs	r3, r2, r3
- 80029d8:	4a42      	ldr	r2, [pc, #264]	; (8002ae4 <HAL_RCC_ClockConfig+0x274>)
- 80029da:	4293      	cmp	r3, r2
- 80029dc:	d901      	bls.n	80029e2 <HAL_RCC_ClockConfig+0x172>
+ 8002742:	f7fe fdeb 	bl	800131c <HAL_GetTick>
+ 8002746:	0002      	movs	r2, r0
+ 8002748:	68fb      	ldr	r3, [r7, #12]
+ 800274a:	1ad3      	subs	r3, r2, r3
+ 800274c:	4a42      	ldr	r2, [pc, #264]	; (8002858 <HAL_RCC_ClockConfig+0x274>)
+ 800274e:	4293      	cmp	r3, r2
+ 8002750:	d901      	bls.n	8002756 <HAL_RCC_ClockConfig+0x172>
         {
           return HAL_TIMEOUT;
- 80029de:	2303      	movs	r3, #3
- 80029e0:	e079      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 8002752:	2303      	movs	r3, #3
+ 8002754:	e079      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
       while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
- 80029e2:	4b41      	ldr	r3, [pc, #260]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 80029e4:	68db      	ldr	r3, [r3, #12]
- 80029e6:	220c      	movs	r2, #12
- 80029e8:	4013      	ands	r3, r2
- 80029ea:	2b04      	cmp	r3, #4
- 80029ec:	d1ef      	bne.n	80029ce <HAL_RCC_ClockConfig+0x15e>
- 80029ee:	e00e      	b.n	8002a0e <HAL_RCC_ClockConfig+0x19e>
+ 8002756:	4b41      	ldr	r3, [pc, #260]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 8002758:	68db      	ldr	r3, [r3, #12]
+ 800275a:	220c      	movs	r2, #12
+ 800275c:	4013      	ands	r3, r2
+ 800275e:	2b04      	cmp	r3, #4
+ 8002760:	d1ef      	bne.n	8002742 <HAL_RCC_ClockConfig+0x15e>
+ 8002762:	e00e      	b.n	8002782 <HAL_RCC_ClockConfig+0x19e>
     }
     else
     {
       while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI)
       {
         if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
- 80029f0:	f7fe fd52 	bl	8001498 <HAL_GetTick>
- 80029f4:	0002      	movs	r2, r0
- 80029f6:	68fb      	ldr	r3, [r7, #12]
- 80029f8:	1ad3      	subs	r3, r2, r3
- 80029fa:	4a3a      	ldr	r2, [pc, #232]	; (8002ae4 <HAL_RCC_ClockConfig+0x274>)
- 80029fc:	4293      	cmp	r3, r2
- 80029fe:	d901      	bls.n	8002a04 <HAL_RCC_ClockConfig+0x194>
+ 8002764:	f7fe fdda 	bl	800131c <HAL_GetTick>
+ 8002768:	0002      	movs	r2, r0
+ 800276a:	68fb      	ldr	r3, [r7, #12]
+ 800276c:	1ad3      	subs	r3, r2, r3
+ 800276e:	4a3a      	ldr	r2, [pc, #232]	; (8002858 <HAL_RCC_ClockConfig+0x274>)
+ 8002770:	4293      	cmp	r3, r2
+ 8002772:	d901      	bls.n	8002778 <HAL_RCC_ClockConfig+0x194>
         {
           return HAL_TIMEOUT;
- 8002a00:	2303      	movs	r3, #3
- 8002a02:	e068      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 8002774:	2303      	movs	r3, #3
+ 8002776:	e068      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
       while(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_MSI)
- 8002a04:	4b38      	ldr	r3, [pc, #224]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 8002a06:	68db      	ldr	r3, [r3, #12]
- 8002a08:	220c      	movs	r2, #12
- 8002a0a:	4013      	ands	r3, r2
- 8002a0c:	d1f0      	bne.n	80029f0 <HAL_RCC_ClockConfig+0x180>
+ 8002778:	4b38      	ldr	r3, [pc, #224]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 800277a:	68db      	ldr	r3, [r3, #12]
+ 800277c:	220c      	movs	r2, #12
+ 800277e:	4013      	ands	r3, r2
+ 8002780:	d1f0      	bne.n	8002764 <HAL_RCC_ClockConfig+0x180>
         }
       }
     }
   }
   /* Decreasing the number of wait states because of lower CPU frequency */
   if(FLatency < __HAL_FLASH_GET_LATENCY())
- 8002a0e:	4b34      	ldr	r3, [pc, #208]	; (8002ae0 <HAL_RCC_ClockConfig+0x270>)
- 8002a10:	681b      	ldr	r3, [r3, #0]
- 8002a12:	2201      	movs	r2, #1
- 8002a14:	4013      	ands	r3, r2
- 8002a16:	683a      	ldr	r2, [r7, #0]
- 8002a18:	429a      	cmp	r2, r3
- 8002a1a:	d21e      	bcs.n	8002a5a <HAL_RCC_ClockConfig+0x1ea>
+ 8002782:	4b34      	ldr	r3, [pc, #208]	; (8002854 <HAL_RCC_ClockConfig+0x270>)
+ 8002784:	681b      	ldr	r3, [r3, #0]
+ 8002786:	2201      	movs	r2, #1
+ 8002788:	4013      	ands	r3, r2
+ 800278a:	683a      	ldr	r2, [r7, #0]
+ 800278c:	429a      	cmp	r2, r3
+ 800278e:	d21e      	bcs.n	80027ce <HAL_RCC_ClockConfig+0x1ea>
   {
     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
     __HAL_FLASH_SET_LATENCY(FLatency);
- 8002a1c:	4b30      	ldr	r3, [pc, #192]	; (8002ae0 <HAL_RCC_ClockConfig+0x270>)
- 8002a1e:	681b      	ldr	r3, [r3, #0]
- 8002a20:	2201      	movs	r2, #1
- 8002a22:	4393      	bics	r3, r2
- 8002a24:	0019      	movs	r1, r3
- 8002a26:	4b2e      	ldr	r3, [pc, #184]	; (8002ae0 <HAL_RCC_ClockConfig+0x270>)
- 8002a28:	683a      	ldr	r2, [r7, #0]
- 8002a2a:	430a      	orrs	r2, r1
- 8002a2c:	601a      	str	r2, [r3, #0]
+ 8002790:	4b30      	ldr	r3, [pc, #192]	; (8002854 <HAL_RCC_ClockConfig+0x270>)
+ 8002792:	681b      	ldr	r3, [r3, #0]
+ 8002794:	2201      	movs	r2, #1
+ 8002796:	4393      	bics	r3, r2
+ 8002798:	0019      	movs	r1, r3
+ 800279a:	4b2e      	ldr	r3, [pc, #184]	; (8002854 <HAL_RCC_ClockConfig+0x270>)
+ 800279c:	683a      	ldr	r2, [r7, #0]
+ 800279e:	430a      	orrs	r2, r1
+ 80027a0:	601a      	str	r2, [r3, #0]
 
     /* Check that the new number of wait states is taken into account to access the Flash
     memory by polling the FLASH_ACR register */
     tickstart = HAL_GetTick();
- 8002a2e:	f7fe fd33 	bl	8001498 <HAL_GetTick>
- 8002a32:	0003      	movs	r3, r0
- 8002a34:	60fb      	str	r3, [r7, #12]
+ 80027a2:	f7fe fdbb 	bl	800131c <HAL_GetTick>
+ 80027a6:	0003      	movs	r3, r0
+ 80027a8:	60fb      	str	r3, [r7, #12]
 
     while (__HAL_FLASH_GET_LATENCY() != FLatency)
- 8002a36:	e009      	b.n	8002a4c <HAL_RCC_ClockConfig+0x1dc>
+ 80027aa:	e009      	b.n	80027c0 <HAL_RCC_ClockConfig+0x1dc>
     {
       if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
- 8002a38:	f7fe fd2e 	bl	8001498 <HAL_GetTick>
- 8002a3c:	0002      	movs	r2, r0
- 8002a3e:	68fb      	ldr	r3, [r7, #12]
- 8002a40:	1ad3      	subs	r3, r2, r3
- 8002a42:	4a28      	ldr	r2, [pc, #160]	; (8002ae4 <HAL_RCC_ClockConfig+0x274>)
- 8002a44:	4293      	cmp	r3, r2
- 8002a46:	d901      	bls.n	8002a4c <HAL_RCC_ClockConfig+0x1dc>
+ 80027ac:	f7fe fdb6 	bl	800131c <HAL_GetTick>
+ 80027b0:	0002      	movs	r2, r0
+ 80027b2:	68fb      	ldr	r3, [r7, #12]
+ 80027b4:	1ad3      	subs	r3, r2, r3
+ 80027b6:	4a28      	ldr	r2, [pc, #160]	; (8002858 <HAL_RCC_ClockConfig+0x274>)
+ 80027b8:	4293      	cmp	r3, r2
+ 80027ba:	d901      	bls.n	80027c0 <HAL_RCC_ClockConfig+0x1dc>
       {
         return HAL_TIMEOUT;
- 8002a48:	2303      	movs	r3, #3
- 8002a4a:	e044      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 80027bc:	2303      	movs	r3, #3
+ 80027be:	e044      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
     while (__HAL_FLASH_GET_LATENCY() != FLatency)
- 8002a4c:	4b24      	ldr	r3, [pc, #144]	; (8002ae0 <HAL_RCC_ClockConfig+0x270>)
- 8002a4e:	681b      	ldr	r3, [r3, #0]
- 8002a50:	2201      	movs	r2, #1
- 8002a52:	4013      	ands	r3, r2
- 8002a54:	683a      	ldr	r2, [r7, #0]
- 8002a56:	429a      	cmp	r2, r3
- 8002a58:	d1ee      	bne.n	8002a38 <HAL_RCC_ClockConfig+0x1c8>
+ 80027c0:	4b24      	ldr	r3, [pc, #144]	; (8002854 <HAL_RCC_ClockConfig+0x270>)
+ 80027c2:	681b      	ldr	r3, [r3, #0]
+ 80027c4:	2201      	movs	r2, #1
+ 80027c6:	4013      	ands	r3, r2
+ 80027c8:	683a      	ldr	r2, [r7, #0]
+ 80027ca:	429a      	cmp	r2, r3
+ 80027cc:	d1ee      	bne.n	80027ac <HAL_RCC_ClockConfig+0x1c8>
       }
     }
   }
 
   /*-------------------------- PCLK1 Configuration ---------------------------*/
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
- 8002a5a:	687b      	ldr	r3, [r7, #4]
- 8002a5c:	681b      	ldr	r3, [r3, #0]
- 8002a5e:	2204      	movs	r2, #4
- 8002a60:	4013      	ands	r3, r2
- 8002a62:	d009      	beq.n	8002a78 <HAL_RCC_ClockConfig+0x208>
+ 80027ce:	687b      	ldr	r3, [r7, #4]
+ 80027d0:	681b      	ldr	r3, [r3, #0]
+ 80027d2:	2204      	movs	r2, #4
+ 80027d4:	4013      	ands	r3, r2
+ 80027d6:	d009      	beq.n	80027ec <HAL_RCC_ClockConfig+0x208>
   {
     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
- 8002a64:	4b20      	ldr	r3, [pc, #128]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 8002a66:	68db      	ldr	r3, [r3, #12]
- 8002a68:	4a20      	ldr	r2, [pc, #128]	; (8002aec <HAL_RCC_ClockConfig+0x27c>)
- 8002a6a:	4013      	ands	r3, r2
- 8002a6c:	0019      	movs	r1, r3
- 8002a6e:	687b      	ldr	r3, [r7, #4]
- 8002a70:	68da      	ldr	r2, [r3, #12]
- 8002a72:	4b1d      	ldr	r3, [pc, #116]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 8002a74:	430a      	orrs	r2, r1
- 8002a76:	60da      	str	r2, [r3, #12]
+ 80027d8:	4b20      	ldr	r3, [pc, #128]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 80027da:	68db      	ldr	r3, [r3, #12]
+ 80027dc:	4a20      	ldr	r2, [pc, #128]	; (8002860 <HAL_RCC_ClockConfig+0x27c>)
+ 80027de:	4013      	ands	r3, r2
+ 80027e0:	0019      	movs	r1, r3
+ 80027e2:	687b      	ldr	r3, [r7, #4]
+ 80027e4:	68da      	ldr	r2, [r3, #12]
+ 80027e6:	4b1d      	ldr	r3, [pc, #116]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 80027e8:	430a      	orrs	r2, r1
+ 80027ea:	60da      	str	r2, [r3, #12]
   }
 
   /*-------------------------- PCLK2 Configuration ---------------------------*/
   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
- 8002a78:	687b      	ldr	r3, [r7, #4]
- 8002a7a:	681b      	ldr	r3, [r3, #0]
- 8002a7c:	2208      	movs	r2, #8
- 8002a7e:	4013      	ands	r3, r2
- 8002a80:	d00a      	beq.n	8002a98 <HAL_RCC_ClockConfig+0x228>
+ 80027ec:	687b      	ldr	r3, [r7, #4]
+ 80027ee:	681b      	ldr	r3, [r3, #0]
+ 80027f0:	2208      	movs	r2, #8
+ 80027f2:	4013      	ands	r3, r2
+ 80027f4:	d00a      	beq.n	800280c <HAL_RCC_ClockConfig+0x228>
   {
     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
- 8002a82:	4b19      	ldr	r3, [pc, #100]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 8002a84:	68db      	ldr	r3, [r3, #12]
- 8002a86:	4a1a      	ldr	r2, [pc, #104]	; (8002af0 <HAL_RCC_ClockConfig+0x280>)
- 8002a88:	4013      	ands	r3, r2
- 8002a8a:	0019      	movs	r1, r3
- 8002a8c:	687b      	ldr	r3, [r7, #4]
- 8002a8e:	691b      	ldr	r3, [r3, #16]
- 8002a90:	00da      	lsls	r2, r3, #3
- 8002a92:	4b15      	ldr	r3, [pc, #84]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 8002a94:	430a      	orrs	r2, r1
- 8002a96:	60da      	str	r2, [r3, #12]
+ 80027f6:	4b19      	ldr	r3, [pc, #100]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 80027f8:	68db      	ldr	r3, [r3, #12]
+ 80027fa:	4a1a      	ldr	r2, [pc, #104]	; (8002864 <HAL_RCC_ClockConfig+0x280>)
+ 80027fc:	4013      	ands	r3, r2
+ 80027fe:	0019      	movs	r1, r3
+ 8002800:	687b      	ldr	r3, [r7, #4]
+ 8002802:	691b      	ldr	r3, [r3, #16]
+ 8002804:	00da      	lsls	r2, r3, #3
+ 8002806:	4b15      	ldr	r3, [pc, #84]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 8002808:	430a      	orrs	r2, r1
+ 800280a:	60da      	str	r2, [r3, #12]
   }
 
   /* Update the SystemCoreClock global variable */
   SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_Pos];
- 8002a98:	f000 f8c4 	bl	8002c24 <HAL_RCC_GetSysClockFreq>
- 8002a9c:	0001      	movs	r1, r0
- 8002a9e:	4b12      	ldr	r3, [pc, #72]	; (8002ae8 <HAL_RCC_ClockConfig+0x278>)
- 8002aa0:	68db      	ldr	r3, [r3, #12]
- 8002aa2:	091b      	lsrs	r3, r3, #4
- 8002aa4:	220f      	movs	r2, #15
- 8002aa6:	4013      	ands	r3, r2
- 8002aa8:	4a12      	ldr	r2, [pc, #72]	; (8002af4 <HAL_RCC_ClockConfig+0x284>)
- 8002aaa:	5cd3      	ldrb	r3, [r2, r3]
- 8002aac:	000a      	movs	r2, r1
- 8002aae:	40da      	lsrs	r2, r3
- 8002ab0:	4b11      	ldr	r3, [pc, #68]	; (8002af8 <HAL_RCC_ClockConfig+0x288>)
- 8002ab2:	601a      	str	r2, [r3, #0]
+ 800280c:	f000 f8c4 	bl	8002998 <HAL_RCC_GetSysClockFreq>
+ 8002810:	0001      	movs	r1, r0
+ 8002812:	4b12      	ldr	r3, [pc, #72]	; (800285c <HAL_RCC_ClockConfig+0x278>)
+ 8002814:	68db      	ldr	r3, [r3, #12]
+ 8002816:	091b      	lsrs	r3, r3, #4
+ 8002818:	220f      	movs	r2, #15
+ 800281a:	4013      	ands	r3, r2
+ 800281c:	4a12      	ldr	r2, [pc, #72]	; (8002868 <HAL_RCC_ClockConfig+0x284>)
+ 800281e:	5cd3      	ldrb	r3, [r2, r3]
+ 8002820:	000a      	movs	r2, r1
+ 8002822:	40da      	lsrs	r2, r3
+ 8002824:	4b11      	ldr	r3, [pc, #68]	; (800286c <HAL_RCC_ClockConfig+0x288>)
+ 8002826:	601a      	str	r2, [r3, #0]
 
   /* Configure the source of time base considering new system clocks settings*/
   status = HAL_InitTick(uwTickPrio);
- 8002ab4:	4b11      	ldr	r3, [pc, #68]	; (8002afc <HAL_RCC_ClockConfig+0x28c>)
- 8002ab6:	681b      	ldr	r3, [r3, #0]
- 8002ab8:	250b      	movs	r5, #11
- 8002aba:	197c      	adds	r4, r7, r5
- 8002abc:	0018      	movs	r0, r3
- 8002abe:	f7fe fca5 	bl	800140c <HAL_InitTick>
- 8002ac2:	0003      	movs	r3, r0
- 8002ac4:	7023      	strb	r3, [r4, #0]
+ 8002828:	4b11      	ldr	r3, [pc, #68]	; (8002870 <HAL_RCC_ClockConfig+0x28c>)
+ 800282a:	681b      	ldr	r3, [r3, #0]
+ 800282c:	250b      	movs	r5, #11
+ 800282e:	197c      	adds	r4, r7, r5
+ 8002830:	0018      	movs	r0, r3
+ 8002832:	f7fe fd2d 	bl	8001290 <HAL_InitTick>
+ 8002836:	0003      	movs	r3, r0
+ 8002838:	7023      	strb	r3, [r4, #0]
   if(status != HAL_OK)
- 8002ac6:	197b      	adds	r3, r7, r5
- 8002ac8:	781b      	ldrb	r3, [r3, #0]
- 8002aca:	2b00      	cmp	r3, #0
- 8002acc:	d002      	beq.n	8002ad4 <HAL_RCC_ClockConfig+0x264>
+ 800283a:	197b      	adds	r3, r7, r5
+ 800283c:	781b      	ldrb	r3, [r3, #0]
+ 800283e:	2b00      	cmp	r3, #0
+ 8002840:	d002      	beq.n	8002848 <HAL_RCC_ClockConfig+0x264>
   {
     return status;
- 8002ace:	197b      	adds	r3, r7, r5
- 8002ad0:	781b      	ldrb	r3, [r3, #0]
- 8002ad2:	e000      	b.n	8002ad6 <HAL_RCC_ClockConfig+0x266>
+ 8002842:	197b      	adds	r3, r7, r5
+ 8002844:	781b      	ldrb	r3, [r3, #0]
+ 8002846:	e000      	b.n	800284a <HAL_RCC_ClockConfig+0x266>
   }
 
   return HAL_OK;
- 8002ad4:	2300      	movs	r3, #0
+ 8002848:	2300      	movs	r3, #0
 }
- 8002ad6:	0018      	movs	r0, r3
- 8002ad8:	46bd      	mov	sp, r7
- 8002ada:	b004      	add	sp, #16
- 8002adc:	bdb0      	pop	{r4, r5, r7, pc}
- 8002ade:	46c0      	nop			; (mov r8, r8)
- 8002ae0:	40022000 	.word	0x40022000
- 8002ae4:	00001388 	.word	0x00001388
- 8002ae8:	40021000 	.word	0x40021000
- 8002aec:	fffff8ff 	.word	0xfffff8ff
- 8002af0:	ffffc7ff 	.word	0xffffc7ff
- 8002af4:	080059d8 	.word	0x080059d8
- 8002af8:	20000000 	.word	0x20000000
- 8002afc:	20000004 	.word	0x20000004
+ 800284a:	0018      	movs	r0, r3
+ 800284c:	46bd      	mov	sp, r7
+ 800284e:	b004      	add	sp, #16
+ 8002850:	bdb0      	pop	{r4, r5, r7, pc}
+ 8002852:	46c0      	nop			; (mov r8, r8)
+ 8002854:	40022000 	.word	0x40022000
+ 8002858:	00001388 	.word	0x00001388
+ 800285c:	40021000 	.word	0x40021000
+ 8002860:	fffff8ff 	.word	0xfffff8ff
+ 8002864:	ffffc7ff 	.word	0xffffc7ff
+ 8002868:	08004cb0 	.word	0x08004cb0
+ 800286c:	20000000 	.word	0x20000000
+ 8002870:	20000004 	.word	0x20000004
 
-08002b00 <HAL_RCC_MCOConfig>:
+08002874 <HAL_RCC_MCOConfig>:
   *            @arg @ref RCC_MCODIV_8  division by 8 applied to MCO clock
   *            @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock
   * @retval None
   */
 void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
 {
- 8002b00:	b590      	push	{r4, r7, lr}
- 8002b02:	b08d      	sub	sp, #52	; 0x34
- 8002b04:	af00      	add	r7, sp, #0
- 8002b06:	60f8      	str	r0, [r7, #12]
- 8002b08:	60b9      	str	r1, [r7, #8]
- 8002b0a:	607a      	str	r2, [r7, #4]
+ 8002874:	b590      	push	{r4, r7, lr}
+ 8002876:	b08d      	sub	sp, #52	; 0x34
+ 8002878:	af00      	add	r7, sp, #0
+ 800287a:	60f8      	str	r0, [r7, #12]
+ 800287c:	60b9      	str	r1, [r7, #8]
+ 800287e:	607a      	str	r2, [r7, #4]
   GPIO_InitTypeDef gpio = {0};
- 8002b0c:	241c      	movs	r4, #28
- 8002b0e:	193b      	adds	r3, r7, r4
- 8002b10:	0018      	movs	r0, r3
- 8002b12:	2314      	movs	r3, #20
- 8002b14:	001a      	movs	r2, r3
- 8002b16:	2100      	movs	r1, #0
- 8002b18:	f002 faaa 	bl	8005070 <memset>
+ 8002880:	241c      	movs	r4, #28
+ 8002882:	193b      	adds	r3, r7, r4
+ 8002884:	0018      	movs	r0, r3
+ 8002886:	2314      	movs	r3, #20
+ 8002888:	001a      	movs	r2, r3
+ 800288a:	2100      	movs	r1, #0
+ 800288c:	f001 fd5c 	bl	8004348 <memset>
   assert_param(IS_RCC_MCO(RCC_MCOx));
   assert_param(IS_RCC_MCODIV(RCC_MCODiv));
   assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
 
   /* Configure the MCO1 pin in alternate function mode */
   gpio.Mode      = GPIO_MODE_AF_PP;
- 8002b1c:	0020      	movs	r0, r4
- 8002b1e:	183b      	adds	r3, r7, r0
- 8002b20:	2202      	movs	r2, #2
- 8002b22:	605a      	str	r2, [r3, #4]
+ 8002890:	0020      	movs	r0, r4
+ 8002892:	183b      	adds	r3, r7, r0
+ 8002894:	2202      	movs	r2, #2
+ 8002896:	605a      	str	r2, [r3, #4]
   gpio.Speed     = GPIO_SPEED_FREQ_HIGH;
- 8002b24:	183b      	adds	r3, r7, r0
- 8002b26:	2202      	movs	r2, #2
- 8002b28:	60da      	str	r2, [r3, #12]
+ 8002898:	183b      	adds	r3, r7, r0
+ 800289a:	2202      	movs	r2, #2
+ 800289c:	60da      	str	r2, [r3, #12]
   gpio.Pull      = GPIO_NOPULL;
- 8002b2a:	183b      	adds	r3, r7, r0
- 8002b2c:	2200      	movs	r2, #0
- 8002b2e:	609a      	str	r2, [r3, #8]
+ 800289e:	183b      	adds	r3, r7, r0
+ 80028a0:	2200      	movs	r2, #0
+ 80028a2:	609a      	str	r2, [r3, #8]
   if(RCC_MCOx == RCC_MCO1)
- 8002b30:	68fb      	ldr	r3, [r7, #12]
- 8002b32:	2b00      	cmp	r3, #0
- 8002b34:	d11a      	bne.n	8002b6c <HAL_RCC_MCOConfig+0x6c>
+ 80028a4:	68fb      	ldr	r3, [r7, #12]
+ 80028a6:	2b00      	cmp	r3, #0
+ 80028a8:	d11a      	bne.n	80028e0 <HAL_RCC_MCOConfig+0x6c>
   {
     gpio.Pin       = MCO1_PIN;
- 8002b36:	183b      	adds	r3, r7, r0
- 8002b38:	2280      	movs	r2, #128	; 0x80
- 8002b3a:	0052      	lsls	r2, r2, #1
- 8002b3c:	601a      	str	r2, [r3, #0]
+ 80028aa:	183b      	adds	r3, r7, r0
+ 80028ac:	2280      	movs	r2, #128	; 0x80
+ 80028ae:	0052      	lsls	r2, r2, #1
+ 80028b0:	601a      	str	r2, [r3, #0]
     gpio.Alternate = GPIO_AF0_MCO;
- 8002b3e:	183b      	adds	r3, r7, r0
- 8002b40:	2200      	movs	r2, #0
- 8002b42:	611a      	str	r2, [r3, #16]
+ 80028b2:	183b      	adds	r3, r7, r0
+ 80028b4:	2200      	movs	r2, #0
+ 80028b6:	611a      	str	r2, [r3, #16]
 
     /* MCO1 Clock Enable */
     MCO1_CLK_ENABLE();
- 8002b44:	4b2d      	ldr	r3, [pc, #180]	; (8002bfc <HAL_RCC_MCOConfig+0xfc>)
- 8002b46:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8002b48:	4b2c      	ldr	r3, [pc, #176]	; (8002bfc <HAL_RCC_MCOConfig+0xfc>)
- 8002b4a:	2101      	movs	r1, #1
- 8002b4c:	430a      	orrs	r2, r1
- 8002b4e:	62da      	str	r2, [r3, #44]	; 0x2c
- 8002b50:	4b2a      	ldr	r3, [pc, #168]	; (8002bfc <HAL_RCC_MCOConfig+0xfc>)
- 8002b52:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8002b54:	2201      	movs	r2, #1
- 8002b56:	4013      	ands	r3, r2
- 8002b58:	61bb      	str	r3, [r7, #24]
- 8002b5a:	69bb      	ldr	r3, [r7, #24]
+ 80028b8:	4b2d      	ldr	r3, [pc, #180]	; (8002970 <HAL_RCC_MCOConfig+0xfc>)
+ 80028ba:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 80028bc:	4b2c      	ldr	r3, [pc, #176]	; (8002970 <HAL_RCC_MCOConfig+0xfc>)
+ 80028be:	2101      	movs	r1, #1
+ 80028c0:	430a      	orrs	r2, r1
+ 80028c2:	62da      	str	r2, [r3, #44]	; 0x2c
+ 80028c4:	4b2a      	ldr	r3, [pc, #168]	; (8002970 <HAL_RCC_MCOConfig+0xfc>)
+ 80028c6:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 80028c8:	2201      	movs	r2, #1
+ 80028ca:	4013      	ands	r3, r2
+ 80028cc:	61bb      	str	r3, [r7, #24]
+ 80028ce:	69bb      	ldr	r3, [r7, #24]
     HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio);
- 8002b5c:	183a      	adds	r2, r7, r0
- 8002b5e:	23a0      	movs	r3, #160	; 0xa0
- 8002b60:	05db      	lsls	r3, r3, #23
- 8002b62:	0011      	movs	r1, r2
- 8002b64:	0018      	movs	r0, r3
- 8002b66:	f7ff f96b 	bl	8001e40 <HAL_GPIO_Init>
- 8002b6a:	e038      	b.n	8002bde <HAL_RCC_MCOConfig+0xde>
+ 80028d0:	183a      	adds	r2, r7, r0
+ 80028d2:	23a0      	movs	r3, #160	; 0xa0
+ 80028d4:	05db      	lsls	r3, r3, #23
+ 80028d6:	0011      	movs	r1, r2
+ 80028d8:	0018      	movs	r0, r3
+ 80028da:	f7ff f96b 	bl	8001bb4 <HAL_GPIO_Init>
+ 80028de:	e038      	b.n	8002952 <HAL_RCC_MCOConfig+0xde>
   }
 #if defined(RCC_MCO3_SUPPORT)
   else if (RCC_MCOx == RCC_MCO3)
- 8002b6c:	68fb      	ldr	r3, [r7, #12]
- 8002b6e:	2b02      	cmp	r3, #2
- 8002b70:	d11a      	bne.n	8002ba8 <HAL_RCC_MCOConfig+0xa8>
+ 80028e0:	68fb      	ldr	r3, [r7, #12]
+ 80028e2:	2b02      	cmp	r3, #2
+ 80028e4:	d11a      	bne.n	800291c <HAL_RCC_MCOConfig+0xa8>
   {
     gpio.Pin       = MCO3_PIN;
- 8002b72:	201c      	movs	r0, #28
- 8002b74:	183b      	adds	r3, r7, r0
- 8002b76:	2280      	movs	r2, #128	; 0x80
- 8002b78:	0192      	lsls	r2, r2, #6
- 8002b7a:	601a      	str	r2, [r3, #0]
+ 80028e6:	201c      	movs	r0, #28
+ 80028e8:	183b      	adds	r3, r7, r0
+ 80028ea:	2280      	movs	r2, #128	; 0x80
+ 80028ec:	0192      	lsls	r2, r2, #6
+ 80028ee:	601a      	str	r2, [r3, #0]
     gpio.Alternate = MCO3_GPIO_AF;
- 8002b7c:	183b      	adds	r3, r7, r0
- 8002b7e:	2200      	movs	r2, #0
- 8002b80:	611a      	str	r2, [r3, #16]
+ 80028f0:	183b      	adds	r3, r7, r0
+ 80028f2:	2200      	movs	r2, #0
+ 80028f4:	611a      	str	r2, [r3, #16]
 
     /* MCO3 Clock Enable */
     MCO3_CLK_ENABLE();
- 8002b82:	4b1e      	ldr	r3, [pc, #120]	; (8002bfc <HAL_RCC_MCOConfig+0xfc>)
- 8002b84:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8002b86:	4b1d      	ldr	r3, [pc, #116]	; (8002bfc <HAL_RCC_MCOConfig+0xfc>)
- 8002b88:	2102      	movs	r1, #2
- 8002b8a:	430a      	orrs	r2, r1
- 8002b8c:	62da      	str	r2, [r3, #44]	; 0x2c
- 8002b8e:	4b1b      	ldr	r3, [pc, #108]	; (8002bfc <HAL_RCC_MCOConfig+0xfc>)
- 8002b90:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8002b92:	2202      	movs	r2, #2
- 8002b94:	4013      	ands	r3, r2
- 8002b96:	617b      	str	r3, [r7, #20]
- 8002b98:	697b      	ldr	r3, [r7, #20]
+ 80028f6:	4b1e      	ldr	r3, [pc, #120]	; (8002970 <HAL_RCC_MCOConfig+0xfc>)
+ 80028f8:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 80028fa:	4b1d      	ldr	r3, [pc, #116]	; (8002970 <HAL_RCC_MCOConfig+0xfc>)
+ 80028fc:	2102      	movs	r1, #2
+ 80028fe:	430a      	orrs	r2, r1
+ 8002900:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8002902:	4b1b      	ldr	r3, [pc, #108]	; (8002970 <HAL_RCC_MCOConfig+0xfc>)
+ 8002904:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 8002906:	2202      	movs	r2, #2
+ 8002908:	4013      	ands	r3, r2
+ 800290a:	617b      	str	r3, [r7, #20]
+ 800290c:	697b      	ldr	r3, [r7, #20]
     HAL_GPIO_Init(MCO3_GPIO_PORT, &gpio);
- 8002b9a:	183b      	adds	r3, r7, r0
- 8002b9c:	4a18      	ldr	r2, [pc, #96]	; (8002c00 <HAL_RCC_MCOConfig+0x100>)
- 8002b9e:	0019      	movs	r1, r3
- 8002ba0:	0010      	movs	r0, r2
- 8002ba2:	f7ff f94d 	bl	8001e40 <HAL_GPIO_Init>
- 8002ba6:	e01a      	b.n	8002bde <HAL_RCC_MCOConfig+0xde>
+ 800290e:	183b      	adds	r3, r7, r0
+ 8002910:	4a18      	ldr	r2, [pc, #96]	; (8002974 <HAL_RCC_MCOConfig+0x100>)
+ 8002912:	0019      	movs	r1, r3
+ 8002914:	0010      	movs	r0, r2
+ 8002916:	f7ff f94d 	bl	8001bb4 <HAL_GPIO_Init>
+ 800291a:	e01a      	b.n	8002952 <HAL_RCC_MCOConfig+0xde>
   }
 #endif /* RCC_MCO3_SUPPORT */
   else
   {
     gpio.Pin       = MCO2_PIN;
- 8002ba8:	201c      	movs	r0, #28
- 8002baa:	183b      	adds	r3, r7, r0
- 8002bac:	2280      	movs	r2, #128	; 0x80
- 8002bae:	0092      	lsls	r2, r2, #2
- 8002bb0:	601a      	str	r2, [r3, #0]
+ 800291c:	201c      	movs	r0, #28
+ 800291e:	183b      	adds	r3, r7, r0
+ 8002920:	2280      	movs	r2, #128	; 0x80
+ 8002922:	0092      	lsls	r2, r2, #2
+ 8002924:	601a      	str	r2, [r3, #0]
     gpio.Alternate = GPIO_AF0_MCO;
- 8002bb2:	183b      	adds	r3, r7, r0
- 8002bb4:	2200      	movs	r2, #0
- 8002bb6:	611a      	str	r2, [r3, #16]
+ 8002926:	183b      	adds	r3, r7, r0
+ 8002928:	2200      	movs	r2, #0
+ 800292a:	611a      	str	r2, [r3, #16]
 
     /* MCO2 Clock Enable */
     MCO2_CLK_ENABLE();
- 8002bb8:	4b10      	ldr	r3, [pc, #64]	; (8002bfc <HAL_RCC_MCOConfig+0xfc>)
- 8002bba:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8002bbc:	4b0f      	ldr	r3, [pc, #60]	; (8002bfc <HAL_RCC_MCOConfig+0xfc>)
- 8002bbe:	2101      	movs	r1, #1
- 8002bc0:	430a      	orrs	r2, r1
- 8002bc2:	62da      	str	r2, [r3, #44]	; 0x2c
- 8002bc4:	4b0d      	ldr	r3, [pc, #52]	; (8002bfc <HAL_RCC_MCOConfig+0xfc>)
- 8002bc6:	6adb      	ldr	r3, [r3, #44]	; 0x2c
- 8002bc8:	2201      	movs	r2, #1
- 8002bca:	4013      	ands	r3, r2
- 8002bcc:	613b      	str	r3, [r7, #16]
- 8002bce:	693b      	ldr	r3, [r7, #16]
+ 800292c:	4b10      	ldr	r3, [pc, #64]	; (8002970 <HAL_RCC_MCOConfig+0xfc>)
+ 800292e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8002930:	4b0f      	ldr	r3, [pc, #60]	; (8002970 <HAL_RCC_MCOConfig+0xfc>)
+ 8002932:	2101      	movs	r1, #1
+ 8002934:	430a      	orrs	r2, r1
+ 8002936:	62da      	str	r2, [r3, #44]	; 0x2c
+ 8002938:	4b0d      	ldr	r3, [pc, #52]	; (8002970 <HAL_RCC_MCOConfig+0xfc>)
+ 800293a:	6adb      	ldr	r3, [r3, #44]	; 0x2c
+ 800293c:	2201      	movs	r2, #1
+ 800293e:	4013      	ands	r3, r2
+ 8002940:	613b      	str	r3, [r7, #16]
+ 8002942:	693b      	ldr	r3, [r7, #16]
     HAL_GPIO_Init(MCO2_GPIO_PORT, &gpio);
- 8002bd0:	183a      	adds	r2, r7, r0
- 8002bd2:	23a0      	movs	r3, #160	; 0xa0
- 8002bd4:	05db      	lsls	r3, r3, #23
- 8002bd6:	0011      	movs	r1, r2
- 8002bd8:	0018      	movs	r0, r3
- 8002bda:	f7ff f931 	bl	8001e40 <HAL_GPIO_Init>
+ 8002944:	183a      	adds	r2, r7, r0
+ 8002946:	23a0      	movs	r3, #160	; 0xa0
+ 8002948:	05db      	lsls	r3, r3, #23
+ 800294a:	0011      	movs	r1, r2
+ 800294c:	0018      	movs	r0, r3
+ 800294e:	f7ff f931 	bl	8001bb4 <HAL_GPIO_Init>
   }
 
   /* Configure the MCO clock source */
   __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv);
- 8002bde:	4b07      	ldr	r3, [pc, #28]	; (8002bfc <HAL_RCC_MCOConfig+0xfc>)
- 8002be0:	68db      	ldr	r3, [r3, #12]
- 8002be2:	4a08      	ldr	r2, [pc, #32]	; (8002c04 <HAL_RCC_MCOConfig+0x104>)
- 8002be4:	4013      	ands	r3, r2
- 8002be6:	0019      	movs	r1, r3
- 8002be8:	68ba      	ldr	r2, [r7, #8]
- 8002bea:	687b      	ldr	r3, [r7, #4]
- 8002bec:	431a      	orrs	r2, r3
- 8002bee:	4b03      	ldr	r3, [pc, #12]	; (8002bfc <HAL_RCC_MCOConfig+0xfc>)
- 8002bf0:	430a      	orrs	r2, r1
- 8002bf2:	60da      	str	r2, [r3, #12]
+ 8002952:	4b07      	ldr	r3, [pc, #28]	; (8002970 <HAL_RCC_MCOConfig+0xfc>)
+ 8002954:	68db      	ldr	r3, [r3, #12]
+ 8002956:	4a08      	ldr	r2, [pc, #32]	; (8002978 <HAL_RCC_MCOConfig+0x104>)
+ 8002958:	4013      	ands	r3, r2
+ 800295a:	0019      	movs	r1, r3
+ 800295c:	68ba      	ldr	r2, [r7, #8]
+ 800295e:	687b      	ldr	r3, [r7, #4]
+ 8002960:	431a      	orrs	r2, r3
+ 8002962:	4b03      	ldr	r3, [pc, #12]	; (8002970 <HAL_RCC_MCOConfig+0xfc>)
+ 8002964:	430a      	orrs	r2, r1
+ 8002966:	60da      	str	r2, [r3, #12]
 }
- 8002bf4:	46c0      	nop			; (mov r8, r8)
- 8002bf6:	46bd      	mov	sp, r7
- 8002bf8:	b00d      	add	sp, #52	; 0x34
- 8002bfa:	bd90      	pop	{r4, r7, pc}
- 8002bfc:	40021000 	.word	0x40021000
- 8002c00:	50000400 	.word	0x50000400
- 8002c04:	80ffffff 	.word	0x80ffffff
+ 8002968:	46c0      	nop			; (mov r8, r8)
+ 800296a:	46bd      	mov	sp, r7
+ 800296c:	b00d      	add	sp, #52	; 0x34
+ 800296e:	bd90      	pop	{r4, r7, pc}
+ 8002970:	40021000 	.word	0x40021000
+ 8002974:	50000400 	.word	0x50000400
+ 8002978:	80ffffff 	.word	0x80ffffff
 
-08002c08 <HAL_RCC_EnableCSS>:
+0800297c <HAL_RCC_EnableCSS>:
   *         allowing the MCU to perform rescue operations. The CSSI is linked to
   *         the Cortex-M0+ NMI (Non-Maskable Interrupt) exception vector.
   * @retval None
   */
 void HAL_RCC_EnableCSS(void)
 {
- 8002c08:	b580      	push	{r7, lr}
- 8002c0a:	af00      	add	r7, sp, #0
+ 800297c:	b580      	push	{r7, lr}
+ 800297e:	af00      	add	r7, sp, #0
   SET_BIT(RCC->CR, RCC_CR_CSSON) ;
- 8002c0c:	4b04      	ldr	r3, [pc, #16]	; (8002c20 <HAL_RCC_EnableCSS+0x18>)
- 8002c0e:	681a      	ldr	r2, [r3, #0]
- 8002c10:	4b03      	ldr	r3, [pc, #12]	; (8002c20 <HAL_RCC_EnableCSS+0x18>)
- 8002c12:	2180      	movs	r1, #128	; 0x80
- 8002c14:	0309      	lsls	r1, r1, #12
- 8002c16:	430a      	orrs	r2, r1
- 8002c18:	601a      	str	r2, [r3, #0]
+ 8002980:	4b04      	ldr	r3, [pc, #16]	; (8002994 <HAL_RCC_EnableCSS+0x18>)
+ 8002982:	681a      	ldr	r2, [r3, #0]
+ 8002984:	4b03      	ldr	r3, [pc, #12]	; (8002994 <HAL_RCC_EnableCSS+0x18>)
+ 8002986:	2180      	movs	r1, #128	; 0x80
+ 8002988:	0309      	lsls	r1, r1, #12
+ 800298a:	430a      	orrs	r2, r1
+ 800298c:	601a      	str	r2, [r3, #0]
 }
- 8002c1a:	46c0      	nop			; (mov r8, r8)
- 8002c1c:	46bd      	mov	sp, r7
- 8002c1e:	bd80      	pop	{r7, pc}
- 8002c20:	40021000 	.word	0x40021000
+ 800298e:	46c0      	nop			; (mov r8, r8)
+ 8002990:	46bd      	mov	sp, r7
+ 8002992:	bd80      	pop	{r7, pc}
+ 8002994:	40021000 	.word	0x40021000
 
-08002c24 <HAL_RCC_GetSysClockFreq>:
+08002998 <HAL_RCC_GetSysClockFreq>:
   *         right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
   *
   * @retval SYSCLK frequency
   */
 uint32_t HAL_RCC_GetSysClockFreq(void)
 {
- 8002c24:	b5b0      	push	{r4, r5, r7, lr}
- 8002c26:	b08e      	sub	sp, #56	; 0x38
- 8002c28:	af00      	add	r7, sp, #0
+ 8002998:	b5b0      	push	{r4, r5, r7, lr}
+ 800299a:	b08e      	sub	sp, #56	; 0x38
+ 800299c:	af00      	add	r7, sp, #0
   uint32_t tmpreg, pllm, plld, pllvco, msiclkrange;    /* no init needed */
   uint32_t sysclockfreq;
 
   tmpreg = RCC->CFGR;
- 8002c2a:	4b4c      	ldr	r3, [pc, #304]	; (8002d5c <HAL_RCC_GetSysClockFreq+0x138>)
- 8002c2c:	68db      	ldr	r3, [r3, #12]
- 8002c2e:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 800299e:	4b4c      	ldr	r3, [pc, #304]	; (8002ad0 <HAL_RCC_GetSysClockFreq+0x138>)
+ 80029a0:	68db      	ldr	r3, [r3, #12]
+ 80029a2:	62fb      	str	r3, [r7, #44]	; 0x2c
 
   /* Get SYSCLK source -------------------------------------------------------*/
   switch (tmpreg & RCC_CFGR_SWS)
- 8002c30:	6afa      	ldr	r2, [r7, #44]	; 0x2c
- 8002c32:	230c      	movs	r3, #12
- 8002c34:	4013      	ands	r3, r2
- 8002c36:	2b0c      	cmp	r3, #12
- 8002c38:	d014      	beq.n	8002c64 <HAL_RCC_GetSysClockFreq+0x40>
- 8002c3a:	d900      	bls.n	8002c3e <HAL_RCC_GetSysClockFreq+0x1a>
- 8002c3c:	e07b      	b.n	8002d36 <HAL_RCC_GetSysClockFreq+0x112>
- 8002c3e:	2b04      	cmp	r3, #4
- 8002c40:	d002      	beq.n	8002c48 <HAL_RCC_GetSysClockFreq+0x24>
- 8002c42:	2b08      	cmp	r3, #8
- 8002c44:	d00b      	beq.n	8002c5e <HAL_RCC_GetSysClockFreq+0x3a>
- 8002c46:	e076      	b.n	8002d36 <HAL_RCC_GetSysClockFreq+0x112>
+ 80029a4:	6afa      	ldr	r2, [r7, #44]	; 0x2c
+ 80029a6:	230c      	movs	r3, #12
+ 80029a8:	4013      	ands	r3, r2
+ 80029aa:	2b0c      	cmp	r3, #12
+ 80029ac:	d014      	beq.n	80029d8 <HAL_RCC_GetSysClockFreq+0x40>
+ 80029ae:	d900      	bls.n	80029b2 <HAL_RCC_GetSysClockFreq+0x1a>
+ 80029b0:	e07b      	b.n	8002aaa <HAL_RCC_GetSysClockFreq+0x112>
+ 80029b2:	2b04      	cmp	r3, #4
+ 80029b4:	d002      	beq.n	80029bc <HAL_RCC_GetSysClockFreq+0x24>
+ 80029b6:	2b08      	cmp	r3, #8
+ 80029b8:	d00b      	beq.n	80029d2 <HAL_RCC_GetSysClockFreq+0x3a>
+ 80029ba:	e076      	b.n	8002aaa <HAL_RCC_GetSysClockFreq+0x112>
   {
     case RCC_SYSCLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
     {
       if ((RCC->CR & RCC_CR_HSIDIVF) != 0U)
- 8002c48:	4b44      	ldr	r3, [pc, #272]	; (8002d5c <HAL_RCC_GetSysClockFreq+0x138>)
- 8002c4a:	681b      	ldr	r3, [r3, #0]
- 8002c4c:	2210      	movs	r2, #16
- 8002c4e:	4013      	ands	r3, r2
- 8002c50:	d002      	beq.n	8002c58 <HAL_RCC_GetSysClockFreq+0x34>
+ 80029bc:	4b44      	ldr	r3, [pc, #272]	; (8002ad0 <HAL_RCC_GetSysClockFreq+0x138>)
+ 80029be:	681b      	ldr	r3, [r3, #0]
+ 80029c0:	2210      	movs	r2, #16
+ 80029c2:	4013      	ands	r3, r2
+ 80029c4:	d002      	beq.n	80029cc <HAL_RCC_GetSysClockFreq+0x34>
       {
         sysclockfreq =  (HSI_VALUE >> 2);
- 8002c52:	4b43      	ldr	r3, [pc, #268]	; (8002d60 <HAL_RCC_GetSysClockFreq+0x13c>)
- 8002c54:	633b      	str	r3, [r7, #48]	; 0x30
+ 80029c6:	4b43      	ldr	r3, [pc, #268]	; (8002ad4 <HAL_RCC_GetSysClockFreq+0x13c>)
+ 80029c8:	633b      	str	r3, [r7, #48]	; 0x30
       }
       else
       {
         sysclockfreq =  HSI_VALUE;
       }
       break;
- 8002c56:	e07c      	b.n	8002d52 <HAL_RCC_GetSysClockFreq+0x12e>
+ 80029ca:	e07c      	b.n	8002ac6 <HAL_RCC_GetSysClockFreq+0x12e>
         sysclockfreq =  HSI_VALUE;
- 8002c58:	4b42      	ldr	r3, [pc, #264]	; (8002d64 <HAL_RCC_GetSysClockFreq+0x140>)
- 8002c5a:	633b      	str	r3, [r7, #48]	; 0x30
+ 80029cc:	4b42      	ldr	r3, [pc, #264]	; (8002ad8 <HAL_RCC_GetSysClockFreq+0x140>)
+ 80029ce:	633b      	str	r3, [r7, #48]	; 0x30
       break;
- 8002c5c:	e079      	b.n	8002d52 <HAL_RCC_GetSysClockFreq+0x12e>
+ 80029d0:	e079      	b.n	8002ac6 <HAL_RCC_GetSysClockFreq+0x12e>
     }
     case RCC_SYSCLKSOURCE_STATUS_HSE:  /* HSE used as system clock */
     {
       sysclockfreq = HSE_VALUE;
- 8002c5e:	4b42      	ldr	r3, [pc, #264]	; (8002d68 <HAL_RCC_GetSysClockFreq+0x144>)
- 8002c60:	633b      	str	r3, [r7, #48]	; 0x30
+ 80029d2:	4b42      	ldr	r3, [pc, #264]	; (8002adc <HAL_RCC_GetSysClockFreq+0x144>)
+ 80029d4:	633b      	str	r3, [r7, #48]	; 0x30
       break;
- 8002c62:	e076      	b.n	8002d52 <HAL_RCC_GetSysClockFreq+0x12e>
+ 80029d6:	e076      	b.n	8002ac6 <HAL_RCC_GetSysClockFreq+0x12e>
     }
     case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock */
     {
       pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos];
- 8002c64:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 8002c66:	0c9a      	lsrs	r2, r3, #18
- 8002c68:	230f      	movs	r3, #15
- 8002c6a:	401a      	ands	r2, r3
- 8002c6c:	4b3f      	ldr	r3, [pc, #252]	; (8002d6c <HAL_RCC_GetSysClockFreq+0x148>)
- 8002c6e:	5c9b      	ldrb	r3, [r3, r2]
- 8002c70:	62bb      	str	r3, [r7, #40]	; 0x28
+ 80029d8:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80029da:	0c9a      	lsrs	r2, r3, #18
+ 80029dc:	230f      	movs	r3, #15
+ 80029de:	401a      	ands	r2, r3
+ 80029e0:	4b3f      	ldr	r3, [pc, #252]	; (8002ae0 <HAL_RCC_GetSysClockFreq+0x148>)
+ 80029e2:	5c9b      	ldrb	r3, [r3, r2]
+ 80029e4:	62bb      	str	r3, [r7, #40]	; 0x28
       plld = ((uint32_t)(tmpreg & RCC_CFGR_PLLDIV) >> RCC_CFGR_PLLDIV_Pos) + 1U;
- 8002c72:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 8002c74:	0d9a      	lsrs	r2, r3, #22
- 8002c76:	2303      	movs	r3, #3
- 8002c78:	4013      	ands	r3, r2
- 8002c7a:	3301      	adds	r3, #1
- 8002c7c:	627b      	str	r3, [r7, #36]	; 0x24
+ 80029e6:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80029e8:	0d9a      	lsrs	r2, r3, #22
+ 80029ea:	2303      	movs	r3, #3
+ 80029ec:	4013      	ands	r3, r2
+ 80029ee:	3301      	adds	r3, #1
+ 80029f0:	627b      	str	r3, [r7, #36]	; 0x24
       if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLSOURCE_HSI)
- 8002c7e:	4b37      	ldr	r3, [pc, #220]	; (8002d5c <HAL_RCC_GetSysClockFreq+0x138>)
- 8002c80:	68da      	ldr	r2, [r3, #12]
- 8002c82:	2380      	movs	r3, #128	; 0x80
- 8002c84:	025b      	lsls	r3, r3, #9
- 8002c86:	4013      	ands	r3, r2
- 8002c88:	d01a      	beq.n	8002cc0 <HAL_RCC_GetSysClockFreq+0x9c>
+ 80029f2:	4b37      	ldr	r3, [pc, #220]	; (8002ad0 <HAL_RCC_GetSysClockFreq+0x138>)
+ 80029f4:	68da      	ldr	r2, [r3, #12]
+ 80029f6:	2380      	movs	r3, #128	; 0x80
+ 80029f8:	025b      	lsls	r3, r3, #9
+ 80029fa:	4013      	ands	r3, r2
+ 80029fc:	d01a      	beq.n	8002a34 <HAL_RCC_GetSysClockFreq+0x9c>
       {
         /* HSE used as PLL clock source */
         pllvco = (uint32_t)(((uint64_t)HSE_VALUE * (uint64_t)pllm) / (uint64_t)plld);
- 8002c8a:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 8002c8c:	61bb      	str	r3, [r7, #24]
- 8002c8e:	2300      	movs	r3, #0
- 8002c90:	61fb      	str	r3, [r7, #28]
- 8002c92:	4a35      	ldr	r2, [pc, #212]	; (8002d68 <HAL_RCC_GetSysClockFreq+0x144>)
- 8002c94:	2300      	movs	r3, #0
- 8002c96:	69b8      	ldr	r0, [r7, #24]
- 8002c98:	69f9      	ldr	r1, [r7, #28]
- 8002c9a:	f7fd faf3 	bl	8000284 <__aeabi_lmul>
- 8002c9e:	0002      	movs	r2, r0
- 8002ca0:	000b      	movs	r3, r1
- 8002ca2:	0010      	movs	r0, r2
- 8002ca4:	0019      	movs	r1, r3
- 8002ca6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 8002ca8:	613b      	str	r3, [r7, #16]
- 8002caa:	2300      	movs	r3, #0
- 8002cac:	617b      	str	r3, [r7, #20]
- 8002cae:	693a      	ldr	r2, [r7, #16]
- 8002cb0:	697b      	ldr	r3, [r7, #20]
- 8002cb2:	f7fd fac7 	bl	8000244 <__aeabi_uldivmod>
- 8002cb6:	0002      	movs	r2, r0
- 8002cb8:	000b      	movs	r3, r1
- 8002cba:	0013      	movs	r3, r2
- 8002cbc:	637b      	str	r3, [r7, #52]	; 0x34
- 8002cbe:	e037      	b.n	8002d30 <HAL_RCC_GetSysClockFreq+0x10c>
+ 80029fe:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8002a00:	61bb      	str	r3, [r7, #24]
+ 8002a02:	2300      	movs	r3, #0
+ 8002a04:	61fb      	str	r3, [r7, #28]
+ 8002a06:	4a35      	ldr	r2, [pc, #212]	; (8002adc <HAL_RCC_GetSysClockFreq+0x144>)
+ 8002a08:	2300      	movs	r3, #0
+ 8002a0a:	69b8      	ldr	r0, [r7, #24]
+ 8002a0c:	69f9      	ldr	r1, [r7, #28]
+ 8002a0e:	f7fd fc39 	bl	8000284 <__aeabi_lmul>
+ 8002a12:	0002      	movs	r2, r0
+ 8002a14:	000b      	movs	r3, r1
+ 8002a16:	0010      	movs	r0, r2
+ 8002a18:	0019      	movs	r1, r3
+ 8002a1a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8002a1c:	613b      	str	r3, [r7, #16]
+ 8002a1e:	2300      	movs	r3, #0
+ 8002a20:	617b      	str	r3, [r7, #20]
+ 8002a22:	693a      	ldr	r2, [r7, #16]
+ 8002a24:	697b      	ldr	r3, [r7, #20]
+ 8002a26:	f7fd fc0d 	bl	8000244 <__aeabi_uldivmod>
+ 8002a2a:	0002      	movs	r2, r0
+ 8002a2c:	000b      	movs	r3, r1
+ 8002a2e:	0013      	movs	r3, r2
+ 8002a30:	637b      	str	r3, [r7, #52]	; 0x34
+ 8002a32:	e037      	b.n	8002aa4 <HAL_RCC_GetSysClockFreq+0x10c>
       }
       else
       {
         if ((RCC->CR & RCC_CR_HSIDIVF) != 0U)
- 8002cc0:	4b26      	ldr	r3, [pc, #152]	; (8002d5c <HAL_RCC_GetSysClockFreq+0x138>)
- 8002cc2:	681b      	ldr	r3, [r3, #0]
- 8002cc4:	2210      	movs	r2, #16
- 8002cc6:	4013      	ands	r3, r2
- 8002cc8:	d01a      	beq.n	8002d00 <HAL_RCC_GetSysClockFreq+0xdc>
+ 8002a34:	4b26      	ldr	r3, [pc, #152]	; (8002ad0 <HAL_RCC_GetSysClockFreq+0x138>)
+ 8002a36:	681b      	ldr	r3, [r3, #0]
+ 8002a38:	2210      	movs	r2, #16
+ 8002a3a:	4013      	ands	r3, r2
+ 8002a3c:	d01a      	beq.n	8002a74 <HAL_RCC_GetSysClockFreq+0xdc>
         {
           pllvco = (uint32_t)((((uint64_t)(HSI_VALUE >> 2)) * (uint64_t)pllm) / (uint64_t)plld);
- 8002cca:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 8002ccc:	60bb      	str	r3, [r7, #8]
- 8002cce:	2300      	movs	r3, #0
- 8002cd0:	60fb      	str	r3, [r7, #12]
- 8002cd2:	4a23      	ldr	r2, [pc, #140]	; (8002d60 <HAL_RCC_GetSysClockFreq+0x13c>)
- 8002cd4:	2300      	movs	r3, #0
- 8002cd6:	68b8      	ldr	r0, [r7, #8]
- 8002cd8:	68f9      	ldr	r1, [r7, #12]
- 8002cda:	f7fd fad3 	bl	8000284 <__aeabi_lmul>
- 8002cde:	0002      	movs	r2, r0
- 8002ce0:	000b      	movs	r3, r1
- 8002ce2:	0010      	movs	r0, r2
- 8002ce4:	0019      	movs	r1, r3
- 8002ce6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 8002ce8:	603b      	str	r3, [r7, #0]
- 8002cea:	2300      	movs	r3, #0
- 8002cec:	607b      	str	r3, [r7, #4]
- 8002cee:	683a      	ldr	r2, [r7, #0]
- 8002cf0:	687b      	ldr	r3, [r7, #4]
- 8002cf2:	f7fd faa7 	bl	8000244 <__aeabi_uldivmod>
- 8002cf6:	0002      	movs	r2, r0
- 8002cf8:	000b      	movs	r3, r1
- 8002cfa:	0013      	movs	r3, r2
- 8002cfc:	637b      	str	r3, [r7, #52]	; 0x34
- 8002cfe:	e017      	b.n	8002d30 <HAL_RCC_GetSysClockFreq+0x10c>
+ 8002a3e:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8002a40:	60bb      	str	r3, [r7, #8]
+ 8002a42:	2300      	movs	r3, #0
+ 8002a44:	60fb      	str	r3, [r7, #12]
+ 8002a46:	4a23      	ldr	r2, [pc, #140]	; (8002ad4 <HAL_RCC_GetSysClockFreq+0x13c>)
+ 8002a48:	2300      	movs	r3, #0
+ 8002a4a:	68b8      	ldr	r0, [r7, #8]
+ 8002a4c:	68f9      	ldr	r1, [r7, #12]
+ 8002a4e:	f7fd fc19 	bl	8000284 <__aeabi_lmul>
+ 8002a52:	0002      	movs	r2, r0
+ 8002a54:	000b      	movs	r3, r1
+ 8002a56:	0010      	movs	r0, r2
+ 8002a58:	0019      	movs	r1, r3
+ 8002a5a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8002a5c:	603b      	str	r3, [r7, #0]
+ 8002a5e:	2300      	movs	r3, #0
+ 8002a60:	607b      	str	r3, [r7, #4]
+ 8002a62:	683a      	ldr	r2, [r7, #0]
+ 8002a64:	687b      	ldr	r3, [r7, #4]
+ 8002a66:	f7fd fbed 	bl	8000244 <__aeabi_uldivmod>
+ 8002a6a:	0002      	movs	r2, r0
+ 8002a6c:	000b      	movs	r3, r1
+ 8002a6e:	0013      	movs	r3, r2
+ 8002a70:	637b      	str	r3, [r7, #52]	; 0x34
+ 8002a72:	e017      	b.n	8002aa4 <HAL_RCC_GetSysClockFreq+0x10c>
         }
         else
         {
          pllvco = (uint32_t)(((uint64_t)HSI_VALUE * (uint64_t)pllm) / (uint64_t)plld);
- 8002d00:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 8002d02:	0018      	movs	r0, r3
- 8002d04:	2300      	movs	r3, #0
- 8002d06:	0019      	movs	r1, r3
- 8002d08:	4a16      	ldr	r2, [pc, #88]	; (8002d64 <HAL_RCC_GetSysClockFreq+0x140>)
- 8002d0a:	2300      	movs	r3, #0
- 8002d0c:	f7fd faba 	bl	8000284 <__aeabi_lmul>
- 8002d10:	0002      	movs	r2, r0
- 8002d12:	000b      	movs	r3, r1
- 8002d14:	0010      	movs	r0, r2
- 8002d16:	0019      	movs	r1, r3
- 8002d18:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 8002d1a:	001c      	movs	r4, r3
- 8002d1c:	2300      	movs	r3, #0
- 8002d1e:	001d      	movs	r5, r3
- 8002d20:	0022      	movs	r2, r4
- 8002d22:	002b      	movs	r3, r5
- 8002d24:	f7fd fa8e 	bl	8000244 <__aeabi_uldivmod>
- 8002d28:	0002      	movs	r2, r0
- 8002d2a:	000b      	movs	r3, r1
- 8002d2c:	0013      	movs	r3, r2
- 8002d2e:	637b      	str	r3, [r7, #52]	; 0x34
+ 8002a74:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8002a76:	0018      	movs	r0, r3
+ 8002a78:	2300      	movs	r3, #0
+ 8002a7a:	0019      	movs	r1, r3
+ 8002a7c:	4a16      	ldr	r2, [pc, #88]	; (8002ad8 <HAL_RCC_GetSysClockFreq+0x140>)
+ 8002a7e:	2300      	movs	r3, #0
+ 8002a80:	f7fd fc00 	bl	8000284 <__aeabi_lmul>
+ 8002a84:	0002      	movs	r2, r0
+ 8002a86:	000b      	movs	r3, r1
+ 8002a88:	0010      	movs	r0, r2
+ 8002a8a:	0019      	movs	r1, r3
+ 8002a8c:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 8002a8e:	001c      	movs	r4, r3
+ 8002a90:	2300      	movs	r3, #0
+ 8002a92:	001d      	movs	r5, r3
+ 8002a94:	0022      	movs	r2, r4
+ 8002a96:	002b      	movs	r3, r5
+ 8002a98:	f7fd fbd4 	bl	8000244 <__aeabi_uldivmod>
+ 8002a9c:	0002      	movs	r2, r0
+ 8002a9e:	000b      	movs	r3, r1
+ 8002aa0:	0013      	movs	r3, r2
+ 8002aa2:	637b      	str	r3, [r7, #52]	; 0x34
         }
       }
       sysclockfreq = pllvco;
- 8002d30:	6b7b      	ldr	r3, [r7, #52]	; 0x34
- 8002d32:	633b      	str	r3, [r7, #48]	; 0x30
+ 8002aa4:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 8002aa6:	633b      	str	r3, [r7, #48]	; 0x30
       break;
- 8002d34:	e00d      	b.n	8002d52 <HAL_RCC_GetSysClockFreq+0x12e>
+ 8002aa8:	e00d      	b.n	8002ac6 <HAL_RCC_GetSysClockFreq+0x12e>
     }
     case RCC_SYSCLKSOURCE_STATUS_MSI:  /* MSI used as system clock source */
     default: /* MSI used as system clock */
     {
       msiclkrange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE ) >> RCC_ICSCR_MSIRANGE_Pos;
- 8002d36:	4b09      	ldr	r3, [pc, #36]	; (8002d5c <HAL_RCC_GetSysClockFreq+0x138>)
- 8002d38:	685b      	ldr	r3, [r3, #4]
- 8002d3a:	0b5b      	lsrs	r3, r3, #13
- 8002d3c:	2207      	movs	r2, #7
- 8002d3e:	4013      	ands	r3, r2
- 8002d40:	623b      	str	r3, [r7, #32]
+ 8002aaa:	4b09      	ldr	r3, [pc, #36]	; (8002ad0 <HAL_RCC_GetSysClockFreq+0x138>)
+ 8002aac:	685b      	ldr	r3, [r3, #4]
+ 8002aae:	0b5b      	lsrs	r3, r3, #13
+ 8002ab0:	2207      	movs	r2, #7
+ 8002ab2:	4013      	ands	r3, r2
+ 8002ab4:	623b      	str	r3, [r7, #32]
       sysclockfreq = (32768U * (1UL << (msiclkrange + 1U)));
- 8002d42:	6a3b      	ldr	r3, [r7, #32]
- 8002d44:	3301      	adds	r3, #1
- 8002d46:	2280      	movs	r2, #128	; 0x80
- 8002d48:	0212      	lsls	r2, r2, #8
- 8002d4a:	409a      	lsls	r2, r3
- 8002d4c:	0013      	movs	r3, r2
- 8002d4e:	633b      	str	r3, [r7, #48]	; 0x30
+ 8002ab6:	6a3b      	ldr	r3, [r7, #32]
+ 8002ab8:	3301      	adds	r3, #1
+ 8002aba:	2280      	movs	r2, #128	; 0x80
+ 8002abc:	0212      	lsls	r2, r2, #8
+ 8002abe:	409a      	lsls	r2, r3
+ 8002ac0:	0013      	movs	r3, r2
+ 8002ac2:	633b      	str	r3, [r7, #48]	; 0x30
       break;
- 8002d50:	46c0      	nop			; (mov r8, r8)
+ 8002ac4:	46c0      	nop			; (mov r8, r8)
     }
   }
   return sysclockfreq;
- 8002d52:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 8002ac6:	6b3b      	ldr	r3, [r7, #48]	; 0x30
 }
- 8002d54:	0018      	movs	r0, r3
- 8002d56:	46bd      	mov	sp, r7
- 8002d58:	b00e      	add	sp, #56	; 0x38
- 8002d5a:	bdb0      	pop	{r4, r5, r7, pc}
- 8002d5c:	40021000 	.word	0x40021000
- 8002d60:	003d0900 	.word	0x003d0900
- 8002d64:	00f42400 	.word	0x00f42400
- 8002d68:	007a1200 	.word	0x007a1200
- 8002d6c:	080059f0 	.word	0x080059f0
+ 8002ac8:	0018      	movs	r0, r3
+ 8002aca:	46bd      	mov	sp, r7
+ 8002acc:	b00e      	add	sp, #56	; 0x38
+ 8002ace:	bdb0      	pop	{r4, r5, r7, pc}
+ 8002ad0:	40021000 	.word	0x40021000
+ 8002ad4:	003d0900 	.word	0x003d0900
+ 8002ad8:	00f42400 	.word	0x00f42400
+ 8002adc:	007a1200 	.word	0x007a1200
+ 8002ae0:	08004cc8 	.word	0x08004cc8
 
-08002d70 <HAL_RCC_GetHCLKFreq>:
+08002ae4 <HAL_RCC_GetHCLKFreq>:
   * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency
   *         and updated within this function
   * @retval HCLK frequency
   */
 uint32_t HAL_RCC_GetHCLKFreq(void)
 {
- 8002d70:	b580      	push	{r7, lr}
- 8002d72:	af00      	add	r7, sp, #0
+ 8002ae4:	b580      	push	{r7, lr}
+ 8002ae6:	af00      	add	r7, sp, #0
   return SystemCoreClock;
- 8002d74:	4b02      	ldr	r3, [pc, #8]	; (8002d80 <HAL_RCC_GetHCLKFreq+0x10>)
- 8002d76:	681b      	ldr	r3, [r3, #0]
+ 8002ae8:	4b02      	ldr	r3, [pc, #8]	; (8002af4 <HAL_RCC_GetHCLKFreq+0x10>)
+ 8002aea:	681b      	ldr	r3, [r3, #0]
 }
- 8002d78:	0018      	movs	r0, r3
- 8002d7a:	46bd      	mov	sp, r7
- 8002d7c:	bd80      	pop	{r7, pc}
- 8002d7e:	46c0      	nop			; (mov r8, r8)
- 8002d80:	20000000 	.word	0x20000000
+ 8002aec:	0018      	movs	r0, r3
+ 8002aee:	46bd      	mov	sp, r7
+ 8002af0:	bd80      	pop	{r7, pc}
+ 8002af2:	46c0      	nop			; (mov r8, r8)
+ 8002af4:	20000000 	.word	0x20000000
 
-08002d84 <HAL_RCC_GetPCLK1Freq>:
+08002af8 <HAL_RCC_GetPCLK1Freq>:
   * @note   Each time PCLK1 changes, this function must be called to update the
   *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
   * @retval PCLK1 frequency
   */
 uint32_t HAL_RCC_GetPCLK1Freq(void)
 {
- 8002d84:	b580      	push	{r7, lr}
- 8002d86:	af00      	add	r7, sp, #0
+ 8002af8:	b580      	push	{r7, lr}
+ 8002afa:	af00      	add	r7, sp, #0
   /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
   return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
- 8002d88:	f7ff fff2 	bl	8002d70 <HAL_RCC_GetHCLKFreq>
- 8002d8c:	0001      	movs	r1, r0
- 8002d8e:	4b06      	ldr	r3, [pc, #24]	; (8002da8 <HAL_RCC_GetPCLK1Freq+0x24>)
- 8002d90:	68db      	ldr	r3, [r3, #12]
- 8002d92:	0a1b      	lsrs	r3, r3, #8
- 8002d94:	2207      	movs	r2, #7
- 8002d96:	4013      	ands	r3, r2
- 8002d98:	4a04      	ldr	r2, [pc, #16]	; (8002dac <HAL_RCC_GetPCLK1Freq+0x28>)
- 8002d9a:	5cd3      	ldrb	r3, [r2, r3]
- 8002d9c:	40d9      	lsrs	r1, r3
- 8002d9e:	000b      	movs	r3, r1
+ 8002afc:	f7ff fff2 	bl	8002ae4 <HAL_RCC_GetHCLKFreq>
+ 8002b00:	0001      	movs	r1, r0
+ 8002b02:	4b06      	ldr	r3, [pc, #24]	; (8002b1c <HAL_RCC_GetPCLK1Freq+0x24>)
+ 8002b04:	68db      	ldr	r3, [r3, #12]
+ 8002b06:	0a1b      	lsrs	r3, r3, #8
+ 8002b08:	2207      	movs	r2, #7
+ 8002b0a:	4013      	ands	r3, r2
+ 8002b0c:	4a04      	ldr	r2, [pc, #16]	; (8002b20 <HAL_RCC_GetPCLK1Freq+0x28>)
+ 8002b0e:	5cd3      	ldrb	r3, [r2, r3]
+ 8002b10:	40d9      	lsrs	r1, r3
+ 8002b12:	000b      	movs	r3, r1
 }
- 8002da0:	0018      	movs	r0, r3
- 8002da2:	46bd      	mov	sp, r7
- 8002da4:	bd80      	pop	{r7, pc}
- 8002da6:	46c0      	nop			; (mov r8, r8)
- 8002da8:	40021000 	.word	0x40021000
- 8002dac:	080059e8 	.word	0x080059e8
+ 8002b14:	0018      	movs	r0, r3
+ 8002b16:	46bd      	mov	sp, r7
+ 8002b18:	bd80      	pop	{r7, pc}
+ 8002b1a:	46c0      	nop			; (mov r8, r8)
+ 8002b1c:	40021000 	.word	0x40021000
+ 8002b20:	08004cc0 	.word	0x08004cc0
 
-08002db0 <HAL_RCC_GetPCLK2Freq>:
+08002b24 <HAL_RCC_GetPCLK2Freq>:
   * @note   Each time PCLK2 changes, this function must be called to update the
   *         right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
   * @retval PCLK2 frequency
   */
 uint32_t HAL_RCC_GetPCLK2Freq(void)
 {
- 8002db0:	b580      	push	{r7, lr}
- 8002db2:	af00      	add	r7, sp, #0
+ 8002b24:	b580      	push	{r7, lr}
+ 8002b26:	af00      	add	r7, sp, #0
   /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
   return (HAL_RCC_GetHCLKFreq()>> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
- 8002db4:	f7ff ffdc 	bl	8002d70 <HAL_RCC_GetHCLKFreq>
- 8002db8:	0001      	movs	r1, r0
- 8002dba:	4b06      	ldr	r3, [pc, #24]	; (8002dd4 <HAL_RCC_GetPCLK2Freq+0x24>)
- 8002dbc:	68db      	ldr	r3, [r3, #12]
- 8002dbe:	0adb      	lsrs	r3, r3, #11
- 8002dc0:	2207      	movs	r2, #7
- 8002dc2:	4013      	ands	r3, r2
- 8002dc4:	4a04      	ldr	r2, [pc, #16]	; (8002dd8 <HAL_RCC_GetPCLK2Freq+0x28>)
- 8002dc6:	5cd3      	ldrb	r3, [r2, r3]
- 8002dc8:	40d9      	lsrs	r1, r3
- 8002dca:	000b      	movs	r3, r1
+ 8002b28:	f7ff ffdc 	bl	8002ae4 <HAL_RCC_GetHCLKFreq>
+ 8002b2c:	0001      	movs	r1, r0
+ 8002b2e:	4b06      	ldr	r3, [pc, #24]	; (8002b48 <HAL_RCC_GetPCLK2Freq+0x24>)
+ 8002b30:	68db      	ldr	r3, [r3, #12]
+ 8002b32:	0adb      	lsrs	r3, r3, #11
+ 8002b34:	2207      	movs	r2, #7
+ 8002b36:	4013      	ands	r3, r2
+ 8002b38:	4a04      	ldr	r2, [pc, #16]	; (8002b4c <HAL_RCC_GetPCLK2Freq+0x28>)
+ 8002b3a:	5cd3      	ldrb	r3, [r2, r3]
+ 8002b3c:	40d9      	lsrs	r1, r3
+ 8002b3e:	000b      	movs	r3, r1
 }
- 8002dcc:	0018      	movs	r0, r3
- 8002dce:	46bd      	mov	sp, r7
- 8002dd0:	bd80      	pop	{r7, pc}
- 8002dd2:	46c0      	nop			; (mov r8, r8)
- 8002dd4:	40021000 	.word	0x40021000
- 8002dd8:	080059e8 	.word	0x080059e8
+ 8002b40:	0018      	movs	r0, r3
+ 8002b42:	46bd      	mov	sp, r7
+ 8002b44:	bd80      	pop	{r7, pc}
+ 8002b46:	46c0      	nop			; (mov r8, r8)
+ 8002b48:	40021000 	.word	0x40021000
+ 8002b4c:	08004cc0 	.word	0x08004cc0
 
-08002ddc <HAL_RCC_NMI_IRQHandler>:
+08002b50 <HAL_RCC_NMI_IRQHandler>:
   * @brief This function handles the RCC CSS interrupt request.
   * @note This API should be called under the NMI_Handler().
   * @retval None
   */
 void HAL_RCC_NMI_IRQHandler(void)
 {
- 8002ddc:	b580      	push	{r7, lr}
- 8002dde:	af00      	add	r7, sp, #0
+ 8002b50:	b580      	push	{r7, lr}
+ 8002b52:	af00      	add	r7, sp, #0
   /* Check RCC CSSF flag  */
   if(__HAL_RCC_GET_IT(RCC_IT_CSS))
- 8002de0:	4b08      	ldr	r3, [pc, #32]	; (8002e04 <HAL_RCC_NMI_IRQHandler+0x28>)
- 8002de2:	695a      	ldr	r2, [r3, #20]
- 8002de4:	2380      	movs	r3, #128	; 0x80
- 8002de6:	005b      	lsls	r3, r3, #1
- 8002de8:	401a      	ands	r2, r3
- 8002dea:	2380      	movs	r3, #128	; 0x80
- 8002dec:	005b      	lsls	r3, r3, #1
- 8002dee:	429a      	cmp	r2, r3
- 8002df0:	d105      	bne.n	8002dfe <HAL_RCC_NMI_IRQHandler+0x22>
+ 8002b54:	4b08      	ldr	r3, [pc, #32]	; (8002b78 <HAL_RCC_NMI_IRQHandler+0x28>)
+ 8002b56:	695a      	ldr	r2, [r3, #20]
+ 8002b58:	2380      	movs	r3, #128	; 0x80
+ 8002b5a:	005b      	lsls	r3, r3, #1
+ 8002b5c:	401a      	ands	r2, r3
+ 8002b5e:	2380      	movs	r3, #128	; 0x80
+ 8002b60:	005b      	lsls	r3, r3, #1
+ 8002b62:	429a      	cmp	r2, r3
+ 8002b64:	d105      	bne.n	8002b72 <HAL_RCC_NMI_IRQHandler+0x22>
   {
     /* RCC Clock Security System interrupt user callback */
     HAL_RCC_CSSCallback();
- 8002df2:	f000 f809 	bl	8002e08 <HAL_RCC_CSSCallback>
+ 8002b66:	f000 f809 	bl	8002b7c <HAL_RCC_CSSCallback>
 
     /* Clear RCC CSS pending bit */
     __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
- 8002df6:	4b03      	ldr	r3, [pc, #12]	; (8002e04 <HAL_RCC_NMI_IRQHandler+0x28>)
- 8002df8:	2280      	movs	r2, #128	; 0x80
- 8002dfa:	0052      	lsls	r2, r2, #1
- 8002dfc:	619a      	str	r2, [r3, #24]
+ 8002b6a:	4b03      	ldr	r3, [pc, #12]	; (8002b78 <HAL_RCC_NMI_IRQHandler+0x28>)
+ 8002b6c:	2280      	movs	r2, #128	; 0x80
+ 8002b6e:	0052      	lsls	r2, r2, #1
+ 8002b70:	619a      	str	r2, [r3, #24]
   }
 }
- 8002dfe:	46c0      	nop			; (mov r8, r8)
- 8002e00:	46bd      	mov	sp, r7
- 8002e02:	bd80      	pop	{r7, pc}
- 8002e04:	40021000 	.word	0x40021000
+ 8002b72:	46c0      	nop			; (mov r8, r8)
+ 8002b74:	46bd      	mov	sp, r7
+ 8002b76:	bd80      	pop	{r7, pc}
+ 8002b78:	40021000 	.word	0x40021000
 
-08002e08 <HAL_RCC_CSSCallback>:
+08002b7c <HAL_RCC_CSSCallback>:
 /**
   * @brief  RCC Clock Security System interrupt callback
   * @retval none
   */
 __weak void HAL_RCC_CSSCallback(void)
 {
- 8002e08:	b580      	push	{r7, lr}
- 8002e0a:	af00      	add	r7, sp, #0
+ 8002b7c:	b580      	push	{r7, lr}
+ 8002b7e:	af00      	add	r7, sp, #0
   /* NOTE : This function Should not be modified, when the callback is needed,
     the HAL_RCC_CSSCallback could be implemented in the user file
     */
 }
- 8002e0c:	46c0      	nop			; (mov r8, r8)
- 8002e0e:	46bd      	mov	sp, r7
- 8002e10:	bd80      	pop	{r7, pc}
+ 8002b80:	46c0      	nop			; (mov r8, r8)
+ 8002b82:	46bd      	mov	sp, r7
+ 8002b84:	bd80      	pop	{r7, pc}
 	...
 
-08002e14 <HAL_RCCEx_PeriphCLKConfig>:
+08002b88 <HAL_RCCEx_PeriphCLKConfig>:
   * @retval HAL status
   * @note   If HAL_ERROR returned, first switch-OFF HSE clock oscillator with @ref HAL_RCC_OscConfig()
   *         to possibly update HSE divider.
   */
 HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef  *PeriphClkInit)
 {
- 8002e14:	b580      	push	{r7, lr}
- 8002e16:	b086      	sub	sp, #24
- 8002e18:	af00      	add	r7, sp, #0
- 8002e1a:	6078      	str	r0, [r7, #4]
+ 8002b88:	b580      	push	{r7, lr}
+ 8002b8a:	b086      	sub	sp, #24
+ 8002b8c:	af00      	add	r7, sp, #0
+ 8002b8e:	6078      	str	r0, [r7, #4]
   uint32_t tickstart;
   uint32_t temp_reg;
   FlagStatus       pwrclkchanged = RESET;
- 8002e1c:	2017      	movs	r0, #23
- 8002e1e:	183b      	adds	r3, r7, r0
- 8002e20:	2200      	movs	r2, #0
- 8002e22:	701a      	strb	r2, [r3, #0]
+ 8002b90:	2017      	movs	r0, #23
+ 8002b92:	183b      	adds	r3, r7, r0
+ 8002b94:	2200      	movs	r2, #0
+ 8002b96:	701a      	strb	r2, [r3, #0]
 
   /* Check the parameters */
   assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
 
   /*------------------------------- RTC/LCD Configuration ------------------------*/
   if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
- 8002e24:	687b      	ldr	r3, [r7, #4]
- 8002e26:	681b      	ldr	r3, [r3, #0]
- 8002e28:	2220      	movs	r2, #32
- 8002e2a:	4013      	ands	r3, r2
- 8002e2c:	d100      	bne.n	8002e30 <HAL_RCCEx_PeriphCLKConfig+0x1c>
- 8002e2e:	e0c7      	b.n	8002fc0 <HAL_RCCEx_PeriphCLKConfig+0x1ac>
+ 8002b98:	687b      	ldr	r3, [r7, #4]
+ 8002b9a:	681b      	ldr	r3, [r3, #0]
+ 8002b9c:	2220      	movs	r2, #32
+ 8002b9e:	4013      	ands	r3, r2
+ 8002ba0:	d100      	bne.n	8002ba4 <HAL_RCCEx_PeriphCLKConfig+0x1c>
+ 8002ba2:	e0c7      	b.n	8002d34 <HAL_RCCEx_PeriphCLKConfig+0x1ac>
 #endif /* LCD */
 
     /* As soon as function is called to change RTC clock source, activation of the
        power domain is done. */
     /* Requires to enable write access to Backup Domain of necessary */
     if(__HAL_RCC_PWR_IS_CLK_DISABLED())
- 8002e30:	4b8b      	ldr	r3, [pc, #556]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002e32:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 8002e34:	2380      	movs	r3, #128	; 0x80
- 8002e36:	055b      	lsls	r3, r3, #21
- 8002e38:	4013      	ands	r3, r2
- 8002e3a:	d109      	bne.n	8002e50 <HAL_RCCEx_PeriphCLKConfig+0x3c>
+ 8002ba4:	4b8b      	ldr	r3, [pc, #556]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002ba6:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 8002ba8:	2380      	movs	r3, #128	; 0x80
+ 8002baa:	055b      	lsls	r3, r3, #21
+ 8002bac:	4013      	ands	r3, r2
+ 8002bae:	d109      	bne.n	8002bc4 <HAL_RCCEx_PeriphCLKConfig+0x3c>
     {
       __HAL_RCC_PWR_CLK_ENABLE();
- 8002e3c:	4b88      	ldr	r3, [pc, #544]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002e3e:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 8002e40:	4b87      	ldr	r3, [pc, #540]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002e42:	2180      	movs	r1, #128	; 0x80
- 8002e44:	0549      	lsls	r1, r1, #21
- 8002e46:	430a      	orrs	r2, r1
- 8002e48:	639a      	str	r2, [r3, #56]	; 0x38
+ 8002bb0:	4b88      	ldr	r3, [pc, #544]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002bb2:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 8002bb4:	4b87      	ldr	r3, [pc, #540]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002bb6:	2180      	movs	r1, #128	; 0x80
+ 8002bb8:	0549      	lsls	r1, r1, #21
+ 8002bba:	430a      	orrs	r2, r1
+ 8002bbc:	639a      	str	r2, [r3, #56]	; 0x38
       pwrclkchanged = SET;
- 8002e4a:	183b      	adds	r3, r7, r0
- 8002e4c:	2201      	movs	r2, #1
- 8002e4e:	701a      	strb	r2, [r3, #0]
+ 8002bbe:	183b      	adds	r3, r7, r0
+ 8002bc0:	2201      	movs	r2, #1
+ 8002bc2:	701a      	strb	r2, [r3, #0]
     }
 
     if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 8002e50:	4b84      	ldr	r3, [pc, #528]	; (8003064 <HAL_RCCEx_PeriphCLKConfig+0x250>)
- 8002e52:	681a      	ldr	r2, [r3, #0]
- 8002e54:	2380      	movs	r3, #128	; 0x80
- 8002e56:	005b      	lsls	r3, r3, #1
- 8002e58:	4013      	ands	r3, r2
- 8002e5a:	d11a      	bne.n	8002e92 <HAL_RCCEx_PeriphCLKConfig+0x7e>
+ 8002bc4:	4b84      	ldr	r3, [pc, #528]	; (8002dd8 <HAL_RCCEx_PeriphCLKConfig+0x250>)
+ 8002bc6:	681a      	ldr	r2, [r3, #0]
+ 8002bc8:	2380      	movs	r3, #128	; 0x80
+ 8002bca:	005b      	lsls	r3, r3, #1
+ 8002bcc:	4013      	ands	r3, r2
+ 8002bce:	d11a      	bne.n	8002c06 <HAL_RCCEx_PeriphCLKConfig+0x7e>
     {
       /* Enable write access to Backup domain */
       SET_BIT(PWR->CR, PWR_CR_DBP);
- 8002e5c:	4b81      	ldr	r3, [pc, #516]	; (8003064 <HAL_RCCEx_PeriphCLKConfig+0x250>)
- 8002e5e:	681a      	ldr	r2, [r3, #0]
- 8002e60:	4b80      	ldr	r3, [pc, #512]	; (8003064 <HAL_RCCEx_PeriphCLKConfig+0x250>)
- 8002e62:	2180      	movs	r1, #128	; 0x80
- 8002e64:	0049      	lsls	r1, r1, #1
- 8002e66:	430a      	orrs	r2, r1
- 8002e68:	601a      	str	r2, [r3, #0]
+ 8002bd0:	4b81      	ldr	r3, [pc, #516]	; (8002dd8 <HAL_RCCEx_PeriphCLKConfig+0x250>)
+ 8002bd2:	681a      	ldr	r2, [r3, #0]
+ 8002bd4:	4b80      	ldr	r3, [pc, #512]	; (8002dd8 <HAL_RCCEx_PeriphCLKConfig+0x250>)
+ 8002bd6:	2180      	movs	r1, #128	; 0x80
+ 8002bd8:	0049      	lsls	r1, r1, #1
+ 8002bda:	430a      	orrs	r2, r1
+ 8002bdc:	601a      	str	r2, [r3, #0]
 
       /* Wait for Backup domain Write protection disable */
       tickstart = HAL_GetTick();
- 8002e6a:	f7fe fb15 	bl	8001498 <HAL_GetTick>
- 8002e6e:	0003      	movs	r3, r0
- 8002e70:	613b      	str	r3, [r7, #16]
+ 8002bde:	f7fe fb9d 	bl	800131c <HAL_GetTick>
+ 8002be2:	0003      	movs	r3, r0
+ 8002be4:	613b      	str	r3, [r7, #16]
 
       while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 8002e72:	e008      	b.n	8002e86 <HAL_RCCEx_PeriphCLKConfig+0x72>
+ 8002be6:	e008      	b.n	8002bfa <HAL_RCCEx_PeriphCLKConfig+0x72>
       {
         if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
- 8002e74:	f7fe fb10 	bl	8001498 <HAL_GetTick>
- 8002e78:	0002      	movs	r2, r0
- 8002e7a:	693b      	ldr	r3, [r7, #16]
- 8002e7c:	1ad3      	subs	r3, r2, r3
- 8002e7e:	2b64      	cmp	r3, #100	; 0x64
- 8002e80:	d901      	bls.n	8002e86 <HAL_RCCEx_PeriphCLKConfig+0x72>
+ 8002be8:	f7fe fb98 	bl	800131c <HAL_GetTick>
+ 8002bec:	0002      	movs	r2, r0
+ 8002bee:	693b      	ldr	r3, [r7, #16]
+ 8002bf0:	1ad3      	subs	r3, r2, r3
+ 8002bf2:	2b64      	cmp	r3, #100	; 0x64
+ 8002bf4:	d901      	bls.n	8002bfa <HAL_RCCEx_PeriphCLKConfig+0x72>
         {
           return HAL_TIMEOUT;
- 8002e82:	2303      	movs	r3, #3
- 8002e84:	e0e8      	b.n	8003058 <HAL_RCCEx_PeriphCLKConfig+0x244>
+ 8002bf6:	2303      	movs	r3, #3
+ 8002bf8:	e0e8      	b.n	8002dcc <HAL_RCCEx_PeriphCLKConfig+0x244>
       while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
- 8002e86:	4b77      	ldr	r3, [pc, #476]	; (8003064 <HAL_RCCEx_PeriphCLKConfig+0x250>)
- 8002e88:	681a      	ldr	r2, [r3, #0]
- 8002e8a:	2380      	movs	r3, #128	; 0x80
- 8002e8c:	005b      	lsls	r3, r3, #1
- 8002e8e:	4013      	ands	r3, r2
- 8002e90:	d0f0      	beq.n	8002e74 <HAL_RCCEx_PeriphCLKConfig+0x60>
+ 8002bfa:	4b77      	ldr	r3, [pc, #476]	; (8002dd8 <HAL_RCCEx_PeriphCLKConfig+0x250>)
+ 8002bfc:	681a      	ldr	r2, [r3, #0]
+ 8002bfe:	2380      	movs	r3, #128	; 0x80
+ 8002c00:	005b      	lsls	r3, r3, #1
+ 8002c02:	4013      	ands	r3, r2
+ 8002c04:	d0f0      	beq.n	8002be8 <HAL_RCCEx_PeriphCLKConfig+0x60>
         }
       }
     }
 
     /* Check if user wants to change HSE RTC prescaler whereas HSE is enabled */
     temp_reg = (RCC->CR & RCC_CR_RTCPRE);
- 8002e92:	4b73      	ldr	r3, [pc, #460]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002e94:	681a      	ldr	r2, [r3, #0]
- 8002e96:	23c0      	movs	r3, #192	; 0xc0
- 8002e98:	039b      	lsls	r3, r3, #14
- 8002e9a:	4013      	ands	r3, r2
- 8002e9c:	60fb      	str	r3, [r7, #12]
+ 8002c06:	4b73      	ldr	r3, [pc, #460]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002c08:	681a      	ldr	r2, [r3, #0]
+ 8002c0a:	23c0      	movs	r3, #192	; 0xc0
+ 8002c0c:	039b      	lsls	r3, r3, #14
+ 8002c0e:	4013      	ands	r3, r2
+ 8002c10:	60fb      	str	r3, [r7, #12]
     if ((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CR_RTCPRE))
- 8002e9e:	687b      	ldr	r3, [r7, #4]
- 8002ea0:	685a      	ldr	r2, [r3, #4]
- 8002ea2:	23c0      	movs	r3, #192	; 0xc0
- 8002ea4:	039b      	lsls	r3, r3, #14
- 8002ea6:	4013      	ands	r3, r2
- 8002ea8:	68fa      	ldr	r2, [r7, #12]
- 8002eaa:	429a      	cmp	r2, r3
- 8002eac:	d013      	beq.n	8002ed6 <HAL_RCCEx_PeriphCLKConfig+0xc2>
+ 8002c12:	687b      	ldr	r3, [r7, #4]
+ 8002c14:	685a      	ldr	r2, [r3, #4]
+ 8002c16:	23c0      	movs	r3, #192	; 0xc0
+ 8002c18:	039b      	lsls	r3, r3, #14
+ 8002c1a:	4013      	ands	r3, r2
+ 8002c1c:	68fa      	ldr	r2, [r7, #12]
+ 8002c1e:	429a      	cmp	r2, r3
+ 8002c20:	d013      	beq.n	8002c4a <HAL_RCCEx_PeriphCLKConfig+0xc2>
 #if defined (LCD)
      || (temp_reg != (PeriphClkInit->LCDClockSelection & RCC_CR_RTCPRE))
 #endif /* LCD */
        )
     { /* Check HSE State */
       if ((PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL) == RCC_CSR_RTCSEL_HSE)
- 8002eae:	687b      	ldr	r3, [r7, #4]
- 8002eb0:	685a      	ldr	r2, [r3, #4]
- 8002eb2:	23c0      	movs	r3, #192	; 0xc0
- 8002eb4:	029b      	lsls	r3, r3, #10
- 8002eb6:	401a      	ands	r2, r3
- 8002eb8:	23c0      	movs	r3, #192	; 0xc0
- 8002eba:	029b      	lsls	r3, r3, #10
- 8002ebc:	429a      	cmp	r2, r3
- 8002ebe:	d10a      	bne.n	8002ed6 <HAL_RCCEx_PeriphCLKConfig+0xc2>
+ 8002c22:	687b      	ldr	r3, [r7, #4]
+ 8002c24:	685a      	ldr	r2, [r3, #4]
+ 8002c26:	23c0      	movs	r3, #192	; 0xc0
+ 8002c28:	029b      	lsls	r3, r3, #10
+ 8002c2a:	401a      	ands	r2, r3
+ 8002c2c:	23c0      	movs	r3, #192	; 0xc0
+ 8002c2e:	029b      	lsls	r3, r3, #10
+ 8002c30:	429a      	cmp	r2, r3
+ 8002c32:	d10a      	bne.n	8002c4a <HAL_RCCEx_PeriphCLKConfig+0xc2>
       {
         if (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))
- 8002ec0:	4b67      	ldr	r3, [pc, #412]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002ec2:	681a      	ldr	r2, [r3, #0]
- 8002ec4:	2380      	movs	r3, #128	; 0x80
- 8002ec6:	029b      	lsls	r3, r3, #10
- 8002ec8:	401a      	ands	r2, r3
- 8002eca:	2380      	movs	r3, #128	; 0x80
- 8002ecc:	029b      	lsls	r3, r3, #10
- 8002ece:	429a      	cmp	r2, r3
- 8002ed0:	d101      	bne.n	8002ed6 <HAL_RCCEx_PeriphCLKConfig+0xc2>
+ 8002c34:	4b67      	ldr	r3, [pc, #412]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002c36:	681a      	ldr	r2, [r3, #0]
+ 8002c38:	2380      	movs	r3, #128	; 0x80
+ 8002c3a:	029b      	lsls	r3, r3, #10
+ 8002c3c:	401a      	ands	r2, r3
+ 8002c3e:	2380      	movs	r3, #128	; 0x80
+ 8002c40:	029b      	lsls	r3, r3, #10
+ 8002c42:	429a      	cmp	r2, r3
+ 8002c44:	d101      	bne.n	8002c4a <HAL_RCCEx_PeriphCLKConfig+0xc2>
         {
           /* To update HSE divider, first switch-OFF HSE clock oscillator*/
           return HAL_ERROR;
- 8002ed2:	2301      	movs	r3, #1
- 8002ed4:	e0c0      	b.n	8003058 <HAL_RCCEx_PeriphCLKConfig+0x244>
+ 8002c46:	2301      	movs	r3, #1
+ 8002c48:	e0c0      	b.n	8002dcc <HAL_RCCEx_PeriphCLKConfig+0x244>
         }
       }
     }
 
     /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
     temp_reg = (RCC->CSR & RCC_CSR_RTCSEL);
- 8002ed6:	4b62      	ldr	r3, [pc, #392]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002ed8:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 8002eda:	23c0      	movs	r3, #192	; 0xc0
- 8002edc:	029b      	lsls	r3, r3, #10
- 8002ede:	4013      	ands	r3, r2
- 8002ee0:	60fb      	str	r3, [r7, #12]
+ 8002c4a:	4b62      	ldr	r3, [pc, #392]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002c4c:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 8002c4e:	23c0      	movs	r3, #192	; 0xc0
+ 8002c50:	029b      	lsls	r3, r3, #10
+ 8002c52:	4013      	ands	r3, r2
+ 8002c54:	60fb      	str	r3, [r7, #12]
 
     if((temp_reg != 0x00000000U) && (((temp_reg != (PeriphClkInit->RTCClockSelection & RCC_CSR_RTCSEL)) \
- 8002ee2:	68fb      	ldr	r3, [r7, #12]
- 8002ee4:	2b00      	cmp	r3, #0
- 8002ee6:	d03b      	beq.n	8002f60 <HAL_RCCEx_PeriphCLKConfig+0x14c>
- 8002ee8:	687b      	ldr	r3, [r7, #4]
- 8002eea:	685a      	ldr	r2, [r3, #4]
- 8002eec:	23c0      	movs	r3, #192	; 0xc0
- 8002eee:	029b      	lsls	r3, r3, #10
- 8002ef0:	4013      	ands	r3, r2
- 8002ef2:	68fa      	ldr	r2, [r7, #12]
- 8002ef4:	429a      	cmp	r2, r3
- 8002ef6:	d033      	beq.n	8002f60 <HAL_RCCEx_PeriphCLKConfig+0x14c>
+ 8002c56:	68fb      	ldr	r3, [r7, #12]
+ 8002c58:	2b00      	cmp	r3, #0
+ 8002c5a:	d03b      	beq.n	8002cd4 <HAL_RCCEx_PeriphCLKConfig+0x14c>
+ 8002c5c:	687b      	ldr	r3, [r7, #4]
+ 8002c5e:	685a      	ldr	r2, [r3, #4]
+ 8002c60:	23c0      	movs	r3, #192	; 0xc0
+ 8002c62:	029b      	lsls	r3, r3, #10
+ 8002c64:	4013      	ands	r3, r2
+ 8002c66:	68fa      	ldr	r2, [r7, #12]
+ 8002c68:	429a      	cmp	r2, r3
+ 8002c6a:	d033      	beq.n	8002cd4 <HAL_RCCEx_PeriphCLKConfig+0x14c>
       && (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
- 8002ef8:	687b      	ldr	r3, [r7, #4]
- 8002efa:	681b      	ldr	r3, [r3, #0]
- 8002efc:	2220      	movs	r2, #32
- 8002efe:	4013      	ands	r3, r2
- 8002f00:	d02e      	beq.n	8002f60 <HAL_RCCEx_PeriphCLKConfig+0x14c>
+ 8002c6c:	687b      	ldr	r3, [r7, #4]
+ 8002c6e:	681b      	ldr	r3, [r3, #0]
+ 8002c70:	2220      	movs	r2, #32
+ 8002c72:	4013      	ands	r3, r2
+ 8002c74:	d02e      	beq.n	8002cd4 <HAL_RCCEx_PeriphCLKConfig+0x14c>
        && (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LCD) == RCC_PERIPHCLK_LCD))
 #endif /* LCD */
      ))
     {
       /* Store the content of CSR register before the reset of Backup Domain */
       temp_reg = (RCC->CSR & ~(RCC_CSR_RTCSEL));
- 8002f02:	4b57      	ldr	r3, [pc, #348]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002f04:	6d1b      	ldr	r3, [r3, #80]	; 0x50
- 8002f06:	4a58      	ldr	r2, [pc, #352]	; (8003068 <HAL_RCCEx_PeriphCLKConfig+0x254>)
- 8002f08:	4013      	ands	r3, r2
- 8002f0a:	60fb      	str	r3, [r7, #12]
+ 8002c76:	4b57      	ldr	r3, [pc, #348]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002c78:	6d1b      	ldr	r3, [r3, #80]	; 0x50
+ 8002c7a:	4a58      	ldr	r2, [pc, #352]	; (8002ddc <HAL_RCCEx_PeriphCLKConfig+0x254>)
+ 8002c7c:	4013      	ands	r3, r2
+ 8002c7e:	60fb      	str	r3, [r7, #12]
 
       /* RTC Clock selection can be changed only if the Backup Domain is reset */
       __HAL_RCC_BACKUPRESET_FORCE();
- 8002f0c:	4b54      	ldr	r3, [pc, #336]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002f0e:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 8002f10:	4b53      	ldr	r3, [pc, #332]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002f12:	2180      	movs	r1, #128	; 0x80
- 8002f14:	0309      	lsls	r1, r1, #12
- 8002f16:	430a      	orrs	r2, r1
- 8002f18:	651a      	str	r2, [r3, #80]	; 0x50
+ 8002c80:	4b54      	ldr	r3, [pc, #336]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002c82:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 8002c84:	4b53      	ldr	r3, [pc, #332]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002c86:	2180      	movs	r1, #128	; 0x80
+ 8002c88:	0309      	lsls	r1, r1, #12
+ 8002c8a:	430a      	orrs	r2, r1
+ 8002c8c:	651a      	str	r2, [r3, #80]	; 0x50
       __HAL_RCC_BACKUPRESET_RELEASE();
- 8002f1a:	4b51      	ldr	r3, [pc, #324]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002f1c:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 8002f1e:	4b50      	ldr	r3, [pc, #320]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002f20:	4952      	ldr	r1, [pc, #328]	; (800306c <HAL_RCCEx_PeriphCLKConfig+0x258>)
- 8002f22:	400a      	ands	r2, r1
- 8002f24:	651a      	str	r2, [r3, #80]	; 0x50
+ 8002c8e:	4b51      	ldr	r3, [pc, #324]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002c90:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 8002c92:	4b50      	ldr	r3, [pc, #320]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002c94:	4952      	ldr	r1, [pc, #328]	; (8002de0 <HAL_RCCEx_PeriphCLKConfig+0x258>)
+ 8002c96:	400a      	ands	r2, r1
+ 8002c98:	651a      	str	r2, [r3, #80]	; 0x50
 
       /* Restore the Content of CSR register */
       RCC->CSR = temp_reg;
- 8002f26:	4b4e      	ldr	r3, [pc, #312]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002f28:	68fa      	ldr	r2, [r7, #12]
- 8002f2a:	651a      	str	r2, [r3, #80]	; 0x50
+ 8002c9a:	4b4e      	ldr	r3, [pc, #312]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002c9c:	68fa      	ldr	r2, [r7, #12]
+ 8002c9e:	651a      	str	r2, [r3, #80]	; 0x50
 
        /* Wait for LSERDY if LSE was enabled */
       if (HAL_IS_BIT_SET(temp_reg, RCC_CSR_LSEON))
- 8002f2c:	68fa      	ldr	r2, [r7, #12]
- 8002f2e:	2380      	movs	r3, #128	; 0x80
- 8002f30:	005b      	lsls	r3, r3, #1
- 8002f32:	4013      	ands	r3, r2
- 8002f34:	d014      	beq.n	8002f60 <HAL_RCCEx_PeriphCLKConfig+0x14c>
+ 8002ca0:	68fa      	ldr	r2, [r7, #12]
+ 8002ca2:	2380      	movs	r3, #128	; 0x80
+ 8002ca4:	005b      	lsls	r3, r3, #1
+ 8002ca6:	4013      	ands	r3, r2
+ 8002ca8:	d014      	beq.n	8002cd4 <HAL_RCCEx_PeriphCLKConfig+0x14c>
       {
         /* Get Start Tick */
         tickstart = HAL_GetTick();
- 8002f36:	f7fe faaf 	bl	8001498 <HAL_GetTick>
- 8002f3a:	0003      	movs	r3, r0
- 8002f3c:	613b      	str	r3, [r7, #16]
+ 8002caa:	f7fe fb37 	bl	800131c <HAL_GetTick>
+ 8002cae:	0003      	movs	r3, r0
+ 8002cb0:	613b      	str	r3, [r7, #16]
 
         /* Wait till LSE is ready */
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
- 8002f3e:	e009      	b.n	8002f54 <HAL_RCCEx_PeriphCLKConfig+0x140>
+ 8002cb2:	e009      	b.n	8002cc8 <HAL_RCCEx_PeriphCLKConfig+0x140>
         {
           if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
- 8002f40:	f7fe faaa 	bl	8001498 <HAL_GetTick>
- 8002f44:	0002      	movs	r2, r0
- 8002f46:	693b      	ldr	r3, [r7, #16]
- 8002f48:	1ad3      	subs	r3, r2, r3
- 8002f4a:	4a49      	ldr	r2, [pc, #292]	; (8003070 <HAL_RCCEx_PeriphCLKConfig+0x25c>)
- 8002f4c:	4293      	cmp	r3, r2
- 8002f4e:	d901      	bls.n	8002f54 <HAL_RCCEx_PeriphCLKConfig+0x140>
+ 8002cb4:	f7fe fb32 	bl	800131c <HAL_GetTick>
+ 8002cb8:	0002      	movs	r2, r0
+ 8002cba:	693b      	ldr	r3, [r7, #16]
+ 8002cbc:	1ad3      	subs	r3, r2, r3
+ 8002cbe:	4a49      	ldr	r2, [pc, #292]	; (8002de4 <HAL_RCCEx_PeriphCLKConfig+0x25c>)
+ 8002cc0:	4293      	cmp	r3, r2
+ 8002cc2:	d901      	bls.n	8002cc8 <HAL_RCCEx_PeriphCLKConfig+0x140>
           {
             return HAL_TIMEOUT;
- 8002f50:	2303      	movs	r3, #3
- 8002f52:	e081      	b.n	8003058 <HAL_RCCEx_PeriphCLKConfig+0x244>
+ 8002cc4:	2303      	movs	r3, #3
+ 8002cc6:	e081      	b.n	8002dcc <HAL_RCCEx_PeriphCLKConfig+0x244>
         while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == 0U)
- 8002f54:	4b42      	ldr	r3, [pc, #264]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002f56:	6d1a      	ldr	r2, [r3, #80]	; 0x50
- 8002f58:	2380      	movs	r3, #128	; 0x80
- 8002f5a:	009b      	lsls	r3, r3, #2
- 8002f5c:	4013      	ands	r3, r2
- 8002f5e:	d0ef      	beq.n	8002f40 <HAL_RCCEx_PeriphCLKConfig+0x12c>
+ 8002cc8:	4b42      	ldr	r3, [pc, #264]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002cca:	6d1a      	ldr	r2, [r3, #80]	; 0x50
+ 8002ccc:	2380      	movs	r3, #128	; 0x80
+ 8002cce:	009b      	lsls	r3, r3, #2
+ 8002cd0:	4013      	ands	r3, r2
+ 8002cd2:	d0ef      	beq.n	8002cb4 <HAL_RCCEx_PeriphCLKConfig+0x12c>
     {
       __HAL_RCC_LCD_CONFIG(PeriphClkInit->LCDClockSelection);
     } 
 #endif /* LCD */
 
     if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC)
- 8002f60:	687b      	ldr	r3, [r7, #4]
- 8002f62:	681b      	ldr	r3, [r3, #0]
- 8002f64:	2220      	movs	r2, #32
- 8002f66:	4013      	ands	r3, r2
- 8002f68:	d01f      	beq.n	8002faa <HAL_RCCEx_PeriphCLKConfig+0x196>
+ 8002cd4:	687b      	ldr	r3, [r7, #4]
+ 8002cd6:	681b      	ldr	r3, [r3, #0]
+ 8002cd8:	2220      	movs	r2, #32
+ 8002cda:	4013      	ands	r3, r2
+ 8002cdc:	d01f      	beq.n	8002d1e <HAL_RCCEx_PeriphCLKConfig+0x196>
     {
       __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
- 8002f6a:	687b      	ldr	r3, [r7, #4]
- 8002f6c:	685a      	ldr	r2, [r3, #4]
- 8002f6e:	23c0      	movs	r3, #192	; 0xc0
- 8002f70:	029b      	lsls	r3, r3, #10
- 8002f72:	401a      	ands	r2, r3
- 8002f74:	23c0      	movs	r3, #192	; 0xc0
- 8002f76:	029b      	lsls	r3, r3, #10
- 8002f78:	429a      	cmp	r2, r3
- 8002f7a:	d10c      	bne.n	8002f96 <HAL_RCCEx_PeriphCLKConfig+0x182>
- 8002f7c:	4b38      	ldr	r3, [pc, #224]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002f7e:	681b      	ldr	r3, [r3, #0]
- 8002f80:	4a3c      	ldr	r2, [pc, #240]	; (8003074 <HAL_RCCEx_PeriphCLKConfig+0x260>)
- 8002f82:	4013      	ands	r3, r2
- 8002f84:	0019      	movs	r1, r3
- 8002f86:	687b      	ldr	r3, [r7, #4]
- 8002f88:	685a      	ldr	r2, [r3, #4]
- 8002f8a:	23c0      	movs	r3, #192	; 0xc0
- 8002f8c:	039b      	lsls	r3, r3, #14
- 8002f8e:	401a      	ands	r2, r3
- 8002f90:	4b33      	ldr	r3, [pc, #204]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002f92:	430a      	orrs	r2, r1
- 8002f94:	601a      	str	r2, [r3, #0]
- 8002f96:	4b32      	ldr	r3, [pc, #200]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002f98:	6d19      	ldr	r1, [r3, #80]	; 0x50
- 8002f9a:	687b      	ldr	r3, [r7, #4]
- 8002f9c:	685a      	ldr	r2, [r3, #4]
- 8002f9e:	23c0      	movs	r3, #192	; 0xc0
- 8002fa0:	029b      	lsls	r3, r3, #10
- 8002fa2:	401a      	ands	r2, r3
- 8002fa4:	4b2e      	ldr	r3, [pc, #184]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002fa6:	430a      	orrs	r2, r1
- 8002fa8:	651a      	str	r2, [r3, #80]	; 0x50
+ 8002cde:	687b      	ldr	r3, [r7, #4]
+ 8002ce0:	685a      	ldr	r2, [r3, #4]
+ 8002ce2:	23c0      	movs	r3, #192	; 0xc0
+ 8002ce4:	029b      	lsls	r3, r3, #10
+ 8002ce6:	401a      	ands	r2, r3
+ 8002ce8:	23c0      	movs	r3, #192	; 0xc0
+ 8002cea:	029b      	lsls	r3, r3, #10
+ 8002cec:	429a      	cmp	r2, r3
+ 8002cee:	d10c      	bne.n	8002d0a <HAL_RCCEx_PeriphCLKConfig+0x182>
+ 8002cf0:	4b38      	ldr	r3, [pc, #224]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002cf2:	681b      	ldr	r3, [r3, #0]
+ 8002cf4:	4a3c      	ldr	r2, [pc, #240]	; (8002de8 <HAL_RCCEx_PeriphCLKConfig+0x260>)
+ 8002cf6:	4013      	ands	r3, r2
+ 8002cf8:	0019      	movs	r1, r3
+ 8002cfa:	687b      	ldr	r3, [r7, #4]
+ 8002cfc:	685a      	ldr	r2, [r3, #4]
+ 8002cfe:	23c0      	movs	r3, #192	; 0xc0
+ 8002d00:	039b      	lsls	r3, r3, #14
+ 8002d02:	401a      	ands	r2, r3
+ 8002d04:	4b33      	ldr	r3, [pc, #204]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d06:	430a      	orrs	r2, r1
+ 8002d08:	601a      	str	r2, [r3, #0]
+ 8002d0a:	4b32      	ldr	r3, [pc, #200]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d0c:	6d19      	ldr	r1, [r3, #80]	; 0x50
+ 8002d0e:	687b      	ldr	r3, [r7, #4]
+ 8002d10:	685a      	ldr	r2, [r3, #4]
+ 8002d12:	23c0      	movs	r3, #192	; 0xc0
+ 8002d14:	029b      	lsls	r3, r3, #10
+ 8002d16:	401a      	ands	r2, r3
+ 8002d18:	4b2e      	ldr	r3, [pc, #184]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d1a:	430a      	orrs	r2, r1
+ 8002d1c:	651a      	str	r2, [r3, #80]	; 0x50
     }
 
     /* Require to disable power clock if necessary */
     if(pwrclkchanged == SET)
- 8002faa:	2317      	movs	r3, #23
- 8002fac:	18fb      	adds	r3, r7, r3
- 8002fae:	781b      	ldrb	r3, [r3, #0]
- 8002fb0:	2b01      	cmp	r3, #1
- 8002fb2:	d105      	bne.n	8002fc0 <HAL_RCCEx_PeriphCLKConfig+0x1ac>
+ 8002d1e:	2317      	movs	r3, #23
+ 8002d20:	18fb      	adds	r3, r7, r3
+ 8002d22:	781b      	ldrb	r3, [r3, #0]
+ 8002d24:	2b01      	cmp	r3, #1
+ 8002d26:	d105      	bne.n	8002d34 <HAL_RCCEx_PeriphCLKConfig+0x1ac>
     {
       __HAL_RCC_PWR_CLK_DISABLE();
- 8002fb4:	4b2a      	ldr	r3, [pc, #168]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002fb6:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 8002fb8:	4b29      	ldr	r3, [pc, #164]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002fba:	492f      	ldr	r1, [pc, #188]	; (8003078 <HAL_RCCEx_PeriphCLKConfig+0x264>)
- 8002fbc:	400a      	ands	r2, r1
- 8002fbe:	639a      	str	r2, [r3, #56]	; 0x38
+ 8002d28:	4b2a      	ldr	r3, [pc, #168]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d2a:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 8002d2c:	4b29      	ldr	r3, [pc, #164]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d2e:	492f      	ldr	r1, [pc, #188]	; (8002dec <HAL_RCCEx_PeriphCLKConfig+0x264>)
+ 8002d30:	400a      	ands	r2, r1
+ 8002d32:	639a      	str	r2, [r3, #56]	; 0x38
     }
   }
 
 #if defined (RCC_CCIPR_USART1SEL)
   /*------------------------------- USART1 Configuration ------------------------*/
   if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
- 8002fc0:	687b      	ldr	r3, [r7, #4]
- 8002fc2:	681b      	ldr	r3, [r3, #0]
- 8002fc4:	2201      	movs	r2, #1
- 8002fc6:	4013      	ands	r3, r2
- 8002fc8:	d009      	beq.n	8002fde <HAL_RCCEx_PeriphCLKConfig+0x1ca>
+ 8002d34:	687b      	ldr	r3, [r7, #4]
+ 8002d36:	681b      	ldr	r3, [r3, #0]
+ 8002d38:	2201      	movs	r2, #1
+ 8002d3a:	4013      	ands	r3, r2
+ 8002d3c:	d009      	beq.n	8002d52 <HAL_RCCEx_PeriphCLKConfig+0x1ca>
   {
     /* Check the parameters */
     assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
 
     /* Configure the USART1 clock source */
     __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
- 8002fca:	4b25      	ldr	r3, [pc, #148]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002fcc:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
- 8002fce:	2203      	movs	r2, #3
- 8002fd0:	4393      	bics	r3, r2
- 8002fd2:	0019      	movs	r1, r3
- 8002fd4:	687b      	ldr	r3, [r7, #4]
- 8002fd6:	689a      	ldr	r2, [r3, #8]
- 8002fd8:	4b21      	ldr	r3, [pc, #132]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002fda:	430a      	orrs	r2, r1
- 8002fdc:	64da      	str	r2, [r3, #76]	; 0x4c
+ 8002d3e:	4b25      	ldr	r3, [pc, #148]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d40:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8002d42:	2203      	movs	r2, #3
+ 8002d44:	4393      	bics	r3, r2
+ 8002d46:	0019      	movs	r1, r3
+ 8002d48:	687b      	ldr	r3, [r7, #4]
+ 8002d4a:	689a      	ldr	r2, [r3, #8]
+ 8002d4c:	4b21      	ldr	r3, [pc, #132]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d4e:	430a      	orrs	r2, r1
+ 8002d50:	64da      	str	r2, [r3, #76]	; 0x4c
   }
 #endif /* RCC_CCIPR_USART1SEL */
 
   /*----------------------------- USART2 Configuration --------------------------*/
   if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
- 8002fde:	687b      	ldr	r3, [r7, #4]
- 8002fe0:	681b      	ldr	r3, [r3, #0]
- 8002fe2:	2202      	movs	r2, #2
- 8002fe4:	4013      	ands	r3, r2
- 8002fe6:	d009      	beq.n	8002ffc <HAL_RCCEx_PeriphCLKConfig+0x1e8>
+ 8002d52:	687b      	ldr	r3, [r7, #4]
+ 8002d54:	681b      	ldr	r3, [r3, #0]
+ 8002d56:	2202      	movs	r2, #2
+ 8002d58:	4013      	ands	r3, r2
+ 8002d5a:	d009      	beq.n	8002d70 <HAL_RCCEx_PeriphCLKConfig+0x1e8>
   {
     /* Check the parameters */
     assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
 
     /* Configure the USART2 clock source */
     __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
- 8002fe8:	4b1d      	ldr	r3, [pc, #116]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002fea:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
- 8002fec:	220c      	movs	r2, #12
- 8002fee:	4393      	bics	r3, r2
- 8002ff0:	0019      	movs	r1, r3
- 8002ff2:	687b      	ldr	r3, [r7, #4]
- 8002ff4:	68da      	ldr	r2, [r3, #12]
- 8002ff6:	4b1a      	ldr	r3, [pc, #104]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8002ff8:	430a      	orrs	r2, r1
- 8002ffa:	64da      	str	r2, [r3, #76]	; 0x4c
+ 8002d5c:	4b1d      	ldr	r3, [pc, #116]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d5e:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8002d60:	220c      	movs	r2, #12
+ 8002d62:	4393      	bics	r3, r2
+ 8002d64:	0019      	movs	r1, r3
+ 8002d66:	687b      	ldr	r3, [r7, #4]
+ 8002d68:	68da      	ldr	r2, [r3, #12]
+ 8002d6a:	4b1a      	ldr	r3, [pc, #104]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d6c:	430a      	orrs	r2, r1
+ 8002d6e:	64da      	str	r2, [r3, #76]	; 0x4c
   }
 
   /*------------------------------ LPUART1 Configuration ------------------------*/
   if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1)
- 8002ffc:	687b      	ldr	r3, [r7, #4]
- 8002ffe:	681b      	ldr	r3, [r3, #0]
- 8003000:	2204      	movs	r2, #4
- 8003002:	4013      	ands	r3, r2
- 8003004:	d009      	beq.n	800301a <HAL_RCCEx_PeriphCLKConfig+0x206>
+ 8002d70:	687b      	ldr	r3, [r7, #4]
+ 8002d72:	681b      	ldr	r3, [r3, #0]
+ 8002d74:	2204      	movs	r2, #4
+ 8002d76:	4013      	ands	r3, r2
+ 8002d78:	d009      	beq.n	8002d8e <HAL_RCCEx_PeriphCLKConfig+0x206>
   {
     /* Check the parameters */
     assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection));
 
     /* Configure the LPUAR1 clock source */
     __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection);
- 8003006:	4b16      	ldr	r3, [pc, #88]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8003008:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
- 800300a:	4a1c      	ldr	r2, [pc, #112]	; (800307c <HAL_RCCEx_PeriphCLKConfig+0x268>)
- 800300c:	4013      	ands	r3, r2
- 800300e:	0019      	movs	r1, r3
- 8003010:	687b      	ldr	r3, [r7, #4]
- 8003012:	691a      	ldr	r2, [r3, #16]
- 8003014:	4b12      	ldr	r3, [pc, #72]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8003016:	430a      	orrs	r2, r1
- 8003018:	64da      	str	r2, [r3, #76]	; 0x4c
+ 8002d7a:	4b16      	ldr	r3, [pc, #88]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d7c:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8002d7e:	4a1c      	ldr	r2, [pc, #112]	; (8002df0 <HAL_RCCEx_PeriphCLKConfig+0x268>)
+ 8002d80:	4013      	ands	r3, r2
+ 8002d82:	0019      	movs	r1, r3
+ 8002d84:	687b      	ldr	r3, [r7, #4]
+ 8002d86:	691a      	ldr	r2, [r3, #16]
+ 8002d88:	4b12      	ldr	r3, [pc, #72]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d8a:	430a      	orrs	r2, r1
+ 8002d8c:	64da      	str	r2, [r3, #76]	; 0x4c
   }
 
   /*------------------------------ I2C1 Configuration ------------------------*/
   if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
- 800301a:	687b      	ldr	r3, [r7, #4]
- 800301c:	681b      	ldr	r3, [r3, #0]
- 800301e:	2208      	movs	r2, #8
- 8003020:	4013      	ands	r3, r2
- 8003022:	d009      	beq.n	8003038 <HAL_RCCEx_PeriphCLKConfig+0x224>
+ 8002d8e:	687b      	ldr	r3, [r7, #4]
+ 8002d90:	681b      	ldr	r3, [r3, #0]
+ 8002d92:	2208      	movs	r2, #8
+ 8002d94:	4013      	ands	r3, r2
+ 8002d96:	d009      	beq.n	8002dac <HAL_RCCEx_PeriphCLKConfig+0x224>
   {
     /* Check the parameters */
     assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
 
     /* Configure the I2C1 clock source */
     __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
- 8003024:	4b0e      	ldr	r3, [pc, #56]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8003026:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
- 8003028:	4a15      	ldr	r2, [pc, #84]	; (8003080 <HAL_RCCEx_PeriphCLKConfig+0x26c>)
- 800302a:	4013      	ands	r3, r2
- 800302c:	0019      	movs	r1, r3
- 800302e:	687b      	ldr	r3, [r7, #4]
- 8003030:	695a      	ldr	r2, [r3, #20]
- 8003032:	4b0b      	ldr	r3, [pc, #44]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8003034:	430a      	orrs	r2, r1
- 8003036:	64da      	str	r2, [r3, #76]	; 0x4c
+ 8002d98:	4b0e      	ldr	r3, [pc, #56]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002d9a:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8002d9c:	4a15      	ldr	r2, [pc, #84]	; (8002df4 <HAL_RCCEx_PeriphCLKConfig+0x26c>)
+ 8002d9e:	4013      	ands	r3, r2
+ 8002da0:	0019      	movs	r1, r3
+ 8002da2:	687b      	ldr	r3, [r7, #4]
+ 8002da4:	695a      	ldr	r2, [r3, #20]
+ 8002da6:	4b0b      	ldr	r3, [pc, #44]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002da8:	430a      	orrs	r2, r1
+ 8002daa:	64da      	str	r2, [r3, #76]	; 0x4c
     __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
   }
 #endif /* USB */
 
   /*---------------------------- LPTIM1 configuration ------------------------*/
   if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == (RCC_PERIPHCLK_LPTIM1))
- 8003038:	687b      	ldr	r3, [r7, #4]
- 800303a:	681b      	ldr	r3, [r3, #0]
- 800303c:	2280      	movs	r2, #128	; 0x80
- 800303e:	4013      	ands	r3, r2
- 8003040:	d009      	beq.n	8003056 <HAL_RCCEx_PeriphCLKConfig+0x242>
+ 8002dac:	687b      	ldr	r3, [r7, #4]
+ 8002dae:	681b      	ldr	r3, [r3, #0]
+ 8002db0:	2280      	movs	r2, #128	; 0x80
+ 8002db2:	4013      	ands	r3, r2
+ 8002db4:	d009      	beq.n	8002dca <HAL_RCCEx_PeriphCLKConfig+0x242>
   {
     assert_param(IS_RCC_LPTIMCLK(PeriphClkInit->LptimClockSelection));
     __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->LptimClockSelection);
- 8003042:	4b07      	ldr	r3, [pc, #28]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8003044:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
- 8003046:	4a0f      	ldr	r2, [pc, #60]	; (8003084 <HAL_RCCEx_PeriphCLKConfig+0x270>)
- 8003048:	4013      	ands	r3, r2
- 800304a:	0019      	movs	r1, r3
- 800304c:	687b      	ldr	r3, [r7, #4]
- 800304e:	699a      	ldr	r2, [r3, #24]
- 8003050:	4b03      	ldr	r3, [pc, #12]	; (8003060 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
- 8003052:	430a      	orrs	r2, r1
- 8003054:	64da      	str	r2, [r3, #76]	; 0x4c
+ 8002db6:	4b07      	ldr	r3, [pc, #28]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002db8:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8002dba:	4a0f      	ldr	r2, [pc, #60]	; (8002df8 <HAL_RCCEx_PeriphCLKConfig+0x270>)
+ 8002dbc:	4013      	ands	r3, r2
+ 8002dbe:	0019      	movs	r1, r3
+ 8002dc0:	687b      	ldr	r3, [r7, #4]
+ 8002dc2:	699a      	ldr	r2, [r3, #24]
+ 8002dc4:	4b03      	ldr	r3, [pc, #12]	; (8002dd4 <HAL_RCCEx_PeriphCLKConfig+0x24c>)
+ 8002dc6:	430a      	orrs	r2, r1
+ 8002dc8:	64da      	str	r2, [r3, #76]	; 0x4c
   }
 
   return HAL_OK;
- 8003056:	2300      	movs	r3, #0
+ 8002dca:	2300      	movs	r3, #0
 }
- 8003058:	0018      	movs	r0, r3
- 800305a:	46bd      	mov	sp, r7
- 800305c:	b006      	add	sp, #24
- 800305e:	bd80      	pop	{r7, pc}
- 8003060:	40021000 	.word	0x40021000
- 8003064:	40007000 	.word	0x40007000
- 8003068:	fffcffff 	.word	0xfffcffff
- 800306c:	fff7ffff 	.word	0xfff7ffff
- 8003070:	00001388 	.word	0x00001388
- 8003074:	ffcfffff 	.word	0xffcfffff
- 8003078:	efffffff 	.word	0xefffffff
- 800307c:	fffff3ff 	.word	0xfffff3ff
- 8003080:	ffffcfff 	.word	0xffffcfff
- 8003084:	fff3ffff 	.word	0xfff3ffff
+ 8002dcc:	0018      	movs	r0, r3
+ 8002dce:	46bd      	mov	sp, r7
+ 8002dd0:	b006      	add	sp, #24
+ 8002dd2:	bd80      	pop	{r7, pc}
+ 8002dd4:	40021000 	.word	0x40021000
+ 8002dd8:	40007000 	.word	0x40007000
+ 8002ddc:	fffcffff 	.word	0xfffcffff
+ 8002de0:	fff7ffff 	.word	0xfff7ffff
+ 8002de4:	00001388 	.word	0x00001388
+ 8002de8:	ffcfffff 	.word	0xffcfffff
+ 8002dec:	efffffff 	.word	0xefffffff
+ 8002df0:	fffff3ff 	.word	0xfffff3ff
+ 8002df4:	ffffcfff 	.word	0xffffcfff
+ 8002df8:	fff3ffff 	.word	0xfff3ffff
 
-08003088 <HAL_SPI_Init>:
+08002dfc <HAL_SPI_Init>:
   * @param  hspi pointer to a SPI_HandleTypeDef structure that contains
   *               the configuration information for SPI module.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
 {
- 8003088:	b580      	push	{r7, lr}
- 800308a:	b082      	sub	sp, #8
- 800308c:	af00      	add	r7, sp, #0
- 800308e:	6078      	str	r0, [r7, #4]
+ 8002dfc:	b580      	push	{r7, lr}
+ 8002dfe:	b082      	sub	sp, #8
+ 8002e00:	af00      	add	r7, sp, #0
+ 8002e02:	6078      	str	r0, [r7, #4]
   /* Check the SPI handle allocation */
   if (hspi == NULL)
- 8003090:	687b      	ldr	r3, [r7, #4]
- 8003092:	2b00      	cmp	r3, #0
- 8003094:	d101      	bne.n	800309a <HAL_SPI_Init+0x12>
+ 8002e04:	687b      	ldr	r3, [r7, #4]
+ 8002e06:	2b00      	cmp	r3, #0
+ 8002e08:	d101      	bne.n	8002e0e <HAL_SPI_Init+0x12>
   {
     return HAL_ERROR;
- 8003096:	2301      	movs	r3, #1
- 8003098:	e083      	b.n	80031a2 <HAL_SPI_Init+0x11a>
+ 8002e0a:	2301      	movs	r3, #1
+ 8002e0c:	e083      	b.n	8002f16 <HAL_SPI_Init+0x11a>
   assert_param(IS_SPI_DATASIZE(hspi->Init.DataSize));
   assert_param(IS_SPI_NSS(hspi->Init.NSS));
   assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
   assert_param(IS_SPI_FIRST_BIT(hspi->Init.FirstBit));
   assert_param(IS_SPI_TIMODE(hspi->Init.TIMode));
   if (hspi->Init.TIMode == SPI_TIMODE_DISABLE)
- 800309a:	687b      	ldr	r3, [r7, #4]
- 800309c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800309e:	2b00      	cmp	r3, #0
- 80030a0:	d109      	bne.n	80030b6 <HAL_SPI_Init+0x2e>
+ 8002e0e:	687b      	ldr	r3, [r7, #4]
+ 8002e10:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8002e12:	2b00      	cmp	r3, #0
+ 8002e14:	d109      	bne.n	8002e2a <HAL_SPI_Init+0x2e>
   {
     assert_param(IS_SPI_CPOL(hspi->Init.CLKPolarity));
     assert_param(IS_SPI_CPHA(hspi->Init.CLKPhase));
 
     if (hspi->Init.Mode == SPI_MODE_MASTER)
- 80030a2:	687b      	ldr	r3, [r7, #4]
- 80030a4:	685a      	ldr	r2, [r3, #4]
- 80030a6:	2382      	movs	r3, #130	; 0x82
- 80030a8:	005b      	lsls	r3, r3, #1
- 80030aa:	429a      	cmp	r2, r3
- 80030ac:	d009      	beq.n	80030c2 <HAL_SPI_Init+0x3a>
+ 8002e16:	687b      	ldr	r3, [r7, #4]
+ 8002e18:	685a      	ldr	r2, [r3, #4]
+ 8002e1a:	2382      	movs	r3, #130	; 0x82
+ 8002e1c:	005b      	lsls	r3, r3, #1
+ 8002e1e:	429a      	cmp	r2, r3
+ 8002e20:	d009      	beq.n	8002e36 <HAL_SPI_Init+0x3a>
       assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
     }
     else
     {
       /* Baudrate prescaler not use in Motoraola Slave mode. force to default value */
       hspi->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
- 80030ae:	687b      	ldr	r3, [r7, #4]
- 80030b0:	2200      	movs	r2, #0
- 80030b2:	61da      	str	r2, [r3, #28]
- 80030b4:	e005      	b.n	80030c2 <HAL_SPI_Init+0x3a>
+ 8002e22:	687b      	ldr	r3, [r7, #4]
+ 8002e24:	2200      	movs	r2, #0
+ 8002e26:	61da      	str	r2, [r3, #28]
+ 8002e28:	e005      	b.n	8002e36 <HAL_SPI_Init+0x3a>
   else
   {
     assert_param(IS_SPI_BAUDRATE_PRESCALER(hspi->Init.BaudRatePrescaler));
 
     /* Force polarity and phase to TI protocaol requirements */
     hspi->Init.CLKPolarity = SPI_POLARITY_LOW;
- 80030b6:	687b      	ldr	r3, [r7, #4]
- 80030b8:	2200      	movs	r2, #0
- 80030ba:	611a      	str	r2, [r3, #16]
+ 8002e2a:	687b      	ldr	r3, [r7, #4]
+ 8002e2c:	2200      	movs	r2, #0
+ 8002e2e:	611a      	str	r2, [r3, #16]
     hspi->Init.CLKPhase    = SPI_PHASE_1EDGE;
- 80030bc:	687b      	ldr	r3, [r7, #4]
- 80030be:	2200      	movs	r2, #0
- 80030c0:	615a      	str	r2, [r3, #20]
+ 8002e30:	687b      	ldr	r3, [r7, #4]
+ 8002e32:	2200      	movs	r2, #0
+ 8002e34:	615a      	str	r2, [r3, #20]
   if (hspi->Init.CRCCalculation == SPI_CRCCALCULATION_ENABLE)
   {
     assert_param(IS_SPI_CRC_POLYNOMIAL(hspi->Init.CRCPolynomial));
   }
 #else
   hspi->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
- 80030c2:	687b      	ldr	r3, [r7, #4]
- 80030c4:	2200      	movs	r2, #0
- 80030c6:	629a      	str	r2, [r3, #40]	; 0x28
+ 8002e36:	687b      	ldr	r3, [r7, #4]
+ 8002e38:	2200      	movs	r2, #0
+ 8002e3a:	629a      	str	r2, [r3, #40]	; 0x28
 #endif /* USE_SPI_CRC */
 
   if (hspi->State == HAL_SPI_STATE_RESET)
- 80030c8:	687b      	ldr	r3, [r7, #4]
- 80030ca:	2251      	movs	r2, #81	; 0x51
- 80030cc:	5c9b      	ldrb	r3, [r3, r2]
- 80030ce:	b2db      	uxtb	r3, r3
- 80030d0:	2b00      	cmp	r3, #0
- 80030d2:	d107      	bne.n	80030e4 <HAL_SPI_Init+0x5c>
+ 8002e3c:	687b      	ldr	r3, [r7, #4]
+ 8002e3e:	2251      	movs	r2, #81	; 0x51
+ 8002e40:	5c9b      	ldrb	r3, [r3, r2]
+ 8002e42:	b2db      	uxtb	r3, r3
+ 8002e44:	2b00      	cmp	r3, #0
+ 8002e46:	d107      	bne.n	8002e58 <HAL_SPI_Init+0x5c>
   {
     /* Allocate lock resource and initialize it */
     hspi->Lock = HAL_UNLOCKED;
- 80030d4:	687b      	ldr	r3, [r7, #4]
- 80030d6:	2250      	movs	r2, #80	; 0x50
- 80030d8:	2100      	movs	r1, #0
- 80030da:	5499      	strb	r1, [r3, r2]
+ 8002e48:	687b      	ldr	r3, [r7, #4]
+ 8002e4a:	2250      	movs	r2, #80	; 0x50
+ 8002e4c:	2100      	movs	r1, #0
+ 8002e4e:	5499      	strb	r1, [r3, r2]
 
     /* Init the low level hardware : GPIO, CLOCK, NVIC... */
     hspi->MspInitCallback(hspi);
 #else
     /* Init the low level hardware : GPIO, CLOCK, NVIC... */
     HAL_SPI_MspInit(hspi);
- 80030dc:	687b      	ldr	r3, [r7, #4]
- 80030de:	0018      	movs	r0, r3
- 80030e0:	f7fe f86c 	bl	80011bc <HAL_SPI_MspInit>
+ 8002e50:	687b      	ldr	r3, [r7, #4]
+ 8002e52:	0018      	movs	r0, r3
+ 8002e54:	f7fe f900 	bl	8001058 <HAL_SPI_MspInit>
 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
   }
 
   hspi->State = HAL_SPI_STATE_BUSY;
- 80030e4:	687b      	ldr	r3, [r7, #4]
- 80030e6:	2251      	movs	r2, #81	; 0x51
- 80030e8:	2102      	movs	r1, #2
- 80030ea:	5499      	strb	r1, [r3, r2]
+ 8002e58:	687b      	ldr	r3, [r7, #4]
+ 8002e5a:	2251      	movs	r2, #81	; 0x51
+ 8002e5c:	2102      	movs	r1, #2
+ 8002e5e:	5499      	strb	r1, [r3, r2]
 
   /* Disable the selected SPI peripheral */
   __HAL_SPI_DISABLE(hspi);
- 80030ec:	687b      	ldr	r3, [r7, #4]
- 80030ee:	681b      	ldr	r3, [r3, #0]
- 80030f0:	681a      	ldr	r2, [r3, #0]
- 80030f2:	687b      	ldr	r3, [r7, #4]
- 80030f4:	681b      	ldr	r3, [r3, #0]
- 80030f6:	2140      	movs	r1, #64	; 0x40
- 80030f8:	438a      	bics	r2, r1
- 80030fa:	601a      	str	r2, [r3, #0]
+ 8002e60:	687b      	ldr	r3, [r7, #4]
+ 8002e62:	681b      	ldr	r3, [r3, #0]
+ 8002e64:	681a      	ldr	r2, [r3, #0]
+ 8002e66:	687b      	ldr	r3, [r7, #4]
+ 8002e68:	681b      	ldr	r3, [r3, #0]
+ 8002e6a:	2140      	movs	r1, #64	; 0x40
+ 8002e6c:	438a      	bics	r2, r1
+ 8002e6e:	601a      	str	r2, [r3, #0]
 
   /*----------------------- SPIx CR1 & CR2 Configuration ---------------------*/
   /* Configure : SPI Mode, Communication Mode, Data size, Clock polarity and phase, NSS management,
   Communication speed, First bit and CRC calculation state */
   WRITE_REG(hspi->Instance->CR1, ((hspi->Init.Mode & (SPI_CR1_MSTR | SPI_CR1_SSI)) |
- 80030fc:	687b      	ldr	r3, [r7, #4]
- 80030fe:	685a      	ldr	r2, [r3, #4]
- 8003100:	2382      	movs	r3, #130	; 0x82
- 8003102:	005b      	lsls	r3, r3, #1
- 8003104:	401a      	ands	r2, r3
- 8003106:	687b      	ldr	r3, [r7, #4]
- 8003108:	6899      	ldr	r1, [r3, #8]
- 800310a:	2384      	movs	r3, #132	; 0x84
- 800310c:	021b      	lsls	r3, r3, #8
- 800310e:	400b      	ands	r3, r1
- 8003110:	431a      	orrs	r2, r3
- 8003112:	687b      	ldr	r3, [r7, #4]
- 8003114:	68d9      	ldr	r1, [r3, #12]
- 8003116:	2380      	movs	r3, #128	; 0x80
- 8003118:	011b      	lsls	r3, r3, #4
- 800311a:	400b      	ands	r3, r1
- 800311c:	431a      	orrs	r2, r3
- 800311e:	687b      	ldr	r3, [r7, #4]
- 8003120:	691b      	ldr	r3, [r3, #16]
- 8003122:	2102      	movs	r1, #2
- 8003124:	400b      	ands	r3, r1
- 8003126:	431a      	orrs	r2, r3
- 8003128:	687b      	ldr	r3, [r7, #4]
- 800312a:	695b      	ldr	r3, [r3, #20]
- 800312c:	2101      	movs	r1, #1
- 800312e:	400b      	ands	r3, r1
- 8003130:	431a      	orrs	r2, r3
- 8003132:	687b      	ldr	r3, [r7, #4]
- 8003134:	6999      	ldr	r1, [r3, #24]
- 8003136:	2380      	movs	r3, #128	; 0x80
- 8003138:	009b      	lsls	r3, r3, #2
- 800313a:	400b      	ands	r3, r1
- 800313c:	431a      	orrs	r2, r3
- 800313e:	687b      	ldr	r3, [r7, #4]
- 8003140:	69db      	ldr	r3, [r3, #28]
- 8003142:	2138      	movs	r1, #56	; 0x38
- 8003144:	400b      	ands	r3, r1
- 8003146:	431a      	orrs	r2, r3
- 8003148:	687b      	ldr	r3, [r7, #4]
- 800314a:	6a1b      	ldr	r3, [r3, #32]
- 800314c:	2180      	movs	r1, #128	; 0x80
- 800314e:	400b      	ands	r3, r1
- 8003150:	431a      	orrs	r2, r3
- 8003152:	0011      	movs	r1, r2
- 8003154:	687b      	ldr	r3, [r7, #4]
- 8003156:	6a9a      	ldr	r2, [r3, #40]	; 0x28
- 8003158:	2380      	movs	r3, #128	; 0x80
- 800315a:	019b      	lsls	r3, r3, #6
- 800315c:	401a      	ands	r2, r3
- 800315e:	687b      	ldr	r3, [r7, #4]
- 8003160:	681b      	ldr	r3, [r3, #0]
- 8003162:	430a      	orrs	r2, r1
- 8003164:	601a      	str	r2, [r3, #0]
+ 8002e70:	687b      	ldr	r3, [r7, #4]
+ 8002e72:	685a      	ldr	r2, [r3, #4]
+ 8002e74:	2382      	movs	r3, #130	; 0x82
+ 8002e76:	005b      	lsls	r3, r3, #1
+ 8002e78:	401a      	ands	r2, r3
+ 8002e7a:	687b      	ldr	r3, [r7, #4]
+ 8002e7c:	6899      	ldr	r1, [r3, #8]
+ 8002e7e:	2384      	movs	r3, #132	; 0x84
+ 8002e80:	021b      	lsls	r3, r3, #8
+ 8002e82:	400b      	ands	r3, r1
+ 8002e84:	431a      	orrs	r2, r3
+ 8002e86:	687b      	ldr	r3, [r7, #4]
+ 8002e88:	68d9      	ldr	r1, [r3, #12]
+ 8002e8a:	2380      	movs	r3, #128	; 0x80
+ 8002e8c:	011b      	lsls	r3, r3, #4
+ 8002e8e:	400b      	ands	r3, r1
+ 8002e90:	431a      	orrs	r2, r3
+ 8002e92:	687b      	ldr	r3, [r7, #4]
+ 8002e94:	691b      	ldr	r3, [r3, #16]
+ 8002e96:	2102      	movs	r1, #2
+ 8002e98:	400b      	ands	r3, r1
+ 8002e9a:	431a      	orrs	r2, r3
+ 8002e9c:	687b      	ldr	r3, [r7, #4]
+ 8002e9e:	695b      	ldr	r3, [r3, #20]
+ 8002ea0:	2101      	movs	r1, #1
+ 8002ea2:	400b      	ands	r3, r1
+ 8002ea4:	431a      	orrs	r2, r3
+ 8002ea6:	687b      	ldr	r3, [r7, #4]
+ 8002ea8:	6999      	ldr	r1, [r3, #24]
+ 8002eaa:	2380      	movs	r3, #128	; 0x80
+ 8002eac:	009b      	lsls	r3, r3, #2
+ 8002eae:	400b      	ands	r3, r1
+ 8002eb0:	431a      	orrs	r2, r3
+ 8002eb2:	687b      	ldr	r3, [r7, #4]
+ 8002eb4:	69db      	ldr	r3, [r3, #28]
+ 8002eb6:	2138      	movs	r1, #56	; 0x38
+ 8002eb8:	400b      	ands	r3, r1
+ 8002eba:	431a      	orrs	r2, r3
+ 8002ebc:	687b      	ldr	r3, [r7, #4]
+ 8002ebe:	6a1b      	ldr	r3, [r3, #32]
+ 8002ec0:	2180      	movs	r1, #128	; 0x80
+ 8002ec2:	400b      	ands	r3, r1
+ 8002ec4:	431a      	orrs	r2, r3
+ 8002ec6:	0011      	movs	r1, r2
+ 8002ec8:	687b      	ldr	r3, [r7, #4]
+ 8002eca:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 8002ecc:	2380      	movs	r3, #128	; 0x80
+ 8002ece:	019b      	lsls	r3, r3, #6
+ 8002ed0:	401a      	ands	r2, r3
+ 8002ed2:	687b      	ldr	r3, [r7, #4]
+ 8002ed4:	681b      	ldr	r3, [r3, #0]
+ 8002ed6:	430a      	orrs	r2, r1
+ 8002ed8:	601a      	str	r2, [r3, #0]
                                   (hspi->Init.BaudRatePrescaler & SPI_CR1_BR_Msk) |
                                   (hspi->Init.FirstBit  & SPI_CR1_LSBFIRST) |
                                   (hspi->Init.CRCCalculation & SPI_CR1_CRCEN)));
 
   /* Configure : NSS management, TI Mode */
   WRITE_REG(hspi->Instance->CR2, (((hspi->Init.NSS >> 16U) & SPI_CR2_SSOE) | (hspi->Init.TIMode & SPI_CR2_FRF)));
- 8003166:	687b      	ldr	r3, [r7, #4]
- 8003168:	699b      	ldr	r3, [r3, #24]
- 800316a:	0c1b      	lsrs	r3, r3, #16
- 800316c:	2204      	movs	r2, #4
- 800316e:	4013      	ands	r3, r2
- 8003170:	0019      	movs	r1, r3
- 8003172:	687b      	ldr	r3, [r7, #4]
- 8003174:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8003176:	2210      	movs	r2, #16
- 8003178:	401a      	ands	r2, r3
- 800317a:	687b      	ldr	r3, [r7, #4]
- 800317c:	681b      	ldr	r3, [r3, #0]
- 800317e:	430a      	orrs	r2, r1
- 8003180:	605a      	str	r2, [r3, #4]
+ 8002eda:	687b      	ldr	r3, [r7, #4]
+ 8002edc:	699b      	ldr	r3, [r3, #24]
+ 8002ede:	0c1b      	lsrs	r3, r3, #16
+ 8002ee0:	2204      	movs	r2, #4
+ 8002ee2:	4013      	ands	r3, r2
+ 8002ee4:	0019      	movs	r1, r3
+ 8002ee6:	687b      	ldr	r3, [r7, #4]
+ 8002ee8:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8002eea:	2210      	movs	r2, #16
+ 8002eec:	401a      	ands	r2, r3
+ 8002eee:	687b      	ldr	r3, [r7, #4]
+ 8002ef0:	681b      	ldr	r3, [r3, #0]
+ 8002ef2:	430a      	orrs	r2, r1
+ 8002ef4:	605a      	str	r2, [r3, #4]
   }
 #endif /* USE_SPI_CRC */
 
 #if defined(SPI_I2SCFGR_I2SMOD)
   /* Activate the SPI mode (Make sure that I2SMOD bit in I2SCFGR register is reset) */
   CLEAR_BIT(hspi->Instance->I2SCFGR, SPI_I2SCFGR_I2SMOD);
- 8003182:	687b      	ldr	r3, [r7, #4]
- 8003184:	681b      	ldr	r3, [r3, #0]
- 8003186:	69da      	ldr	r2, [r3, #28]
- 8003188:	687b      	ldr	r3, [r7, #4]
- 800318a:	681b      	ldr	r3, [r3, #0]
- 800318c:	4907      	ldr	r1, [pc, #28]	; (80031ac <HAL_SPI_Init+0x124>)
- 800318e:	400a      	ands	r2, r1
- 8003190:	61da      	str	r2, [r3, #28]
+ 8002ef6:	687b      	ldr	r3, [r7, #4]
+ 8002ef8:	681b      	ldr	r3, [r3, #0]
+ 8002efa:	69da      	ldr	r2, [r3, #28]
+ 8002efc:	687b      	ldr	r3, [r7, #4]
+ 8002efe:	681b      	ldr	r3, [r3, #0]
+ 8002f00:	4907      	ldr	r1, [pc, #28]	; (8002f20 <HAL_SPI_Init+0x124>)
+ 8002f02:	400a      	ands	r2, r1
+ 8002f04:	61da      	str	r2, [r3, #28]
 #endif /* SPI_I2SCFGR_I2SMOD */
 
   hspi->ErrorCode = HAL_SPI_ERROR_NONE;
- 8003192:	687b      	ldr	r3, [r7, #4]
- 8003194:	2200      	movs	r2, #0
- 8003196:	655a      	str	r2, [r3, #84]	; 0x54
+ 8002f06:	687b      	ldr	r3, [r7, #4]
+ 8002f08:	2200      	movs	r2, #0
+ 8002f0a:	655a      	str	r2, [r3, #84]	; 0x54
   hspi->State     = HAL_SPI_STATE_READY;
- 8003198:	687b      	ldr	r3, [r7, #4]
- 800319a:	2251      	movs	r2, #81	; 0x51
- 800319c:	2101      	movs	r1, #1
- 800319e:	5499      	strb	r1, [r3, r2]
+ 8002f0c:	687b      	ldr	r3, [r7, #4]
+ 8002f0e:	2251      	movs	r2, #81	; 0x51
+ 8002f10:	2101      	movs	r1, #1
+ 8002f12:	5499      	strb	r1, [r3, r2]
 
   return HAL_OK;
- 80031a0:	2300      	movs	r3, #0
+ 8002f14:	2300      	movs	r3, #0
 }
- 80031a2:	0018      	movs	r0, r3
- 80031a4:	46bd      	mov	sp, r7
- 80031a6:	b002      	add	sp, #8
- 80031a8:	bd80      	pop	{r7, pc}
- 80031aa:	46c0      	nop			; (mov r8, r8)
- 80031ac:	fffff7ff 	.word	0xfffff7ff
+ 8002f16:	0018      	movs	r0, r3
+ 8002f18:	46bd      	mov	sp, r7
+ 8002f1a:	b002      	add	sp, #8
+ 8002f1c:	bd80      	pop	{r7, pc}
+ 8002f1e:	46c0      	nop			; (mov r8, r8)
+ 8002f20:	fffff7ff 	.word	0xfffff7ff
 
-080031b0 <HAL_TIM_Base_Init>:
+08002f24 <HAL_TIM_Base_Init>:
   *         Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
   * @param  htim TIM Base handle
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
 {
- 80031b0:	b580      	push	{r7, lr}
- 80031b2:	b082      	sub	sp, #8
- 80031b4:	af00      	add	r7, sp, #0
- 80031b6:	6078      	str	r0, [r7, #4]
+ 8002f24:	b580      	push	{r7, lr}
+ 8002f26:	b082      	sub	sp, #8
+ 8002f28:	af00      	add	r7, sp, #0
+ 8002f2a:	6078      	str	r0, [r7, #4]
   /* Check the TIM handle allocation */
   if (htim == NULL)
- 80031b8:	687b      	ldr	r3, [r7, #4]
- 80031ba:	2b00      	cmp	r3, #0
- 80031bc:	d101      	bne.n	80031c2 <HAL_TIM_Base_Init+0x12>
+ 8002f2c:	687b      	ldr	r3, [r7, #4]
+ 8002f2e:	2b00      	cmp	r3, #0
+ 8002f30:	d101      	bne.n	8002f36 <HAL_TIM_Base_Init+0x12>
   {
     return HAL_ERROR;
- 80031be:	2301      	movs	r3, #1
- 80031c0:	e032      	b.n	8003228 <HAL_TIM_Base_Init+0x78>
+ 8002f32:	2301      	movs	r3, #1
+ 8002f34:	e032      	b.n	8002f9c <HAL_TIM_Base_Init+0x78>
   assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
   assert_param(IS_TIM_PERIOD(htim->Init.Period));
   assert_param(IS_TIM_PRESCALER(htim->Init.Prescaler));
   assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
 
   if (htim->State == HAL_TIM_STATE_RESET)
- 80031c2:	687b      	ldr	r3, [r7, #4]
- 80031c4:	2239      	movs	r2, #57	; 0x39
- 80031c6:	5c9b      	ldrb	r3, [r3, r2]
- 80031c8:	b2db      	uxtb	r3, r3
- 80031ca:	2b00      	cmp	r3, #0
- 80031cc:	d107      	bne.n	80031de <HAL_TIM_Base_Init+0x2e>
+ 8002f36:	687b      	ldr	r3, [r7, #4]
+ 8002f38:	2239      	movs	r2, #57	; 0x39
+ 8002f3a:	5c9b      	ldrb	r3, [r3, r2]
+ 8002f3c:	b2db      	uxtb	r3, r3
+ 8002f3e:	2b00      	cmp	r3, #0
+ 8002f40:	d107      	bne.n	8002f52 <HAL_TIM_Base_Init+0x2e>
   {
     /* Allocate lock resource and initialize it */
     htim->Lock = HAL_UNLOCKED;
- 80031ce:	687b      	ldr	r3, [r7, #4]
- 80031d0:	2238      	movs	r2, #56	; 0x38
- 80031d2:	2100      	movs	r1, #0
- 80031d4:	5499      	strb	r1, [r3, r2]
+ 8002f42:	687b      	ldr	r3, [r7, #4]
+ 8002f44:	2238      	movs	r2, #56	; 0x38
+ 8002f46:	2100      	movs	r1, #0
+ 8002f48:	5499      	strb	r1, [r3, r2]
     }
     /* Init the low level hardware : GPIO, CLOCK, NVIC */
     htim->Base_MspInitCallback(htim);
 #else
     /* Init the low level hardware : GPIO, CLOCK, NVIC */
     HAL_TIM_Base_MspInit(htim);
- 80031d6:	687b      	ldr	r3, [r7, #4]
- 80031d8:	0018      	movs	r0, r3
- 80031da:	f7fe f833 	bl	8001244 <HAL_TIM_Base_MspInit>
+ 8002f4a:	687b      	ldr	r3, [r7, #4]
+ 8002f4c:	0018      	movs	r0, r3
+ 8002f4e:	f7fe f8c7 	bl	80010e0 <HAL_TIM_Base_MspInit>
 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
   }
 
   /* Set the TIM state */
   htim->State = HAL_TIM_STATE_BUSY;
- 80031de:	687b      	ldr	r3, [r7, #4]
- 80031e0:	2239      	movs	r2, #57	; 0x39
- 80031e2:	2102      	movs	r1, #2
- 80031e4:	5499      	strb	r1, [r3, r2]
+ 8002f52:	687b      	ldr	r3, [r7, #4]
+ 8002f54:	2239      	movs	r2, #57	; 0x39
+ 8002f56:	2102      	movs	r1, #2
+ 8002f58:	5499      	strb	r1, [r3, r2]
 
   /* Set the Time Base configuration */
   TIM_Base_SetConfig(htim->Instance, &htim->Init);
- 80031e6:	687b      	ldr	r3, [r7, #4]
- 80031e8:	681a      	ldr	r2, [r3, #0]
- 80031ea:	687b      	ldr	r3, [r7, #4]
- 80031ec:	3304      	adds	r3, #4
- 80031ee:	0019      	movs	r1, r3
- 80031f0:	0010      	movs	r0, r2
- 80031f2:	f000 fa01 	bl	80035f8 <TIM_Base_SetConfig>
+ 8002f5a:	687b      	ldr	r3, [r7, #4]
+ 8002f5c:	681a      	ldr	r2, [r3, #0]
+ 8002f5e:	687b      	ldr	r3, [r7, #4]
+ 8002f60:	3304      	adds	r3, #4
+ 8002f62:	0019      	movs	r1, r3
+ 8002f64:	0010      	movs	r0, r2
+ 8002f66:	f000 fa01 	bl	800336c <TIM_Base_SetConfig>
 
   /* Initialize the DMA burst operation state */
   htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
- 80031f6:	687b      	ldr	r3, [r7, #4]
- 80031f8:	223e      	movs	r2, #62	; 0x3e
- 80031fa:	2101      	movs	r1, #1
- 80031fc:	5499      	strb	r1, [r3, r2]
+ 8002f6a:	687b      	ldr	r3, [r7, #4]
+ 8002f6c:	223e      	movs	r2, #62	; 0x3e
+ 8002f6e:	2101      	movs	r1, #1
+ 8002f70:	5499      	strb	r1, [r3, r2]
 
   /* Initialize the TIM channels state */
   TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- 80031fe:	687b      	ldr	r3, [r7, #4]
- 8003200:	223a      	movs	r2, #58	; 0x3a
- 8003202:	2101      	movs	r1, #1
- 8003204:	5499      	strb	r1, [r3, r2]
- 8003206:	687b      	ldr	r3, [r7, #4]
- 8003208:	223b      	movs	r2, #59	; 0x3b
- 800320a:	2101      	movs	r1, #1
- 800320c:	5499      	strb	r1, [r3, r2]
- 800320e:	687b      	ldr	r3, [r7, #4]
- 8003210:	223c      	movs	r2, #60	; 0x3c
- 8003212:	2101      	movs	r1, #1
- 8003214:	5499      	strb	r1, [r3, r2]
- 8003216:	687b      	ldr	r3, [r7, #4]
- 8003218:	223d      	movs	r2, #61	; 0x3d
- 800321a:	2101      	movs	r1, #1
- 800321c:	5499      	strb	r1, [r3, r2]
+ 8002f72:	687b      	ldr	r3, [r7, #4]
+ 8002f74:	223a      	movs	r2, #58	; 0x3a
+ 8002f76:	2101      	movs	r1, #1
+ 8002f78:	5499      	strb	r1, [r3, r2]
+ 8002f7a:	687b      	ldr	r3, [r7, #4]
+ 8002f7c:	223b      	movs	r2, #59	; 0x3b
+ 8002f7e:	2101      	movs	r1, #1
+ 8002f80:	5499      	strb	r1, [r3, r2]
+ 8002f82:	687b      	ldr	r3, [r7, #4]
+ 8002f84:	223c      	movs	r2, #60	; 0x3c
+ 8002f86:	2101      	movs	r1, #1
+ 8002f88:	5499      	strb	r1, [r3, r2]
+ 8002f8a:	687b      	ldr	r3, [r7, #4]
+ 8002f8c:	223d      	movs	r2, #61	; 0x3d
+ 8002f8e:	2101      	movs	r1, #1
+ 8002f90:	5499      	strb	r1, [r3, r2]
 
   /* Initialize the TIM state*/
   htim->State = HAL_TIM_STATE_READY;
- 800321e:	687b      	ldr	r3, [r7, #4]
- 8003220:	2239      	movs	r2, #57	; 0x39
- 8003222:	2101      	movs	r1, #1
- 8003224:	5499      	strb	r1, [r3, r2]
+ 8002f92:	687b      	ldr	r3, [r7, #4]
+ 8002f94:	2239      	movs	r2, #57	; 0x39
+ 8002f96:	2101      	movs	r1, #1
+ 8002f98:	5499      	strb	r1, [r3, r2]
 
   return HAL_OK;
- 8003226:	2300      	movs	r3, #0
+ 8002f9a:	2300      	movs	r3, #0
 }
- 8003228:	0018      	movs	r0, r3
- 800322a:	46bd      	mov	sp, r7
- 800322c:	b002      	add	sp, #8
- 800322e:	bd80      	pop	{r7, pc}
+ 8002f9c:	0018      	movs	r0, r3
+ 8002f9e:	46bd      	mov	sp, r7
+ 8002fa0:	b002      	add	sp, #8
+ 8002fa2:	bd80      	pop	{r7, pc}
 
-08003230 <HAL_TIM_IRQHandler>:
+08002fa4 <HAL_TIM_IRQHandler>:
   * @brief  This function handles TIM interrupts requests.
   * @param  htim TIM  handle
   * @retval None
   */
 void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim)
 {
- 8003230:	b580      	push	{r7, lr}
- 8003232:	b082      	sub	sp, #8
- 8003234:	af00      	add	r7, sp, #0
- 8003236:	6078      	str	r0, [r7, #4]
+ 8002fa4:	b580      	push	{r7, lr}
+ 8002fa6:	b082      	sub	sp, #8
+ 8002fa8:	af00      	add	r7, sp, #0
+ 8002faa:	6078      	str	r0, [r7, #4]
   /* Capture compare 1 event */
   if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC1) != RESET)
- 8003238:	687b      	ldr	r3, [r7, #4]
- 800323a:	681b      	ldr	r3, [r3, #0]
- 800323c:	691b      	ldr	r3, [r3, #16]
- 800323e:	2202      	movs	r2, #2
- 8003240:	4013      	ands	r3, r2
- 8003242:	2b02      	cmp	r3, #2
- 8003244:	d124      	bne.n	8003290 <HAL_TIM_IRQHandler+0x60>
+ 8002fac:	687b      	ldr	r3, [r7, #4]
+ 8002fae:	681b      	ldr	r3, [r3, #0]
+ 8002fb0:	691b      	ldr	r3, [r3, #16]
+ 8002fb2:	2202      	movs	r2, #2
+ 8002fb4:	4013      	ands	r3, r2
+ 8002fb6:	2b02      	cmp	r3, #2
+ 8002fb8:	d124      	bne.n	8003004 <HAL_TIM_IRQHandler+0x60>
   {
     if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC1) != RESET)
- 8003246:	687b      	ldr	r3, [r7, #4]
- 8003248:	681b      	ldr	r3, [r3, #0]
- 800324a:	68db      	ldr	r3, [r3, #12]
- 800324c:	2202      	movs	r2, #2
- 800324e:	4013      	ands	r3, r2
- 8003250:	2b02      	cmp	r3, #2
- 8003252:	d11d      	bne.n	8003290 <HAL_TIM_IRQHandler+0x60>
+ 8002fba:	687b      	ldr	r3, [r7, #4]
+ 8002fbc:	681b      	ldr	r3, [r3, #0]
+ 8002fbe:	68db      	ldr	r3, [r3, #12]
+ 8002fc0:	2202      	movs	r2, #2
+ 8002fc2:	4013      	ands	r3, r2
+ 8002fc4:	2b02      	cmp	r3, #2
+ 8002fc6:	d11d      	bne.n	8003004 <HAL_TIM_IRQHandler+0x60>
     {
       {
         __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC1);
- 8003254:	687b      	ldr	r3, [r7, #4]
- 8003256:	681b      	ldr	r3, [r3, #0]
- 8003258:	2203      	movs	r2, #3
- 800325a:	4252      	negs	r2, r2
- 800325c:	611a      	str	r2, [r3, #16]
+ 8002fc8:	687b      	ldr	r3, [r7, #4]
+ 8002fca:	681b      	ldr	r3, [r3, #0]
+ 8002fcc:	2203      	movs	r2, #3
+ 8002fce:	4252      	negs	r2, r2
+ 8002fd0:	611a      	str	r2, [r3, #16]
         htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1;
- 800325e:	687b      	ldr	r3, [r7, #4]
- 8003260:	2201      	movs	r2, #1
- 8003262:	761a      	strb	r2, [r3, #24]
+ 8002fd2:	687b      	ldr	r3, [r7, #4]
+ 8002fd4:	2201      	movs	r2, #1
+ 8002fd6:	761a      	strb	r2, [r3, #24]
 
         /* Input capture event */
         if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
- 8003264:	687b      	ldr	r3, [r7, #4]
- 8003266:	681b      	ldr	r3, [r3, #0]
- 8003268:	699b      	ldr	r3, [r3, #24]
- 800326a:	2203      	movs	r2, #3
- 800326c:	4013      	ands	r3, r2
- 800326e:	d004      	beq.n	800327a <HAL_TIM_IRQHandler+0x4a>
+ 8002fd8:	687b      	ldr	r3, [r7, #4]
+ 8002fda:	681b      	ldr	r3, [r3, #0]
+ 8002fdc:	699b      	ldr	r3, [r3, #24]
+ 8002fde:	2203      	movs	r2, #3
+ 8002fe0:	4013      	ands	r3, r2
+ 8002fe2:	d004      	beq.n	8002fee <HAL_TIM_IRQHandler+0x4a>
         {
 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
           htim->IC_CaptureCallback(htim);
 #else
           HAL_TIM_IC_CaptureCallback(htim);
- 8003270:	687b      	ldr	r3, [r7, #4]
- 8003272:	0018      	movs	r0, r3
- 8003274:	f000 f9a8 	bl	80035c8 <HAL_TIM_IC_CaptureCallback>
- 8003278:	e007      	b.n	800328a <HAL_TIM_IRQHandler+0x5a>
+ 8002fe4:	687b      	ldr	r3, [r7, #4]
+ 8002fe6:	0018      	movs	r0, r3
+ 8002fe8:	f000 f9a8 	bl	800333c <HAL_TIM_IC_CaptureCallback>
+ 8002fec:	e007      	b.n	8002ffe <HAL_TIM_IRQHandler+0x5a>
         {
 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
           htim->OC_DelayElapsedCallback(htim);
           htim->PWM_PulseFinishedCallback(htim);
 #else
           HAL_TIM_OC_DelayElapsedCallback(htim);
- 800327a:	687b      	ldr	r3, [r7, #4]
- 800327c:	0018      	movs	r0, r3
- 800327e:	f000 f99b 	bl	80035b8 <HAL_TIM_OC_DelayElapsedCallback>
+ 8002fee:	687b      	ldr	r3, [r7, #4]
+ 8002ff0:	0018      	movs	r0, r3
+ 8002ff2:	f000 f99b 	bl	800332c <HAL_TIM_OC_DelayElapsedCallback>
           HAL_TIM_PWM_PulseFinishedCallback(htim);
- 8003282:	687b      	ldr	r3, [r7, #4]
- 8003284:	0018      	movs	r0, r3
- 8003286:	f000 f9a7 	bl	80035d8 <HAL_TIM_PWM_PulseFinishedCallback>
+ 8002ff6:	687b      	ldr	r3, [r7, #4]
+ 8002ff8:	0018      	movs	r0, r3
+ 8002ffa:	f000 f9a7 	bl	800334c <HAL_TIM_PWM_PulseFinishedCallback>
 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
         }
         htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 800328a:	687b      	ldr	r3, [r7, #4]
- 800328c:	2200      	movs	r2, #0
- 800328e:	761a      	strb	r2, [r3, #24]
+ 8002ffe:	687b      	ldr	r3, [r7, #4]
+ 8003000:	2200      	movs	r2, #0
+ 8003002:	761a      	strb	r2, [r3, #24]
       }
     }
   }
   /* Capture compare 2 event */
   if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC2) != RESET)
- 8003290:	687b      	ldr	r3, [r7, #4]
- 8003292:	681b      	ldr	r3, [r3, #0]
- 8003294:	691b      	ldr	r3, [r3, #16]
- 8003296:	2204      	movs	r2, #4
- 8003298:	4013      	ands	r3, r2
- 800329a:	2b04      	cmp	r3, #4
- 800329c:	d125      	bne.n	80032ea <HAL_TIM_IRQHandler+0xba>
+ 8003004:	687b      	ldr	r3, [r7, #4]
+ 8003006:	681b      	ldr	r3, [r3, #0]
+ 8003008:	691b      	ldr	r3, [r3, #16]
+ 800300a:	2204      	movs	r2, #4
+ 800300c:	4013      	ands	r3, r2
+ 800300e:	2b04      	cmp	r3, #4
+ 8003010:	d125      	bne.n	800305e <HAL_TIM_IRQHandler+0xba>
   {
     if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC2) != RESET)
- 800329e:	687b      	ldr	r3, [r7, #4]
- 80032a0:	681b      	ldr	r3, [r3, #0]
- 80032a2:	68db      	ldr	r3, [r3, #12]
- 80032a4:	2204      	movs	r2, #4
- 80032a6:	4013      	ands	r3, r2
- 80032a8:	2b04      	cmp	r3, #4
- 80032aa:	d11e      	bne.n	80032ea <HAL_TIM_IRQHandler+0xba>
+ 8003012:	687b      	ldr	r3, [r7, #4]
+ 8003014:	681b      	ldr	r3, [r3, #0]
+ 8003016:	68db      	ldr	r3, [r3, #12]
+ 8003018:	2204      	movs	r2, #4
+ 800301a:	4013      	ands	r3, r2
+ 800301c:	2b04      	cmp	r3, #4
+ 800301e:	d11e      	bne.n	800305e <HAL_TIM_IRQHandler+0xba>
     {
       __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC2);
- 80032ac:	687b      	ldr	r3, [r7, #4]
- 80032ae:	681b      	ldr	r3, [r3, #0]
- 80032b0:	2205      	movs	r2, #5
- 80032b2:	4252      	negs	r2, r2
- 80032b4:	611a      	str	r2, [r3, #16]
+ 8003020:	687b      	ldr	r3, [r7, #4]
+ 8003022:	681b      	ldr	r3, [r3, #0]
+ 8003024:	2205      	movs	r2, #5
+ 8003026:	4252      	negs	r2, r2
+ 8003028:	611a      	str	r2, [r3, #16]
       htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2;
- 80032b6:	687b      	ldr	r3, [r7, #4]
- 80032b8:	2202      	movs	r2, #2
- 80032ba:	761a      	strb	r2, [r3, #24]
+ 800302a:	687b      	ldr	r3, [r7, #4]
+ 800302c:	2202      	movs	r2, #2
+ 800302e:	761a      	strb	r2, [r3, #24]
       /* Input capture event */
       if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U)
- 80032bc:	687b      	ldr	r3, [r7, #4]
- 80032be:	681b      	ldr	r3, [r3, #0]
- 80032c0:	699a      	ldr	r2, [r3, #24]
- 80032c2:	23c0      	movs	r3, #192	; 0xc0
- 80032c4:	009b      	lsls	r3, r3, #2
- 80032c6:	4013      	ands	r3, r2
- 80032c8:	d004      	beq.n	80032d4 <HAL_TIM_IRQHandler+0xa4>
+ 8003030:	687b      	ldr	r3, [r7, #4]
+ 8003032:	681b      	ldr	r3, [r3, #0]
+ 8003034:	699a      	ldr	r2, [r3, #24]
+ 8003036:	23c0      	movs	r3, #192	; 0xc0
+ 8003038:	009b      	lsls	r3, r3, #2
+ 800303a:	4013      	ands	r3, r2
+ 800303c:	d004      	beq.n	8003048 <HAL_TIM_IRQHandler+0xa4>
       {
 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
         htim->IC_CaptureCallback(htim);
 #else
         HAL_TIM_IC_CaptureCallback(htim);
- 80032ca:	687b      	ldr	r3, [r7, #4]
- 80032cc:	0018      	movs	r0, r3
- 80032ce:	f000 f97b 	bl	80035c8 <HAL_TIM_IC_CaptureCallback>
- 80032d2:	e007      	b.n	80032e4 <HAL_TIM_IRQHandler+0xb4>
+ 800303e:	687b      	ldr	r3, [r7, #4]
+ 8003040:	0018      	movs	r0, r3
+ 8003042:	f000 f97b 	bl	800333c <HAL_TIM_IC_CaptureCallback>
+ 8003046:	e007      	b.n	8003058 <HAL_TIM_IRQHandler+0xb4>
       {
 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
         htim->OC_DelayElapsedCallback(htim);
         htim->PWM_PulseFinishedCallback(htim);
 #else
         HAL_TIM_OC_DelayElapsedCallback(htim);
- 80032d4:	687b      	ldr	r3, [r7, #4]
- 80032d6:	0018      	movs	r0, r3
- 80032d8:	f000 f96e 	bl	80035b8 <HAL_TIM_OC_DelayElapsedCallback>
+ 8003048:	687b      	ldr	r3, [r7, #4]
+ 800304a:	0018      	movs	r0, r3
+ 800304c:	f000 f96e 	bl	800332c <HAL_TIM_OC_DelayElapsedCallback>
         HAL_TIM_PWM_PulseFinishedCallback(htim);
- 80032dc:	687b      	ldr	r3, [r7, #4]
- 80032de:	0018      	movs	r0, r3
- 80032e0:	f000 f97a 	bl	80035d8 <HAL_TIM_PWM_PulseFinishedCallback>
+ 8003050:	687b      	ldr	r3, [r7, #4]
+ 8003052:	0018      	movs	r0, r3
+ 8003054:	f000 f97a 	bl	800334c <HAL_TIM_PWM_PulseFinishedCallback>
 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
       }
       htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 80032e4:	687b      	ldr	r3, [r7, #4]
- 80032e6:	2200      	movs	r2, #0
- 80032e8:	761a      	strb	r2, [r3, #24]
+ 8003058:	687b      	ldr	r3, [r7, #4]
+ 800305a:	2200      	movs	r2, #0
+ 800305c:	761a      	strb	r2, [r3, #24]
     }
   }
   /* Capture compare 3 event */
   if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC3) != RESET)
- 80032ea:	687b      	ldr	r3, [r7, #4]
- 80032ec:	681b      	ldr	r3, [r3, #0]
- 80032ee:	691b      	ldr	r3, [r3, #16]
- 80032f0:	2208      	movs	r2, #8
- 80032f2:	4013      	ands	r3, r2
- 80032f4:	2b08      	cmp	r3, #8
- 80032f6:	d124      	bne.n	8003342 <HAL_TIM_IRQHandler+0x112>
+ 800305e:	687b      	ldr	r3, [r7, #4]
+ 8003060:	681b      	ldr	r3, [r3, #0]
+ 8003062:	691b      	ldr	r3, [r3, #16]
+ 8003064:	2208      	movs	r2, #8
+ 8003066:	4013      	ands	r3, r2
+ 8003068:	2b08      	cmp	r3, #8
+ 800306a:	d124      	bne.n	80030b6 <HAL_TIM_IRQHandler+0x112>
   {
     if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC3) != RESET)
- 80032f8:	687b      	ldr	r3, [r7, #4]
- 80032fa:	681b      	ldr	r3, [r3, #0]
- 80032fc:	68db      	ldr	r3, [r3, #12]
- 80032fe:	2208      	movs	r2, #8
- 8003300:	4013      	ands	r3, r2
- 8003302:	2b08      	cmp	r3, #8
- 8003304:	d11d      	bne.n	8003342 <HAL_TIM_IRQHandler+0x112>
+ 800306c:	687b      	ldr	r3, [r7, #4]
+ 800306e:	681b      	ldr	r3, [r3, #0]
+ 8003070:	68db      	ldr	r3, [r3, #12]
+ 8003072:	2208      	movs	r2, #8
+ 8003074:	4013      	ands	r3, r2
+ 8003076:	2b08      	cmp	r3, #8
+ 8003078:	d11d      	bne.n	80030b6 <HAL_TIM_IRQHandler+0x112>
     {
       __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC3);
- 8003306:	687b      	ldr	r3, [r7, #4]
- 8003308:	681b      	ldr	r3, [r3, #0]
- 800330a:	2209      	movs	r2, #9
- 800330c:	4252      	negs	r2, r2
- 800330e:	611a      	str	r2, [r3, #16]
+ 800307a:	687b      	ldr	r3, [r7, #4]
+ 800307c:	681b      	ldr	r3, [r3, #0]
+ 800307e:	2209      	movs	r2, #9
+ 8003080:	4252      	negs	r2, r2
+ 8003082:	611a      	str	r2, [r3, #16]
       htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
- 8003310:	687b      	ldr	r3, [r7, #4]
- 8003312:	2204      	movs	r2, #4
- 8003314:	761a      	strb	r2, [r3, #24]
+ 8003084:	687b      	ldr	r3, [r7, #4]
+ 8003086:	2204      	movs	r2, #4
+ 8003088:	761a      	strb	r2, [r3, #24]
       /* Input capture event */
       if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U)
- 8003316:	687b      	ldr	r3, [r7, #4]
- 8003318:	681b      	ldr	r3, [r3, #0]
- 800331a:	69db      	ldr	r3, [r3, #28]
- 800331c:	2203      	movs	r2, #3
- 800331e:	4013      	ands	r3, r2
- 8003320:	d004      	beq.n	800332c <HAL_TIM_IRQHandler+0xfc>
+ 800308a:	687b      	ldr	r3, [r7, #4]
+ 800308c:	681b      	ldr	r3, [r3, #0]
+ 800308e:	69db      	ldr	r3, [r3, #28]
+ 8003090:	2203      	movs	r2, #3
+ 8003092:	4013      	ands	r3, r2
+ 8003094:	d004      	beq.n	80030a0 <HAL_TIM_IRQHandler+0xfc>
       {
 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
         htim->IC_CaptureCallback(htim);
 #else
         HAL_TIM_IC_CaptureCallback(htim);
- 8003322:	687b      	ldr	r3, [r7, #4]
- 8003324:	0018      	movs	r0, r3
- 8003326:	f000 f94f 	bl	80035c8 <HAL_TIM_IC_CaptureCallback>
- 800332a:	e007      	b.n	800333c <HAL_TIM_IRQHandler+0x10c>
+ 8003096:	687b      	ldr	r3, [r7, #4]
+ 8003098:	0018      	movs	r0, r3
+ 800309a:	f000 f94f 	bl	800333c <HAL_TIM_IC_CaptureCallback>
+ 800309e:	e007      	b.n	80030b0 <HAL_TIM_IRQHandler+0x10c>
       {
 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
         htim->OC_DelayElapsedCallback(htim);
         htim->PWM_PulseFinishedCallback(htim);
 #else
         HAL_TIM_OC_DelayElapsedCallback(htim);
- 800332c:	687b      	ldr	r3, [r7, #4]
- 800332e:	0018      	movs	r0, r3
- 8003330:	f000 f942 	bl	80035b8 <HAL_TIM_OC_DelayElapsedCallback>
+ 80030a0:	687b      	ldr	r3, [r7, #4]
+ 80030a2:	0018      	movs	r0, r3
+ 80030a4:	f000 f942 	bl	800332c <HAL_TIM_OC_DelayElapsedCallback>
         HAL_TIM_PWM_PulseFinishedCallback(htim);
- 8003334:	687b      	ldr	r3, [r7, #4]
- 8003336:	0018      	movs	r0, r3
- 8003338:	f000 f94e 	bl	80035d8 <HAL_TIM_PWM_PulseFinishedCallback>
+ 80030a8:	687b      	ldr	r3, [r7, #4]
+ 80030aa:	0018      	movs	r0, r3
+ 80030ac:	f000 f94e 	bl	800334c <HAL_TIM_PWM_PulseFinishedCallback>
 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
       }
       htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 800333c:	687b      	ldr	r3, [r7, #4]
- 800333e:	2200      	movs	r2, #0
- 8003340:	761a      	strb	r2, [r3, #24]
+ 80030b0:	687b      	ldr	r3, [r7, #4]
+ 80030b2:	2200      	movs	r2, #0
+ 80030b4:	761a      	strb	r2, [r3, #24]
     }
   }
   /* Capture compare 4 event */
   if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_CC4) != RESET)
- 8003342:	687b      	ldr	r3, [r7, #4]
- 8003344:	681b      	ldr	r3, [r3, #0]
- 8003346:	691b      	ldr	r3, [r3, #16]
- 8003348:	2210      	movs	r2, #16
- 800334a:	4013      	ands	r3, r2
- 800334c:	2b10      	cmp	r3, #16
- 800334e:	d125      	bne.n	800339c <HAL_TIM_IRQHandler+0x16c>
+ 80030b6:	687b      	ldr	r3, [r7, #4]
+ 80030b8:	681b      	ldr	r3, [r3, #0]
+ 80030ba:	691b      	ldr	r3, [r3, #16]
+ 80030bc:	2210      	movs	r2, #16
+ 80030be:	4013      	ands	r3, r2
+ 80030c0:	2b10      	cmp	r3, #16
+ 80030c2:	d125      	bne.n	8003110 <HAL_TIM_IRQHandler+0x16c>
   {
     if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_CC4) != RESET)
- 8003350:	687b      	ldr	r3, [r7, #4]
- 8003352:	681b      	ldr	r3, [r3, #0]
- 8003354:	68db      	ldr	r3, [r3, #12]
- 8003356:	2210      	movs	r2, #16
- 8003358:	4013      	ands	r3, r2
- 800335a:	2b10      	cmp	r3, #16
- 800335c:	d11e      	bne.n	800339c <HAL_TIM_IRQHandler+0x16c>
+ 80030c4:	687b      	ldr	r3, [r7, #4]
+ 80030c6:	681b      	ldr	r3, [r3, #0]
+ 80030c8:	68db      	ldr	r3, [r3, #12]
+ 80030ca:	2210      	movs	r2, #16
+ 80030cc:	4013      	ands	r3, r2
+ 80030ce:	2b10      	cmp	r3, #16
+ 80030d0:	d11e      	bne.n	8003110 <HAL_TIM_IRQHandler+0x16c>
     {
       __HAL_TIM_CLEAR_IT(htim, TIM_IT_CC4);
- 800335e:	687b      	ldr	r3, [r7, #4]
- 8003360:	681b      	ldr	r3, [r3, #0]
- 8003362:	2211      	movs	r2, #17
- 8003364:	4252      	negs	r2, r2
- 8003366:	611a      	str	r2, [r3, #16]
+ 80030d2:	687b      	ldr	r3, [r7, #4]
+ 80030d4:	681b      	ldr	r3, [r3, #0]
+ 80030d6:	2211      	movs	r2, #17
+ 80030d8:	4252      	negs	r2, r2
+ 80030da:	611a      	str	r2, [r3, #16]
       htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4;
- 8003368:	687b      	ldr	r3, [r7, #4]
- 800336a:	2208      	movs	r2, #8
- 800336c:	761a      	strb	r2, [r3, #24]
+ 80030dc:	687b      	ldr	r3, [r7, #4]
+ 80030de:	2208      	movs	r2, #8
+ 80030e0:	761a      	strb	r2, [r3, #24]
       /* Input capture event */
       if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U)
- 800336e:	687b      	ldr	r3, [r7, #4]
- 8003370:	681b      	ldr	r3, [r3, #0]
- 8003372:	69da      	ldr	r2, [r3, #28]
- 8003374:	23c0      	movs	r3, #192	; 0xc0
- 8003376:	009b      	lsls	r3, r3, #2
- 8003378:	4013      	ands	r3, r2
- 800337a:	d004      	beq.n	8003386 <HAL_TIM_IRQHandler+0x156>
+ 80030e2:	687b      	ldr	r3, [r7, #4]
+ 80030e4:	681b      	ldr	r3, [r3, #0]
+ 80030e6:	69da      	ldr	r2, [r3, #28]
+ 80030e8:	23c0      	movs	r3, #192	; 0xc0
+ 80030ea:	009b      	lsls	r3, r3, #2
+ 80030ec:	4013      	ands	r3, r2
+ 80030ee:	d004      	beq.n	80030fa <HAL_TIM_IRQHandler+0x156>
       {
 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
         htim->IC_CaptureCallback(htim);
 #else
         HAL_TIM_IC_CaptureCallback(htim);
- 800337c:	687b      	ldr	r3, [r7, #4]
- 800337e:	0018      	movs	r0, r3
- 8003380:	f000 f922 	bl	80035c8 <HAL_TIM_IC_CaptureCallback>
- 8003384:	e007      	b.n	8003396 <HAL_TIM_IRQHandler+0x166>
+ 80030f0:	687b      	ldr	r3, [r7, #4]
+ 80030f2:	0018      	movs	r0, r3
+ 80030f4:	f000 f922 	bl	800333c <HAL_TIM_IC_CaptureCallback>
+ 80030f8:	e007      	b.n	800310a <HAL_TIM_IRQHandler+0x166>
       {
 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
         htim->OC_DelayElapsedCallback(htim);
         htim->PWM_PulseFinishedCallback(htim);
 #else
         HAL_TIM_OC_DelayElapsedCallback(htim);
- 8003386:	687b      	ldr	r3, [r7, #4]
- 8003388:	0018      	movs	r0, r3
- 800338a:	f000 f915 	bl	80035b8 <HAL_TIM_OC_DelayElapsedCallback>
+ 80030fa:	687b      	ldr	r3, [r7, #4]
+ 80030fc:	0018      	movs	r0, r3
+ 80030fe:	f000 f915 	bl	800332c <HAL_TIM_OC_DelayElapsedCallback>
         HAL_TIM_PWM_PulseFinishedCallback(htim);
- 800338e:	687b      	ldr	r3, [r7, #4]
- 8003390:	0018      	movs	r0, r3
- 8003392:	f000 f921 	bl	80035d8 <HAL_TIM_PWM_PulseFinishedCallback>
+ 8003102:	687b      	ldr	r3, [r7, #4]
+ 8003104:	0018      	movs	r0, r3
+ 8003106:	f000 f921 	bl	800334c <HAL_TIM_PWM_PulseFinishedCallback>
 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
       }
       htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED;
- 8003396:	687b      	ldr	r3, [r7, #4]
- 8003398:	2200      	movs	r2, #0
- 800339a:	761a      	strb	r2, [r3, #24]
+ 800310a:	687b      	ldr	r3, [r7, #4]
+ 800310c:	2200      	movs	r2, #0
+ 800310e:	761a      	strb	r2, [r3, #24]
     }
   }
   /* TIM Update event */
   if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_UPDATE) != RESET)
- 800339c:	687b      	ldr	r3, [r7, #4]
- 800339e:	681b      	ldr	r3, [r3, #0]
- 80033a0:	691b      	ldr	r3, [r3, #16]
- 80033a2:	2201      	movs	r2, #1
- 80033a4:	4013      	ands	r3, r2
- 80033a6:	2b01      	cmp	r3, #1
- 80033a8:	d10f      	bne.n	80033ca <HAL_TIM_IRQHandler+0x19a>
+ 8003110:	687b      	ldr	r3, [r7, #4]
+ 8003112:	681b      	ldr	r3, [r3, #0]
+ 8003114:	691b      	ldr	r3, [r3, #16]
+ 8003116:	2201      	movs	r2, #1
+ 8003118:	4013      	ands	r3, r2
+ 800311a:	2b01      	cmp	r3, #1
+ 800311c:	d10f      	bne.n	800313e <HAL_TIM_IRQHandler+0x19a>
   {
     if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_UPDATE) != RESET)
- 80033aa:	687b      	ldr	r3, [r7, #4]
- 80033ac:	681b      	ldr	r3, [r3, #0]
- 80033ae:	68db      	ldr	r3, [r3, #12]
- 80033b0:	2201      	movs	r2, #1
- 80033b2:	4013      	ands	r3, r2
- 80033b4:	2b01      	cmp	r3, #1
- 80033b6:	d108      	bne.n	80033ca <HAL_TIM_IRQHandler+0x19a>
+ 800311e:	687b      	ldr	r3, [r7, #4]
+ 8003120:	681b      	ldr	r3, [r3, #0]
+ 8003122:	68db      	ldr	r3, [r3, #12]
+ 8003124:	2201      	movs	r2, #1
+ 8003126:	4013      	ands	r3, r2
+ 8003128:	2b01      	cmp	r3, #1
+ 800312a:	d108      	bne.n	800313e <HAL_TIM_IRQHandler+0x19a>
     {
       __HAL_TIM_CLEAR_IT(htim, TIM_IT_UPDATE);
- 80033b8:	687b      	ldr	r3, [r7, #4]
- 80033ba:	681b      	ldr	r3, [r3, #0]
- 80033bc:	2202      	movs	r2, #2
- 80033be:	4252      	negs	r2, r2
- 80033c0:	611a      	str	r2, [r3, #16]
+ 800312c:	687b      	ldr	r3, [r7, #4]
+ 800312e:	681b      	ldr	r3, [r3, #0]
+ 8003130:	2202      	movs	r2, #2
+ 8003132:	4252      	negs	r2, r2
+ 8003134:	611a      	str	r2, [r3, #16]
 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
       htim->PeriodElapsedCallback(htim);
 #else
       HAL_TIM_PeriodElapsedCallback(htim);
- 80033c2:	687b      	ldr	r3, [r7, #4]
- 80033c4:	0018      	movs	r0, r3
- 80033c6:	f000 f8ef 	bl	80035a8 <HAL_TIM_PeriodElapsedCallback>
+ 8003136:	687b      	ldr	r3, [r7, #4]
+ 8003138:	0018      	movs	r0, r3
+ 800313a:	f000 f8ef 	bl	800331c <HAL_TIM_PeriodElapsedCallback>
 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
     }
   }
   /* TIM Trigger detection event */
   if (__HAL_TIM_GET_FLAG(htim, TIM_FLAG_TRIGGER) != RESET)
- 80033ca:	687b      	ldr	r3, [r7, #4]
- 80033cc:	681b      	ldr	r3, [r3, #0]
- 80033ce:	691b      	ldr	r3, [r3, #16]
- 80033d0:	2240      	movs	r2, #64	; 0x40
- 80033d2:	4013      	ands	r3, r2
- 80033d4:	2b40      	cmp	r3, #64	; 0x40
- 80033d6:	d10f      	bne.n	80033f8 <HAL_TIM_IRQHandler+0x1c8>
+ 800313e:	687b      	ldr	r3, [r7, #4]
+ 8003140:	681b      	ldr	r3, [r3, #0]
+ 8003142:	691b      	ldr	r3, [r3, #16]
+ 8003144:	2240      	movs	r2, #64	; 0x40
+ 8003146:	4013      	ands	r3, r2
+ 8003148:	2b40      	cmp	r3, #64	; 0x40
+ 800314a:	d10f      	bne.n	800316c <HAL_TIM_IRQHandler+0x1c8>
   {
     if (__HAL_TIM_GET_IT_SOURCE(htim, TIM_IT_TRIGGER) != RESET)
- 80033d8:	687b      	ldr	r3, [r7, #4]
- 80033da:	681b      	ldr	r3, [r3, #0]
- 80033dc:	68db      	ldr	r3, [r3, #12]
- 80033de:	2240      	movs	r2, #64	; 0x40
- 80033e0:	4013      	ands	r3, r2
- 80033e2:	2b40      	cmp	r3, #64	; 0x40
- 80033e4:	d108      	bne.n	80033f8 <HAL_TIM_IRQHandler+0x1c8>
+ 800314c:	687b      	ldr	r3, [r7, #4]
+ 800314e:	681b      	ldr	r3, [r3, #0]
+ 8003150:	68db      	ldr	r3, [r3, #12]
+ 8003152:	2240      	movs	r2, #64	; 0x40
+ 8003154:	4013      	ands	r3, r2
+ 8003156:	2b40      	cmp	r3, #64	; 0x40
+ 8003158:	d108      	bne.n	800316c <HAL_TIM_IRQHandler+0x1c8>
     {
       __HAL_TIM_CLEAR_IT(htim, TIM_IT_TRIGGER);
- 80033e6:	687b      	ldr	r3, [r7, #4]
- 80033e8:	681b      	ldr	r3, [r3, #0]
- 80033ea:	2241      	movs	r2, #65	; 0x41
- 80033ec:	4252      	negs	r2, r2
- 80033ee:	611a      	str	r2, [r3, #16]
+ 800315a:	687b      	ldr	r3, [r7, #4]
+ 800315c:	681b      	ldr	r3, [r3, #0]
+ 800315e:	2241      	movs	r2, #65	; 0x41
+ 8003160:	4252      	negs	r2, r2
+ 8003162:	611a      	str	r2, [r3, #16]
 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
       htim->TriggerCallback(htim);
 #else
       HAL_TIM_TriggerCallback(htim);
- 80033f0:	687b      	ldr	r3, [r7, #4]
- 80033f2:	0018      	movs	r0, r3
- 80033f4:	f000 f8f8 	bl	80035e8 <HAL_TIM_TriggerCallback>
+ 8003164:	687b      	ldr	r3, [r7, #4]
+ 8003166:	0018      	movs	r0, r3
+ 8003168:	f000 f8f8 	bl	800335c <HAL_TIM_TriggerCallback>
 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
     }
   }
 }
- 80033f8:	46c0      	nop			; (mov r8, r8)
- 80033fa:	46bd      	mov	sp, r7
- 80033fc:	b002      	add	sp, #8
- 80033fe:	bd80      	pop	{r7, pc}
+ 800316c:	46c0      	nop			; (mov r8, r8)
+ 800316e:	46bd      	mov	sp, r7
+ 8003170:	b002      	add	sp, #8
+ 8003172:	bd80      	pop	{r7, pc}
 
-08003400 <HAL_TIM_ConfigClockSource>:
+08003174 <HAL_TIM_ConfigClockSource>:
   * @param  sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
   *         contains the clock source information for the TIM peripheral.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
 {
- 8003400:	b580      	push	{r7, lr}
- 8003402:	b084      	sub	sp, #16
- 8003404:	af00      	add	r7, sp, #0
- 8003406:	6078      	str	r0, [r7, #4]
- 8003408:	6039      	str	r1, [r7, #0]
+ 8003174:	b580      	push	{r7, lr}
+ 8003176:	b084      	sub	sp, #16
+ 8003178:	af00      	add	r7, sp, #0
+ 800317a:	6078      	str	r0, [r7, #4]
+ 800317c:	6039      	str	r1, [r7, #0]
   HAL_StatusTypeDef status = HAL_OK;
- 800340a:	230f      	movs	r3, #15
- 800340c:	18fb      	adds	r3, r7, r3
- 800340e:	2200      	movs	r2, #0
- 8003410:	701a      	strb	r2, [r3, #0]
+ 800317e:	230f      	movs	r3, #15
+ 8003180:	18fb      	adds	r3, r7, r3
+ 8003182:	2200      	movs	r2, #0
+ 8003184:	701a      	strb	r2, [r3, #0]
   uint32_t tmpsmcr;
 
   /* Process Locked */
   __HAL_LOCK(htim);
- 8003412:	687b      	ldr	r3, [r7, #4]
- 8003414:	2238      	movs	r2, #56	; 0x38
- 8003416:	5c9b      	ldrb	r3, [r3, r2]
- 8003418:	2b01      	cmp	r3, #1
- 800341a:	d101      	bne.n	8003420 <HAL_TIM_ConfigClockSource+0x20>
- 800341c:	2302      	movs	r3, #2
- 800341e:	e0bc      	b.n	800359a <HAL_TIM_ConfigClockSource+0x19a>
- 8003420:	687b      	ldr	r3, [r7, #4]
- 8003422:	2238      	movs	r2, #56	; 0x38
- 8003424:	2101      	movs	r1, #1
- 8003426:	5499      	strb	r1, [r3, r2]
+ 8003186:	687b      	ldr	r3, [r7, #4]
+ 8003188:	2238      	movs	r2, #56	; 0x38
+ 800318a:	5c9b      	ldrb	r3, [r3, r2]
+ 800318c:	2b01      	cmp	r3, #1
+ 800318e:	d101      	bne.n	8003194 <HAL_TIM_ConfigClockSource+0x20>
+ 8003190:	2302      	movs	r3, #2
+ 8003192:	e0bc      	b.n	800330e <HAL_TIM_ConfigClockSource+0x19a>
+ 8003194:	687b      	ldr	r3, [r7, #4]
+ 8003196:	2238      	movs	r2, #56	; 0x38
+ 8003198:	2101      	movs	r1, #1
+ 800319a:	5499      	strb	r1, [r3, r2]
 
   htim->State = HAL_TIM_STATE_BUSY;
- 8003428:	687b      	ldr	r3, [r7, #4]
- 800342a:	2239      	movs	r2, #57	; 0x39
- 800342c:	2102      	movs	r1, #2
- 800342e:	5499      	strb	r1, [r3, r2]
+ 800319c:	687b      	ldr	r3, [r7, #4]
+ 800319e:	2239      	movs	r2, #57	; 0x39
+ 80031a0:	2102      	movs	r1, #2
+ 80031a2:	5499      	strb	r1, [r3, r2]
 
   /* Check the parameters */
   assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
 
   /* Reset the SMS, TS, ECE, ETPS and ETRF bits */
   tmpsmcr = htim->Instance->SMCR;
- 8003430:	687b      	ldr	r3, [r7, #4]
- 8003432:	681b      	ldr	r3, [r3, #0]
- 8003434:	689b      	ldr	r3, [r3, #8]
- 8003436:	60bb      	str	r3, [r7, #8]
+ 80031a4:	687b      	ldr	r3, [r7, #4]
+ 80031a6:	681b      	ldr	r3, [r3, #0]
+ 80031a8:	689b      	ldr	r3, [r3, #8]
+ 80031aa:	60bb      	str	r3, [r7, #8]
   tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
- 8003438:	68bb      	ldr	r3, [r7, #8]
- 800343a:	2277      	movs	r2, #119	; 0x77
- 800343c:	4393      	bics	r3, r2
- 800343e:	60bb      	str	r3, [r7, #8]
+ 80031ac:	68bb      	ldr	r3, [r7, #8]
+ 80031ae:	2277      	movs	r2, #119	; 0x77
+ 80031b0:	4393      	bics	r3, r2
+ 80031b2:	60bb      	str	r3, [r7, #8]
   tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
- 8003440:	68bb      	ldr	r3, [r7, #8]
- 8003442:	4a58      	ldr	r2, [pc, #352]	; (80035a4 <HAL_TIM_ConfigClockSource+0x1a4>)
- 8003444:	4013      	ands	r3, r2
- 8003446:	60bb      	str	r3, [r7, #8]
+ 80031b4:	68bb      	ldr	r3, [r7, #8]
+ 80031b6:	4a58      	ldr	r2, [pc, #352]	; (8003318 <HAL_TIM_ConfigClockSource+0x1a4>)
+ 80031b8:	4013      	ands	r3, r2
+ 80031ba:	60bb      	str	r3, [r7, #8]
   htim->Instance->SMCR = tmpsmcr;
- 8003448:	687b      	ldr	r3, [r7, #4]
- 800344a:	681b      	ldr	r3, [r3, #0]
- 800344c:	68ba      	ldr	r2, [r7, #8]
- 800344e:	609a      	str	r2, [r3, #8]
+ 80031bc:	687b      	ldr	r3, [r7, #4]
+ 80031be:	681b      	ldr	r3, [r3, #0]
+ 80031c0:	68ba      	ldr	r2, [r7, #8]
+ 80031c2:	609a      	str	r2, [r3, #8]
 
   switch (sClockSourceConfig->ClockSource)
- 8003450:	683b      	ldr	r3, [r7, #0]
- 8003452:	681b      	ldr	r3, [r3, #0]
- 8003454:	2280      	movs	r2, #128	; 0x80
- 8003456:	0192      	lsls	r2, r2, #6
- 8003458:	4293      	cmp	r3, r2
- 800345a:	d040      	beq.n	80034de <HAL_TIM_ConfigClockSource+0xde>
- 800345c:	2280      	movs	r2, #128	; 0x80
- 800345e:	0192      	lsls	r2, r2, #6
- 8003460:	4293      	cmp	r3, r2
- 8003462:	d900      	bls.n	8003466 <HAL_TIM_ConfigClockSource+0x66>
- 8003464:	e088      	b.n	8003578 <HAL_TIM_ConfigClockSource+0x178>
- 8003466:	2280      	movs	r2, #128	; 0x80
- 8003468:	0152      	lsls	r2, r2, #5
- 800346a:	4293      	cmp	r3, r2
- 800346c:	d100      	bne.n	8003470 <HAL_TIM_ConfigClockSource+0x70>
- 800346e:	e088      	b.n	8003582 <HAL_TIM_ConfigClockSource+0x182>
- 8003470:	2280      	movs	r2, #128	; 0x80
- 8003472:	0152      	lsls	r2, r2, #5
- 8003474:	4293      	cmp	r3, r2
- 8003476:	d900      	bls.n	800347a <HAL_TIM_ConfigClockSource+0x7a>
- 8003478:	e07e      	b.n	8003578 <HAL_TIM_ConfigClockSource+0x178>
- 800347a:	2b70      	cmp	r3, #112	; 0x70
- 800347c:	d018      	beq.n	80034b0 <HAL_TIM_ConfigClockSource+0xb0>
- 800347e:	d900      	bls.n	8003482 <HAL_TIM_ConfigClockSource+0x82>
- 8003480:	e07a      	b.n	8003578 <HAL_TIM_ConfigClockSource+0x178>
- 8003482:	2b60      	cmp	r3, #96	; 0x60
- 8003484:	d04f      	beq.n	8003526 <HAL_TIM_ConfigClockSource+0x126>
- 8003486:	d900      	bls.n	800348a <HAL_TIM_ConfigClockSource+0x8a>
- 8003488:	e076      	b.n	8003578 <HAL_TIM_ConfigClockSource+0x178>
- 800348a:	2b50      	cmp	r3, #80	; 0x50
- 800348c:	d03b      	beq.n	8003506 <HAL_TIM_ConfigClockSource+0x106>
- 800348e:	d900      	bls.n	8003492 <HAL_TIM_ConfigClockSource+0x92>
- 8003490:	e072      	b.n	8003578 <HAL_TIM_ConfigClockSource+0x178>
- 8003492:	2b40      	cmp	r3, #64	; 0x40
- 8003494:	d057      	beq.n	8003546 <HAL_TIM_ConfigClockSource+0x146>
- 8003496:	d900      	bls.n	800349a <HAL_TIM_ConfigClockSource+0x9a>
- 8003498:	e06e      	b.n	8003578 <HAL_TIM_ConfigClockSource+0x178>
- 800349a:	2b30      	cmp	r3, #48	; 0x30
- 800349c:	d063      	beq.n	8003566 <HAL_TIM_ConfigClockSource+0x166>
- 800349e:	d86b      	bhi.n	8003578 <HAL_TIM_ConfigClockSource+0x178>
- 80034a0:	2b20      	cmp	r3, #32
- 80034a2:	d060      	beq.n	8003566 <HAL_TIM_ConfigClockSource+0x166>
- 80034a4:	d868      	bhi.n	8003578 <HAL_TIM_ConfigClockSource+0x178>
- 80034a6:	2b00      	cmp	r3, #0
- 80034a8:	d05d      	beq.n	8003566 <HAL_TIM_ConfigClockSource+0x166>
- 80034aa:	2b10      	cmp	r3, #16
- 80034ac:	d05b      	beq.n	8003566 <HAL_TIM_ConfigClockSource+0x166>
- 80034ae:	e063      	b.n	8003578 <HAL_TIM_ConfigClockSource+0x178>
+ 80031c4:	683b      	ldr	r3, [r7, #0]
+ 80031c6:	681b      	ldr	r3, [r3, #0]
+ 80031c8:	2280      	movs	r2, #128	; 0x80
+ 80031ca:	0192      	lsls	r2, r2, #6
+ 80031cc:	4293      	cmp	r3, r2
+ 80031ce:	d040      	beq.n	8003252 <HAL_TIM_ConfigClockSource+0xde>
+ 80031d0:	2280      	movs	r2, #128	; 0x80
+ 80031d2:	0192      	lsls	r2, r2, #6
+ 80031d4:	4293      	cmp	r3, r2
+ 80031d6:	d900      	bls.n	80031da <HAL_TIM_ConfigClockSource+0x66>
+ 80031d8:	e088      	b.n	80032ec <HAL_TIM_ConfigClockSource+0x178>
+ 80031da:	2280      	movs	r2, #128	; 0x80
+ 80031dc:	0152      	lsls	r2, r2, #5
+ 80031de:	4293      	cmp	r3, r2
+ 80031e0:	d100      	bne.n	80031e4 <HAL_TIM_ConfigClockSource+0x70>
+ 80031e2:	e088      	b.n	80032f6 <HAL_TIM_ConfigClockSource+0x182>
+ 80031e4:	2280      	movs	r2, #128	; 0x80
+ 80031e6:	0152      	lsls	r2, r2, #5
+ 80031e8:	4293      	cmp	r3, r2
+ 80031ea:	d900      	bls.n	80031ee <HAL_TIM_ConfigClockSource+0x7a>
+ 80031ec:	e07e      	b.n	80032ec <HAL_TIM_ConfigClockSource+0x178>
+ 80031ee:	2b70      	cmp	r3, #112	; 0x70
+ 80031f0:	d018      	beq.n	8003224 <HAL_TIM_ConfigClockSource+0xb0>
+ 80031f2:	d900      	bls.n	80031f6 <HAL_TIM_ConfigClockSource+0x82>
+ 80031f4:	e07a      	b.n	80032ec <HAL_TIM_ConfigClockSource+0x178>
+ 80031f6:	2b60      	cmp	r3, #96	; 0x60
+ 80031f8:	d04f      	beq.n	800329a <HAL_TIM_ConfigClockSource+0x126>
+ 80031fa:	d900      	bls.n	80031fe <HAL_TIM_ConfigClockSource+0x8a>
+ 80031fc:	e076      	b.n	80032ec <HAL_TIM_ConfigClockSource+0x178>
+ 80031fe:	2b50      	cmp	r3, #80	; 0x50
+ 8003200:	d03b      	beq.n	800327a <HAL_TIM_ConfigClockSource+0x106>
+ 8003202:	d900      	bls.n	8003206 <HAL_TIM_ConfigClockSource+0x92>
+ 8003204:	e072      	b.n	80032ec <HAL_TIM_ConfigClockSource+0x178>
+ 8003206:	2b40      	cmp	r3, #64	; 0x40
+ 8003208:	d057      	beq.n	80032ba <HAL_TIM_ConfigClockSource+0x146>
+ 800320a:	d900      	bls.n	800320e <HAL_TIM_ConfigClockSource+0x9a>
+ 800320c:	e06e      	b.n	80032ec <HAL_TIM_ConfigClockSource+0x178>
+ 800320e:	2b30      	cmp	r3, #48	; 0x30
+ 8003210:	d063      	beq.n	80032da <HAL_TIM_ConfigClockSource+0x166>
+ 8003212:	d86b      	bhi.n	80032ec <HAL_TIM_ConfigClockSource+0x178>
+ 8003214:	2b20      	cmp	r3, #32
+ 8003216:	d060      	beq.n	80032da <HAL_TIM_ConfigClockSource+0x166>
+ 8003218:	d868      	bhi.n	80032ec <HAL_TIM_ConfigClockSource+0x178>
+ 800321a:	2b00      	cmp	r3, #0
+ 800321c:	d05d      	beq.n	80032da <HAL_TIM_ConfigClockSource+0x166>
+ 800321e:	2b10      	cmp	r3, #16
+ 8003220:	d05b      	beq.n	80032da <HAL_TIM_ConfigClockSource+0x166>
+ 8003222:	e063      	b.n	80032ec <HAL_TIM_ConfigClockSource+0x178>
       assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
       assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
       assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
 
       /* Configure the ETR Clock source */
       TIM_ETR_SetConfig(htim->Instance,
- 80034b0:	687b      	ldr	r3, [r7, #4]
- 80034b2:	6818      	ldr	r0, [r3, #0]
+ 8003224:	687b      	ldr	r3, [r7, #4]
+ 8003226:	6818      	ldr	r0, [r3, #0]
                         sClockSourceConfig->ClockPrescaler,
- 80034b4:	683b      	ldr	r3, [r7, #0]
- 80034b6:	6899      	ldr	r1, [r3, #8]
+ 8003228:	683b      	ldr	r3, [r7, #0]
+ 800322a:	6899      	ldr	r1, [r3, #8]
                         sClockSourceConfig->ClockPolarity,
- 80034b8:	683b      	ldr	r3, [r7, #0]
- 80034ba:	685a      	ldr	r2, [r3, #4]
+ 800322c:	683b      	ldr	r3, [r7, #0]
+ 800322e:	685a      	ldr	r2, [r3, #4]
                         sClockSourceConfig->ClockFilter);
- 80034bc:	683b      	ldr	r3, [r7, #0]
- 80034be:	68db      	ldr	r3, [r3, #12]
+ 8003230:	683b      	ldr	r3, [r7, #0]
+ 8003232:	68db      	ldr	r3, [r3, #12]
       TIM_ETR_SetConfig(htim->Instance,
- 80034c0:	f000 f968 	bl	8003794 <TIM_ETR_SetConfig>
+ 8003234:	f000 f968 	bl	8003508 <TIM_ETR_SetConfig>
 
       /* Select the External clock mode1 and the ETRF trigger */
       tmpsmcr = htim->Instance->SMCR;
- 80034c4:	687b      	ldr	r3, [r7, #4]
- 80034c6:	681b      	ldr	r3, [r3, #0]
- 80034c8:	689b      	ldr	r3, [r3, #8]
- 80034ca:	60bb      	str	r3, [r7, #8]
+ 8003238:	687b      	ldr	r3, [r7, #4]
+ 800323a:	681b      	ldr	r3, [r3, #0]
+ 800323c:	689b      	ldr	r3, [r3, #8]
+ 800323e:	60bb      	str	r3, [r7, #8]
       tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
- 80034cc:	68bb      	ldr	r3, [r7, #8]
- 80034ce:	2277      	movs	r2, #119	; 0x77
- 80034d0:	4313      	orrs	r3, r2
- 80034d2:	60bb      	str	r3, [r7, #8]
+ 8003240:	68bb      	ldr	r3, [r7, #8]
+ 8003242:	2277      	movs	r2, #119	; 0x77
+ 8003244:	4313      	orrs	r3, r2
+ 8003246:	60bb      	str	r3, [r7, #8]
       /* Write to TIMx SMCR */
       htim->Instance->SMCR = tmpsmcr;
- 80034d4:	687b      	ldr	r3, [r7, #4]
- 80034d6:	681b      	ldr	r3, [r3, #0]
- 80034d8:	68ba      	ldr	r2, [r7, #8]
- 80034da:	609a      	str	r2, [r3, #8]
+ 8003248:	687b      	ldr	r3, [r7, #4]
+ 800324a:	681b      	ldr	r3, [r3, #0]
+ 800324c:	68ba      	ldr	r2, [r7, #8]
+ 800324e:	609a      	str	r2, [r3, #8]
       break;
- 80034dc:	e052      	b.n	8003584 <HAL_TIM_ConfigClockSource+0x184>
+ 8003250:	e052      	b.n	80032f8 <HAL_TIM_ConfigClockSource+0x184>
       assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
       assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
       assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
 
       /* Configure the ETR Clock source */
       TIM_ETR_SetConfig(htim->Instance,
- 80034de:	687b      	ldr	r3, [r7, #4]
- 80034e0:	6818      	ldr	r0, [r3, #0]
+ 8003252:	687b      	ldr	r3, [r7, #4]
+ 8003254:	6818      	ldr	r0, [r3, #0]
                         sClockSourceConfig->ClockPrescaler,
- 80034e2:	683b      	ldr	r3, [r7, #0]
- 80034e4:	6899      	ldr	r1, [r3, #8]
+ 8003256:	683b      	ldr	r3, [r7, #0]
+ 8003258:	6899      	ldr	r1, [r3, #8]
                         sClockSourceConfig->ClockPolarity,
- 80034e6:	683b      	ldr	r3, [r7, #0]
- 80034e8:	685a      	ldr	r2, [r3, #4]
+ 800325a:	683b      	ldr	r3, [r7, #0]
+ 800325c:	685a      	ldr	r2, [r3, #4]
                         sClockSourceConfig->ClockFilter);
- 80034ea:	683b      	ldr	r3, [r7, #0]
- 80034ec:	68db      	ldr	r3, [r3, #12]
+ 800325e:	683b      	ldr	r3, [r7, #0]
+ 8003260:	68db      	ldr	r3, [r3, #12]
       TIM_ETR_SetConfig(htim->Instance,
- 80034ee:	f000 f951 	bl	8003794 <TIM_ETR_SetConfig>
+ 8003262:	f000 f951 	bl	8003508 <TIM_ETR_SetConfig>
       /* Enable the External clock mode2 */
       htim->Instance->SMCR |= TIM_SMCR_ECE;
- 80034f2:	687b      	ldr	r3, [r7, #4]
- 80034f4:	681b      	ldr	r3, [r3, #0]
- 80034f6:	689a      	ldr	r2, [r3, #8]
- 80034f8:	687b      	ldr	r3, [r7, #4]
- 80034fa:	681b      	ldr	r3, [r3, #0]
- 80034fc:	2180      	movs	r1, #128	; 0x80
- 80034fe:	01c9      	lsls	r1, r1, #7
- 8003500:	430a      	orrs	r2, r1
- 8003502:	609a      	str	r2, [r3, #8]
+ 8003266:	687b      	ldr	r3, [r7, #4]
+ 8003268:	681b      	ldr	r3, [r3, #0]
+ 800326a:	689a      	ldr	r2, [r3, #8]
+ 800326c:	687b      	ldr	r3, [r7, #4]
+ 800326e:	681b      	ldr	r3, [r3, #0]
+ 8003270:	2180      	movs	r1, #128	; 0x80
+ 8003272:	01c9      	lsls	r1, r1, #7
+ 8003274:	430a      	orrs	r2, r1
+ 8003276:	609a      	str	r2, [r3, #8]
       break;
- 8003504:	e03e      	b.n	8003584 <HAL_TIM_ConfigClockSource+0x184>
+ 8003278:	e03e      	b.n	80032f8 <HAL_TIM_ConfigClockSource+0x184>
 
       /* Check TI1 input conditioning related parameters */
       assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
       assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
 
       TIM_TI1_ConfigInputStage(htim->Instance,
- 8003506:	687b      	ldr	r3, [r7, #4]
- 8003508:	6818      	ldr	r0, [r3, #0]
+ 800327a:	687b      	ldr	r3, [r7, #4]
+ 800327c:	6818      	ldr	r0, [r3, #0]
                                sClockSourceConfig->ClockPolarity,
- 800350a:	683b      	ldr	r3, [r7, #0]
- 800350c:	6859      	ldr	r1, [r3, #4]
+ 800327e:	683b      	ldr	r3, [r7, #0]
+ 8003280:	6859      	ldr	r1, [r3, #4]
                                sClockSourceConfig->ClockFilter);
- 800350e:	683b      	ldr	r3, [r7, #0]
- 8003510:	68db      	ldr	r3, [r3, #12]
+ 8003282:	683b      	ldr	r3, [r7, #0]
+ 8003284:	68db      	ldr	r3, [r3, #12]
       TIM_TI1_ConfigInputStage(htim->Instance,
- 8003512:	001a      	movs	r2, r3
- 8003514:	f000 f8c4 	bl	80036a0 <TIM_TI1_ConfigInputStage>
+ 8003286:	001a      	movs	r2, r3
+ 8003288:	f000 f8c4 	bl	8003414 <TIM_TI1_ConfigInputStage>
       TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
- 8003518:	687b      	ldr	r3, [r7, #4]
- 800351a:	681b      	ldr	r3, [r3, #0]
- 800351c:	2150      	movs	r1, #80	; 0x50
- 800351e:	0018      	movs	r0, r3
- 8003520:	f000 f91e 	bl	8003760 <TIM_ITRx_SetConfig>
+ 800328c:	687b      	ldr	r3, [r7, #4]
+ 800328e:	681b      	ldr	r3, [r3, #0]
+ 8003290:	2150      	movs	r1, #80	; 0x50
+ 8003292:	0018      	movs	r0, r3
+ 8003294:	f000 f91e 	bl	80034d4 <TIM_ITRx_SetConfig>
       break;
- 8003524:	e02e      	b.n	8003584 <HAL_TIM_ConfigClockSource+0x184>
+ 8003298:	e02e      	b.n	80032f8 <HAL_TIM_ConfigClockSource+0x184>
 
       /* Check TI2 input conditioning related parameters */
       assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
       assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
 
       TIM_TI2_ConfigInputStage(htim->Instance,
- 8003526:	687b      	ldr	r3, [r7, #4]
- 8003528:	6818      	ldr	r0, [r3, #0]
+ 800329a:	687b      	ldr	r3, [r7, #4]
+ 800329c:	6818      	ldr	r0, [r3, #0]
                                sClockSourceConfig->ClockPolarity,
- 800352a:	683b      	ldr	r3, [r7, #0]
- 800352c:	6859      	ldr	r1, [r3, #4]
+ 800329e:	683b      	ldr	r3, [r7, #0]
+ 80032a0:	6859      	ldr	r1, [r3, #4]
                                sClockSourceConfig->ClockFilter);
- 800352e:	683b      	ldr	r3, [r7, #0]
- 8003530:	68db      	ldr	r3, [r3, #12]
+ 80032a2:	683b      	ldr	r3, [r7, #0]
+ 80032a4:	68db      	ldr	r3, [r3, #12]
       TIM_TI2_ConfigInputStage(htim->Instance,
- 8003532:	001a      	movs	r2, r3
- 8003534:	f000 f8e2 	bl	80036fc <TIM_TI2_ConfigInputStage>
+ 80032a6:	001a      	movs	r2, r3
+ 80032a8:	f000 f8e2 	bl	8003470 <TIM_TI2_ConfigInputStage>
       TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
- 8003538:	687b      	ldr	r3, [r7, #4]
- 800353a:	681b      	ldr	r3, [r3, #0]
- 800353c:	2160      	movs	r1, #96	; 0x60
- 800353e:	0018      	movs	r0, r3
- 8003540:	f000 f90e 	bl	8003760 <TIM_ITRx_SetConfig>
+ 80032ac:	687b      	ldr	r3, [r7, #4]
+ 80032ae:	681b      	ldr	r3, [r3, #0]
+ 80032b0:	2160      	movs	r1, #96	; 0x60
+ 80032b2:	0018      	movs	r0, r3
+ 80032b4:	f000 f90e 	bl	80034d4 <TIM_ITRx_SetConfig>
       break;
- 8003544:	e01e      	b.n	8003584 <HAL_TIM_ConfigClockSource+0x184>
+ 80032b8:	e01e      	b.n	80032f8 <HAL_TIM_ConfigClockSource+0x184>
 
       /* Check TI1 input conditioning related parameters */
       assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
       assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
 
       TIM_TI1_ConfigInputStage(htim->Instance,
- 8003546:	687b      	ldr	r3, [r7, #4]
- 8003548:	6818      	ldr	r0, [r3, #0]
+ 80032ba:	687b      	ldr	r3, [r7, #4]
+ 80032bc:	6818      	ldr	r0, [r3, #0]
                                sClockSourceConfig->ClockPolarity,
- 800354a:	683b      	ldr	r3, [r7, #0]
- 800354c:	6859      	ldr	r1, [r3, #4]
+ 80032be:	683b      	ldr	r3, [r7, #0]
+ 80032c0:	6859      	ldr	r1, [r3, #4]
                                sClockSourceConfig->ClockFilter);
- 800354e:	683b      	ldr	r3, [r7, #0]
- 8003550:	68db      	ldr	r3, [r3, #12]
+ 80032c2:	683b      	ldr	r3, [r7, #0]
+ 80032c4:	68db      	ldr	r3, [r3, #12]
       TIM_TI1_ConfigInputStage(htim->Instance,
- 8003552:	001a      	movs	r2, r3
- 8003554:	f000 f8a4 	bl	80036a0 <TIM_TI1_ConfigInputStage>
+ 80032c6:	001a      	movs	r2, r3
+ 80032c8:	f000 f8a4 	bl	8003414 <TIM_TI1_ConfigInputStage>
       TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
- 8003558:	687b      	ldr	r3, [r7, #4]
- 800355a:	681b      	ldr	r3, [r3, #0]
- 800355c:	2140      	movs	r1, #64	; 0x40
- 800355e:	0018      	movs	r0, r3
- 8003560:	f000 f8fe 	bl	8003760 <TIM_ITRx_SetConfig>
+ 80032cc:	687b      	ldr	r3, [r7, #4]
+ 80032ce:	681b      	ldr	r3, [r3, #0]
+ 80032d0:	2140      	movs	r1, #64	; 0x40
+ 80032d2:	0018      	movs	r0, r3
+ 80032d4:	f000 f8fe 	bl	80034d4 <TIM_ITRx_SetConfig>
       break;
- 8003564:	e00e      	b.n	8003584 <HAL_TIM_ConfigClockSource+0x184>
+ 80032d8:	e00e      	b.n	80032f8 <HAL_TIM_ConfigClockSource+0x184>
     case TIM_CLOCKSOURCE_ITR3:
     {
       /* Check whether or not the timer instance supports internal trigger input */
       assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
 
       TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
- 8003566:	687b      	ldr	r3, [r7, #4]
- 8003568:	681a      	ldr	r2, [r3, #0]
- 800356a:	683b      	ldr	r3, [r7, #0]
- 800356c:	681b      	ldr	r3, [r3, #0]
- 800356e:	0019      	movs	r1, r3
- 8003570:	0010      	movs	r0, r2
- 8003572:	f000 f8f5 	bl	8003760 <TIM_ITRx_SetConfig>
+ 80032da:	687b      	ldr	r3, [r7, #4]
+ 80032dc:	681a      	ldr	r2, [r3, #0]
+ 80032de:	683b      	ldr	r3, [r7, #0]
+ 80032e0:	681b      	ldr	r3, [r3, #0]
+ 80032e2:	0019      	movs	r1, r3
+ 80032e4:	0010      	movs	r0, r2
+ 80032e6:	f000 f8f5 	bl	80034d4 <TIM_ITRx_SetConfig>
       break;
- 8003576:	e005      	b.n	8003584 <HAL_TIM_ConfigClockSource+0x184>
+ 80032ea:	e005      	b.n	80032f8 <HAL_TIM_ConfigClockSource+0x184>
     }
 
     default:
       status = HAL_ERROR;
- 8003578:	230f      	movs	r3, #15
- 800357a:	18fb      	adds	r3, r7, r3
- 800357c:	2201      	movs	r2, #1
- 800357e:	701a      	strb	r2, [r3, #0]
+ 80032ec:	230f      	movs	r3, #15
+ 80032ee:	18fb      	adds	r3, r7, r3
+ 80032f0:	2201      	movs	r2, #1
+ 80032f2:	701a      	strb	r2, [r3, #0]
       break;
- 8003580:	e000      	b.n	8003584 <HAL_TIM_ConfigClockSource+0x184>
+ 80032f4:	e000      	b.n	80032f8 <HAL_TIM_ConfigClockSource+0x184>
       break;
- 8003582:	46c0      	nop			; (mov r8, r8)
+ 80032f6:	46c0      	nop			; (mov r8, r8)
   }
   htim->State = HAL_TIM_STATE_READY;
- 8003584:	687b      	ldr	r3, [r7, #4]
- 8003586:	2239      	movs	r2, #57	; 0x39
- 8003588:	2101      	movs	r1, #1
- 800358a:	5499      	strb	r1, [r3, r2]
+ 80032f8:	687b      	ldr	r3, [r7, #4]
+ 80032fa:	2239      	movs	r2, #57	; 0x39
+ 80032fc:	2101      	movs	r1, #1
+ 80032fe:	5499      	strb	r1, [r3, r2]
 
   __HAL_UNLOCK(htim);
- 800358c:	687b      	ldr	r3, [r7, #4]
- 800358e:	2238      	movs	r2, #56	; 0x38
- 8003590:	2100      	movs	r1, #0
- 8003592:	5499      	strb	r1, [r3, r2]
+ 8003300:	687b      	ldr	r3, [r7, #4]
+ 8003302:	2238      	movs	r2, #56	; 0x38
+ 8003304:	2100      	movs	r1, #0
+ 8003306:	5499      	strb	r1, [r3, r2]
 
   return status;
- 8003594:	230f      	movs	r3, #15
- 8003596:	18fb      	adds	r3, r7, r3
- 8003598:	781b      	ldrb	r3, [r3, #0]
+ 8003308:	230f      	movs	r3, #15
+ 800330a:	18fb      	adds	r3, r7, r3
+ 800330c:	781b      	ldrb	r3, [r3, #0]
 }
- 800359a:	0018      	movs	r0, r3
- 800359c:	46bd      	mov	sp, r7
- 800359e:	b004      	add	sp, #16
- 80035a0:	bd80      	pop	{r7, pc}
- 80035a2:	46c0      	nop			; (mov r8, r8)
- 80035a4:	ffff00ff 	.word	0xffff00ff
+ 800330e:	0018      	movs	r0, r3
+ 8003310:	46bd      	mov	sp, r7
+ 8003312:	b004      	add	sp, #16
+ 8003314:	bd80      	pop	{r7, pc}
+ 8003316:	46c0      	nop			; (mov r8, r8)
+ 8003318:	ffff00ff 	.word	0xffff00ff
 
-080035a8 <HAL_TIM_PeriodElapsedCallback>:
+0800331c <HAL_TIM_PeriodElapsedCallback>:
   * @brief  Period elapsed callback in non-blocking mode
   * @param  htim TIM handle
   * @retval None
   */
 __weak void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
 {
- 80035a8:	b580      	push	{r7, lr}
- 80035aa:	b082      	sub	sp, #8
- 80035ac:	af00      	add	r7, sp, #0
- 80035ae:	6078      	str	r0, [r7, #4]
+ 800331c:	b580      	push	{r7, lr}
+ 800331e:	b082      	sub	sp, #8
+ 8003320:	af00      	add	r7, sp, #0
+ 8003322:	6078      	str	r0, [r7, #4]
   UNUSED(htim);
 
   /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_TIM_PeriodElapsedCallback could be implemented in the user file
    */
 }
- 80035b0:	46c0      	nop			; (mov r8, r8)
- 80035b2:	46bd      	mov	sp, r7
- 80035b4:	b002      	add	sp, #8
- 80035b6:	bd80      	pop	{r7, pc}
+ 8003324:	46c0      	nop			; (mov r8, r8)
+ 8003326:	46bd      	mov	sp, r7
+ 8003328:	b002      	add	sp, #8
+ 800332a:	bd80      	pop	{r7, pc}
 
-080035b8 <HAL_TIM_OC_DelayElapsedCallback>:
+0800332c <HAL_TIM_OC_DelayElapsedCallback>:
   * @brief  Output Compare callback in non-blocking mode
   * @param  htim TIM OC handle
   * @retval None
   */
 __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim)
 {
- 80035b8:	b580      	push	{r7, lr}
- 80035ba:	b082      	sub	sp, #8
- 80035bc:	af00      	add	r7, sp, #0
- 80035be:	6078      	str	r0, [r7, #4]
+ 800332c:	b580      	push	{r7, lr}
+ 800332e:	b082      	sub	sp, #8
+ 8003330:	af00      	add	r7, sp, #0
+ 8003332:	6078      	str	r0, [r7, #4]
   UNUSED(htim);
 
   /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file
    */
 }
- 80035c0:	46c0      	nop			; (mov r8, r8)
- 80035c2:	46bd      	mov	sp, r7
- 80035c4:	b002      	add	sp, #8
- 80035c6:	bd80      	pop	{r7, pc}
+ 8003334:	46c0      	nop			; (mov r8, r8)
+ 8003336:	46bd      	mov	sp, r7
+ 8003338:	b002      	add	sp, #8
+ 800333a:	bd80      	pop	{r7, pc}
 
-080035c8 <HAL_TIM_IC_CaptureCallback>:
+0800333c <HAL_TIM_IC_CaptureCallback>:
   * @brief  Input Capture callback in non-blocking mode
   * @param  htim TIM IC handle
   * @retval None
   */
 __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
 {
- 80035c8:	b580      	push	{r7, lr}
- 80035ca:	b082      	sub	sp, #8
- 80035cc:	af00      	add	r7, sp, #0
- 80035ce:	6078      	str	r0, [r7, #4]
+ 800333c:	b580      	push	{r7, lr}
+ 800333e:	b082      	sub	sp, #8
+ 8003340:	af00      	add	r7, sp, #0
+ 8003342:	6078      	str	r0, [r7, #4]
   UNUSED(htim);
 
   /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_TIM_IC_CaptureCallback could be implemented in the user file
    */
 }
- 80035d0:	46c0      	nop			; (mov r8, r8)
- 80035d2:	46bd      	mov	sp, r7
- 80035d4:	b002      	add	sp, #8
- 80035d6:	bd80      	pop	{r7, pc}
+ 8003344:	46c0      	nop			; (mov r8, r8)
+ 8003346:	46bd      	mov	sp, r7
+ 8003348:	b002      	add	sp, #8
+ 800334a:	bd80      	pop	{r7, pc}
 
-080035d8 <HAL_TIM_PWM_PulseFinishedCallback>:
+0800334c <HAL_TIM_PWM_PulseFinishedCallback>:
   * @brief  PWM Pulse finished callback in non-blocking mode
   * @param  htim TIM handle
   * @retval None
   */
 __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
 {
- 80035d8:	b580      	push	{r7, lr}
- 80035da:	b082      	sub	sp, #8
- 80035dc:	af00      	add	r7, sp, #0
- 80035de:	6078      	str	r0, [r7, #4]
+ 800334c:	b580      	push	{r7, lr}
+ 800334e:	b082      	sub	sp, #8
+ 8003350:	af00      	add	r7, sp, #0
+ 8003352:	6078      	str	r0, [r7, #4]
   UNUSED(htim);
 
   /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file
    */
 }
- 80035e0:	46c0      	nop			; (mov r8, r8)
- 80035e2:	46bd      	mov	sp, r7
- 80035e4:	b002      	add	sp, #8
- 80035e6:	bd80      	pop	{r7, pc}
+ 8003354:	46c0      	nop			; (mov r8, r8)
+ 8003356:	46bd      	mov	sp, r7
+ 8003358:	b002      	add	sp, #8
+ 800335a:	bd80      	pop	{r7, pc}
 
-080035e8 <HAL_TIM_TriggerCallback>:
+0800335c <HAL_TIM_TriggerCallback>:
   * @brief  Hall Trigger detection callback in non-blocking mode
   * @param  htim TIM handle
   * @retval None
   */
 __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim)
 {
- 80035e8:	b580      	push	{r7, lr}
- 80035ea:	b082      	sub	sp, #8
- 80035ec:	af00      	add	r7, sp, #0
- 80035ee:	6078      	str	r0, [r7, #4]
+ 800335c:	b580      	push	{r7, lr}
+ 800335e:	b082      	sub	sp, #8
+ 8003360:	af00      	add	r7, sp, #0
+ 8003362:	6078      	str	r0, [r7, #4]
   UNUSED(htim);
 
   /* NOTE : This function should not be modified, when the callback is needed,
             the HAL_TIM_TriggerCallback could be implemented in the user file
    */
 }
- 80035f0:	46c0      	nop			; (mov r8, r8)
- 80035f2:	46bd      	mov	sp, r7
- 80035f4:	b002      	add	sp, #8
- 80035f6:	bd80      	pop	{r7, pc}
+ 8003364:	46c0      	nop			; (mov r8, r8)
+ 8003366:	46bd      	mov	sp, r7
+ 8003368:	b002      	add	sp, #8
+ 800336a:	bd80      	pop	{r7, pc}
 
-080035f8 <TIM_Base_SetConfig>:
+0800336c <TIM_Base_SetConfig>:
   * @param  TIMx TIM peripheral
   * @param  Structure TIM Base configuration structure
   * @retval None
   */
 static void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
 {
- 80035f8:	b580      	push	{r7, lr}
- 80035fa:	b084      	sub	sp, #16
- 80035fc:	af00      	add	r7, sp, #0
- 80035fe:	6078      	str	r0, [r7, #4]
- 8003600:	6039      	str	r1, [r7, #0]
+ 800336c:	b580      	push	{r7, lr}
+ 800336e:	b084      	sub	sp, #16
+ 8003370:	af00      	add	r7, sp, #0
+ 8003372:	6078      	str	r0, [r7, #4]
+ 8003374:	6039      	str	r1, [r7, #0]
   uint32_t tmpcr1;
   tmpcr1 = TIMx->CR1;
- 8003602:	687b      	ldr	r3, [r7, #4]
- 8003604:	681b      	ldr	r3, [r3, #0]
- 8003606:	60fb      	str	r3, [r7, #12]
+ 8003376:	687b      	ldr	r3, [r7, #4]
+ 8003378:	681b      	ldr	r3, [r3, #0]
+ 800337a:	60fb      	str	r3, [r7, #12]
 
   /* Set TIM Time Base Unit parameters ---------------------------------------*/
   if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
- 8003608:	687a      	ldr	r2, [r7, #4]
- 800360a:	2380      	movs	r3, #128	; 0x80
- 800360c:	05db      	lsls	r3, r3, #23
- 800360e:	429a      	cmp	r2, r3
- 8003610:	d007      	beq.n	8003622 <TIM_Base_SetConfig+0x2a>
- 8003612:	687b      	ldr	r3, [r7, #4]
- 8003614:	4a1f      	ldr	r2, [pc, #124]	; (8003694 <TIM_Base_SetConfig+0x9c>)
- 8003616:	4293      	cmp	r3, r2
- 8003618:	d003      	beq.n	8003622 <TIM_Base_SetConfig+0x2a>
- 800361a:	687b      	ldr	r3, [r7, #4]
- 800361c:	4a1e      	ldr	r2, [pc, #120]	; (8003698 <TIM_Base_SetConfig+0xa0>)
- 800361e:	4293      	cmp	r3, r2
- 8003620:	d108      	bne.n	8003634 <TIM_Base_SetConfig+0x3c>
+ 800337c:	687a      	ldr	r2, [r7, #4]
+ 800337e:	2380      	movs	r3, #128	; 0x80
+ 8003380:	05db      	lsls	r3, r3, #23
+ 8003382:	429a      	cmp	r2, r3
+ 8003384:	d007      	beq.n	8003396 <TIM_Base_SetConfig+0x2a>
+ 8003386:	687b      	ldr	r3, [r7, #4]
+ 8003388:	4a1f      	ldr	r2, [pc, #124]	; (8003408 <TIM_Base_SetConfig+0x9c>)
+ 800338a:	4293      	cmp	r3, r2
+ 800338c:	d003      	beq.n	8003396 <TIM_Base_SetConfig+0x2a>
+ 800338e:	687b      	ldr	r3, [r7, #4]
+ 8003390:	4a1e      	ldr	r2, [pc, #120]	; (800340c <TIM_Base_SetConfig+0xa0>)
+ 8003392:	4293      	cmp	r3, r2
+ 8003394:	d108      	bne.n	80033a8 <TIM_Base_SetConfig+0x3c>
   {
     /* Select the Counter Mode */
     tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
- 8003622:	68fb      	ldr	r3, [r7, #12]
- 8003624:	2270      	movs	r2, #112	; 0x70
- 8003626:	4393      	bics	r3, r2
- 8003628:	60fb      	str	r3, [r7, #12]
+ 8003396:	68fb      	ldr	r3, [r7, #12]
+ 8003398:	2270      	movs	r2, #112	; 0x70
+ 800339a:	4393      	bics	r3, r2
+ 800339c:	60fb      	str	r3, [r7, #12]
     tmpcr1 |= Structure->CounterMode;
- 800362a:	683b      	ldr	r3, [r7, #0]
- 800362c:	685b      	ldr	r3, [r3, #4]
- 800362e:	68fa      	ldr	r2, [r7, #12]
- 8003630:	4313      	orrs	r3, r2
- 8003632:	60fb      	str	r3, [r7, #12]
+ 800339e:	683b      	ldr	r3, [r7, #0]
+ 80033a0:	685b      	ldr	r3, [r3, #4]
+ 80033a2:	68fa      	ldr	r2, [r7, #12]
+ 80033a4:	4313      	orrs	r3, r2
+ 80033a6:	60fb      	str	r3, [r7, #12]
   }
 
   if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
- 8003634:	687a      	ldr	r2, [r7, #4]
- 8003636:	2380      	movs	r3, #128	; 0x80
- 8003638:	05db      	lsls	r3, r3, #23
- 800363a:	429a      	cmp	r2, r3
- 800363c:	d007      	beq.n	800364e <TIM_Base_SetConfig+0x56>
- 800363e:	687b      	ldr	r3, [r7, #4]
- 8003640:	4a14      	ldr	r2, [pc, #80]	; (8003694 <TIM_Base_SetConfig+0x9c>)
- 8003642:	4293      	cmp	r3, r2
- 8003644:	d003      	beq.n	800364e <TIM_Base_SetConfig+0x56>
- 8003646:	687b      	ldr	r3, [r7, #4]
- 8003648:	4a13      	ldr	r2, [pc, #76]	; (8003698 <TIM_Base_SetConfig+0xa0>)
- 800364a:	4293      	cmp	r3, r2
- 800364c:	d108      	bne.n	8003660 <TIM_Base_SetConfig+0x68>
+ 80033a8:	687a      	ldr	r2, [r7, #4]
+ 80033aa:	2380      	movs	r3, #128	; 0x80
+ 80033ac:	05db      	lsls	r3, r3, #23
+ 80033ae:	429a      	cmp	r2, r3
+ 80033b0:	d007      	beq.n	80033c2 <TIM_Base_SetConfig+0x56>
+ 80033b2:	687b      	ldr	r3, [r7, #4]
+ 80033b4:	4a14      	ldr	r2, [pc, #80]	; (8003408 <TIM_Base_SetConfig+0x9c>)
+ 80033b6:	4293      	cmp	r3, r2
+ 80033b8:	d003      	beq.n	80033c2 <TIM_Base_SetConfig+0x56>
+ 80033ba:	687b      	ldr	r3, [r7, #4]
+ 80033bc:	4a13      	ldr	r2, [pc, #76]	; (800340c <TIM_Base_SetConfig+0xa0>)
+ 80033be:	4293      	cmp	r3, r2
+ 80033c0:	d108      	bne.n	80033d4 <TIM_Base_SetConfig+0x68>
   {
     /* Set the clock division */
     tmpcr1 &= ~TIM_CR1_CKD;
- 800364e:	68fb      	ldr	r3, [r7, #12]
- 8003650:	4a12      	ldr	r2, [pc, #72]	; (800369c <TIM_Base_SetConfig+0xa4>)
- 8003652:	4013      	ands	r3, r2
- 8003654:	60fb      	str	r3, [r7, #12]
+ 80033c2:	68fb      	ldr	r3, [r7, #12]
+ 80033c4:	4a12      	ldr	r2, [pc, #72]	; (8003410 <TIM_Base_SetConfig+0xa4>)
+ 80033c6:	4013      	ands	r3, r2
+ 80033c8:	60fb      	str	r3, [r7, #12]
     tmpcr1 |= (uint32_t)Structure->ClockDivision;
- 8003656:	683b      	ldr	r3, [r7, #0]
- 8003658:	68db      	ldr	r3, [r3, #12]
- 800365a:	68fa      	ldr	r2, [r7, #12]
- 800365c:	4313      	orrs	r3, r2
- 800365e:	60fb      	str	r3, [r7, #12]
+ 80033ca:	683b      	ldr	r3, [r7, #0]
+ 80033cc:	68db      	ldr	r3, [r3, #12]
+ 80033ce:	68fa      	ldr	r2, [r7, #12]
+ 80033d0:	4313      	orrs	r3, r2
+ 80033d2:	60fb      	str	r3, [r7, #12]
   }
 
   /* Set the auto-reload preload */
   MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
- 8003660:	68fb      	ldr	r3, [r7, #12]
- 8003662:	2280      	movs	r2, #128	; 0x80
- 8003664:	4393      	bics	r3, r2
- 8003666:	001a      	movs	r2, r3
- 8003668:	683b      	ldr	r3, [r7, #0]
- 800366a:	691b      	ldr	r3, [r3, #16]
- 800366c:	4313      	orrs	r3, r2
- 800366e:	60fb      	str	r3, [r7, #12]
+ 80033d4:	68fb      	ldr	r3, [r7, #12]
+ 80033d6:	2280      	movs	r2, #128	; 0x80
+ 80033d8:	4393      	bics	r3, r2
+ 80033da:	001a      	movs	r2, r3
+ 80033dc:	683b      	ldr	r3, [r7, #0]
+ 80033de:	691b      	ldr	r3, [r3, #16]
+ 80033e0:	4313      	orrs	r3, r2
+ 80033e2:	60fb      	str	r3, [r7, #12]
 
   TIMx->CR1 = tmpcr1;
- 8003670:	687b      	ldr	r3, [r7, #4]
- 8003672:	68fa      	ldr	r2, [r7, #12]
- 8003674:	601a      	str	r2, [r3, #0]
+ 80033e4:	687b      	ldr	r3, [r7, #4]
+ 80033e6:	68fa      	ldr	r2, [r7, #12]
+ 80033e8:	601a      	str	r2, [r3, #0]
 
   /* Set the Autoreload value */
   TIMx->ARR = (uint32_t)Structure->Period ;
- 8003676:	683b      	ldr	r3, [r7, #0]
- 8003678:	689a      	ldr	r2, [r3, #8]
- 800367a:	687b      	ldr	r3, [r7, #4]
- 800367c:	62da      	str	r2, [r3, #44]	; 0x2c
+ 80033ea:	683b      	ldr	r3, [r7, #0]
+ 80033ec:	689a      	ldr	r2, [r3, #8]
+ 80033ee:	687b      	ldr	r3, [r7, #4]
+ 80033f0:	62da      	str	r2, [r3, #44]	; 0x2c
 
   /* Set the Prescaler value */
   TIMx->PSC = Structure->Prescaler;
- 800367e:	683b      	ldr	r3, [r7, #0]
- 8003680:	681a      	ldr	r2, [r3, #0]
- 8003682:	687b      	ldr	r3, [r7, #4]
- 8003684:	629a      	str	r2, [r3, #40]	; 0x28
+ 80033f2:	683b      	ldr	r3, [r7, #0]
+ 80033f4:	681a      	ldr	r2, [r3, #0]
+ 80033f6:	687b      	ldr	r3, [r7, #4]
+ 80033f8:	629a      	str	r2, [r3, #40]	; 0x28
 
   /* Generate an update event to reload the Prescaler
      and the repetition counter (only for advanced timer) value immediately */
   TIMx->EGR = TIM_EGR_UG;
- 8003686:	687b      	ldr	r3, [r7, #4]
- 8003688:	2201      	movs	r2, #1
- 800368a:	615a      	str	r2, [r3, #20]
+ 80033fa:	687b      	ldr	r3, [r7, #4]
+ 80033fc:	2201      	movs	r2, #1
+ 80033fe:	615a      	str	r2, [r3, #20]
 }
- 800368c:	46c0      	nop			; (mov r8, r8)
- 800368e:	46bd      	mov	sp, r7
- 8003690:	b004      	add	sp, #16
- 8003692:	bd80      	pop	{r7, pc}
- 8003694:	40010800 	.word	0x40010800
- 8003698:	40011400 	.word	0x40011400
- 800369c:	fffffcff 	.word	0xfffffcff
+ 8003400:	46c0      	nop			; (mov r8, r8)
+ 8003402:	46bd      	mov	sp, r7
+ 8003404:	b004      	add	sp, #16
+ 8003406:	bd80      	pop	{r7, pc}
+ 8003408:	40010800 	.word	0x40010800
+ 800340c:	40011400 	.word	0x40011400
+ 8003410:	fffffcff 	.word	0xfffffcff
 
-080036a0 <TIM_TI1_ConfigInputStage>:
+08003414 <TIM_TI1_ConfigInputStage>:
   * @param  TIM_ICFilter Specifies the Input Capture Filter.
   *          This parameter must be a value between 0x00 and 0x0F.
   * @retval None
   */
 static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
 {
- 80036a0:	b580      	push	{r7, lr}
- 80036a2:	b086      	sub	sp, #24
- 80036a4:	af00      	add	r7, sp, #0
- 80036a6:	60f8      	str	r0, [r7, #12]
- 80036a8:	60b9      	str	r1, [r7, #8]
- 80036aa:	607a      	str	r2, [r7, #4]
+ 8003414:	b580      	push	{r7, lr}
+ 8003416:	b086      	sub	sp, #24
+ 8003418:	af00      	add	r7, sp, #0
+ 800341a:	60f8      	str	r0, [r7, #12]
+ 800341c:	60b9      	str	r1, [r7, #8]
+ 800341e:	607a      	str	r2, [r7, #4]
   uint32_t tmpccmr1;
   uint32_t tmpccer;
 
   /* Disable the Channel 1: Reset the CC1E Bit */
   tmpccer = TIMx->CCER;
- 80036ac:	68fb      	ldr	r3, [r7, #12]
- 80036ae:	6a1b      	ldr	r3, [r3, #32]
- 80036b0:	617b      	str	r3, [r7, #20]
+ 8003420:	68fb      	ldr	r3, [r7, #12]
+ 8003422:	6a1b      	ldr	r3, [r3, #32]
+ 8003424:	617b      	str	r3, [r7, #20]
   TIMx->CCER &= ~TIM_CCER_CC1E;
- 80036b2:	68fb      	ldr	r3, [r7, #12]
- 80036b4:	6a1b      	ldr	r3, [r3, #32]
- 80036b6:	2201      	movs	r2, #1
- 80036b8:	4393      	bics	r3, r2
- 80036ba:	001a      	movs	r2, r3
- 80036bc:	68fb      	ldr	r3, [r7, #12]
- 80036be:	621a      	str	r2, [r3, #32]
+ 8003426:	68fb      	ldr	r3, [r7, #12]
+ 8003428:	6a1b      	ldr	r3, [r3, #32]
+ 800342a:	2201      	movs	r2, #1
+ 800342c:	4393      	bics	r3, r2
+ 800342e:	001a      	movs	r2, r3
+ 8003430:	68fb      	ldr	r3, [r7, #12]
+ 8003432:	621a      	str	r2, [r3, #32]
   tmpccmr1 = TIMx->CCMR1;
- 80036c0:	68fb      	ldr	r3, [r7, #12]
- 80036c2:	699b      	ldr	r3, [r3, #24]
- 80036c4:	613b      	str	r3, [r7, #16]
+ 8003434:	68fb      	ldr	r3, [r7, #12]
+ 8003436:	699b      	ldr	r3, [r3, #24]
+ 8003438:	613b      	str	r3, [r7, #16]
 
   /* Set the filter */
   tmpccmr1 &= ~TIM_CCMR1_IC1F;
- 80036c6:	693b      	ldr	r3, [r7, #16]
- 80036c8:	22f0      	movs	r2, #240	; 0xf0
- 80036ca:	4393      	bics	r3, r2
- 80036cc:	613b      	str	r3, [r7, #16]
+ 800343a:	693b      	ldr	r3, [r7, #16]
+ 800343c:	22f0      	movs	r2, #240	; 0xf0
+ 800343e:	4393      	bics	r3, r2
+ 8003440:	613b      	str	r3, [r7, #16]
   tmpccmr1 |= (TIM_ICFilter << 4U);
- 80036ce:	687b      	ldr	r3, [r7, #4]
- 80036d0:	011b      	lsls	r3, r3, #4
- 80036d2:	693a      	ldr	r2, [r7, #16]
- 80036d4:	4313      	orrs	r3, r2
- 80036d6:	613b      	str	r3, [r7, #16]
+ 8003442:	687b      	ldr	r3, [r7, #4]
+ 8003444:	011b      	lsls	r3, r3, #4
+ 8003446:	693a      	ldr	r2, [r7, #16]
+ 8003448:	4313      	orrs	r3, r2
+ 800344a:	613b      	str	r3, [r7, #16]
 
   /* Select the Polarity and set the CC1E Bit */
   tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
- 80036d8:	697b      	ldr	r3, [r7, #20]
- 80036da:	220a      	movs	r2, #10
- 80036dc:	4393      	bics	r3, r2
- 80036de:	617b      	str	r3, [r7, #20]
+ 800344c:	697b      	ldr	r3, [r7, #20]
+ 800344e:	220a      	movs	r2, #10
+ 8003450:	4393      	bics	r3, r2
+ 8003452:	617b      	str	r3, [r7, #20]
   tmpccer |= TIM_ICPolarity;
- 80036e0:	697a      	ldr	r2, [r7, #20]
- 80036e2:	68bb      	ldr	r3, [r7, #8]
- 80036e4:	4313      	orrs	r3, r2
- 80036e6:	617b      	str	r3, [r7, #20]
+ 8003454:	697a      	ldr	r2, [r7, #20]
+ 8003456:	68bb      	ldr	r3, [r7, #8]
+ 8003458:	4313      	orrs	r3, r2
+ 800345a:	617b      	str	r3, [r7, #20]
 
   /* Write to TIMx CCMR1 and CCER registers */
   TIMx->CCMR1 = tmpccmr1;
- 80036e8:	68fb      	ldr	r3, [r7, #12]
- 80036ea:	693a      	ldr	r2, [r7, #16]
- 80036ec:	619a      	str	r2, [r3, #24]
+ 800345c:	68fb      	ldr	r3, [r7, #12]
+ 800345e:	693a      	ldr	r2, [r7, #16]
+ 8003460:	619a      	str	r2, [r3, #24]
   TIMx->CCER = tmpccer;
- 80036ee:	68fb      	ldr	r3, [r7, #12]
- 80036f0:	697a      	ldr	r2, [r7, #20]
- 80036f2:	621a      	str	r2, [r3, #32]
+ 8003462:	68fb      	ldr	r3, [r7, #12]
+ 8003464:	697a      	ldr	r2, [r7, #20]
+ 8003466:	621a      	str	r2, [r3, #32]
 }
- 80036f4:	46c0      	nop			; (mov r8, r8)
- 80036f6:	46bd      	mov	sp, r7
- 80036f8:	b006      	add	sp, #24
- 80036fa:	bd80      	pop	{r7, pc}
+ 8003468:	46c0      	nop			; (mov r8, r8)
+ 800346a:	46bd      	mov	sp, r7
+ 800346c:	b006      	add	sp, #24
+ 800346e:	bd80      	pop	{r7, pc}
 
-080036fc <TIM_TI2_ConfigInputStage>:
+08003470 <TIM_TI2_ConfigInputStage>:
   * @param  TIM_ICFilter Specifies the Input Capture Filter.
   *          This parameter must be a value between 0x00 and 0x0F.
   * @retval None
   */
 static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
 {
- 80036fc:	b580      	push	{r7, lr}
- 80036fe:	b086      	sub	sp, #24
- 8003700:	af00      	add	r7, sp, #0
- 8003702:	60f8      	str	r0, [r7, #12]
- 8003704:	60b9      	str	r1, [r7, #8]
- 8003706:	607a      	str	r2, [r7, #4]
+ 8003470:	b580      	push	{r7, lr}
+ 8003472:	b086      	sub	sp, #24
+ 8003474:	af00      	add	r7, sp, #0
+ 8003476:	60f8      	str	r0, [r7, #12]
+ 8003478:	60b9      	str	r1, [r7, #8]
+ 800347a:	607a      	str	r2, [r7, #4]
   uint32_t tmpccmr1;
   uint32_t tmpccer;
 
   /* Disable the Channel 2: Reset the CC2E Bit */
   TIMx->CCER &= ~TIM_CCER_CC2E;
- 8003708:	68fb      	ldr	r3, [r7, #12]
- 800370a:	6a1b      	ldr	r3, [r3, #32]
- 800370c:	2210      	movs	r2, #16
- 800370e:	4393      	bics	r3, r2
- 8003710:	001a      	movs	r2, r3
- 8003712:	68fb      	ldr	r3, [r7, #12]
- 8003714:	621a      	str	r2, [r3, #32]
+ 800347c:	68fb      	ldr	r3, [r7, #12]
+ 800347e:	6a1b      	ldr	r3, [r3, #32]
+ 8003480:	2210      	movs	r2, #16
+ 8003482:	4393      	bics	r3, r2
+ 8003484:	001a      	movs	r2, r3
+ 8003486:	68fb      	ldr	r3, [r7, #12]
+ 8003488:	621a      	str	r2, [r3, #32]
   tmpccmr1 = TIMx->CCMR1;
- 8003716:	68fb      	ldr	r3, [r7, #12]
- 8003718:	699b      	ldr	r3, [r3, #24]
- 800371a:	617b      	str	r3, [r7, #20]
+ 800348a:	68fb      	ldr	r3, [r7, #12]
+ 800348c:	699b      	ldr	r3, [r3, #24]
+ 800348e:	617b      	str	r3, [r7, #20]
   tmpccer = TIMx->CCER;
- 800371c:	68fb      	ldr	r3, [r7, #12]
- 800371e:	6a1b      	ldr	r3, [r3, #32]
- 8003720:	613b      	str	r3, [r7, #16]
+ 8003490:	68fb      	ldr	r3, [r7, #12]
+ 8003492:	6a1b      	ldr	r3, [r3, #32]
+ 8003494:	613b      	str	r3, [r7, #16]
 
   /* Set the filter */
   tmpccmr1 &= ~TIM_CCMR1_IC2F;
- 8003722:	697b      	ldr	r3, [r7, #20]
- 8003724:	4a0d      	ldr	r2, [pc, #52]	; (800375c <TIM_TI2_ConfigInputStage+0x60>)
- 8003726:	4013      	ands	r3, r2
- 8003728:	617b      	str	r3, [r7, #20]
+ 8003496:	697b      	ldr	r3, [r7, #20]
+ 8003498:	4a0d      	ldr	r2, [pc, #52]	; (80034d0 <TIM_TI2_ConfigInputStage+0x60>)
+ 800349a:	4013      	ands	r3, r2
+ 800349c:	617b      	str	r3, [r7, #20]
   tmpccmr1 |= (TIM_ICFilter << 12U);
- 800372a:	687b      	ldr	r3, [r7, #4]
- 800372c:	031b      	lsls	r3, r3, #12
- 800372e:	697a      	ldr	r2, [r7, #20]
- 8003730:	4313      	orrs	r3, r2
- 8003732:	617b      	str	r3, [r7, #20]
+ 800349e:	687b      	ldr	r3, [r7, #4]
+ 80034a0:	031b      	lsls	r3, r3, #12
+ 80034a2:	697a      	ldr	r2, [r7, #20]
+ 80034a4:	4313      	orrs	r3, r2
+ 80034a6:	617b      	str	r3, [r7, #20]
 
   /* Select the Polarity and set the CC2E Bit */
   tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
- 8003734:	693b      	ldr	r3, [r7, #16]
- 8003736:	22a0      	movs	r2, #160	; 0xa0
- 8003738:	4393      	bics	r3, r2
- 800373a:	613b      	str	r3, [r7, #16]
+ 80034a8:	693b      	ldr	r3, [r7, #16]
+ 80034aa:	22a0      	movs	r2, #160	; 0xa0
+ 80034ac:	4393      	bics	r3, r2
+ 80034ae:	613b      	str	r3, [r7, #16]
   tmpccer |= (TIM_ICPolarity << 4U);
- 800373c:	68bb      	ldr	r3, [r7, #8]
- 800373e:	011b      	lsls	r3, r3, #4
- 8003740:	693a      	ldr	r2, [r7, #16]
- 8003742:	4313      	orrs	r3, r2
- 8003744:	613b      	str	r3, [r7, #16]
+ 80034b0:	68bb      	ldr	r3, [r7, #8]
+ 80034b2:	011b      	lsls	r3, r3, #4
+ 80034b4:	693a      	ldr	r2, [r7, #16]
+ 80034b6:	4313      	orrs	r3, r2
+ 80034b8:	613b      	str	r3, [r7, #16]
 
   /* Write to TIMx CCMR1 and CCER registers */
   TIMx->CCMR1 = tmpccmr1 ;
- 8003746:	68fb      	ldr	r3, [r7, #12]
- 8003748:	697a      	ldr	r2, [r7, #20]
- 800374a:	619a      	str	r2, [r3, #24]
+ 80034ba:	68fb      	ldr	r3, [r7, #12]
+ 80034bc:	697a      	ldr	r2, [r7, #20]
+ 80034be:	619a      	str	r2, [r3, #24]
   TIMx->CCER = tmpccer;
- 800374c:	68fb      	ldr	r3, [r7, #12]
- 800374e:	693a      	ldr	r2, [r7, #16]
- 8003750:	621a      	str	r2, [r3, #32]
+ 80034c0:	68fb      	ldr	r3, [r7, #12]
+ 80034c2:	693a      	ldr	r2, [r7, #16]
+ 80034c4:	621a      	str	r2, [r3, #32]
 }
- 8003752:	46c0      	nop			; (mov r8, r8)
- 8003754:	46bd      	mov	sp, r7
- 8003756:	b006      	add	sp, #24
- 8003758:	bd80      	pop	{r7, pc}
- 800375a:	46c0      	nop			; (mov r8, r8)
- 800375c:	ffff0fff 	.word	0xffff0fff
+ 80034c6:	46c0      	nop			; (mov r8, r8)
+ 80034c8:	46bd      	mov	sp, r7
+ 80034ca:	b006      	add	sp, #24
+ 80034cc:	bd80      	pop	{r7, pc}
+ 80034ce:	46c0      	nop			; (mov r8, r8)
+ 80034d0:	ffff0fff 	.word	0xffff0fff
 
-08003760 <TIM_ITRx_SetConfig>:
+080034d4 <TIM_ITRx_SetConfig>:
   *            @arg TIM_TS_TI2FP2: Filtered Timer Input 2
   *            @arg TIM_TS_ETRF: External Trigger input
   * @retval None
   */
 static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
 {
- 8003760:	b580      	push	{r7, lr}
- 8003762:	b084      	sub	sp, #16
- 8003764:	af00      	add	r7, sp, #0
- 8003766:	6078      	str	r0, [r7, #4]
- 8003768:	6039      	str	r1, [r7, #0]
+ 80034d4:	b580      	push	{r7, lr}
+ 80034d6:	b084      	sub	sp, #16
+ 80034d8:	af00      	add	r7, sp, #0
+ 80034da:	6078      	str	r0, [r7, #4]
+ 80034dc:	6039      	str	r1, [r7, #0]
   uint32_t tmpsmcr;
 
   /* Get the TIMx SMCR register value */
   tmpsmcr = TIMx->SMCR;
- 800376a:	687b      	ldr	r3, [r7, #4]
- 800376c:	689b      	ldr	r3, [r3, #8]
- 800376e:	60fb      	str	r3, [r7, #12]
+ 80034de:	687b      	ldr	r3, [r7, #4]
+ 80034e0:	689b      	ldr	r3, [r3, #8]
+ 80034e2:	60fb      	str	r3, [r7, #12]
   /* Reset the TS Bits */
   tmpsmcr &= ~TIM_SMCR_TS;
- 8003770:	68fb      	ldr	r3, [r7, #12]
- 8003772:	2270      	movs	r2, #112	; 0x70
- 8003774:	4393      	bics	r3, r2
- 8003776:	60fb      	str	r3, [r7, #12]
+ 80034e4:	68fb      	ldr	r3, [r7, #12]
+ 80034e6:	2270      	movs	r2, #112	; 0x70
+ 80034e8:	4393      	bics	r3, r2
+ 80034ea:	60fb      	str	r3, [r7, #12]
   /* Set the Input Trigger source and the slave mode*/
   tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
- 8003778:	683a      	ldr	r2, [r7, #0]
- 800377a:	68fb      	ldr	r3, [r7, #12]
- 800377c:	4313      	orrs	r3, r2
- 800377e:	2207      	movs	r2, #7
- 8003780:	4313      	orrs	r3, r2
- 8003782:	60fb      	str	r3, [r7, #12]
+ 80034ec:	683a      	ldr	r2, [r7, #0]
+ 80034ee:	68fb      	ldr	r3, [r7, #12]
+ 80034f0:	4313      	orrs	r3, r2
+ 80034f2:	2207      	movs	r2, #7
+ 80034f4:	4313      	orrs	r3, r2
+ 80034f6:	60fb      	str	r3, [r7, #12]
   /* Write to TIMx SMCR */
   TIMx->SMCR = tmpsmcr;
- 8003784:	687b      	ldr	r3, [r7, #4]
- 8003786:	68fa      	ldr	r2, [r7, #12]
- 8003788:	609a      	str	r2, [r3, #8]
+ 80034f8:	687b      	ldr	r3, [r7, #4]
+ 80034fa:	68fa      	ldr	r2, [r7, #12]
+ 80034fc:	609a      	str	r2, [r3, #8]
 }
- 800378a:	46c0      	nop			; (mov r8, r8)
- 800378c:	46bd      	mov	sp, r7
- 800378e:	b004      	add	sp, #16
- 8003790:	bd80      	pop	{r7, pc}
+ 80034fe:	46c0      	nop			; (mov r8, r8)
+ 8003500:	46bd      	mov	sp, r7
+ 8003502:	b004      	add	sp, #16
+ 8003504:	bd80      	pop	{r7, pc}
 	...
 
-08003794 <TIM_ETR_SetConfig>:
+08003508 <TIM_ETR_SetConfig>:
   *          This parameter must be a value between 0x00 and 0x0F
   * @retval None
   */
 static void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
                               uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
 {
- 8003794:	b580      	push	{r7, lr}
- 8003796:	b086      	sub	sp, #24
- 8003798:	af00      	add	r7, sp, #0
- 800379a:	60f8      	str	r0, [r7, #12]
- 800379c:	60b9      	str	r1, [r7, #8]
- 800379e:	607a      	str	r2, [r7, #4]
- 80037a0:	603b      	str	r3, [r7, #0]
+ 8003508:	b580      	push	{r7, lr}
+ 800350a:	b086      	sub	sp, #24
+ 800350c:	af00      	add	r7, sp, #0
+ 800350e:	60f8      	str	r0, [r7, #12]
+ 8003510:	60b9      	str	r1, [r7, #8]
+ 8003512:	607a      	str	r2, [r7, #4]
+ 8003514:	603b      	str	r3, [r7, #0]
   uint32_t tmpsmcr;
 
   tmpsmcr = TIMx->SMCR;
- 80037a2:	68fb      	ldr	r3, [r7, #12]
- 80037a4:	689b      	ldr	r3, [r3, #8]
- 80037a6:	617b      	str	r3, [r7, #20]
+ 8003516:	68fb      	ldr	r3, [r7, #12]
+ 8003518:	689b      	ldr	r3, [r3, #8]
+ 800351a:	617b      	str	r3, [r7, #20]
 
   /* Reset the ETR Bits */
   tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
- 80037a8:	697b      	ldr	r3, [r7, #20]
- 80037aa:	4a09      	ldr	r2, [pc, #36]	; (80037d0 <TIM_ETR_SetConfig+0x3c>)
- 80037ac:	4013      	ands	r3, r2
- 80037ae:	617b      	str	r3, [r7, #20]
+ 800351c:	697b      	ldr	r3, [r7, #20]
+ 800351e:	4a09      	ldr	r2, [pc, #36]	; (8003544 <TIM_ETR_SetConfig+0x3c>)
+ 8003520:	4013      	ands	r3, r2
+ 8003522:	617b      	str	r3, [r7, #20]
 
   /* Set the Prescaler, the Filter value and the Polarity */
   tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
- 80037b0:	683b      	ldr	r3, [r7, #0]
- 80037b2:	021a      	lsls	r2, r3, #8
- 80037b4:	687b      	ldr	r3, [r7, #4]
- 80037b6:	431a      	orrs	r2, r3
- 80037b8:	68bb      	ldr	r3, [r7, #8]
- 80037ba:	4313      	orrs	r3, r2
- 80037bc:	697a      	ldr	r2, [r7, #20]
- 80037be:	4313      	orrs	r3, r2
- 80037c0:	617b      	str	r3, [r7, #20]
+ 8003524:	683b      	ldr	r3, [r7, #0]
+ 8003526:	021a      	lsls	r2, r3, #8
+ 8003528:	687b      	ldr	r3, [r7, #4]
+ 800352a:	431a      	orrs	r2, r3
+ 800352c:	68bb      	ldr	r3, [r7, #8]
+ 800352e:	4313      	orrs	r3, r2
+ 8003530:	697a      	ldr	r2, [r7, #20]
+ 8003532:	4313      	orrs	r3, r2
+ 8003534:	617b      	str	r3, [r7, #20]
 
   /* Write to TIMx SMCR */
   TIMx->SMCR = tmpsmcr;
- 80037c2:	68fb      	ldr	r3, [r7, #12]
- 80037c4:	697a      	ldr	r2, [r7, #20]
- 80037c6:	609a      	str	r2, [r3, #8]
+ 8003536:	68fb      	ldr	r3, [r7, #12]
+ 8003538:	697a      	ldr	r2, [r7, #20]
+ 800353a:	609a      	str	r2, [r3, #8]
 }
- 80037c8:	46c0      	nop			; (mov r8, r8)
- 80037ca:	46bd      	mov	sp, r7
- 80037cc:	b006      	add	sp, #24
- 80037ce:	bd80      	pop	{r7, pc}
- 80037d0:	ffff00ff 	.word	0xffff00ff
+ 800353c:	46c0      	nop			; (mov r8, r8)
+ 800353e:	46bd      	mov	sp, r7
+ 8003540:	b006      	add	sp, #24
+ 8003542:	bd80      	pop	{r7, pc}
+ 8003544:	ffff00ff 	.word	0xffff00ff
 
-080037d4 <HAL_TIMEx_MasterConfigSynchronization>:
+08003548 <HAL_TIMEx_MasterConfigSynchronization>:
   *         mode.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
                                                         const TIM_MasterConfigTypeDef *sMasterConfig)
 {
- 80037d4:	b580      	push	{r7, lr}
- 80037d6:	b084      	sub	sp, #16
- 80037d8:	af00      	add	r7, sp, #0
- 80037da:	6078      	str	r0, [r7, #4]
- 80037dc:	6039      	str	r1, [r7, #0]
+ 8003548:	b580      	push	{r7, lr}
+ 800354a:	b084      	sub	sp, #16
+ 800354c:	af00      	add	r7, sp, #0
+ 800354e:	6078      	str	r0, [r7, #4]
+ 8003550:	6039      	str	r1, [r7, #0]
   assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
   assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
   assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
 
   /* Check input state */
   __HAL_LOCK(htim);
- 80037de:	687b      	ldr	r3, [r7, #4]
- 80037e0:	2238      	movs	r2, #56	; 0x38
- 80037e2:	5c9b      	ldrb	r3, [r3, r2]
- 80037e4:	2b01      	cmp	r3, #1
- 80037e6:	d101      	bne.n	80037ec <HAL_TIMEx_MasterConfigSynchronization+0x18>
- 80037e8:	2302      	movs	r3, #2
- 80037ea:	e042      	b.n	8003872 <HAL_TIMEx_MasterConfigSynchronization+0x9e>
- 80037ec:	687b      	ldr	r3, [r7, #4]
- 80037ee:	2238      	movs	r2, #56	; 0x38
- 80037f0:	2101      	movs	r1, #1
- 80037f2:	5499      	strb	r1, [r3, r2]
+ 8003552:	687b      	ldr	r3, [r7, #4]
+ 8003554:	2238      	movs	r2, #56	; 0x38
+ 8003556:	5c9b      	ldrb	r3, [r3, r2]
+ 8003558:	2b01      	cmp	r3, #1
+ 800355a:	d101      	bne.n	8003560 <HAL_TIMEx_MasterConfigSynchronization+0x18>
+ 800355c:	2302      	movs	r3, #2
+ 800355e:	e042      	b.n	80035e6 <HAL_TIMEx_MasterConfigSynchronization+0x9e>
+ 8003560:	687b      	ldr	r3, [r7, #4]
+ 8003562:	2238      	movs	r2, #56	; 0x38
+ 8003564:	2101      	movs	r1, #1
+ 8003566:	5499      	strb	r1, [r3, r2]
 
   /* Change the handler state */
   htim->State = HAL_TIM_STATE_BUSY;
- 80037f4:	687b      	ldr	r3, [r7, #4]
- 80037f6:	2239      	movs	r2, #57	; 0x39
- 80037f8:	2102      	movs	r1, #2
- 80037fa:	5499      	strb	r1, [r3, r2]
+ 8003568:	687b      	ldr	r3, [r7, #4]
+ 800356a:	2239      	movs	r2, #57	; 0x39
+ 800356c:	2102      	movs	r1, #2
+ 800356e:	5499      	strb	r1, [r3, r2]
 
   /* Get the TIMx CR2 register value */
   tmpcr2 = htim->Instance->CR2;
- 80037fc:	687b      	ldr	r3, [r7, #4]
- 80037fe:	681b      	ldr	r3, [r3, #0]
- 8003800:	685b      	ldr	r3, [r3, #4]
- 8003802:	60fb      	str	r3, [r7, #12]
+ 8003570:	687b      	ldr	r3, [r7, #4]
+ 8003572:	681b      	ldr	r3, [r3, #0]
+ 8003574:	685b      	ldr	r3, [r3, #4]
+ 8003576:	60fb      	str	r3, [r7, #12]
 
   /* Get the TIMx SMCR register value */
   tmpsmcr = htim->Instance->SMCR;
- 8003804:	687b      	ldr	r3, [r7, #4]
- 8003806:	681b      	ldr	r3, [r3, #0]
- 8003808:	689b      	ldr	r3, [r3, #8]
- 800380a:	60bb      	str	r3, [r7, #8]
+ 8003578:	687b      	ldr	r3, [r7, #4]
+ 800357a:	681b      	ldr	r3, [r3, #0]
+ 800357c:	689b      	ldr	r3, [r3, #8]
+ 800357e:	60bb      	str	r3, [r7, #8]
 
   /* Reset the MMS Bits */
   tmpcr2 &= ~TIM_CR2_MMS;
- 800380c:	68fb      	ldr	r3, [r7, #12]
- 800380e:	2270      	movs	r2, #112	; 0x70
- 8003810:	4393      	bics	r3, r2
- 8003812:	60fb      	str	r3, [r7, #12]
+ 8003580:	68fb      	ldr	r3, [r7, #12]
+ 8003582:	2270      	movs	r2, #112	; 0x70
+ 8003584:	4393      	bics	r3, r2
+ 8003586:	60fb      	str	r3, [r7, #12]
   /* Select the TRGO source */
   tmpcr2 |=  sMasterConfig->MasterOutputTrigger;
- 8003814:	683b      	ldr	r3, [r7, #0]
- 8003816:	681b      	ldr	r3, [r3, #0]
- 8003818:	68fa      	ldr	r2, [r7, #12]
- 800381a:	4313      	orrs	r3, r2
- 800381c:	60fb      	str	r3, [r7, #12]
+ 8003588:	683b      	ldr	r3, [r7, #0]
+ 800358a:	681b      	ldr	r3, [r3, #0]
+ 800358c:	68fa      	ldr	r2, [r7, #12]
+ 800358e:	4313      	orrs	r3, r2
+ 8003590:	60fb      	str	r3, [r7, #12]
 
   /* Update TIMx CR2 */
   htim->Instance->CR2 = tmpcr2;
- 800381e:	687b      	ldr	r3, [r7, #4]
- 8003820:	681b      	ldr	r3, [r3, #0]
- 8003822:	68fa      	ldr	r2, [r7, #12]
- 8003824:	605a      	str	r2, [r3, #4]
+ 8003592:	687b      	ldr	r3, [r7, #4]
+ 8003594:	681b      	ldr	r3, [r3, #0]
+ 8003596:	68fa      	ldr	r2, [r7, #12]
+ 8003598:	605a      	str	r2, [r3, #4]
 
   if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
- 8003826:	687b      	ldr	r3, [r7, #4]
- 8003828:	681a      	ldr	r2, [r3, #0]
- 800382a:	2380      	movs	r3, #128	; 0x80
- 800382c:	05db      	lsls	r3, r3, #23
- 800382e:	429a      	cmp	r2, r3
- 8003830:	d009      	beq.n	8003846 <HAL_TIMEx_MasterConfigSynchronization+0x72>
- 8003832:	687b      	ldr	r3, [r7, #4]
- 8003834:	681b      	ldr	r3, [r3, #0]
- 8003836:	4a11      	ldr	r2, [pc, #68]	; (800387c <HAL_TIMEx_MasterConfigSynchronization+0xa8>)
- 8003838:	4293      	cmp	r3, r2
- 800383a:	d004      	beq.n	8003846 <HAL_TIMEx_MasterConfigSynchronization+0x72>
- 800383c:	687b      	ldr	r3, [r7, #4]
- 800383e:	681b      	ldr	r3, [r3, #0]
- 8003840:	4a0f      	ldr	r2, [pc, #60]	; (8003880 <HAL_TIMEx_MasterConfigSynchronization+0xac>)
- 8003842:	4293      	cmp	r3, r2
- 8003844:	d10c      	bne.n	8003860 <HAL_TIMEx_MasterConfigSynchronization+0x8c>
+ 800359a:	687b      	ldr	r3, [r7, #4]
+ 800359c:	681a      	ldr	r2, [r3, #0]
+ 800359e:	2380      	movs	r3, #128	; 0x80
+ 80035a0:	05db      	lsls	r3, r3, #23
+ 80035a2:	429a      	cmp	r2, r3
+ 80035a4:	d009      	beq.n	80035ba <HAL_TIMEx_MasterConfigSynchronization+0x72>
+ 80035a6:	687b      	ldr	r3, [r7, #4]
+ 80035a8:	681b      	ldr	r3, [r3, #0]
+ 80035aa:	4a11      	ldr	r2, [pc, #68]	; (80035f0 <HAL_TIMEx_MasterConfigSynchronization+0xa8>)
+ 80035ac:	4293      	cmp	r3, r2
+ 80035ae:	d004      	beq.n	80035ba <HAL_TIMEx_MasterConfigSynchronization+0x72>
+ 80035b0:	687b      	ldr	r3, [r7, #4]
+ 80035b2:	681b      	ldr	r3, [r3, #0]
+ 80035b4:	4a0f      	ldr	r2, [pc, #60]	; (80035f4 <HAL_TIMEx_MasterConfigSynchronization+0xac>)
+ 80035b6:	4293      	cmp	r3, r2
+ 80035b8:	d10c      	bne.n	80035d4 <HAL_TIMEx_MasterConfigSynchronization+0x8c>
   {
     /* Reset the MSM Bit */
     tmpsmcr &= ~TIM_SMCR_MSM;
- 8003846:	68bb      	ldr	r3, [r7, #8]
- 8003848:	2280      	movs	r2, #128	; 0x80
- 800384a:	4393      	bics	r3, r2
- 800384c:	60bb      	str	r3, [r7, #8]
+ 80035ba:	68bb      	ldr	r3, [r7, #8]
+ 80035bc:	2280      	movs	r2, #128	; 0x80
+ 80035be:	4393      	bics	r3, r2
+ 80035c0:	60bb      	str	r3, [r7, #8]
     /* Set master mode */
     tmpsmcr |= sMasterConfig->MasterSlaveMode;
- 800384e:	683b      	ldr	r3, [r7, #0]
- 8003850:	685b      	ldr	r3, [r3, #4]
- 8003852:	68ba      	ldr	r2, [r7, #8]
- 8003854:	4313      	orrs	r3, r2
- 8003856:	60bb      	str	r3, [r7, #8]
+ 80035c2:	683b      	ldr	r3, [r7, #0]
+ 80035c4:	685b      	ldr	r3, [r3, #4]
+ 80035c6:	68ba      	ldr	r2, [r7, #8]
+ 80035c8:	4313      	orrs	r3, r2
+ 80035ca:	60bb      	str	r3, [r7, #8]
 
     /* Update TIMx SMCR */
     htim->Instance->SMCR = tmpsmcr;
- 8003858:	687b      	ldr	r3, [r7, #4]
- 800385a:	681b      	ldr	r3, [r3, #0]
- 800385c:	68ba      	ldr	r2, [r7, #8]
- 800385e:	609a      	str	r2, [r3, #8]
+ 80035cc:	687b      	ldr	r3, [r7, #4]
+ 80035ce:	681b      	ldr	r3, [r3, #0]
+ 80035d0:	68ba      	ldr	r2, [r7, #8]
+ 80035d2:	609a      	str	r2, [r3, #8]
   }
 
   /* Change the htim state */
   htim->State = HAL_TIM_STATE_READY;
- 8003860:	687b      	ldr	r3, [r7, #4]
- 8003862:	2239      	movs	r2, #57	; 0x39
- 8003864:	2101      	movs	r1, #1
- 8003866:	5499      	strb	r1, [r3, r2]
+ 80035d4:	687b      	ldr	r3, [r7, #4]
+ 80035d6:	2239      	movs	r2, #57	; 0x39
+ 80035d8:	2101      	movs	r1, #1
+ 80035da:	5499      	strb	r1, [r3, r2]
 
   __HAL_UNLOCK(htim);
- 8003868:	687b      	ldr	r3, [r7, #4]
- 800386a:	2238      	movs	r2, #56	; 0x38
- 800386c:	2100      	movs	r1, #0
- 800386e:	5499      	strb	r1, [r3, r2]
+ 80035dc:	687b      	ldr	r3, [r7, #4]
+ 80035de:	2238      	movs	r2, #56	; 0x38
+ 80035e0:	2100      	movs	r1, #0
+ 80035e2:	5499      	strb	r1, [r3, r2]
 
   return HAL_OK;
- 8003870:	2300      	movs	r3, #0
+ 80035e4:	2300      	movs	r3, #0
 }
- 8003872:	0018      	movs	r0, r3
- 8003874:	46bd      	mov	sp, r7
- 8003876:	b004      	add	sp, #16
- 8003878:	bd80      	pop	{r7, pc}
- 800387a:	46c0      	nop			; (mov r8, r8)
- 800387c:	40010800 	.word	0x40010800
- 8003880:	40011400 	.word	0x40011400
+ 80035e6:	0018      	movs	r0, r3
+ 80035e8:	46bd      	mov	sp, r7
+ 80035ea:	b004      	add	sp, #16
+ 80035ec:	bd80      	pop	{r7, pc}
+ 80035ee:	46c0      	nop			; (mov r8, r8)
+ 80035f0:	40010800 	.word	0x40010800
+ 80035f4:	40011400 	.word	0x40011400
 
-08003884 <HAL_UART_Init>:
+080035f8 <HAL_UART_Init>:
   *        parameters in the UART_InitTypeDef and initialize the associated handle.
   * @param huart UART handle.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
 {
- 8003884:	b580      	push	{r7, lr}
- 8003886:	b082      	sub	sp, #8
- 8003888:	af00      	add	r7, sp, #0
- 800388a:	6078      	str	r0, [r7, #4]
+ 80035f8:	b580      	push	{r7, lr}
+ 80035fa:	b082      	sub	sp, #8
+ 80035fc:	af00      	add	r7, sp, #0
+ 80035fe:	6078      	str	r0, [r7, #4]
   /* Check the UART handle allocation */
   if (huart == NULL)
- 800388c:	687b      	ldr	r3, [r7, #4]
- 800388e:	2b00      	cmp	r3, #0
- 8003890:	d101      	bne.n	8003896 <HAL_UART_Init+0x12>
+ 8003600:	687b      	ldr	r3, [r7, #4]
+ 8003602:	2b00      	cmp	r3, #0
+ 8003604:	d101      	bne.n	800360a <HAL_UART_Init+0x12>
   {
     return HAL_ERROR;
- 8003892:	2301      	movs	r3, #1
- 8003894:	e044      	b.n	8003920 <HAL_UART_Init+0x9c>
+ 8003606:	2301      	movs	r3, #1
+ 8003608:	e044      	b.n	8003694 <HAL_UART_Init+0x9c>
   {
     /* Check the parameters */
     assert_param((IS_UART_INSTANCE(huart->Instance)) || (IS_LPUART_INSTANCE(huart->Instance)));
   }
 
   if (huart->gState == HAL_UART_STATE_RESET)
- 8003896:	687b      	ldr	r3, [r7, #4]
- 8003898:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
- 800389a:	2b00      	cmp	r3, #0
- 800389c:	d107      	bne.n	80038ae <HAL_UART_Init+0x2a>
+ 800360a:	687b      	ldr	r3, [r7, #4]
+ 800360c:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
+ 800360e:	2b00      	cmp	r3, #0
+ 8003610:	d107      	bne.n	8003622 <HAL_UART_Init+0x2a>
   {
     /* Allocate lock resource and initialize it */
     huart->Lock = HAL_UNLOCKED;
- 800389e:	687b      	ldr	r3, [r7, #4]
- 80038a0:	2278      	movs	r2, #120	; 0x78
- 80038a2:	2100      	movs	r1, #0
- 80038a4:	5499      	strb	r1, [r3, r2]
+ 8003612:	687b      	ldr	r3, [r7, #4]
+ 8003614:	2278      	movs	r2, #120	; 0x78
+ 8003616:	2100      	movs	r1, #0
+ 8003618:	5499      	strb	r1, [r3, r2]
 
     /* Init the low level hardware */
     huart->MspInitCallback(huart);
 #else
     /* Init the low level hardware : GPIO, CLOCK */
     HAL_UART_MspInit(huart);
- 80038a6:	687b      	ldr	r3, [r7, #4]
- 80038a8:	0018      	movs	r0, r3
- 80038aa:	f7fd fbd9 	bl	8001060 <HAL_UART_MspInit>
+ 800361a:	687b      	ldr	r3, [r7, #4]
+ 800361c:	0018      	movs	r0, r3
+ 800361e:	f7fd fc75 	bl	8000f0c <HAL_UART_MspInit>
 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
   }
 
   huart->gState = HAL_UART_STATE_BUSY;
- 80038ae:	687b      	ldr	r3, [r7, #4]
- 80038b0:	2224      	movs	r2, #36	; 0x24
- 80038b2:	67da      	str	r2, [r3, #124]	; 0x7c
+ 8003622:	687b      	ldr	r3, [r7, #4]
+ 8003624:	2224      	movs	r2, #36	; 0x24
+ 8003626:	67da      	str	r2, [r3, #124]	; 0x7c
 
   __HAL_UART_DISABLE(huart);
- 80038b4:	687b      	ldr	r3, [r7, #4]
- 80038b6:	681b      	ldr	r3, [r3, #0]
- 80038b8:	681a      	ldr	r2, [r3, #0]
- 80038ba:	687b      	ldr	r3, [r7, #4]
- 80038bc:	681b      	ldr	r3, [r3, #0]
- 80038be:	2101      	movs	r1, #1
- 80038c0:	438a      	bics	r2, r1
- 80038c2:	601a      	str	r2, [r3, #0]
+ 8003628:	687b      	ldr	r3, [r7, #4]
+ 800362a:	681b      	ldr	r3, [r3, #0]
+ 800362c:	681a      	ldr	r2, [r3, #0]
+ 800362e:	687b      	ldr	r3, [r7, #4]
+ 8003630:	681b      	ldr	r3, [r3, #0]
+ 8003632:	2101      	movs	r1, #1
+ 8003634:	438a      	bics	r2, r1
+ 8003636:	601a      	str	r2, [r3, #0]
 
   /* Set the UART Communication parameters */
   if (UART_SetConfig(huart) == HAL_ERROR)
- 80038c4:	687b      	ldr	r3, [r7, #4]
- 80038c6:	0018      	movs	r0, r3
- 80038c8:	f000 fc2c 	bl	8004124 <UART_SetConfig>
- 80038cc:	0003      	movs	r3, r0
- 80038ce:	2b01      	cmp	r3, #1
- 80038d0:	d101      	bne.n	80038d6 <HAL_UART_Init+0x52>
+ 8003638:	687b      	ldr	r3, [r7, #4]
+ 800363a:	0018      	movs	r0, r3
+ 800363c:	f000 f9b6 	bl	80039ac <UART_SetConfig>
+ 8003640:	0003      	movs	r3, r0
+ 8003642:	2b01      	cmp	r3, #1
+ 8003644:	d101      	bne.n	800364a <HAL_UART_Init+0x52>
   {
     return HAL_ERROR;
- 80038d2:	2301      	movs	r3, #1
- 80038d4:	e024      	b.n	8003920 <HAL_UART_Init+0x9c>
+ 8003646:	2301      	movs	r3, #1
+ 8003648:	e024      	b.n	8003694 <HAL_UART_Init+0x9c>
   }
 
   if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
- 80038d6:	687b      	ldr	r3, [r7, #4]
- 80038d8:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 80038da:	2b00      	cmp	r3, #0
- 80038dc:	d003      	beq.n	80038e6 <HAL_UART_Init+0x62>
+ 800364a:	687b      	ldr	r3, [r7, #4]
+ 800364c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800364e:	2b00      	cmp	r3, #0
+ 8003650:	d003      	beq.n	800365a <HAL_UART_Init+0x62>
   {
     UART_AdvFeatureConfig(huart);
- 80038de:	687b      	ldr	r3, [r7, #4]
- 80038e0:	0018      	movs	r0, r3
- 80038e2:	f000 fea3 	bl	800462c <UART_AdvFeatureConfig>
+ 8003652:	687b      	ldr	r3, [r7, #4]
+ 8003654:	0018      	movs	r0, r3
+ 8003656:	f000 fc2d 	bl	8003eb4 <UART_AdvFeatureConfig>
   }
 
   /* In asynchronous mode, the following bits must be kept cleared:
   - LINEN and CLKEN bits in the USART_CR2 register,
   - SCEN, HDSEL and IREN  bits in the USART_CR3 register.*/
   CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
- 80038e6:	687b      	ldr	r3, [r7, #4]
- 80038e8:	681b      	ldr	r3, [r3, #0]
- 80038ea:	685a      	ldr	r2, [r3, #4]
- 80038ec:	687b      	ldr	r3, [r7, #4]
- 80038ee:	681b      	ldr	r3, [r3, #0]
- 80038f0:	490d      	ldr	r1, [pc, #52]	; (8003928 <HAL_UART_Init+0xa4>)
- 80038f2:	400a      	ands	r2, r1
- 80038f4:	605a      	str	r2, [r3, #4]
+ 800365a:	687b      	ldr	r3, [r7, #4]
+ 800365c:	681b      	ldr	r3, [r3, #0]
+ 800365e:	685a      	ldr	r2, [r3, #4]
+ 8003660:	687b      	ldr	r3, [r7, #4]
+ 8003662:	681b      	ldr	r3, [r3, #0]
+ 8003664:	490d      	ldr	r1, [pc, #52]	; (800369c <HAL_UART_Init+0xa4>)
+ 8003666:	400a      	ands	r2, r1
+ 8003668:	605a      	str	r2, [r3, #4]
   CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
- 80038f6:	687b      	ldr	r3, [r7, #4]
- 80038f8:	681b      	ldr	r3, [r3, #0]
- 80038fa:	689a      	ldr	r2, [r3, #8]
- 80038fc:	687b      	ldr	r3, [r7, #4]
- 80038fe:	681b      	ldr	r3, [r3, #0]
- 8003900:	212a      	movs	r1, #42	; 0x2a
- 8003902:	438a      	bics	r2, r1
- 8003904:	609a      	str	r2, [r3, #8]
+ 800366a:	687b      	ldr	r3, [r7, #4]
+ 800366c:	681b      	ldr	r3, [r3, #0]
+ 800366e:	689a      	ldr	r2, [r3, #8]
+ 8003670:	687b      	ldr	r3, [r7, #4]
+ 8003672:	681b      	ldr	r3, [r3, #0]
+ 8003674:	212a      	movs	r1, #42	; 0x2a
+ 8003676:	438a      	bics	r2, r1
+ 8003678:	609a      	str	r2, [r3, #8]
 
   __HAL_UART_ENABLE(huart);
- 8003906:	687b      	ldr	r3, [r7, #4]
- 8003908:	681b      	ldr	r3, [r3, #0]
- 800390a:	681a      	ldr	r2, [r3, #0]
- 800390c:	687b      	ldr	r3, [r7, #4]
- 800390e:	681b      	ldr	r3, [r3, #0]
- 8003910:	2101      	movs	r1, #1
- 8003912:	430a      	orrs	r2, r1
- 8003914:	601a      	str	r2, [r3, #0]
+ 800367a:	687b      	ldr	r3, [r7, #4]
+ 800367c:	681b      	ldr	r3, [r3, #0]
+ 800367e:	681a      	ldr	r2, [r3, #0]
+ 8003680:	687b      	ldr	r3, [r7, #4]
+ 8003682:	681b      	ldr	r3, [r3, #0]
+ 8003684:	2101      	movs	r1, #1
+ 8003686:	430a      	orrs	r2, r1
+ 8003688:	601a      	str	r2, [r3, #0]
 
   /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
   return (UART_CheckIdleState(huart));
- 8003916:	687b      	ldr	r3, [r7, #4]
- 8003918:	0018      	movs	r0, r3
- 800391a:	f000 ff3b 	bl	8004794 <UART_CheckIdleState>
- 800391e:	0003      	movs	r3, r0
+ 800368a:	687b      	ldr	r3, [r7, #4]
+ 800368c:	0018      	movs	r0, r3
+ 800368e:	f000 fcc5 	bl	800401c <UART_CheckIdleState>
+ 8003692:	0003      	movs	r3, r0
 }
- 8003920:	0018      	movs	r0, r3
- 8003922:	46bd      	mov	sp, r7
- 8003924:	b002      	add	sp, #8
- 8003926:	bd80      	pop	{r7, pc}
- 8003928:	ffffb7ff 	.word	0xffffb7ff
+ 8003694:	0018      	movs	r0, r3
+ 8003696:	46bd      	mov	sp, r7
+ 8003698:	b002      	add	sp, #8
+ 800369a:	bd80      	pop	{r7, pc}
+ 800369c:	ffffb7ff 	.word	0xffffb7ff
 
-0800392c <HAL_UART_Transmit>:
+080036a0 <HAL_UART_Transmit>:
   * @param Size    Amount of data elements (u8 or u16) to be sent.
   * @param Timeout Timeout duration.
   * @retval HAL status
   */
 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
 {
- 800392c:	b580      	push	{r7, lr}
- 800392e:	b08a      	sub	sp, #40	; 0x28
- 8003930:	af02      	add	r7, sp, #8
- 8003932:	60f8      	str	r0, [r7, #12]
- 8003934:	60b9      	str	r1, [r7, #8]
- 8003936:	603b      	str	r3, [r7, #0]
- 8003938:	1dbb      	adds	r3, r7, #6
- 800393a:	801a      	strh	r2, [r3, #0]
+ 80036a0:	b580      	push	{r7, lr}
+ 80036a2:	b08a      	sub	sp, #40	; 0x28
+ 80036a4:	af02      	add	r7, sp, #8
+ 80036a6:	60f8      	str	r0, [r7, #12]
+ 80036a8:	60b9      	str	r1, [r7, #8]
+ 80036aa:	603b      	str	r3, [r7, #0]
+ 80036ac:	1dbb      	adds	r3, r7, #6
+ 80036ae:	801a      	strh	r2, [r3, #0]
   const uint8_t  *pdata8bits;
   const uint16_t *pdata16bits;
   uint32_t tickstart;
 
   /* Check that a Tx process is not already ongoing */
   if (huart->gState == HAL_UART_STATE_READY)
- 800393c:	68fb      	ldr	r3, [r7, #12]
- 800393e:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
- 8003940:	2b20      	cmp	r3, #32
- 8003942:	d000      	beq.n	8003946 <HAL_UART_Transmit+0x1a>
- 8003944:	e08c      	b.n	8003a60 <HAL_UART_Transmit+0x134>
+ 80036b0:	68fb      	ldr	r3, [r7, #12]
+ 80036b2:	6fdb      	ldr	r3, [r3, #124]	; 0x7c
+ 80036b4:	2b20      	cmp	r3, #32
+ 80036b6:	d000      	beq.n	80036ba <HAL_UART_Transmit+0x1a>
+ 80036b8:	e08c      	b.n	80037d4 <HAL_UART_Transmit+0x134>
   {
     if ((pData == NULL) || (Size == 0U))
- 8003946:	68bb      	ldr	r3, [r7, #8]
- 8003948:	2b00      	cmp	r3, #0
- 800394a:	d003      	beq.n	8003954 <HAL_UART_Transmit+0x28>
- 800394c:	1dbb      	adds	r3, r7, #6
- 800394e:	881b      	ldrh	r3, [r3, #0]
- 8003950:	2b00      	cmp	r3, #0
- 8003952:	d101      	bne.n	8003958 <HAL_UART_Transmit+0x2c>
+ 80036ba:	68bb      	ldr	r3, [r7, #8]
+ 80036bc:	2b00      	cmp	r3, #0
+ 80036be:	d003      	beq.n	80036c8 <HAL_UART_Transmit+0x28>
+ 80036c0:	1dbb      	adds	r3, r7, #6
+ 80036c2:	881b      	ldrh	r3, [r3, #0]
+ 80036c4:	2b00      	cmp	r3, #0
+ 80036c6:	d101      	bne.n	80036cc <HAL_UART_Transmit+0x2c>
     {
       return  HAL_ERROR;
- 8003954:	2301      	movs	r3, #1
- 8003956:	e084      	b.n	8003a62 <HAL_UART_Transmit+0x136>
+ 80036c8:	2301      	movs	r3, #1
+ 80036ca:	e084      	b.n	80037d6 <HAL_UART_Transmit+0x136>
     }
 
     /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter
        should be aligned on a u16 frontier, as data to be filled into TDR will be
        handled through a u16 cast. */
     if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- 8003958:	68fb      	ldr	r3, [r7, #12]
- 800395a:	689a      	ldr	r2, [r3, #8]
- 800395c:	2380      	movs	r3, #128	; 0x80
- 800395e:	015b      	lsls	r3, r3, #5
- 8003960:	429a      	cmp	r2, r3
- 8003962:	d109      	bne.n	8003978 <HAL_UART_Transmit+0x4c>
- 8003964:	68fb      	ldr	r3, [r7, #12]
- 8003966:	691b      	ldr	r3, [r3, #16]
- 8003968:	2b00      	cmp	r3, #0
- 800396a:	d105      	bne.n	8003978 <HAL_UART_Transmit+0x4c>
+ 80036cc:	68fb      	ldr	r3, [r7, #12]
+ 80036ce:	689a      	ldr	r2, [r3, #8]
+ 80036d0:	2380      	movs	r3, #128	; 0x80
+ 80036d2:	015b      	lsls	r3, r3, #5
+ 80036d4:	429a      	cmp	r2, r3
+ 80036d6:	d109      	bne.n	80036ec <HAL_UART_Transmit+0x4c>
+ 80036d8:	68fb      	ldr	r3, [r7, #12]
+ 80036da:	691b      	ldr	r3, [r3, #16]
+ 80036dc:	2b00      	cmp	r3, #0
+ 80036de:	d105      	bne.n	80036ec <HAL_UART_Transmit+0x4c>
     {
       if ((((uint32_t)pData) & 1U) != 0U)
- 800396c:	68bb      	ldr	r3, [r7, #8]
- 800396e:	2201      	movs	r2, #1
- 8003970:	4013      	ands	r3, r2
- 8003972:	d001      	beq.n	8003978 <HAL_UART_Transmit+0x4c>
+ 80036e0:	68bb      	ldr	r3, [r7, #8]
+ 80036e2:	2201      	movs	r2, #1
+ 80036e4:	4013      	ands	r3, r2
+ 80036e6:	d001      	beq.n	80036ec <HAL_UART_Transmit+0x4c>
       {
         return  HAL_ERROR;
- 8003974:	2301      	movs	r3, #1
- 8003976:	e074      	b.n	8003a62 <HAL_UART_Transmit+0x136>
+ 80036e8:	2301      	movs	r3, #1
+ 80036ea:	e074      	b.n	80037d6 <HAL_UART_Transmit+0x136>
       }
     }
 
     huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8003978:	68fb      	ldr	r3, [r7, #12]
- 800397a:	2284      	movs	r2, #132	; 0x84
- 800397c:	2100      	movs	r1, #0
- 800397e:	5099      	str	r1, [r3, r2]
+ 80036ec:	68fb      	ldr	r3, [r7, #12]
+ 80036ee:	2284      	movs	r2, #132	; 0x84
+ 80036f0:	2100      	movs	r1, #0
+ 80036f2:	5099      	str	r1, [r3, r2]
     huart->gState = HAL_UART_STATE_BUSY_TX;
- 8003980:	68fb      	ldr	r3, [r7, #12]
- 8003982:	2221      	movs	r2, #33	; 0x21
- 8003984:	67da      	str	r2, [r3, #124]	; 0x7c
+ 80036f4:	68fb      	ldr	r3, [r7, #12]
+ 80036f6:	2221      	movs	r2, #33	; 0x21
+ 80036f8:	67da      	str	r2, [r3, #124]	; 0x7c
 
     /* Init tickstart for timeout management */
     tickstart = HAL_GetTick();
- 8003986:	f7fd fd87 	bl	8001498 <HAL_GetTick>
- 800398a:	0003      	movs	r3, r0
- 800398c:	617b      	str	r3, [r7, #20]
+ 80036fa:	f7fd fe0f 	bl	800131c <HAL_GetTick>
+ 80036fe:	0003      	movs	r3, r0
+ 8003700:	617b      	str	r3, [r7, #20]
 
     huart->TxXferSize  = Size;
- 800398e:	68fb      	ldr	r3, [r7, #12]
- 8003990:	1dba      	adds	r2, r7, #6
- 8003992:	2150      	movs	r1, #80	; 0x50
- 8003994:	8812      	ldrh	r2, [r2, #0]
- 8003996:	525a      	strh	r2, [r3, r1]
+ 8003702:	68fb      	ldr	r3, [r7, #12]
+ 8003704:	1dba      	adds	r2, r7, #6
+ 8003706:	2150      	movs	r1, #80	; 0x50
+ 8003708:	8812      	ldrh	r2, [r2, #0]
+ 800370a:	525a      	strh	r2, [r3, r1]
     huart->TxXferCount = Size;
- 8003998:	68fb      	ldr	r3, [r7, #12]
- 800399a:	1dba      	adds	r2, r7, #6
- 800399c:	2152      	movs	r1, #82	; 0x52
- 800399e:	8812      	ldrh	r2, [r2, #0]
- 80039a0:	525a      	strh	r2, [r3, r1]
+ 800370c:	68fb      	ldr	r3, [r7, #12]
+ 800370e:	1dba      	adds	r2, r7, #6
+ 8003710:	2152      	movs	r1, #82	; 0x52
+ 8003712:	8812      	ldrh	r2, [r2, #0]
+ 8003714:	525a      	strh	r2, [r3, r1]
 
     /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
     if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- 80039a2:	68fb      	ldr	r3, [r7, #12]
- 80039a4:	689a      	ldr	r2, [r3, #8]
- 80039a6:	2380      	movs	r3, #128	; 0x80
- 80039a8:	015b      	lsls	r3, r3, #5
- 80039aa:	429a      	cmp	r2, r3
- 80039ac:	d108      	bne.n	80039c0 <HAL_UART_Transmit+0x94>
- 80039ae:	68fb      	ldr	r3, [r7, #12]
- 80039b0:	691b      	ldr	r3, [r3, #16]
- 80039b2:	2b00      	cmp	r3, #0
- 80039b4:	d104      	bne.n	80039c0 <HAL_UART_Transmit+0x94>
+ 8003716:	68fb      	ldr	r3, [r7, #12]
+ 8003718:	689a      	ldr	r2, [r3, #8]
+ 800371a:	2380      	movs	r3, #128	; 0x80
+ 800371c:	015b      	lsls	r3, r3, #5
+ 800371e:	429a      	cmp	r2, r3
+ 8003720:	d108      	bne.n	8003734 <HAL_UART_Transmit+0x94>
+ 8003722:	68fb      	ldr	r3, [r7, #12]
+ 8003724:	691b      	ldr	r3, [r3, #16]
+ 8003726:	2b00      	cmp	r3, #0
+ 8003728:	d104      	bne.n	8003734 <HAL_UART_Transmit+0x94>
     {
       pdata8bits  = NULL;
- 80039b6:	2300      	movs	r3, #0
- 80039b8:	61fb      	str	r3, [r7, #28]
+ 800372a:	2300      	movs	r3, #0
+ 800372c:	61fb      	str	r3, [r7, #28]
       pdata16bits = (const uint16_t *) pData;
- 80039ba:	68bb      	ldr	r3, [r7, #8]
- 80039bc:	61bb      	str	r3, [r7, #24]
- 80039be:	e003      	b.n	80039c8 <HAL_UART_Transmit+0x9c>
+ 800372e:	68bb      	ldr	r3, [r7, #8]
+ 8003730:	61bb      	str	r3, [r7, #24]
+ 8003732:	e003      	b.n	800373c <HAL_UART_Transmit+0x9c>
     }
     else
     {
       pdata8bits  = pData;
- 80039c0:	68bb      	ldr	r3, [r7, #8]
- 80039c2:	61fb      	str	r3, [r7, #28]
+ 8003734:	68bb      	ldr	r3, [r7, #8]
+ 8003736:	61fb      	str	r3, [r7, #28]
       pdata16bits = NULL;
- 80039c4:	2300      	movs	r3, #0
- 80039c6:	61bb      	str	r3, [r7, #24]
+ 8003738:	2300      	movs	r3, #0
+ 800373a:	61bb      	str	r3, [r7, #24]
     }
 
     while (huart->TxXferCount > 0U)
- 80039c8:	e02f      	b.n	8003a2a <HAL_UART_Transmit+0xfe>
+ 800373c:	e02f      	b.n	800379e <HAL_UART_Transmit+0xfe>
     {
       if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
- 80039ca:	697a      	ldr	r2, [r7, #20]
- 80039cc:	68f8      	ldr	r0, [r7, #12]
- 80039ce:	683b      	ldr	r3, [r7, #0]
- 80039d0:	9300      	str	r3, [sp, #0]
- 80039d2:	0013      	movs	r3, r2
- 80039d4:	2200      	movs	r2, #0
- 80039d6:	2180      	movs	r1, #128	; 0x80
- 80039d8:	f000 ff84 	bl	80048e4 <UART_WaitOnFlagUntilTimeout>
- 80039dc:	1e03      	subs	r3, r0, #0
- 80039de:	d004      	beq.n	80039ea <HAL_UART_Transmit+0xbe>
+ 800373e:	697a      	ldr	r2, [r7, #20]
+ 8003740:	68f8      	ldr	r0, [r7, #12]
+ 8003742:	683b      	ldr	r3, [r7, #0]
+ 8003744:	9300      	str	r3, [sp, #0]
+ 8003746:	0013      	movs	r3, r2
+ 8003748:	2200      	movs	r2, #0
+ 800374a:	2180      	movs	r1, #128	; 0x80
+ 800374c:	f000 fd0e 	bl	800416c <UART_WaitOnFlagUntilTimeout>
+ 8003750:	1e03      	subs	r3, r0, #0
+ 8003752:	d004      	beq.n	800375e <HAL_UART_Transmit+0xbe>
       {
 
         huart->gState = HAL_UART_STATE_READY;
- 80039e0:	68fb      	ldr	r3, [r7, #12]
- 80039e2:	2220      	movs	r2, #32
- 80039e4:	67da      	str	r2, [r3, #124]	; 0x7c
+ 8003754:	68fb      	ldr	r3, [r7, #12]
+ 8003756:	2220      	movs	r2, #32
+ 8003758:	67da      	str	r2, [r3, #124]	; 0x7c
 
         return HAL_TIMEOUT;
- 80039e6:	2303      	movs	r3, #3
- 80039e8:	e03b      	b.n	8003a62 <HAL_UART_Transmit+0x136>
+ 800375a:	2303      	movs	r3, #3
+ 800375c:	e03b      	b.n	80037d6 <HAL_UART_Transmit+0x136>
       }
       if (pdata8bits == NULL)
- 80039ea:	69fb      	ldr	r3, [r7, #28]
- 80039ec:	2b00      	cmp	r3, #0
- 80039ee:	d10b      	bne.n	8003a08 <HAL_UART_Transmit+0xdc>
+ 800375e:	69fb      	ldr	r3, [r7, #28]
+ 8003760:	2b00      	cmp	r3, #0
+ 8003762:	d10b      	bne.n	800377c <HAL_UART_Transmit+0xdc>
       {
         huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU);
- 80039f0:	69bb      	ldr	r3, [r7, #24]
- 80039f2:	881b      	ldrh	r3, [r3, #0]
- 80039f4:	001a      	movs	r2, r3
- 80039f6:	68fb      	ldr	r3, [r7, #12]
- 80039f8:	681b      	ldr	r3, [r3, #0]
- 80039fa:	05d2      	lsls	r2, r2, #23
- 80039fc:	0dd2      	lsrs	r2, r2, #23
- 80039fe:	629a      	str	r2, [r3, #40]	; 0x28
+ 8003764:	69bb      	ldr	r3, [r7, #24]
+ 8003766:	881b      	ldrh	r3, [r3, #0]
+ 8003768:	001a      	movs	r2, r3
+ 800376a:	68fb      	ldr	r3, [r7, #12]
+ 800376c:	681b      	ldr	r3, [r3, #0]
+ 800376e:	05d2      	lsls	r2, r2, #23
+ 8003770:	0dd2      	lsrs	r2, r2, #23
+ 8003772:	629a      	str	r2, [r3, #40]	; 0x28
         pdata16bits++;
- 8003a00:	69bb      	ldr	r3, [r7, #24]
- 8003a02:	3302      	adds	r3, #2
- 8003a04:	61bb      	str	r3, [r7, #24]
- 8003a06:	e007      	b.n	8003a18 <HAL_UART_Transmit+0xec>
+ 8003774:	69bb      	ldr	r3, [r7, #24]
+ 8003776:	3302      	adds	r3, #2
+ 8003778:	61bb      	str	r3, [r7, #24]
+ 800377a:	e007      	b.n	800378c <HAL_UART_Transmit+0xec>
       }
       else
       {
         huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU);
- 8003a08:	69fb      	ldr	r3, [r7, #28]
- 8003a0a:	781a      	ldrb	r2, [r3, #0]
- 8003a0c:	68fb      	ldr	r3, [r7, #12]
- 8003a0e:	681b      	ldr	r3, [r3, #0]
- 8003a10:	629a      	str	r2, [r3, #40]	; 0x28
+ 800377c:	69fb      	ldr	r3, [r7, #28]
+ 800377e:	781a      	ldrb	r2, [r3, #0]
+ 8003780:	68fb      	ldr	r3, [r7, #12]
+ 8003782:	681b      	ldr	r3, [r3, #0]
+ 8003784:	629a      	str	r2, [r3, #40]	; 0x28
         pdata8bits++;
- 8003a12:	69fb      	ldr	r3, [r7, #28]
- 8003a14:	3301      	adds	r3, #1
- 8003a16:	61fb      	str	r3, [r7, #28]
+ 8003786:	69fb      	ldr	r3, [r7, #28]
+ 8003788:	3301      	adds	r3, #1
+ 800378a:	61fb      	str	r3, [r7, #28]
       }
       huart->TxXferCount--;
- 8003a18:	68fb      	ldr	r3, [r7, #12]
- 8003a1a:	2252      	movs	r2, #82	; 0x52
- 8003a1c:	5a9b      	ldrh	r3, [r3, r2]
- 8003a1e:	b29b      	uxth	r3, r3
- 8003a20:	3b01      	subs	r3, #1
- 8003a22:	b299      	uxth	r1, r3
- 8003a24:	68fb      	ldr	r3, [r7, #12]
- 8003a26:	2252      	movs	r2, #82	; 0x52
- 8003a28:	5299      	strh	r1, [r3, r2]
+ 800378c:	68fb      	ldr	r3, [r7, #12]
+ 800378e:	2252      	movs	r2, #82	; 0x52
+ 8003790:	5a9b      	ldrh	r3, [r3, r2]
+ 8003792:	b29b      	uxth	r3, r3
+ 8003794:	3b01      	subs	r3, #1
+ 8003796:	b299      	uxth	r1, r3
+ 8003798:	68fb      	ldr	r3, [r7, #12]
+ 800379a:	2252      	movs	r2, #82	; 0x52
+ 800379c:	5299      	strh	r1, [r3, r2]
     while (huart->TxXferCount > 0U)
- 8003a2a:	68fb      	ldr	r3, [r7, #12]
- 8003a2c:	2252      	movs	r2, #82	; 0x52
- 8003a2e:	5a9b      	ldrh	r3, [r3, r2]
- 8003a30:	b29b      	uxth	r3, r3
- 8003a32:	2b00      	cmp	r3, #0
- 8003a34:	d1c9      	bne.n	80039ca <HAL_UART_Transmit+0x9e>
+ 800379e:	68fb      	ldr	r3, [r7, #12]
+ 80037a0:	2252      	movs	r2, #82	; 0x52
+ 80037a2:	5a9b      	ldrh	r3, [r3, r2]
+ 80037a4:	b29b      	uxth	r3, r3
+ 80037a6:	2b00      	cmp	r3, #0
+ 80037a8:	d1c9      	bne.n	800373e <HAL_UART_Transmit+0x9e>
     }
 
     if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
- 8003a36:	697a      	ldr	r2, [r7, #20]
- 8003a38:	68f8      	ldr	r0, [r7, #12]
- 8003a3a:	683b      	ldr	r3, [r7, #0]
- 8003a3c:	9300      	str	r3, [sp, #0]
- 8003a3e:	0013      	movs	r3, r2
- 8003a40:	2200      	movs	r2, #0
- 8003a42:	2140      	movs	r1, #64	; 0x40
- 8003a44:	f000 ff4e 	bl	80048e4 <UART_WaitOnFlagUntilTimeout>
- 8003a48:	1e03      	subs	r3, r0, #0
- 8003a4a:	d004      	beq.n	8003a56 <HAL_UART_Transmit+0x12a>
+ 80037aa:	697a      	ldr	r2, [r7, #20]
+ 80037ac:	68f8      	ldr	r0, [r7, #12]
+ 80037ae:	683b      	ldr	r3, [r7, #0]
+ 80037b0:	9300      	str	r3, [sp, #0]
+ 80037b2:	0013      	movs	r3, r2
+ 80037b4:	2200      	movs	r2, #0
+ 80037b6:	2140      	movs	r1, #64	; 0x40
+ 80037b8:	f000 fcd8 	bl	800416c <UART_WaitOnFlagUntilTimeout>
+ 80037bc:	1e03      	subs	r3, r0, #0
+ 80037be:	d004      	beq.n	80037ca <HAL_UART_Transmit+0x12a>
     {
       huart->gState = HAL_UART_STATE_READY;
- 8003a4c:	68fb      	ldr	r3, [r7, #12]
- 8003a4e:	2220      	movs	r2, #32
- 8003a50:	67da      	str	r2, [r3, #124]	; 0x7c
+ 80037c0:	68fb      	ldr	r3, [r7, #12]
+ 80037c2:	2220      	movs	r2, #32
+ 80037c4:	67da      	str	r2, [r3, #124]	; 0x7c
 
       return HAL_TIMEOUT;
- 8003a52:	2303      	movs	r3, #3
- 8003a54:	e005      	b.n	8003a62 <HAL_UART_Transmit+0x136>
+ 80037c6:	2303      	movs	r3, #3
+ 80037c8:	e005      	b.n	80037d6 <HAL_UART_Transmit+0x136>
     }
 
     /* At end of Tx process, restore huart->gState to Ready */
     huart->gState = HAL_UART_STATE_READY;
- 8003a56:	68fb      	ldr	r3, [r7, #12]
- 8003a58:	2220      	movs	r2, #32
- 8003a5a:	67da      	str	r2, [r3, #124]	; 0x7c
+ 80037ca:	68fb      	ldr	r3, [r7, #12]
+ 80037cc:	2220      	movs	r2, #32
+ 80037ce:	67da      	str	r2, [r3, #124]	; 0x7c
 
     return HAL_OK;
- 8003a5c:	2300      	movs	r3, #0
- 8003a5e:	e000      	b.n	8003a62 <HAL_UART_Transmit+0x136>
+ 80037d0:	2300      	movs	r3, #0
+ 80037d2:	e000      	b.n	80037d6 <HAL_UART_Transmit+0x136>
   }
   else
   {
     return HAL_BUSY;
- 8003a60:	2302      	movs	r3, #2
+ 80037d4:	2302      	movs	r3, #2
   }
 }
- 8003a62:	0018      	movs	r0, r3
- 8003a64:	46bd      	mov	sp, r7
- 8003a66:	b008      	add	sp, #32
- 8003a68:	bd80      	pop	{r7, pc}
+ 80037d6:	0018      	movs	r0, r3
+ 80037d8:	46bd      	mov	sp, r7
+ 80037da:	b008      	add	sp, #32
+ 80037dc:	bd80      	pop	{r7, pc}
 	...
 
-08003a6c <HAL_UART_Receive_IT>:
-  * @param pData Pointer to data buffer (u8 or u16 data elements).
-  * @param Size  Amount of data elements (u8 or u16) to be received.
+080037e0 <HAL_UART_Receive>:
+  * @param Size    Amount of data elements (u8 or u16) to be received.
+  * @param Timeout Timeout duration.
   * @retval HAL status
   */
-HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
+HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 {
- 8003a6c:	b580      	push	{r7, lr}
- 8003a6e:	b088      	sub	sp, #32
- 8003a70:	af00      	add	r7, sp, #0
- 8003a72:	60f8      	str	r0, [r7, #12]
- 8003a74:	60b9      	str	r1, [r7, #8]
- 8003a76:	1dbb      	adds	r3, r7, #6
- 8003a78:	801a      	strh	r2, [r3, #0]
+ 80037e0:	b580      	push	{r7, lr}
+ 80037e2:	b08a      	sub	sp, #40	; 0x28
+ 80037e4:	af02      	add	r7, sp, #8
+ 80037e6:	60f8      	str	r0, [r7, #12]
+ 80037e8:	60b9      	str	r1, [r7, #8]
+ 80037ea:	603b      	str	r3, [r7, #0]
+ 80037ec:	1dbb      	adds	r3, r7, #6
+ 80037ee:	801a      	strh	r2, [r3, #0]
+  uint16_t *pdata16bits;
+  uint16_t uhMask;
+  uint32_t tickstart;
+
   /* Check that a Rx process is not already ongoing */
   if (huart->RxState == HAL_UART_STATE_READY)
- 8003a7a:	68fb      	ldr	r3, [r7, #12]
- 8003a7c:	2280      	movs	r2, #128	; 0x80
- 8003a7e:	589b      	ldr	r3, [r3, r2]
- 8003a80:	2b20      	cmp	r3, #32
- 8003a82:	d14a      	bne.n	8003b1a <HAL_UART_Receive_IT+0xae>
+ 80037f0:	68fb      	ldr	r3, [r7, #12]
+ 80037f2:	2280      	movs	r2, #128	; 0x80
+ 80037f4:	589b      	ldr	r3, [r3, r2]
+ 80037f6:	2b20      	cmp	r3, #32
+ 80037f8:	d000      	beq.n	80037fc <HAL_UART_Receive+0x1c>
+ 80037fa:	e0d0      	b.n	800399e <HAL_UART_Receive+0x1be>
   {
     if ((pData == NULL) || (Size == 0U))
- 8003a84:	68bb      	ldr	r3, [r7, #8]
- 8003a86:	2b00      	cmp	r3, #0
- 8003a88:	d003      	beq.n	8003a92 <HAL_UART_Receive_IT+0x26>
- 8003a8a:	1dbb      	adds	r3, r7, #6
- 8003a8c:	881b      	ldrh	r3, [r3, #0]
- 8003a8e:	2b00      	cmp	r3, #0
- 8003a90:	d101      	bne.n	8003a96 <HAL_UART_Receive_IT+0x2a>
+ 80037fc:	68bb      	ldr	r3, [r7, #8]
+ 80037fe:	2b00      	cmp	r3, #0
+ 8003800:	d003      	beq.n	800380a <HAL_UART_Receive+0x2a>
+ 8003802:	1dbb      	adds	r3, r7, #6
+ 8003804:	881b      	ldrh	r3, [r3, #0]
+ 8003806:	2b00      	cmp	r3, #0
+ 8003808:	d101      	bne.n	800380e <HAL_UART_Receive+0x2e>
     {
-      return HAL_ERROR;
- 8003a92:	2301      	movs	r3, #1
- 8003a94:	e042      	b.n	8003b1c <HAL_UART_Receive_IT+0xb0>
+      return  HAL_ERROR;
+ 800380a:	2301      	movs	r3, #1
+ 800380c:	e0c8      	b.n	80039a0 <HAL_UART_Receive+0x1c0>
     }
 
     /* In case of 9bits/No Parity transfer, pData buffer provided as input parameter
        should be aligned on a u16 frontier, as data to be received from RDR will be
        handled through a u16 cast. */
     if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- 8003a96:	68fb      	ldr	r3, [r7, #12]
- 8003a98:	689a      	ldr	r2, [r3, #8]
- 8003a9a:	2380      	movs	r3, #128	; 0x80
- 8003a9c:	015b      	lsls	r3, r3, #5
- 8003a9e:	429a      	cmp	r2, r3
- 8003aa0:	d109      	bne.n	8003ab6 <HAL_UART_Receive_IT+0x4a>
- 8003aa2:	68fb      	ldr	r3, [r7, #12]
- 8003aa4:	691b      	ldr	r3, [r3, #16]
- 8003aa6:	2b00      	cmp	r3, #0
- 8003aa8:	d105      	bne.n	8003ab6 <HAL_UART_Receive_IT+0x4a>
+ 800380e:	68fb      	ldr	r3, [r7, #12]
+ 8003810:	689a      	ldr	r2, [r3, #8]
+ 8003812:	2380      	movs	r3, #128	; 0x80
+ 8003814:	015b      	lsls	r3, r3, #5
+ 8003816:	429a      	cmp	r2, r3
+ 8003818:	d109      	bne.n	800382e <HAL_UART_Receive+0x4e>
+ 800381a:	68fb      	ldr	r3, [r7, #12]
+ 800381c:	691b      	ldr	r3, [r3, #16]
+ 800381e:	2b00      	cmp	r3, #0
+ 8003820:	d105      	bne.n	800382e <HAL_UART_Receive+0x4e>
     {
       if ((((uint32_t)pData) & 1U) != 0U)
- 8003aaa:	68bb      	ldr	r3, [r7, #8]
- 8003aac:	2201      	movs	r2, #1
- 8003aae:	4013      	ands	r3, r2
- 8003ab0:	d001      	beq.n	8003ab6 <HAL_UART_Receive_IT+0x4a>
+ 8003822:	68bb      	ldr	r3, [r7, #8]
+ 8003824:	2201      	movs	r2, #1
+ 8003826:	4013      	ands	r3, r2
+ 8003828:	d001      	beq.n	800382e <HAL_UART_Receive+0x4e>
       {
         return  HAL_ERROR;
- 8003ab2:	2301      	movs	r3, #1
- 8003ab4:	e032      	b.n	8003b1c <HAL_UART_Receive_IT+0xb0>
+ 800382a:	2301      	movs	r3, #1
+ 800382c:	e0b8      	b.n	80039a0 <HAL_UART_Receive+0x1c0>
       }
     }
 
-    /* Set Reception type to Standard reception */
+    huart->ErrorCode = HAL_UART_ERROR_NONE;
+ 800382e:	68fb      	ldr	r3, [r7, #12]
+ 8003830:	2284      	movs	r2, #132	; 0x84
+ 8003832:	2100      	movs	r1, #0
+ 8003834:	5099      	str	r1, [r3, r2]
+    huart->RxState = HAL_UART_STATE_BUSY_RX;
+ 8003836:	68fb      	ldr	r3, [r7, #12]
+ 8003838:	2280      	movs	r2, #128	; 0x80
+ 800383a:	2122      	movs	r1, #34	; 0x22
+ 800383c:	5099      	str	r1, [r3, r2]
     huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 8003ab6:	68fb      	ldr	r3, [r7, #12]
- 8003ab8:	2200      	movs	r2, #0
- 8003aba:	661a      	str	r2, [r3, #96]	; 0x60
+ 800383e:	68fb      	ldr	r3, [r7, #12]
+ 8003840:	2200      	movs	r2, #0
+ 8003842:	661a      	str	r2, [r3, #96]	; 0x60
 
-    if (!(IS_LPUART_INSTANCE(huart->Instance)))
- 8003abc:	68fb      	ldr	r3, [r7, #12]
- 8003abe:	681b      	ldr	r3, [r3, #0]
- 8003ac0:	4a18      	ldr	r2, [pc, #96]	; (8003b24 <HAL_UART_Receive_IT+0xb8>)
- 8003ac2:	4293      	cmp	r3, r2
- 8003ac4:	d020      	beq.n	8003b08 <HAL_UART_Receive_IT+0x9c>
+    /* Init tickstart for timeout management */
+    tickstart = HAL_GetTick();
+ 8003844:	f7fd fd6a 	bl	800131c <HAL_GetTick>
+ 8003848:	0003      	movs	r3, r0
+ 800384a:	617b      	str	r3, [r7, #20]
+
+    huart->RxXferSize  = Size;
+ 800384c:	68fb      	ldr	r3, [r7, #12]
+ 800384e:	1dba      	adds	r2, r7, #6
+ 8003850:	2158      	movs	r1, #88	; 0x58
+ 8003852:	8812      	ldrh	r2, [r2, #0]
+ 8003854:	525a      	strh	r2, [r3, r1]
+    huart->RxXferCount = Size;
+ 8003856:	68fb      	ldr	r3, [r7, #12]
+ 8003858:	1dba      	adds	r2, r7, #6
+ 800385a:	215a      	movs	r1, #90	; 0x5a
+ 800385c:	8812      	ldrh	r2, [r2, #0]
+ 800385e:	525a      	strh	r2, [r3, r1]
+
+    /* Computation of UART mask to apply to RDR register */
+    UART_MASK_COMPUTATION(huart);
+ 8003860:	68fb      	ldr	r3, [r7, #12]
+ 8003862:	689a      	ldr	r2, [r3, #8]
+ 8003864:	2380      	movs	r3, #128	; 0x80
+ 8003866:	015b      	lsls	r3, r3, #5
+ 8003868:	429a      	cmp	r2, r3
+ 800386a:	d10d      	bne.n	8003888 <HAL_UART_Receive+0xa8>
+ 800386c:	68fb      	ldr	r3, [r7, #12]
+ 800386e:	691b      	ldr	r3, [r3, #16]
+ 8003870:	2b00      	cmp	r3, #0
+ 8003872:	d104      	bne.n	800387e <HAL_UART_Receive+0x9e>
+ 8003874:	68fb      	ldr	r3, [r7, #12]
+ 8003876:	225c      	movs	r2, #92	; 0x5c
+ 8003878:	494b      	ldr	r1, [pc, #300]	; (80039a8 <HAL_UART_Receive+0x1c8>)
+ 800387a:	5299      	strh	r1, [r3, r2]
+ 800387c:	e02e      	b.n	80038dc <HAL_UART_Receive+0xfc>
+ 800387e:	68fb      	ldr	r3, [r7, #12]
+ 8003880:	225c      	movs	r2, #92	; 0x5c
+ 8003882:	21ff      	movs	r1, #255	; 0xff
+ 8003884:	5299      	strh	r1, [r3, r2]
+ 8003886:	e029      	b.n	80038dc <HAL_UART_Receive+0xfc>
+ 8003888:	68fb      	ldr	r3, [r7, #12]
+ 800388a:	689b      	ldr	r3, [r3, #8]
+ 800388c:	2b00      	cmp	r3, #0
+ 800388e:	d10d      	bne.n	80038ac <HAL_UART_Receive+0xcc>
+ 8003890:	68fb      	ldr	r3, [r7, #12]
+ 8003892:	691b      	ldr	r3, [r3, #16]
+ 8003894:	2b00      	cmp	r3, #0
+ 8003896:	d104      	bne.n	80038a2 <HAL_UART_Receive+0xc2>
+ 8003898:	68fb      	ldr	r3, [r7, #12]
+ 800389a:	225c      	movs	r2, #92	; 0x5c
+ 800389c:	21ff      	movs	r1, #255	; 0xff
+ 800389e:	5299      	strh	r1, [r3, r2]
+ 80038a0:	e01c      	b.n	80038dc <HAL_UART_Receive+0xfc>
+ 80038a2:	68fb      	ldr	r3, [r7, #12]
+ 80038a4:	225c      	movs	r2, #92	; 0x5c
+ 80038a6:	217f      	movs	r1, #127	; 0x7f
+ 80038a8:	5299      	strh	r1, [r3, r2]
+ 80038aa:	e017      	b.n	80038dc <HAL_UART_Receive+0xfc>
+ 80038ac:	68fb      	ldr	r3, [r7, #12]
+ 80038ae:	689a      	ldr	r2, [r3, #8]
+ 80038b0:	2380      	movs	r3, #128	; 0x80
+ 80038b2:	055b      	lsls	r3, r3, #21
+ 80038b4:	429a      	cmp	r2, r3
+ 80038b6:	d10d      	bne.n	80038d4 <HAL_UART_Receive+0xf4>
+ 80038b8:	68fb      	ldr	r3, [r7, #12]
+ 80038ba:	691b      	ldr	r3, [r3, #16]
+ 80038bc:	2b00      	cmp	r3, #0
+ 80038be:	d104      	bne.n	80038ca <HAL_UART_Receive+0xea>
+ 80038c0:	68fb      	ldr	r3, [r7, #12]
+ 80038c2:	225c      	movs	r2, #92	; 0x5c
+ 80038c4:	217f      	movs	r1, #127	; 0x7f
+ 80038c6:	5299      	strh	r1, [r3, r2]
+ 80038c8:	e008      	b.n	80038dc <HAL_UART_Receive+0xfc>
+ 80038ca:	68fb      	ldr	r3, [r7, #12]
+ 80038cc:	225c      	movs	r2, #92	; 0x5c
+ 80038ce:	213f      	movs	r1, #63	; 0x3f
+ 80038d0:	5299      	strh	r1, [r3, r2]
+ 80038d2:	e003      	b.n	80038dc <HAL_UART_Receive+0xfc>
+ 80038d4:	68fb      	ldr	r3, [r7, #12]
+ 80038d6:	225c      	movs	r2, #92	; 0x5c
+ 80038d8:	2100      	movs	r1, #0
+ 80038da:	5299      	strh	r1, [r3, r2]
+    uhMask = huart->Mask;
+ 80038dc:	2312      	movs	r3, #18
+ 80038de:	18fb      	adds	r3, r7, r3
+ 80038e0:	68fa      	ldr	r2, [r7, #12]
+ 80038e2:	215c      	movs	r1, #92	; 0x5c
+ 80038e4:	5a52      	ldrh	r2, [r2, r1]
+ 80038e6:	801a      	strh	r2, [r3, #0]
+
+    /* In case of 9bits/No Parity transfer, pRxData needs to be handled as a uint16_t pointer */
+    if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
+ 80038e8:	68fb      	ldr	r3, [r7, #12]
+ 80038ea:	689a      	ldr	r2, [r3, #8]
+ 80038ec:	2380      	movs	r3, #128	; 0x80
+ 80038ee:	015b      	lsls	r3, r3, #5
+ 80038f0:	429a      	cmp	r2, r3
+ 80038f2:	d108      	bne.n	8003906 <HAL_UART_Receive+0x126>
+ 80038f4:	68fb      	ldr	r3, [r7, #12]
+ 80038f6:	691b      	ldr	r3, [r3, #16]
+ 80038f8:	2b00      	cmp	r3, #0
+ 80038fa:	d104      	bne.n	8003906 <HAL_UART_Receive+0x126>
     {
-      /* Check that USART RTOEN bit is set */
-      if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
- 8003ac6:	68fb      	ldr	r3, [r7, #12]
- 8003ac8:	681b      	ldr	r3, [r3, #0]
- 8003aca:	685a      	ldr	r2, [r3, #4]
- 8003acc:	2380      	movs	r3, #128	; 0x80
- 8003ace:	041b      	lsls	r3, r3, #16
- 8003ad0:	4013      	ands	r3, r2
- 8003ad2:	d019      	beq.n	8003b08 <HAL_UART_Receive_IT+0x9c>
- */
-__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8003ad4:	f3ef 8310 	mrs	r3, PRIMASK
- 8003ad8:	613b      	str	r3, [r7, #16]
-  return(result);
- 8003ada:	693b      	ldr	r3, [r7, #16]
-      {
-        /* Enable the UART Receiver Timeout Interrupt */
-        ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
- 8003adc:	61fb      	str	r3, [r7, #28]
- 8003ade:	2301      	movs	r3, #1
- 8003ae0:	617b      	str	r3, [r7, #20]
-  \details Assigns the given value to the Priority Mask Register.
-  \param [in]    priMask  Priority Mask
- */
-__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003ae2:	697b      	ldr	r3, [r7, #20]
- 8003ae4:	f383 8810 	msr	PRIMASK, r3
-}
- 8003ae8:	46c0      	nop			; (mov r8, r8)
- 8003aea:	68fb      	ldr	r3, [r7, #12]
- 8003aec:	681b      	ldr	r3, [r3, #0]
- 8003aee:	681a      	ldr	r2, [r3, #0]
- 8003af0:	68fb      	ldr	r3, [r7, #12]
- 8003af2:	681b      	ldr	r3, [r3, #0]
- 8003af4:	2180      	movs	r1, #128	; 0x80
- 8003af6:	04c9      	lsls	r1, r1, #19
- 8003af8:	430a      	orrs	r2, r1
- 8003afa:	601a      	str	r2, [r3, #0]
- 8003afc:	69fb      	ldr	r3, [r7, #28]
- 8003afe:	61bb      	str	r3, [r7, #24]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003b00:	69bb      	ldr	r3, [r7, #24]
- 8003b02:	f383 8810 	msr	PRIMASK, r3
-}
- 8003b06:	46c0      	nop			; (mov r8, r8)
-      }
+      pdata8bits  = NULL;
+ 80038fc:	2300      	movs	r3, #0
+ 80038fe:	61fb      	str	r3, [r7, #28]
+      pdata16bits = (uint16_t *) pData;
+ 8003900:	68bb      	ldr	r3, [r7, #8]
+ 8003902:	61bb      	str	r3, [r7, #24]
+ 8003904:	e003      	b.n	800390e <HAL_UART_Receive+0x12e>
+    }
+    else
+    {
+      pdata8bits  = pData;
+ 8003906:	68bb      	ldr	r3, [r7, #8]
+ 8003908:	61fb      	str	r3, [r7, #28]
+      pdata16bits = NULL;
+ 800390a:	2300      	movs	r3, #0
+ 800390c:	61bb      	str	r3, [r7, #24]
     }
 
-    return (UART_Start_Receive_IT(huart, pData, Size));
- 8003b08:	1dbb      	adds	r3, r7, #6
- 8003b0a:	881a      	ldrh	r2, [r3, #0]
- 8003b0c:	68b9      	ldr	r1, [r7, #8]
- 8003b0e:	68fb      	ldr	r3, [r7, #12]
- 8003b10:	0018      	movs	r0, r3
- 8003b12:	f000 ff51 	bl	80049b8 <UART_Start_Receive_IT>
- 8003b16:	0003      	movs	r3, r0
- 8003b18:	e000      	b.n	8003b1c <HAL_UART_Receive_IT+0xb0>
+    /* as long as data have to be received */
+    while (huart->RxXferCount > 0U)
+ 800390e:	e03a      	b.n	8003986 <HAL_UART_Receive+0x1a6>
+    {
+      if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
+ 8003910:	697a      	ldr	r2, [r7, #20]
+ 8003912:	68f8      	ldr	r0, [r7, #12]
+ 8003914:	683b      	ldr	r3, [r7, #0]
+ 8003916:	9300      	str	r3, [sp, #0]
+ 8003918:	0013      	movs	r3, r2
+ 800391a:	2200      	movs	r2, #0
+ 800391c:	2120      	movs	r1, #32
+ 800391e:	f000 fc25 	bl	800416c <UART_WaitOnFlagUntilTimeout>
+ 8003922:	1e03      	subs	r3, r0, #0
+ 8003924:	d005      	beq.n	8003932 <HAL_UART_Receive+0x152>
+      {
+        huart->RxState = HAL_UART_STATE_READY;
+ 8003926:	68fb      	ldr	r3, [r7, #12]
+ 8003928:	2280      	movs	r2, #128	; 0x80
+ 800392a:	2120      	movs	r1, #32
+ 800392c:	5099      	str	r1, [r3, r2]
+
+        return HAL_TIMEOUT;
+ 800392e:	2303      	movs	r3, #3
+ 8003930:	e036      	b.n	80039a0 <HAL_UART_Receive+0x1c0>
+      }
+      if (pdata8bits == NULL)
+ 8003932:	69fb      	ldr	r3, [r7, #28]
+ 8003934:	2b00      	cmp	r3, #0
+ 8003936:	d10e      	bne.n	8003956 <HAL_UART_Receive+0x176>
+      {
+        *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask);
+ 8003938:	68fb      	ldr	r3, [r7, #12]
+ 800393a:	681b      	ldr	r3, [r3, #0]
+ 800393c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800393e:	b29b      	uxth	r3, r3
+ 8003940:	2212      	movs	r2, #18
+ 8003942:	18ba      	adds	r2, r7, r2
+ 8003944:	8812      	ldrh	r2, [r2, #0]
+ 8003946:	4013      	ands	r3, r2
+ 8003948:	b29a      	uxth	r2, r3
+ 800394a:	69bb      	ldr	r3, [r7, #24]
+ 800394c:	801a      	strh	r2, [r3, #0]
+        pdata16bits++;
+ 800394e:	69bb      	ldr	r3, [r7, #24]
+ 8003950:	3302      	adds	r3, #2
+ 8003952:	61bb      	str	r3, [r7, #24]
+ 8003954:	e00e      	b.n	8003974 <HAL_UART_Receive+0x194>
+      }
+      else
+      {
+        *pdata8bits = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
+ 8003956:	68fb      	ldr	r3, [r7, #12]
+ 8003958:	681b      	ldr	r3, [r3, #0]
+ 800395a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 800395c:	b2db      	uxtb	r3, r3
+ 800395e:	2212      	movs	r2, #18
+ 8003960:	18ba      	adds	r2, r7, r2
+ 8003962:	8812      	ldrh	r2, [r2, #0]
+ 8003964:	b2d2      	uxtb	r2, r2
+ 8003966:	4013      	ands	r3, r2
+ 8003968:	b2da      	uxtb	r2, r3
+ 800396a:	69fb      	ldr	r3, [r7, #28]
+ 800396c:	701a      	strb	r2, [r3, #0]
+        pdata8bits++;
+ 800396e:	69fb      	ldr	r3, [r7, #28]
+ 8003970:	3301      	adds	r3, #1
+ 8003972:	61fb      	str	r3, [r7, #28]
+      }
+      huart->RxXferCount--;
+ 8003974:	68fb      	ldr	r3, [r7, #12]
+ 8003976:	225a      	movs	r2, #90	; 0x5a
+ 8003978:	5a9b      	ldrh	r3, [r3, r2]
+ 800397a:	b29b      	uxth	r3, r3
+ 800397c:	3b01      	subs	r3, #1
+ 800397e:	b299      	uxth	r1, r3
+ 8003980:	68fb      	ldr	r3, [r7, #12]
+ 8003982:	225a      	movs	r2, #90	; 0x5a
+ 8003984:	5299      	strh	r1, [r3, r2]
+    while (huart->RxXferCount > 0U)
+ 8003986:	68fb      	ldr	r3, [r7, #12]
+ 8003988:	225a      	movs	r2, #90	; 0x5a
+ 800398a:	5a9b      	ldrh	r3, [r3, r2]
+ 800398c:	b29b      	uxth	r3, r3
+ 800398e:	2b00      	cmp	r3, #0
+ 8003990:	d1be      	bne.n	8003910 <HAL_UART_Receive+0x130>
+    }
+
+    /* At end of Rx process, restore huart->RxState to Ready */
+    huart->RxState = HAL_UART_STATE_READY;
+ 8003992:	68fb      	ldr	r3, [r7, #12]
+ 8003994:	2280      	movs	r2, #128	; 0x80
+ 8003996:	2120      	movs	r1, #32
+ 8003998:	5099      	str	r1, [r3, r2]
+
+    return HAL_OK;
+ 800399a:	2300      	movs	r3, #0
+ 800399c:	e000      	b.n	80039a0 <HAL_UART_Receive+0x1c0>
   }
   else
   {
     return HAL_BUSY;
- 8003b1a:	2302      	movs	r3, #2
+ 800399e:	2302      	movs	r3, #2
   }
 }
- 8003b1c:	0018      	movs	r0, r3
- 8003b1e:	46bd      	mov	sp, r7
- 8003b20:	b008      	add	sp, #32
- 8003b22:	bd80      	pop	{r7, pc}
- 8003b24:	40004800 	.word	0x40004800
+ 80039a0:	0018      	movs	r0, r3
+ 80039a2:	46bd      	mov	sp, r7
+ 80039a4:	b008      	add	sp, #32
+ 80039a6:	bd80      	pop	{r7, pc}
+ 80039a8:	000001ff 	.word	0x000001ff
 
-08003b28 <HAL_UART_IRQHandler>:
-  * @brief Handle UART interrupt request.
-  * @param huart UART handle.
-  * @retval None
-  */
-void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
-{
- 8003b28:	b590      	push	{r4, r7, lr}
- 8003b2a:	b0ab      	sub	sp, #172	; 0xac
- 8003b2c:	af00      	add	r7, sp, #0
- 8003b2e:	6078      	str	r0, [r7, #4]
-  uint32_t isrflags   = READ_REG(huart->Instance->ISR);
- 8003b30:	687b      	ldr	r3, [r7, #4]
- 8003b32:	681b      	ldr	r3, [r3, #0]
- 8003b34:	69db      	ldr	r3, [r3, #28]
- 8003b36:	22a4      	movs	r2, #164	; 0xa4
- 8003b38:	18b9      	adds	r1, r7, r2
- 8003b3a:	600b      	str	r3, [r1, #0]
-  uint32_t cr1its     = READ_REG(huart->Instance->CR1);
- 8003b3c:	687b      	ldr	r3, [r7, #4]
- 8003b3e:	681b      	ldr	r3, [r3, #0]
- 8003b40:	681b      	ldr	r3, [r3, #0]
- 8003b42:	20a0      	movs	r0, #160	; 0xa0
- 8003b44:	1839      	adds	r1, r7, r0
- 8003b46:	600b      	str	r3, [r1, #0]
-  uint32_t cr3its     = READ_REG(huart->Instance->CR3);
- 8003b48:	687b      	ldr	r3, [r7, #4]
- 8003b4a:	681b      	ldr	r3, [r3, #0]
- 8003b4c:	689b      	ldr	r3, [r3, #8]
- 8003b4e:	219c      	movs	r1, #156	; 0x9c
- 8003b50:	1879      	adds	r1, r7, r1
- 8003b52:	600b      	str	r3, [r1, #0]
-
-  uint32_t errorflags;
-  uint32_t errorcode;
-
-  /* If no error occurs */
-  errorflags = (isrflags & (uint32_t)(USART_ISR_PE | USART_ISR_FE | USART_ISR_ORE | USART_ISR_NE | USART_ISR_RTOF));
- 8003b54:	0011      	movs	r1, r2
- 8003b56:	18bb      	adds	r3, r7, r2
- 8003b58:	681b      	ldr	r3, [r3, #0]
- 8003b5a:	4a99      	ldr	r2, [pc, #612]	; (8003dc0 <HAL_UART_IRQHandler+0x298>)
- 8003b5c:	4013      	ands	r3, r2
- 8003b5e:	2298      	movs	r2, #152	; 0x98
- 8003b60:	18bc      	adds	r4, r7, r2
- 8003b62:	6023      	str	r3, [r4, #0]
-  if (errorflags == 0U)
- 8003b64:	18bb      	adds	r3, r7, r2
- 8003b66:	681b      	ldr	r3, [r3, #0]
- 8003b68:	2b00      	cmp	r3, #0
- 8003b6a:	d114      	bne.n	8003b96 <HAL_UART_IRQHandler+0x6e>
-  {
-    /* UART in mode Receiver ---------------------------------------------------*/
-    if (((isrflags & USART_ISR_RXNE) != 0U)
- 8003b6c:	187b      	adds	r3, r7, r1
- 8003b6e:	681b      	ldr	r3, [r3, #0]
- 8003b70:	2220      	movs	r2, #32
- 8003b72:	4013      	ands	r3, r2
- 8003b74:	d00f      	beq.n	8003b96 <HAL_UART_IRQHandler+0x6e>
-        && ((cr1its & USART_CR1_RXNEIE) != 0U))
- 8003b76:	183b      	adds	r3, r7, r0
- 8003b78:	681b      	ldr	r3, [r3, #0]
- 8003b7a:	2220      	movs	r2, #32
- 8003b7c:	4013      	ands	r3, r2
- 8003b7e:	d00a      	beq.n	8003b96 <HAL_UART_IRQHandler+0x6e>
-    {
-      if (huart->RxISR != NULL)
- 8003b80:	687b      	ldr	r3, [r7, #4]
- 8003b82:	6e9b      	ldr	r3, [r3, #104]	; 0x68
- 8003b84:	2b00      	cmp	r3, #0
- 8003b86:	d100      	bne.n	8003b8a <HAL_UART_IRQHandler+0x62>
- 8003b88:	e2a0      	b.n	80040cc <HAL_UART_IRQHandler+0x5a4>
-      {
-        huart->RxISR(huart);
- 8003b8a:	687b      	ldr	r3, [r7, #4]
- 8003b8c:	6e9b      	ldr	r3, [r3, #104]	; 0x68
- 8003b8e:	687a      	ldr	r2, [r7, #4]
- 8003b90:	0010      	movs	r0, r2
- 8003b92:	4798      	blx	r3
-      }
-      return;
- 8003b94:	e29a      	b.n	80040cc <HAL_UART_IRQHandler+0x5a4>
-    }
-  }
-
-  /* If some errors occur */
-  if ((errorflags != 0U)
- 8003b96:	2398      	movs	r3, #152	; 0x98
- 8003b98:	18fb      	adds	r3, r7, r3
- 8003b9a:	681b      	ldr	r3, [r3, #0]
- 8003b9c:	2b00      	cmp	r3, #0
- 8003b9e:	d100      	bne.n	8003ba2 <HAL_UART_IRQHandler+0x7a>
- 8003ba0:	e114      	b.n	8003dcc <HAL_UART_IRQHandler+0x2a4>
-      && (((cr3its & USART_CR3_EIE) != 0U)
- 8003ba2:	239c      	movs	r3, #156	; 0x9c
- 8003ba4:	18fb      	adds	r3, r7, r3
- 8003ba6:	681b      	ldr	r3, [r3, #0]
- 8003ba8:	2201      	movs	r2, #1
- 8003baa:	4013      	ands	r3, r2
- 8003bac:	d106      	bne.n	8003bbc <HAL_UART_IRQHandler+0x94>
-          || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U)))
- 8003bae:	23a0      	movs	r3, #160	; 0xa0
- 8003bb0:	18fb      	adds	r3, r7, r3
- 8003bb2:	681b      	ldr	r3, [r3, #0]
- 8003bb4:	4a83      	ldr	r2, [pc, #524]	; (8003dc4 <HAL_UART_IRQHandler+0x29c>)
- 8003bb6:	4013      	ands	r3, r2
- 8003bb8:	d100      	bne.n	8003bbc <HAL_UART_IRQHandler+0x94>
- 8003bba:	e107      	b.n	8003dcc <HAL_UART_IRQHandler+0x2a4>
-  {
-    /* UART parity error interrupt occurred -------------------------------------*/
-    if (((isrflags & USART_ISR_PE) != 0U) && ((cr1its & USART_CR1_PEIE) != 0U))
- 8003bbc:	23a4      	movs	r3, #164	; 0xa4
- 8003bbe:	18fb      	adds	r3, r7, r3
- 8003bc0:	681b      	ldr	r3, [r3, #0]
- 8003bc2:	2201      	movs	r2, #1
- 8003bc4:	4013      	ands	r3, r2
- 8003bc6:	d012      	beq.n	8003bee <HAL_UART_IRQHandler+0xc6>
- 8003bc8:	23a0      	movs	r3, #160	; 0xa0
- 8003bca:	18fb      	adds	r3, r7, r3
- 8003bcc:	681a      	ldr	r2, [r3, #0]
- 8003bce:	2380      	movs	r3, #128	; 0x80
- 8003bd0:	005b      	lsls	r3, r3, #1
- 8003bd2:	4013      	ands	r3, r2
- 8003bd4:	d00b      	beq.n	8003bee <HAL_UART_IRQHandler+0xc6>
-    {
-      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_PEF);
- 8003bd6:	687b      	ldr	r3, [r7, #4]
- 8003bd8:	681b      	ldr	r3, [r3, #0]
- 8003bda:	2201      	movs	r2, #1
- 8003bdc:	621a      	str	r2, [r3, #32]
-
-      huart->ErrorCode |= HAL_UART_ERROR_PE;
- 8003bde:	687b      	ldr	r3, [r7, #4]
- 8003be0:	2284      	movs	r2, #132	; 0x84
- 8003be2:	589b      	ldr	r3, [r3, r2]
- 8003be4:	2201      	movs	r2, #1
- 8003be6:	431a      	orrs	r2, r3
- 8003be8:	687b      	ldr	r3, [r7, #4]
- 8003bea:	2184      	movs	r1, #132	; 0x84
- 8003bec:	505a      	str	r2, [r3, r1]
-    }
-
-    /* UART frame error interrupt occurred --------------------------------------*/
-    if (((isrflags & USART_ISR_FE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
- 8003bee:	23a4      	movs	r3, #164	; 0xa4
- 8003bf0:	18fb      	adds	r3, r7, r3
- 8003bf2:	681b      	ldr	r3, [r3, #0]
- 8003bf4:	2202      	movs	r2, #2
- 8003bf6:	4013      	ands	r3, r2
- 8003bf8:	d011      	beq.n	8003c1e <HAL_UART_IRQHandler+0xf6>
- 8003bfa:	239c      	movs	r3, #156	; 0x9c
- 8003bfc:	18fb      	adds	r3, r7, r3
- 8003bfe:	681b      	ldr	r3, [r3, #0]
- 8003c00:	2201      	movs	r2, #1
- 8003c02:	4013      	ands	r3, r2
- 8003c04:	d00b      	beq.n	8003c1e <HAL_UART_IRQHandler+0xf6>
-    {
-      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_FEF);
- 8003c06:	687b      	ldr	r3, [r7, #4]
- 8003c08:	681b      	ldr	r3, [r3, #0]
- 8003c0a:	2202      	movs	r2, #2
- 8003c0c:	621a      	str	r2, [r3, #32]
-
-      huart->ErrorCode |= HAL_UART_ERROR_FE;
- 8003c0e:	687b      	ldr	r3, [r7, #4]
- 8003c10:	2284      	movs	r2, #132	; 0x84
- 8003c12:	589b      	ldr	r3, [r3, r2]
- 8003c14:	2204      	movs	r2, #4
- 8003c16:	431a      	orrs	r2, r3
- 8003c18:	687b      	ldr	r3, [r7, #4]
- 8003c1a:	2184      	movs	r1, #132	; 0x84
- 8003c1c:	505a      	str	r2, [r3, r1]
-    }
-
-    /* UART noise error interrupt occurred --------------------------------------*/
-    if (((isrflags & USART_ISR_NE) != 0U) && ((cr3its & USART_CR3_EIE) != 0U))
- 8003c1e:	23a4      	movs	r3, #164	; 0xa4
- 8003c20:	18fb      	adds	r3, r7, r3
- 8003c22:	681b      	ldr	r3, [r3, #0]
- 8003c24:	2204      	movs	r2, #4
- 8003c26:	4013      	ands	r3, r2
- 8003c28:	d011      	beq.n	8003c4e <HAL_UART_IRQHandler+0x126>
- 8003c2a:	239c      	movs	r3, #156	; 0x9c
- 8003c2c:	18fb      	adds	r3, r7, r3
- 8003c2e:	681b      	ldr	r3, [r3, #0]
- 8003c30:	2201      	movs	r2, #1
- 8003c32:	4013      	ands	r3, r2
- 8003c34:	d00b      	beq.n	8003c4e <HAL_UART_IRQHandler+0x126>
-    {
-      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_NEF);
- 8003c36:	687b      	ldr	r3, [r7, #4]
- 8003c38:	681b      	ldr	r3, [r3, #0]
- 8003c3a:	2204      	movs	r2, #4
- 8003c3c:	621a      	str	r2, [r3, #32]
-
-      huart->ErrorCode |= HAL_UART_ERROR_NE;
- 8003c3e:	687b      	ldr	r3, [r7, #4]
- 8003c40:	2284      	movs	r2, #132	; 0x84
- 8003c42:	589b      	ldr	r3, [r3, r2]
- 8003c44:	2202      	movs	r2, #2
- 8003c46:	431a      	orrs	r2, r3
- 8003c48:	687b      	ldr	r3, [r7, #4]
- 8003c4a:	2184      	movs	r1, #132	; 0x84
- 8003c4c:	505a      	str	r2, [r3, r1]
-    }
-
-    /* UART Over-Run interrupt occurred -----------------------------------------*/
-    if (((isrflags & USART_ISR_ORE) != 0U)
- 8003c4e:	23a4      	movs	r3, #164	; 0xa4
- 8003c50:	18fb      	adds	r3, r7, r3
- 8003c52:	681b      	ldr	r3, [r3, #0]
- 8003c54:	2208      	movs	r2, #8
- 8003c56:	4013      	ands	r3, r2
- 8003c58:	d017      	beq.n	8003c8a <HAL_UART_IRQHandler+0x162>
-        && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
- 8003c5a:	23a0      	movs	r3, #160	; 0xa0
- 8003c5c:	18fb      	adds	r3, r7, r3
- 8003c5e:	681b      	ldr	r3, [r3, #0]
- 8003c60:	2220      	movs	r2, #32
- 8003c62:	4013      	ands	r3, r2
- 8003c64:	d105      	bne.n	8003c72 <HAL_UART_IRQHandler+0x14a>
-            ((cr3its & USART_CR3_EIE) != 0U)))
- 8003c66:	239c      	movs	r3, #156	; 0x9c
- 8003c68:	18fb      	adds	r3, r7, r3
- 8003c6a:	681b      	ldr	r3, [r3, #0]
- 8003c6c:	2201      	movs	r2, #1
- 8003c6e:	4013      	ands	r3, r2
-        && (((cr1its & USART_CR1_RXNEIE) != 0U) ||
- 8003c70:	d00b      	beq.n	8003c8a <HAL_UART_IRQHandler+0x162>
-    {
-      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
- 8003c72:	687b      	ldr	r3, [r7, #4]
- 8003c74:	681b      	ldr	r3, [r3, #0]
- 8003c76:	2208      	movs	r2, #8
- 8003c78:	621a      	str	r2, [r3, #32]
-
-      huart->ErrorCode |= HAL_UART_ERROR_ORE;
- 8003c7a:	687b      	ldr	r3, [r7, #4]
- 8003c7c:	2284      	movs	r2, #132	; 0x84
- 8003c7e:	589b      	ldr	r3, [r3, r2]
- 8003c80:	2208      	movs	r2, #8
- 8003c82:	431a      	orrs	r2, r3
- 8003c84:	687b      	ldr	r3, [r7, #4]
- 8003c86:	2184      	movs	r1, #132	; 0x84
- 8003c88:	505a      	str	r2, [r3, r1]
-    }
-
-    /* UART Receiver Timeout interrupt occurred ---------------------------------*/
-    if (((isrflags & USART_ISR_RTOF) != 0U) && ((cr1its & USART_CR1_RTOIE) != 0U))
- 8003c8a:	23a4      	movs	r3, #164	; 0xa4
- 8003c8c:	18fb      	adds	r3, r7, r3
- 8003c8e:	681a      	ldr	r2, [r3, #0]
- 8003c90:	2380      	movs	r3, #128	; 0x80
- 8003c92:	011b      	lsls	r3, r3, #4
- 8003c94:	4013      	ands	r3, r2
- 8003c96:	d013      	beq.n	8003cc0 <HAL_UART_IRQHandler+0x198>
- 8003c98:	23a0      	movs	r3, #160	; 0xa0
- 8003c9a:	18fb      	adds	r3, r7, r3
- 8003c9c:	681a      	ldr	r2, [r3, #0]
- 8003c9e:	2380      	movs	r3, #128	; 0x80
- 8003ca0:	04db      	lsls	r3, r3, #19
- 8003ca2:	4013      	ands	r3, r2
- 8003ca4:	d00c      	beq.n	8003cc0 <HAL_UART_IRQHandler+0x198>
-    {
-      __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
- 8003ca6:	687b      	ldr	r3, [r7, #4]
- 8003ca8:	681b      	ldr	r3, [r3, #0]
- 8003caa:	2280      	movs	r2, #128	; 0x80
- 8003cac:	0112      	lsls	r2, r2, #4
- 8003cae:	621a      	str	r2, [r3, #32]
-
-      huart->ErrorCode |= HAL_UART_ERROR_RTO;
- 8003cb0:	687b      	ldr	r3, [r7, #4]
- 8003cb2:	2284      	movs	r2, #132	; 0x84
- 8003cb4:	589b      	ldr	r3, [r3, r2]
- 8003cb6:	2220      	movs	r2, #32
- 8003cb8:	431a      	orrs	r2, r3
- 8003cba:	687b      	ldr	r3, [r7, #4]
- 8003cbc:	2184      	movs	r1, #132	; 0x84
- 8003cbe:	505a      	str	r2, [r3, r1]
-    }
-
-    /* Call UART Error Call back function if need be ----------------------------*/
-    if (huart->ErrorCode != HAL_UART_ERROR_NONE)
- 8003cc0:	687b      	ldr	r3, [r7, #4]
- 8003cc2:	2284      	movs	r2, #132	; 0x84
- 8003cc4:	589b      	ldr	r3, [r3, r2]
- 8003cc6:	2b00      	cmp	r3, #0
- 8003cc8:	d100      	bne.n	8003ccc <HAL_UART_IRQHandler+0x1a4>
- 8003cca:	e201      	b.n	80040d0 <HAL_UART_IRQHandler+0x5a8>
-    {
-      /* UART in mode Receiver --------------------------------------------------*/
-      if (((isrflags & USART_ISR_RXNE) != 0U)
- 8003ccc:	23a4      	movs	r3, #164	; 0xa4
- 8003cce:	18fb      	adds	r3, r7, r3
- 8003cd0:	681b      	ldr	r3, [r3, #0]
- 8003cd2:	2220      	movs	r2, #32
- 8003cd4:	4013      	ands	r3, r2
- 8003cd6:	d00e      	beq.n	8003cf6 <HAL_UART_IRQHandler+0x1ce>
-          && ((cr1its & USART_CR1_RXNEIE) != 0U))
- 8003cd8:	23a0      	movs	r3, #160	; 0xa0
- 8003cda:	18fb      	adds	r3, r7, r3
- 8003cdc:	681b      	ldr	r3, [r3, #0]
- 8003cde:	2220      	movs	r2, #32
- 8003ce0:	4013      	ands	r3, r2
- 8003ce2:	d008      	beq.n	8003cf6 <HAL_UART_IRQHandler+0x1ce>
-      {
-        if (huart->RxISR != NULL)
- 8003ce4:	687b      	ldr	r3, [r7, #4]
- 8003ce6:	6e9b      	ldr	r3, [r3, #104]	; 0x68
- 8003ce8:	2b00      	cmp	r3, #0
- 8003cea:	d004      	beq.n	8003cf6 <HAL_UART_IRQHandler+0x1ce>
-        {
-          huart->RxISR(huart);
- 8003cec:	687b      	ldr	r3, [r7, #4]
- 8003cee:	6e9b      	ldr	r3, [r3, #104]	; 0x68
- 8003cf0:	687a      	ldr	r2, [r7, #4]
- 8003cf2:	0010      	movs	r0, r2
- 8003cf4:	4798      	blx	r3
-      /* If Error is to be considered as blocking :
-          - Receiver Timeout error in Reception
-          - Overrun error in Reception
-          - any error occurs in DMA mode reception
-      */
-      errorcode = huart->ErrorCode;
- 8003cf6:	687b      	ldr	r3, [r7, #4]
- 8003cf8:	2284      	movs	r2, #132	; 0x84
- 8003cfa:	589b      	ldr	r3, [r3, r2]
- 8003cfc:	2194      	movs	r1, #148	; 0x94
- 8003cfe:	187a      	adds	r2, r7, r1
- 8003d00:	6013      	str	r3, [r2, #0]
-      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
- 8003d02:	687b      	ldr	r3, [r7, #4]
- 8003d04:	681b      	ldr	r3, [r3, #0]
- 8003d06:	689b      	ldr	r3, [r3, #8]
- 8003d08:	2240      	movs	r2, #64	; 0x40
- 8003d0a:	4013      	ands	r3, r2
- 8003d0c:	2b40      	cmp	r3, #64	; 0x40
- 8003d0e:	d004      	beq.n	8003d1a <HAL_UART_IRQHandler+0x1f2>
-          ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
- 8003d10:	187b      	adds	r3, r7, r1
- 8003d12:	681b      	ldr	r3, [r3, #0]
- 8003d14:	2228      	movs	r2, #40	; 0x28
- 8003d16:	4013      	ands	r3, r2
-      if ((HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR)) ||
- 8003d18:	d047      	beq.n	8003daa <HAL_UART_IRQHandler+0x282>
-      {
-        /* Blocking error : transfer is aborted
-           Set the UART state ready to be able to start again the process,
-           Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
-        UART_EndRxTransfer(huart);
- 8003d1a:	687b      	ldr	r3, [r7, #4]
- 8003d1c:	0018      	movs	r0, r3
- 8003d1e:	f000 ff15 	bl	8004b4c <UART_EndRxTransfer>
-
-        /* Abort the UART DMA Rx channel if enabled */
-        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 8003d22:	687b      	ldr	r3, [r7, #4]
- 8003d24:	681b      	ldr	r3, [r3, #0]
- 8003d26:	689b      	ldr	r3, [r3, #8]
- 8003d28:	2240      	movs	r2, #64	; 0x40
- 8003d2a:	4013      	ands	r3, r2
- 8003d2c:	2b40      	cmp	r3, #64	; 0x40
- 8003d2e:	d137      	bne.n	8003da0 <HAL_UART_IRQHandler+0x278>
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8003d30:	f3ef 8310 	mrs	r3, PRIMASK
- 8003d34:	663b      	str	r3, [r7, #96]	; 0x60
-  return(result);
- 8003d36:	6e3b      	ldr	r3, [r7, #96]	; 0x60
-        {
-          /* Disable the UART DMA Rx request if enabled */
-          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
- 8003d38:	2090      	movs	r0, #144	; 0x90
- 8003d3a:	183a      	adds	r2, r7, r0
- 8003d3c:	6013      	str	r3, [r2, #0]
- 8003d3e:	2301      	movs	r3, #1
- 8003d40:	667b      	str	r3, [r7, #100]	; 0x64
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003d42:	6e7b      	ldr	r3, [r7, #100]	; 0x64
- 8003d44:	f383 8810 	msr	PRIMASK, r3
-}
- 8003d48:	46c0      	nop			; (mov r8, r8)
- 8003d4a:	687b      	ldr	r3, [r7, #4]
- 8003d4c:	681b      	ldr	r3, [r3, #0]
- 8003d4e:	689a      	ldr	r2, [r3, #8]
- 8003d50:	687b      	ldr	r3, [r7, #4]
- 8003d52:	681b      	ldr	r3, [r3, #0]
- 8003d54:	2140      	movs	r1, #64	; 0x40
- 8003d56:	438a      	bics	r2, r1
- 8003d58:	609a      	str	r2, [r3, #8]
- 8003d5a:	183b      	adds	r3, r7, r0
- 8003d5c:	681b      	ldr	r3, [r3, #0]
- 8003d5e:	66bb      	str	r3, [r7, #104]	; 0x68
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003d60:	6ebb      	ldr	r3, [r7, #104]	; 0x68
- 8003d62:	f383 8810 	msr	PRIMASK, r3
-}
- 8003d66:	46c0      	nop			; (mov r8, r8)
-
-          /* Abort the UART DMA Rx channel */
-          if (huart->hdmarx != NULL)
- 8003d68:	687b      	ldr	r3, [r7, #4]
- 8003d6a:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 8003d6c:	2b00      	cmp	r3, #0
- 8003d6e:	d012      	beq.n	8003d96 <HAL_UART_IRQHandler+0x26e>
-          {
-            /* Set the UART DMA Abort callback :
-               will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
-            huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
- 8003d70:	687b      	ldr	r3, [r7, #4]
- 8003d72:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 8003d74:	4a14      	ldr	r2, [pc, #80]	; (8003dc8 <HAL_UART_IRQHandler+0x2a0>)
- 8003d76:	639a      	str	r2, [r3, #56]	; 0x38
-
-            /* Abort DMA RX */
-            if (HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
- 8003d78:	687b      	ldr	r3, [r7, #4]
- 8003d7a:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 8003d7c:	0018      	movs	r0, r3
- 8003d7e:	f7fd ff69 	bl	8001c54 <HAL_DMA_Abort_IT>
- 8003d82:	1e03      	subs	r3, r0, #0
- 8003d84:	d01a      	beq.n	8003dbc <HAL_UART_IRQHandler+0x294>
-            {
-              /* Call Directly huart->hdmarx->XferAbortCallback function in case of error */
-              huart->hdmarx->XferAbortCallback(huart->hdmarx);
- 8003d86:	687b      	ldr	r3, [r7, #4]
- 8003d88:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 8003d8a:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 8003d8c:	687b      	ldr	r3, [r7, #4]
- 8003d8e:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 8003d90:	0018      	movs	r0, r3
- 8003d92:	4790      	blx	r2
-        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 8003d94:	e012      	b.n	8003dbc <HAL_UART_IRQHandler+0x294>
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-            /*Call registered error callback*/
-            huart->ErrorCallback(huart);
-#else
-            /*Call legacy weak error callback*/
-            HAL_UART_ErrorCallback(huart);
- 8003d96:	687b      	ldr	r3, [r7, #4]
- 8003d98:	0018      	movs	r0, r3
- 8003d9a:	f000 f9af 	bl	80040fc <HAL_UART_ErrorCallback>
-        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 8003d9e:	e00d      	b.n	8003dbc <HAL_UART_IRQHandler+0x294>
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-          /*Call registered error callback*/
-          huart->ErrorCallback(huart);
-#else
-          /*Call legacy weak error callback*/
-          HAL_UART_ErrorCallback(huart);
- 8003da0:	687b      	ldr	r3, [r7, #4]
- 8003da2:	0018      	movs	r0, r3
- 8003da4:	f000 f9aa 	bl	80040fc <HAL_UART_ErrorCallback>
-        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 8003da8:	e008      	b.n	8003dbc <HAL_UART_IRQHandler+0x294>
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-        /*Call registered error callback*/
-        huart->ErrorCallback(huart);
-#else
-        /*Call legacy weak error callback*/
-        HAL_UART_ErrorCallback(huart);
- 8003daa:	687b      	ldr	r3, [r7, #4]
- 8003dac:	0018      	movs	r0, r3
- 8003dae:	f000 f9a5 	bl	80040fc <HAL_UART_ErrorCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-        huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8003db2:	687b      	ldr	r3, [r7, #4]
- 8003db4:	2284      	movs	r2, #132	; 0x84
- 8003db6:	2100      	movs	r1, #0
- 8003db8:	5099      	str	r1, [r3, r2]
-      }
-    }
-    return;
- 8003dba:	e189      	b.n	80040d0 <HAL_UART_IRQHandler+0x5a8>
-        if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 8003dbc:	46c0      	nop			; (mov r8, r8)
-    return;
- 8003dbe:	e187      	b.n	80040d0 <HAL_UART_IRQHandler+0x5a8>
- 8003dc0:	0000080f 	.word	0x0000080f
- 8003dc4:	04000120 	.word	0x04000120
- 8003dc8:	08004c15 	.word	0x08004c15
-
-  } /* End if some error occurs */
-
-  /* Check current reception Mode :
-     If Reception till IDLE event has been selected : */
-  if ((huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- 8003dcc:	687b      	ldr	r3, [r7, #4]
- 8003dce:	6e1b      	ldr	r3, [r3, #96]	; 0x60
- 8003dd0:	2b01      	cmp	r3, #1
- 8003dd2:	d000      	beq.n	8003dd6 <HAL_UART_IRQHandler+0x2ae>
- 8003dd4:	e13b      	b.n	800404e <HAL_UART_IRQHandler+0x526>
-      && ((isrflags & USART_ISR_IDLE) != 0U)
- 8003dd6:	23a4      	movs	r3, #164	; 0xa4
- 8003dd8:	18fb      	adds	r3, r7, r3
- 8003dda:	681b      	ldr	r3, [r3, #0]
- 8003ddc:	2210      	movs	r2, #16
- 8003dde:	4013      	ands	r3, r2
- 8003de0:	d100      	bne.n	8003de4 <HAL_UART_IRQHandler+0x2bc>
- 8003de2:	e134      	b.n	800404e <HAL_UART_IRQHandler+0x526>
-      && ((cr1its & USART_ISR_IDLE) != 0U))
- 8003de4:	23a0      	movs	r3, #160	; 0xa0
- 8003de6:	18fb      	adds	r3, r7, r3
- 8003de8:	681b      	ldr	r3, [r3, #0]
- 8003dea:	2210      	movs	r2, #16
- 8003dec:	4013      	ands	r3, r2
- 8003dee:	d100      	bne.n	8003df2 <HAL_UART_IRQHandler+0x2ca>
- 8003df0:	e12d      	b.n	800404e <HAL_UART_IRQHandler+0x526>
-  {
-    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
- 8003df2:	687b      	ldr	r3, [r7, #4]
- 8003df4:	681b      	ldr	r3, [r3, #0]
- 8003df6:	2210      	movs	r2, #16
- 8003df8:	621a      	str	r2, [r3, #32]
-
-    /* Check if DMA mode is enabled in UART */
-    if (HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
- 8003dfa:	687b      	ldr	r3, [r7, #4]
- 8003dfc:	681b      	ldr	r3, [r3, #0]
- 8003dfe:	689b      	ldr	r3, [r3, #8]
- 8003e00:	2240      	movs	r2, #64	; 0x40
- 8003e02:	4013      	ands	r3, r2
- 8003e04:	2b40      	cmp	r3, #64	; 0x40
- 8003e06:	d000      	beq.n	8003e0a <HAL_UART_IRQHandler+0x2e2>
- 8003e08:	e0a1      	b.n	8003f4e <HAL_UART_IRQHandler+0x426>
-    {
-      /* DMA mode enabled */
-      /* Check received length : If all expected data are received, do nothing,
-         (DMA cplt callback will be called).
-         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
-      uint16_t nb_remaining_rx_data = (uint16_t) __HAL_DMA_GET_COUNTER(huart->hdmarx);
- 8003e0a:	687b      	ldr	r3, [r7, #4]
- 8003e0c:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 8003e0e:	681b      	ldr	r3, [r3, #0]
- 8003e10:	685a      	ldr	r2, [r3, #4]
- 8003e12:	217e      	movs	r1, #126	; 0x7e
- 8003e14:	187b      	adds	r3, r7, r1
- 8003e16:	801a      	strh	r2, [r3, #0]
-      if ((nb_remaining_rx_data > 0U)
- 8003e18:	187b      	adds	r3, r7, r1
- 8003e1a:	881b      	ldrh	r3, [r3, #0]
- 8003e1c:	2b00      	cmp	r3, #0
- 8003e1e:	d100      	bne.n	8003e22 <HAL_UART_IRQHandler+0x2fa>
- 8003e20:	e158      	b.n	80040d4 <HAL_UART_IRQHandler+0x5ac>
-          && (nb_remaining_rx_data < huart->RxXferSize))
- 8003e22:	687b      	ldr	r3, [r7, #4]
- 8003e24:	2258      	movs	r2, #88	; 0x58
- 8003e26:	5a9b      	ldrh	r3, [r3, r2]
- 8003e28:	187a      	adds	r2, r7, r1
- 8003e2a:	8812      	ldrh	r2, [r2, #0]
- 8003e2c:	429a      	cmp	r2, r3
- 8003e2e:	d300      	bcc.n	8003e32 <HAL_UART_IRQHandler+0x30a>
- 8003e30:	e150      	b.n	80040d4 <HAL_UART_IRQHandler+0x5ac>
-      {
-        /* Reception is not complete */
-        huart->RxXferCount = nb_remaining_rx_data;
- 8003e32:	687b      	ldr	r3, [r7, #4]
- 8003e34:	187a      	adds	r2, r7, r1
- 8003e36:	215a      	movs	r1, #90	; 0x5a
- 8003e38:	8812      	ldrh	r2, [r2, #0]
- 8003e3a:	525a      	strh	r2, [r3, r1]
-
-        /* In Normal mode, end DMA xfer and HAL UART Rx process*/
-        if (HAL_IS_BIT_CLR(huart->hdmarx->Instance->CCR, DMA_CCR_CIRC))
- 8003e3c:	687b      	ldr	r3, [r7, #4]
- 8003e3e:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 8003e40:	681b      	ldr	r3, [r3, #0]
- 8003e42:	681b      	ldr	r3, [r3, #0]
- 8003e44:	2220      	movs	r2, #32
- 8003e46:	4013      	ands	r3, r2
- 8003e48:	d16f      	bne.n	8003f2a <HAL_UART_IRQHandler+0x402>
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8003e4a:	f3ef 8310 	mrs	r3, PRIMASK
- 8003e4e:	633b      	str	r3, [r7, #48]	; 0x30
-  return(result);
- 8003e50:	6b3b      	ldr	r3, [r7, #48]	; 0x30
-        {
-          /* Disable PE and ERR (Frame error, noise error, overrun error) interrupts */
-          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
- 8003e52:	67bb      	str	r3, [r7, #120]	; 0x78
- 8003e54:	2301      	movs	r3, #1
- 8003e56:	637b      	str	r3, [r7, #52]	; 0x34
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003e58:	6b7b      	ldr	r3, [r7, #52]	; 0x34
- 8003e5a:	f383 8810 	msr	PRIMASK, r3
-}
- 8003e5e:	46c0      	nop			; (mov r8, r8)
- 8003e60:	687b      	ldr	r3, [r7, #4]
- 8003e62:	681b      	ldr	r3, [r3, #0]
- 8003e64:	681a      	ldr	r2, [r3, #0]
- 8003e66:	687b      	ldr	r3, [r7, #4]
- 8003e68:	681b      	ldr	r3, [r3, #0]
- 8003e6a:	499e      	ldr	r1, [pc, #632]	; (80040e4 <HAL_UART_IRQHandler+0x5bc>)
- 8003e6c:	400a      	ands	r2, r1
- 8003e6e:	601a      	str	r2, [r3, #0]
- 8003e70:	6fbb      	ldr	r3, [r7, #120]	; 0x78
- 8003e72:	63bb      	str	r3, [r7, #56]	; 0x38
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003e74:	6bbb      	ldr	r3, [r7, #56]	; 0x38
- 8003e76:	f383 8810 	msr	PRIMASK, r3
-}
- 8003e7a:	46c0      	nop			; (mov r8, r8)
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8003e7c:	f3ef 8310 	mrs	r3, PRIMASK
- 8003e80:	63fb      	str	r3, [r7, #60]	; 0x3c
-  return(result);
- 8003e82:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
-          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8003e84:	677b      	str	r3, [r7, #116]	; 0x74
- 8003e86:	2301      	movs	r3, #1
- 8003e88:	643b      	str	r3, [r7, #64]	; 0x40
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003e8a:	6c3b      	ldr	r3, [r7, #64]	; 0x40
- 8003e8c:	f383 8810 	msr	PRIMASK, r3
-}
- 8003e90:	46c0      	nop			; (mov r8, r8)
- 8003e92:	687b      	ldr	r3, [r7, #4]
- 8003e94:	681b      	ldr	r3, [r3, #0]
- 8003e96:	689a      	ldr	r2, [r3, #8]
- 8003e98:	687b      	ldr	r3, [r7, #4]
- 8003e9a:	681b      	ldr	r3, [r3, #0]
- 8003e9c:	2101      	movs	r1, #1
- 8003e9e:	438a      	bics	r2, r1
- 8003ea0:	609a      	str	r2, [r3, #8]
- 8003ea2:	6f7b      	ldr	r3, [r7, #116]	; 0x74
- 8003ea4:	647b      	str	r3, [r7, #68]	; 0x44
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003ea6:	6c7b      	ldr	r3, [r7, #68]	; 0x44
- 8003ea8:	f383 8810 	msr	PRIMASK, r3
-}
- 8003eac:	46c0      	nop			; (mov r8, r8)
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8003eae:	f3ef 8310 	mrs	r3, PRIMASK
- 8003eb2:	64bb      	str	r3, [r7, #72]	; 0x48
-  return(result);
- 8003eb4:	6cbb      	ldr	r3, [r7, #72]	; 0x48
-
-          /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
-             in the UART CR3 register */
-          ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
- 8003eb6:	673b      	str	r3, [r7, #112]	; 0x70
- 8003eb8:	2301      	movs	r3, #1
- 8003eba:	64fb      	str	r3, [r7, #76]	; 0x4c
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003ebc:	6cfb      	ldr	r3, [r7, #76]	; 0x4c
- 8003ebe:	f383 8810 	msr	PRIMASK, r3
-}
- 8003ec2:	46c0      	nop			; (mov r8, r8)
- 8003ec4:	687b      	ldr	r3, [r7, #4]
- 8003ec6:	681b      	ldr	r3, [r3, #0]
- 8003ec8:	689a      	ldr	r2, [r3, #8]
- 8003eca:	687b      	ldr	r3, [r7, #4]
- 8003ecc:	681b      	ldr	r3, [r3, #0]
- 8003ece:	2140      	movs	r1, #64	; 0x40
- 8003ed0:	438a      	bics	r2, r1
- 8003ed2:	609a      	str	r2, [r3, #8]
- 8003ed4:	6f3b      	ldr	r3, [r7, #112]	; 0x70
- 8003ed6:	653b      	str	r3, [r7, #80]	; 0x50
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003ed8:	6d3b      	ldr	r3, [r7, #80]	; 0x50
- 8003eda:	f383 8810 	msr	PRIMASK, r3
-}
- 8003ede:	46c0      	nop			; (mov r8, r8)
-
-          /* At end of Rx process, restore huart->RxState to Ready */
-          huart->RxState = HAL_UART_STATE_READY;
- 8003ee0:	687b      	ldr	r3, [r7, #4]
- 8003ee2:	2280      	movs	r2, #128	; 0x80
- 8003ee4:	2120      	movs	r1, #32
- 8003ee6:	5099      	str	r1, [r3, r2]
-          huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 8003ee8:	687b      	ldr	r3, [r7, #4]
- 8003eea:	2200      	movs	r2, #0
- 8003eec:	661a      	str	r2, [r3, #96]	; 0x60
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8003eee:	f3ef 8310 	mrs	r3, PRIMASK
- 8003ef2:	657b      	str	r3, [r7, #84]	; 0x54
-  return(result);
- 8003ef4:	6d7b      	ldr	r3, [r7, #84]	; 0x54
-
-          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 8003ef6:	66fb      	str	r3, [r7, #108]	; 0x6c
- 8003ef8:	2301      	movs	r3, #1
- 8003efa:	65bb      	str	r3, [r7, #88]	; 0x58
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003efc:	6dbb      	ldr	r3, [r7, #88]	; 0x58
- 8003efe:	f383 8810 	msr	PRIMASK, r3
-}
- 8003f02:	46c0      	nop			; (mov r8, r8)
- 8003f04:	687b      	ldr	r3, [r7, #4]
- 8003f06:	681b      	ldr	r3, [r3, #0]
- 8003f08:	681a      	ldr	r2, [r3, #0]
- 8003f0a:	687b      	ldr	r3, [r7, #4]
- 8003f0c:	681b      	ldr	r3, [r3, #0]
- 8003f0e:	2110      	movs	r1, #16
- 8003f10:	438a      	bics	r2, r1
- 8003f12:	601a      	str	r2, [r3, #0]
- 8003f14:	6efb      	ldr	r3, [r7, #108]	; 0x6c
- 8003f16:	65fb      	str	r3, [r7, #92]	; 0x5c
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003f18:	6dfb      	ldr	r3, [r7, #92]	; 0x5c
- 8003f1a:	f383 8810 	msr	PRIMASK, r3
-}
- 8003f1e:	46c0      	nop			; (mov r8, r8)
-
-          /* Last bytes received, so no need as the abort is immediate */
-          (void)HAL_DMA_Abort(huart->hdmarx);
- 8003f20:	687b      	ldr	r3, [r7, #4]
- 8003f22:	6f5b      	ldr	r3, [r3, #116]	; 0x74
- 8003f24:	0018      	movs	r0, r3
- 8003f26:	f7fd fe55 	bl	8001bd4 <HAL_DMA_Abort>
-        }
-
-        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
-           In this case, Rx Event type is Idle Event */
-        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
- 8003f2a:	687b      	ldr	r3, [r7, #4]
- 8003f2c:	2202      	movs	r2, #2
- 8003f2e:	665a      	str	r2, [r3, #100]	; 0x64
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-        /*Call registered Rx Event callback*/
-        huart->RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
-#else
-        /*Call legacy weak Rx Event callback*/
-        HAL_UARTEx_RxEventCallback(huart, (huart->RxXferSize - huart->RxXferCount));
- 8003f30:	687b      	ldr	r3, [r7, #4]
- 8003f32:	2258      	movs	r2, #88	; 0x58
- 8003f34:	5a9a      	ldrh	r2, [r3, r2]
- 8003f36:	687b      	ldr	r3, [r7, #4]
- 8003f38:	215a      	movs	r1, #90	; 0x5a
- 8003f3a:	5a5b      	ldrh	r3, [r3, r1]
- 8003f3c:	b29b      	uxth	r3, r3
- 8003f3e:	1ad3      	subs	r3, r2, r3
- 8003f40:	b29a      	uxth	r2, r3
- 8003f42:	687b      	ldr	r3, [r7, #4]
- 8003f44:	0011      	movs	r1, r2
- 8003f46:	0018      	movs	r0, r3
- 8003f48:	f000 f8e0 	bl	800410c <HAL_UARTEx_RxEventCallback>
-#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
-      }
-      return;
- 8003f4c:	e0c2      	b.n	80040d4 <HAL_UART_IRQHandler+0x5ac>
-    else
-    {
-      /* DMA mode not enabled */
-      /* Check received length : If all expected data are received, do nothing.
-         Otherwise, if at least one data has already been received, IDLE event is to be notified to user */
-      uint16_t nb_rx_data = huart->RxXferSize - huart->RxXferCount;
- 8003f4e:	687b      	ldr	r3, [r7, #4]
- 8003f50:	2258      	movs	r2, #88	; 0x58
- 8003f52:	5a99      	ldrh	r1, [r3, r2]
- 8003f54:	687b      	ldr	r3, [r7, #4]
- 8003f56:	225a      	movs	r2, #90	; 0x5a
- 8003f58:	5a9b      	ldrh	r3, [r3, r2]
- 8003f5a:	b29a      	uxth	r2, r3
- 8003f5c:	208e      	movs	r0, #142	; 0x8e
- 8003f5e:	183b      	adds	r3, r7, r0
- 8003f60:	1a8a      	subs	r2, r1, r2
- 8003f62:	801a      	strh	r2, [r3, #0]
-      if ((huart->RxXferCount > 0U)
- 8003f64:	687b      	ldr	r3, [r7, #4]
- 8003f66:	225a      	movs	r2, #90	; 0x5a
- 8003f68:	5a9b      	ldrh	r3, [r3, r2]
- 8003f6a:	b29b      	uxth	r3, r3
- 8003f6c:	2b00      	cmp	r3, #0
- 8003f6e:	d100      	bne.n	8003f72 <HAL_UART_IRQHandler+0x44a>
- 8003f70:	e0b2      	b.n	80040d8 <HAL_UART_IRQHandler+0x5b0>
-          && (nb_rx_data > 0U))
- 8003f72:	183b      	adds	r3, r7, r0
- 8003f74:	881b      	ldrh	r3, [r3, #0]
- 8003f76:	2b00      	cmp	r3, #0
- 8003f78:	d100      	bne.n	8003f7c <HAL_UART_IRQHandler+0x454>
- 8003f7a:	e0ad      	b.n	80040d8 <HAL_UART_IRQHandler+0x5b0>
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8003f7c:	f3ef 8310 	mrs	r3, PRIMASK
- 8003f80:	60fb      	str	r3, [r7, #12]
-  return(result);
- 8003f82:	68fb      	ldr	r3, [r7, #12]
-      {
-        /* Disable the UART Parity Error Interrupt and RXNE interrupts */
-        ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
- 8003f84:	2488      	movs	r4, #136	; 0x88
- 8003f86:	193a      	adds	r2, r7, r4
- 8003f88:	6013      	str	r3, [r2, #0]
- 8003f8a:	2301      	movs	r3, #1
- 8003f8c:	613b      	str	r3, [r7, #16]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003f8e:	693b      	ldr	r3, [r7, #16]
- 8003f90:	f383 8810 	msr	PRIMASK, r3
-}
- 8003f94:	46c0      	nop			; (mov r8, r8)
- 8003f96:	687b      	ldr	r3, [r7, #4]
- 8003f98:	681b      	ldr	r3, [r3, #0]
- 8003f9a:	681a      	ldr	r2, [r3, #0]
- 8003f9c:	687b      	ldr	r3, [r7, #4]
- 8003f9e:	681b      	ldr	r3, [r3, #0]
- 8003fa0:	4951      	ldr	r1, [pc, #324]	; (80040e8 <HAL_UART_IRQHandler+0x5c0>)
- 8003fa2:	400a      	ands	r2, r1
- 8003fa4:	601a      	str	r2, [r3, #0]
- 8003fa6:	193b      	adds	r3, r7, r4
- 8003fa8:	681b      	ldr	r3, [r3, #0]
- 8003faa:	617b      	str	r3, [r7, #20]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003fac:	697b      	ldr	r3, [r7, #20]
- 8003fae:	f383 8810 	msr	PRIMASK, r3
-}
- 8003fb2:	46c0      	nop			; (mov r8, r8)
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8003fb4:	f3ef 8310 	mrs	r3, PRIMASK
- 8003fb8:	61bb      	str	r3, [r7, #24]
-  return(result);
- 8003fba:	69bb      	ldr	r3, [r7, #24]
-
-        /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-        ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8003fbc:	2484      	movs	r4, #132	; 0x84
- 8003fbe:	193a      	adds	r2, r7, r4
- 8003fc0:	6013      	str	r3, [r2, #0]
- 8003fc2:	2301      	movs	r3, #1
- 8003fc4:	61fb      	str	r3, [r7, #28]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003fc6:	69fb      	ldr	r3, [r7, #28]
- 8003fc8:	f383 8810 	msr	PRIMASK, r3
-}
- 8003fcc:	46c0      	nop			; (mov r8, r8)
- 8003fce:	687b      	ldr	r3, [r7, #4]
- 8003fd0:	681b      	ldr	r3, [r3, #0]
- 8003fd2:	689a      	ldr	r2, [r3, #8]
- 8003fd4:	687b      	ldr	r3, [r7, #4]
- 8003fd6:	681b      	ldr	r3, [r3, #0]
- 8003fd8:	2101      	movs	r1, #1
- 8003fda:	438a      	bics	r2, r1
- 8003fdc:	609a      	str	r2, [r3, #8]
- 8003fde:	193b      	adds	r3, r7, r4
- 8003fe0:	681b      	ldr	r3, [r3, #0]
- 8003fe2:	623b      	str	r3, [r7, #32]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8003fe4:	6a3b      	ldr	r3, [r7, #32]
- 8003fe6:	f383 8810 	msr	PRIMASK, r3
-}
- 8003fea:	46c0      	nop			; (mov r8, r8)
-
-        /* Rx process is completed, restore huart->RxState to Ready */
-        huart->RxState = HAL_UART_STATE_READY;
- 8003fec:	687b      	ldr	r3, [r7, #4]
- 8003fee:	2280      	movs	r2, #128	; 0x80
- 8003ff0:	2120      	movs	r1, #32
- 8003ff2:	5099      	str	r1, [r3, r2]
-        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 8003ff4:	687b      	ldr	r3, [r7, #4]
- 8003ff6:	2200      	movs	r2, #0
- 8003ff8:	661a      	str	r2, [r3, #96]	; 0x60
-
-        /* Clear RxISR function pointer */
-        huart->RxISR = NULL;
- 8003ffa:	687b      	ldr	r3, [r7, #4]
- 8003ffc:	2200      	movs	r2, #0
- 8003ffe:	669a      	str	r2, [r3, #104]	; 0x68
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004000:	f3ef 8310 	mrs	r3, PRIMASK
- 8004004:	627b      	str	r3, [r7, #36]	; 0x24
-  return(result);
- 8004006:	6a7b      	ldr	r3, [r7, #36]	; 0x24
-
-        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 8004008:	2480      	movs	r4, #128	; 0x80
- 800400a:	193a      	adds	r2, r7, r4
- 800400c:	6013      	str	r3, [r2, #0]
- 800400e:	2301      	movs	r3, #1
- 8004010:	62bb      	str	r3, [r7, #40]	; 0x28
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004012:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 8004014:	f383 8810 	msr	PRIMASK, r3
-}
- 8004018:	46c0      	nop			; (mov r8, r8)
- 800401a:	687b      	ldr	r3, [r7, #4]
- 800401c:	681b      	ldr	r3, [r3, #0]
- 800401e:	681a      	ldr	r2, [r3, #0]
- 8004020:	687b      	ldr	r3, [r7, #4]
- 8004022:	681b      	ldr	r3, [r3, #0]
- 8004024:	2110      	movs	r1, #16
- 8004026:	438a      	bics	r2, r1
- 8004028:	601a      	str	r2, [r3, #0]
- 800402a:	193b      	adds	r3, r7, r4
- 800402c:	681b      	ldr	r3, [r3, #0]
- 800402e:	62fb      	str	r3, [r7, #44]	; 0x2c
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004030:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 8004032:	f383 8810 	msr	PRIMASK, r3
-}
- 8004036:	46c0      	nop			; (mov r8, r8)
-
-        /* Initialize type of RxEvent that correspond to RxEvent callback execution;
-           In this case, Rx Event type is Idle Event */
-        huart->RxEventType = HAL_UART_RXEVENT_IDLE;
- 8004038:	687b      	ldr	r3, [r7, #4]
- 800403a:	2202      	movs	r2, #2
- 800403c:	665a      	str	r2, [r3, #100]	; 0x64
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-        /*Call registered Rx complete callback*/
-        huart->RxEventCallback(huart, nb_rx_data);
-#else
-        /*Call legacy weak Rx Event callback*/
-        HAL_UARTEx_RxEventCallback(huart, nb_rx_data);
- 800403e:	183b      	adds	r3, r7, r0
- 8004040:	881a      	ldrh	r2, [r3, #0]
- 8004042:	687b      	ldr	r3, [r7, #4]
- 8004044:	0011      	movs	r1, r2
- 8004046:	0018      	movs	r0, r3
- 8004048:	f000 f860 	bl	800410c <HAL_UARTEx_RxEventCallback>
-#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
-      }
-      return;
- 800404c:	e044      	b.n	80040d8 <HAL_UART_IRQHandler+0x5b0>
-    }
-  }
-
-  /* UART wakeup from Stop mode interrupt occurred ---------------------------*/
-  if (((isrflags & USART_ISR_WUF) != 0U) && ((cr3its & USART_CR3_WUFIE) != 0U))
- 800404e:	23a4      	movs	r3, #164	; 0xa4
- 8004050:	18fb      	adds	r3, r7, r3
- 8004052:	681a      	ldr	r2, [r3, #0]
- 8004054:	2380      	movs	r3, #128	; 0x80
- 8004056:	035b      	lsls	r3, r3, #13
- 8004058:	4013      	ands	r3, r2
- 800405a:	d010      	beq.n	800407e <HAL_UART_IRQHandler+0x556>
- 800405c:	239c      	movs	r3, #156	; 0x9c
- 800405e:	18fb      	adds	r3, r7, r3
- 8004060:	681a      	ldr	r2, [r3, #0]
- 8004062:	2380      	movs	r3, #128	; 0x80
- 8004064:	03db      	lsls	r3, r3, #15
- 8004066:	4013      	ands	r3, r2
- 8004068:	d009      	beq.n	800407e <HAL_UART_IRQHandler+0x556>
-  {
-    __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_WUF);
- 800406a:	687b      	ldr	r3, [r7, #4]
- 800406c:	681b      	ldr	r3, [r3, #0]
- 800406e:	2280      	movs	r2, #128	; 0x80
- 8004070:	0352      	lsls	r2, r2, #13
- 8004072:	621a      	str	r2, [r3, #32]
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-    /* Call registered Wakeup Callback */
-    huart->WakeupCallback(huart);
-#else
-    /* Call legacy weak Wakeup Callback */
-    HAL_UARTEx_WakeupCallback(huart);
- 8004074:	687b      	ldr	r3, [r7, #4]
- 8004076:	0018      	movs	r0, r3
- 8004078:	f000 ffd2 	bl	8005020 <HAL_UARTEx_WakeupCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-    return;
- 800407c:	e02f      	b.n	80040de <HAL_UART_IRQHandler+0x5b6>
-  }
-
-  /* UART in mode Transmitter ------------------------------------------------*/
-  if (((isrflags & USART_ISR_TXE) != 0U)
- 800407e:	23a4      	movs	r3, #164	; 0xa4
- 8004080:	18fb      	adds	r3, r7, r3
- 8004082:	681b      	ldr	r3, [r3, #0]
- 8004084:	2280      	movs	r2, #128	; 0x80
- 8004086:	4013      	ands	r3, r2
- 8004088:	d00f      	beq.n	80040aa <HAL_UART_IRQHandler+0x582>
-      && ((cr1its & USART_CR1_TXEIE) != 0U))
- 800408a:	23a0      	movs	r3, #160	; 0xa0
- 800408c:	18fb      	adds	r3, r7, r3
- 800408e:	681b      	ldr	r3, [r3, #0]
- 8004090:	2280      	movs	r2, #128	; 0x80
- 8004092:	4013      	ands	r3, r2
- 8004094:	d009      	beq.n	80040aa <HAL_UART_IRQHandler+0x582>
-  {
-    if (huart->TxISR != NULL)
- 8004096:	687b      	ldr	r3, [r7, #4]
- 8004098:	6edb      	ldr	r3, [r3, #108]	; 0x6c
- 800409a:	2b00      	cmp	r3, #0
- 800409c:	d01e      	beq.n	80040dc <HAL_UART_IRQHandler+0x5b4>
-    {
-      huart->TxISR(huart);
- 800409e:	687b      	ldr	r3, [r7, #4]
- 80040a0:	6edb      	ldr	r3, [r3, #108]	; 0x6c
- 80040a2:	687a      	ldr	r2, [r7, #4]
- 80040a4:	0010      	movs	r0, r2
- 80040a6:	4798      	blx	r3
-    }
-    return;
- 80040a8:	e018      	b.n	80040dc <HAL_UART_IRQHandler+0x5b4>
-  }
-
-  /* UART in mode Transmitter (transmission end) -----------------------------*/
-  if (((isrflags & USART_ISR_TC) != 0U) && ((cr1its & USART_CR1_TCIE) != 0U))
- 80040aa:	23a4      	movs	r3, #164	; 0xa4
- 80040ac:	18fb      	adds	r3, r7, r3
- 80040ae:	681b      	ldr	r3, [r3, #0]
- 80040b0:	2240      	movs	r2, #64	; 0x40
- 80040b2:	4013      	ands	r3, r2
- 80040b4:	d013      	beq.n	80040de <HAL_UART_IRQHandler+0x5b6>
- 80040b6:	23a0      	movs	r3, #160	; 0xa0
- 80040b8:	18fb      	adds	r3, r7, r3
- 80040ba:	681b      	ldr	r3, [r3, #0]
- 80040bc:	2240      	movs	r2, #64	; 0x40
- 80040be:	4013      	ands	r3, r2
- 80040c0:	d00d      	beq.n	80040de <HAL_UART_IRQHandler+0x5b6>
-  {
-    UART_EndTransmit_IT(huart);
- 80040c2:	687b      	ldr	r3, [r7, #4]
- 80040c4:	0018      	movs	r0, r3
- 80040c6:	f000 fdbc 	bl	8004c42 <UART_EndTransmit_IT>
-    return;
- 80040ca:	e008      	b.n	80040de <HAL_UART_IRQHandler+0x5b6>
-      return;
- 80040cc:	46c0      	nop			; (mov r8, r8)
- 80040ce:	e006      	b.n	80040de <HAL_UART_IRQHandler+0x5b6>
-    return;
- 80040d0:	46c0      	nop			; (mov r8, r8)
- 80040d2:	e004      	b.n	80040de <HAL_UART_IRQHandler+0x5b6>
-      return;
- 80040d4:	46c0      	nop			; (mov r8, r8)
- 80040d6:	e002      	b.n	80040de <HAL_UART_IRQHandler+0x5b6>
-      return;
- 80040d8:	46c0      	nop			; (mov r8, r8)
- 80040da:	e000      	b.n	80040de <HAL_UART_IRQHandler+0x5b6>
-    return;
- 80040dc:	46c0      	nop			; (mov r8, r8)
-  }
-
-}
- 80040de:	46bd      	mov	sp, r7
- 80040e0:	b02b      	add	sp, #172	; 0xac
- 80040e2:	bd90      	pop	{r4, r7, pc}
- 80040e4:	fffffeff 	.word	0xfffffeff
- 80040e8:	fffffedf 	.word	0xfffffedf
-
-080040ec <HAL_UART_TxCpltCallback>:
-  * @brief Tx Transfer completed callback.
-  * @param huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
-{
- 80040ec:	b580      	push	{r7, lr}
- 80040ee:	b082      	sub	sp, #8
- 80040f0:	af00      	add	r7, sp, #0
- 80040f2:	6078      	str	r0, [r7, #4]
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_TxCpltCallback can be implemented in the user file.
-   */
-}
- 80040f4:	46c0      	nop			; (mov r8, r8)
- 80040f6:	46bd      	mov	sp, r7
- 80040f8:	b002      	add	sp, #8
- 80040fa:	bd80      	pop	{r7, pc}
-
-080040fc <HAL_UART_ErrorCallback>:
-  * @brief  UART error callback.
-  * @param  huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
-{
- 80040fc:	b580      	push	{r7, lr}
- 80040fe:	b082      	sub	sp, #8
- 8004100:	af00      	add	r7, sp, #0
- 8004102:	6078      	str	r0, [r7, #4]
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UART_ErrorCallback can be implemented in the user file.
-   */
-}
- 8004104:	46c0      	nop			; (mov r8, r8)
- 8004106:	46bd      	mov	sp, r7
- 8004108:	b002      	add	sp, #8
- 800410a:	bd80      	pop	{r7, pc}
-
-0800410c <HAL_UARTEx_RxEventCallback>:
-  * @param  Size  Number of data available in application reception buffer (indicates a position in
-  *               reception buffer until which, data are available)
-  * @retval None
-  */
-__weak void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size)
-{
- 800410c:	b580      	push	{r7, lr}
- 800410e:	b082      	sub	sp, #8
- 8004110:	af00      	add	r7, sp, #0
- 8004112:	6078      	str	r0, [r7, #4]
- 8004114:	000a      	movs	r2, r1
- 8004116:	1cbb      	adds	r3, r7, #2
- 8004118:	801a      	strh	r2, [r3, #0]
-  UNUSED(Size);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UARTEx_RxEventCallback can be implemented in the user file.
-   */
-}
- 800411a:	46c0      	nop			; (mov r8, r8)
- 800411c:	46bd      	mov	sp, r7
- 800411e:	b002      	add	sp, #8
- 8004120:	bd80      	pop	{r7, pc}
-	...
-
-08004124 <UART_SetConfig>:
+080039ac <UART_SetConfig>:
   * @brief Configure the UART peripheral.
   * @param huart UART handle.
   * @retval HAL status
   */
 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
 {
- 8004124:	b5b0      	push	{r4, r5, r7, lr}
- 8004126:	b08e      	sub	sp, #56	; 0x38
- 8004128:	af00      	add	r7, sp, #0
- 800412a:	61f8      	str	r0, [r7, #28]
+ 80039ac:	b5b0      	push	{r4, r5, r7, lr}
+ 80039ae:	b08e      	sub	sp, #56	; 0x38
+ 80039b0:	af00      	add	r7, sp, #0
+ 80039b2:	61f8      	str	r0, [r7, #28]
   uint32_t tmpreg;
   uint16_t brrtemp;
   UART_ClockSourceTypeDef clocksource;
   uint32_t usartdiv;
   HAL_StatusTypeDef ret               = HAL_OK;
- 800412c:	231a      	movs	r3, #26
- 800412e:	2218      	movs	r2, #24
- 8004130:	189b      	adds	r3, r3, r2
- 8004132:	19db      	adds	r3, r3, r7
- 8004134:	2200      	movs	r2, #0
- 8004136:	701a      	strb	r2, [r3, #0]
+ 80039b4:	231a      	movs	r3, #26
+ 80039b6:	2218      	movs	r2, #24
+ 80039b8:	189b      	adds	r3, r3, r2
+ 80039ba:	19db      	adds	r3, r3, r7
+ 80039bc:	2200      	movs	r2, #0
+ 80039be:	701a      	strb	r2, [r3, #0]
   *  the UART Word Length, Parity, Mode and oversampling:
   *  set the M bits according to huart->Init.WordLength value
   *  set PCE and PS bits according to huart->Init.Parity value
   *  set TE and RE bits according to huart->Init.Mode value
   *  set OVER8 bit according to huart->Init.OverSampling value */
   tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
- 8004138:	69fb      	ldr	r3, [r7, #28]
- 800413a:	689a      	ldr	r2, [r3, #8]
- 800413c:	69fb      	ldr	r3, [r7, #28]
- 800413e:	691b      	ldr	r3, [r3, #16]
- 8004140:	431a      	orrs	r2, r3
- 8004142:	69fb      	ldr	r3, [r7, #28]
- 8004144:	695b      	ldr	r3, [r3, #20]
- 8004146:	431a      	orrs	r2, r3
- 8004148:	69fb      	ldr	r3, [r7, #28]
- 800414a:	69db      	ldr	r3, [r3, #28]
- 800414c:	4313      	orrs	r3, r2
- 800414e:	637b      	str	r3, [r7, #52]	; 0x34
+ 80039c0:	69fb      	ldr	r3, [r7, #28]
+ 80039c2:	689a      	ldr	r2, [r3, #8]
+ 80039c4:	69fb      	ldr	r3, [r7, #28]
+ 80039c6:	691b      	ldr	r3, [r3, #16]
+ 80039c8:	431a      	orrs	r2, r3
+ 80039ca:	69fb      	ldr	r3, [r7, #28]
+ 80039cc:	695b      	ldr	r3, [r3, #20]
+ 80039ce:	431a      	orrs	r2, r3
+ 80039d0:	69fb      	ldr	r3, [r7, #28]
+ 80039d2:	69db      	ldr	r3, [r3, #28]
+ 80039d4:	4313      	orrs	r3, r2
+ 80039d6:	637b      	str	r3, [r7, #52]	; 0x34
   MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg);
- 8004150:	69fb      	ldr	r3, [r7, #28]
- 8004152:	681b      	ldr	r3, [r3, #0]
- 8004154:	681b      	ldr	r3, [r3, #0]
- 8004156:	4ac6      	ldr	r2, [pc, #792]	; (8004470 <UART_SetConfig+0x34c>)
- 8004158:	4013      	ands	r3, r2
- 800415a:	0019      	movs	r1, r3
- 800415c:	69fb      	ldr	r3, [r7, #28]
- 800415e:	681b      	ldr	r3, [r3, #0]
- 8004160:	6b7a      	ldr	r2, [r7, #52]	; 0x34
- 8004162:	430a      	orrs	r2, r1
- 8004164:	601a      	str	r2, [r3, #0]
+ 80039d8:	69fb      	ldr	r3, [r7, #28]
+ 80039da:	681b      	ldr	r3, [r3, #0]
+ 80039dc:	681b      	ldr	r3, [r3, #0]
+ 80039de:	4ac6      	ldr	r2, [pc, #792]	; (8003cf8 <UART_SetConfig+0x34c>)
+ 80039e0:	4013      	ands	r3, r2
+ 80039e2:	0019      	movs	r1, r3
+ 80039e4:	69fb      	ldr	r3, [r7, #28]
+ 80039e6:	681b      	ldr	r3, [r3, #0]
+ 80039e8:	6b7a      	ldr	r2, [r7, #52]	; 0x34
+ 80039ea:	430a      	orrs	r2, r1
+ 80039ec:	601a      	str	r2, [r3, #0]
 
   /*-------------------------- USART CR2 Configuration -----------------------*/
   /* Configure the UART Stop Bits: Set STOP[13:12] bits according
   * to huart->Init.StopBits value */
   MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
- 8004166:	69fb      	ldr	r3, [r7, #28]
- 8004168:	681b      	ldr	r3, [r3, #0]
- 800416a:	685b      	ldr	r3, [r3, #4]
- 800416c:	4ac1      	ldr	r2, [pc, #772]	; (8004474 <UART_SetConfig+0x350>)
- 800416e:	4013      	ands	r3, r2
- 8004170:	0019      	movs	r1, r3
- 8004172:	69fb      	ldr	r3, [r7, #28]
- 8004174:	68da      	ldr	r2, [r3, #12]
- 8004176:	69fb      	ldr	r3, [r7, #28]
- 8004178:	681b      	ldr	r3, [r3, #0]
- 800417a:	430a      	orrs	r2, r1
- 800417c:	605a      	str	r2, [r3, #4]
+ 80039ee:	69fb      	ldr	r3, [r7, #28]
+ 80039f0:	681b      	ldr	r3, [r3, #0]
+ 80039f2:	685b      	ldr	r3, [r3, #4]
+ 80039f4:	4ac1      	ldr	r2, [pc, #772]	; (8003cfc <UART_SetConfig+0x350>)
+ 80039f6:	4013      	ands	r3, r2
+ 80039f8:	0019      	movs	r1, r3
+ 80039fa:	69fb      	ldr	r3, [r7, #28]
+ 80039fc:	68da      	ldr	r2, [r3, #12]
+ 80039fe:	69fb      	ldr	r3, [r7, #28]
+ 8003a00:	681b      	ldr	r3, [r3, #0]
+ 8003a02:	430a      	orrs	r2, r1
+ 8003a04:	605a      	str	r2, [r3, #4]
   /* Configure
   * - UART HardWare Flow Control: set CTSE and RTSE bits according
   *   to huart->Init.HwFlowCtl value
   * - one-bit sampling method versus three samples' majority rule according
   *   to huart->Init.OneBitSampling (not applicable to LPUART) */
   tmpreg = (uint32_t)huart->Init.HwFlowCtl;
- 800417e:	69fb      	ldr	r3, [r7, #28]
- 8004180:	699b      	ldr	r3, [r3, #24]
- 8004182:	637b      	str	r3, [r7, #52]	; 0x34
+ 8003a06:	69fb      	ldr	r3, [r7, #28]
+ 8003a08:	699b      	ldr	r3, [r3, #24]
+ 8003a0a:	637b      	str	r3, [r7, #52]	; 0x34
 
   if (!(UART_INSTANCE_LOWPOWER(huart)))
- 8004184:	69fb      	ldr	r3, [r7, #28]
- 8004186:	681b      	ldr	r3, [r3, #0]
- 8004188:	4abb      	ldr	r2, [pc, #748]	; (8004478 <UART_SetConfig+0x354>)
- 800418a:	4293      	cmp	r3, r2
- 800418c:	d004      	beq.n	8004198 <UART_SetConfig+0x74>
+ 8003a0c:	69fb      	ldr	r3, [r7, #28]
+ 8003a0e:	681b      	ldr	r3, [r3, #0]
+ 8003a10:	4abb      	ldr	r2, [pc, #748]	; (8003d00 <UART_SetConfig+0x354>)
+ 8003a12:	4293      	cmp	r3, r2
+ 8003a14:	d004      	beq.n	8003a20 <UART_SetConfig+0x74>
   {
     tmpreg |= huart->Init.OneBitSampling;
- 800418e:	69fb      	ldr	r3, [r7, #28]
- 8004190:	6a1b      	ldr	r3, [r3, #32]
- 8004192:	6b7a      	ldr	r2, [r7, #52]	; 0x34
- 8004194:	4313      	orrs	r3, r2
- 8004196:	637b      	str	r3, [r7, #52]	; 0x34
+ 8003a16:	69fb      	ldr	r3, [r7, #28]
+ 8003a18:	6a1b      	ldr	r3, [r3, #32]
+ 8003a1a:	6b7a      	ldr	r2, [r7, #52]	; 0x34
+ 8003a1c:	4313      	orrs	r3, r2
+ 8003a1e:	637b      	str	r3, [r7, #52]	; 0x34
   }
   MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg);
- 8004198:	69fb      	ldr	r3, [r7, #28]
- 800419a:	681b      	ldr	r3, [r3, #0]
- 800419c:	689b      	ldr	r3, [r3, #8]
- 800419e:	4ab7      	ldr	r2, [pc, #732]	; (800447c <UART_SetConfig+0x358>)
- 80041a0:	4013      	ands	r3, r2
- 80041a2:	0019      	movs	r1, r3
- 80041a4:	69fb      	ldr	r3, [r7, #28]
- 80041a6:	681b      	ldr	r3, [r3, #0]
- 80041a8:	6b7a      	ldr	r2, [r7, #52]	; 0x34
- 80041aa:	430a      	orrs	r2, r1
- 80041ac:	609a      	str	r2, [r3, #8]
+ 8003a20:	69fb      	ldr	r3, [r7, #28]
+ 8003a22:	681b      	ldr	r3, [r3, #0]
+ 8003a24:	689b      	ldr	r3, [r3, #8]
+ 8003a26:	4ab7      	ldr	r2, [pc, #732]	; (8003d04 <UART_SetConfig+0x358>)
+ 8003a28:	4013      	ands	r3, r2
+ 8003a2a:	0019      	movs	r1, r3
+ 8003a2c:	69fb      	ldr	r3, [r7, #28]
+ 8003a2e:	681b      	ldr	r3, [r3, #0]
+ 8003a30:	6b7a      	ldr	r2, [r7, #52]	; 0x34
+ 8003a32:	430a      	orrs	r2, r1
+ 8003a34:	609a      	str	r2, [r3, #8]
 
 
   /*-------------------------- USART BRR Configuration -----------------------*/
   UART_GETCLOCKSOURCE(huart, clocksource);
- 80041ae:	69fb      	ldr	r3, [r7, #28]
- 80041b0:	681b      	ldr	r3, [r3, #0]
- 80041b2:	4ab3      	ldr	r2, [pc, #716]	; (8004480 <UART_SetConfig+0x35c>)
- 80041b4:	4293      	cmp	r3, r2
- 80041b6:	d131      	bne.n	800421c <UART_SetConfig+0xf8>
- 80041b8:	4bb2      	ldr	r3, [pc, #712]	; (8004484 <UART_SetConfig+0x360>)
- 80041ba:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
- 80041bc:	2203      	movs	r2, #3
- 80041be:	4013      	ands	r3, r2
- 80041c0:	2b03      	cmp	r3, #3
- 80041c2:	d01d      	beq.n	8004200 <UART_SetConfig+0xdc>
- 80041c4:	d823      	bhi.n	800420e <UART_SetConfig+0xea>
- 80041c6:	2b02      	cmp	r3, #2
- 80041c8:	d00c      	beq.n	80041e4 <UART_SetConfig+0xc0>
- 80041ca:	d820      	bhi.n	800420e <UART_SetConfig+0xea>
- 80041cc:	2b00      	cmp	r3, #0
- 80041ce:	d002      	beq.n	80041d6 <UART_SetConfig+0xb2>
- 80041d0:	2b01      	cmp	r3, #1
- 80041d2:	d00e      	beq.n	80041f2 <UART_SetConfig+0xce>
- 80041d4:	e01b      	b.n	800420e <UART_SetConfig+0xea>
- 80041d6:	231b      	movs	r3, #27
- 80041d8:	2218      	movs	r2, #24
- 80041da:	189b      	adds	r3, r3, r2
- 80041dc:	19db      	adds	r3, r3, r7
- 80041de:	2201      	movs	r2, #1
- 80041e0:	701a      	strb	r2, [r3, #0]
- 80041e2:	e09c      	b.n	800431e <UART_SetConfig+0x1fa>
- 80041e4:	231b      	movs	r3, #27
- 80041e6:	2218      	movs	r2, #24
- 80041e8:	189b      	adds	r3, r3, r2
- 80041ea:	19db      	adds	r3, r3, r7
- 80041ec:	2202      	movs	r2, #2
- 80041ee:	701a      	strb	r2, [r3, #0]
- 80041f0:	e095      	b.n	800431e <UART_SetConfig+0x1fa>
- 80041f2:	231b      	movs	r3, #27
- 80041f4:	2218      	movs	r2, #24
- 80041f6:	189b      	adds	r3, r3, r2
- 80041f8:	19db      	adds	r3, r3, r7
- 80041fa:	2204      	movs	r2, #4
- 80041fc:	701a      	strb	r2, [r3, #0]
- 80041fe:	e08e      	b.n	800431e <UART_SetConfig+0x1fa>
- 8004200:	231b      	movs	r3, #27
- 8004202:	2218      	movs	r2, #24
- 8004204:	189b      	adds	r3, r3, r2
- 8004206:	19db      	adds	r3, r3, r7
- 8004208:	2208      	movs	r2, #8
- 800420a:	701a      	strb	r2, [r3, #0]
- 800420c:	e087      	b.n	800431e <UART_SetConfig+0x1fa>
- 800420e:	231b      	movs	r3, #27
- 8004210:	2218      	movs	r2, #24
- 8004212:	189b      	adds	r3, r3, r2
- 8004214:	19db      	adds	r3, r3, r7
- 8004216:	2210      	movs	r2, #16
- 8004218:	701a      	strb	r2, [r3, #0]
- 800421a:	e080      	b.n	800431e <UART_SetConfig+0x1fa>
- 800421c:	69fb      	ldr	r3, [r7, #28]
- 800421e:	681b      	ldr	r3, [r3, #0]
- 8004220:	4a99      	ldr	r2, [pc, #612]	; (8004488 <UART_SetConfig+0x364>)
- 8004222:	4293      	cmp	r3, r2
- 8004224:	d131      	bne.n	800428a <UART_SetConfig+0x166>
- 8004226:	4b97      	ldr	r3, [pc, #604]	; (8004484 <UART_SetConfig+0x360>)
- 8004228:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
- 800422a:	220c      	movs	r2, #12
- 800422c:	4013      	ands	r3, r2
- 800422e:	2b0c      	cmp	r3, #12
- 8004230:	d01d      	beq.n	800426e <UART_SetConfig+0x14a>
- 8004232:	d823      	bhi.n	800427c <UART_SetConfig+0x158>
- 8004234:	2b08      	cmp	r3, #8
- 8004236:	d00c      	beq.n	8004252 <UART_SetConfig+0x12e>
- 8004238:	d820      	bhi.n	800427c <UART_SetConfig+0x158>
- 800423a:	2b00      	cmp	r3, #0
- 800423c:	d002      	beq.n	8004244 <UART_SetConfig+0x120>
- 800423e:	2b04      	cmp	r3, #4
- 8004240:	d00e      	beq.n	8004260 <UART_SetConfig+0x13c>
- 8004242:	e01b      	b.n	800427c <UART_SetConfig+0x158>
- 8004244:	231b      	movs	r3, #27
- 8004246:	2218      	movs	r2, #24
- 8004248:	189b      	adds	r3, r3, r2
- 800424a:	19db      	adds	r3, r3, r7
- 800424c:	2200      	movs	r2, #0
- 800424e:	701a      	strb	r2, [r3, #0]
- 8004250:	e065      	b.n	800431e <UART_SetConfig+0x1fa>
- 8004252:	231b      	movs	r3, #27
- 8004254:	2218      	movs	r2, #24
- 8004256:	189b      	adds	r3, r3, r2
- 8004258:	19db      	adds	r3, r3, r7
- 800425a:	2202      	movs	r2, #2
- 800425c:	701a      	strb	r2, [r3, #0]
- 800425e:	e05e      	b.n	800431e <UART_SetConfig+0x1fa>
- 8004260:	231b      	movs	r3, #27
- 8004262:	2218      	movs	r2, #24
- 8004264:	189b      	adds	r3, r3, r2
- 8004266:	19db      	adds	r3, r3, r7
- 8004268:	2204      	movs	r2, #4
- 800426a:	701a      	strb	r2, [r3, #0]
- 800426c:	e057      	b.n	800431e <UART_SetConfig+0x1fa>
- 800426e:	231b      	movs	r3, #27
- 8004270:	2218      	movs	r2, #24
- 8004272:	189b      	adds	r3, r3, r2
- 8004274:	19db      	adds	r3, r3, r7
- 8004276:	2208      	movs	r2, #8
- 8004278:	701a      	strb	r2, [r3, #0]
- 800427a:	e050      	b.n	800431e <UART_SetConfig+0x1fa>
- 800427c:	231b      	movs	r3, #27
- 800427e:	2218      	movs	r2, #24
- 8004280:	189b      	adds	r3, r3, r2
- 8004282:	19db      	adds	r3, r3, r7
- 8004284:	2210      	movs	r2, #16
- 8004286:	701a      	strb	r2, [r3, #0]
- 8004288:	e049      	b.n	800431e <UART_SetConfig+0x1fa>
- 800428a:	69fb      	ldr	r3, [r7, #28]
- 800428c:	681b      	ldr	r3, [r3, #0]
- 800428e:	4a7a      	ldr	r2, [pc, #488]	; (8004478 <UART_SetConfig+0x354>)
- 8004290:	4293      	cmp	r3, r2
- 8004292:	d13e      	bne.n	8004312 <UART_SetConfig+0x1ee>
- 8004294:	4b7b      	ldr	r3, [pc, #492]	; (8004484 <UART_SetConfig+0x360>)
- 8004296:	6cda      	ldr	r2, [r3, #76]	; 0x4c
- 8004298:	23c0      	movs	r3, #192	; 0xc0
- 800429a:	011b      	lsls	r3, r3, #4
- 800429c:	4013      	ands	r3, r2
- 800429e:	22c0      	movs	r2, #192	; 0xc0
- 80042a0:	0112      	lsls	r2, r2, #4
- 80042a2:	4293      	cmp	r3, r2
- 80042a4:	d027      	beq.n	80042f6 <UART_SetConfig+0x1d2>
- 80042a6:	22c0      	movs	r2, #192	; 0xc0
- 80042a8:	0112      	lsls	r2, r2, #4
- 80042aa:	4293      	cmp	r3, r2
- 80042ac:	d82a      	bhi.n	8004304 <UART_SetConfig+0x1e0>
- 80042ae:	2280      	movs	r2, #128	; 0x80
- 80042b0:	0112      	lsls	r2, r2, #4
- 80042b2:	4293      	cmp	r3, r2
- 80042b4:	d011      	beq.n	80042da <UART_SetConfig+0x1b6>
- 80042b6:	2280      	movs	r2, #128	; 0x80
- 80042b8:	0112      	lsls	r2, r2, #4
- 80042ba:	4293      	cmp	r3, r2
- 80042bc:	d822      	bhi.n	8004304 <UART_SetConfig+0x1e0>
- 80042be:	2b00      	cmp	r3, #0
- 80042c0:	d004      	beq.n	80042cc <UART_SetConfig+0x1a8>
- 80042c2:	2280      	movs	r2, #128	; 0x80
- 80042c4:	00d2      	lsls	r2, r2, #3
- 80042c6:	4293      	cmp	r3, r2
- 80042c8:	d00e      	beq.n	80042e8 <UART_SetConfig+0x1c4>
- 80042ca:	e01b      	b.n	8004304 <UART_SetConfig+0x1e0>
- 80042cc:	231b      	movs	r3, #27
- 80042ce:	2218      	movs	r2, #24
- 80042d0:	189b      	adds	r3, r3, r2
- 80042d2:	19db      	adds	r3, r3, r7
- 80042d4:	2200      	movs	r2, #0
- 80042d6:	701a      	strb	r2, [r3, #0]
- 80042d8:	e021      	b.n	800431e <UART_SetConfig+0x1fa>
- 80042da:	231b      	movs	r3, #27
- 80042dc:	2218      	movs	r2, #24
- 80042de:	189b      	adds	r3, r3, r2
- 80042e0:	19db      	adds	r3, r3, r7
- 80042e2:	2202      	movs	r2, #2
- 80042e4:	701a      	strb	r2, [r3, #0]
- 80042e6:	e01a      	b.n	800431e <UART_SetConfig+0x1fa>
- 80042e8:	231b      	movs	r3, #27
- 80042ea:	2218      	movs	r2, #24
- 80042ec:	189b      	adds	r3, r3, r2
- 80042ee:	19db      	adds	r3, r3, r7
- 80042f0:	2204      	movs	r2, #4
- 80042f2:	701a      	strb	r2, [r3, #0]
- 80042f4:	e013      	b.n	800431e <UART_SetConfig+0x1fa>
- 80042f6:	231b      	movs	r3, #27
- 80042f8:	2218      	movs	r2, #24
- 80042fa:	189b      	adds	r3, r3, r2
- 80042fc:	19db      	adds	r3, r3, r7
- 80042fe:	2208      	movs	r2, #8
- 8004300:	701a      	strb	r2, [r3, #0]
- 8004302:	e00c      	b.n	800431e <UART_SetConfig+0x1fa>
- 8004304:	231b      	movs	r3, #27
- 8004306:	2218      	movs	r2, #24
- 8004308:	189b      	adds	r3, r3, r2
- 800430a:	19db      	adds	r3, r3, r7
- 800430c:	2210      	movs	r2, #16
- 800430e:	701a      	strb	r2, [r3, #0]
- 8004310:	e005      	b.n	800431e <UART_SetConfig+0x1fa>
- 8004312:	231b      	movs	r3, #27
- 8004314:	2218      	movs	r2, #24
- 8004316:	189b      	adds	r3, r3, r2
- 8004318:	19db      	adds	r3, r3, r7
- 800431a:	2210      	movs	r2, #16
- 800431c:	701a      	strb	r2, [r3, #0]
+ 8003a36:	69fb      	ldr	r3, [r7, #28]
+ 8003a38:	681b      	ldr	r3, [r3, #0]
+ 8003a3a:	4ab3      	ldr	r2, [pc, #716]	; (8003d08 <UART_SetConfig+0x35c>)
+ 8003a3c:	4293      	cmp	r3, r2
+ 8003a3e:	d131      	bne.n	8003aa4 <UART_SetConfig+0xf8>
+ 8003a40:	4bb2      	ldr	r3, [pc, #712]	; (8003d0c <UART_SetConfig+0x360>)
+ 8003a42:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8003a44:	2203      	movs	r2, #3
+ 8003a46:	4013      	ands	r3, r2
+ 8003a48:	2b03      	cmp	r3, #3
+ 8003a4a:	d01d      	beq.n	8003a88 <UART_SetConfig+0xdc>
+ 8003a4c:	d823      	bhi.n	8003a96 <UART_SetConfig+0xea>
+ 8003a4e:	2b02      	cmp	r3, #2
+ 8003a50:	d00c      	beq.n	8003a6c <UART_SetConfig+0xc0>
+ 8003a52:	d820      	bhi.n	8003a96 <UART_SetConfig+0xea>
+ 8003a54:	2b00      	cmp	r3, #0
+ 8003a56:	d002      	beq.n	8003a5e <UART_SetConfig+0xb2>
+ 8003a58:	2b01      	cmp	r3, #1
+ 8003a5a:	d00e      	beq.n	8003a7a <UART_SetConfig+0xce>
+ 8003a5c:	e01b      	b.n	8003a96 <UART_SetConfig+0xea>
+ 8003a5e:	231b      	movs	r3, #27
+ 8003a60:	2218      	movs	r2, #24
+ 8003a62:	189b      	adds	r3, r3, r2
+ 8003a64:	19db      	adds	r3, r3, r7
+ 8003a66:	2201      	movs	r2, #1
+ 8003a68:	701a      	strb	r2, [r3, #0]
+ 8003a6a:	e09c      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003a6c:	231b      	movs	r3, #27
+ 8003a6e:	2218      	movs	r2, #24
+ 8003a70:	189b      	adds	r3, r3, r2
+ 8003a72:	19db      	adds	r3, r3, r7
+ 8003a74:	2202      	movs	r2, #2
+ 8003a76:	701a      	strb	r2, [r3, #0]
+ 8003a78:	e095      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003a7a:	231b      	movs	r3, #27
+ 8003a7c:	2218      	movs	r2, #24
+ 8003a7e:	189b      	adds	r3, r3, r2
+ 8003a80:	19db      	adds	r3, r3, r7
+ 8003a82:	2204      	movs	r2, #4
+ 8003a84:	701a      	strb	r2, [r3, #0]
+ 8003a86:	e08e      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003a88:	231b      	movs	r3, #27
+ 8003a8a:	2218      	movs	r2, #24
+ 8003a8c:	189b      	adds	r3, r3, r2
+ 8003a8e:	19db      	adds	r3, r3, r7
+ 8003a90:	2208      	movs	r2, #8
+ 8003a92:	701a      	strb	r2, [r3, #0]
+ 8003a94:	e087      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003a96:	231b      	movs	r3, #27
+ 8003a98:	2218      	movs	r2, #24
+ 8003a9a:	189b      	adds	r3, r3, r2
+ 8003a9c:	19db      	adds	r3, r3, r7
+ 8003a9e:	2210      	movs	r2, #16
+ 8003aa0:	701a      	strb	r2, [r3, #0]
+ 8003aa2:	e080      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003aa4:	69fb      	ldr	r3, [r7, #28]
+ 8003aa6:	681b      	ldr	r3, [r3, #0]
+ 8003aa8:	4a99      	ldr	r2, [pc, #612]	; (8003d10 <UART_SetConfig+0x364>)
+ 8003aaa:	4293      	cmp	r3, r2
+ 8003aac:	d131      	bne.n	8003b12 <UART_SetConfig+0x166>
+ 8003aae:	4b97      	ldr	r3, [pc, #604]	; (8003d0c <UART_SetConfig+0x360>)
+ 8003ab0:	6cdb      	ldr	r3, [r3, #76]	; 0x4c
+ 8003ab2:	220c      	movs	r2, #12
+ 8003ab4:	4013      	ands	r3, r2
+ 8003ab6:	2b0c      	cmp	r3, #12
+ 8003ab8:	d01d      	beq.n	8003af6 <UART_SetConfig+0x14a>
+ 8003aba:	d823      	bhi.n	8003b04 <UART_SetConfig+0x158>
+ 8003abc:	2b08      	cmp	r3, #8
+ 8003abe:	d00c      	beq.n	8003ada <UART_SetConfig+0x12e>
+ 8003ac0:	d820      	bhi.n	8003b04 <UART_SetConfig+0x158>
+ 8003ac2:	2b00      	cmp	r3, #0
+ 8003ac4:	d002      	beq.n	8003acc <UART_SetConfig+0x120>
+ 8003ac6:	2b04      	cmp	r3, #4
+ 8003ac8:	d00e      	beq.n	8003ae8 <UART_SetConfig+0x13c>
+ 8003aca:	e01b      	b.n	8003b04 <UART_SetConfig+0x158>
+ 8003acc:	231b      	movs	r3, #27
+ 8003ace:	2218      	movs	r2, #24
+ 8003ad0:	189b      	adds	r3, r3, r2
+ 8003ad2:	19db      	adds	r3, r3, r7
+ 8003ad4:	2200      	movs	r2, #0
+ 8003ad6:	701a      	strb	r2, [r3, #0]
+ 8003ad8:	e065      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003ada:	231b      	movs	r3, #27
+ 8003adc:	2218      	movs	r2, #24
+ 8003ade:	189b      	adds	r3, r3, r2
+ 8003ae0:	19db      	adds	r3, r3, r7
+ 8003ae2:	2202      	movs	r2, #2
+ 8003ae4:	701a      	strb	r2, [r3, #0]
+ 8003ae6:	e05e      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003ae8:	231b      	movs	r3, #27
+ 8003aea:	2218      	movs	r2, #24
+ 8003aec:	189b      	adds	r3, r3, r2
+ 8003aee:	19db      	adds	r3, r3, r7
+ 8003af0:	2204      	movs	r2, #4
+ 8003af2:	701a      	strb	r2, [r3, #0]
+ 8003af4:	e057      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003af6:	231b      	movs	r3, #27
+ 8003af8:	2218      	movs	r2, #24
+ 8003afa:	189b      	adds	r3, r3, r2
+ 8003afc:	19db      	adds	r3, r3, r7
+ 8003afe:	2208      	movs	r2, #8
+ 8003b00:	701a      	strb	r2, [r3, #0]
+ 8003b02:	e050      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003b04:	231b      	movs	r3, #27
+ 8003b06:	2218      	movs	r2, #24
+ 8003b08:	189b      	adds	r3, r3, r2
+ 8003b0a:	19db      	adds	r3, r3, r7
+ 8003b0c:	2210      	movs	r2, #16
+ 8003b0e:	701a      	strb	r2, [r3, #0]
+ 8003b10:	e049      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003b12:	69fb      	ldr	r3, [r7, #28]
+ 8003b14:	681b      	ldr	r3, [r3, #0]
+ 8003b16:	4a7a      	ldr	r2, [pc, #488]	; (8003d00 <UART_SetConfig+0x354>)
+ 8003b18:	4293      	cmp	r3, r2
+ 8003b1a:	d13e      	bne.n	8003b9a <UART_SetConfig+0x1ee>
+ 8003b1c:	4b7b      	ldr	r3, [pc, #492]	; (8003d0c <UART_SetConfig+0x360>)
+ 8003b1e:	6cda      	ldr	r2, [r3, #76]	; 0x4c
+ 8003b20:	23c0      	movs	r3, #192	; 0xc0
+ 8003b22:	011b      	lsls	r3, r3, #4
+ 8003b24:	4013      	ands	r3, r2
+ 8003b26:	22c0      	movs	r2, #192	; 0xc0
+ 8003b28:	0112      	lsls	r2, r2, #4
+ 8003b2a:	4293      	cmp	r3, r2
+ 8003b2c:	d027      	beq.n	8003b7e <UART_SetConfig+0x1d2>
+ 8003b2e:	22c0      	movs	r2, #192	; 0xc0
+ 8003b30:	0112      	lsls	r2, r2, #4
+ 8003b32:	4293      	cmp	r3, r2
+ 8003b34:	d82a      	bhi.n	8003b8c <UART_SetConfig+0x1e0>
+ 8003b36:	2280      	movs	r2, #128	; 0x80
+ 8003b38:	0112      	lsls	r2, r2, #4
+ 8003b3a:	4293      	cmp	r3, r2
+ 8003b3c:	d011      	beq.n	8003b62 <UART_SetConfig+0x1b6>
+ 8003b3e:	2280      	movs	r2, #128	; 0x80
+ 8003b40:	0112      	lsls	r2, r2, #4
+ 8003b42:	4293      	cmp	r3, r2
+ 8003b44:	d822      	bhi.n	8003b8c <UART_SetConfig+0x1e0>
+ 8003b46:	2b00      	cmp	r3, #0
+ 8003b48:	d004      	beq.n	8003b54 <UART_SetConfig+0x1a8>
+ 8003b4a:	2280      	movs	r2, #128	; 0x80
+ 8003b4c:	00d2      	lsls	r2, r2, #3
+ 8003b4e:	4293      	cmp	r3, r2
+ 8003b50:	d00e      	beq.n	8003b70 <UART_SetConfig+0x1c4>
+ 8003b52:	e01b      	b.n	8003b8c <UART_SetConfig+0x1e0>
+ 8003b54:	231b      	movs	r3, #27
+ 8003b56:	2218      	movs	r2, #24
+ 8003b58:	189b      	adds	r3, r3, r2
+ 8003b5a:	19db      	adds	r3, r3, r7
+ 8003b5c:	2200      	movs	r2, #0
+ 8003b5e:	701a      	strb	r2, [r3, #0]
+ 8003b60:	e021      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003b62:	231b      	movs	r3, #27
+ 8003b64:	2218      	movs	r2, #24
+ 8003b66:	189b      	adds	r3, r3, r2
+ 8003b68:	19db      	adds	r3, r3, r7
+ 8003b6a:	2202      	movs	r2, #2
+ 8003b6c:	701a      	strb	r2, [r3, #0]
+ 8003b6e:	e01a      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003b70:	231b      	movs	r3, #27
+ 8003b72:	2218      	movs	r2, #24
+ 8003b74:	189b      	adds	r3, r3, r2
+ 8003b76:	19db      	adds	r3, r3, r7
+ 8003b78:	2204      	movs	r2, #4
+ 8003b7a:	701a      	strb	r2, [r3, #0]
+ 8003b7c:	e013      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003b7e:	231b      	movs	r3, #27
+ 8003b80:	2218      	movs	r2, #24
+ 8003b82:	189b      	adds	r3, r3, r2
+ 8003b84:	19db      	adds	r3, r3, r7
+ 8003b86:	2208      	movs	r2, #8
+ 8003b88:	701a      	strb	r2, [r3, #0]
+ 8003b8a:	e00c      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003b8c:	231b      	movs	r3, #27
+ 8003b8e:	2218      	movs	r2, #24
+ 8003b90:	189b      	adds	r3, r3, r2
+ 8003b92:	19db      	adds	r3, r3, r7
+ 8003b94:	2210      	movs	r2, #16
+ 8003b96:	701a      	strb	r2, [r3, #0]
+ 8003b98:	e005      	b.n	8003ba6 <UART_SetConfig+0x1fa>
+ 8003b9a:	231b      	movs	r3, #27
+ 8003b9c:	2218      	movs	r2, #24
+ 8003b9e:	189b      	adds	r3, r3, r2
+ 8003ba0:	19db      	adds	r3, r3, r7
+ 8003ba2:	2210      	movs	r2, #16
+ 8003ba4:	701a      	strb	r2, [r3, #0]
 
   /* Check LPUART instance */
   if (UART_INSTANCE_LOWPOWER(huart))
- 800431e:	69fb      	ldr	r3, [r7, #28]
- 8004320:	681b      	ldr	r3, [r3, #0]
- 8004322:	4a55      	ldr	r2, [pc, #340]	; (8004478 <UART_SetConfig+0x354>)
- 8004324:	4293      	cmp	r3, r2
- 8004326:	d000      	beq.n	800432a <UART_SetConfig+0x206>
- 8004328:	e084      	b.n	8004434 <UART_SetConfig+0x310>
+ 8003ba6:	69fb      	ldr	r3, [r7, #28]
+ 8003ba8:	681b      	ldr	r3, [r3, #0]
+ 8003baa:	4a55      	ldr	r2, [pc, #340]	; (8003d00 <UART_SetConfig+0x354>)
+ 8003bac:	4293      	cmp	r3, r2
+ 8003bae:	d000      	beq.n	8003bb2 <UART_SetConfig+0x206>
+ 8003bb0:	e084      	b.n	8003cbc <UART_SetConfig+0x310>
   {
     /* Retrieve frequency clock */
     switch (clocksource)
- 800432a:	231b      	movs	r3, #27
- 800432c:	2218      	movs	r2, #24
- 800432e:	189b      	adds	r3, r3, r2
- 8004330:	19db      	adds	r3, r3, r7
- 8004332:	781b      	ldrb	r3, [r3, #0]
- 8004334:	2b08      	cmp	r3, #8
- 8004336:	d01d      	beq.n	8004374 <UART_SetConfig+0x250>
- 8004338:	dc20      	bgt.n	800437c <UART_SetConfig+0x258>
- 800433a:	2b04      	cmp	r3, #4
- 800433c:	d015      	beq.n	800436a <UART_SetConfig+0x246>
- 800433e:	dc1d      	bgt.n	800437c <UART_SetConfig+0x258>
- 8004340:	2b00      	cmp	r3, #0
- 8004342:	d002      	beq.n	800434a <UART_SetConfig+0x226>
- 8004344:	2b02      	cmp	r3, #2
- 8004346:	d005      	beq.n	8004354 <UART_SetConfig+0x230>
- 8004348:	e018      	b.n	800437c <UART_SetConfig+0x258>
+ 8003bb2:	231b      	movs	r3, #27
+ 8003bb4:	2218      	movs	r2, #24
+ 8003bb6:	189b      	adds	r3, r3, r2
+ 8003bb8:	19db      	adds	r3, r3, r7
+ 8003bba:	781b      	ldrb	r3, [r3, #0]
+ 8003bbc:	2b08      	cmp	r3, #8
+ 8003bbe:	d01d      	beq.n	8003bfc <UART_SetConfig+0x250>
+ 8003bc0:	dc20      	bgt.n	8003c04 <UART_SetConfig+0x258>
+ 8003bc2:	2b04      	cmp	r3, #4
+ 8003bc4:	d015      	beq.n	8003bf2 <UART_SetConfig+0x246>
+ 8003bc6:	dc1d      	bgt.n	8003c04 <UART_SetConfig+0x258>
+ 8003bc8:	2b00      	cmp	r3, #0
+ 8003bca:	d002      	beq.n	8003bd2 <UART_SetConfig+0x226>
+ 8003bcc:	2b02      	cmp	r3, #2
+ 8003bce:	d005      	beq.n	8003bdc <UART_SetConfig+0x230>
+ 8003bd0:	e018      	b.n	8003c04 <UART_SetConfig+0x258>
     {
       case UART_CLOCKSOURCE_PCLK1:
         pclk = HAL_RCC_GetPCLK1Freq();
- 800434a:	f7fe fd1b 	bl	8002d84 <HAL_RCC_GetPCLK1Freq>
- 800434e:	0003      	movs	r3, r0
- 8004350:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003bd2:	f7fe ff91 	bl	8002af8 <HAL_RCC_GetPCLK1Freq>
+ 8003bd6:	0003      	movs	r3, r0
+ 8003bd8:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 8004352:	e01c      	b.n	800438e <UART_SetConfig+0x26a>
+ 8003bda:	e01c      	b.n	8003c16 <UART_SetConfig+0x26a>
       case UART_CLOCKSOURCE_HSI:
         if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
- 8004354:	4b4b      	ldr	r3, [pc, #300]	; (8004484 <UART_SetConfig+0x360>)
- 8004356:	681b      	ldr	r3, [r3, #0]
- 8004358:	2210      	movs	r2, #16
- 800435a:	4013      	ands	r3, r2
- 800435c:	d002      	beq.n	8004364 <UART_SetConfig+0x240>
+ 8003bdc:	4b4b      	ldr	r3, [pc, #300]	; (8003d0c <UART_SetConfig+0x360>)
+ 8003bde:	681b      	ldr	r3, [r3, #0]
+ 8003be0:	2210      	movs	r2, #16
+ 8003be2:	4013      	ands	r3, r2
+ 8003be4:	d002      	beq.n	8003bec <UART_SetConfig+0x240>
         {
           pclk = (uint32_t)(HSI_VALUE >> 2U);
- 800435e:	4b4b      	ldr	r3, [pc, #300]	; (800448c <UART_SetConfig+0x368>)
- 8004360:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003be6:	4b4b      	ldr	r3, [pc, #300]	; (8003d14 <UART_SetConfig+0x368>)
+ 8003be8:	62fb      	str	r3, [r7, #44]	; 0x2c
         }
         else
         {
           pclk = (uint32_t) HSI_VALUE;
         }
         break;
- 8004362:	e014      	b.n	800438e <UART_SetConfig+0x26a>
+ 8003bea:	e014      	b.n	8003c16 <UART_SetConfig+0x26a>
           pclk = (uint32_t) HSI_VALUE;
- 8004364:	4b4a      	ldr	r3, [pc, #296]	; (8004490 <UART_SetConfig+0x36c>)
- 8004366:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003bec:	4b4a      	ldr	r3, [pc, #296]	; (8003d18 <UART_SetConfig+0x36c>)
+ 8003bee:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 8004368:	e011      	b.n	800438e <UART_SetConfig+0x26a>
+ 8003bf0:	e011      	b.n	8003c16 <UART_SetConfig+0x26a>
       case UART_CLOCKSOURCE_SYSCLK:
         pclk = HAL_RCC_GetSysClockFreq();
- 800436a:	f7fe fc5b 	bl	8002c24 <HAL_RCC_GetSysClockFreq>
- 800436e:	0003      	movs	r3, r0
- 8004370:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003bf2:	f7fe fed1 	bl	8002998 <HAL_RCC_GetSysClockFreq>
+ 8003bf6:	0003      	movs	r3, r0
+ 8003bf8:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 8004372:	e00c      	b.n	800438e <UART_SetConfig+0x26a>
+ 8003bfa:	e00c      	b.n	8003c16 <UART_SetConfig+0x26a>
       case UART_CLOCKSOURCE_LSE:
         pclk = (uint32_t) LSE_VALUE;
- 8004374:	2380      	movs	r3, #128	; 0x80
- 8004376:	021b      	lsls	r3, r3, #8
- 8004378:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003bfc:	2380      	movs	r3, #128	; 0x80
+ 8003bfe:	021b      	lsls	r3, r3, #8
+ 8003c00:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 800437a:	e008      	b.n	800438e <UART_SetConfig+0x26a>
+ 8003c02:	e008      	b.n	8003c16 <UART_SetConfig+0x26a>
       default:
         pclk = 0U;
- 800437c:	2300      	movs	r3, #0
- 800437e:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003c04:	2300      	movs	r3, #0
+ 8003c06:	62fb      	str	r3, [r7, #44]	; 0x2c
         ret = HAL_ERROR;
- 8004380:	231a      	movs	r3, #26
- 8004382:	2218      	movs	r2, #24
- 8004384:	189b      	adds	r3, r3, r2
- 8004386:	19db      	adds	r3, r3, r7
- 8004388:	2201      	movs	r2, #1
- 800438a:	701a      	strb	r2, [r3, #0]
+ 8003c08:	231a      	movs	r3, #26
+ 8003c0a:	2218      	movs	r2, #24
+ 8003c0c:	189b      	adds	r3, r3, r2
+ 8003c0e:	19db      	adds	r3, r3, r7
+ 8003c10:	2201      	movs	r2, #1
+ 8003c12:	701a      	strb	r2, [r3, #0]
         break;
- 800438c:	46c0      	nop			; (mov r8, r8)
+ 8003c14:	46c0      	nop			; (mov r8, r8)
     }
 
     /* If proper clock source reported */
     if (pclk != 0U)
- 800438e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 8004390:	2b00      	cmp	r3, #0
- 8004392:	d100      	bne.n	8004396 <UART_SetConfig+0x272>
- 8004394:	e132      	b.n	80045fc <UART_SetConfig+0x4d8>
+ 8003c16:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8003c18:	2b00      	cmp	r3, #0
+ 8003c1a:	d100      	bne.n	8003c1e <UART_SetConfig+0x272>
+ 8003c1c:	e132      	b.n	8003e84 <UART_SetConfig+0x4d8>
     {
       /* No Prescaler applicable */
       /* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */
       if ((pclk < (3U * huart->Init.BaudRate)) ||
- 8004396:	69fb      	ldr	r3, [r7, #28]
- 8004398:	685a      	ldr	r2, [r3, #4]
- 800439a:	0013      	movs	r3, r2
- 800439c:	005b      	lsls	r3, r3, #1
- 800439e:	189b      	adds	r3, r3, r2
- 80043a0:	6afa      	ldr	r2, [r7, #44]	; 0x2c
- 80043a2:	429a      	cmp	r2, r3
- 80043a4:	d305      	bcc.n	80043b2 <UART_SetConfig+0x28e>
+ 8003c1e:	69fb      	ldr	r3, [r7, #28]
+ 8003c20:	685a      	ldr	r2, [r3, #4]
+ 8003c22:	0013      	movs	r3, r2
+ 8003c24:	005b      	lsls	r3, r3, #1
+ 8003c26:	189b      	adds	r3, r3, r2
+ 8003c28:	6afa      	ldr	r2, [r7, #44]	; 0x2c
+ 8003c2a:	429a      	cmp	r2, r3
+ 8003c2c:	d305      	bcc.n	8003c3a <UART_SetConfig+0x28e>
           (pclk > (4096U * huart->Init.BaudRate)))
- 80043a6:	69fb      	ldr	r3, [r7, #28]
- 80043a8:	685b      	ldr	r3, [r3, #4]
- 80043aa:	031b      	lsls	r3, r3, #12
+ 8003c2e:	69fb      	ldr	r3, [r7, #28]
+ 8003c30:	685b      	ldr	r3, [r3, #4]
+ 8003c32:	031b      	lsls	r3, r3, #12
       if ((pclk < (3U * huart->Init.BaudRate)) ||
- 80043ac:	6afa      	ldr	r2, [r7, #44]	; 0x2c
- 80043ae:	429a      	cmp	r2, r3
- 80043b0:	d906      	bls.n	80043c0 <UART_SetConfig+0x29c>
+ 8003c34:	6afa      	ldr	r2, [r7, #44]	; 0x2c
+ 8003c36:	429a      	cmp	r2, r3
+ 8003c38:	d906      	bls.n	8003c48 <UART_SetConfig+0x29c>
       {
         ret = HAL_ERROR;
- 80043b2:	231a      	movs	r3, #26
- 80043b4:	2218      	movs	r2, #24
- 80043b6:	189b      	adds	r3, r3, r2
- 80043b8:	19db      	adds	r3, r3, r7
- 80043ba:	2201      	movs	r2, #1
- 80043bc:	701a      	strb	r2, [r3, #0]
- 80043be:	e11d      	b.n	80045fc <UART_SetConfig+0x4d8>
+ 8003c3a:	231a      	movs	r3, #26
+ 8003c3c:	2218      	movs	r2, #24
+ 8003c3e:	189b      	adds	r3, r3, r2
+ 8003c40:	19db      	adds	r3, r3, r7
+ 8003c42:	2201      	movs	r2, #1
+ 8003c44:	701a      	strb	r2, [r3, #0]
+ 8003c46:	e11d      	b.n	8003e84 <UART_SetConfig+0x4d8>
       }
       else
       {
         usartdiv = (uint32_t)(UART_DIV_LPUART(pclk, huart->Init.BaudRate));
- 80043c0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 80043c2:	613b      	str	r3, [r7, #16]
- 80043c4:	2300      	movs	r3, #0
- 80043c6:	617b      	str	r3, [r7, #20]
- 80043c8:	6939      	ldr	r1, [r7, #16]
- 80043ca:	697a      	ldr	r2, [r7, #20]
- 80043cc:	000b      	movs	r3, r1
- 80043ce:	0e1b      	lsrs	r3, r3, #24
- 80043d0:	0010      	movs	r0, r2
- 80043d2:	0205      	lsls	r5, r0, #8
- 80043d4:	431d      	orrs	r5, r3
- 80043d6:	000b      	movs	r3, r1
- 80043d8:	021c      	lsls	r4, r3, #8
- 80043da:	69fb      	ldr	r3, [r7, #28]
- 80043dc:	685b      	ldr	r3, [r3, #4]
- 80043de:	085b      	lsrs	r3, r3, #1
- 80043e0:	60bb      	str	r3, [r7, #8]
- 80043e2:	2300      	movs	r3, #0
- 80043e4:	60fb      	str	r3, [r7, #12]
- 80043e6:	68b8      	ldr	r0, [r7, #8]
- 80043e8:	68f9      	ldr	r1, [r7, #12]
- 80043ea:	1900      	adds	r0, r0, r4
- 80043ec:	4169      	adcs	r1, r5
- 80043ee:	69fb      	ldr	r3, [r7, #28]
- 80043f0:	685b      	ldr	r3, [r3, #4]
- 80043f2:	603b      	str	r3, [r7, #0]
- 80043f4:	2300      	movs	r3, #0
- 80043f6:	607b      	str	r3, [r7, #4]
- 80043f8:	683a      	ldr	r2, [r7, #0]
- 80043fa:	687b      	ldr	r3, [r7, #4]
- 80043fc:	f7fb ff22 	bl	8000244 <__aeabi_uldivmod>
- 8004400:	0002      	movs	r2, r0
- 8004402:	000b      	movs	r3, r1
- 8004404:	0013      	movs	r3, r2
- 8004406:	62bb      	str	r3, [r7, #40]	; 0x28
+ 8003c48:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8003c4a:	613b      	str	r3, [r7, #16]
+ 8003c4c:	2300      	movs	r3, #0
+ 8003c4e:	617b      	str	r3, [r7, #20]
+ 8003c50:	6939      	ldr	r1, [r7, #16]
+ 8003c52:	697a      	ldr	r2, [r7, #20]
+ 8003c54:	000b      	movs	r3, r1
+ 8003c56:	0e1b      	lsrs	r3, r3, #24
+ 8003c58:	0010      	movs	r0, r2
+ 8003c5a:	0205      	lsls	r5, r0, #8
+ 8003c5c:	431d      	orrs	r5, r3
+ 8003c5e:	000b      	movs	r3, r1
+ 8003c60:	021c      	lsls	r4, r3, #8
+ 8003c62:	69fb      	ldr	r3, [r7, #28]
+ 8003c64:	685b      	ldr	r3, [r3, #4]
+ 8003c66:	085b      	lsrs	r3, r3, #1
+ 8003c68:	60bb      	str	r3, [r7, #8]
+ 8003c6a:	2300      	movs	r3, #0
+ 8003c6c:	60fb      	str	r3, [r7, #12]
+ 8003c6e:	68b8      	ldr	r0, [r7, #8]
+ 8003c70:	68f9      	ldr	r1, [r7, #12]
+ 8003c72:	1900      	adds	r0, r0, r4
+ 8003c74:	4169      	adcs	r1, r5
+ 8003c76:	69fb      	ldr	r3, [r7, #28]
+ 8003c78:	685b      	ldr	r3, [r3, #4]
+ 8003c7a:	603b      	str	r3, [r7, #0]
+ 8003c7c:	2300      	movs	r3, #0
+ 8003c7e:	607b      	str	r3, [r7, #4]
+ 8003c80:	683a      	ldr	r2, [r7, #0]
+ 8003c82:	687b      	ldr	r3, [r7, #4]
+ 8003c84:	f7fc fade 	bl	8000244 <__aeabi_uldivmod>
+ 8003c88:	0002      	movs	r2, r0
+ 8003c8a:	000b      	movs	r3, r1
+ 8003c8c:	0013      	movs	r3, r2
+ 8003c8e:	62bb      	str	r3, [r7, #40]	; 0x28
         if ((usartdiv >= LPUART_BRR_MIN) && (usartdiv <= LPUART_BRR_MAX))
- 8004408:	6aba      	ldr	r2, [r7, #40]	; 0x28
- 800440a:	23c0      	movs	r3, #192	; 0xc0
- 800440c:	009b      	lsls	r3, r3, #2
- 800440e:	429a      	cmp	r2, r3
- 8004410:	d309      	bcc.n	8004426 <UART_SetConfig+0x302>
- 8004412:	6aba      	ldr	r2, [r7, #40]	; 0x28
- 8004414:	2380      	movs	r3, #128	; 0x80
- 8004416:	035b      	lsls	r3, r3, #13
- 8004418:	429a      	cmp	r2, r3
- 800441a:	d204      	bcs.n	8004426 <UART_SetConfig+0x302>
+ 8003c90:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 8003c92:	23c0      	movs	r3, #192	; 0xc0
+ 8003c94:	009b      	lsls	r3, r3, #2
+ 8003c96:	429a      	cmp	r2, r3
+ 8003c98:	d309      	bcc.n	8003cae <UART_SetConfig+0x302>
+ 8003c9a:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 8003c9c:	2380      	movs	r3, #128	; 0x80
+ 8003c9e:	035b      	lsls	r3, r3, #13
+ 8003ca0:	429a      	cmp	r2, r3
+ 8003ca2:	d204      	bcs.n	8003cae <UART_SetConfig+0x302>
         {
           huart->Instance->BRR = usartdiv;
- 800441c:	69fb      	ldr	r3, [r7, #28]
- 800441e:	681b      	ldr	r3, [r3, #0]
- 8004420:	6aba      	ldr	r2, [r7, #40]	; 0x28
- 8004422:	60da      	str	r2, [r3, #12]
- 8004424:	e0ea      	b.n	80045fc <UART_SetConfig+0x4d8>
+ 8003ca4:	69fb      	ldr	r3, [r7, #28]
+ 8003ca6:	681b      	ldr	r3, [r3, #0]
+ 8003ca8:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 8003caa:	60da      	str	r2, [r3, #12]
+ 8003cac:	e0ea      	b.n	8003e84 <UART_SetConfig+0x4d8>
         }
         else
         {
           ret = HAL_ERROR;
- 8004426:	231a      	movs	r3, #26
- 8004428:	2218      	movs	r2, #24
- 800442a:	189b      	adds	r3, r3, r2
- 800442c:	19db      	adds	r3, r3, r7
- 800442e:	2201      	movs	r2, #1
- 8004430:	701a      	strb	r2, [r3, #0]
- 8004432:	e0e3      	b.n	80045fc <UART_SetConfig+0x4d8>
+ 8003cae:	231a      	movs	r3, #26
+ 8003cb0:	2218      	movs	r2, #24
+ 8003cb2:	189b      	adds	r3, r3, r2
+ 8003cb4:	19db      	adds	r3, r3, r7
+ 8003cb6:	2201      	movs	r2, #1
+ 8003cb8:	701a      	strb	r2, [r3, #0]
+ 8003cba:	e0e3      	b.n	8003e84 <UART_SetConfig+0x4d8>
         }
       } /* if ( (pclk < (3 * huart->Init.BaudRate) ) || (pclk > (4096 * huart->Init.BaudRate) )) */
     } /* if (pclk != 0) */
   }
   /* Check UART Over Sampling to set Baud Rate Register */
   else if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
- 8004434:	69fb      	ldr	r3, [r7, #28]
- 8004436:	69da      	ldr	r2, [r3, #28]
- 8004438:	2380      	movs	r3, #128	; 0x80
- 800443a:	021b      	lsls	r3, r3, #8
- 800443c:	429a      	cmp	r2, r3
- 800443e:	d000      	beq.n	8004442 <UART_SetConfig+0x31e>
- 8004440:	e085      	b.n	800454e <UART_SetConfig+0x42a>
+ 8003cbc:	69fb      	ldr	r3, [r7, #28]
+ 8003cbe:	69da      	ldr	r2, [r3, #28]
+ 8003cc0:	2380      	movs	r3, #128	; 0x80
+ 8003cc2:	021b      	lsls	r3, r3, #8
+ 8003cc4:	429a      	cmp	r2, r3
+ 8003cc6:	d000      	beq.n	8003cca <UART_SetConfig+0x31e>
+ 8003cc8:	e085      	b.n	8003dd6 <UART_SetConfig+0x42a>
   {
     switch (clocksource)
- 8004442:	231b      	movs	r3, #27
- 8004444:	2218      	movs	r2, #24
- 8004446:	189b      	adds	r3, r3, r2
- 8004448:	19db      	adds	r3, r3, r7
- 800444a:	781b      	ldrb	r3, [r3, #0]
- 800444c:	2b08      	cmp	r3, #8
- 800444e:	d837      	bhi.n	80044c0 <UART_SetConfig+0x39c>
- 8004450:	009a      	lsls	r2, r3, #2
- 8004452:	4b10      	ldr	r3, [pc, #64]	; (8004494 <UART_SetConfig+0x370>)
- 8004454:	18d3      	adds	r3, r2, r3
- 8004456:	681b      	ldr	r3, [r3, #0]
- 8004458:	469f      	mov	pc, r3
+ 8003cca:	231b      	movs	r3, #27
+ 8003ccc:	2218      	movs	r2, #24
+ 8003cce:	189b      	adds	r3, r3, r2
+ 8003cd0:	19db      	adds	r3, r3, r7
+ 8003cd2:	781b      	ldrb	r3, [r3, #0]
+ 8003cd4:	2b08      	cmp	r3, #8
+ 8003cd6:	d837      	bhi.n	8003d48 <UART_SetConfig+0x39c>
+ 8003cd8:	009a      	lsls	r2, r3, #2
+ 8003cda:	4b10      	ldr	r3, [pc, #64]	; (8003d1c <UART_SetConfig+0x370>)
+ 8003cdc:	18d3      	adds	r3, r2, r3
+ 8003cde:	681b      	ldr	r3, [r3, #0]
+ 8003ce0:	469f      	mov	pc, r3
     {
       case UART_CLOCKSOURCE_PCLK1:
         pclk = HAL_RCC_GetPCLK1Freq();
- 800445a:	f7fe fc93 	bl	8002d84 <HAL_RCC_GetPCLK1Freq>
- 800445e:	0003      	movs	r3, r0
- 8004460:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003ce2:	f7fe ff09 	bl	8002af8 <HAL_RCC_GetPCLK1Freq>
+ 8003ce6:	0003      	movs	r3, r0
+ 8003ce8:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 8004462:	e036      	b.n	80044d2 <UART_SetConfig+0x3ae>
+ 8003cea:	e036      	b.n	8003d5a <UART_SetConfig+0x3ae>
       case UART_CLOCKSOURCE_PCLK2:
         pclk = HAL_RCC_GetPCLK2Freq();
- 8004464:	f7fe fca4 	bl	8002db0 <HAL_RCC_GetPCLK2Freq>
- 8004468:	0003      	movs	r3, r0
- 800446a:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003cec:	f7fe ff1a 	bl	8002b24 <HAL_RCC_GetPCLK2Freq>
+ 8003cf0:	0003      	movs	r3, r0
+ 8003cf2:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 800446c:	e031      	b.n	80044d2 <UART_SetConfig+0x3ae>
- 800446e:	46c0      	nop			; (mov r8, r8)
- 8004470:	efff69f3 	.word	0xefff69f3
- 8004474:	ffffcfff 	.word	0xffffcfff
- 8004478:	40004800 	.word	0x40004800
- 800447c:	fffff4ff 	.word	0xfffff4ff
- 8004480:	40013800 	.word	0x40013800
- 8004484:	40021000 	.word	0x40021000
- 8004488:	40004400 	.word	0x40004400
- 800448c:	003d0900 	.word	0x003d0900
- 8004490:	00f42400 	.word	0x00f42400
- 8004494:	080059fc 	.word	0x080059fc
+ 8003cf4:	e031      	b.n	8003d5a <UART_SetConfig+0x3ae>
+ 8003cf6:	46c0      	nop			; (mov r8, r8)
+ 8003cf8:	efff69f3 	.word	0xefff69f3
+ 8003cfc:	ffffcfff 	.word	0xffffcfff
+ 8003d00:	40004800 	.word	0x40004800
+ 8003d04:	fffff4ff 	.word	0xfffff4ff
+ 8003d08:	40013800 	.word	0x40013800
+ 8003d0c:	40021000 	.word	0x40021000
+ 8003d10:	40004400 	.word	0x40004400
+ 8003d14:	003d0900 	.word	0x003d0900
+ 8003d18:	00f42400 	.word	0x00f42400
+ 8003d1c:	08004cd4 	.word	0x08004cd4
       case UART_CLOCKSOURCE_HSI:
         if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
- 8004498:	4b60      	ldr	r3, [pc, #384]	; (800461c <UART_SetConfig+0x4f8>)
- 800449a:	681b      	ldr	r3, [r3, #0]
- 800449c:	2210      	movs	r2, #16
- 800449e:	4013      	ands	r3, r2
- 80044a0:	d002      	beq.n	80044a8 <UART_SetConfig+0x384>
+ 8003d20:	4b60      	ldr	r3, [pc, #384]	; (8003ea4 <UART_SetConfig+0x4f8>)
+ 8003d22:	681b      	ldr	r3, [r3, #0]
+ 8003d24:	2210      	movs	r2, #16
+ 8003d26:	4013      	ands	r3, r2
+ 8003d28:	d002      	beq.n	8003d30 <UART_SetConfig+0x384>
         {
           pclk = (uint32_t)(HSI_VALUE >> 2U);
- 80044a2:	4b5f      	ldr	r3, [pc, #380]	; (8004620 <UART_SetConfig+0x4fc>)
- 80044a4:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003d2a:	4b5f      	ldr	r3, [pc, #380]	; (8003ea8 <UART_SetConfig+0x4fc>)
+ 8003d2c:	62fb      	str	r3, [r7, #44]	; 0x2c
         }
         else
         {
           pclk = (uint32_t) HSI_VALUE;
         }
         break;
- 80044a6:	e014      	b.n	80044d2 <UART_SetConfig+0x3ae>
+ 8003d2e:	e014      	b.n	8003d5a <UART_SetConfig+0x3ae>
           pclk = (uint32_t) HSI_VALUE;
- 80044a8:	4b5e      	ldr	r3, [pc, #376]	; (8004624 <UART_SetConfig+0x500>)
- 80044aa:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003d30:	4b5e      	ldr	r3, [pc, #376]	; (8003eac <UART_SetConfig+0x500>)
+ 8003d32:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 80044ac:	e011      	b.n	80044d2 <UART_SetConfig+0x3ae>
+ 8003d34:	e011      	b.n	8003d5a <UART_SetConfig+0x3ae>
       case UART_CLOCKSOURCE_SYSCLK:
         pclk = HAL_RCC_GetSysClockFreq();
- 80044ae:	f7fe fbb9 	bl	8002c24 <HAL_RCC_GetSysClockFreq>
- 80044b2:	0003      	movs	r3, r0
- 80044b4:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003d36:	f7fe fe2f 	bl	8002998 <HAL_RCC_GetSysClockFreq>
+ 8003d3a:	0003      	movs	r3, r0
+ 8003d3c:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 80044b6:	e00c      	b.n	80044d2 <UART_SetConfig+0x3ae>
+ 8003d3e:	e00c      	b.n	8003d5a <UART_SetConfig+0x3ae>
       case UART_CLOCKSOURCE_LSE:
         pclk = (uint32_t) LSE_VALUE;
- 80044b8:	2380      	movs	r3, #128	; 0x80
- 80044ba:	021b      	lsls	r3, r3, #8
- 80044bc:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003d40:	2380      	movs	r3, #128	; 0x80
+ 8003d42:	021b      	lsls	r3, r3, #8
+ 8003d44:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 80044be:	e008      	b.n	80044d2 <UART_SetConfig+0x3ae>
+ 8003d46:	e008      	b.n	8003d5a <UART_SetConfig+0x3ae>
       default:
         pclk = 0U;
- 80044c0:	2300      	movs	r3, #0
- 80044c2:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003d48:	2300      	movs	r3, #0
+ 8003d4a:	62fb      	str	r3, [r7, #44]	; 0x2c
         ret = HAL_ERROR;
- 80044c4:	231a      	movs	r3, #26
- 80044c6:	2218      	movs	r2, #24
- 80044c8:	189b      	adds	r3, r3, r2
- 80044ca:	19db      	adds	r3, r3, r7
- 80044cc:	2201      	movs	r2, #1
- 80044ce:	701a      	strb	r2, [r3, #0]
+ 8003d4c:	231a      	movs	r3, #26
+ 8003d4e:	2218      	movs	r2, #24
+ 8003d50:	189b      	adds	r3, r3, r2
+ 8003d52:	19db      	adds	r3, r3, r7
+ 8003d54:	2201      	movs	r2, #1
+ 8003d56:	701a      	strb	r2, [r3, #0]
         break;
- 80044d0:	46c0      	nop			; (mov r8, r8)
+ 8003d58:	46c0      	nop			; (mov r8, r8)
     }
 
     /* USARTDIV must be greater than or equal to 0d16 */
     if (pclk != 0U)
- 80044d2:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 80044d4:	2b00      	cmp	r3, #0
- 80044d6:	d100      	bne.n	80044da <UART_SetConfig+0x3b6>
- 80044d8:	e090      	b.n	80045fc <UART_SetConfig+0x4d8>
+ 8003d5a:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8003d5c:	2b00      	cmp	r3, #0
+ 8003d5e:	d100      	bne.n	8003d62 <UART_SetConfig+0x3b6>
+ 8003d60:	e090      	b.n	8003e84 <UART_SetConfig+0x4d8>
     {
       usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate));
- 80044da:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 80044dc:	005a      	lsls	r2, r3, #1
- 80044de:	69fb      	ldr	r3, [r7, #28]
- 80044e0:	685b      	ldr	r3, [r3, #4]
- 80044e2:	085b      	lsrs	r3, r3, #1
- 80044e4:	18d2      	adds	r2, r2, r3
- 80044e6:	69fb      	ldr	r3, [r7, #28]
- 80044e8:	685b      	ldr	r3, [r3, #4]
- 80044ea:	0019      	movs	r1, r3
- 80044ec:	0010      	movs	r0, r2
- 80044ee:	f7fb fe1d 	bl	800012c <__udivsi3>
- 80044f2:	0003      	movs	r3, r0
- 80044f4:	62bb      	str	r3, [r7, #40]	; 0x28
+ 8003d62:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8003d64:	005a      	lsls	r2, r3, #1
+ 8003d66:	69fb      	ldr	r3, [r7, #28]
+ 8003d68:	685b      	ldr	r3, [r3, #4]
+ 8003d6a:	085b      	lsrs	r3, r3, #1
+ 8003d6c:	18d2      	adds	r2, r2, r3
+ 8003d6e:	69fb      	ldr	r3, [r7, #28]
+ 8003d70:	685b      	ldr	r3, [r3, #4]
+ 8003d72:	0019      	movs	r1, r3
+ 8003d74:	0010      	movs	r0, r2
+ 8003d76:	f7fc f9d9 	bl	800012c <__udivsi3>
+ 8003d7a:	0003      	movs	r3, r0
+ 8003d7c:	62bb      	str	r3, [r7, #40]	; 0x28
       if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 80044f6:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 80044f8:	2b0f      	cmp	r3, #15
- 80044fa:	d921      	bls.n	8004540 <UART_SetConfig+0x41c>
- 80044fc:	6aba      	ldr	r2, [r7, #40]	; 0x28
- 80044fe:	2380      	movs	r3, #128	; 0x80
- 8004500:	025b      	lsls	r3, r3, #9
- 8004502:	429a      	cmp	r2, r3
- 8004504:	d21c      	bcs.n	8004540 <UART_SetConfig+0x41c>
+ 8003d7e:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8003d80:	2b0f      	cmp	r3, #15
+ 8003d82:	d921      	bls.n	8003dc8 <UART_SetConfig+0x41c>
+ 8003d84:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 8003d86:	2380      	movs	r3, #128	; 0x80
+ 8003d88:	025b      	lsls	r3, r3, #9
+ 8003d8a:	429a      	cmp	r2, r3
+ 8003d8c:	d21c      	bcs.n	8003dc8 <UART_SetConfig+0x41c>
       {
         brrtemp = (uint16_t)(usartdiv & 0xFFF0U);
- 8004506:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 8004508:	b29a      	uxth	r2, r3
- 800450a:	200e      	movs	r0, #14
- 800450c:	2418      	movs	r4, #24
- 800450e:	1903      	adds	r3, r0, r4
- 8004510:	19db      	adds	r3, r3, r7
- 8004512:	210f      	movs	r1, #15
- 8004514:	438a      	bics	r2, r1
- 8004516:	801a      	strh	r2, [r3, #0]
+ 8003d8e:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8003d90:	b29a      	uxth	r2, r3
+ 8003d92:	200e      	movs	r0, #14
+ 8003d94:	2418      	movs	r4, #24
+ 8003d96:	1903      	adds	r3, r0, r4
+ 8003d98:	19db      	adds	r3, r3, r7
+ 8003d9a:	210f      	movs	r1, #15
+ 8003d9c:	438a      	bics	r2, r1
+ 8003d9e:	801a      	strh	r2, [r3, #0]
         brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
- 8004518:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 800451a:	085b      	lsrs	r3, r3, #1
- 800451c:	b29b      	uxth	r3, r3
- 800451e:	2207      	movs	r2, #7
- 8004520:	4013      	ands	r3, r2
- 8004522:	b299      	uxth	r1, r3
- 8004524:	1903      	adds	r3, r0, r4
- 8004526:	19db      	adds	r3, r3, r7
- 8004528:	1902      	adds	r2, r0, r4
- 800452a:	19d2      	adds	r2, r2, r7
- 800452c:	8812      	ldrh	r2, [r2, #0]
- 800452e:	430a      	orrs	r2, r1
- 8004530:	801a      	strh	r2, [r3, #0]
+ 8003da0:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8003da2:	085b      	lsrs	r3, r3, #1
+ 8003da4:	b29b      	uxth	r3, r3
+ 8003da6:	2207      	movs	r2, #7
+ 8003da8:	4013      	ands	r3, r2
+ 8003daa:	b299      	uxth	r1, r3
+ 8003dac:	1903      	adds	r3, r0, r4
+ 8003dae:	19db      	adds	r3, r3, r7
+ 8003db0:	1902      	adds	r2, r0, r4
+ 8003db2:	19d2      	adds	r2, r2, r7
+ 8003db4:	8812      	ldrh	r2, [r2, #0]
+ 8003db6:	430a      	orrs	r2, r1
+ 8003db8:	801a      	strh	r2, [r3, #0]
         huart->Instance->BRR = brrtemp;
- 8004532:	69fb      	ldr	r3, [r7, #28]
- 8004534:	681b      	ldr	r3, [r3, #0]
- 8004536:	1902      	adds	r2, r0, r4
- 8004538:	19d2      	adds	r2, r2, r7
- 800453a:	8812      	ldrh	r2, [r2, #0]
- 800453c:	60da      	str	r2, [r3, #12]
- 800453e:	e05d      	b.n	80045fc <UART_SetConfig+0x4d8>
+ 8003dba:	69fb      	ldr	r3, [r7, #28]
+ 8003dbc:	681b      	ldr	r3, [r3, #0]
+ 8003dbe:	1902      	adds	r2, r0, r4
+ 8003dc0:	19d2      	adds	r2, r2, r7
+ 8003dc2:	8812      	ldrh	r2, [r2, #0]
+ 8003dc4:	60da      	str	r2, [r3, #12]
+ 8003dc6:	e05d      	b.n	8003e84 <UART_SetConfig+0x4d8>
       }
       else
       {
         ret = HAL_ERROR;
- 8004540:	231a      	movs	r3, #26
- 8004542:	2218      	movs	r2, #24
- 8004544:	189b      	adds	r3, r3, r2
- 8004546:	19db      	adds	r3, r3, r7
- 8004548:	2201      	movs	r2, #1
- 800454a:	701a      	strb	r2, [r3, #0]
- 800454c:	e056      	b.n	80045fc <UART_SetConfig+0x4d8>
+ 8003dc8:	231a      	movs	r3, #26
+ 8003dca:	2218      	movs	r2, #24
+ 8003dcc:	189b      	adds	r3, r3, r2
+ 8003dce:	19db      	adds	r3, r3, r7
+ 8003dd0:	2201      	movs	r2, #1
+ 8003dd2:	701a      	strb	r2, [r3, #0]
+ 8003dd4:	e056      	b.n	8003e84 <UART_SetConfig+0x4d8>
       }
     }
   }
   else
   {
     switch (clocksource)
- 800454e:	231b      	movs	r3, #27
- 8004550:	2218      	movs	r2, #24
- 8004552:	189b      	adds	r3, r3, r2
- 8004554:	19db      	adds	r3, r3, r7
- 8004556:	781b      	ldrb	r3, [r3, #0]
- 8004558:	2b08      	cmp	r3, #8
- 800455a:	d822      	bhi.n	80045a2 <UART_SetConfig+0x47e>
- 800455c:	009a      	lsls	r2, r3, #2
- 800455e:	4b32      	ldr	r3, [pc, #200]	; (8004628 <UART_SetConfig+0x504>)
- 8004560:	18d3      	adds	r3, r2, r3
- 8004562:	681b      	ldr	r3, [r3, #0]
- 8004564:	469f      	mov	pc, r3
+ 8003dd6:	231b      	movs	r3, #27
+ 8003dd8:	2218      	movs	r2, #24
+ 8003dda:	189b      	adds	r3, r3, r2
+ 8003ddc:	19db      	adds	r3, r3, r7
+ 8003dde:	781b      	ldrb	r3, [r3, #0]
+ 8003de0:	2b08      	cmp	r3, #8
+ 8003de2:	d822      	bhi.n	8003e2a <UART_SetConfig+0x47e>
+ 8003de4:	009a      	lsls	r2, r3, #2
+ 8003de6:	4b32      	ldr	r3, [pc, #200]	; (8003eb0 <UART_SetConfig+0x504>)
+ 8003de8:	18d3      	adds	r3, r2, r3
+ 8003dea:	681b      	ldr	r3, [r3, #0]
+ 8003dec:	469f      	mov	pc, r3
     {
       case UART_CLOCKSOURCE_PCLK1:
         pclk = HAL_RCC_GetPCLK1Freq();
- 8004566:	f7fe fc0d 	bl	8002d84 <HAL_RCC_GetPCLK1Freq>
- 800456a:	0003      	movs	r3, r0
- 800456c:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003dee:	f7fe fe83 	bl	8002af8 <HAL_RCC_GetPCLK1Freq>
+ 8003df2:	0003      	movs	r3, r0
+ 8003df4:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 800456e:	e021      	b.n	80045b4 <UART_SetConfig+0x490>
+ 8003df6:	e021      	b.n	8003e3c <UART_SetConfig+0x490>
       case UART_CLOCKSOURCE_PCLK2:
         pclk = HAL_RCC_GetPCLK2Freq();
- 8004570:	f7fe fc1e 	bl	8002db0 <HAL_RCC_GetPCLK2Freq>
- 8004574:	0003      	movs	r3, r0
- 8004576:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003df8:	f7fe fe94 	bl	8002b24 <HAL_RCC_GetPCLK2Freq>
+ 8003dfc:	0003      	movs	r3, r0
+ 8003dfe:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 8004578:	e01c      	b.n	80045b4 <UART_SetConfig+0x490>
+ 8003e00:	e01c      	b.n	8003e3c <UART_SetConfig+0x490>
       case UART_CLOCKSOURCE_HSI:
         if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIDIV) != 0U)
- 800457a:	4b28      	ldr	r3, [pc, #160]	; (800461c <UART_SetConfig+0x4f8>)
- 800457c:	681b      	ldr	r3, [r3, #0]
- 800457e:	2210      	movs	r2, #16
- 8004580:	4013      	ands	r3, r2
- 8004582:	d002      	beq.n	800458a <UART_SetConfig+0x466>
+ 8003e02:	4b28      	ldr	r3, [pc, #160]	; (8003ea4 <UART_SetConfig+0x4f8>)
+ 8003e04:	681b      	ldr	r3, [r3, #0]
+ 8003e06:	2210      	movs	r2, #16
+ 8003e08:	4013      	ands	r3, r2
+ 8003e0a:	d002      	beq.n	8003e12 <UART_SetConfig+0x466>
         {
           pclk = (uint32_t)(HSI_VALUE >> 2U);
- 8004584:	4b26      	ldr	r3, [pc, #152]	; (8004620 <UART_SetConfig+0x4fc>)
- 8004586:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003e0c:	4b26      	ldr	r3, [pc, #152]	; (8003ea8 <UART_SetConfig+0x4fc>)
+ 8003e0e:	62fb      	str	r3, [r7, #44]	; 0x2c
         }
         else
         {
           pclk = (uint32_t) HSI_VALUE;
         }
         break;
- 8004588:	e014      	b.n	80045b4 <UART_SetConfig+0x490>
+ 8003e10:	e014      	b.n	8003e3c <UART_SetConfig+0x490>
           pclk = (uint32_t) HSI_VALUE;
- 800458a:	4b26      	ldr	r3, [pc, #152]	; (8004624 <UART_SetConfig+0x500>)
- 800458c:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003e12:	4b26      	ldr	r3, [pc, #152]	; (8003eac <UART_SetConfig+0x500>)
+ 8003e14:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 800458e:	e011      	b.n	80045b4 <UART_SetConfig+0x490>
+ 8003e16:	e011      	b.n	8003e3c <UART_SetConfig+0x490>
       case UART_CLOCKSOURCE_SYSCLK:
         pclk = HAL_RCC_GetSysClockFreq();
- 8004590:	f7fe fb48 	bl	8002c24 <HAL_RCC_GetSysClockFreq>
- 8004594:	0003      	movs	r3, r0
- 8004596:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003e18:	f7fe fdbe 	bl	8002998 <HAL_RCC_GetSysClockFreq>
+ 8003e1c:	0003      	movs	r3, r0
+ 8003e1e:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 8004598:	e00c      	b.n	80045b4 <UART_SetConfig+0x490>
+ 8003e20:	e00c      	b.n	8003e3c <UART_SetConfig+0x490>
       case UART_CLOCKSOURCE_LSE:
         pclk = (uint32_t) LSE_VALUE;
- 800459a:	2380      	movs	r3, #128	; 0x80
- 800459c:	021b      	lsls	r3, r3, #8
- 800459e:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003e22:	2380      	movs	r3, #128	; 0x80
+ 8003e24:	021b      	lsls	r3, r3, #8
+ 8003e26:	62fb      	str	r3, [r7, #44]	; 0x2c
         break;
- 80045a0:	e008      	b.n	80045b4 <UART_SetConfig+0x490>
+ 8003e28:	e008      	b.n	8003e3c <UART_SetConfig+0x490>
       default:
         pclk = 0U;
- 80045a2:	2300      	movs	r3, #0
- 80045a4:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 8003e2a:	2300      	movs	r3, #0
+ 8003e2c:	62fb      	str	r3, [r7, #44]	; 0x2c
         ret = HAL_ERROR;
- 80045a6:	231a      	movs	r3, #26
- 80045a8:	2218      	movs	r2, #24
- 80045aa:	189b      	adds	r3, r3, r2
- 80045ac:	19db      	adds	r3, r3, r7
- 80045ae:	2201      	movs	r2, #1
- 80045b0:	701a      	strb	r2, [r3, #0]
+ 8003e2e:	231a      	movs	r3, #26
+ 8003e30:	2218      	movs	r2, #24
+ 8003e32:	189b      	adds	r3, r3, r2
+ 8003e34:	19db      	adds	r3, r3, r7
+ 8003e36:	2201      	movs	r2, #1
+ 8003e38:	701a      	strb	r2, [r3, #0]
         break;
- 80045b2:	46c0      	nop			; (mov r8, r8)
+ 8003e3a:	46c0      	nop			; (mov r8, r8)
     }
 
     if (pclk != 0U)
- 80045b4:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 80045b6:	2b00      	cmp	r3, #0
- 80045b8:	d020      	beq.n	80045fc <UART_SetConfig+0x4d8>
+ 8003e3c:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8003e3e:	2b00      	cmp	r3, #0
+ 8003e40:	d020      	beq.n	8003e84 <UART_SetConfig+0x4d8>
     {
       /* USARTDIV must be greater than or equal to 0d16 */
       usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate));
- 80045ba:	69fb      	ldr	r3, [r7, #28]
- 80045bc:	685b      	ldr	r3, [r3, #4]
- 80045be:	085a      	lsrs	r2, r3, #1
- 80045c0:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 80045c2:	18d2      	adds	r2, r2, r3
- 80045c4:	69fb      	ldr	r3, [r7, #28]
- 80045c6:	685b      	ldr	r3, [r3, #4]
- 80045c8:	0019      	movs	r1, r3
- 80045ca:	0010      	movs	r0, r2
- 80045cc:	f7fb fdae 	bl	800012c <__udivsi3>
- 80045d0:	0003      	movs	r3, r0
- 80045d2:	62bb      	str	r3, [r7, #40]	; 0x28
+ 8003e42:	69fb      	ldr	r3, [r7, #28]
+ 8003e44:	685b      	ldr	r3, [r3, #4]
+ 8003e46:	085a      	lsrs	r2, r3, #1
+ 8003e48:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8003e4a:	18d2      	adds	r2, r2, r3
+ 8003e4c:	69fb      	ldr	r3, [r7, #28]
+ 8003e4e:	685b      	ldr	r3, [r3, #4]
+ 8003e50:	0019      	movs	r1, r3
+ 8003e52:	0010      	movs	r0, r2
+ 8003e54:	f7fc f96a 	bl	800012c <__udivsi3>
+ 8003e58:	0003      	movs	r3, r0
+ 8003e5a:	62bb      	str	r3, [r7, #40]	; 0x28
       if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX))
- 80045d4:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 80045d6:	2b0f      	cmp	r3, #15
- 80045d8:	d90a      	bls.n	80045f0 <UART_SetConfig+0x4cc>
- 80045da:	6aba      	ldr	r2, [r7, #40]	; 0x28
- 80045dc:	2380      	movs	r3, #128	; 0x80
- 80045de:	025b      	lsls	r3, r3, #9
- 80045e0:	429a      	cmp	r2, r3
- 80045e2:	d205      	bcs.n	80045f0 <UART_SetConfig+0x4cc>
+ 8003e5c:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8003e5e:	2b0f      	cmp	r3, #15
+ 8003e60:	d90a      	bls.n	8003e78 <UART_SetConfig+0x4cc>
+ 8003e62:	6aba      	ldr	r2, [r7, #40]	; 0x28
+ 8003e64:	2380      	movs	r3, #128	; 0x80
+ 8003e66:	025b      	lsls	r3, r3, #9
+ 8003e68:	429a      	cmp	r2, r3
+ 8003e6a:	d205      	bcs.n	8003e78 <UART_SetConfig+0x4cc>
       {
         huart->Instance->BRR = (uint16_t)usartdiv;
- 80045e4:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 80045e6:	b29a      	uxth	r2, r3
- 80045e8:	69fb      	ldr	r3, [r7, #28]
- 80045ea:	681b      	ldr	r3, [r3, #0]
- 80045ec:	60da      	str	r2, [r3, #12]
- 80045ee:	e005      	b.n	80045fc <UART_SetConfig+0x4d8>
+ 8003e6c:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8003e6e:	b29a      	uxth	r2, r3
+ 8003e70:	69fb      	ldr	r3, [r7, #28]
+ 8003e72:	681b      	ldr	r3, [r3, #0]
+ 8003e74:	60da      	str	r2, [r3, #12]
+ 8003e76:	e005      	b.n	8003e84 <UART_SetConfig+0x4d8>
       }
       else
       {
         ret = HAL_ERROR;
- 80045f0:	231a      	movs	r3, #26
- 80045f2:	2218      	movs	r2, #24
- 80045f4:	189b      	adds	r3, r3, r2
- 80045f6:	19db      	adds	r3, r3, r7
- 80045f8:	2201      	movs	r2, #1
- 80045fa:	701a      	strb	r2, [r3, #0]
+ 8003e78:	231a      	movs	r3, #26
+ 8003e7a:	2218      	movs	r2, #24
+ 8003e7c:	189b      	adds	r3, r3, r2
+ 8003e7e:	19db      	adds	r3, r3, r7
+ 8003e80:	2201      	movs	r2, #1
+ 8003e82:	701a      	strb	r2, [r3, #0]
     }
   }
 
 
   /* Clear ISR function pointers */
   huart->RxISR = NULL;
- 80045fc:	69fb      	ldr	r3, [r7, #28]
- 80045fe:	2200      	movs	r2, #0
- 8004600:	669a      	str	r2, [r3, #104]	; 0x68
+ 8003e84:	69fb      	ldr	r3, [r7, #28]
+ 8003e86:	2200      	movs	r2, #0
+ 8003e88:	669a      	str	r2, [r3, #104]	; 0x68
   huart->TxISR = NULL;
- 8004602:	69fb      	ldr	r3, [r7, #28]
- 8004604:	2200      	movs	r2, #0
- 8004606:	66da      	str	r2, [r3, #108]	; 0x6c
+ 8003e8a:	69fb      	ldr	r3, [r7, #28]
+ 8003e8c:	2200      	movs	r2, #0
+ 8003e8e:	66da      	str	r2, [r3, #108]	; 0x6c
 
   return ret;
- 8004608:	231a      	movs	r3, #26
- 800460a:	2218      	movs	r2, #24
- 800460c:	189b      	adds	r3, r3, r2
- 800460e:	19db      	adds	r3, r3, r7
- 8004610:	781b      	ldrb	r3, [r3, #0]
+ 8003e90:	231a      	movs	r3, #26
+ 8003e92:	2218      	movs	r2, #24
+ 8003e94:	189b      	adds	r3, r3, r2
+ 8003e96:	19db      	adds	r3, r3, r7
+ 8003e98:	781b      	ldrb	r3, [r3, #0]
 }
- 8004612:	0018      	movs	r0, r3
- 8004614:	46bd      	mov	sp, r7
- 8004616:	b00e      	add	sp, #56	; 0x38
- 8004618:	bdb0      	pop	{r4, r5, r7, pc}
- 800461a:	46c0      	nop			; (mov r8, r8)
- 800461c:	40021000 	.word	0x40021000
- 8004620:	003d0900 	.word	0x003d0900
- 8004624:	00f42400 	.word	0x00f42400
- 8004628:	08005a20 	.word	0x08005a20
+ 8003e9a:	0018      	movs	r0, r3
+ 8003e9c:	46bd      	mov	sp, r7
+ 8003e9e:	b00e      	add	sp, #56	; 0x38
+ 8003ea0:	bdb0      	pop	{r4, r5, r7, pc}
+ 8003ea2:	46c0      	nop			; (mov r8, r8)
+ 8003ea4:	40021000 	.word	0x40021000
+ 8003ea8:	003d0900 	.word	0x003d0900
+ 8003eac:	00f42400 	.word	0x00f42400
+ 8003eb0:	08004cf8 	.word	0x08004cf8
 
-0800462c <UART_AdvFeatureConfig>:
+08003eb4 <UART_AdvFeatureConfig>:
   * @brief Configure the UART peripheral advanced features.
   * @param huart UART handle.
   * @retval None
   */
 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
 {
- 800462c:	b580      	push	{r7, lr}
- 800462e:	b082      	sub	sp, #8
- 8004630:	af00      	add	r7, sp, #0
- 8004632:	6078      	str	r0, [r7, #4]
+ 8003eb4:	b580      	push	{r7, lr}
+ 8003eb6:	b082      	sub	sp, #8
+ 8003eb8:	af00      	add	r7, sp, #0
+ 8003eba:	6078      	str	r0, [r7, #4]
   /* Check whether the set of advanced features to configure is properly set */
   assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
 
   /* if required, configure TX pin active level inversion */
   if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
- 8004634:	687b      	ldr	r3, [r7, #4]
- 8004636:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8004638:	2201      	movs	r2, #1
- 800463a:	4013      	ands	r3, r2
- 800463c:	d00b      	beq.n	8004656 <UART_AdvFeatureConfig+0x2a>
+ 8003ebc:	687b      	ldr	r3, [r7, #4]
+ 8003ebe:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003ec0:	2201      	movs	r2, #1
+ 8003ec2:	4013      	ands	r3, r2
+ 8003ec4:	d00b      	beq.n	8003ede <UART_AdvFeatureConfig+0x2a>
   {
     assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
     MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
- 800463e:	687b      	ldr	r3, [r7, #4]
- 8004640:	681b      	ldr	r3, [r3, #0]
- 8004642:	685b      	ldr	r3, [r3, #4]
- 8004644:	4a4a      	ldr	r2, [pc, #296]	; (8004770 <UART_AdvFeatureConfig+0x144>)
- 8004646:	4013      	ands	r3, r2
- 8004648:	0019      	movs	r1, r3
- 800464a:	687b      	ldr	r3, [r7, #4]
- 800464c:	6a9a      	ldr	r2, [r3, #40]	; 0x28
- 800464e:	687b      	ldr	r3, [r7, #4]
- 8004650:	681b      	ldr	r3, [r3, #0]
- 8004652:	430a      	orrs	r2, r1
- 8004654:	605a      	str	r2, [r3, #4]
+ 8003ec6:	687b      	ldr	r3, [r7, #4]
+ 8003ec8:	681b      	ldr	r3, [r3, #0]
+ 8003eca:	685b      	ldr	r3, [r3, #4]
+ 8003ecc:	4a4a      	ldr	r2, [pc, #296]	; (8003ff8 <UART_AdvFeatureConfig+0x144>)
+ 8003ece:	4013      	ands	r3, r2
+ 8003ed0:	0019      	movs	r1, r3
+ 8003ed2:	687b      	ldr	r3, [r7, #4]
+ 8003ed4:	6a9a      	ldr	r2, [r3, #40]	; 0x28
+ 8003ed6:	687b      	ldr	r3, [r7, #4]
+ 8003ed8:	681b      	ldr	r3, [r3, #0]
+ 8003eda:	430a      	orrs	r2, r1
+ 8003edc:	605a      	str	r2, [r3, #4]
   }
 
   /* if required, configure RX pin active level inversion */
   if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
- 8004656:	687b      	ldr	r3, [r7, #4]
- 8004658:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800465a:	2202      	movs	r2, #2
- 800465c:	4013      	ands	r3, r2
- 800465e:	d00b      	beq.n	8004678 <UART_AdvFeatureConfig+0x4c>
+ 8003ede:	687b      	ldr	r3, [r7, #4]
+ 8003ee0:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003ee2:	2202      	movs	r2, #2
+ 8003ee4:	4013      	ands	r3, r2
+ 8003ee6:	d00b      	beq.n	8003f00 <UART_AdvFeatureConfig+0x4c>
   {
     assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
     MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
- 8004660:	687b      	ldr	r3, [r7, #4]
- 8004662:	681b      	ldr	r3, [r3, #0]
- 8004664:	685b      	ldr	r3, [r3, #4]
- 8004666:	4a43      	ldr	r2, [pc, #268]	; (8004774 <UART_AdvFeatureConfig+0x148>)
- 8004668:	4013      	ands	r3, r2
- 800466a:	0019      	movs	r1, r3
- 800466c:	687b      	ldr	r3, [r7, #4]
- 800466e:	6ada      	ldr	r2, [r3, #44]	; 0x2c
- 8004670:	687b      	ldr	r3, [r7, #4]
- 8004672:	681b      	ldr	r3, [r3, #0]
- 8004674:	430a      	orrs	r2, r1
- 8004676:	605a      	str	r2, [r3, #4]
+ 8003ee8:	687b      	ldr	r3, [r7, #4]
+ 8003eea:	681b      	ldr	r3, [r3, #0]
+ 8003eec:	685b      	ldr	r3, [r3, #4]
+ 8003eee:	4a43      	ldr	r2, [pc, #268]	; (8003ffc <UART_AdvFeatureConfig+0x148>)
+ 8003ef0:	4013      	ands	r3, r2
+ 8003ef2:	0019      	movs	r1, r3
+ 8003ef4:	687b      	ldr	r3, [r7, #4]
+ 8003ef6:	6ada      	ldr	r2, [r3, #44]	; 0x2c
+ 8003ef8:	687b      	ldr	r3, [r7, #4]
+ 8003efa:	681b      	ldr	r3, [r3, #0]
+ 8003efc:	430a      	orrs	r2, r1
+ 8003efe:	605a      	str	r2, [r3, #4]
   }
 
   /* if required, configure data inversion */
   if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
- 8004678:	687b      	ldr	r3, [r7, #4]
- 800467a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800467c:	2204      	movs	r2, #4
- 800467e:	4013      	ands	r3, r2
- 8004680:	d00b      	beq.n	800469a <UART_AdvFeatureConfig+0x6e>
+ 8003f00:	687b      	ldr	r3, [r7, #4]
+ 8003f02:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003f04:	2204      	movs	r2, #4
+ 8003f06:	4013      	ands	r3, r2
+ 8003f08:	d00b      	beq.n	8003f22 <UART_AdvFeatureConfig+0x6e>
   {
     assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
     MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
- 8004682:	687b      	ldr	r3, [r7, #4]
- 8004684:	681b      	ldr	r3, [r3, #0]
- 8004686:	685b      	ldr	r3, [r3, #4]
- 8004688:	4a3b      	ldr	r2, [pc, #236]	; (8004778 <UART_AdvFeatureConfig+0x14c>)
- 800468a:	4013      	ands	r3, r2
- 800468c:	0019      	movs	r1, r3
- 800468e:	687b      	ldr	r3, [r7, #4]
- 8004690:	6b1a      	ldr	r2, [r3, #48]	; 0x30
- 8004692:	687b      	ldr	r3, [r7, #4]
- 8004694:	681b      	ldr	r3, [r3, #0]
- 8004696:	430a      	orrs	r2, r1
- 8004698:	605a      	str	r2, [r3, #4]
+ 8003f0a:	687b      	ldr	r3, [r7, #4]
+ 8003f0c:	681b      	ldr	r3, [r3, #0]
+ 8003f0e:	685b      	ldr	r3, [r3, #4]
+ 8003f10:	4a3b      	ldr	r2, [pc, #236]	; (8004000 <UART_AdvFeatureConfig+0x14c>)
+ 8003f12:	4013      	ands	r3, r2
+ 8003f14:	0019      	movs	r1, r3
+ 8003f16:	687b      	ldr	r3, [r7, #4]
+ 8003f18:	6b1a      	ldr	r2, [r3, #48]	; 0x30
+ 8003f1a:	687b      	ldr	r3, [r7, #4]
+ 8003f1c:	681b      	ldr	r3, [r3, #0]
+ 8003f1e:	430a      	orrs	r2, r1
+ 8003f20:	605a      	str	r2, [r3, #4]
   }
 
   /* if required, configure RX/TX pins swap */
   if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
- 800469a:	687b      	ldr	r3, [r7, #4]
- 800469c:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800469e:	2208      	movs	r2, #8
- 80046a0:	4013      	ands	r3, r2
- 80046a2:	d00b      	beq.n	80046bc <UART_AdvFeatureConfig+0x90>
+ 8003f22:	687b      	ldr	r3, [r7, #4]
+ 8003f24:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003f26:	2208      	movs	r2, #8
+ 8003f28:	4013      	ands	r3, r2
+ 8003f2a:	d00b      	beq.n	8003f44 <UART_AdvFeatureConfig+0x90>
   {
     assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
     MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
- 80046a4:	687b      	ldr	r3, [r7, #4]
- 80046a6:	681b      	ldr	r3, [r3, #0]
- 80046a8:	685b      	ldr	r3, [r3, #4]
- 80046aa:	4a34      	ldr	r2, [pc, #208]	; (800477c <UART_AdvFeatureConfig+0x150>)
- 80046ac:	4013      	ands	r3, r2
- 80046ae:	0019      	movs	r1, r3
- 80046b0:	687b      	ldr	r3, [r7, #4]
- 80046b2:	6b5a      	ldr	r2, [r3, #52]	; 0x34
- 80046b4:	687b      	ldr	r3, [r7, #4]
- 80046b6:	681b      	ldr	r3, [r3, #0]
- 80046b8:	430a      	orrs	r2, r1
- 80046ba:	605a      	str	r2, [r3, #4]
+ 8003f2c:	687b      	ldr	r3, [r7, #4]
+ 8003f2e:	681b      	ldr	r3, [r3, #0]
+ 8003f30:	685b      	ldr	r3, [r3, #4]
+ 8003f32:	4a34      	ldr	r2, [pc, #208]	; (8004004 <UART_AdvFeatureConfig+0x150>)
+ 8003f34:	4013      	ands	r3, r2
+ 8003f36:	0019      	movs	r1, r3
+ 8003f38:	687b      	ldr	r3, [r7, #4]
+ 8003f3a:	6b5a      	ldr	r2, [r3, #52]	; 0x34
+ 8003f3c:	687b      	ldr	r3, [r7, #4]
+ 8003f3e:	681b      	ldr	r3, [r3, #0]
+ 8003f40:	430a      	orrs	r2, r1
+ 8003f42:	605a      	str	r2, [r3, #4]
   }
 
   /* if required, configure RX overrun detection disabling */
   if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
- 80046bc:	687b      	ldr	r3, [r7, #4]
- 80046be:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 80046c0:	2210      	movs	r2, #16
- 80046c2:	4013      	ands	r3, r2
- 80046c4:	d00b      	beq.n	80046de <UART_AdvFeatureConfig+0xb2>
+ 8003f44:	687b      	ldr	r3, [r7, #4]
+ 8003f46:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003f48:	2210      	movs	r2, #16
+ 8003f4a:	4013      	ands	r3, r2
+ 8003f4c:	d00b      	beq.n	8003f66 <UART_AdvFeatureConfig+0xb2>
   {
     assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
     MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
- 80046c6:	687b      	ldr	r3, [r7, #4]
- 80046c8:	681b      	ldr	r3, [r3, #0]
- 80046ca:	689b      	ldr	r3, [r3, #8]
- 80046cc:	4a2c      	ldr	r2, [pc, #176]	; (8004780 <UART_AdvFeatureConfig+0x154>)
- 80046ce:	4013      	ands	r3, r2
- 80046d0:	0019      	movs	r1, r3
- 80046d2:	687b      	ldr	r3, [r7, #4]
- 80046d4:	6b9a      	ldr	r2, [r3, #56]	; 0x38
- 80046d6:	687b      	ldr	r3, [r7, #4]
- 80046d8:	681b      	ldr	r3, [r3, #0]
- 80046da:	430a      	orrs	r2, r1
- 80046dc:	609a      	str	r2, [r3, #8]
+ 8003f4e:	687b      	ldr	r3, [r7, #4]
+ 8003f50:	681b      	ldr	r3, [r3, #0]
+ 8003f52:	689b      	ldr	r3, [r3, #8]
+ 8003f54:	4a2c      	ldr	r2, [pc, #176]	; (8004008 <UART_AdvFeatureConfig+0x154>)
+ 8003f56:	4013      	ands	r3, r2
+ 8003f58:	0019      	movs	r1, r3
+ 8003f5a:	687b      	ldr	r3, [r7, #4]
+ 8003f5c:	6b9a      	ldr	r2, [r3, #56]	; 0x38
+ 8003f5e:	687b      	ldr	r3, [r7, #4]
+ 8003f60:	681b      	ldr	r3, [r3, #0]
+ 8003f62:	430a      	orrs	r2, r1
+ 8003f64:	609a      	str	r2, [r3, #8]
   }
 
   /* if required, configure DMA disabling on reception error */
   if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
- 80046de:	687b      	ldr	r3, [r7, #4]
- 80046e0:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 80046e2:	2220      	movs	r2, #32
- 80046e4:	4013      	ands	r3, r2
- 80046e6:	d00b      	beq.n	8004700 <UART_AdvFeatureConfig+0xd4>
+ 8003f66:	687b      	ldr	r3, [r7, #4]
+ 8003f68:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003f6a:	2220      	movs	r2, #32
+ 8003f6c:	4013      	ands	r3, r2
+ 8003f6e:	d00b      	beq.n	8003f88 <UART_AdvFeatureConfig+0xd4>
   {
     assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
     MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
- 80046e8:	687b      	ldr	r3, [r7, #4]
- 80046ea:	681b      	ldr	r3, [r3, #0]
- 80046ec:	689b      	ldr	r3, [r3, #8]
- 80046ee:	4a25      	ldr	r2, [pc, #148]	; (8004784 <UART_AdvFeatureConfig+0x158>)
- 80046f0:	4013      	ands	r3, r2
- 80046f2:	0019      	movs	r1, r3
- 80046f4:	687b      	ldr	r3, [r7, #4]
- 80046f6:	6bda      	ldr	r2, [r3, #60]	; 0x3c
- 80046f8:	687b      	ldr	r3, [r7, #4]
- 80046fa:	681b      	ldr	r3, [r3, #0]
- 80046fc:	430a      	orrs	r2, r1
- 80046fe:	609a      	str	r2, [r3, #8]
+ 8003f70:	687b      	ldr	r3, [r7, #4]
+ 8003f72:	681b      	ldr	r3, [r3, #0]
+ 8003f74:	689b      	ldr	r3, [r3, #8]
+ 8003f76:	4a25      	ldr	r2, [pc, #148]	; (800400c <UART_AdvFeatureConfig+0x158>)
+ 8003f78:	4013      	ands	r3, r2
+ 8003f7a:	0019      	movs	r1, r3
+ 8003f7c:	687b      	ldr	r3, [r7, #4]
+ 8003f7e:	6bda      	ldr	r2, [r3, #60]	; 0x3c
+ 8003f80:	687b      	ldr	r3, [r7, #4]
+ 8003f82:	681b      	ldr	r3, [r3, #0]
+ 8003f84:	430a      	orrs	r2, r1
+ 8003f86:	609a      	str	r2, [r3, #8]
   }
 
   /* if required, configure auto Baud rate detection scheme */
   if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
- 8004700:	687b      	ldr	r3, [r7, #4]
- 8004702:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 8004704:	2240      	movs	r2, #64	; 0x40
- 8004706:	4013      	ands	r3, r2
- 8004708:	d01d      	beq.n	8004746 <UART_AdvFeatureConfig+0x11a>
+ 8003f88:	687b      	ldr	r3, [r7, #4]
+ 8003f8a:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003f8c:	2240      	movs	r2, #64	; 0x40
+ 8003f8e:	4013      	ands	r3, r2
+ 8003f90:	d01d      	beq.n	8003fce <UART_AdvFeatureConfig+0x11a>
   {
     assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
     assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
     MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
- 800470a:	687b      	ldr	r3, [r7, #4]
- 800470c:	681b      	ldr	r3, [r3, #0]
- 800470e:	685b      	ldr	r3, [r3, #4]
- 8004710:	4a1d      	ldr	r2, [pc, #116]	; (8004788 <UART_AdvFeatureConfig+0x15c>)
- 8004712:	4013      	ands	r3, r2
- 8004714:	0019      	movs	r1, r3
- 8004716:	687b      	ldr	r3, [r7, #4]
- 8004718:	6c1a      	ldr	r2, [r3, #64]	; 0x40
- 800471a:	687b      	ldr	r3, [r7, #4]
- 800471c:	681b      	ldr	r3, [r3, #0]
- 800471e:	430a      	orrs	r2, r1
- 8004720:	605a      	str	r2, [r3, #4]
+ 8003f92:	687b      	ldr	r3, [r7, #4]
+ 8003f94:	681b      	ldr	r3, [r3, #0]
+ 8003f96:	685b      	ldr	r3, [r3, #4]
+ 8003f98:	4a1d      	ldr	r2, [pc, #116]	; (8004010 <UART_AdvFeatureConfig+0x15c>)
+ 8003f9a:	4013      	ands	r3, r2
+ 8003f9c:	0019      	movs	r1, r3
+ 8003f9e:	687b      	ldr	r3, [r7, #4]
+ 8003fa0:	6c1a      	ldr	r2, [r3, #64]	; 0x40
+ 8003fa2:	687b      	ldr	r3, [r7, #4]
+ 8003fa4:	681b      	ldr	r3, [r3, #0]
+ 8003fa6:	430a      	orrs	r2, r1
+ 8003fa8:	605a      	str	r2, [r3, #4]
     /* set auto Baudrate detection parameters if detection is enabled */
     if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
- 8004722:	687b      	ldr	r3, [r7, #4]
- 8004724:	6c1a      	ldr	r2, [r3, #64]	; 0x40
- 8004726:	2380      	movs	r3, #128	; 0x80
- 8004728:	035b      	lsls	r3, r3, #13
- 800472a:	429a      	cmp	r2, r3
- 800472c:	d10b      	bne.n	8004746 <UART_AdvFeatureConfig+0x11a>
+ 8003faa:	687b      	ldr	r3, [r7, #4]
+ 8003fac:	6c1a      	ldr	r2, [r3, #64]	; 0x40
+ 8003fae:	2380      	movs	r3, #128	; 0x80
+ 8003fb0:	035b      	lsls	r3, r3, #13
+ 8003fb2:	429a      	cmp	r2, r3
+ 8003fb4:	d10b      	bne.n	8003fce <UART_AdvFeatureConfig+0x11a>
     {
       assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
       MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
- 800472e:	687b      	ldr	r3, [r7, #4]
- 8004730:	681b      	ldr	r3, [r3, #0]
- 8004732:	685b      	ldr	r3, [r3, #4]
- 8004734:	4a15      	ldr	r2, [pc, #84]	; (800478c <UART_AdvFeatureConfig+0x160>)
- 8004736:	4013      	ands	r3, r2
- 8004738:	0019      	movs	r1, r3
- 800473a:	687b      	ldr	r3, [r7, #4]
- 800473c:	6c5a      	ldr	r2, [r3, #68]	; 0x44
- 800473e:	687b      	ldr	r3, [r7, #4]
- 8004740:	681b      	ldr	r3, [r3, #0]
- 8004742:	430a      	orrs	r2, r1
- 8004744:	605a      	str	r2, [r3, #4]
+ 8003fb6:	687b      	ldr	r3, [r7, #4]
+ 8003fb8:	681b      	ldr	r3, [r3, #0]
+ 8003fba:	685b      	ldr	r3, [r3, #4]
+ 8003fbc:	4a15      	ldr	r2, [pc, #84]	; (8004014 <UART_AdvFeatureConfig+0x160>)
+ 8003fbe:	4013      	ands	r3, r2
+ 8003fc0:	0019      	movs	r1, r3
+ 8003fc2:	687b      	ldr	r3, [r7, #4]
+ 8003fc4:	6c5a      	ldr	r2, [r3, #68]	; 0x44
+ 8003fc6:	687b      	ldr	r3, [r7, #4]
+ 8003fc8:	681b      	ldr	r3, [r3, #0]
+ 8003fca:	430a      	orrs	r2, r1
+ 8003fcc:	605a      	str	r2, [r3, #4]
     }
   }
 
   /* if required, configure MSB first on communication line */
   if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
- 8004746:	687b      	ldr	r3, [r7, #4]
- 8004748:	6a5b      	ldr	r3, [r3, #36]	; 0x24
- 800474a:	2280      	movs	r2, #128	; 0x80
- 800474c:	4013      	ands	r3, r2
- 800474e:	d00b      	beq.n	8004768 <UART_AdvFeatureConfig+0x13c>
+ 8003fce:	687b      	ldr	r3, [r7, #4]
+ 8003fd0:	6a5b      	ldr	r3, [r3, #36]	; 0x24
+ 8003fd2:	2280      	movs	r2, #128	; 0x80
+ 8003fd4:	4013      	ands	r3, r2
+ 8003fd6:	d00b      	beq.n	8003ff0 <UART_AdvFeatureConfig+0x13c>
   {
     assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
     MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
- 8004750:	687b      	ldr	r3, [r7, #4]
- 8004752:	681b      	ldr	r3, [r3, #0]
- 8004754:	685b      	ldr	r3, [r3, #4]
- 8004756:	4a0e      	ldr	r2, [pc, #56]	; (8004790 <UART_AdvFeatureConfig+0x164>)
- 8004758:	4013      	ands	r3, r2
- 800475a:	0019      	movs	r1, r3
- 800475c:	687b      	ldr	r3, [r7, #4]
- 800475e:	6c9a      	ldr	r2, [r3, #72]	; 0x48
- 8004760:	687b      	ldr	r3, [r7, #4]
- 8004762:	681b      	ldr	r3, [r3, #0]
- 8004764:	430a      	orrs	r2, r1
- 8004766:	605a      	str	r2, [r3, #4]
+ 8003fd8:	687b      	ldr	r3, [r7, #4]
+ 8003fda:	681b      	ldr	r3, [r3, #0]
+ 8003fdc:	685b      	ldr	r3, [r3, #4]
+ 8003fde:	4a0e      	ldr	r2, [pc, #56]	; (8004018 <UART_AdvFeatureConfig+0x164>)
+ 8003fe0:	4013      	ands	r3, r2
+ 8003fe2:	0019      	movs	r1, r3
+ 8003fe4:	687b      	ldr	r3, [r7, #4]
+ 8003fe6:	6c9a      	ldr	r2, [r3, #72]	; 0x48
+ 8003fe8:	687b      	ldr	r3, [r7, #4]
+ 8003fea:	681b      	ldr	r3, [r3, #0]
+ 8003fec:	430a      	orrs	r2, r1
+ 8003fee:	605a      	str	r2, [r3, #4]
   }
 }
- 8004768:	46c0      	nop			; (mov r8, r8)
- 800476a:	46bd      	mov	sp, r7
- 800476c:	b002      	add	sp, #8
- 800476e:	bd80      	pop	{r7, pc}
- 8004770:	fffdffff 	.word	0xfffdffff
- 8004774:	fffeffff 	.word	0xfffeffff
- 8004778:	fffbffff 	.word	0xfffbffff
- 800477c:	ffff7fff 	.word	0xffff7fff
- 8004780:	ffffefff 	.word	0xffffefff
- 8004784:	ffffdfff 	.word	0xffffdfff
- 8004788:	ffefffff 	.word	0xffefffff
- 800478c:	ff9fffff 	.word	0xff9fffff
- 8004790:	fff7ffff 	.word	0xfff7ffff
+ 8003ff0:	46c0      	nop			; (mov r8, r8)
+ 8003ff2:	46bd      	mov	sp, r7
+ 8003ff4:	b002      	add	sp, #8
+ 8003ff6:	bd80      	pop	{r7, pc}
+ 8003ff8:	fffdffff 	.word	0xfffdffff
+ 8003ffc:	fffeffff 	.word	0xfffeffff
+ 8004000:	fffbffff 	.word	0xfffbffff
+ 8004004:	ffff7fff 	.word	0xffff7fff
+ 8004008:	ffffefff 	.word	0xffffefff
+ 800400c:	ffffdfff 	.word	0xffffdfff
+ 8004010:	ffefffff 	.word	0xffefffff
+ 8004014:	ff9fffff 	.word	0xff9fffff
+ 8004018:	fff7ffff 	.word	0xfff7ffff
 
-08004794 <UART_CheckIdleState>:
+0800401c <UART_CheckIdleState>:
   * @brief Check the UART Idle State.
   * @param huart UART handle.
   * @retval HAL status
   */
 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
 {
- 8004794:	b580      	push	{r7, lr}
- 8004796:	b092      	sub	sp, #72	; 0x48
- 8004798:	af02      	add	r7, sp, #8
- 800479a:	6078      	str	r0, [r7, #4]
+ 800401c:	b580      	push	{r7, lr}
+ 800401e:	b092      	sub	sp, #72	; 0x48
+ 8004020:	af02      	add	r7, sp, #8
+ 8004022:	6078      	str	r0, [r7, #4]
   uint32_t tickstart;
 
   /* Initialize the UART ErrorCode */
   huart->ErrorCode = HAL_UART_ERROR_NONE;
- 800479c:	687b      	ldr	r3, [r7, #4]
- 800479e:	2284      	movs	r2, #132	; 0x84
- 80047a0:	2100      	movs	r1, #0
- 80047a2:	5099      	str	r1, [r3, r2]
+ 8004024:	687b      	ldr	r3, [r7, #4]
+ 8004026:	2284      	movs	r2, #132	; 0x84
+ 8004028:	2100      	movs	r1, #0
+ 800402a:	5099      	str	r1, [r3, r2]
 
   /* Init tickstart for timeout management */
   tickstart = HAL_GetTick();
- 80047a4:	f7fc fe78 	bl	8001498 <HAL_GetTick>
- 80047a8:	0003      	movs	r3, r0
- 80047aa:	63fb      	str	r3, [r7, #60]	; 0x3c
+ 800402c:	f7fd f976 	bl	800131c <HAL_GetTick>
+ 8004030:	0003      	movs	r3, r0
+ 8004032:	63fb      	str	r3, [r7, #60]	; 0x3c
 
   /* Check if the Transmitter is enabled */
   if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
- 80047ac:	687b      	ldr	r3, [r7, #4]
- 80047ae:	681b      	ldr	r3, [r3, #0]
- 80047b0:	681b      	ldr	r3, [r3, #0]
- 80047b2:	2208      	movs	r2, #8
- 80047b4:	4013      	ands	r3, r2
- 80047b6:	2b08      	cmp	r3, #8
- 80047b8:	d12c      	bne.n	8004814 <UART_CheckIdleState+0x80>
+ 8004034:	687b      	ldr	r3, [r7, #4]
+ 8004036:	681b      	ldr	r3, [r3, #0]
+ 8004038:	681b      	ldr	r3, [r3, #0]
+ 800403a:	2208      	movs	r2, #8
+ 800403c:	4013      	ands	r3, r2
+ 800403e:	2b08      	cmp	r3, #8
+ 8004040:	d12c      	bne.n	800409c <UART_CheckIdleState+0x80>
   {
     /* Wait until TEACK flag is set */
     if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
- 80047ba:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
- 80047bc:	2280      	movs	r2, #128	; 0x80
- 80047be:	0391      	lsls	r1, r2, #14
- 80047c0:	6878      	ldr	r0, [r7, #4]
- 80047c2:	4a46      	ldr	r2, [pc, #280]	; (80048dc <UART_CheckIdleState+0x148>)
- 80047c4:	9200      	str	r2, [sp, #0]
- 80047c6:	2200      	movs	r2, #0
- 80047c8:	f000 f88c 	bl	80048e4 <UART_WaitOnFlagUntilTimeout>
- 80047cc:	1e03      	subs	r3, r0, #0
- 80047ce:	d021      	beq.n	8004814 <UART_CheckIdleState+0x80>
+ 8004042:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 8004044:	2280      	movs	r2, #128	; 0x80
+ 8004046:	0391      	lsls	r1, r2, #14
+ 8004048:	6878      	ldr	r0, [r7, #4]
+ 800404a:	4a46      	ldr	r2, [pc, #280]	; (8004164 <UART_CheckIdleState+0x148>)
+ 800404c:	9200      	str	r2, [sp, #0]
+ 800404e:	2200      	movs	r2, #0
+ 8004050:	f000 f88c 	bl	800416c <UART_WaitOnFlagUntilTimeout>
+ 8004054:	1e03      	subs	r3, r0, #0
+ 8004056:	d021      	beq.n	800409c <UART_CheckIdleState+0x80>
+ */
+__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 80047d0:	f3ef 8310 	mrs	r3, PRIMASK
- 80047d4:	627b      	str	r3, [r7, #36]	; 0x24
+ 8004058:	f3ef 8310 	mrs	r3, PRIMASK
+ 800405c:	627b      	str	r3, [r7, #36]	; 0x24
   return(result);
- 80047d6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800405e:	6a7b      	ldr	r3, [r7, #36]	; 0x24
     {
       /* Disable TXE interrupt for the interrupt process */
       ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE));
- 80047d8:	63bb      	str	r3, [r7, #56]	; 0x38
- 80047da:	2301      	movs	r3, #1
- 80047dc:	62bb      	str	r3, [r7, #40]	; 0x28
+ 8004060:	63bb      	str	r3, [r7, #56]	; 0x38
+ 8004062:	2301      	movs	r3, #1
+ 8004064:	62bb      	str	r3, [r7, #40]	; 0x28
+  \details Assigns the given value to the Priority Mask Register.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
+{
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 80047de:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 80047e0:	f383 8810 	msr	PRIMASK, r3
+ 8004066:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 8004068:	f383 8810 	msr	PRIMASK, r3
 }
- 80047e4:	46c0      	nop			; (mov r8, r8)
- 80047e6:	687b      	ldr	r3, [r7, #4]
- 80047e8:	681b      	ldr	r3, [r3, #0]
- 80047ea:	681a      	ldr	r2, [r3, #0]
- 80047ec:	687b      	ldr	r3, [r7, #4]
- 80047ee:	681b      	ldr	r3, [r3, #0]
- 80047f0:	2180      	movs	r1, #128	; 0x80
- 80047f2:	438a      	bics	r2, r1
- 80047f4:	601a      	str	r2, [r3, #0]
- 80047f6:	6bbb      	ldr	r3, [r7, #56]	; 0x38
- 80047f8:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 800406c:	46c0      	nop			; (mov r8, r8)
+ 800406e:	687b      	ldr	r3, [r7, #4]
+ 8004070:	681b      	ldr	r3, [r3, #0]
+ 8004072:	681a      	ldr	r2, [r3, #0]
+ 8004074:	687b      	ldr	r3, [r7, #4]
+ 8004076:	681b      	ldr	r3, [r3, #0]
+ 8004078:	2180      	movs	r1, #128	; 0x80
+ 800407a:	438a      	bics	r2, r1
+ 800407c:	601a      	str	r2, [r3, #0]
+ 800407e:	6bbb      	ldr	r3, [r7, #56]	; 0x38
+ 8004080:	62fb      	str	r3, [r7, #44]	; 0x2c
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 80047fa:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 80047fc:	f383 8810 	msr	PRIMASK, r3
+ 8004082:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 8004084:	f383 8810 	msr	PRIMASK, r3
 }
- 8004800:	46c0      	nop			; (mov r8, r8)
+ 8004088:	46c0      	nop			; (mov r8, r8)
 
       huart->gState = HAL_UART_STATE_READY;
- 8004802:	687b      	ldr	r3, [r7, #4]
- 8004804:	2220      	movs	r2, #32
- 8004806:	67da      	str	r2, [r3, #124]	; 0x7c
+ 800408a:	687b      	ldr	r3, [r7, #4]
+ 800408c:	2220      	movs	r2, #32
+ 800408e:	67da      	str	r2, [r3, #124]	; 0x7c
 
       __HAL_UNLOCK(huart);
- 8004808:	687b      	ldr	r3, [r7, #4]
- 800480a:	2278      	movs	r2, #120	; 0x78
- 800480c:	2100      	movs	r1, #0
- 800480e:	5499      	strb	r1, [r3, r2]
+ 8004090:	687b      	ldr	r3, [r7, #4]
+ 8004092:	2278      	movs	r2, #120	; 0x78
+ 8004094:	2100      	movs	r1, #0
+ 8004096:	5499      	strb	r1, [r3, r2]
 
       /* Timeout occurred */
       return HAL_TIMEOUT;
- 8004810:	2303      	movs	r3, #3
- 8004812:	e05f      	b.n	80048d4 <UART_CheckIdleState+0x140>
+ 8004098:	2303      	movs	r3, #3
+ 800409a:	e05f      	b.n	800415c <UART_CheckIdleState+0x140>
     }
   }
 
   /* Check if the Receiver is enabled */
   if ((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
- 8004814:	687b      	ldr	r3, [r7, #4]
- 8004816:	681b      	ldr	r3, [r3, #0]
- 8004818:	681b      	ldr	r3, [r3, #0]
- 800481a:	2204      	movs	r2, #4
- 800481c:	4013      	ands	r3, r2
- 800481e:	2b04      	cmp	r3, #4
- 8004820:	d146      	bne.n	80048b0 <UART_CheckIdleState+0x11c>
+ 800409c:	687b      	ldr	r3, [r7, #4]
+ 800409e:	681b      	ldr	r3, [r3, #0]
+ 80040a0:	681b      	ldr	r3, [r3, #0]
+ 80040a2:	2204      	movs	r2, #4
+ 80040a4:	4013      	ands	r3, r2
+ 80040a6:	2b04      	cmp	r3, #4
+ 80040a8:	d146      	bne.n	8004138 <UART_CheckIdleState+0x11c>
   {
     /* Wait until REACK flag is set */
     if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
- 8004822:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
- 8004824:	2280      	movs	r2, #128	; 0x80
- 8004826:	03d1      	lsls	r1, r2, #15
- 8004828:	6878      	ldr	r0, [r7, #4]
- 800482a:	4a2c      	ldr	r2, [pc, #176]	; (80048dc <UART_CheckIdleState+0x148>)
- 800482c:	9200      	str	r2, [sp, #0]
- 800482e:	2200      	movs	r2, #0
- 8004830:	f000 f858 	bl	80048e4 <UART_WaitOnFlagUntilTimeout>
- 8004834:	1e03      	subs	r3, r0, #0
- 8004836:	d03b      	beq.n	80048b0 <UART_CheckIdleState+0x11c>
+ 80040aa:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
+ 80040ac:	2280      	movs	r2, #128	; 0x80
+ 80040ae:	03d1      	lsls	r1, r2, #15
+ 80040b0:	6878      	ldr	r0, [r7, #4]
+ 80040b2:	4a2c      	ldr	r2, [pc, #176]	; (8004164 <UART_CheckIdleState+0x148>)
+ 80040b4:	9200      	str	r2, [sp, #0]
+ 80040b6:	2200      	movs	r2, #0
+ 80040b8:	f000 f858 	bl	800416c <UART_WaitOnFlagUntilTimeout>
+ 80040bc:	1e03      	subs	r3, r0, #0
+ 80040be:	d03b      	beq.n	8004138 <UART_CheckIdleState+0x11c>
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004838:	f3ef 8310 	mrs	r3, PRIMASK
- 800483c:	60fb      	str	r3, [r7, #12]
+ 80040c0:	f3ef 8310 	mrs	r3, PRIMASK
+ 80040c4:	60fb      	str	r3, [r7, #12]
   return(result);
- 800483e:	68fb      	ldr	r3, [r7, #12]
+ 80040c6:	68fb      	ldr	r3, [r7, #12]
     {
       /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error)
       interrupts for the interrupt process */
       ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
- 8004840:	637b      	str	r3, [r7, #52]	; 0x34
- 8004842:	2301      	movs	r3, #1
- 8004844:	613b      	str	r3, [r7, #16]
+ 80040c8:	637b      	str	r3, [r7, #52]	; 0x34
+ 80040ca:	2301      	movs	r3, #1
+ 80040cc:	613b      	str	r3, [r7, #16]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004846:	693b      	ldr	r3, [r7, #16]
- 8004848:	f383 8810 	msr	PRIMASK, r3
+ 80040ce:	693b      	ldr	r3, [r7, #16]
+ 80040d0:	f383 8810 	msr	PRIMASK, r3
 }
- 800484c:	46c0      	nop			; (mov r8, r8)
- 800484e:	687b      	ldr	r3, [r7, #4]
- 8004850:	681b      	ldr	r3, [r3, #0]
- 8004852:	681a      	ldr	r2, [r3, #0]
- 8004854:	687b      	ldr	r3, [r7, #4]
- 8004856:	681b      	ldr	r3, [r3, #0]
- 8004858:	4921      	ldr	r1, [pc, #132]	; (80048e0 <UART_CheckIdleState+0x14c>)
- 800485a:	400a      	ands	r2, r1
- 800485c:	601a      	str	r2, [r3, #0]
- 800485e:	6b7b      	ldr	r3, [r7, #52]	; 0x34
- 8004860:	617b      	str	r3, [r7, #20]
+ 80040d4:	46c0      	nop			; (mov r8, r8)
+ 80040d6:	687b      	ldr	r3, [r7, #4]
+ 80040d8:	681b      	ldr	r3, [r3, #0]
+ 80040da:	681a      	ldr	r2, [r3, #0]
+ 80040dc:	687b      	ldr	r3, [r7, #4]
+ 80040de:	681b      	ldr	r3, [r3, #0]
+ 80040e0:	4921      	ldr	r1, [pc, #132]	; (8004168 <UART_CheckIdleState+0x14c>)
+ 80040e2:	400a      	ands	r2, r1
+ 80040e4:	601a      	str	r2, [r3, #0]
+ 80040e6:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 80040e8:	617b      	str	r3, [r7, #20]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004862:	697b      	ldr	r3, [r7, #20]
- 8004864:	f383 8810 	msr	PRIMASK, r3
+ 80040ea:	697b      	ldr	r3, [r7, #20]
+ 80040ec:	f383 8810 	msr	PRIMASK, r3
 }
- 8004868:	46c0      	nop			; (mov r8, r8)
+ 80040f0:	46c0      	nop			; (mov r8, r8)
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 800486a:	f3ef 8310 	mrs	r3, PRIMASK
- 800486e:	61bb      	str	r3, [r7, #24]
+ 80040f2:	f3ef 8310 	mrs	r3, PRIMASK
+ 80040f6:	61bb      	str	r3, [r7, #24]
   return(result);
- 8004870:	69bb      	ldr	r3, [r7, #24]
+ 80040f8:	69bb      	ldr	r3, [r7, #24]
       ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8004872:	633b      	str	r3, [r7, #48]	; 0x30
- 8004874:	2301      	movs	r3, #1
- 8004876:	61fb      	str	r3, [r7, #28]
+ 80040fa:	633b      	str	r3, [r7, #48]	; 0x30
+ 80040fc:	2301      	movs	r3, #1
+ 80040fe:	61fb      	str	r3, [r7, #28]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004878:	69fb      	ldr	r3, [r7, #28]
- 800487a:	f383 8810 	msr	PRIMASK, r3
+ 8004100:	69fb      	ldr	r3, [r7, #28]
+ 8004102:	f383 8810 	msr	PRIMASK, r3
 }
- 800487e:	46c0      	nop			; (mov r8, r8)
- 8004880:	687b      	ldr	r3, [r7, #4]
- 8004882:	681b      	ldr	r3, [r3, #0]
- 8004884:	689a      	ldr	r2, [r3, #8]
- 8004886:	687b      	ldr	r3, [r7, #4]
- 8004888:	681b      	ldr	r3, [r3, #0]
- 800488a:	2101      	movs	r1, #1
- 800488c:	438a      	bics	r2, r1
- 800488e:	609a      	str	r2, [r3, #8]
- 8004890:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 8004892:	623b      	str	r3, [r7, #32]
+ 8004106:	46c0      	nop			; (mov r8, r8)
+ 8004108:	687b      	ldr	r3, [r7, #4]
+ 800410a:	681b      	ldr	r3, [r3, #0]
+ 800410c:	689a      	ldr	r2, [r3, #8]
+ 800410e:	687b      	ldr	r3, [r7, #4]
+ 8004110:	681b      	ldr	r3, [r3, #0]
+ 8004112:	2101      	movs	r1, #1
+ 8004114:	438a      	bics	r2, r1
+ 8004116:	609a      	str	r2, [r3, #8]
+ 8004118:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 800411a:	623b      	str	r3, [r7, #32]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004894:	6a3b      	ldr	r3, [r7, #32]
- 8004896:	f383 8810 	msr	PRIMASK, r3
+ 800411c:	6a3b      	ldr	r3, [r7, #32]
+ 800411e:	f383 8810 	msr	PRIMASK, r3
 }
- 800489a:	46c0      	nop			; (mov r8, r8)
+ 8004122:	46c0      	nop			; (mov r8, r8)
 
       huart->RxState = HAL_UART_STATE_READY;
- 800489c:	687b      	ldr	r3, [r7, #4]
- 800489e:	2280      	movs	r2, #128	; 0x80
- 80048a0:	2120      	movs	r1, #32
- 80048a2:	5099      	str	r1, [r3, r2]
+ 8004124:	687b      	ldr	r3, [r7, #4]
+ 8004126:	2280      	movs	r2, #128	; 0x80
+ 8004128:	2120      	movs	r1, #32
+ 800412a:	5099      	str	r1, [r3, r2]
 
       __HAL_UNLOCK(huart);
- 80048a4:	687b      	ldr	r3, [r7, #4]
- 80048a6:	2278      	movs	r2, #120	; 0x78
- 80048a8:	2100      	movs	r1, #0
- 80048aa:	5499      	strb	r1, [r3, r2]
+ 800412c:	687b      	ldr	r3, [r7, #4]
+ 800412e:	2278      	movs	r2, #120	; 0x78
+ 8004130:	2100      	movs	r1, #0
+ 8004132:	5499      	strb	r1, [r3, r2]
 
       /* Timeout occurred */
       return HAL_TIMEOUT;
- 80048ac:	2303      	movs	r3, #3
- 80048ae:	e011      	b.n	80048d4 <UART_CheckIdleState+0x140>
+ 8004134:	2303      	movs	r3, #3
+ 8004136:	e011      	b.n	800415c <UART_CheckIdleState+0x140>
     }
   }
 
   /* Initialize the UART State */
   huart->gState = HAL_UART_STATE_READY;
- 80048b0:	687b      	ldr	r3, [r7, #4]
- 80048b2:	2220      	movs	r2, #32
- 80048b4:	67da      	str	r2, [r3, #124]	; 0x7c
+ 8004138:	687b      	ldr	r3, [r7, #4]
+ 800413a:	2220      	movs	r2, #32
+ 800413c:	67da      	str	r2, [r3, #124]	; 0x7c
   huart->RxState = HAL_UART_STATE_READY;
- 80048b6:	687b      	ldr	r3, [r7, #4]
- 80048b8:	2280      	movs	r2, #128	; 0x80
- 80048ba:	2120      	movs	r1, #32
- 80048bc:	5099      	str	r1, [r3, r2]
+ 800413e:	687b      	ldr	r3, [r7, #4]
+ 8004140:	2280      	movs	r2, #128	; 0x80
+ 8004142:	2120      	movs	r1, #32
+ 8004144:	5099      	str	r1, [r3, r2]
   huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 80048be:	687b      	ldr	r3, [r7, #4]
- 80048c0:	2200      	movs	r2, #0
- 80048c2:	661a      	str	r2, [r3, #96]	; 0x60
+ 8004146:	687b      	ldr	r3, [r7, #4]
+ 8004148:	2200      	movs	r2, #0
+ 800414a:	661a      	str	r2, [r3, #96]	; 0x60
   huart->RxEventType = HAL_UART_RXEVENT_TC;
- 80048c4:	687b      	ldr	r3, [r7, #4]
- 80048c6:	2200      	movs	r2, #0
- 80048c8:	665a      	str	r2, [r3, #100]	; 0x64
+ 800414c:	687b      	ldr	r3, [r7, #4]
+ 800414e:	2200      	movs	r2, #0
+ 8004150:	665a      	str	r2, [r3, #100]	; 0x64
 
   __HAL_UNLOCK(huart);
- 80048ca:	687b      	ldr	r3, [r7, #4]
- 80048cc:	2278      	movs	r2, #120	; 0x78
- 80048ce:	2100      	movs	r1, #0
- 80048d0:	5499      	strb	r1, [r3, r2]
+ 8004152:	687b      	ldr	r3, [r7, #4]
+ 8004154:	2278      	movs	r2, #120	; 0x78
+ 8004156:	2100      	movs	r1, #0
+ 8004158:	5499      	strb	r1, [r3, r2]
 
   return HAL_OK;
- 80048d2:	2300      	movs	r3, #0
+ 800415a:	2300      	movs	r3, #0
 }
- 80048d4:	0018      	movs	r0, r3
- 80048d6:	46bd      	mov	sp, r7
- 80048d8:	b010      	add	sp, #64	; 0x40
- 80048da:	bd80      	pop	{r7, pc}
- 80048dc:	01ffffff 	.word	0x01ffffff
- 80048e0:	fffffedf 	.word	0xfffffedf
+ 800415c:	0018      	movs	r0, r3
+ 800415e:	46bd      	mov	sp, r7
+ 8004160:	b010      	add	sp, #64	; 0x40
+ 8004162:	bd80      	pop	{r7, pc}
+ 8004164:	01ffffff 	.word	0x01ffffff
+ 8004168:	fffffedf 	.word	0xfffffedf
 
-080048e4 <UART_WaitOnFlagUntilTimeout>:
+0800416c <UART_WaitOnFlagUntilTimeout>:
   * @param Timeout   Timeout duration
   * @retval HAL status
   */
 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
                                               uint32_t Tickstart, uint32_t Timeout)
 {
- 80048e4:	b580      	push	{r7, lr}
- 80048e6:	b084      	sub	sp, #16
- 80048e8:	af00      	add	r7, sp, #0
- 80048ea:	60f8      	str	r0, [r7, #12]
- 80048ec:	60b9      	str	r1, [r7, #8]
- 80048ee:	603b      	str	r3, [r7, #0]
- 80048f0:	1dfb      	adds	r3, r7, #7
- 80048f2:	701a      	strb	r2, [r3, #0]
+ 800416c:	b580      	push	{r7, lr}
+ 800416e:	b084      	sub	sp, #16
+ 8004170:	af00      	add	r7, sp, #0
+ 8004172:	60f8      	str	r0, [r7, #12]
+ 8004174:	60b9      	str	r1, [r7, #8]
+ 8004176:	603b      	str	r3, [r7, #0]
+ 8004178:	1dfb      	adds	r3, r7, #7
+ 800417a:	701a      	strb	r2, [r3, #0]
   /* Wait until flag is set */
   while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 80048f4:	e04b      	b.n	800498e <UART_WaitOnFlagUntilTimeout+0xaa>
+ 800417c:	e04b      	b.n	8004216 <UART_WaitOnFlagUntilTimeout+0xaa>
   {
     /* Check for the Timeout */
     if (Timeout != HAL_MAX_DELAY)
- 80048f6:	69bb      	ldr	r3, [r7, #24]
- 80048f8:	3301      	adds	r3, #1
- 80048fa:	d048      	beq.n	800498e <UART_WaitOnFlagUntilTimeout+0xaa>
+ 800417e:	69bb      	ldr	r3, [r7, #24]
+ 8004180:	3301      	adds	r3, #1
+ 8004182:	d048      	beq.n	8004216 <UART_WaitOnFlagUntilTimeout+0xaa>
     {
       if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
- 80048fc:	f7fc fdcc 	bl	8001498 <HAL_GetTick>
- 8004900:	0002      	movs	r2, r0
- 8004902:	683b      	ldr	r3, [r7, #0]
- 8004904:	1ad3      	subs	r3, r2, r3
- 8004906:	69ba      	ldr	r2, [r7, #24]
- 8004908:	429a      	cmp	r2, r3
- 800490a:	d302      	bcc.n	8004912 <UART_WaitOnFlagUntilTimeout+0x2e>
- 800490c:	69bb      	ldr	r3, [r7, #24]
- 800490e:	2b00      	cmp	r3, #0
- 8004910:	d101      	bne.n	8004916 <UART_WaitOnFlagUntilTimeout+0x32>
+ 8004184:	f7fd f8ca 	bl	800131c <HAL_GetTick>
+ 8004188:	0002      	movs	r2, r0
+ 800418a:	683b      	ldr	r3, [r7, #0]
+ 800418c:	1ad3      	subs	r3, r2, r3
+ 800418e:	69ba      	ldr	r2, [r7, #24]
+ 8004190:	429a      	cmp	r2, r3
+ 8004192:	d302      	bcc.n	800419a <UART_WaitOnFlagUntilTimeout+0x2e>
+ 8004194:	69bb      	ldr	r3, [r7, #24]
+ 8004196:	2b00      	cmp	r3, #0
+ 8004198:	d101      	bne.n	800419e <UART_WaitOnFlagUntilTimeout+0x32>
       {
 
         return HAL_TIMEOUT;
- 8004912:	2303      	movs	r3, #3
- 8004914:	e04b      	b.n	80049ae <UART_WaitOnFlagUntilTimeout+0xca>
+ 800419a:	2303      	movs	r3, #3
+ 800419c:	e04b      	b.n	8004236 <UART_WaitOnFlagUntilTimeout+0xca>
       }
 
       if (READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U)
- 8004916:	68fb      	ldr	r3, [r7, #12]
- 8004918:	681b      	ldr	r3, [r3, #0]
- 800491a:	681b      	ldr	r3, [r3, #0]
- 800491c:	2204      	movs	r2, #4
- 800491e:	4013      	ands	r3, r2
- 8004920:	d035      	beq.n	800498e <UART_WaitOnFlagUntilTimeout+0xaa>
+ 800419e:	68fb      	ldr	r3, [r7, #12]
+ 80041a0:	681b      	ldr	r3, [r3, #0]
+ 80041a2:	681b      	ldr	r3, [r3, #0]
+ 80041a4:	2204      	movs	r2, #4
+ 80041a6:	4013      	ands	r3, r2
+ 80041a8:	d035      	beq.n	8004216 <UART_WaitOnFlagUntilTimeout+0xaa>
       {
         if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
- 8004922:	68fb      	ldr	r3, [r7, #12]
- 8004924:	681b      	ldr	r3, [r3, #0]
- 8004926:	69db      	ldr	r3, [r3, #28]
- 8004928:	2208      	movs	r2, #8
- 800492a:	4013      	ands	r3, r2
- 800492c:	2b08      	cmp	r3, #8
- 800492e:	d111      	bne.n	8004954 <UART_WaitOnFlagUntilTimeout+0x70>
+ 80041aa:	68fb      	ldr	r3, [r7, #12]
+ 80041ac:	681b      	ldr	r3, [r3, #0]
+ 80041ae:	69db      	ldr	r3, [r3, #28]
+ 80041b0:	2208      	movs	r2, #8
+ 80041b2:	4013      	ands	r3, r2
+ 80041b4:	2b08      	cmp	r3, #8
+ 80041b6:	d111      	bne.n	80041dc <UART_WaitOnFlagUntilTimeout+0x70>
         {
            /* Clear Overrun Error flag*/
            __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
- 8004930:	68fb      	ldr	r3, [r7, #12]
- 8004932:	681b      	ldr	r3, [r3, #0]
- 8004934:	2208      	movs	r2, #8
- 8004936:	621a      	str	r2, [r3, #32]
+ 80041b8:	68fb      	ldr	r3, [r7, #12]
+ 80041ba:	681b      	ldr	r3, [r3, #0]
+ 80041bc:	2208      	movs	r2, #8
+ 80041be:	621a      	str	r2, [r3, #32]
 
            /* Blocking error : transfer is aborted
            Set the UART state ready to be able to start again the process,
            Disable Rx Interrupts if ongoing */
            UART_EndRxTransfer(huart);
- 8004938:	68fb      	ldr	r3, [r7, #12]
- 800493a:	0018      	movs	r0, r3
- 800493c:	f000 f906 	bl	8004b4c <UART_EndRxTransfer>
+ 80041c0:	68fb      	ldr	r3, [r7, #12]
+ 80041c2:	0018      	movs	r0, r3
+ 80041c4:	f000 f83c 	bl	8004240 <UART_EndRxTransfer>
 
            huart->ErrorCode = HAL_UART_ERROR_ORE;
- 8004940:	68fb      	ldr	r3, [r7, #12]
- 8004942:	2284      	movs	r2, #132	; 0x84
- 8004944:	2108      	movs	r1, #8
- 8004946:	5099      	str	r1, [r3, r2]
+ 80041c8:	68fb      	ldr	r3, [r7, #12]
+ 80041ca:	2284      	movs	r2, #132	; 0x84
+ 80041cc:	2108      	movs	r1, #8
+ 80041ce:	5099      	str	r1, [r3, r2]
 
            /* Process Unlocked */
            __HAL_UNLOCK(huart);
- 8004948:	68fb      	ldr	r3, [r7, #12]
- 800494a:	2278      	movs	r2, #120	; 0x78
- 800494c:	2100      	movs	r1, #0
- 800494e:	5499      	strb	r1, [r3, r2]
+ 80041d0:	68fb      	ldr	r3, [r7, #12]
+ 80041d2:	2278      	movs	r2, #120	; 0x78
+ 80041d4:	2100      	movs	r1, #0
+ 80041d6:	5499      	strb	r1, [r3, r2]
 
            return HAL_ERROR;
- 8004950:	2301      	movs	r3, #1
- 8004952:	e02c      	b.n	80049ae <UART_WaitOnFlagUntilTimeout+0xca>
+ 80041d8:	2301      	movs	r3, #1
+ 80041da:	e02c      	b.n	8004236 <UART_WaitOnFlagUntilTimeout+0xca>
         }
         if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
- 8004954:	68fb      	ldr	r3, [r7, #12]
- 8004956:	681b      	ldr	r3, [r3, #0]
- 8004958:	69da      	ldr	r2, [r3, #28]
- 800495a:	2380      	movs	r3, #128	; 0x80
- 800495c:	011b      	lsls	r3, r3, #4
- 800495e:	401a      	ands	r2, r3
- 8004960:	2380      	movs	r3, #128	; 0x80
- 8004962:	011b      	lsls	r3, r3, #4
- 8004964:	429a      	cmp	r2, r3
- 8004966:	d112      	bne.n	800498e <UART_WaitOnFlagUntilTimeout+0xaa>
+ 80041dc:	68fb      	ldr	r3, [r7, #12]
+ 80041de:	681b      	ldr	r3, [r3, #0]
+ 80041e0:	69da      	ldr	r2, [r3, #28]
+ 80041e2:	2380      	movs	r3, #128	; 0x80
+ 80041e4:	011b      	lsls	r3, r3, #4
+ 80041e6:	401a      	ands	r2, r3
+ 80041e8:	2380      	movs	r3, #128	; 0x80
+ 80041ea:	011b      	lsls	r3, r3, #4
+ 80041ec:	429a      	cmp	r2, r3
+ 80041ee:	d112      	bne.n	8004216 <UART_WaitOnFlagUntilTimeout+0xaa>
         {
           /* Clear Receiver Timeout flag*/
           __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF);
- 8004968:	68fb      	ldr	r3, [r7, #12]
- 800496a:	681b      	ldr	r3, [r3, #0]
- 800496c:	2280      	movs	r2, #128	; 0x80
- 800496e:	0112      	lsls	r2, r2, #4
- 8004970:	621a      	str	r2, [r3, #32]
+ 80041f0:	68fb      	ldr	r3, [r7, #12]
+ 80041f2:	681b      	ldr	r3, [r3, #0]
+ 80041f4:	2280      	movs	r2, #128	; 0x80
+ 80041f6:	0112      	lsls	r2, r2, #4
+ 80041f8:	621a      	str	r2, [r3, #32]
 
           /* Blocking error : transfer is aborted
           Set the UART state ready to be able to start again the process,
           Disable Rx Interrupts if ongoing */
           UART_EndRxTransfer(huart);
- 8004972:	68fb      	ldr	r3, [r7, #12]
- 8004974:	0018      	movs	r0, r3
- 8004976:	f000 f8e9 	bl	8004b4c <UART_EndRxTransfer>
+ 80041fa:	68fb      	ldr	r3, [r7, #12]
+ 80041fc:	0018      	movs	r0, r3
+ 80041fe:	f000 f81f 	bl	8004240 <UART_EndRxTransfer>
 
           huart->ErrorCode = HAL_UART_ERROR_RTO;
- 800497a:	68fb      	ldr	r3, [r7, #12]
- 800497c:	2284      	movs	r2, #132	; 0x84
- 800497e:	2120      	movs	r1, #32
- 8004980:	5099      	str	r1, [r3, r2]
+ 8004202:	68fb      	ldr	r3, [r7, #12]
+ 8004204:	2284      	movs	r2, #132	; 0x84
+ 8004206:	2120      	movs	r1, #32
+ 8004208:	5099      	str	r1, [r3, r2]
 
           /* Process Unlocked */
           __HAL_UNLOCK(huart);
- 8004982:	68fb      	ldr	r3, [r7, #12]
- 8004984:	2278      	movs	r2, #120	; 0x78
- 8004986:	2100      	movs	r1, #0
- 8004988:	5499      	strb	r1, [r3, r2]
+ 800420a:	68fb      	ldr	r3, [r7, #12]
+ 800420c:	2278      	movs	r2, #120	; 0x78
+ 800420e:	2100      	movs	r1, #0
+ 8004210:	5499      	strb	r1, [r3, r2]
 
           return HAL_TIMEOUT;
- 800498a:	2303      	movs	r3, #3
- 800498c:	e00f      	b.n	80049ae <UART_WaitOnFlagUntilTimeout+0xca>
+ 8004212:	2303      	movs	r3, #3
+ 8004214:	e00f      	b.n	8004236 <UART_WaitOnFlagUntilTimeout+0xca>
   while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
- 800498e:	68fb      	ldr	r3, [r7, #12]
- 8004990:	681b      	ldr	r3, [r3, #0]
- 8004992:	69db      	ldr	r3, [r3, #28]
- 8004994:	68ba      	ldr	r2, [r7, #8]
- 8004996:	4013      	ands	r3, r2
- 8004998:	68ba      	ldr	r2, [r7, #8]
- 800499a:	1ad3      	subs	r3, r2, r3
- 800499c:	425a      	negs	r2, r3
- 800499e:	4153      	adcs	r3, r2
- 80049a0:	b2db      	uxtb	r3, r3
- 80049a2:	001a      	movs	r2, r3
- 80049a4:	1dfb      	adds	r3, r7, #7
- 80049a6:	781b      	ldrb	r3, [r3, #0]
- 80049a8:	429a      	cmp	r2, r3
- 80049aa:	d0a4      	beq.n	80048f6 <UART_WaitOnFlagUntilTimeout+0x12>
+ 8004216:	68fb      	ldr	r3, [r7, #12]
+ 8004218:	681b      	ldr	r3, [r3, #0]
+ 800421a:	69db      	ldr	r3, [r3, #28]
+ 800421c:	68ba      	ldr	r2, [r7, #8]
+ 800421e:	4013      	ands	r3, r2
+ 8004220:	68ba      	ldr	r2, [r7, #8]
+ 8004222:	1ad3      	subs	r3, r2, r3
+ 8004224:	425a      	negs	r2, r3
+ 8004226:	4153      	adcs	r3, r2
+ 8004228:	b2db      	uxtb	r3, r3
+ 800422a:	001a      	movs	r2, r3
+ 800422c:	1dfb      	adds	r3, r7, #7
+ 800422e:	781b      	ldrb	r3, [r3, #0]
+ 8004230:	429a      	cmp	r2, r3
+ 8004232:	d0a4      	beq.n	800417e <UART_WaitOnFlagUntilTimeout+0x12>
         }
       }
     }
   }
   return HAL_OK;
- 80049ac:	2300      	movs	r3, #0
+ 8004234:	2300      	movs	r3, #0
 }
- 80049ae:	0018      	movs	r0, r3
- 80049b0:	46bd      	mov	sp, r7
- 80049b2:	b004      	add	sp, #16
- 80049b4:	bd80      	pop	{r7, pc}
+ 8004236:	0018      	movs	r0, r3
+ 8004238:	46bd      	mov	sp, r7
+ 800423a:	b004      	add	sp, #16
+ 800423c:	bd80      	pop	{r7, pc}
 	...
 
-080049b8 <UART_Start_Receive_IT>:
-  * @param  pData Pointer to data buffer (u8 or u16 data elements).
-  * @param  Size  Amount of data elements (u8 or u16) to be received.
-  * @retval HAL status
-  */
-HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
-{
- 80049b8:	b580      	push	{r7, lr}
- 80049ba:	b090      	sub	sp, #64	; 0x40
- 80049bc:	af00      	add	r7, sp, #0
- 80049be:	60f8      	str	r0, [r7, #12]
- 80049c0:	60b9      	str	r1, [r7, #8]
- 80049c2:	1dbb      	adds	r3, r7, #6
- 80049c4:	801a      	strh	r2, [r3, #0]
-  huart->pRxBuffPtr  = pData;
- 80049c6:	68fb      	ldr	r3, [r7, #12]
- 80049c8:	68ba      	ldr	r2, [r7, #8]
- 80049ca:	655a      	str	r2, [r3, #84]	; 0x54
-  huart->RxXferSize  = Size;
- 80049cc:	68fb      	ldr	r3, [r7, #12]
- 80049ce:	1dba      	adds	r2, r7, #6
- 80049d0:	2158      	movs	r1, #88	; 0x58
- 80049d2:	8812      	ldrh	r2, [r2, #0]
- 80049d4:	525a      	strh	r2, [r3, r1]
-  huart->RxXferCount = Size;
- 80049d6:	68fb      	ldr	r3, [r7, #12]
- 80049d8:	1dba      	adds	r2, r7, #6
- 80049da:	215a      	movs	r1, #90	; 0x5a
- 80049dc:	8812      	ldrh	r2, [r2, #0]
- 80049de:	525a      	strh	r2, [r3, r1]
-  huart->RxISR       = NULL;
- 80049e0:	68fb      	ldr	r3, [r7, #12]
- 80049e2:	2200      	movs	r2, #0
- 80049e4:	669a      	str	r2, [r3, #104]	; 0x68
-
-  /* Computation of UART mask to apply to RDR register */
-  UART_MASK_COMPUTATION(huart);
- 80049e6:	68fb      	ldr	r3, [r7, #12]
- 80049e8:	689a      	ldr	r2, [r3, #8]
- 80049ea:	2380      	movs	r3, #128	; 0x80
- 80049ec:	015b      	lsls	r3, r3, #5
- 80049ee:	429a      	cmp	r2, r3
- 80049f0:	d10d      	bne.n	8004a0e <UART_Start_Receive_IT+0x56>
- 80049f2:	68fb      	ldr	r3, [r7, #12]
- 80049f4:	691b      	ldr	r3, [r3, #16]
- 80049f6:	2b00      	cmp	r3, #0
- 80049f8:	d104      	bne.n	8004a04 <UART_Start_Receive_IT+0x4c>
- 80049fa:	68fb      	ldr	r3, [r7, #12]
- 80049fc:	225c      	movs	r2, #92	; 0x5c
- 80049fe:	4950      	ldr	r1, [pc, #320]	; (8004b40 <UART_Start_Receive_IT+0x188>)
- 8004a00:	5299      	strh	r1, [r3, r2]
- 8004a02:	e02e      	b.n	8004a62 <UART_Start_Receive_IT+0xaa>
- 8004a04:	68fb      	ldr	r3, [r7, #12]
- 8004a06:	225c      	movs	r2, #92	; 0x5c
- 8004a08:	21ff      	movs	r1, #255	; 0xff
- 8004a0a:	5299      	strh	r1, [r3, r2]
- 8004a0c:	e029      	b.n	8004a62 <UART_Start_Receive_IT+0xaa>
- 8004a0e:	68fb      	ldr	r3, [r7, #12]
- 8004a10:	689b      	ldr	r3, [r3, #8]
- 8004a12:	2b00      	cmp	r3, #0
- 8004a14:	d10d      	bne.n	8004a32 <UART_Start_Receive_IT+0x7a>
- 8004a16:	68fb      	ldr	r3, [r7, #12]
- 8004a18:	691b      	ldr	r3, [r3, #16]
- 8004a1a:	2b00      	cmp	r3, #0
- 8004a1c:	d104      	bne.n	8004a28 <UART_Start_Receive_IT+0x70>
- 8004a1e:	68fb      	ldr	r3, [r7, #12]
- 8004a20:	225c      	movs	r2, #92	; 0x5c
- 8004a22:	21ff      	movs	r1, #255	; 0xff
- 8004a24:	5299      	strh	r1, [r3, r2]
- 8004a26:	e01c      	b.n	8004a62 <UART_Start_Receive_IT+0xaa>
- 8004a28:	68fb      	ldr	r3, [r7, #12]
- 8004a2a:	225c      	movs	r2, #92	; 0x5c
- 8004a2c:	217f      	movs	r1, #127	; 0x7f
- 8004a2e:	5299      	strh	r1, [r3, r2]
- 8004a30:	e017      	b.n	8004a62 <UART_Start_Receive_IT+0xaa>
- 8004a32:	68fb      	ldr	r3, [r7, #12]
- 8004a34:	689a      	ldr	r2, [r3, #8]
- 8004a36:	2380      	movs	r3, #128	; 0x80
- 8004a38:	055b      	lsls	r3, r3, #21
- 8004a3a:	429a      	cmp	r2, r3
- 8004a3c:	d10d      	bne.n	8004a5a <UART_Start_Receive_IT+0xa2>
- 8004a3e:	68fb      	ldr	r3, [r7, #12]
- 8004a40:	691b      	ldr	r3, [r3, #16]
- 8004a42:	2b00      	cmp	r3, #0
- 8004a44:	d104      	bne.n	8004a50 <UART_Start_Receive_IT+0x98>
- 8004a46:	68fb      	ldr	r3, [r7, #12]
- 8004a48:	225c      	movs	r2, #92	; 0x5c
- 8004a4a:	217f      	movs	r1, #127	; 0x7f
- 8004a4c:	5299      	strh	r1, [r3, r2]
- 8004a4e:	e008      	b.n	8004a62 <UART_Start_Receive_IT+0xaa>
- 8004a50:	68fb      	ldr	r3, [r7, #12]
- 8004a52:	225c      	movs	r2, #92	; 0x5c
- 8004a54:	213f      	movs	r1, #63	; 0x3f
- 8004a56:	5299      	strh	r1, [r3, r2]
- 8004a58:	e003      	b.n	8004a62 <UART_Start_Receive_IT+0xaa>
- 8004a5a:	68fb      	ldr	r3, [r7, #12]
- 8004a5c:	225c      	movs	r2, #92	; 0x5c
- 8004a5e:	2100      	movs	r1, #0
- 8004a60:	5299      	strh	r1, [r3, r2]
-
-  huart->ErrorCode = HAL_UART_ERROR_NONE;
- 8004a62:	68fb      	ldr	r3, [r7, #12]
- 8004a64:	2284      	movs	r2, #132	; 0x84
- 8004a66:	2100      	movs	r1, #0
- 8004a68:	5099      	str	r1, [r3, r2]
-  huart->RxState = HAL_UART_STATE_BUSY_RX;
- 8004a6a:	68fb      	ldr	r3, [r7, #12]
- 8004a6c:	2280      	movs	r2, #128	; 0x80
- 8004a6e:	2122      	movs	r1, #34	; 0x22
- 8004a70:	5099      	str	r1, [r3, r2]
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004a72:	f3ef 8310 	mrs	r3, PRIMASK
- 8004a76:	62bb      	str	r3, [r7, #40]	; 0x28
-  return(result);
- 8004a78:	6abb      	ldr	r3, [r7, #40]	; 0x28
-
-  /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-  ATOMIC_SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8004a7a:	63fb      	str	r3, [r7, #60]	; 0x3c
- 8004a7c:	2301      	movs	r3, #1
- 8004a7e:	62fb      	str	r3, [r7, #44]	; 0x2c
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004a80:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 8004a82:	f383 8810 	msr	PRIMASK, r3
-}
- 8004a86:	46c0      	nop			; (mov r8, r8)
- 8004a88:	68fb      	ldr	r3, [r7, #12]
- 8004a8a:	681b      	ldr	r3, [r3, #0]
- 8004a8c:	689a      	ldr	r2, [r3, #8]
- 8004a8e:	68fb      	ldr	r3, [r7, #12]
- 8004a90:	681b      	ldr	r3, [r3, #0]
- 8004a92:	2101      	movs	r1, #1
- 8004a94:	430a      	orrs	r2, r1
- 8004a96:	609a      	str	r2, [r3, #8]
- 8004a98:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
- 8004a9a:	633b      	str	r3, [r7, #48]	; 0x30
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004a9c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 8004a9e:	f383 8810 	msr	PRIMASK, r3
-}
- 8004aa2:	46c0      	nop			; (mov r8, r8)
-
-  /* Set the Rx ISR function pointer according to the data word length */
-  if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
- 8004aa4:	68fb      	ldr	r3, [r7, #12]
- 8004aa6:	689a      	ldr	r2, [r3, #8]
- 8004aa8:	2380      	movs	r3, #128	; 0x80
- 8004aaa:	015b      	lsls	r3, r3, #5
- 8004aac:	429a      	cmp	r2, r3
- 8004aae:	d107      	bne.n	8004ac0 <UART_Start_Receive_IT+0x108>
- 8004ab0:	68fb      	ldr	r3, [r7, #12]
- 8004ab2:	691b      	ldr	r3, [r3, #16]
- 8004ab4:	2b00      	cmp	r3, #0
- 8004ab6:	d103      	bne.n	8004ac0 <UART_Start_Receive_IT+0x108>
-  {
-    huart->RxISR = UART_RxISR_16BIT;
- 8004ab8:	68fb      	ldr	r3, [r7, #12]
- 8004aba:	4a22      	ldr	r2, [pc, #136]	; (8004b44 <UART_Start_Receive_IT+0x18c>)
- 8004abc:	669a      	str	r2, [r3, #104]	; 0x68
- 8004abe:	e002      	b.n	8004ac6 <UART_Start_Receive_IT+0x10e>
-  }
-  else
-  {
-    huart->RxISR = UART_RxISR_8BIT;
- 8004ac0:	68fb      	ldr	r3, [r7, #12]
- 8004ac2:	4a21      	ldr	r2, [pc, #132]	; (8004b48 <UART_Start_Receive_IT+0x190>)
- 8004ac4:	669a      	str	r2, [r3, #104]	; 0x68
-  }
-
-  /* Enable the UART Parity Error interrupt and Data Register Not Empty interrupt */
-  if (huart->Init.Parity != UART_PARITY_NONE)
- 8004ac6:	68fb      	ldr	r3, [r7, #12]
- 8004ac8:	691b      	ldr	r3, [r3, #16]
- 8004aca:	2b00      	cmp	r3, #0
- 8004acc:	d019      	beq.n	8004b02 <UART_Start_Receive_IT+0x14a>
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004ace:	f3ef 8310 	mrs	r3, PRIMASK
- 8004ad2:	61fb      	str	r3, [r7, #28]
-  return(result);
- 8004ad4:	69fb      	ldr	r3, [r7, #28]
-  {
-    ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
- 8004ad6:	637b      	str	r3, [r7, #52]	; 0x34
- 8004ad8:	2301      	movs	r3, #1
- 8004ada:	623b      	str	r3, [r7, #32]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004adc:	6a3b      	ldr	r3, [r7, #32]
- 8004ade:	f383 8810 	msr	PRIMASK, r3
-}
- 8004ae2:	46c0      	nop			; (mov r8, r8)
- 8004ae4:	68fb      	ldr	r3, [r7, #12]
- 8004ae6:	681b      	ldr	r3, [r3, #0]
- 8004ae8:	681a      	ldr	r2, [r3, #0]
- 8004aea:	68fb      	ldr	r3, [r7, #12]
- 8004aec:	681b      	ldr	r3, [r3, #0]
- 8004aee:	2190      	movs	r1, #144	; 0x90
- 8004af0:	0049      	lsls	r1, r1, #1
- 8004af2:	430a      	orrs	r2, r1
- 8004af4:	601a      	str	r2, [r3, #0]
- 8004af6:	6b7b      	ldr	r3, [r7, #52]	; 0x34
- 8004af8:	627b      	str	r3, [r7, #36]	; 0x24
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004afa:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 8004afc:	f383 8810 	msr	PRIMASK, r3
-}
- 8004b00:	e018      	b.n	8004b34 <UART_Start_Receive_IT+0x17c>
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004b02:	f3ef 8310 	mrs	r3, PRIMASK
- 8004b06:	613b      	str	r3, [r7, #16]
-  return(result);
- 8004b08:	693b      	ldr	r3, [r7, #16]
-  }
-  else
-  {
-    ATOMIC_SET_BIT(huart->Instance->CR1, USART_CR1_RXNEIE);
- 8004b0a:	63bb      	str	r3, [r7, #56]	; 0x38
- 8004b0c:	2301      	movs	r3, #1
- 8004b0e:	617b      	str	r3, [r7, #20]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004b10:	697b      	ldr	r3, [r7, #20]
- 8004b12:	f383 8810 	msr	PRIMASK, r3
-}
- 8004b16:	46c0      	nop			; (mov r8, r8)
- 8004b18:	68fb      	ldr	r3, [r7, #12]
- 8004b1a:	681b      	ldr	r3, [r3, #0]
- 8004b1c:	681a      	ldr	r2, [r3, #0]
- 8004b1e:	68fb      	ldr	r3, [r7, #12]
- 8004b20:	681b      	ldr	r3, [r3, #0]
- 8004b22:	2120      	movs	r1, #32
- 8004b24:	430a      	orrs	r2, r1
- 8004b26:	601a      	str	r2, [r3, #0]
- 8004b28:	6bbb      	ldr	r3, [r7, #56]	; 0x38
- 8004b2a:	61bb      	str	r3, [r7, #24]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004b2c:	69bb      	ldr	r3, [r7, #24]
- 8004b2e:	f383 8810 	msr	PRIMASK, r3
-}
- 8004b32:	46c0      	nop			; (mov r8, r8)
-  }
-  return HAL_OK;
- 8004b34:	2300      	movs	r3, #0
-}
- 8004b36:	0018      	movs	r0, r3
- 8004b38:	46bd      	mov	sp, r7
- 8004b3a:	b010      	add	sp, #64	; 0x40
- 8004b3c:	bd80      	pop	{r7, pc}
- 8004b3e:	46c0      	nop			; (mov r8, r8)
- 8004b40:	000001ff 	.word	0x000001ff
- 8004b44:	08004e5d 	.word	0x08004e5d
- 8004b48:	08004c99 	.word	0x08004c99
-
-08004b4c <UART_EndRxTransfer>:
+08004240 <UART_EndRxTransfer>:
   * @brief  End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
   * @param  huart UART handle.
   * @retval None
   */
 static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
 {
- 8004b4c:	b580      	push	{r7, lr}
- 8004b4e:	b08e      	sub	sp, #56	; 0x38
- 8004b50:	af00      	add	r7, sp, #0
- 8004b52:	6078      	str	r0, [r7, #4]
+ 8004240:	b580      	push	{r7, lr}
+ 8004242:	b08e      	sub	sp, #56	; 0x38
+ 8004244:	af00      	add	r7, sp, #0
+ 8004246:	6078      	str	r0, [r7, #4]
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004b54:	f3ef 8310 	mrs	r3, PRIMASK
- 8004b58:	617b      	str	r3, [r7, #20]
+ 8004248:	f3ef 8310 	mrs	r3, PRIMASK
+ 800424c:	617b      	str	r3, [r7, #20]
   return(result);
- 8004b5a:	697b      	ldr	r3, [r7, #20]
+ 800424e:	697b      	ldr	r3, [r7, #20]
   /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
   ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
- 8004b5c:	637b      	str	r3, [r7, #52]	; 0x34
- 8004b5e:	2301      	movs	r3, #1
- 8004b60:	61bb      	str	r3, [r7, #24]
+ 8004250:	637b      	str	r3, [r7, #52]	; 0x34
+ 8004252:	2301      	movs	r3, #1
+ 8004254:	61bb      	str	r3, [r7, #24]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004b62:	69bb      	ldr	r3, [r7, #24]
- 8004b64:	f383 8810 	msr	PRIMASK, r3
+ 8004256:	69bb      	ldr	r3, [r7, #24]
+ 8004258:	f383 8810 	msr	PRIMASK, r3
 }
- 8004b68:	46c0      	nop			; (mov r8, r8)
- 8004b6a:	687b      	ldr	r3, [r7, #4]
- 8004b6c:	681b      	ldr	r3, [r3, #0]
- 8004b6e:	681a      	ldr	r2, [r3, #0]
- 8004b70:	687b      	ldr	r3, [r7, #4]
- 8004b72:	681b      	ldr	r3, [r3, #0]
- 8004b74:	4926      	ldr	r1, [pc, #152]	; (8004c10 <UART_EndRxTransfer+0xc4>)
- 8004b76:	400a      	ands	r2, r1
- 8004b78:	601a      	str	r2, [r3, #0]
- 8004b7a:	6b7b      	ldr	r3, [r7, #52]	; 0x34
- 8004b7c:	61fb      	str	r3, [r7, #28]
+ 800425c:	46c0      	nop			; (mov r8, r8)
+ 800425e:	687b      	ldr	r3, [r7, #4]
+ 8004260:	681b      	ldr	r3, [r3, #0]
+ 8004262:	681a      	ldr	r2, [r3, #0]
+ 8004264:	687b      	ldr	r3, [r7, #4]
+ 8004266:	681b      	ldr	r3, [r3, #0]
+ 8004268:	4926      	ldr	r1, [pc, #152]	; (8004304 <UART_EndRxTransfer+0xc4>)
+ 800426a:	400a      	ands	r2, r1
+ 800426c:	601a      	str	r2, [r3, #0]
+ 800426e:	6b7b      	ldr	r3, [r7, #52]	; 0x34
+ 8004270:	61fb      	str	r3, [r7, #28]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004b7e:	69fb      	ldr	r3, [r7, #28]
- 8004b80:	f383 8810 	msr	PRIMASK, r3
+ 8004272:	69fb      	ldr	r3, [r7, #28]
+ 8004274:	f383 8810 	msr	PRIMASK, r3
 }
- 8004b84:	46c0      	nop			; (mov r8, r8)
+ 8004278:	46c0      	nop			; (mov r8, r8)
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004b86:	f3ef 8310 	mrs	r3, PRIMASK
- 8004b8a:	623b      	str	r3, [r7, #32]
+ 800427a:	f3ef 8310 	mrs	r3, PRIMASK
+ 800427e:	623b      	str	r3, [r7, #32]
   return(result);
- 8004b8c:	6a3b      	ldr	r3, [r7, #32]
+ 8004280:	6a3b      	ldr	r3, [r7, #32]
   ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8004b8e:	633b      	str	r3, [r7, #48]	; 0x30
- 8004b90:	2301      	movs	r3, #1
- 8004b92:	627b      	str	r3, [r7, #36]	; 0x24
+ 8004282:	633b      	str	r3, [r7, #48]	; 0x30
+ 8004284:	2301      	movs	r3, #1
+ 8004286:	627b      	str	r3, [r7, #36]	; 0x24
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004b94:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 8004b96:	f383 8810 	msr	PRIMASK, r3
+ 8004288:	6a7b      	ldr	r3, [r7, #36]	; 0x24
+ 800428a:	f383 8810 	msr	PRIMASK, r3
 }
- 8004b9a:	46c0      	nop			; (mov r8, r8)
- 8004b9c:	687b      	ldr	r3, [r7, #4]
- 8004b9e:	681b      	ldr	r3, [r3, #0]
- 8004ba0:	689a      	ldr	r2, [r3, #8]
- 8004ba2:	687b      	ldr	r3, [r7, #4]
- 8004ba4:	681b      	ldr	r3, [r3, #0]
- 8004ba6:	2101      	movs	r1, #1
- 8004ba8:	438a      	bics	r2, r1
- 8004baa:	609a      	str	r2, [r3, #8]
- 8004bac:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 8004bae:	62bb      	str	r3, [r7, #40]	; 0x28
+ 800428e:	46c0      	nop			; (mov r8, r8)
+ 8004290:	687b      	ldr	r3, [r7, #4]
+ 8004292:	681b      	ldr	r3, [r3, #0]
+ 8004294:	689a      	ldr	r2, [r3, #8]
+ 8004296:	687b      	ldr	r3, [r7, #4]
+ 8004298:	681b      	ldr	r3, [r3, #0]
+ 800429a:	2101      	movs	r1, #1
+ 800429c:	438a      	bics	r2, r1
+ 800429e:	609a      	str	r2, [r3, #8]
+ 80042a0:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+ 80042a2:	62bb      	str	r3, [r7, #40]	; 0x28
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004bb0:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 8004bb2:	f383 8810 	msr	PRIMASK, r3
+ 80042a4:	6abb      	ldr	r3, [r7, #40]	; 0x28
+ 80042a6:	f383 8810 	msr	PRIMASK, r3
 }
- 8004bb6:	46c0      	nop			; (mov r8, r8)
+ 80042aa:	46c0      	nop			; (mov r8, r8)
 
   /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
   if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- 8004bb8:	687b      	ldr	r3, [r7, #4]
- 8004bba:	6e1b      	ldr	r3, [r3, #96]	; 0x60
- 8004bbc:	2b01      	cmp	r3, #1
- 8004bbe:	d118      	bne.n	8004bf2 <UART_EndRxTransfer+0xa6>
+ 80042ac:	687b      	ldr	r3, [r7, #4]
+ 80042ae:	6e1b      	ldr	r3, [r3, #96]	; 0x60
+ 80042b0:	2b01      	cmp	r3, #1
+ 80042b2:	d118      	bne.n	80042e6 <UART_EndRxTransfer+0xa6>
   __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004bc0:	f3ef 8310 	mrs	r3, PRIMASK
- 8004bc4:	60bb      	str	r3, [r7, #8]
+ 80042b4:	f3ef 8310 	mrs	r3, PRIMASK
+ 80042b8:	60bb      	str	r3, [r7, #8]
   return(result);
- 8004bc6:	68bb      	ldr	r3, [r7, #8]
+ 80042ba:	68bb      	ldr	r3, [r7, #8]
   {
     ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 8004bc8:	62fb      	str	r3, [r7, #44]	; 0x2c
- 8004bca:	2301      	movs	r3, #1
- 8004bcc:	60fb      	str	r3, [r7, #12]
+ 80042bc:	62fb      	str	r3, [r7, #44]	; 0x2c
+ 80042be:	2301      	movs	r3, #1
+ 80042c0:	60fb      	str	r3, [r7, #12]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004bce:	68fb      	ldr	r3, [r7, #12]
- 8004bd0:	f383 8810 	msr	PRIMASK, r3
+ 80042c2:	68fb      	ldr	r3, [r7, #12]
+ 80042c4:	f383 8810 	msr	PRIMASK, r3
 }
- 8004bd4:	46c0      	nop			; (mov r8, r8)
- 8004bd6:	687b      	ldr	r3, [r7, #4]
- 8004bd8:	681b      	ldr	r3, [r3, #0]
- 8004bda:	681a      	ldr	r2, [r3, #0]
- 8004bdc:	687b      	ldr	r3, [r7, #4]
- 8004bde:	681b      	ldr	r3, [r3, #0]
- 8004be0:	2110      	movs	r1, #16
- 8004be2:	438a      	bics	r2, r1
- 8004be4:	601a      	str	r2, [r3, #0]
- 8004be6:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 8004be8:	613b      	str	r3, [r7, #16]
+ 80042c8:	46c0      	nop			; (mov r8, r8)
+ 80042ca:	687b      	ldr	r3, [r7, #4]
+ 80042cc:	681b      	ldr	r3, [r3, #0]
+ 80042ce:	681a      	ldr	r2, [r3, #0]
+ 80042d0:	687b      	ldr	r3, [r7, #4]
+ 80042d2:	681b      	ldr	r3, [r3, #0]
+ 80042d4:	2110      	movs	r1, #16
+ 80042d6:	438a      	bics	r2, r1
+ 80042d8:	601a      	str	r2, [r3, #0]
+ 80042da:	6afb      	ldr	r3, [r7, #44]	; 0x2c
+ 80042dc:	613b      	str	r3, [r7, #16]
   __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004bea:	693b      	ldr	r3, [r7, #16]
- 8004bec:	f383 8810 	msr	PRIMASK, r3
+ 80042de:	693b      	ldr	r3, [r7, #16]
+ 80042e0:	f383 8810 	msr	PRIMASK, r3
 }
- 8004bf0:	46c0      	nop			; (mov r8, r8)
+ 80042e4:	46c0      	nop			; (mov r8, r8)
   }
 
   /* At end of Rx process, restore huart->RxState to Ready */
   huart->RxState = HAL_UART_STATE_READY;
- 8004bf2:	687b      	ldr	r3, [r7, #4]
- 8004bf4:	2280      	movs	r2, #128	; 0x80
- 8004bf6:	2120      	movs	r1, #32
- 8004bf8:	5099      	str	r1, [r3, r2]
+ 80042e6:	687b      	ldr	r3, [r7, #4]
+ 80042e8:	2280      	movs	r2, #128	; 0x80
+ 80042ea:	2120      	movs	r1, #32
+ 80042ec:	5099      	str	r1, [r3, r2]
   huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 8004bfa:	687b      	ldr	r3, [r7, #4]
- 8004bfc:	2200      	movs	r2, #0
- 8004bfe:	661a      	str	r2, [r3, #96]	; 0x60
+ 80042ee:	687b      	ldr	r3, [r7, #4]
+ 80042f0:	2200      	movs	r2, #0
+ 80042f2:	661a      	str	r2, [r3, #96]	; 0x60
 
   /* Reset RxIsr function pointer */
   huart->RxISR = NULL;
- 8004c00:	687b      	ldr	r3, [r7, #4]
- 8004c02:	2200      	movs	r2, #0
- 8004c04:	669a      	str	r2, [r3, #104]	; 0x68
+ 80042f4:	687b      	ldr	r3, [r7, #4]
+ 80042f6:	2200      	movs	r2, #0
+ 80042f8:	669a      	str	r2, [r3, #104]	; 0x68
 }
- 8004c06:	46c0      	nop			; (mov r8, r8)
- 8004c08:	46bd      	mov	sp, r7
- 8004c0a:	b00e      	add	sp, #56	; 0x38
- 8004c0c:	bd80      	pop	{r7, pc}
- 8004c0e:	46c0      	nop			; (mov r8, r8)
- 8004c10:	fffffedf 	.word	0xfffffedf
+ 80042fa:	46c0      	nop			; (mov r8, r8)
+ 80042fc:	46bd      	mov	sp, r7
+ 80042fe:	b00e      	add	sp, #56	; 0x38
+ 8004300:	bd80      	pop	{r7, pc}
+ 8004302:	46c0      	nop			; (mov r8, r8)
+ 8004304:	fffffedf 	.word	0xfffffedf
 
-08004c14 <UART_DMAAbortOnError>:
-  *         (To be called at end of DMA Abort procedure following error occurrence).
-  * @param  hdma DMA handle.
-  * @retval None
-  */
-static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
-{
- 8004c14:	b580      	push	{r7, lr}
- 8004c16:	b084      	sub	sp, #16
- 8004c18:	af00      	add	r7, sp, #0
- 8004c1a:	6078      	str	r0, [r7, #4]
-  UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
- 8004c1c:	687b      	ldr	r3, [r7, #4]
- 8004c1e:	6a9b      	ldr	r3, [r3, #40]	; 0x28
- 8004c20:	60fb      	str	r3, [r7, #12]
-  huart->RxXferCount = 0U;
- 8004c22:	68fb      	ldr	r3, [r7, #12]
- 8004c24:	225a      	movs	r2, #90	; 0x5a
- 8004c26:	2100      	movs	r1, #0
- 8004c28:	5299      	strh	r1, [r3, r2]
-  huart->TxXferCount = 0U;
- 8004c2a:	68fb      	ldr	r3, [r7, #12]
- 8004c2c:	2252      	movs	r2, #82	; 0x52
- 8004c2e:	2100      	movs	r1, #0
- 8004c30:	5299      	strh	r1, [r3, r2]
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-  /*Call registered error callback*/
-  huart->ErrorCallback(huart);
-#else
-  /*Call legacy weak error callback*/
-  HAL_UART_ErrorCallback(huart);
- 8004c32:	68fb      	ldr	r3, [r7, #12]
- 8004c34:	0018      	movs	r0, r3
- 8004c36:	f7ff fa61 	bl	80040fc <HAL_UART_ErrorCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 8004c3a:	46c0      	nop			; (mov r8, r8)
- 8004c3c:	46bd      	mov	sp, r7
- 8004c3e:	b004      	add	sp, #16
- 8004c40:	bd80      	pop	{r7, pc}
+08004308 <siprintf>:
+ 8004308:	b40e      	push	{r1, r2, r3}
+ 800430a:	b500      	push	{lr}
+ 800430c:	490b      	ldr	r1, [pc, #44]	; (800433c <siprintf+0x34>)
+ 800430e:	b09c      	sub	sp, #112	; 0x70
+ 8004310:	ab1d      	add	r3, sp, #116	; 0x74
+ 8004312:	9002      	str	r0, [sp, #8]
+ 8004314:	9006      	str	r0, [sp, #24]
+ 8004316:	9107      	str	r1, [sp, #28]
+ 8004318:	9104      	str	r1, [sp, #16]
+ 800431a:	4809      	ldr	r0, [pc, #36]	; (8004340 <siprintf+0x38>)
+ 800431c:	4909      	ldr	r1, [pc, #36]	; (8004344 <siprintf+0x3c>)
+ 800431e:	cb04      	ldmia	r3!, {r2}
+ 8004320:	9105      	str	r1, [sp, #20]
+ 8004322:	6800      	ldr	r0, [r0, #0]
+ 8004324:	a902      	add	r1, sp, #8
+ 8004326:	9301      	str	r3, [sp, #4]
+ 8004328:	f000 f9a2 	bl	8004670 <_svfiprintf_r>
+ 800432c:	2200      	movs	r2, #0
+ 800432e:	9b02      	ldr	r3, [sp, #8]
+ 8004330:	701a      	strb	r2, [r3, #0]
+ 8004332:	b01c      	add	sp, #112	; 0x70
+ 8004334:	bc08      	pop	{r3}
+ 8004336:	b003      	add	sp, #12
+ 8004338:	4718      	bx	r3
+ 800433a:	46c0      	nop			; (mov r8, r8)
+ 800433c:	7fffffff 	.word	0x7fffffff
+ 8004340:	20000058 	.word	0x20000058
+ 8004344:	ffff0208 	.word	0xffff0208
 
-08004c42 <UART_EndTransmit_IT>:
-  * @param  huart pointer to a UART_HandleTypeDef structure that contains
-  *                the configuration information for the specified UART module.
-  * @retval None
-  */
-static void UART_EndTransmit_IT(UART_HandleTypeDef *huart)
-{
- 8004c42:	b580      	push	{r7, lr}
- 8004c44:	b086      	sub	sp, #24
- 8004c46:	af00      	add	r7, sp, #0
- 8004c48:	6078      	str	r0, [r7, #4]
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004c4a:	f3ef 8310 	mrs	r3, PRIMASK
- 8004c4e:	60bb      	str	r3, [r7, #8]
-  return(result);
- 8004c50:	68bb      	ldr	r3, [r7, #8]
-  /* Disable the UART Transmit Complete Interrupt */
-  ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
- 8004c52:	617b      	str	r3, [r7, #20]
- 8004c54:	2301      	movs	r3, #1
- 8004c56:	60fb      	str	r3, [r7, #12]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004c58:	68fb      	ldr	r3, [r7, #12]
- 8004c5a:	f383 8810 	msr	PRIMASK, r3
-}
- 8004c5e:	46c0      	nop			; (mov r8, r8)
- 8004c60:	687b      	ldr	r3, [r7, #4]
- 8004c62:	681b      	ldr	r3, [r3, #0]
- 8004c64:	681a      	ldr	r2, [r3, #0]
- 8004c66:	687b      	ldr	r3, [r7, #4]
- 8004c68:	681b      	ldr	r3, [r3, #0]
- 8004c6a:	2140      	movs	r1, #64	; 0x40
- 8004c6c:	438a      	bics	r2, r1
- 8004c6e:	601a      	str	r2, [r3, #0]
- 8004c70:	697b      	ldr	r3, [r7, #20]
- 8004c72:	613b      	str	r3, [r7, #16]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004c74:	693b      	ldr	r3, [r7, #16]
- 8004c76:	f383 8810 	msr	PRIMASK, r3
-}
- 8004c7a:	46c0      	nop			; (mov r8, r8)
+08004348 <memset>:
+ 8004348:	0003      	movs	r3, r0
+ 800434a:	1882      	adds	r2, r0, r2
+ 800434c:	4293      	cmp	r3, r2
+ 800434e:	d100      	bne.n	8004352 <memset+0xa>
+ 8004350:	4770      	bx	lr
+ 8004352:	7019      	strb	r1, [r3, #0]
+ 8004354:	3301      	adds	r3, #1
+ 8004356:	e7f9      	b.n	800434c <memset+0x4>
 
-  /* Tx process is ended, restore huart->gState to Ready */
-  huart->gState = HAL_UART_STATE_READY;
- 8004c7c:	687b      	ldr	r3, [r7, #4]
- 8004c7e:	2220      	movs	r2, #32
- 8004c80:	67da      	str	r2, [r3, #124]	; 0x7c
+08004358 <__errno>:
+ 8004358:	4b01      	ldr	r3, [pc, #4]	; (8004360 <__errno+0x8>)
+ 800435a:	6818      	ldr	r0, [r3, #0]
+ 800435c:	4770      	bx	lr
+ 800435e:	46c0      	nop			; (mov r8, r8)
+ 8004360:	20000058 	.word	0x20000058
 
-  /* Cleat TxISR function pointer */
-  huart->TxISR = NULL;
- 8004c82:	687b      	ldr	r3, [r7, #4]
- 8004c84:	2200      	movs	r2, #0
- 8004c86:	66da      	str	r2, [r3, #108]	; 0x6c
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-  /*Call registered Tx complete callback*/
-  huart->TxCpltCallback(huart);
-#else
-  /*Call legacy weak Tx complete callback*/
-  HAL_UART_TxCpltCallback(huart);
- 8004c88:	687b      	ldr	r3, [r7, #4]
- 8004c8a:	0018      	movs	r0, r3
- 8004c8c:	f7ff fa2e 	bl	80040ec <HAL_UART_TxCpltCallback>
-#endif /* USE_HAL_UART_REGISTER_CALLBACKS */
-}
- 8004c90:	46c0      	nop			; (mov r8, r8)
- 8004c92:	46bd      	mov	sp, r7
- 8004c94:	b006      	add	sp, #24
- 8004c96:	bd80      	pop	{r7, pc}
+08004364 <__libc_init_array>:
+ 8004364:	b570      	push	{r4, r5, r6, lr}
+ 8004366:	2600      	movs	r6, #0
+ 8004368:	4c0c      	ldr	r4, [pc, #48]	; (800439c <__libc_init_array+0x38>)
+ 800436a:	4d0d      	ldr	r5, [pc, #52]	; (80043a0 <__libc_init_array+0x3c>)
+ 800436c:	1b64      	subs	r4, r4, r5
+ 800436e:	10a4      	asrs	r4, r4, #2
+ 8004370:	42a6      	cmp	r6, r4
+ 8004372:	d109      	bne.n	8004388 <__libc_init_array+0x24>
+ 8004374:	2600      	movs	r6, #0
+ 8004376:	f000 fc6d 	bl	8004c54 <_init>
+ 800437a:	4c0a      	ldr	r4, [pc, #40]	; (80043a4 <__libc_init_array+0x40>)
+ 800437c:	4d0a      	ldr	r5, [pc, #40]	; (80043a8 <__libc_init_array+0x44>)
+ 800437e:	1b64      	subs	r4, r4, r5
+ 8004380:	10a4      	asrs	r4, r4, #2
+ 8004382:	42a6      	cmp	r6, r4
+ 8004384:	d105      	bne.n	8004392 <__libc_init_array+0x2e>
+ 8004386:	bd70      	pop	{r4, r5, r6, pc}
+ 8004388:	00b3      	lsls	r3, r6, #2
+ 800438a:	58eb      	ldr	r3, [r5, r3]
+ 800438c:	4798      	blx	r3
+ 800438e:	3601      	adds	r6, #1
+ 8004390:	e7ee      	b.n	8004370 <__libc_init_array+0xc>
+ 8004392:	00b3      	lsls	r3, r6, #2
+ 8004394:	58eb      	ldr	r3, [r5, r3]
+ 8004396:	4798      	blx	r3
+ 8004398:	3601      	adds	r6, #1
+ 800439a:	e7f2      	b.n	8004382 <__libc_init_array+0x1e>
+ 800439c:	08004d58 	.word	0x08004d58
+ 80043a0:	08004d58 	.word	0x08004d58
+ 80043a4:	08004d5c 	.word	0x08004d5c
+ 80043a8:	08004d58 	.word	0x08004d58
 
-08004c98 <UART_RxISR_8BIT>:
-  * @brief RX interrupt handler for 7 or 8 bits data word length .
-  * @param huart UART handle.
-  * @retval None
-  */
-static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
-{
- 8004c98:	b580      	push	{r7, lr}
- 8004c9a:	b094      	sub	sp, #80	; 0x50
- 8004c9c:	af00      	add	r7, sp, #0
- 8004c9e:	6078      	str	r0, [r7, #4]
-  uint16_t uhMask = huart->Mask;
- 8004ca0:	204e      	movs	r0, #78	; 0x4e
- 8004ca2:	183b      	adds	r3, r7, r0
- 8004ca4:	687a      	ldr	r2, [r7, #4]
- 8004ca6:	215c      	movs	r1, #92	; 0x5c
- 8004ca8:	5a52      	ldrh	r2, [r2, r1]
- 8004caa:	801a      	strh	r2, [r3, #0]
-  uint16_t  uhdata;
+080043ac <__retarget_lock_acquire_recursive>:
+ 80043ac:	4770      	bx	lr
 
-  /* Check that a Rx process is ongoing */
-  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
- 8004cac:	687b      	ldr	r3, [r7, #4]
- 8004cae:	2280      	movs	r2, #128	; 0x80
- 8004cb0:	589b      	ldr	r3, [r3, r2]
- 8004cb2:	2b22      	cmp	r3, #34	; 0x22
- 8004cb4:	d000      	beq.n	8004cb8 <UART_RxISR_8BIT+0x20>
- 8004cb6:	e0bf      	b.n	8004e38 <UART_RxISR_8BIT+0x1a0>
-  {
-    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
- 8004cb8:	687b      	ldr	r3, [r7, #4]
- 8004cba:	681b      	ldr	r3, [r3, #0]
- 8004cbc:	6a5a      	ldr	r2, [r3, #36]	; 0x24
- 8004cbe:	214c      	movs	r1, #76	; 0x4c
- 8004cc0:	187b      	adds	r3, r7, r1
- 8004cc2:	801a      	strh	r2, [r3, #0]
-    *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
- 8004cc4:	187b      	adds	r3, r7, r1
- 8004cc6:	881b      	ldrh	r3, [r3, #0]
- 8004cc8:	b2da      	uxtb	r2, r3
- 8004cca:	183b      	adds	r3, r7, r0
- 8004ccc:	881b      	ldrh	r3, [r3, #0]
- 8004cce:	b2d9      	uxtb	r1, r3
- 8004cd0:	687b      	ldr	r3, [r7, #4]
- 8004cd2:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 8004cd4:	400a      	ands	r2, r1
- 8004cd6:	b2d2      	uxtb	r2, r2
- 8004cd8:	701a      	strb	r2, [r3, #0]
-    huart->pRxBuffPtr++;
- 8004cda:	687b      	ldr	r3, [r7, #4]
- 8004cdc:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 8004cde:	1c5a      	adds	r2, r3, #1
- 8004ce0:	687b      	ldr	r3, [r7, #4]
- 8004ce2:	655a      	str	r2, [r3, #84]	; 0x54
-    huart->RxXferCount--;
- 8004ce4:	687b      	ldr	r3, [r7, #4]
- 8004ce6:	225a      	movs	r2, #90	; 0x5a
- 8004ce8:	5a9b      	ldrh	r3, [r3, r2]
- 8004cea:	b29b      	uxth	r3, r3
- 8004cec:	3b01      	subs	r3, #1
- 8004cee:	b299      	uxth	r1, r3
- 8004cf0:	687b      	ldr	r3, [r7, #4]
- 8004cf2:	225a      	movs	r2, #90	; 0x5a
- 8004cf4:	5299      	strh	r1, [r3, r2]
+080043ae <__retarget_lock_release_recursive>:
+ 80043ae:	4770      	bx	lr
 
-    if (huart->RxXferCount == 0U)
- 8004cf6:	687b      	ldr	r3, [r7, #4]
- 8004cf8:	225a      	movs	r2, #90	; 0x5a
- 8004cfa:	5a9b      	ldrh	r3, [r3, r2]
- 8004cfc:	b29b      	uxth	r3, r3
- 8004cfe:	2b00      	cmp	r3, #0
- 8004d00:	d000      	beq.n	8004d04 <UART_RxISR_8BIT+0x6c>
- 8004d02:	e0a1      	b.n	8004e48 <UART_RxISR_8BIT+0x1b0>
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004d04:	f3ef 8310 	mrs	r3, PRIMASK
- 8004d08:	627b      	str	r3, [r7, #36]	; 0x24
-  return(result);
- 8004d0a:	6a7b      	ldr	r3, [r7, #36]	; 0x24
-    {
-      /* Disable the UART Parity Error Interrupt and RXNE interrupts */
-      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
- 8004d0c:	64bb      	str	r3, [r7, #72]	; 0x48
- 8004d0e:	2301      	movs	r3, #1
- 8004d10:	62bb      	str	r3, [r7, #40]	; 0x28
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004d12:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 8004d14:	f383 8810 	msr	PRIMASK, r3
-}
- 8004d18:	46c0      	nop			; (mov r8, r8)
- 8004d1a:	687b      	ldr	r3, [r7, #4]
- 8004d1c:	681b      	ldr	r3, [r3, #0]
- 8004d1e:	681a      	ldr	r2, [r3, #0]
- 8004d20:	687b      	ldr	r3, [r7, #4]
- 8004d22:	681b      	ldr	r3, [r3, #0]
- 8004d24:	494a      	ldr	r1, [pc, #296]	; (8004e50 <UART_RxISR_8BIT+0x1b8>)
- 8004d26:	400a      	ands	r2, r1
- 8004d28:	601a      	str	r2, [r3, #0]
- 8004d2a:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8004d2c:	62fb      	str	r3, [r7, #44]	; 0x2c
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004d2e:	6afb      	ldr	r3, [r7, #44]	; 0x2c
- 8004d30:	f383 8810 	msr	PRIMASK, r3
-}
- 8004d34:	46c0      	nop			; (mov r8, r8)
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004d36:	f3ef 8310 	mrs	r3, PRIMASK
- 8004d3a:	633b      	str	r3, [r7, #48]	; 0x30
-  return(result);
- 8004d3c:	6b3b      	ldr	r3, [r7, #48]	; 0x30
+080043b0 <_free_r>:
+ 80043b0:	b570      	push	{r4, r5, r6, lr}
+ 80043b2:	0005      	movs	r5, r0
+ 80043b4:	2900      	cmp	r1, #0
+ 80043b6:	d010      	beq.n	80043da <_free_r+0x2a>
+ 80043b8:	1f0c      	subs	r4, r1, #4
+ 80043ba:	6823      	ldr	r3, [r4, #0]
+ 80043bc:	2b00      	cmp	r3, #0
+ 80043be:	da00      	bge.n	80043c2 <_free_r+0x12>
+ 80043c0:	18e4      	adds	r4, r4, r3
+ 80043c2:	0028      	movs	r0, r5
+ 80043c4:	f000 f8e2 	bl	800458c <__malloc_lock>
+ 80043c8:	4a1d      	ldr	r2, [pc, #116]	; (8004440 <_free_r+0x90>)
+ 80043ca:	6813      	ldr	r3, [r2, #0]
+ 80043cc:	2b00      	cmp	r3, #0
+ 80043ce:	d105      	bne.n	80043dc <_free_r+0x2c>
+ 80043d0:	6063      	str	r3, [r4, #4]
+ 80043d2:	6014      	str	r4, [r2, #0]
+ 80043d4:	0028      	movs	r0, r5
+ 80043d6:	f000 f8e1 	bl	800459c <__malloc_unlock>
+ 80043da:	bd70      	pop	{r4, r5, r6, pc}
+ 80043dc:	42a3      	cmp	r3, r4
+ 80043de:	d908      	bls.n	80043f2 <_free_r+0x42>
+ 80043e0:	6820      	ldr	r0, [r4, #0]
+ 80043e2:	1821      	adds	r1, r4, r0
+ 80043e4:	428b      	cmp	r3, r1
+ 80043e6:	d1f3      	bne.n	80043d0 <_free_r+0x20>
+ 80043e8:	6819      	ldr	r1, [r3, #0]
+ 80043ea:	685b      	ldr	r3, [r3, #4]
+ 80043ec:	1809      	adds	r1, r1, r0
+ 80043ee:	6021      	str	r1, [r4, #0]
+ 80043f0:	e7ee      	b.n	80043d0 <_free_r+0x20>
+ 80043f2:	001a      	movs	r2, r3
+ 80043f4:	685b      	ldr	r3, [r3, #4]
+ 80043f6:	2b00      	cmp	r3, #0
+ 80043f8:	d001      	beq.n	80043fe <_free_r+0x4e>
+ 80043fa:	42a3      	cmp	r3, r4
+ 80043fc:	d9f9      	bls.n	80043f2 <_free_r+0x42>
+ 80043fe:	6811      	ldr	r1, [r2, #0]
+ 8004400:	1850      	adds	r0, r2, r1
+ 8004402:	42a0      	cmp	r0, r4
+ 8004404:	d10b      	bne.n	800441e <_free_r+0x6e>
+ 8004406:	6820      	ldr	r0, [r4, #0]
+ 8004408:	1809      	adds	r1, r1, r0
+ 800440a:	1850      	adds	r0, r2, r1
+ 800440c:	6011      	str	r1, [r2, #0]
+ 800440e:	4283      	cmp	r3, r0
+ 8004410:	d1e0      	bne.n	80043d4 <_free_r+0x24>
+ 8004412:	6818      	ldr	r0, [r3, #0]
+ 8004414:	685b      	ldr	r3, [r3, #4]
+ 8004416:	1841      	adds	r1, r0, r1
+ 8004418:	6011      	str	r1, [r2, #0]
+ 800441a:	6053      	str	r3, [r2, #4]
+ 800441c:	e7da      	b.n	80043d4 <_free_r+0x24>
+ 800441e:	42a0      	cmp	r0, r4
+ 8004420:	d902      	bls.n	8004428 <_free_r+0x78>
+ 8004422:	230c      	movs	r3, #12
+ 8004424:	602b      	str	r3, [r5, #0]
+ 8004426:	e7d5      	b.n	80043d4 <_free_r+0x24>
+ 8004428:	6820      	ldr	r0, [r4, #0]
+ 800442a:	1821      	adds	r1, r4, r0
+ 800442c:	428b      	cmp	r3, r1
+ 800442e:	d103      	bne.n	8004438 <_free_r+0x88>
+ 8004430:	6819      	ldr	r1, [r3, #0]
+ 8004432:	685b      	ldr	r3, [r3, #4]
+ 8004434:	1809      	adds	r1, r1, r0
+ 8004436:	6021      	str	r1, [r4, #0]
+ 8004438:	6063      	str	r3, [r4, #4]
+ 800443a:	6054      	str	r4, [r2, #4]
+ 800443c:	e7ca      	b.n	80043d4 <_free_r+0x24>
+ 800443e:	46c0      	nop			; (mov r8, r8)
+ 8004440:	2000040c 	.word	0x2000040c
 
-      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8004d3e:	647b      	str	r3, [r7, #68]	; 0x44
- 8004d40:	2301      	movs	r3, #1
- 8004d42:	637b      	str	r3, [r7, #52]	; 0x34
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004d44:	6b7b      	ldr	r3, [r7, #52]	; 0x34
- 8004d46:	f383 8810 	msr	PRIMASK, r3
-}
- 8004d4a:	46c0      	nop			; (mov r8, r8)
- 8004d4c:	687b      	ldr	r3, [r7, #4]
- 8004d4e:	681b      	ldr	r3, [r3, #0]
- 8004d50:	689a      	ldr	r2, [r3, #8]
- 8004d52:	687b      	ldr	r3, [r7, #4]
- 8004d54:	681b      	ldr	r3, [r3, #0]
- 8004d56:	2101      	movs	r1, #1
- 8004d58:	438a      	bics	r2, r1
- 8004d5a:	609a      	str	r2, [r3, #8]
- 8004d5c:	6c7b      	ldr	r3, [r7, #68]	; 0x44
- 8004d5e:	63bb      	str	r3, [r7, #56]	; 0x38
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004d60:	6bbb      	ldr	r3, [r7, #56]	; 0x38
- 8004d62:	f383 8810 	msr	PRIMASK, r3
-}
- 8004d66:	46c0      	nop			; (mov r8, r8)
+08004444 <sbrk_aligned>:
+ 8004444:	b570      	push	{r4, r5, r6, lr}
+ 8004446:	4e0f      	ldr	r6, [pc, #60]	; (8004484 <sbrk_aligned+0x40>)
+ 8004448:	000d      	movs	r5, r1
+ 800444a:	6831      	ldr	r1, [r6, #0]
+ 800444c:	0004      	movs	r4, r0
+ 800444e:	2900      	cmp	r1, #0
+ 8004450:	d102      	bne.n	8004458 <sbrk_aligned+0x14>
+ 8004452:	f000 fba1 	bl	8004b98 <_sbrk_r>
+ 8004456:	6030      	str	r0, [r6, #0]
+ 8004458:	0029      	movs	r1, r5
+ 800445a:	0020      	movs	r0, r4
+ 800445c:	f000 fb9c 	bl	8004b98 <_sbrk_r>
+ 8004460:	1c43      	adds	r3, r0, #1
+ 8004462:	d00a      	beq.n	800447a <sbrk_aligned+0x36>
+ 8004464:	2303      	movs	r3, #3
+ 8004466:	1cc5      	adds	r5, r0, #3
+ 8004468:	439d      	bics	r5, r3
+ 800446a:	42a8      	cmp	r0, r5
+ 800446c:	d007      	beq.n	800447e <sbrk_aligned+0x3a>
+ 800446e:	1a29      	subs	r1, r5, r0
+ 8004470:	0020      	movs	r0, r4
+ 8004472:	f000 fb91 	bl	8004b98 <_sbrk_r>
+ 8004476:	3001      	adds	r0, #1
+ 8004478:	d101      	bne.n	800447e <sbrk_aligned+0x3a>
+ 800447a:	2501      	movs	r5, #1
+ 800447c:	426d      	negs	r5, r5
+ 800447e:	0028      	movs	r0, r5
+ 8004480:	bd70      	pop	{r4, r5, r6, pc}
+ 8004482:	46c0      	nop			; (mov r8, r8)
+ 8004484:	20000410 	.word	0x20000410
 
-      /* Rx process is completed, restore huart->RxState to Ready */
-      huart->RxState = HAL_UART_STATE_READY;
- 8004d68:	687b      	ldr	r3, [r7, #4]
- 8004d6a:	2280      	movs	r2, #128	; 0x80
- 8004d6c:	2120      	movs	r1, #32
- 8004d6e:	5099      	str	r1, [r3, r2]
+08004488 <_malloc_r>:
+ 8004488:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+ 800448a:	2203      	movs	r2, #3
+ 800448c:	1ccb      	adds	r3, r1, #3
+ 800448e:	4393      	bics	r3, r2
+ 8004490:	3308      	adds	r3, #8
+ 8004492:	0006      	movs	r6, r0
+ 8004494:	001f      	movs	r7, r3
+ 8004496:	2b0c      	cmp	r3, #12
+ 8004498:	d238      	bcs.n	800450c <_malloc_r+0x84>
+ 800449a:	270c      	movs	r7, #12
+ 800449c:	42b9      	cmp	r1, r7
+ 800449e:	d837      	bhi.n	8004510 <_malloc_r+0x88>
+ 80044a0:	0030      	movs	r0, r6
+ 80044a2:	f000 f873 	bl	800458c <__malloc_lock>
+ 80044a6:	4b38      	ldr	r3, [pc, #224]	; (8004588 <_malloc_r+0x100>)
+ 80044a8:	9300      	str	r3, [sp, #0]
+ 80044aa:	681b      	ldr	r3, [r3, #0]
+ 80044ac:	001c      	movs	r4, r3
+ 80044ae:	2c00      	cmp	r4, #0
+ 80044b0:	d133      	bne.n	800451a <_malloc_r+0x92>
+ 80044b2:	0039      	movs	r1, r7
+ 80044b4:	0030      	movs	r0, r6
+ 80044b6:	f7ff ffc5 	bl	8004444 <sbrk_aligned>
+ 80044ba:	0004      	movs	r4, r0
+ 80044bc:	1c43      	adds	r3, r0, #1
+ 80044be:	d15e      	bne.n	800457e <_malloc_r+0xf6>
+ 80044c0:	9b00      	ldr	r3, [sp, #0]
+ 80044c2:	681c      	ldr	r4, [r3, #0]
+ 80044c4:	0025      	movs	r5, r4
+ 80044c6:	2d00      	cmp	r5, #0
+ 80044c8:	d14e      	bne.n	8004568 <_malloc_r+0xe0>
+ 80044ca:	2c00      	cmp	r4, #0
+ 80044cc:	d051      	beq.n	8004572 <_malloc_r+0xea>
+ 80044ce:	6823      	ldr	r3, [r4, #0]
+ 80044d0:	0029      	movs	r1, r5
+ 80044d2:	18e3      	adds	r3, r4, r3
+ 80044d4:	0030      	movs	r0, r6
+ 80044d6:	9301      	str	r3, [sp, #4]
+ 80044d8:	f000 fb5e 	bl	8004b98 <_sbrk_r>
+ 80044dc:	9b01      	ldr	r3, [sp, #4]
+ 80044de:	4283      	cmp	r3, r0
+ 80044e0:	d147      	bne.n	8004572 <_malloc_r+0xea>
+ 80044e2:	6823      	ldr	r3, [r4, #0]
+ 80044e4:	0030      	movs	r0, r6
+ 80044e6:	1aff      	subs	r7, r7, r3
+ 80044e8:	0039      	movs	r1, r7
+ 80044ea:	f7ff ffab 	bl	8004444 <sbrk_aligned>
+ 80044ee:	3001      	adds	r0, #1
+ 80044f0:	d03f      	beq.n	8004572 <_malloc_r+0xea>
+ 80044f2:	6823      	ldr	r3, [r4, #0]
+ 80044f4:	19db      	adds	r3, r3, r7
+ 80044f6:	6023      	str	r3, [r4, #0]
+ 80044f8:	9b00      	ldr	r3, [sp, #0]
+ 80044fa:	681b      	ldr	r3, [r3, #0]
+ 80044fc:	2b00      	cmp	r3, #0
+ 80044fe:	d040      	beq.n	8004582 <_malloc_r+0xfa>
+ 8004500:	685a      	ldr	r2, [r3, #4]
+ 8004502:	42a2      	cmp	r2, r4
+ 8004504:	d133      	bne.n	800456e <_malloc_r+0xe6>
+ 8004506:	2200      	movs	r2, #0
+ 8004508:	605a      	str	r2, [r3, #4]
+ 800450a:	e014      	b.n	8004536 <_malloc_r+0xae>
+ 800450c:	2b00      	cmp	r3, #0
+ 800450e:	dac5      	bge.n	800449c <_malloc_r+0x14>
+ 8004510:	230c      	movs	r3, #12
+ 8004512:	2500      	movs	r5, #0
+ 8004514:	6033      	str	r3, [r6, #0]
+ 8004516:	0028      	movs	r0, r5
+ 8004518:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+ 800451a:	6821      	ldr	r1, [r4, #0]
+ 800451c:	1bc9      	subs	r1, r1, r7
+ 800451e:	d420      	bmi.n	8004562 <_malloc_r+0xda>
+ 8004520:	290b      	cmp	r1, #11
+ 8004522:	d918      	bls.n	8004556 <_malloc_r+0xce>
+ 8004524:	19e2      	adds	r2, r4, r7
+ 8004526:	6027      	str	r7, [r4, #0]
+ 8004528:	42a3      	cmp	r3, r4
+ 800452a:	d112      	bne.n	8004552 <_malloc_r+0xca>
+ 800452c:	9b00      	ldr	r3, [sp, #0]
+ 800452e:	601a      	str	r2, [r3, #0]
+ 8004530:	6863      	ldr	r3, [r4, #4]
+ 8004532:	6011      	str	r1, [r2, #0]
+ 8004534:	6053      	str	r3, [r2, #4]
+ 8004536:	0030      	movs	r0, r6
+ 8004538:	0025      	movs	r5, r4
+ 800453a:	f000 f82f 	bl	800459c <__malloc_unlock>
+ 800453e:	2207      	movs	r2, #7
+ 8004540:	350b      	adds	r5, #11
+ 8004542:	1d23      	adds	r3, r4, #4
+ 8004544:	4395      	bics	r5, r2
+ 8004546:	1aea      	subs	r2, r5, r3
+ 8004548:	429d      	cmp	r5, r3
+ 800454a:	d0e4      	beq.n	8004516 <_malloc_r+0x8e>
+ 800454c:	1b5b      	subs	r3, r3, r5
+ 800454e:	50a3      	str	r3, [r4, r2]
+ 8004550:	e7e1      	b.n	8004516 <_malloc_r+0x8e>
+ 8004552:	605a      	str	r2, [r3, #4]
+ 8004554:	e7ec      	b.n	8004530 <_malloc_r+0xa8>
+ 8004556:	6862      	ldr	r2, [r4, #4]
+ 8004558:	42a3      	cmp	r3, r4
+ 800455a:	d1d5      	bne.n	8004508 <_malloc_r+0x80>
+ 800455c:	9b00      	ldr	r3, [sp, #0]
+ 800455e:	601a      	str	r2, [r3, #0]
+ 8004560:	e7e9      	b.n	8004536 <_malloc_r+0xae>
+ 8004562:	0023      	movs	r3, r4
+ 8004564:	6864      	ldr	r4, [r4, #4]
+ 8004566:	e7a2      	b.n	80044ae <_malloc_r+0x26>
+ 8004568:	002c      	movs	r4, r5
+ 800456a:	686d      	ldr	r5, [r5, #4]
+ 800456c:	e7ab      	b.n	80044c6 <_malloc_r+0x3e>
+ 800456e:	0013      	movs	r3, r2
+ 8004570:	e7c4      	b.n	80044fc <_malloc_r+0x74>
+ 8004572:	230c      	movs	r3, #12
+ 8004574:	0030      	movs	r0, r6
+ 8004576:	6033      	str	r3, [r6, #0]
+ 8004578:	f000 f810 	bl	800459c <__malloc_unlock>
+ 800457c:	e7cb      	b.n	8004516 <_malloc_r+0x8e>
+ 800457e:	6027      	str	r7, [r4, #0]
+ 8004580:	e7d9      	b.n	8004536 <_malloc_r+0xae>
+ 8004582:	605b      	str	r3, [r3, #4]
+ 8004584:	deff      	udf	#255	; 0xff
+ 8004586:	46c0      	nop			; (mov r8, r8)
+ 8004588:	2000040c 	.word	0x2000040c
 
-      /* Clear RxISR function pointer */
-      huart->RxISR = NULL;
- 8004d70:	687b      	ldr	r3, [r7, #4]
- 8004d72:	2200      	movs	r2, #0
- 8004d74:	669a      	str	r2, [r3, #104]	; 0x68
+0800458c <__malloc_lock>:
+ 800458c:	b510      	push	{r4, lr}
+ 800458e:	4802      	ldr	r0, [pc, #8]	; (8004598 <__malloc_lock+0xc>)
+ 8004590:	f7ff ff0c 	bl	80043ac <__retarget_lock_acquire_recursive>
+ 8004594:	bd10      	pop	{r4, pc}
+ 8004596:	46c0      	nop			; (mov r8, r8)
+ 8004598:	20000408 	.word	0x20000408
 
-      /* Initialize type of RxEvent to Transfer Complete */
-      huart->RxEventType = HAL_UART_RXEVENT_TC;
- 8004d76:	687b      	ldr	r3, [r7, #4]
- 8004d78:	2200      	movs	r2, #0
- 8004d7a:	665a      	str	r2, [r3, #100]	; 0x64
+0800459c <__malloc_unlock>:
+ 800459c:	b510      	push	{r4, lr}
+ 800459e:	4802      	ldr	r0, [pc, #8]	; (80045a8 <__malloc_unlock+0xc>)
+ 80045a0:	f7ff ff05 	bl	80043ae <__retarget_lock_release_recursive>
+ 80045a4:	bd10      	pop	{r4, pc}
+ 80045a6:	46c0      	nop			; (mov r8, r8)
+ 80045a8:	20000408 	.word	0x20000408
 
-      if (!(IS_LPUART_INSTANCE(huart->Instance)))
- 8004d7c:	687b      	ldr	r3, [r7, #4]
- 8004d7e:	681b      	ldr	r3, [r3, #0]
- 8004d80:	4a34      	ldr	r2, [pc, #208]	; (8004e54 <UART_RxISR_8BIT+0x1bc>)
- 8004d82:	4293      	cmp	r3, r2
- 8004d84:	d01f      	beq.n	8004dc6 <UART_RxISR_8BIT+0x12e>
-      {
-        /* Check that USART RTOEN bit is set */
-        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
- 8004d86:	687b      	ldr	r3, [r7, #4]
- 8004d88:	681b      	ldr	r3, [r3, #0]
- 8004d8a:	685a      	ldr	r2, [r3, #4]
- 8004d8c:	2380      	movs	r3, #128	; 0x80
- 8004d8e:	041b      	lsls	r3, r3, #16
- 8004d90:	4013      	ands	r3, r2
- 8004d92:	d018      	beq.n	8004dc6 <UART_RxISR_8BIT+0x12e>
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004d94:	f3ef 8310 	mrs	r3, PRIMASK
- 8004d98:	61bb      	str	r3, [r7, #24]
-  return(result);
- 8004d9a:	69bb      	ldr	r3, [r7, #24]
-        {
-          /* Enable the UART Receiver Timeout Interrupt */
-          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
- 8004d9c:	643b      	str	r3, [r7, #64]	; 0x40
- 8004d9e:	2301      	movs	r3, #1
- 8004da0:	61fb      	str	r3, [r7, #28]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004da2:	69fb      	ldr	r3, [r7, #28]
- 8004da4:	f383 8810 	msr	PRIMASK, r3
-}
- 8004da8:	46c0      	nop			; (mov r8, r8)
- 8004daa:	687b      	ldr	r3, [r7, #4]
- 8004dac:	681b      	ldr	r3, [r3, #0]
- 8004dae:	681a      	ldr	r2, [r3, #0]
- 8004db0:	687b      	ldr	r3, [r7, #4]
- 8004db2:	681b      	ldr	r3, [r3, #0]
- 8004db4:	4928      	ldr	r1, [pc, #160]	; (8004e58 <UART_RxISR_8BIT+0x1c0>)
- 8004db6:	400a      	ands	r2, r1
- 8004db8:	601a      	str	r2, [r3, #0]
- 8004dba:	6c3b      	ldr	r3, [r7, #64]	; 0x40
- 8004dbc:	623b      	str	r3, [r7, #32]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004dbe:	6a3b      	ldr	r3, [r7, #32]
- 8004dc0:	f383 8810 	msr	PRIMASK, r3
-}
- 8004dc4:	46c0      	nop			; (mov r8, r8)
-        }
-      }
+080045ac <__ssputs_r>:
+ 80045ac:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 80045ae:	b085      	sub	sp, #20
+ 80045b0:	9301      	str	r3, [sp, #4]
+ 80045b2:	9203      	str	r2, [sp, #12]
+ 80045b4:	688e      	ldr	r6, [r1, #8]
+ 80045b6:	9a01      	ldr	r2, [sp, #4]
+ 80045b8:	0007      	movs	r7, r0
+ 80045ba:	000c      	movs	r4, r1
+ 80045bc:	680b      	ldr	r3, [r1, #0]
+ 80045be:	4296      	cmp	r6, r2
+ 80045c0:	d831      	bhi.n	8004626 <__ssputs_r+0x7a>
+ 80045c2:	898a      	ldrh	r2, [r1, #12]
+ 80045c4:	2190      	movs	r1, #144	; 0x90
+ 80045c6:	00c9      	lsls	r1, r1, #3
+ 80045c8:	420a      	tst	r2, r1
+ 80045ca:	d029      	beq.n	8004620 <__ssputs_r+0x74>
+ 80045cc:	2003      	movs	r0, #3
+ 80045ce:	6921      	ldr	r1, [r4, #16]
+ 80045d0:	1a5b      	subs	r3, r3, r1
+ 80045d2:	9302      	str	r3, [sp, #8]
+ 80045d4:	6963      	ldr	r3, [r4, #20]
+ 80045d6:	4343      	muls	r3, r0
+ 80045d8:	0fdd      	lsrs	r5, r3, #31
+ 80045da:	18ed      	adds	r5, r5, r3
+ 80045dc:	9b01      	ldr	r3, [sp, #4]
+ 80045de:	9802      	ldr	r0, [sp, #8]
+ 80045e0:	3301      	adds	r3, #1
+ 80045e2:	181b      	adds	r3, r3, r0
+ 80045e4:	106d      	asrs	r5, r5, #1
+ 80045e6:	42ab      	cmp	r3, r5
+ 80045e8:	d900      	bls.n	80045ec <__ssputs_r+0x40>
+ 80045ea:	001d      	movs	r5, r3
+ 80045ec:	0552      	lsls	r2, r2, #21
+ 80045ee:	d529      	bpl.n	8004644 <__ssputs_r+0x98>
+ 80045f0:	0029      	movs	r1, r5
+ 80045f2:	0038      	movs	r0, r7
+ 80045f4:	f7ff ff48 	bl	8004488 <_malloc_r>
+ 80045f8:	1e06      	subs	r6, r0, #0
+ 80045fa:	d02d      	beq.n	8004658 <__ssputs_r+0xac>
+ 80045fc:	9a02      	ldr	r2, [sp, #8]
+ 80045fe:	6921      	ldr	r1, [r4, #16]
+ 8004600:	f000 fae7 	bl	8004bd2 <memcpy>
+ 8004604:	89a2      	ldrh	r2, [r4, #12]
+ 8004606:	4b19      	ldr	r3, [pc, #100]	; (800466c <__ssputs_r+0xc0>)
+ 8004608:	401a      	ands	r2, r3
+ 800460a:	2380      	movs	r3, #128	; 0x80
+ 800460c:	4313      	orrs	r3, r2
+ 800460e:	81a3      	strh	r3, [r4, #12]
+ 8004610:	9b02      	ldr	r3, [sp, #8]
+ 8004612:	6126      	str	r6, [r4, #16]
+ 8004614:	18f6      	adds	r6, r6, r3
+ 8004616:	6026      	str	r6, [r4, #0]
+ 8004618:	6165      	str	r5, [r4, #20]
+ 800461a:	9e01      	ldr	r6, [sp, #4]
+ 800461c:	1aed      	subs	r5, r5, r3
+ 800461e:	60a5      	str	r5, [r4, #8]
+ 8004620:	9b01      	ldr	r3, [sp, #4]
+ 8004622:	429e      	cmp	r6, r3
+ 8004624:	d900      	bls.n	8004628 <__ssputs_r+0x7c>
+ 8004626:	9e01      	ldr	r6, [sp, #4]
+ 8004628:	0032      	movs	r2, r6
+ 800462a:	9903      	ldr	r1, [sp, #12]
+ 800462c:	6820      	ldr	r0, [r4, #0]
+ 800462e:	f000 fa9f 	bl	8004b70 <memmove>
+ 8004632:	2000      	movs	r0, #0
+ 8004634:	68a3      	ldr	r3, [r4, #8]
+ 8004636:	1b9b      	subs	r3, r3, r6
+ 8004638:	60a3      	str	r3, [r4, #8]
+ 800463a:	6823      	ldr	r3, [r4, #0]
+ 800463c:	199b      	adds	r3, r3, r6
+ 800463e:	6023      	str	r3, [r4, #0]
+ 8004640:	b005      	add	sp, #20
+ 8004642:	bdf0      	pop	{r4, r5, r6, r7, pc}
+ 8004644:	002a      	movs	r2, r5
+ 8004646:	0038      	movs	r0, r7
+ 8004648:	f000 facc 	bl	8004be4 <_realloc_r>
+ 800464c:	1e06      	subs	r6, r0, #0
+ 800464e:	d1df      	bne.n	8004610 <__ssputs_r+0x64>
+ 8004650:	0038      	movs	r0, r7
+ 8004652:	6921      	ldr	r1, [r4, #16]
+ 8004654:	f7ff feac 	bl	80043b0 <_free_r>
+ 8004658:	230c      	movs	r3, #12
+ 800465a:	2001      	movs	r0, #1
+ 800465c:	603b      	str	r3, [r7, #0]
+ 800465e:	89a2      	ldrh	r2, [r4, #12]
+ 8004660:	3334      	adds	r3, #52	; 0x34
+ 8004662:	4313      	orrs	r3, r2
+ 8004664:	81a3      	strh	r3, [r4, #12]
+ 8004666:	4240      	negs	r0, r0
+ 8004668:	e7ea      	b.n	8004640 <__ssputs_r+0x94>
+ 800466a:	46c0      	nop			; (mov r8, r8)
+ 800466c:	fffffb7f 	.word	0xfffffb7f
 
-      /* Check current reception Mode :
-         If Reception till IDLE event has been selected : */
-      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- 8004dc6:	687b      	ldr	r3, [r7, #4]
- 8004dc8:	6e1b      	ldr	r3, [r3, #96]	; 0x60
- 8004dca:	2b01      	cmp	r3, #1
- 8004dcc:	d12f      	bne.n	8004e2e <UART_RxISR_8BIT+0x196>
-      {
-        /* Set reception type to Standard */
-        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 8004dce:	687b      	ldr	r3, [r7, #4]
- 8004dd0:	2200      	movs	r2, #0
- 8004dd2:	661a      	str	r2, [r3, #96]	; 0x60
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004dd4:	f3ef 8310 	mrs	r3, PRIMASK
- 8004dd8:	60fb      	str	r3, [r7, #12]
-  return(result);
- 8004dda:	68fb      	ldr	r3, [r7, #12]
+08004670 <_svfiprintf_r>:
+ 8004670:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 8004672:	b0a1      	sub	sp, #132	; 0x84
+ 8004674:	9003      	str	r0, [sp, #12]
+ 8004676:	001d      	movs	r5, r3
+ 8004678:	898b      	ldrh	r3, [r1, #12]
+ 800467a:	000f      	movs	r7, r1
+ 800467c:	0016      	movs	r6, r2
+ 800467e:	061b      	lsls	r3, r3, #24
+ 8004680:	d511      	bpl.n	80046a6 <_svfiprintf_r+0x36>
+ 8004682:	690b      	ldr	r3, [r1, #16]
+ 8004684:	2b00      	cmp	r3, #0
+ 8004686:	d10e      	bne.n	80046a6 <_svfiprintf_r+0x36>
+ 8004688:	2140      	movs	r1, #64	; 0x40
+ 800468a:	f7ff fefd 	bl	8004488 <_malloc_r>
+ 800468e:	6038      	str	r0, [r7, #0]
+ 8004690:	6138      	str	r0, [r7, #16]
+ 8004692:	2800      	cmp	r0, #0
+ 8004694:	d105      	bne.n	80046a2 <_svfiprintf_r+0x32>
+ 8004696:	230c      	movs	r3, #12
+ 8004698:	9a03      	ldr	r2, [sp, #12]
+ 800469a:	3801      	subs	r0, #1
+ 800469c:	6013      	str	r3, [r2, #0]
+ 800469e:	b021      	add	sp, #132	; 0x84
+ 80046a0:	bdf0      	pop	{r4, r5, r6, r7, pc}
+ 80046a2:	2340      	movs	r3, #64	; 0x40
+ 80046a4:	617b      	str	r3, [r7, #20]
+ 80046a6:	2300      	movs	r3, #0
+ 80046a8:	ac08      	add	r4, sp, #32
+ 80046aa:	6163      	str	r3, [r4, #20]
+ 80046ac:	3320      	adds	r3, #32
+ 80046ae:	7663      	strb	r3, [r4, #25]
+ 80046b0:	3310      	adds	r3, #16
+ 80046b2:	76a3      	strb	r3, [r4, #26]
+ 80046b4:	9507      	str	r5, [sp, #28]
+ 80046b6:	0035      	movs	r5, r6
+ 80046b8:	782b      	ldrb	r3, [r5, #0]
+ 80046ba:	2b00      	cmp	r3, #0
+ 80046bc:	d001      	beq.n	80046c2 <_svfiprintf_r+0x52>
+ 80046be:	2b25      	cmp	r3, #37	; 0x25
+ 80046c0:	d148      	bne.n	8004754 <_svfiprintf_r+0xe4>
+ 80046c2:	1bab      	subs	r3, r5, r6
+ 80046c4:	9305      	str	r3, [sp, #20]
+ 80046c6:	42b5      	cmp	r5, r6
+ 80046c8:	d00b      	beq.n	80046e2 <_svfiprintf_r+0x72>
+ 80046ca:	0032      	movs	r2, r6
+ 80046cc:	0039      	movs	r1, r7
+ 80046ce:	9803      	ldr	r0, [sp, #12]
+ 80046d0:	f7ff ff6c 	bl	80045ac <__ssputs_r>
+ 80046d4:	3001      	adds	r0, #1
+ 80046d6:	d100      	bne.n	80046da <_svfiprintf_r+0x6a>
+ 80046d8:	e0af      	b.n	800483a <_svfiprintf_r+0x1ca>
+ 80046da:	6963      	ldr	r3, [r4, #20]
+ 80046dc:	9a05      	ldr	r2, [sp, #20]
+ 80046de:	189b      	adds	r3, r3, r2
+ 80046e0:	6163      	str	r3, [r4, #20]
+ 80046e2:	782b      	ldrb	r3, [r5, #0]
+ 80046e4:	2b00      	cmp	r3, #0
+ 80046e6:	d100      	bne.n	80046ea <_svfiprintf_r+0x7a>
+ 80046e8:	e0a7      	b.n	800483a <_svfiprintf_r+0x1ca>
+ 80046ea:	2201      	movs	r2, #1
+ 80046ec:	2300      	movs	r3, #0
+ 80046ee:	4252      	negs	r2, r2
+ 80046f0:	6062      	str	r2, [r4, #4]
+ 80046f2:	a904      	add	r1, sp, #16
+ 80046f4:	3254      	adds	r2, #84	; 0x54
+ 80046f6:	1852      	adds	r2, r2, r1
+ 80046f8:	1c6e      	adds	r6, r5, #1
+ 80046fa:	6023      	str	r3, [r4, #0]
+ 80046fc:	60e3      	str	r3, [r4, #12]
+ 80046fe:	60a3      	str	r3, [r4, #8]
+ 8004700:	7013      	strb	r3, [r2, #0]
+ 8004702:	65a3      	str	r3, [r4, #88]	; 0x58
+ 8004704:	4b55      	ldr	r3, [pc, #340]	; (800485c <_svfiprintf_r+0x1ec>)
+ 8004706:	2205      	movs	r2, #5
+ 8004708:	0018      	movs	r0, r3
+ 800470a:	7831      	ldrb	r1, [r6, #0]
+ 800470c:	9305      	str	r3, [sp, #20]
+ 800470e:	f000 fa55 	bl	8004bbc <memchr>
+ 8004712:	1c75      	adds	r5, r6, #1
+ 8004714:	2800      	cmp	r0, #0
+ 8004716:	d11f      	bne.n	8004758 <_svfiprintf_r+0xe8>
+ 8004718:	6822      	ldr	r2, [r4, #0]
+ 800471a:	06d3      	lsls	r3, r2, #27
+ 800471c:	d504      	bpl.n	8004728 <_svfiprintf_r+0xb8>
+ 800471e:	2353      	movs	r3, #83	; 0x53
+ 8004720:	a904      	add	r1, sp, #16
+ 8004722:	185b      	adds	r3, r3, r1
+ 8004724:	2120      	movs	r1, #32
+ 8004726:	7019      	strb	r1, [r3, #0]
+ 8004728:	0713      	lsls	r3, r2, #28
+ 800472a:	d504      	bpl.n	8004736 <_svfiprintf_r+0xc6>
+ 800472c:	2353      	movs	r3, #83	; 0x53
+ 800472e:	a904      	add	r1, sp, #16
+ 8004730:	185b      	adds	r3, r3, r1
+ 8004732:	212b      	movs	r1, #43	; 0x2b
+ 8004734:	7019      	strb	r1, [r3, #0]
+ 8004736:	7833      	ldrb	r3, [r6, #0]
+ 8004738:	2b2a      	cmp	r3, #42	; 0x2a
+ 800473a:	d016      	beq.n	800476a <_svfiprintf_r+0xfa>
+ 800473c:	0035      	movs	r5, r6
+ 800473e:	2100      	movs	r1, #0
+ 8004740:	200a      	movs	r0, #10
+ 8004742:	68e3      	ldr	r3, [r4, #12]
+ 8004744:	782a      	ldrb	r2, [r5, #0]
+ 8004746:	1c6e      	adds	r6, r5, #1
+ 8004748:	3a30      	subs	r2, #48	; 0x30
+ 800474a:	2a09      	cmp	r2, #9
+ 800474c:	d94e      	bls.n	80047ec <_svfiprintf_r+0x17c>
+ 800474e:	2900      	cmp	r1, #0
+ 8004750:	d111      	bne.n	8004776 <_svfiprintf_r+0x106>
+ 8004752:	e017      	b.n	8004784 <_svfiprintf_r+0x114>
+ 8004754:	3501      	adds	r5, #1
+ 8004756:	e7af      	b.n	80046b8 <_svfiprintf_r+0x48>
+ 8004758:	9b05      	ldr	r3, [sp, #20]
+ 800475a:	6822      	ldr	r2, [r4, #0]
+ 800475c:	1ac0      	subs	r0, r0, r3
+ 800475e:	2301      	movs	r3, #1
+ 8004760:	4083      	lsls	r3, r0
+ 8004762:	4313      	orrs	r3, r2
+ 8004764:	002e      	movs	r6, r5
+ 8004766:	6023      	str	r3, [r4, #0]
+ 8004768:	e7cc      	b.n	8004704 <_svfiprintf_r+0x94>
+ 800476a:	9b07      	ldr	r3, [sp, #28]
+ 800476c:	1d19      	adds	r1, r3, #4
+ 800476e:	681b      	ldr	r3, [r3, #0]
+ 8004770:	9107      	str	r1, [sp, #28]
+ 8004772:	2b00      	cmp	r3, #0
+ 8004774:	db01      	blt.n	800477a <_svfiprintf_r+0x10a>
+ 8004776:	930b      	str	r3, [sp, #44]	; 0x2c
+ 8004778:	e004      	b.n	8004784 <_svfiprintf_r+0x114>
+ 800477a:	425b      	negs	r3, r3
+ 800477c:	60e3      	str	r3, [r4, #12]
+ 800477e:	2302      	movs	r3, #2
+ 8004780:	4313      	orrs	r3, r2
+ 8004782:	6023      	str	r3, [r4, #0]
+ 8004784:	782b      	ldrb	r3, [r5, #0]
+ 8004786:	2b2e      	cmp	r3, #46	; 0x2e
+ 8004788:	d10a      	bne.n	80047a0 <_svfiprintf_r+0x130>
+ 800478a:	786b      	ldrb	r3, [r5, #1]
+ 800478c:	2b2a      	cmp	r3, #42	; 0x2a
+ 800478e:	d135      	bne.n	80047fc <_svfiprintf_r+0x18c>
+ 8004790:	9b07      	ldr	r3, [sp, #28]
+ 8004792:	3502      	adds	r5, #2
+ 8004794:	1d1a      	adds	r2, r3, #4
+ 8004796:	681b      	ldr	r3, [r3, #0]
+ 8004798:	9207      	str	r2, [sp, #28]
+ 800479a:	2b00      	cmp	r3, #0
+ 800479c:	db2b      	blt.n	80047f6 <_svfiprintf_r+0x186>
+ 800479e:	9309      	str	r3, [sp, #36]	; 0x24
+ 80047a0:	4e2f      	ldr	r6, [pc, #188]	; (8004860 <_svfiprintf_r+0x1f0>)
+ 80047a2:	2203      	movs	r2, #3
+ 80047a4:	0030      	movs	r0, r6
+ 80047a6:	7829      	ldrb	r1, [r5, #0]
+ 80047a8:	f000 fa08 	bl	8004bbc <memchr>
+ 80047ac:	2800      	cmp	r0, #0
+ 80047ae:	d006      	beq.n	80047be <_svfiprintf_r+0x14e>
+ 80047b0:	2340      	movs	r3, #64	; 0x40
+ 80047b2:	1b80      	subs	r0, r0, r6
+ 80047b4:	4083      	lsls	r3, r0
+ 80047b6:	6822      	ldr	r2, [r4, #0]
+ 80047b8:	3501      	adds	r5, #1
+ 80047ba:	4313      	orrs	r3, r2
+ 80047bc:	6023      	str	r3, [r4, #0]
+ 80047be:	7829      	ldrb	r1, [r5, #0]
+ 80047c0:	2206      	movs	r2, #6
+ 80047c2:	4828      	ldr	r0, [pc, #160]	; (8004864 <_svfiprintf_r+0x1f4>)
+ 80047c4:	1c6e      	adds	r6, r5, #1
+ 80047c6:	7621      	strb	r1, [r4, #24]
+ 80047c8:	f000 f9f8 	bl	8004bbc <memchr>
+ 80047cc:	2800      	cmp	r0, #0
+ 80047ce:	d03c      	beq.n	800484a <_svfiprintf_r+0x1da>
+ 80047d0:	4b25      	ldr	r3, [pc, #148]	; (8004868 <_svfiprintf_r+0x1f8>)
+ 80047d2:	2b00      	cmp	r3, #0
+ 80047d4:	d125      	bne.n	8004822 <_svfiprintf_r+0x1b2>
+ 80047d6:	2207      	movs	r2, #7
+ 80047d8:	9b07      	ldr	r3, [sp, #28]
+ 80047da:	3307      	adds	r3, #7
+ 80047dc:	4393      	bics	r3, r2
+ 80047de:	3308      	adds	r3, #8
+ 80047e0:	9307      	str	r3, [sp, #28]
+ 80047e2:	6963      	ldr	r3, [r4, #20]
+ 80047e4:	9a04      	ldr	r2, [sp, #16]
+ 80047e6:	189b      	adds	r3, r3, r2
+ 80047e8:	6163      	str	r3, [r4, #20]
+ 80047ea:	e764      	b.n	80046b6 <_svfiprintf_r+0x46>
+ 80047ec:	4343      	muls	r3, r0
+ 80047ee:	0035      	movs	r5, r6
+ 80047f0:	2101      	movs	r1, #1
+ 80047f2:	189b      	adds	r3, r3, r2
+ 80047f4:	e7a6      	b.n	8004744 <_svfiprintf_r+0xd4>
+ 80047f6:	2301      	movs	r3, #1
+ 80047f8:	425b      	negs	r3, r3
+ 80047fa:	e7d0      	b.n	800479e <_svfiprintf_r+0x12e>
+ 80047fc:	2300      	movs	r3, #0
+ 80047fe:	200a      	movs	r0, #10
+ 8004800:	001a      	movs	r2, r3
+ 8004802:	3501      	adds	r5, #1
+ 8004804:	6063      	str	r3, [r4, #4]
+ 8004806:	7829      	ldrb	r1, [r5, #0]
+ 8004808:	1c6e      	adds	r6, r5, #1
+ 800480a:	3930      	subs	r1, #48	; 0x30
+ 800480c:	2909      	cmp	r1, #9
+ 800480e:	d903      	bls.n	8004818 <_svfiprintf_r+0x1a8>
+ 8004810:	2b00      	cmp	r3, #0
+ 8004812:	d0c5      	beq.n	80047a0 <_svfiprintf_r+0x130>
+ 8004814:	9209      	str	r2, [sp, #36]	; 0x24
+ 8004816:	e7c3      	b.n	80047a0 <_svfiprintf_r+0x130>
+ 8004818:	4342      	muls	r2, r0
+ 800481a:	0035      	movs	r5, r6
+ 800481c:	2301      	movs	r3, #1
+ 800481e:	1852      	adds	r2, r2, r1
+ 8004820:	e7f1      	b.n	8004806 <_svfiprintf_r+0x196>
+ 8004822:	aa07      	add	r2, sp, #28
+ 8004824:	9200      	str	r2, [sp, #0]
+ 8004826:	0021      	movs	r1, r4
+ 8004828:	003a      	movs	r2, r7
+ 800482a:	4b10      	ldr	r3, [pc, #64]	; (800486c <_svfiprintf_r+0x1fc>)
+ 800482c:	9803      	ldr	r0, [sp, #12]
+ 800482e:	e000      	b.n	8004832 <_svfiprintf_r+0x1c2>
+ 8004830:	bf00      	nop
+ 8004832:	9004      	str	r0, [sp, #16]
+ 8004834:	9b04      	ldr	r3, [sp, #16]
+ 8004836:	3301      	adds	r3, #1
+ 8004838:	d1d3      	bne.n	80047e2 <_svfiprintf_r+0x172>
+ 800483a:	89bb      	ldrh	r3, [r7, #12]
+ 800483c:	980d      	ldr	r0, [sp, #52]	; 0x34
+ 800483e:	065b      	lsls	r3, r3, #25
+ 8004840:	d400      	bmi.n	8004844 <_svfiprintf_r+0x1d4>
+ 8004842:	e72c      	b.n	800469e <_svfiprintf_r+0x2e>
+ 8004844:	2001      	movs	r0, #1
+ 8004846:	4240      	negs	r0, r0
+ 8004848:	e729      	b.n	800469e <_svfiprintf_r+0x2e>
+ 800484a:	aa07      	add	r2, sp, #28
+ 800484c:	9200      	str	r2, [sp, #0]
+ 800484e:	0021      	movs	r1, r4
+ 8004850:	003a      	movs	r2, r7
+ 8004852:	4b06      	ldr	r3, [pc, #24]	; (800486c <_svfiprintf_r+0x1fc>)
+ 8004854:	9803      	ldr	r0, [sp, #12]
+ 8004856:	f000 f87b 	bl	8004950 <_printf_i>
+ 800485a:	e7ea      	b.n	8004832 <_svfiprintf_r+0x1c2>
+ 800485c:	08004d1c 	.word	0x08004d1c
+ 8004860:	08004d22 	.word	0x08004d22
+ 8004864:	08004d26 	.word	0x08004d26
+ 8004868:	00000000 	.word	0x00000000
+ 800486c:	080045ad 	.word	0x080045ad
 
-        /* Disable IDLE interrupt */
-        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 8004ddc:	63fb      	str	r3, [r7, #60]	; 0x3c
- 8004dde:	2301      	movs	r3, #1
- 8004de0:	613b      	str	r3, [r7, #16]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004de2:	693b      	ldr	r3, [r7, #16]
- 8004de4:	f383 8810 	msr	PRIMASK, r3
-}
- 8004de8:	46c0      	nop			; (mov r8, r8)
- 8004dea:	687b      	ldr	r3, [r7, #4]
- 8004dec:	681b      	ldr	r3, [r3, #0]
- 8004dee:	681a      	ldr	r2, [r3, #0]
- 8004df0:	687b      	ldr	r3, [r7, #4]
- 8004df2:	681b      	ldr	r3, [r3, #0]
- 8004df4:	2110      	movs	r1, #16
- 8004df6:	438a      	bics	r2, r1
- 8004df8:	601a      	str	r2, [r3, #0]
- 8004dfa:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
- 8004dfc:	617b      	str	r3, [r7, #20]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004dfe:	697b      	ldr	r3, [r7, #20]
- 8004e00:	f383 8810 	msr	PRIMASK, r3
-}
- 8004e04:	46c0      	nop			; (mov r8, r8)
-
-        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
- 8004e06:	687b      	ldr	r3, [r7, #4]
- 8004e08:	681b      	ldr	r3, [r3, #0]
- 8004e0a:	69db      	ldr	r3, [r3, #28]
- 8004e0c:	2210      	movs	r2, #16
- 8004e0e:	4013      	ands	r3, r2
- 8004e10:	2b10      	cmp	r3, #16
- 8004e12:	d103      	bne.n	8004e1c <UART_RxISR_8BIT+0x184>
-        {
-          /* Clear IDLE Flag */
-          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
- 8004e14:	687b      	ldr	r3, [r7, #4]
- 8004e16:	681b      	ldr	r3, [r3, #0]
- 8004e18:	2210      	movs	r2, #16
- 8004e1a:	621a      	str	r2, [r3, #32]
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-        /*Call registered Rx Event callback*/
-        huart->RxEventCallback(huart, huart->RxXferSize);
-#else
-        /*Call legacy weak Rx Event callback*/
-        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
- 8004e1c:	687b      	ldr	r3, [r7, #4]
- 8004e1e:	2258      	movs	r2, #88	; 0x58
- 8004e20:	5a9a      	ldrh	r2, [r3, r2]
- 8004e22:	687b      	ldr	r3, [r7, #4]
- 8004e24:	0011      	movs	r1, r2
- 8004e26:	0018      	movs	r0, r3
- 8004e28:	f7ff f970 	bl	800410c <HAL_UARTEx_RxEventCallback>
-  else
-  {
-    /* Clear RXNE interrupt flag */
-    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
-  }
-}
- 8004e2c:	e00c      	b.n	8004e48 <UART_RxISR_8BIT+0x1b0>
-        HAL_UART_RxCpltCallback(huart);
- 8004e2e:	687b      	ldr	r3, [r7, #4]
- 8004e30:	0018      	movs	r0, r3
- 8004e32:	f7fc f887 	bl	8000f44 <HAL_UART_RxCpltCallback>
-}
- 8004e36:	e007      	b.n	8004e48 <UART_RxISR_8BIT+0x1b0>
-    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
- 8004e38:	687b      	ldr	r3, [r7, #4]
- 8004e3a:	681b      	ldr	r3, [r3, #0]
- 8004e3c:	699a      	ldr	r2, [r3, #24]
- 8004e3e:	687b      	ldr	r3, [r7, #4]
- 8004e40:	681b      	ldr	r3, [r3, #0]
- 8004e42:	2108      	movs	r1, #8
- 8004e44:	430a      	orrs	r2, r1
- 8004e46:	619a      	str	r2, [r3, #24]
-}
- 8004e48:	46c0      	nop			; (mov r8, r8)
- 8004e4a:	46bd      	mov	sp, r7
- 8004e4c:	b014      	add	sp, #80	; 0x50
- 8004e4e:	bd80      	pop	{r7, pc}
- 8004e50:	fffffedf 	.word	0xfffffedf
- 8004e54:	40004800 	.word	0x40004800
- 8004e58:	fbffffff 	.word	0xfbffffff
-
-08004e5c <UART_RxISR_16BIT>:
-  *         interruptions have been enabled by HAL_UART_Receive_IT()
-  * @param huart UART handle.
-  * @retval None
-  */
-static void UART_RxISR_16BIT(UART_HandleTypeDef *huart)
-{
- 8004e5c:	b580      	push	{r7, lr}
- 8004e5e:	b094      	sub	sp, #80	; 0x50
- 8004e60:	af00      	add	r7, sp, #0
- 8004e62:	6078      	str	r0, [r7, #4]
-  uint16_t *tmp;
-  uint16_t uhMask = huart->Mask;
- 8004e64:	204e      	movs	r0, #78	; 0x4e
- 8004e66:	183b      	adds	r3, r7, r0
- 8004e68:	687a      	ldr	r2, [r7, #4]
- 8004e6a:	215c      	movs	r1, #92	; 0x5c
- 8004e6c:	5a52      	ldrh	r2, [r2, r1]
- 8004e6e:	801a      	strh	r2, [r3, #0]
-  uint16_t  uhdata;
-
-  /* Check that a Rx process is ongoing */
-  if (huart->RxState == HAL_UART_STATE_BUSY_RX)
- 8004e70:	687b      	ldr	r3, [r7, #4]
- 8004e72:	2280      	movs	r2, #128	; 0x80
- 8004e74:	589b      	ldr	r3, [r3, r2]
- 8004e76:	2b22      	cmp	r3, #34	; 0x22
- 8004e78:	d000      	beq.n	8004e7c <UART_RxISR_16BIT+0x20>
- 8004e7a:	e0bf      	b.n	8004ffc <UART_RxISR_16BIT+0x1a0>
-  {
-    uhdata = (uint16_t) READ_REG(huart->Instance->RDR);
- 8004e7c:	687b      	ldr	r3, [r7, #4]
- 8004e7e:	681b      	ldr	r3, [r3, #0]
- 8004e80:	6a5a      	ldr	r2, [r3, #36]	; 0x24
- 8004e82:	214c      	movs	r1, #76	; 0x4c
- 8004e84:	187b      	adds	r3, r7, r1
- 8004e86:	801a      	strh	r2, [r3, #0]
-    tmp = (uint16_t *) huart->pRxBuffPtr ;
- 8004e88:	687b      	ldr	r3, [r7, #4]
- 8004e8a:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 8004e8c:	64bb      	str	r3, [r7, #72]	; 0x48
-    *tmp = (uint16_t)(uhdata & uhMask);
- 8004e8e:	187b      	adds	r3, r7, r1
- 8004e90:	183a      	adds	r2, r7, r0
- 8004e92:	881b      	ldrh	r3, [r3, #0]
- 8004e94:	8812      	ldrh	r2, [r2, #0]
- 8004e96:	4013      	ands	r3, r2
- 8004e98:	b29a      	uxth	r2, r3
- 8004e9a:	6cbb      	ldr	r3, [r7, #72]	; 0x48
- 8004e9c:	801a      	strh	r2, [r3, #0]
-    huart->pRxBuffPtr += 2U;
- 8004e9e:	687b      	ldr	r3, [r7, #4]
- 8004ea0:	6d5b      	ldr	r3, [r3, #84]	; 0x54
- 8004ea2:	1c9a      	adds	r2, r3, #2
- 8004ea4:	687b      	ldr	r3, [r7, #4]
- 8004ea6:	655a      	str	r2, [r3, #84]	; 0x54
-    huart->RxXferCount--;
- 8004ea8:	687b      	ldr	r3, [r7, #4]
- 8004eaa:	225a      	movs	r2, #90	; 0x5a
- 8004eac:	5a9b      	ldrh	r3, [r3, r2]
- 8004eae:	b29b      	uxth	r3, r3
- 8004eb0:	3b01      	subs	r3, #1
- 8004eb2:	b299      	uxth	r1, r3
- 8004eb4:	687b      	ldr	r3, [r7, #4]
- 8004eb6:	225a      	movs	r2, #90	; 0x5a
- 8004eb8:	5299      	strh	r1, [r3, r2]
-
-    if (huart->RxXferCount == 0U)
- 8004eba:	687b      	ldr	r3, [r7, #4]
- 8004ebc:	225a      	movs	r2, #90	; 0x5a
- 8004ebe:	5a9b      	ldrh	r3, [r3, r2]
- 8004ec0:	b29b      	uxth	r3, r3
- 8004ec2:	2b00      	cmp	r3, #0
- 8004ec4:	d000      	beq.n	8004ec8 <UART_RxISR_16BIT+0x6c>
- 8004ec6:	e0a1      	b.n	800500c <UART_RxISR_16BIT+0x1b0>
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004ec8:	f3ef 8310 	mrs	r3, PRIMASK
- 8004ecc:	623b      	str	r3, [r7, #32]
-  return(result);
- 8004ece:	6a3b      	ldr	r3, [r7, #32]
-    {
-      /* Disable the UART Parity Error Interrupt and RXNE interrupt*/
-      ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
- 8004ed0:	647b      	str	r3, [r7, #68]	; 0x44
- 8004ed2:	2301      	movs	r3, #1
- 8004ed4:	627b      	str	r3, [r7, #36]	; 0x24
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004ed6:	6a7b      	ldr	r3, [r7, #36]	; 0x24
- 8004ed8:	f383 8810 	msr	PRIMASK, r3
-}
- 8004edc:	46c0      	nop			; (mov r8, r8)
- 8004ede:	687b      	ldr	r3, [r7, #4]
- 8004ee0:	681b      	ldr	r3, [r3, #0]
- 8004ee2:	681a      	ldr	r2, [r3, #0]
- 8004ee4:	687b      	ldr	r3, [r7, #4]
- 8004ee6:	681b      	ldr	r3, [r3, #0]
- 8004ee8:	494a      	ldr	r1, [pc, #296]	; (8005014 <UART_RxISR_16BIT+0x1b8>)
- 8004eea:	400a      	ands	r2, r1
- 8004eec:	601a      	str	r2, [r3, #0]
- 8004eee:	6c7b      	ldr	r3, [r7, #68]	; 0x44
- 8004ef0:	62bb      	str	r3, [r7, #40]	; 0x28
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004ef2:	6abb      	ldr	r3, [r7, #40]	; 0x28
- 8004ef4:	f383 8810 	msr	PRIMASK, r3
-}
- 8004ef8:	46c0      	nop			; (mov r8, r8)
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004efa:	f3ef 8310 	mrs	r3, PRIMASK
- 8004efe:	62fb      	str	r3, [r7, #44]	; 0x2c
-  return(result);
- 8004f00:	6afb      	ldr	r3, [r7, #44]	; 0x2c
-
-      /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
-      ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- 8004f02:	643b      	str	r3, [r7, #64]	; 0x40
- 8004f04:	2301      	movs	r3, #1
- 8004f06:	633b      	str	r3, [r7, #48]	; 0x30
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004f08:	6b3b      	ldr	r3, [r7, #48]	; 0x30
- 8004f0a:	f383 8810 	msr	PRIMASK, r3
-}
- 8004f0e:	46c0      	nop			; (mov r8, r8)
- 8004f10:	687b      	ldr	r3, [r7, #4]
- 8004f12:	681b      	ldr	r3, [r3, #0]
- 8004f14:	689a      	ldr	r2, [r3, #8]
- 8004f16:	687b      	ldr	r3, [r7, #4]
- 8004f18:	681b      	ldr	r3, [r3, #0]
- 8004f1a:	2101      	movs	r1, #1
- 8004f1c:	438a      	bics	r2, r1
- 8004f1e:	609a      	str	r2, [r3, #8]
- 8004f20:	6c3b      	ldr	r3, [r7, #64]	; 0x40
- 8004f22:	637b      	str	r3, [r7, #52]	; 0x34
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004f24:	6b7b      	ldr	r3, [r7, #52]	; 0x34
- 8004f26:	f383 8810 	msr	PRIMASK, r3
-}
- 8004f2a:	46c0      	nop			; (mov r8, r8)
-
-      /* Rx process is completed, restore huart->RxState to Ready */
-      huart->RxState = HAL_UART_STATE_READY;
- 8004f2c:	687b      	ldr	r3, [r7, #4]
- 8004f2e:	2280      	movs	r2, #128	; 0x80
- 8004f30:	2120      	movs	r1, #32
- 8004f32:	5099      	str	r1, [r3, r2]
-
-      /* Clear RxISR function pointer */
-      huart->RxISR = NULL;
- 8004f34:	687b      	ldr	r3, [r7, #4]
- 8004f36:	2200      	movs	r2, #0
- 8004f38:	669a      	str	r2, [r3, #104]	; 0x68
-
-      /* Initialize type of RxEvent to Transfer Complete */
-      huart->RxEventType = HAL_UART_RXEVENT_TC;
- 8004f3a:	687b      	ldr	r3, [r7, #4]
- 8004f3c:	2200      	movs	r2, #0
- 8004f3e:	665a      	str	r2, [r3, #100]	; 0x64
-
-      if (!(IS_LPUART_INSTANCE(huart->Instance)))
- 8004f40:	687b      	ldr	r3, [r7, #4]
- 8004f42:	681b      	ldr	r3, [r3, #0]
- 8004f44:	4a34      	ldr	r2, [pc, #208]	; (8005018 <UART_RxISR_16BIT+0x1bc>)
- 8004f46:	4293      	cmp	r3, r2
- 8004f48:	d01f      	beq.n	8004f8a <UART_RxISR_16BIT+0x12e>
-      {
-        /* Check that USART RTOEN bit is set */
-        if (READ_BIT(huart->Instance->CR2, USART_CR2_RTOEN) != 0U)
- 8004f4a:	687b      	ldr	r3, [r7, #4]
- 8004f4c:	681b      	ldr	r3, [r3, #0]
- 8004f4e:	685a      	ldr	r2, [r3, #4]
- 8004f50:	2380      	movs	r3, #128	; 0x80
- 8004f52:	041b      	lsls	r3, r3, #16
- 8004f54:	4013      	ands	r3, r2
- 8004f56:	d018      	beq.n	8004f8a <UART_RxISR_16BIT+0x12e>
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004f58:	f3ef 8310 	mrs	r3, PRIMASK
- 8004f5c:	617b      	str	r3, [r7, #20]
-  return(result);
- 8004f5e:	697b      	ldr	r3, [r7, #20]
-        {
-          /* Enable the UART Receiver Timeout Interrupt */
-          ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_RTOIE);
- 8004f60:	63fb      	str	r3, [r7, #60]	; 0x3c
- 8004f62:	2301      	movs	r3, #1
- 8004f64:	61bb      	str	r3, [r7, #24]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004f66:	69bb      	ldr	r3, [r7, #24]
- 8004f68:	f383 8810 	msr	PRIMASK, r3
-}
- 8004f6c:	46c0      	nop			; (mov r8, r8)
- 8004f6e:	687b      	ldr	r3, [r7, #4]
- 8004f70:	681b      	ldr	r3, [r3, #0]
- 8004f72:	681a      	ldr	r2, [r3, #0]
- 8004f74:	687b      	ldr	r3, [r7, #4]
- 8004f76:	681b      	ldr	r3, [r3, #0]
- 8004f78:	4928      	ldr	r1, [pc, #160]	; (800501c <UART_RxISR_16BIT+0x1c0>)
- 8004f7a:	400a      	ands	r2, r1
- 8004f7c:	601a      	str	r2, [r3, #0]
- 8004f7e:	6bfb      	ldr	r3, [r7, #60]	; 0x3c
- 8004f80:	61fb      	str	r3, [r7, #28]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004f82:	69fb      	ldr	r3, [r7, #28]
- 8004f84:	f383 8810 	msr	PRIMASK, r3
-}
- 8004f88:	46c0      	nop			; (mov r8, r8)
-        }
-      }
-
-      /* Check current reception Mode :
-         If Reception till IDLE event has been selected : */
-      if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- 8004f8a:	687b      	ldr	r3, [r7, #4]
- 8004f8c:	6e1b      	ldr	r3, [r3, #96]	; 0x60
- 8004f8e:	2b01      	cmp	r3, #1
- 8004f90:	d12f      	bne.n	8004ff2 <UART_RxISR_16BIT+0x196>
-      {
-        /* Set reception type to Standard */
-        huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
- 8004f92:	687b      	ldr	r3, [r7, #4]
- 8004f94:	2200      	movs	r2, #0
- 8004f96:	661a      	str	r2, [r3, #96]	; 0x60
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 8004f98:	f3ef 8310 	mrs	r3, PRIMASK
- 8004f9c:	60bb      	str	r3, [r7, #8]
-  return(result);
- 8004f9e:	68bb      	ldr	r3, [r7, #8]
-
-        /* Disable IDLE interrupt */
-        ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- 8004fa0:	63bb      	str	r3, [r7, #56]	; 0x38
- 8004fa2:	2301      	movs	r3, #1
- 8004fa4:	60fb      	str	r3, [r7, #12]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004fa6:	68fb      	ldr	r3, [r7, #12]
- 8004fa8:	f383 8810 	msr	PRIMASK, r3
-}
- 8004fac:	46c0      	nop			; (mov r8, r8)
- 8004fae:	687b      	ldr	r3, [r7, #4]
- 8004fb0:	681b      	ldr	r3, [r3, #0]
- 8004fb2:	681a      	ldr	r2, [r3, #0]
- 8004fb4:	687b      	ldr	r3, [r7, #4]
- 8004fb6:	681b      	ldr	r3, [r3, #0]
- 8004fb8:	2110      	movs	r1, #16
- 8004fba:	438a      	bics	r2, r1
- 8004fbc:	601a      	str	r2, [r3, #0]
- 8004fbe:	6bbb      	ldr	r3, [r7, #56]	; 0x38
- 8004fc0:	613b      	str	r3, [r7, #16]
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 8004fc2:	693b      	ldr	r3, [r7, #16]
- 8004fc4:	f383 8810 	msr	PRIMASK, r3
-}
- 8004fc8:	46c0      	nop			; (mov r8, r8)
-
-        if (__HAL_UART_GET_FLAG(huart, UART_FLAG_IDLE) == SET)
- 8004fca:	687b      	ldr	r3, [r7, #4]
- 8004fcc:	681b      	ldr	r3, [r3, #0]
- 8004fce:	69db      	ldr	r3, [r3, #28]
- 8004fd0:	2210      	movs	r2, #16
- 8004fd2:	4013      	ands	r3, r2
- 8004fd4:	2b10      	cmp	r3, #16
- 8004fd6:	d103      	bne.n	8004fe0 <UART_RxISR_16BIT+0x184>
-        {
-          /* Clear IDLE Flag */
-          __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_IDLEF);
- 8004fd8:	687b      	ldr	r3, [r7, #4]
- 8004fda:	681b      	ldr	r3, [r3, #0]
- 8004fdc:	2210      	movs	r2, #16
- 8004fde:	621a      	str	r2, [r3, #32]
-#if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
-        /*Call registered Rx Event callback*/
-        huart->RxEventCallback(huart, huart->RxXferSize);
-#else
-        /*Call legacy weak Rx Event callback*/
-        HAL_UARTEx_RxEventCallback(huart, huart->RxXferSize);
- 8004fe0:	687b      	ldr	r3, [r7, #4]
- 8004fe2:	2258      	movs	r2, #88	; 0x58
- 8004fe4:	5a9a      	ldrh	r2, [r3, r2]
- 8004fe6:	687b      	ldr	r3, [r7, #4]
- 8004fe8:	0011      	movs	r1, r2
- 8004fea:	0018      	movs	r0, r3
- 8004fec:	f7ff f88e 	bl	800410c <HAL_UARTEx_RxEventCallback>
-  else
-  {
-    /* Clear RXNE interrupt flag */
-    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
-  }
-}
- 8004ff0:	e00c      	b.n	800500c <UART_RxISR_16BIT+0x1b0>
-        HAL_UART_RxCpltCallback(huart);
- 8004ff2:	687b      	ldr	r3, [r7, #4]
- 8004ff4:	0018      	movs	r0, r3
- 8004ff6:	f7fb ffa5 	bl	8000f44 <HAL_UART_RxCpltCallback>
-}
- 8004ffa:	e007      	b.n	800500c <UART_RxISR_16BIT+0x1b0>
-    __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
- 8004ffc:	687b      	ldr	r3, [r7, #4]
- 8004ffe:	681b      	ldr	r3, [r3, #0]
- 8005000:	699a      	ldr	r2, [r3, #24]
- 8005002:	687b      	ldr	r3, [r7, #4]
- 8005004:	681b      	ldr	r3, [r3, #0]
- 8005006:	2108      	movs	r1, #8
- 8005008:	430a      	orrs	r2, r1
- 800500a:	619a      	str	r2, [r3, #24]
-}
- 800500c:	46c0      	nop			; (mov r8, r8)
- 800500e:	46bd      	mov	sp, r7
- 8005010:	b014      	add	sp, #80	; 0x50
- 8005012:	bd80      	pop	{r7, pc}
- 8005014:	fffffedf 	.word	0xfffffedf
- 8005018:	40004800 	.word	0x40004800
- 800501c:	fbffffff 	.word	0xfbffffff
-
-08005020 <HAL_UARTEx_WakeupCallback>:
-  * @brief UART wakeup from Stop mode callback.
-  * @param huart UART handle.
-  * @retval None
-  */
-__weak void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart)
-{
- 8005020:	b580      	push	{r7, lr}
- 8005022:	b082      	sub	sp, #8
- 8005024:	af00      	add	r7, sp, #0
- 8005026:	6078      	str	r0, [r7, #4]
-  UNUSED(huart);
-
-  /* NOTE : This function should not be modified, when the callback is needed,
-            the HAL_UARTEx_WakeupCallback can be implemented in the user file.
-   */
-}
- 8005028:	46c0      	nop			; (mov r8, r8)
- 800502a:	46bd      	mov	sp, r7
- 800502c:	b002      	add	sp, #8
- 800502e:	bd80      	pop	{r7, pc}
-
-08005030 <siprintf>:
- 8005030:	b40e      	push	{r1, r2, r3}
- 8005032:	b500      	push	{lr}
- 8005034:	490b      	ldr	r1, [pc, #44]	; (8005064 <siprintf+0x34>)
- 8005036:	b09c      	sub	sp, #112	; 0x70
- 8005038:	ab1d      	add	r3, sp, #116	; 0x74
- 800503a:	9002      	str	r0, [sp, #8]
- 800503c:	9006      	str	r0, [sp, #24]
- 800503e:	9107      	str	r1, [sp, #28]
- 8005040:	9104      	str	r1, [sp, #16]
- 8005042:	4809      	ldr	r0, [pc, #36]	; (8005068 <siprintf+0x38>)
- 8005044:	4909      	ldr	r1, [pc, #36]	; (800506c <siprintf+0x3c>)
- 8005046:	cb04      	ldmia	r3!, {r2}
- 8005048:	9105      	str	r1, [sp, #20]
- 800504a:	6800      	ldr	r0, [r0, #0]
- 800504c:	a902      	add	r1, sp, #8
- 800504e:	9301      	str	r3, [sp, #4]
- 8005050:	f000 f9a2 	bl	8005398 <_svfiprintf_r>
- 8005054:	2200      	movs	r2, #0
- 8005056:	9b02      	ldr	r3, [sp, #8]
- 8005058:	701a      	strb	r2, [r3, #0]
- 800505a:	b01c      	add	sp, #112	; 0x70
- 800505c:	bc08      	pop	{r3}
- 800505e:	b003      	add	sp, #12
- 8005060:	4718      	bx	r3
- 8005062:	46c0      	nop			; (mov r8, r8)
- 8005064:	7fffffff 	.word	0x7fffffff
- 8005068:	20000058 	.word	0x20000058
- 800506c:	ffff0208 	.word	0xffff0208
-
-08005070 <memset>:
- 8005070:	0003      	movs	r3, r0
- 8005072:	1882      	adds	r2, r0, r2
- 8005074:	4293      	cmp	r3, r2
- 8005076:	d100      	bne.n	800507a <memset+0xa>
- 8005078:	4770      	bx	lr
- 800507a:	7019      	strb	r1, [r3, #0]
- 800507c:	3301      	adds	r3, #1
- 800507e:	e7f9      	b.n	8005074 <memset+0x4>
-
-08005080 <__errno>:
- 8005080:	4b01      	ldr	r3, [pc, #4]	; (8005088 <__errno+0x8>)
- 8005082:	6818      	ldr	r0, [r3, #0]
- 8005084:	4770      	bx	lr
- 8005086:	46c0      	nop			; (mov r8, r8)
- 8005088:	20000058 	.word	0x20000058
-
-0800508c <__libc_init_array>:
- 800508c:	b570      	push	{r4, r5, r6, lr}
- 800508e:	2600      	movs	r6, #0
- 8005090:	4c0c      	ldr	r4, [pc, #48]	; (80050c4 <__libc_init_array+0x38>)
- 8005092:	4d0d      	ldr	r5, [pc, #52]	; (80050c8 <__libc_init_array+0x3c>)
- 8005094:	1b64      	subs	r4, r4, r5
- 8005096:	10a4      	asrs	r4, r4, #2
- 8005098:	42a6      	cmp	r6, r4
- 800509a:	d109      	bne.n	80050b0 <__libc_init_array+0x24>
- 800509c:	2600      	movs	r6, #0
- 800509e:	f000 fc6d 	bl	800597c <_init>
- 80050a2:	4c0a      	ldr	r4, [pc, #40]	; (80050cc <__libc_init_array+0x40>)
- 80050a4:	4d0a      	ldr	r5, [pc, #40]	; (80050d0 <__libc_init_array+0x44>)
- 80050a6:	1b64      	subs	r4, r4, r5
- 80050a8:	10a4      	asrs	r4, r4, #2
- 80050aa:	42a6      	cmp	r6, r4
- 80050ac:	d105      	bne.n	80050ba <__libc_init_array+0x2e>
- 80050ae:	bd70      	pop	{r4, r5, r6, pc}
- 80050b0:	00b3      	lsls	r3, r6, #2
- 80050b2:	58eb      	ldr	r3, [r5, r3]
- 80050b4:	4798      	blx	r3
- 80050b6:	3601      	adds	r6, #1
- 80050b8:	e7ee      	b.n	8005098 <__libc_init_array+0xc>
- 80050ba:	00b3      	lsls	r3, r6, #2
- 80050bc:	58eb      	ldr	r3, [r5, r3]
- 80050be:	4798      	blx	r3
- 80050c0:	3601      	adds	r6, #1
- 80050c2:	e7f2      	b.n	80050aa <__libc_init_array+0x1e>
- 80050c4:	08005a80 	.word	0x08005a80
- 80050c8:	08005a80 	.word	0x08005a80
- 80050cc:	08005a84 	.word	0x08005a84
- 80050d0:	08005a80 	.word	0x08005a80
-
-080050d4 <__retarget_lock_acquire_recursive>:
- 80050d4:	4770      	bx	lr
-
-080050d6 <__retarget_lock_release_recursive>:
- 80050d6:	4770      	bx	lr
-
-080050d8 <_free_r>:
- 80050d8:	b570      	push	{r4, r5, r6, lr}
- 80050da:	0005      	movs	r5, r0
- 80050dc:	2900      	cmp	r1, #0
- 80050de:	d010      	beq.n	8005102 <_free_r+0x2a>
- 80050e0:	1f0c      	subs	r4, r1, #4
- 80050e2:	6823      	ldr	r3, [r4, #0]
- 80050e4:	2b00      	cmp	r3, #0
- 80050e6:	da00      	bge.n	80050ea <_free_r+0x12>
- 80050e8:	18e4      	adds	r4, r4, r3
- 80050ea:	0028      	movs	r0, r5
- 80050ec:	f000 f8e2 	bl	80052b4 <__malloc_lock>
- 80050f0:	4a1d      	ldr	r2, [pc, #116]	; (8005168 <_free_r+0x90>)
- 80050f2:	6813      	ldr	r3, [r2, #0]
- 80050f4:	2b00      	cmp	r3, #0
- 80050f6:	d105      	bne.n	8005104 <_free_r+0x2c>
- 80050f8:	6063      	str	r3, [r4, #4]
- 80050fa:	6014      	str	r4, [r2, #0]
- 80050fc:	0028      	movs	r0, r5
- 80050fe:	f000 f8e1 	bl	80052c4 <__malloc_unlock>
- 8005102:	bd70      	pop	{r4, r5, r6, pc}
- 8005104:	42a3      	cmp	r3, r4
- 8005106:	d908      	bls.n	800511a <_free_r+0x42>
- 8005108:	6820      	ldr	r0, [r4, #0]
- 800510a:	1821      	adds	r1, r4, r0
- 800510c:	428b      	cmp	r3, r1
- 800510e:	d1f3      	bne.n	80050f8 <_free_r+0x20>
- 8005110:	6819      	ldr	r1, [r3, #0]
- 8005112:	685b      	ldr	r3, [r3, #4]
- 8005114:	1809      	adds	r1, r1, r0
- 8005116:	6021      	str	r1, [r4, #0]
- 8005118:	e7ee      	b.n	80050f8 <_free_r+0x20>
- 800511a:	001a      	movs	r2, r3
- 800511c:	685b      	ldr	r3, [r3, #4]
- 800511e:	2b00      	cmp	r3, #0
- 8005120:	d001      	beq.n	8005126 <_free_r+0x4e>
- 8005122:	42a3      	cmp	r3, r4
- 8005124:	d9f9      	bls.n	800511a <_free_r+0x42>
- 8005126:	6811      	ldr	r1, [r2, #0]
- 8005128:	1850      	adds	r0, r2, r1
- 800512a:	42a0      	cmp	r0, r4
- 800512c:	d10b      	bne.n	8005146 <_free_r+0x6e>
- 800512e:	6820      	ldr	r0, [r4, #0]
- 8005130:	1809      	adds	r1, r1, r0
- 8005132:	1850      	adds	r0, r2, r1
- 8005134:	6011      	str	r1, [r2, #0]
- 8005136:	4283      	cmp	r3, r0
- 8005138:	d1e0      	bne.n	80050fc <_free_r+0x24>
- 800513a:	6818      	ldr	r0, [r3, #0]
- 800513c:	685b      	ldr	r3, [r3, #4]
- 800513e:	1841      	adds	r1, r0, r1
- 8005140:	6011      	str	r1, [r2, #0]
- 8005142:	6053      	str	r3, [r2, #4]
- 8005144:	e7da      	b.n	80050fc <_free_r+0x24>
- 8005146:	42a0      	cmp	r0, r4
- 8005148:	d902      	bls.n	8005150 <_free_r+0x78>
- 800514a:	230c      	movs	r3, #12
- 800514c:	602b      	str	r3, [r5, #0]
- 800514e:	e7d5      	b.n	80050fc <_free_r+0x24>
- 8005150:	6820      	ldr	r0, [r4, #0]
- 8005152:	1821      	adds	r1, r4, r0
- 8005154:	428b      	cmp	r3, r1
- 8005156:	d103      	bne.n	8005160 <_free_r+0x88>
- 8005158:	6819      	ldr	r1, [r3, #0]
- 800515a:	685b      	ldr	r3, [r3, #4]
- 800515c:	1809      	adds	r1, r1, r0
- 800515e:	6021      	str	r1, [r4, #0]
- 8005160:	6063      	str	r3, [r4, #4]
- 8005162:	6054      	str	r4, [r2, #4]
- 8005164:	e7ca      	b.n	80050fc <_free_r+0x24>
- 8005166:	46c0      	nop			; (mov r8, r8)
- 8005168:	20000410 	.word	0x20000410
-
-0800516c <sbrk_aligned>:
- 800516c:	b570      	push	{r4, r5, r6, lr}
- 800516e:	4e0f      	ldr	r6, [pc, #60]	; (80051ac <sbrk_aligned+0x40>)
- 8005170:	000d      	movs	r5, r1
- 8005172:	6831      	ldr	r1, [r6, #0]
- 8005174:	0004      	movs	r4, r0
- 8005176:	2900      	cmp	r1, #0
- 8005178:	d102      	bne.n	8005180 <sbrk_aligned+0x14>
- 800517a:	f000 fba1 	bl	80058c0 <_sbrk_r>
- 800517e:	6030      	str	r0, [r6, #0]
- 8005180:	0029      	movs	r1, r5
- 8005182:	0020      	movs	r0, r4
- 8005184:	f000 fb9c 	bl	80058c0 <_sbrk_r>
- 8005188:	1c43      	adds	r3, r0, #1
- 800518a:	d00a      	beq.n	80051a2 <sbrk_aligned+0x36>
- 800518c:	2303      	movs	r3, #3
- 800518e:	1cc5      	adds	r5, r0, #3
- 8005190:	439d      	bics	r5, r3
- 8005192:	42a8      	cmp	r0, r5
- 8005194:	d007      	beq.n	80051a6 <sbrk_aligned+0x3a>
- 8005196:	1a29      	subs	r1, r5, r0
- 8005198:	0020      	movs	r0, r4
- 800519a:	f000 fb91 	bl	80058c0 <_sbrk_r>
- 800519e:	3001      	adds	r0, #1
- 80051a0:	d101      	bne.n	80051a6 <sbrk_aligned+0x3a>
- 80051a2:	2501      	movs	r5, #1
- 80051a4:	426d      	negs	r5, r5
- 80051a6:	0028      	movs	r0, r5
- 80051a8:	bd70      	pop	{r4, r5, r6, pc}
- 80051aa:	46c0      	nop			; (mov r8, r8)
- 80051ac:	20000414 	.word	0x20000414
-
-080051b0 <_malloc_r>:
- 80051b0:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
- 80051b2:	2203      	movs	r2, #3
- 80051b4:	1ccb      	adds	r3, r1, #3
- 80051b6:	4393      	bics	r3, r2
- 80051b8:	3308      	adds	r3, #8
- 80051ba:	0006      	movs	r6, r0
- 80051bc:	001f      	movs	r7, r3
- 80051be:	2b0c      	cmp	r3, #12
- 80051c0:	d238      	bcs.n	8005234 <_malloc_r+0x84>
- 80051c2:	270c      	movs	r7, #12
- 80051c4:	42b9      	cmp	r1, r7
- 80051c6:	d837      	bhi.n	8005238 <_malloc_r+0x88>
- 80051c8:	0030      	movs	r0, r6
- 80051ca:	f000 f873 	bl	80052b4 <__malloc_lock>
- 80051ce:	4b38      	ldr	r3, [pc, #224]	; (80052b0 <_malloc_r+0x100>)
- 80051d0:	9300      	str	r3, [sp, #0]
- 80051d2:	681b      	ldr	r3, [r3, #0]
- 80051d4:	001c      	movs	r4, r3
- 80051d6:	2c00      	cmp	r4, #0
- 80051d8:	d133      	bne.n	8005242 <_malloc_r+0x92>
- 80051da:	0039      	movs	r1, r7
- 80051dc:	0030      	movs	r0, r6
- 80051de:	f7ff ffc5 	bl	800516c <sbrk_aligned>
- 80051e2:	0004      	movs	r4, r0
- 80051e4:	1c43      	adds	r3, r0, #1
- 80051e6:	d15e      	bne.n	80052a6 <_malloc_r+0xf6>
- 80051e8:	9b00      	ldr	r3, [sp, #0]
- 80051ea:	681c      	ldr	r4, [r3, #0]
- 80051ec:	0025      	movs	r5, r4
- 80051ee:	2d00      	cmp	r5, #0
- 80051f0:	d14e      	bne.n	8005290 <_malloc_r+0xe0>
- 80051f2:	2c00      	cmp	r4, #0
- 80051f4:	d051      	beq.n	800529a <_malloc_r+0xea>
- 80051f6:	6823      	ldr	r3, [r4, #0]
- 80051f8:	0029      	movs	r1, r5
- 80051fa:	18e3      	adds	r3, r4, r3
- 80051fc:	0030      	movs	r0, r6
- 80051fe:	9301      	str	r3, [sp, #4]
- 8005200:	f000 fb5e 	bl	80058c0 <_sbrk_r>
- 8005204:	9b01      	ldr	r3, [sp, #4]
- 8005206:	4283      	cmp	r3, r0
- 8005208:	d147      	bne.n	800529a <_malloc_r+0xea>
- 800520a:	6823      	ldr	r3, [r4, #0]
- 800520c:	0030      	movs	r0, r6
- 800520e:	1aff      	subs	r7, r7, r3
- 8005210:	0039      	movs	r1, r7
- 8005212:	f7ff ffab 	bl	800516c <sbrk_aligned>
- 8005216:	3001      	adds	r0, #1
- 8005218:	d03f      	beq.n	800529a <_malloc_r+0xea>
- 800521a:	6823      	ldr	r3, [r4, #0]
- 800521c:	19db      	adds	r3, r3, r7
- 800521e:	6023      	str	r3, [r4, #0]
- 8005220:	9b00      	ldr	r3, [sp, #0]
- 8005222:	681b      	ldr	r3, [r3, #0]
- 8005224:	2b00      	cmp	r3, #0
- 8005226:	d040      	beq.n	80052aa <_malloc_r+0xfa>
- 8005228:	685a      	ldr	r2, [r3, #4]
- 800522a:	42a2      	cmp	r2, r4
- 800522c:	d133      	bne.n	8005296 <_malloc_r+0xe6>
- 800522e:	2200      	movs	r2, #0
- 8005230:	605a      	str	r2, [r3, #4]
- 8005232:	e014      	b.n	800525e <_malloc_r+0xae>
- 8005234:	2b00      	cmp	r3, #0
- 8005236:	dac5      	bge.n	80051c4 <_malloc_r+0x14>
- 8005238:	230c      	movs	r3, #12
- 800523a:	2500      	movs	r5, #0
- 800523c:	6033      	str	r3, [r6, #0]
- 800523e:	0028      	movs	r0, r5
- 8005240:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
- 8005242:	6821      	ldr	r1, [r4, #0]
- 8005244:	1bc9      	subs	r1, r1, r7
- 8005246:	d420      	bmi.n	800528a <_malloc_r+0xda>
- 8005248:	290b      	cmp	r1, #11
- 800524a:	d918      	bls.n	800527e <_malloc_r+0xce>
- 800524c:	19e2      	adds	r2, r4, r7
- 800524e:	6027      	str	r7, [r4, #0]
- 8005250:	42a3      	cmp	r3, r4
- 8005252:	d112      	bne.n	800527a <_malloc_r+0xca>
- 8005254:	9b00      	ldr	r3, [sp, #0]
- 8005256:	601a      	str	r2, [r3, #0]
- 8005258:	6863      	ldr	r3, [r4, #4]
- 800525a:	6011      	str	r1, [r2, #0]
- 800525c:	6053      	str	r3, [r2, #4]
- 800525e:	0030      	movs	r0, r6
- 8005260:	0025      	movs	r5, r4
- 8005262:	f000 f82f 	bl	80052c4 <__malloc_unlock>
- 8005266:	2207      	movs	r2, #7
- 8005268:	350b      	adds	r5, #11
- 800526a:	1d23      	adds	r3, r4, #4
- 800526c:	4395      	bics	r5, r2
- 800526e:	1aea      	subs	r2, r5, r3
- 8005270:	429d      	cmp	r5, r3
- 8005272:	d0e4      	beq.n	800523e <_malloc_r+0x8e>
- 8005274:	1b5b      	subs	r3, r3, r5
- 8005276:	50a3      	str	r3, [r4, r2]
- 8005278:	e7e1      	b.n	800523e <_malloc_r+0x8e>
- 800527a:	605a      	str	r2, [r3, #4]
- 800527c:	e7ec      	b.n	8005258 <_malloc_r+0xa8>
- 800527e:	6862      	ldr	r2, [r4, #4]
- 8005280:	42a3      	cmp	r3, r4
- 8005282:	d1d5      	bne.n	8005230 <_malloc_r+0x80>
- 8005284:	9b00      	ldr	r3, [sp, #0]
- 8005286:	601a      	str	r2, [r3, #0]
- 8005288:	e7e9      	b.n	800525e <_malloc_r+0xae>
- 800528a:	0023      	movs	r3, r4
- 800528c:	6864      	ldr	r4, [r4, #4]
- 800528e:	e7a2      	b.n	80051d6 <_malloc_r+0x26>
- 8005290:	002c      	movs	r4, r5
- 8005292:	686d      	ldr	r5, [r5, #4]
- 8005294:	e7ab      	b.n	80051ee <_malloc_r+0x3e>
- 8005296:	0013      	movs	r3, r2
- 8005298:	e7c4      	b.n	8005224 <_malloc_r+0x74>
- 800529a:	230c      	movs	r3, #12
- 800529c:	0030      	movs	r0, r6
- 800529e:	6033      	str	r3, [r6, #0]
- 80052a0:	f000 f810 	bl	80052c4 <__malloc_unlock>
- 80052a4:	e7cb      	b.n	800523e <_malloc_r+0x8e>
- 80052a6:	6027      	str	r7, [r4, #0]
- 80052a8:	e7d9      	b.n	800525e <_malloc_r+0xae>
- 80052aa:	605b      	str	r3, [r3, #4]
- 80052ac:	deff      	udf	#255	; 0xff
- 80052ae:	46c0      	nop			; (mov r8, r8)
- 80052b0:	20000410 	.word	0x20000410
-
-080052b4 <__malloc_lock>:
- 80052b4:	b510      	push	{r4, lr}
- 80052b6:	4802      	ldr	r0, [pc, #8]	; (80052c0 <__malloc_lock+0xc>)
- 80052b8:	f7ff ff0c 	bl	80050d4 <__retarget_lock_acquire_recursive>
- 80052bc:	bd10      	pop	{r4, pc}
- 80052be:	46c0      	nop			; (mov r8, r8)
- 80052c0:	2000040c 	.word	0x2000040c
-
-080052c4 <__malloc_unlock>:
- 80052c4:	b510      	push	{r4, lr}
- 80052c6:	4802      	ldr	r0, [pc, #8]	; (80052d0 <__malloc_unlock+0xc>)
- 80052c8:	f7ff ff05 	bl	80050d6 <__retarget_lock_release_recursive>
- 80052cc:	bd10      	pop	{r4, pc}
- 80052ce:	46c0      	nop			; (mov r8, r8)
- 80052d0:	2000040c 	.word	0x2000040c
-
-080052d4 <__ssputs_r>:
- 80052d4:	b5f0      	push	{r4, r5, r6, r7, lr}
- 80052d6:	b085      	sub	sp, #20
- 80052d8:	9301      	str	r3, [sp, #4]
- 80052da:	9203      	str	r2, [sp, #12]
- 80052dc:	688e      	ldr	r6, [r1, #8]
- 80052de:	9a01      	ldr	r2, [sp, #4]
- 80052e0:	0007      	movs	r7, r0
- 80052e2:	000c      	movs	r4, r1
- 80052e4:	680b      	ldr	r3, [r1, #0]
- 80052e6:	4296      	cmp	r6, r2
- 80052e8:	d831      	bhi.n	800534e <__ssputs_r+0x7a>
- 80052ea:	898a      	ldrh	r2, [r1, #12]
- 80052ec:	2190      	movs	r1, #144	; 0x90
- 80052ee:	00c9      	lsls	r1, r1, #3
- 80052f0:	420a      	tst	r2, r1
- 80052f2:	d029      	beq.n	8005348 <__ssputs_r+0x74>
- 80052f4:	2003      	movs	r0, #3
- 80052f6:	6921      	ldr	r1, [r4, #16]
- 80052f8:	1a5b      	subs	r3, r3, r1
- 80052fa:	9302      	str	r3, [sp, #8]
- 80052fc:	6963      	ldr	r3, [r4, #20]
- 80052fe:	4343      	muls	r3, r0
- 8005300:	0fdd      	lsrs	r5, r3, #31
- 8005302:	18ed      	adds	r5, r5, r3
- 8005304:	9b01      	ldr	r3, [sp, #4]
- 8005306:	9802      	ldr	r0, [sp, #8]
- 8005308:	3301      	adds	r3, #1
- 800530a:	181b      	adds	r3, r3, r0
- 800530c:	106d      	asrs	r5, r5, #1
- 800530e:	42ab      	cmp	r3, r5
- 8005310:	d900      	bls.n	8005314 <__ssputs_r+0x40>
- 8005312:	001d      	movs	r5, r3
- 8005314:	0552      	lsls	r2, r2, #21
- 8005316:	d529      	bpl.n	800536c <__ssputs_r+0x98>
- 8005318:	0029      	movs	r1, r5
- 800531a:	0038      	movs	r0, r7
- 800531c:	f7ff ff48 	bl	80051b0 <_malloc_r>
- 8005320:	1e06      	subs	r6, r0, #0
- 8005322:	d02d      	beq.n	8005380 <__ssputs_r+0xac>
- 8005324:	9a02      	ldr	r2, [sp, #8]
- 8005326:	6921      	ldr	r1, [r4, #16]
- 8005328:	f000 fae7 	bl	80058fa <memcpy>
- 800532c:	89a2      	ldrh	r2, [r4, #12]
- 800532e:	4b19      	ldr	r3, [pc, #100]	; (8005394 <__ssputs_r+0xc0>)
- 8005330:	401a      	ands	r2, r3
- 8005332:	2380      	movs	r3, #128	; 0x80
- 8005334:	4313      	orrs	r3, r2
- 8005336:	81a3      	strh	r3, [r4, #12]
- 8005338:	9b02      	ldr	r3, [sp, #8]
- 800533a:	6126      	str	r6, [r4, #16]
- 800533c:	18f6      	adds	r6, r6, r3
- 800533e:	6026      	str	r6, [r4, #0]
- 8005340:	6165      	str	r5, [r4, #20]
- 8005342:	9e01      	ldr	r6, [sp, #4]
- 8005344:	1aed      	subs	r5, r5, r3
- 8005346:	60a5      	str	r5, [r4, #8]
- 8005348:	9b01      	ldr	r3, [sp, #4]
- 800534a:	429e      	cmp	r6, r3
- 800534c:	d900      	bls.n	8005350 <__ssputs_r+0x7c>
- 800534e:	9e01      	ldr	r6, [sp, #4]
- 8005350:	0032      	movs	r2, r6
- 8005352:	9903      	ldr	r1, [sp, #12]
- 8005354:	6820      	ldr	r0, [r4, #0]
- 8005356:	f000 fa9f 	bl	8005898 <memmove>
- 800535a:	2000      	movs	r0, #0
- 800535c:	68a3      	ldr	r3, [r4, #8]
- 800535e:	1b9b      	subs	r3, r3, r6
- 8005360:	60a3      	str	r3, [r4, #8]
- 8005362:	6823      	ldr	r3, [r4, #0]
- 8005364:	199b      	adds	r3, r3, r6
- 8005366:	6023      	str	r3, [r4, #0]
- 8005368:	b005      	add	sp, #20
- 800536a:	bdf0      	pop	{r4, r5, r6, r7, pc}
- 800536c:	002a      	movs	r2, r5
- 800536e:	0038      	movs	r0, r7
- 8005370:	f000 facc 	bl	800590c <_realloc_r>
- 8005374:	1e06      	subs	r6, r0, #0
- 8005376:	d1df      	bne.n	8005338 <__ssputs_r+0x64>
- 8005378:	0038      	movs	r0, r7
- 800537a:	6921      	ldr	r1, [r4, #16]
- 800537c:	f7ff feac 	bl	80050d8 <_free_r>
- 8005380:	230c      	movs	r3, #12
- 8005382:	2001      	movs	r0, #1
- 8005384:	603b      	str	r3, [r7, #0]
- 8005386:	89a2      	ldrh	r2, [r4, #12]
- 8005388:	3334      	adds	r3, #52	; 0x34
- 800538a:	4313      	orrs	r3, r2
- 800538c:	81a3      	strh	r3, [r4, #12]
- 800538e:	4240      	negs	r0, r0
- 8005390:	e7ea      	b.n	8005368 <__ssputs_r+0x94>
- 8005392:	46c0      	nop			; (mov r8, r8)
- 8005394:	fffffb7f 	.word	0xfffffb7f
-
-08005398 <_svfiprintf_r>:
- 8005398:	b5f0      	push	{r4, r5, r6, r7, lr}
- 800539a:	b0a1      	sub	sp, #132	; 0x84
- 800539c:	9003      	str	r0, [sp, #12]
- 800539e:	001d      	movs	r5, r3
- 80053a0:	898b      	ldrh	r3, [r1, #12]
- 80053a2:	000f      	movs	r7, r1
- 80053a4:	0016      	movs	r6, r2
- 80053a6:	061b      	lsls	r3, r3, #24
- 80053a8:	d511      	bpl.n	80053ce <_svfiprintf_r+0x36>
- 80053aa:	690b      	ldr	r3, [r1, #16]
- 80053ac:	2b00      	cmp	r3, #0
- 80053ae:	d10e      	bne.n	80053ce <_svfiprintf_r+0x36>
- 80053b0:	2140      	movs	r1, #64	; 0x40
- 80053b2:	f7ff fefd 	bl	80051b0 <_malloc_r>
- 80053b6:	6038      	str	r0, [r7, #0]
- 80053b8:	6138      	str	r0, [r7, #16]
- 80053ba:	2800      	cmp	r0, #0
- 80053bc:	d105      	bne.n	80053ca <_svfiprintf_r+0x32>
- 80053be:	230c      	movs	r3, #12
- 80053c0:	9a03      	ldr	r2, [sp, #12]
- 80053c2:	3801      	subs	r0, #1
- 80053c4:	6013      	str	r3, [r2, #0]
- 80053c6:	b021      	add	sp, #132	; 0x84
- 80053c8:	bdf0      	pop	{r4, r5, r6, r7, pc}
- 80053ca:	2340      	movs	r3, #64	; 0x40
- 80053cc:	617b      	str	r3, [r7, #20]
- 80053ce:	2300      	movs	r3, #0
- 80053d0:	ac08      	add	r4, sp, #32
- 80053d2:	6163      	str	r3, [r4, #20]
- 80053d4:	3320      	adds	r3, #32
- 80053d6:	7663      	strb	r3, [r4, #25]
- 80053d8:	3310      	adds	r3, #16
- 80053da:	76a3      	strb	r3, [r4, #26]
- 80053dc:	9507      	str	r5, [sp, #28]
- 80053de:	0035      	movs	r5, r6
- 80053e0:	782b      	ldrb	r3, [r5, #0]
- 80053e2:	2b00      	cmp	r3, #0
- 80053e4:	d001      	beq.n	80053ea <_svfiprintf_r+0x52>
- 80053e6:	2b25      	cmp	r3, #37	; 0x25
- 80053e8:	d148      	bne.n	800547c <_svfiprintf_r+0xe4>
- 80053ea:	1bab      	subs	r3, r5, r6
- 80053ec:	9305      	str	r3, [sp, #20]
- 80053ee:	42b5      	cmp	r5, r6
- 80053f0:	d00b      	beq.n	800540a <_svfiprintf_r+0x72>
- 80053f2:	0032      	movs	r2, r6
- 80053f4:	0039      	movs	r1, r7
- 80053f6:	9803      	ldr	r0, [sp, #12]
- 80053f8:	f7ff ff6c 	bl	80052d4 <__ssputs_r>
- 80053fc:	3001      	adds	r0, #1
- 80053fe:	d100      	bne.n	8005402 <_svfiprintf_r+0x6a>
- 8005400:	e0af      	b.n	8005562 <_svfiprintf_r+0x1ca>
- 8005402:	6963      	ldr	r3, [r4, #20]
- 8005404:	9a05      	ldr	r2, [sp, #20]
- 8005406:	189b      	adds	r3, r3, r2
- 8005408:	6163      	str	r3, [r4, #20]
- 800540a:	782b      	ldrb	r3, [r5, #0]
- 800540c:	2b00      	cmp	r3, #0
- 800540e:	d100      	bne.n	8005412 <_svfiprintf_r+0x7a>
- 8005410:	e0a7      	b.n	8005562 <_svfiprintf_r+0x1ca>
- 8005412:	2201      	movs	r2, #1
- 8005414:	2300      	movs	r3, #0
- 8005416:	4252      	negs	r2, r2
- 8005418:	6062      	str	r2, [r4, #4]
- 800541a:	a904      	add	r1, sp, #16
- 800541c:	3254      	adds	r2, #84	; 0x54
- 800541e:	1852      	adds	r2, r2, r1
- 8005420:	1c6e      	adds	r6, r5, #1
- 8005422:	6023      	str	r3, [r4, #0]
- 8005424:	60e3      	str	r3, [r4, #12]
- 8005426:	60a3      	str	r3, [r4, #8]
- 8005428:	7013      	strb	r3, [r2, #0]
- 800542a:	65a3      	str	r3, [r4, #88]	; 0x58
- 800542c:	4b55      	ldr	r3, [pc, #340]	; (8005584 <_svfiprintf_r+0x1ec>)
- 800542e:	2205      	movs	r2, #5
- 8005430:	0018      	movs	r0, r3
- 8005432:	7831      	ldrb	r1, [r6, #0]
- 8005434:	9305      	str	r3, [sp, #20]
- 8005436:	f000 fa55 	bl	80058e4 <memchr>
- 800543a:	1c75      	adds	r5, r6, #1
- 800543c:	2800      	cmp	r0, #0
- 800543e:	d11f      	bne.n	8005480 <_svfiprintf_r+0xe8>
- 8005440:	6822      	ldr	r2, [r4, #0]
- 8005442:	06d3      	lsls	r3, r2, #27
- 8005444:	d504      	bpl.n	8005450 <_svfiprintf_r+0xb8>
- 8005446:	2353      	movs	r3, #83	; 0x53
- 8005448:	a904      	add	r1, sp, #16
- 800544a:	185b      	adds	r3, r3, r1
- 800544c:	2120      	movs	r1, #32
- 800544e:	7019      	strb	r1, [r3, #0]
- 8005450:	0713      	lsls	r3, r2, #28
- 8005452:	d504      	bpl.n	800545e <_svfiprintf_r+0xc6>
- 8005454:	2353      	movs	r3, #83	; 0x53
- 8005456:	a904      	add	r1, sp, #16
- 8005458:	185b      	adds	r3, r3, r1
- 800545a:	212b      	movs	r1, #43	; 0x2b
- 800545c:	7019      	strb	r1, [r3, #0]
- 800545e:	7833      	ldrb	r3, [r6, #0]
- 8005460:	2b2a      	cmp	r3, #42	; 0x2a
- 8005462:	d016      	beq.n	8005492 <_svfiprintf_r+0xfa>
- 8005464:	0035      	movs	r5, r6
- 8005466:	2100      	movs	r1, #0
- 8005468:	200a      	movs	r0, #10
- 800546a:	68e3      	ldr	r3, [r4, #12]
- 800546c:	782a      	ldrb	r2, [r5, #0]
- 800546e:	1c6e      	adds	r6, r5, #1
- 8005470:	3a30      	subs	r2, #48	; 0x30
- 8005472:	2a09      	cmp	r2, #9
- 8005474:	d94e      	bls.n	8005514 <_svfiprintf_r+0x17c>
- 8005476:	2900      	cmp	r1, #0
- 8005478:	d111      	bne.n	800549e <_svfiprintf_r+0x106>
- 800547a:	e017      	b.n	80054ac <_svfiprintf_r+0x114>
- 800547c:	3501      	adds	r5, #1
- 800547e:	e7af      	b.n	80053e0 <_svfiprintf_r+0x48>
- 8005480:	9b05      	ldr	r3, [sp, #20]
- 8005482:	6822      	ldr	r2, [r4, #0]
- 8005484:	1ac0      	subs	r0, r0, r3
- 8005486:	2301      	movs	r3, #1
- 8005488:	4083      	lsls	r3, r0
- 800548a:	4313      	orrs	r3, r2
- 800548c:	002e      	movs	r6, r5
- 800548e:	6023      	str	r3, [r4, #0]
- 8005490:	e7cc      	b.n	800542c <_svfiprintf_r+0x94>
- 8005492:	9b07      	ldr	r3, [sp, #28]
- 8005494:	1d19      	adds	r1, r3, #4
- 8005496:	681b      	ldr	r3, [r3, #0]
- 8005498:	9107      	str	r1, [sp, #28]
- 800549a:	2b00      	cmp	r3, #0
- 800549c:	db01      	blt.n	80054a2 <_svfiprintf_r+0x10a>
- 800549e:	930b      	str	r3, [sp, #44]	; 0x2c
- 80054a0:	e004      	b.n	80054ac <_svfiprintf_r+0x114>
- 80054a2:	425b      	negs	r3, r3
- 80054a4:	60e3      	str	r3, [r4, #12]
- 80054a6:	2302      	movs	r3, #2
- 80054a8:	4313      	orrs	r3, r2
- 80054aa:	6023      	str	r3, [r4, #0]
- 80054ac:	782b      	ldrb	r3, [r5, #0]
- 80054ae:	2b2e      	cmp	r3, #46	; 0x2e
- 80054b0:	d10a      	bne.n	80054c8 <_svfiprintf_r+0x130>
- 80054b2:	786b      	ldrb	r3, [r5, #1]
- 80054b4:	2b2a      	cmp	r3, #42	; 0x2a
- 80054b6:	d135      	bne.n	8005524 <_svfiprintf_r+0x18c>
- 80054b8:	9b07      	ldr	r3, [sp, #28]
- 80054ba:	3502      	adds	r5, #2
- 80054bc:	1d1a      	adds	r2, r3, #4
- 80054be:	681b      	ldr	r3, [r3, #0]
- 80054c0:	9207      	str	r2, [sp, #28]
- 80054c2:	2b00      	cmp	r3, #0
- 80054c4:	db2b      	blt.n	800551e <_svfiprintf_r+0x186>
- 80054c6:	9309      	str	r3, [sp, #36]	; 0x24
- 80054c8:	4e2f      	ldr	r6, [pc, #188]	; (8005588 <_svfiprintf_r+0x1f0>)
- 80054ca:	2203      	movs	r2, #3
- 80054cc:	0030      	movs	r0, r6
- 80054ce:	7829      	ldrb	r1, [r5, #0]
- 80054d0:	f000 fa08 	bl	80058e4 <memchr>
- 80054d4:	2800      	cmp	r0, #0
- 80054d6:	d006      	beq.n	80054e6 <_svfiprintf_r+0x14e>
- 80054d8:	2340      	movs	r3, #64	; 0x40
- 80054da:	1b80      	subs	r0, r0, r6
- 80054dc:	4083      	lsls	r3, r0
- 80054de:	6822      	ldr	r2, [r4, #0]
- 80054e0:	3501      	adds	r5, #1
- 80054e2:	4313      	orrs	r3, r2
- 80054e4:	6023      	str	r3, [r4, #0]
- 80054e6:	7829      	ldrb	r1, [r5, #0]
- 80054e8:	2206      	movs	r2, #6
- 80054ea:	4828      	ldr	r0, [pc, #160]	; (800558c <_svfiprintf_r+0x1f4>)
- 80054ec:	1c6e      	adds	r6, r5, #1
- 80054ee:	7621      	strb	r1, [r4, #24]
- 80054f0:	f000 f9f8 	bl	80058e4 <memchr>
- 80054f4:	2800      	cmp	r0, #0
- 80054f6:	d03c      	beq.n	8005572 <_svfiprintf_r+0x1da>
- 80054f8:	4b25      	ldr	r3, [pc, #148]	; (8005590 <_svfiprintf_r+0x1f8>)
- 80054fa:	2b00      	cmp	r3, #0
- 80054fc:	d125      	bne.n	800554a <_svfiprintf_r+0x1b2>
- 80054fe:	2207      	movs	r2, #7
- 8005500:	9b07      	ldr	r3, [sp, #28]
- 8005502:	3307      	adds	r3, #7
- 8005504:	4393      	bics	r3, r2
- 8005506:	3308      	adds	r3, #8
- 8005508:	9307      	str	r3, [sp, #28]
- 800550a:	6963      	ldr	r3, [r4, #20]
- 800550c:	9a04      	ldr	r2, [sp, #16]
- 800550e:	189b      	adds	r3, r3, r2
- 8005510:	6163      	str	r3, [r4, #20]
- 8005512:	e764      	b.n	80053de <_svfiprintf_r+0x46>
- 8005514:	4343      	muls	r3, r0
- 8005516:	0035      	movs	r5, r6
- 8005518:	2101      	movs	r1, #1
- 800551a:	189b      	adds	r3, r3, r2
- 800551c:	e7a6      	b.n	800546c <_svfiprintf_r+0xd4>
- 800551e:	2301      	movs	r3, #1
- 8005520:	425b      	negs	r3, r3
- 8005522:	e7d0      	b.n	80054c6 <_svfiprintf_r+0x12e>
- 8005524:	2300      	movs	r3, #0
- 8005526:	200a      	movs	r0, #10
- 8005528:	001a      	movs	r2, r3
- 800552a:	3501      	adds	r5, #1
- 800552c:	6063      	str	r3, [r4, #4]
- 800552e:	7829      	ldrb	r1, [r5, #0]
- 8005530:	1c6e      	adds	r6, r5, #1
- 8005532:	3930      	subs	r1, #48	; 0x30
- 8005534:	2909      	cmp	r1, #9
- 8005536:	d903      	bls.n	8005540 <_svfiprintf_r+0x1a8>
- 8005538:	2b00      	cmp	r3, #0
- 800553a:	d0c5      	beq.n	80054c8 <_svfiprintf_r+0x130>
- 800553c:	9209      	str	r2, [sp, #36]	; 0x24
- 800553e:	e7c3      	b.n	80054c8 <_svfiprintf_r+0x130>
- 8005540:	4342      	muls	r2, r0
- 8005542:	0035      	movs	r5, r6
- 8005544:	2301      	movs	r3, #1
- 8005546:	1852      	adds	r2, r2, r1
- 8005548:	e7f1      	b.n	800552e <_svfiprintf_r+0x196>
- 800554a:	aa07      	add	r2, sp, #28
- 800554c:	9200      	str	r2, [sp, #0]
- 800554e:	0021      	movs	r1, r4
- 8005550:	003a      	movs	r2, r7
- 8005552:	4b10      	ldr	r3, [pc, #64]	; (8005594 <_svfiprintf_r+0x1fc>)
- 8005554:	9803      	ldr	r0, [sp, #12]
- 8005556:	e000      	b.n	800555a <_svfiprintf_r+0x1c2>
- 8005558:	bf00      	nop
- 800555a:	9004      	str	r0, [sp, #16]
- 800555c:	9b04      	ldr	r3, [sp, #16]
- 800555e:	3301      	adds	r3, #1
- 8005560:	d1d3      	bne.n	800550a <_svfiprintf_r+0x172>
- 8005562:	89bb      	ldrh	r3, [r7, #12]
- 8005564:	980d      	ldr	r0, [sp, #52]	; 0x34
- 8005566:	065b      	lsls	r3, r3, #25
- 8005568:	d400      	bmi.n	800556c <_svfiprintf_r+0x1d4>
- 800556a:	e72c      	b.n	80053c6 <_svfiprintf_r+0x2e>
- 800556c:	2001      	movs	r0, #1
- 800556e:	4240      	negs	r0, r0
- 8005570:	e729      	b.n	80053c6 <_svfiprintf_r+0x2e>
- 8005572:	aa07      	add	r2, sp, #28
- 8005574:	9200      	str	r2, [sp, #0]
- 8005576:	0021      	movs	r1, r4
- 8005578:	003a      	movs	r2, r7
- 800557a:	4b06      	ldr	r3, [pc, #24]	; (8005594 <_svfiprintf_r+0x1fc>)
- 800557c:	9803      	ldr	r0, [sp, #12]
- 800557e:	f000 f87b 	bl	8005678 <_printf_i>
- 8005582:	e7ea      	b.n	800555a <_svfiprintf_r+0x1c2>
- 8005584:	08005a44 	.word	0x08005a44
- 8005588:	08005a4a 	.word	0x08005a4a
- 800558c:	08005a4e 	.word	0x08005a4e
- 8005590:	00000000 	.word	0x00000000
- 8005594:	080052d5 	.word	0x080052d5
-
-08005598 <_printf_common>:
- 8005598:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
- 800559a:	0016      	movs	r6, r2
- 800559c:	9301      	str	r3, [sp, #4]
- 800559e:	688a      	ldr	r2, [r1, #8]
- 80055a0:	690b      	ldr	r3, [r1, #16]
- 80055a2:	000c      	movs	r4, r1
- 80055a4:	9000      	str	r0, [sp, #0]
- 80055a6:	4293      	cmp	r3, r2
- 80055a8:	da00      	bge.n	80055ac <_printf_common+0x14>
- 80055aa:	0013      	movs	r3, r2
- 80055ac:	0022      	movs	r2, r4
- 80055ae:	6033      	str	r3, [r6, #0]
- 80055b0:	3243      	adds	r2, #67	; 0x43
- 80055b2:	7812      	ldrb	r2, [r2, #0]
- 80055b4:	2a00      	cmp	r2, #0
- 80055b6:	d001      	beq.n	80055bc <_printf_common+0x24>
- 80055b8:	3301      	adds	r3, #1
- 80055ba:	6033      	str	r3, [r6, #0]
- 80055bc:	6823      	ldr	r3, [r4, #0]
- 80055be:	069b      	lsls	r3, r3, #26
- 80055c0:	d502      	bpl.n	80055c8 <_printf_common+0x30>
- 80055c2:	6833      	ldr	r3, [r6, #0]
- 80055c4:	3302      	adds	r3, #2
- 80055c6:	6033      	str	r3, [r6, #0]
- 80055c8:	6822      	ldr	r2, [r4, #0]
- 80055ca:	2306      	movs	r3, #6
- 80055cc:	0015      	movs	r5, r2
- 80055ce:	401d      	ands	r5, r3
- 80055d0:	421a      	tst	r2, r3
- 80055d2:	d027      	beq.n	8005624 <_printf_common+0x8c>
- 80055d4:	0023      	movs	r3, r4
- 80055d6:	3343      	adds	r3, #67	; 0x43
- 80055d8:	781b      	ldrb	r3, [r3, #0]
- 80055da:	1e5a      	subs	r2, r3, #1
- 80055dc:	4193      	sbcs	r3, r2
- 80055de:	6822      	ldr	r2, [r4, #0]
- 80055e0:	0692      	lsls	r2, r2, #26
- 80055e2:	d430      	bmi.n	8005646 <_printf_common+0xae>
- 80055e4:	0022      	movs	r2, r4
- 80055e6:	9901      	ldr	r1, [sp, #4]
- 80055e8:	9800      	ldr	r0, [sp, #0]
- 80055ea:	9d08      	ldr	r5, [sp, #32]
- 80055ec:	3243      	adds	r2, #67	; 0x43
- 80055ee:	47a8      	blx	r5
- 80055f0:	3001      	adds	r0, #1
- 80055f2:	d025      	beq.n	8005640 <_printf_common+0xa8>
- 80055f4:	2206      	movs	r2, #6
- 80055f6:	6823      	ldr	r3, [r4, #0]
- 80055f8:	2500      	movs	r5, #0
- 80055fa:	4013      	ands	r3, r2
- 80055fc:	2b04      	cmp	r3, #4
- 80055fe:	d105      	bne.n	800560c <_printf_common+0x74>
- 8005600:	6833      	ldr	r3, [r6, #0]
- 8005602:	68e5      	ldr	r5, [r4, #12]
- 8005604:	1aed      	subs	r5, r5, r3
- 8005606:	43eb      	mvns	r3, r5
- 8005608:	17db      	asrs	r3, r3, #31
- 800560a:	401d      	ands	r5, r3
- 800560c:	68a3      	ldr	r3, [r4, #8]
- 800560e:	6922      	ldr	r2, [r4, #16]
- 8005610:	4293      	cmp	r3, r2
- 8005612:	dd01      	ble.n	8005618 <_printf_common+0x80>
- 8005614:	1a9b      	subs	r3, r3, r2
- 8005616:	18ed      	adds	r5, r5, r3
- 8005618:	2600      	movs	r6, #0
- 800561a:	42b5      	cmp	r5, r6
- 800561c:	d120      	bne.n	8005660 <_printf_common+0xc8>
- 800561e:	2000      	movs	r0, #0
- 8005620:	e010      	b.n	8005644 <_printf_common+0xac>
- 8005622:	3501      	adds	r5, #1
- 8005624:	68e3      	ldr	r3, [r4, #12]
- 8005626:	6832      	ldr	r2, [r6, #0]
- 8005628:	1a9b      	subs	r3, r3, r2
- 800562a:	42ab      	cmp	r3, r5
- 800562c:	ddd2      	ble.n	80055d4 <_printf_common+0x3c>
- 800562e:	0022      	movs	r2, r4
- 8005630:	2301      	movs	r3, #1
- 8005632:	9901      	ldr	r1, [sp, #4]
- 8005634:	9800      	ldr	r0, [sp, #0]
- 8005636:	9f08      	ldr	r7, [sp, #32]
- 8005638:	3219      	adds	r2, #25
- 800563a:	47b8      	blx	r7
- 800563c:	3001      	adds	r0, #1
- 800563e:	d1f0      	bne.n	8005622 <_printf_common+0x8a>
- 8005640:	2001      	movs	r0, #1
- 8005642:	4240      	negs	r0, r0
- 8005644:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
- 8005646:	2030      	movs	r0, #48	; 0x30
- 8005648:	18e1      	adds	r1, r4, r3
- 800564a:	3143      	adds	r1, #67	; 0x43
- 800564c:	7008      	strb	r0, [r1, #0]
- 800564e:	0021      	movs	r1, r4
- 8005650:	1c5a      	adds	r2, r3, #1
- 8005652:	3145      	adds	r1, #69	; 0x45
- 8005654:	7809      	ldrb	r1, [r1, #0]
- 8005656:	18a2      	adds	r2, r4, r2
- 8005658:	3243      	adds	r2, #67	; 0x43
- 800565a:	3302      	adds	r3, #2
- 800565c:	7011      	strb	r1, [r2, #0]
- 800565e:	e7c1      	b.n	80055e4 <_printf_common+0x4c>
- 8005660:	0022      	movs	r2, r4
- 8005662:	2301      	movs	r3, #1
- 8005664:	9901      	ldr	r1, [sp, #4]
- 8005666:	9800      	ldr	r0, [sp, #0]
- 8005668:	9f08      	ldr	r7, [sp, #32]
- 800566a:	321a      	adds	r2, #26
- 800566c:	47b8      	blx	r7
- 800566e:	3001      	adds	r0, #1
- 8005670:	d0e6      	beq.n	8005640 <_printf_common+0xa8>
- 8005672:	3601      	adds	r6, #1
- 8005674:	e7d1      	b.n	800561a <_printf_common+0x82>
+08004870 <_printf_common>:
+ 8004870:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+ 8004872:	0016      	movs	r6, r2
+ 8004874:	9301      	str	r3, [sp, #4]
+ 8004876:	688a      	ldr	r2, [r1, #8]
+ 8004878:	690b      	ldr	r3, [r1, #16]
+ 800487a:	000c      	movs	r4, r1
+ 800487c:	9000      	str	r0, [sp, #0]
+ 800487e:	4293      	cmp	r3, r2
+ 8004880:	da00      	bge.n	8004884 <_printf_common+0x14>
+ 8004882:	0013      	movs	r3, r2
+ 8004884:	0022      	movs	r2, r4
+ 8004886:	6033      	str	r3, [r6, #0]
+ 8004888:	3243      	adds	r2, #67	; 0x43
+ 800488a:	7812      	ldrb	r2, [r2, #0]
+ 800488c:	2a00      	cmp	r2, #0
+ 800488e:	d001      	beq.n	8004894 <_printf_common+0x24>
+ 8004890:	3301      	adds	r3, #1
+ 8004892:	6033      	str	r3, [r6, #0]
+ 8004894:	6823      	ldr	r3, [r4, #0]
+ 8004896:	069b      	lsls	r3, r3, #26
+ 8004898:	d502      	bpl.n	80048a0 <_printf_common+0x30>
+ 800489a:	6833      	ldr	r3, [r6, #0]
+ 800489c:	3302      	adds	r3, #2
+ 800489e:	6033      	str	r3, [r6, #0]
+ 80048a0:	6822      	ldr	r2, [r4, #0]
+ 80048a2:	2306      	movs	r3, #6
+ 80048a4:	0015      	movs	r5, r2
+ 80048a6:	401d      	ands	r5, r3
+ 80048a8:	421a      	tst	r2, r3
+ 80048aa:	d027      	beq.n	80048fc <_printf_common+0x8c>
+ 80048ac:	0023      	movs	r3, r4
+ 80048ae:	3343      	adds	r3, #67	; 0x43
+ 80048b0:	781b      	ldrb	r3, [r3, #0]
+ 80048b2:	1e5a      	subs	r2, r3, #1
+ 80048b4:	4193      	sbcs	r3, r2
+ 80048b6:	6822      	ldr	r2, [r4, #0]
+ 80048b8:	0692      	lsls	r2, r2, #26
+ 80048ba:	d430      	bmi.n	800491e <_printf_common+0xae>
+ 80048bc:	0022      	movs	r2, r4
+ 80048be:	9901      	ldr	r1, [sp, #4]
+ 80048c0:	9800      	ldr	r0, [sp, #0]
+ 80048c2:	9d08      	ldr	r5, [sp, #32]
+ 80048c4:	3243      	adds	r2, #67	; 0x43
+ 80048c6:	47a8      	blx	r5
+ 80048c8:	3001      	adds	r0, #1
+ 80048ca:	d025      	beq.n	8004918 <_printf_common+0xa8>
+ 80048cc:	2206      	movs	r2, #6
+ 80048ce:	6823      	ldr	r3, [r4, #0]
+ 80048d0:	2500      	movs	r5, #0
+ 80048d2:	4013      	ands	r3, r2
+ 80048d4:	2b04      	cmp	r3, #4
+ 80048d6:	d105      	bne.n	80048e4 <_printf_common+0x74>
+ 80048d8:	6833      	ldr	r3, [r6, #0]
+ 80048da:	68e5      	ldr	r5, [r4, #12]
+ 80048dc:	1aed      	subs	r5, r5, r3
+ 80048de:	43eb      	mvns	r3, r5
+ 80048e0:	17db      	asrs	r3, r3, #31
+ 80048e2:	401d      	ands	r5, r3
+ 80048e4:	68a3      	ldr	r3, [r4, #8]
+ 80048e6:	6922      	ldr	r2, [r4, #16]
+ 80048e8:	4293      	cmp	r3, r2
+ 80048ea:	dd01      	ble.n	80048f0 <_printf_common+0x80>
+ 80048ec:	1a9b      	subs	r3, r3, r2
+ 80048ee:	18ed      	adds	r5, r5, r3
+ 80048f0:	2600      	movs	r6, #0
+ 80048f2:	42b5      	cmp	r5, r6
+ 80048f4:	d120      	bne.n	8004938 <_printf_common+0xc8>
+ 80048f6:	2000      	movs	r0, #0
+ 80048f8:	e010      	b.n	800491c <_printf_common+0xac>
+ 80048fa:	3501      	adds	r5, #1
+ 80048fc:	68e3      	ldr	r3, [r4, #12]
+ 80048fe:	6832      	ldr	r2, [r6, #0]
+ 8004900:	1a9b      	subs	r3, r3, r2
+ 8004902:	42ab      	cmp	r3, r5
+ 8004904:	ddd2      	ble.n	80048ac <_printf_common+0x3c>
+ 8004906:	0022      	movs	r2, r4
+ 8004908:	2301      	movs	r3, #1
+ 800490a:	9901      	ldr	r1, [sp, #4]
+ 800490c:	9800      	ldr	r0, [sp, #0]
+ 800490e:	9f08      	ldr	r7, [sp, #32]
+ 8004910:	3219      	adds	r2, #25
+ 8004912:	47b8      	blx	r7
+ 8004914:	3001      	adds	r0, #1
+ 8004916:	d1f0      	bne.n	80048fa <_printf_common+0x8a>
+ 8004918:	2001      	movs	r0, #1
+ 800491a:	4240      	negs	r0, r0
+ 800491c:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+ 800491e:	2030      	movs	r0, #48	; 0x30
+ 8004920:	18e1      	adds	r1, r4, r3
+ 8004922:	3143      	adds	r1, #67	; 0x43
+ 8004924:	7008      	strb	r0, [r1, #0]
+ 8004926:	0021      	movs	r1, r4
+ 8004928:	1c5a      	adds	r2, r3, #1
+ 800492a:	3145      	adds	r1, #69	; 0x45
+ 800492c:	7809      	ldrb	r1, [r1, #0]
+ 800492e:	18a2      	adds	r2, r4, r2
+ 8004930:	3243      	adds	r2, #67	; 0x43
+ 8004932:	3302      	adds	r3, #2
+ 8004934:	7011      	strb	r1, [r2, #0]
+ 8004936:	e7c1      	b.n	80048bc <_printf_common+0x4c>
+ 8004938:	0022      	movs	r2, r4
+ 800493a:	2301      	movs	r3, #1
+ 800493c:	9901      	ldr	r1, [sp, #4]
+ 800493e:	9800      	ldr	r0, [sp, #0]
+ 8004940:	9f08      	ldr	r7, [sp, #32]
+ 8004942:	321a      	adds	r2, #26
+ 8004944:	47b8      	blx	r7
+ 8004946:	3001      	adds	r0, #1
+ 8004948:	d0e6      	beq.n	8004918 <_printf_common+0xa8>
+ 800494a:	3601      	adds	r6, #1
+ 800494c:	e7d1      	b.n	80048f2 <_printf_common+0x82>
 	...
 
-08005678 <_printf_i>:
- 8005678:	b5f0      	push	{r4, r5, r6, r7, lr}
- 800567a:	b08b      	sub	sp, #44	; 0x2c
- 800567c:	9206      	str	r2, [sp, #24]
- 800567e:	000a      	movs	r2, r1
- 8005680:	3243      	adds	r2, #67	; 0x43
- 8005682:	9307      	str	r3, [sp, #28]
- 8005684:	9005      	str	r0, [sp, #20]
- 8005686:	9204      	str	r2, [sp, #16]
- 8005688:	7e0a      	ldrb	r2, [r1, #24]
- 800568a:	000c      	movs	r4, r1
- 800568c:	9b10      	ldr	r3, [sp, #64]	; 0x40
- 800568e:	2a78      	cmp	r2, #120	; 0x78
- 8005690:	d809      	bhi.n	80056a6 <_printf_i+0x2e>
- 8005692:	2a62      	cmp	r2, #98	; 0x62
- 8005694:	d80b      	bhi.n	80056ae <_printf_i+0x36>
- 8005696:	2a00      	cmp	r2, #0
- 8005698:	d100      	bne.n	800569c <_printf_i+0x24>
- 800569a:	e0be      	b.n	800581a <_printf_i+0x1a2>
- 800569c:	497c      	ldr	r1, [pc, #496]	; (8005890 <_printf_i+0x218>)
- 800569e:	9103      	str	r1, [sp, #12]
- 80056a0:	2a58      	cmp	r2, #88	; 0x58
- 80056a2:	d100      	bne.n	80056a6 <_printf_i+0x2e>
- 80056a4:	e093      	b.n	80057ce <_printf_i+0x156>
- 80056a6:	0026      	movs	r6, r4
- 80056a8:	3642      	adds	r6, #66	; 0x42
- 80056aa:	7032      	strb	r2, [r6, #0]
- 80056ac:	e022      	b.n	80056f4 <_printf_i+0x7c>
- 80056ae:	0010      	movs	r0, r2
- 80056b0:	3863      	subs	r0, #99	; 0x63
- 80056b2:	2815      	cmp	r0, #21
- 80056b4:	d8f7      	bhi.n	80056a6 <_printf_i+0x2e>
- 80056b6:	f7fa fd2f 	bl	8000118 <__gnu_thumb1_case_shi>
- 80056ba:	0016      	.short	0x0016
- 80056bc:	fff6001f 	.word	0xfff6001f
- 80056c0:	fff6fff6 	.word	0xfff6fff6
- 80056c4:	001ffff6 	.word	0x001ffff6
- 80056c8:	fff6fff6 	.word	0xfff6fff6
- 80056cc:	fff6fff6 	.word	0xfff6fff6
- 80056d0:	003600a3 	.word	0x003600a3
- 80056d4:	fff60083 	.word	0xfff60083
- 80056d8:	00b4fff6 	.word	0x00b4fff6
- 80056dc:	0036fff6 	.word	0x0036fff6
- 80056e0:	fff6fff6 	.word	0xfff6fff6
- 80056e4:	0087      	.short	0x0087
- 80056e6:	0026      	movs	r6, r4
- 80056e8:	681a      	ldr	r2, [r3, #0]
- 80056ea:	3642      	adds	r6, #66	; 0x42
- 80056ec:	1d11      	adds	r1, r2, #4
- 80056ee:	6019      	str	r1, [r3, #0]
- 80056f0:	6813      	ldr	r3, [r2, #0]
- 80056f2:	7033      	strb	r3, [r6, #0]
- 80056f4:	2301      	movs	r3, #1
- 80056f6:	e0a2      	b.n	800583e <_printf_i+0x1c6>
- 80056f8:	6818      	ldr	r0, [r3, #0]
- 80056fa:	6809      	ldr	r1, [r1, #0]
- 80056fc:	1d02      	adds	r2, r0, #4
- 80056fe:	060d      	lsls	r5, r1, #24
- 8005700:	d50b      	bpl.n	800571a <_printf_i+0xa2>
- 8005702:	6805      	ldr	r5, [r0, #0]
- 8005704:	601a      	str	r2, [r3, #0]
- 8005706:	2d00      	cmp	r5, #0
- 8005708:	da03      	bge.n	8005712 <_printf_i+0x9a>
- 800570a:	232d      	movs	r3, #45	; 0x2d
- 800570c:	9a04      	ldr	r2, [sp, #16]
- 800570e:	426d      	negs	r5, r5
- 8005710:	7013      	strb	r3, [r2, #0]
- 8005712:	4b5f      	ldr	r3, [pc, #380]	; (8005890 <_printf_i+0x218>)
- 8005714:	270a      	movs	r7, #10
- 8005716:	9303      	str	r3, [sp, #12]
- 8005718:	e01b      	b.n	8005752 <_printf_i+0xda>
- 800571a:	6805      	ldr	r5, [r0, #0]
- 800571c:	601a      	str	r2, [r3, #0]
- 800571e:	0649      	lsls	r1, r1, #25
- 8005720:	d5f1      	bpl.n	8005706 <_printf_i+0x8e>
- 8005722:	b22d      	sxth	r5, r5
- 8005724:	e7ef      	b.n	8005706 <_printf_i+0x8e>
- 8005726:	680d      	ldr	r5, [r1, #0]
- 8005728:	6819      	ldr	r1, [r3, #0]
- 800572a:	1d08      	adds	r0, r1, #4
- 800572c:	6018      	str	r0, [r3, #0]
- 800572e:	062e      	lsls	r6, r5, #24
- 8005730:	d501      	bpl.n	8005736 <_printf_i+0xbe>
- 8005732:	680d      	ldr	r5, [r1, #0]
- 8005734:	e003      	b.n	800573e <_printf_i+0xc6>
- 8005736:	066d      	lsls	r5, r5, #25
- 8005738:	d5fb      	bpl.n	8005732 <_printf_i+0xba>
- 800573a:	680d      	ldr	r5, [r1, #0]
- 800573c:	b2ad      	uxth	r5, r5
- 800573e:	4b54      	ldr	r3, [pc, #336]	; (8005890 <_printf_i+0x218>)
- 8005740:	2708      	movs	r7, #8
- 8005742:	9303      	str	r3, [sp, #12]
- 8005744:	2a6f      	cmp	r2, #111	; 0x6f
- 8005746:	d000      	beq.n	800574a <_printf_i+0xd2>
- 8005748:	3702      	adds	r7, #2
- 800574a:	0023      	movs	r3, r4
- 800574c:	2200      	movs	r2, #0
- 800574e:	3343      	adds	r3, #67	; 0x43
- 8005750:	701a      	strb	r2, [r3, #0]
- 8005752:	6863      	ldr	r3, [r4, #4]
- 8005754:	60a3      	str	r3, [r4, #8]
- 8005756:	2b00      	cmp	r3, #0
- 8005758:	db03      	blt.n	8005762 <_printf_i+0xea>
- 800575a:	2104      	movs	r1, #4
- 800575c:	6822      	ldr	r2, [r4, #0]
- 800575e:	438a      	bics	r2, r1
- 8005760:	6022      	str	r2, [r4, #0]
- 8005762:	2d00      	cmp	r5, #0
- 8005764:	d102      	bne.n	800576c <_printf_i+0xf4>
- 8005766:	9e04      	ldr	r6, [sp, #16]
- 8005768:	2b00      	cmp	r3, #0
- 800576a:	d00c      	beq.n	8005786 <_printf_i+0x10e>
- 800576c:	9e04      	ldr	r6, [sp, #16]
- 800576e:	0028      	movs	r0, r5
- 8005770:	0039      	movs	r1, r7
- 8005772:	f7fa fd61 	bl	8000238 <__aeabi_uidivmod>
- 8005776:	9b03      	ldr	r3, [sp, #12]
- 8005778:	3e01      	subs	r6, #1
- 800577a:	5c5b      	ldrb	r3, [r3, r1]
- 800577c:	7033      	strb	r3, [r6, #0]
- 800577e:	002b      	movs	r3, r5
- 8005780:	0005      	movs	r5, r0
- 8005782:	429f      	cmp	r7, r3
- 8005784:	d9f3      	bls.n	800576e <_printf_i+0xf6>
- 8005786:	2f08      	cmp	r7, #8
- 8005788:	d109      	bne.n	800579e <_printf_i+0x126>
- 800578a:	6823      	ldr	r3, [r4, #0]
- 800578c:	07db      	lsls	r3, r3, #31
- 800578e:	d506      	bpl.n	800579e <_printf_i+0x126>
- 8005790:	6862      	ldr	r2, [r4, #4]
- 8005792:	6923      	ldr	r3, [r4, #16]
- 8005794:	429a      	cmp	r2, r3
- 8005796:	dc02      	bgt.n	800579e <_printf_i+0x126>
- 8005798:	2330      	movs	r3, #48	; 0x30
- 800579a:	3e01      	subs	r6, #1
- 800579c:	7033      	strb	r3, [r6, #0]
- 800579e:	9b04      	ldr	r3, [sp, #16]
- 80057a0:	1b9b      	subs	r3, r3, r6
- 80057a2:	6123      	str	r3, [r4, #16]
- 80057a4:	9b07      	ldr	r3, [sp, #28]
- 80057a6:	0021      	movs	r1, r4
- 80057a8:	9300      	str	r3, [sp, #0]
- 80057aa:	9805      	ldr	r0, [sp, #20]
- 80057ac:	9b06      	ldr	r3, [sp, #24]
- 80057ae:	aa09      	add	r2, sp, #36	; 0x24
- 80057b0:	f7ff fef2 	bl	8005598 <_printf_common>
- 80057b4:	3001      	adds	r0, #1
- 80057b6:	d147      	bne.n	8005848 <_printf_i+0x1d0>
- 80057b8:	2001      	movs	r0, #1
- 80057ba:	4240      	negs	r0, r0
- 80057bc:	b00b      	add	sp, #44	; 0x2c
- 80057be:	bdf0      	pop	{r4, r5, r6, r7, pc}
- 80057c0:	2220      	movs	r2, #32
- 80057c2:	6809      	ldr	r1, [r1, #0]
- 80057c4:	430a      	orrs	r2, r1
- 80057c6:	6022      	str	r2, [r4, #0]
- 80057c8:	2278      	movs	r2, #120	; 0x78
- 80057ca:	4932      	ldr	r1, [pc, #200]	; (8005894 <_printf_i+0x21c>)
- 80057cc:	9103      	str	r1, [sp, #12]
- 80057ce:	0021      	movs	r1, r4
- 80057d0:	3145      	adds	r1, #69	; 0x45
- 80057d2:	700a      	strb	r2, [r1, #0]
- 80057d4:	6819      	ldr	r1, [r3, #0]
- 80057d6:	6822      	ldr	r2, [r4, #0]
- 80057d8:	c920      	ldmia	r1!, {r5}
- 80057da:	0610      	lsls	r0, r2, #24
- 80057dc:	d402      	bmi.n	80057e4 <_printf_i+0x16c>
- 80057de:	0650      	lsls	r0, r2, #25
- 80057e0:	d500      	bpl.n	80057e4 <_printf_i+0x16c>
- 80057e2:	b2ad      	uxth	r5, r5
- 80057e4:	6019      	str	r1, [r3, #0]
- 80057e6:	07d3      	lsls	r3, r2, #31
- 80057e8:	d502      	bpl.n	80057f0 <_printf_i+0x178>
- 80057ea:	2320      	movs	r3, #32
- 80057ec:	4313      	orrs	r3, r2
- 80057ee:	6023      	str	r3, [r4, #0]
- 80057f0:	2710      	movs	r7, #16
- 80057f2:	2d00      	cmp	r5, #0
- 80057f4:	d1a9      	bne.n	800574a <_printf_i+0xd2>
- 80057f6:	2220      	movs	r2, #32
- 80057f8:	6823      	ldr	r3, [r4, #0]
- 80057fa:	4393      	bics	r3, r2
- 80057fc:	6023      	str	r3, [r4, #0]
- 80057fe:	e7a4      	b.n	800574a <_printf_i+0xd2>
- 8005800:	681a      	ldr	r2, [r3, #0]
- 8005802:	680d      	ldr	r5, [r1, #0]
- 8005804:	1d10      	adds	r0, r2, #4
- 8005806:	6949      	ldr	r1, [r1, #20]
- 8005808:	6018      	str	r0, [r3, #0]
- 800580a:	6813      	ldr	r3, [r2, #0]
- 800580c:	062e      	lsls	r6, r5, #24
- 800580e:	d501      	bpl.n	8005814 <_printf_i+0x19c>
- 8005810:	6019      	str	r1, [r3, #0]
- 8005812:	e002      	b.n	800581a <_printf_i+0x1a2>
- 8005814:	066d      	lsls	r5, r5, #25
- 8005816:	d5fb      	bpl.n	8005810 <_printf_i+0x198>
- 8005818:	8019      	strh	r1, [r3, #0]
- 800581a:	2300      	movs	r3, #0
- 800581c:	9e04      	ldr	r6, [sp, #16]
- 800581e:	6123      	str	r3, [r4, #16]
- 8005820:	e7c0      	b.n	80057a4 <_printf_i+0x12c>
- 8005822:	681a      	ldr	r2, [r3, #0]
- 8005824:	1d11      	adds	r1, r2, #4
- 8005826:	6019      	str	r1, [r3, #0]
- 8005828:	6816      	ldr	r6, [r2, #0]
- 800582a:	2100      	movs	r1, #0
- 800582c:	0030      	movs	r0, r6
- 800582e:	6862      	ldr	r2, [r4, #4]
- 8005830:	f000 f858 	bl	80058e4 <memchr>
- 8005834:	2800      	cmp	r0, #0
- 8005836:	d001      	beq.n	800583c <_printf_i+0x1c4>
- 8005838:	1b80      	subs	r0, r0, r6
- 800583a:	6060      	str	r0, [r4, #4]
- 800583c:	6863      	ldr	r3, [r4, #4]
- 800583e:	6123      	str	r3, [r4, #16]
- 8005840:	2300      	movs	r3, #0
- 8005842:	9a04      	ldr	r2, [sp, #16]
- 8005844:	7013      	strb	r3, [r2, #0]
- 8005846:	e7ad      	b.n	80057a4 <_printf_i+0x12c>
- 8005848:	0032      	movs	r2, r6
- 800584a:	6923      	ldr	r3, [r4, #16]
- 800584c:	9906      	ldr	r1, [sp, #24]
- 800584e:	9805      	ldr	r0, [sp, #20]
- 8005850:	9d07      	ldr	r5, [sp, #28]
- 8005852:	47a8      	blx	r5
- 8005854:	3001      	adds	r0, #1
- 8005856:	d0af      	beq.n	80057b8 <_printf_i+0x140>
- 8005858:	6823      	ldr	r3, [r4, #0]
- 800585a:	079b      	lsls	r3, r3, #30
- 800585c:	d415      	bmi.n	800588a <_printf_i+0x212>
- 800585e:	9b09      	ldr	r3, [sp, #36]	; 0x24
- 8005860:	68e0      	ldr	r0, [r4, #12]
- 8005862:	4298      	cmp	r0, r3
- 8005864:	daaa      	bge.n	80057bc <_printf_i+0x144>
- 8005866:	0018      	movs	r0, r3
- 8005868:	e7a8      	b.n	80057bc <_printf_i+0x144>
- 800586a:	0022      	movs	r2, r4
- 800586c:	2301      	movs	r3, #1
- 800586e:	9906      	ldr	r1, [sp, #24]
- 8005870:	9805      	ldr	r0, [sp, #20]
- 8005872:	9e07      	ldr	r6, [sp, #28]
- 8005874:	3219      	adds	r2, #25
- 8005876:	47b0      	blx	r6
- 8005878:	3001      	adds	r0, #1
- 800587a:	d09d      	beq.n	80057b8 <_printf_i+0x140>
- 800587c:	3501      	adds	r5, #1
- 800587e:	68e3      	ldr	r3, [r4, #12]
- 8005880:	9a09      	ldr	r2, [sp, #36]	; 0x24
- 8005882:	1a9b      	subs	r3, r3, r2
- 8005884:	42ab      	cmp	r3, r5
- 8005886:	dcf0      	bgt.n	800586a <_printf_i+0x1f2>
- 8005888:	e7e9      	b.n	800585e <_printf_i+0x1e6>
- 800588a:	2500      	movs	r5, #0
- 800588c:	e7f7      	b.n	800587e <_printf_i+0x206>
- 800588e:	46c0      	nop			; (mov r8, r8)
- 8005890:	08005a55 	.word	0x08005a55
- 8005894:	08005a66 	.word	0x08005a66
+08004950 <_printf_i>:
+ 8004950:	b5f0      	push	{r4, r5, r6, r7, lr}
+ 8004952:	b08b      	sub	sp, #44	; 0x2c
+ 8004954:	9206      	str	r2, [sp, #24]
+ 8004956:	000a      	movs	r2, r1
+ 8004958:	3243      	adds	r2, #67	; 0x43
+ 800495a:	9307      	str	r3, [sp, #28]
+ 800495c:	9005      	str	r0, [sp, #20]
+ 800495e:	9204      	str	r2, [sp, #16]
+ 8004960:	7e0a      	ldrb	r2, [r1, #24]
+ 8004962:	000c      	movs	r4, r1
+ 8004964:	9b10      	ldr	r3, [sp, #64]	; 0x40
+ 8004966:	2a78      	cmp	r2, #120	; 0x78
+ 8004968:	d809      	bhi.n	800497e <_printf_i+0x2e>
+ 800496a:	2a62      	cmp	r2, #98	; 0x62
+ 800496c:	d80b      	bhi.n	8004986 <_printf_i+0x36>
+ 800496e:	2a00      	cmp	r2, #0
+ 8004970:	d100      	bne.n	8004974 <_printf_i+0x24>
+ 8004972:	e0be      	b.n	8004af2 <_printf_i+0x1a2>
+ 8004974:	497c      	ldr	r1, [pc, #496]	; (8004b68 <_printf_i+0x218>)
+ 8004976:	9103      	str	r1, [sp, #12]
+ 8004978:	2a58      	cmp	r2, #88	; 0x58
+ 800497a:	d100      	bne.n	800497e <_printf_i+0x2e>
+ 800497c:	e093      	b.n	8004aa6 <_printf_i+0x156>
+ 800497e:	0026      	movs	r6, r4
+ 8004980:	3642      	adds	r6, #66	; 0x42
+ 8004982:	7032      	strb	r2, [r6, #0]
+ 8004984:	e022      	b.n	80049cc <_printf_i+0x7c>
+ 8004986:	0010      	movs	r0, r2
+ 8004988:	3863      	subs	r0, #99	; 0x63
+ 800498a:	2815      	cmp	r0, #21
+ 800498c:	d8f7      	bhi.n	800497e <_printf_i+0x2e>
+ 800498e:	f7fb fbc3 	bl	8000118 <__gnu_thumb1_case_shi>
+ 8004992:	0016      	.short	0x0016
+ 8004994:	fff6001f 	.word	0xfff6001f
+ 8004998:	fff6fff6 	.word	0xfff6fff6
+ 800499c:	001ffff6 	.word	0x001ffff6
+ 80049a0:	fff6fff6 	.word	0xfff6fff6
+ 80049a4:	fff6fff6 	.word	0xfff6fff6
+ 80049a8:	003600a3 	.word	0x003600a3
+ 80049ac:	fff60083 	.word	0xfff60083
+ 80049b0:	00b4fff6 	.word	0x00b4fff6
+ 80049b4:	0036fff6 	.word	0x0036fff6
+ 80049b8:	fff6fff6 	.word	0xfff6fff6
+ 80049bc:	0087      	.short	0x0087
+ 80049be:	0026      	movs	r6, r4
+ 80049c0:	681a      	ldr	r2, [r3, #0]
+ 80049c2:	3642      	adds	r6, #66	; 0x42
+ 80049c4:	1d11      	adds	r1, r2, #4
+ 80049c6:	6019      	str	r1, [r3, #0]
+ 80049c8:	6813      	ldr	r3, [r2, #0]
+ 80049ca:	7033      	strb	r3, [r6, #0]
+ 80049cc:	2301      	movs	r3, #1
+ 80049ce:	e0a2      	b.n	8004b16 <_printf_i+0x1c6>
+ 80049d0:	6818      	ldr	r0, [r3, #0]
+ 80049d2:	6809      	ldr	r1, [r1, #0]
+ 80049d4:	1d02      	adds	r2, r0, #4
+ 80049d6:	060d      	lsls	r5, r1, #24
+ 80049d8:	d50b      	bpl.n	80049f2 <_printf_i+0xa2>
+ 80049da:	6805      	ldr	r5, [r0, #0]
+ 80049dc:	601a      	str	r2, [r3, #0]
+ 80049de:	2d00      	cmp	r5, #0
+ 80049e0:	da03      	bge.n	80049ea <_printf_i+0x9a>
+ 80049e2:	232d      	movs	r3, #45	; 0x2d
+ 80049e4:	9a04      	ldr	r2, [sp, #16]
+ 80049e6:	426d      	negs	r5, r5
+ 80049e8:	7013      	strb	r3, [r2, #0]
+ 80049ea:	4b5f      	ldr	r3, [pc, #380]	; (8004b68 <_printf_i+0x218>)
+ 80049ec:	270a      	movs	r7, #10
+ 80049ee:	9303      	str	r3, [sp, #12]
+ 80049f0:	e01b      	b.n	8004a2a <_printf_i+0xda>
+ 80049f2:	6805      	ldr	r5, [r0, #0]
+ 80049f4:	601a      	str	r2, [r3, #0]
+ 80049f6:	0649      	lsls	r1, r1, #25
+ 80049f8:	d5f1      	bpl.n	80049de <_printf_i+0x8e>
+ 80049fa:	b22d      	sxth	r5, r5
+ 80049fc:	e7ef      	b.n	80049de <_printf_i+0x8e>
+ 80049fe:	680d      	ldr	r5, [r1, #0]
+ 8004a00:	6819      	ldr	r1, [r3, #0]
+ 8004a02:	1d08      	adds	r0, r1, #4
+ 8004a04:	6018      	str	r0, [r3, #0]
+ 8004a06:	062e      	lsls	r6, r5, #24
+ 8004a08:	d501      	bpl.n	8004a0e <_printf_i+0xbe>
+ 8004a0a:	680d      	ldr	r5, [r1, #0]
+ 8004a0c:	e003      	b.n	8004a16 <_printf_i+0xc6>
+ 8004a0e:	066d      	lsls	r5, r5, #25
+ 8004a10:	d5fb      	bpl.n	8004a0a <_printf_i+0xba>
+ 8004a12:	680d      	ldr	r5, [r1, #0]
+ 8004a14:	b2ad      	uxth	r5, r5
+ 8004a16:	4b54      	ldr	r3, [pc, #336]	; (8004b68 <_printf_i+0x218>)
+ 8004a18:	2708      	movs	r7, #8
+ 8004a1a:	9303      	str	r3, [sp, #12]
+ 8004a1c:	2a6f      	cmp	r2, #111	; 0x6f
+ 8004a1e:	d000      	beq.n	8004a22 <_printf_i+0xd2>
+ 8004a20:	3702      	adds	r7, #2
+ 8004a22:	0023      	movs	r3, r4
+ 8004a24:	2200      	movs	r2, #0
+ 8004a26:	3343      	adds	r3, #67	; 0x43
+ 8004a28:	701a      	strb	r2, [r3, #0]
+ 8004a2a:	6863      	ldr	r3, [r4, #4]
+ 8004a2c:	60a3      	str	r3, [r4, #8]
+ 8004a2e:	2b00      	cmp	r3, #0
+ 8004a30:	db03      	blt.n	8004a3a <_printf_i+0xea>
+ 8004a32:	2104      	movs	r1, #4
+ 8004a34:	6822      	ldr	r2, [r4, #0]
+ 8004a36:	438a      	bics	r2, r1
+ 8004a38:	6022      	str	r2, [r4, #0]
+ 8004a3a:	2d00      	cmp	r5, #0
+ 8004a3c:	d102      	bne.n	8004a44 <_printf_i+0xf4>
+ 8004a3e:	9e04      	ldr	r6, [sp, #16]
+ 8004a40:	2b00      	cmp	r3, #0
+ 8004a42:	d00c      	beq.n	8004a5e <_printf_i+0x10e>
+ 8004a44:	9e04      	ldr	r6, [sp, #16]
+ 8004a46:	0028      	movs	r0, r5
+ 8004a48:	0039      	movs	r1, r7
+ 8004a4a:	f7fb fbf5 	bl	8000238 <__aeabi_uidivmod>
+ 8004a4e:	9b03      	ldr	r3, [sp, #12]
+ 8004a50:	3e01      	subs	r6, #1
+ 8004a52:	5c5b      	ldrb	r3, [r3, r1]
+ 8004a54:	7033      	strb	r3, [r6, #0]
+ 8004a56:	002b      	movs	r3, r5
+ 8004a58:	0005      	movs	r5, r0
+ 8004a5a:	429f      	cmp	r7, r3
+ 8004a5c:	d9f3      	bls.n	8004a46 <_printf_i+0xf6>
+ 8004a5e:	2f08      	cmp	r7, #8
+ 8004a60:	d109      	bne.n	8004a76 <_printf_i+0x126>
+ 8004a62:	6823      	ldr	r3, [r4, #0]
+ 8004a64:	07db      	lsls	r3, r3, #31
+ 8004a66:	d506      	bpl.n	8004a76 <_printf_i+0x126>
+ 8004a68:	6862      	ldr	r2, [r4, #4]
+ 8004a6a:	6923      	ldr	r3, [r4, #16]
+ 8004a6c:	429a      	cmp	r2, r3
+ 8004a6e:	dc02      	bgt.n	8004a76 <_printf_i+0x126>
+ 8004a70:	2330      	movs	r3, #48	; 0x30
+ 8004a72:	3e01      	subs	r6, #1
+ 8004a74:	7033      	strb	r3, [r6, #0]
+ 8004a76:	9b04      	ldr	r3, [sp, #16]
+ 8004a78:	1b9b      	subs	r3, r3, r6
+ 8004a7a:	6123      	str	r3, [r4, #16]
+ 8004a7c:	9b07      	ldr	r3, [sp, #28]
+ 8004a7e:	0021      	movs	r1, r4
+ 8004a80:	9300      	str	r3, [sp, #0]
+ 8004a82:	9805      	ldr	r0, [sp, #20]
+ 8004a84:	9b06      	ldr	r3, [sp, #24]
+ 8004a86:	aa09      	add	r2, sp, #36	; 0x24
+ 8004a88:	f7ff fef2 	bl	8004870 <_printf_common>
+ 8004a8c:	3001      	adds	r0, #1
+ 8004a8e:	d147      	bne.n	8004b20 <_printf_i+0x1d0>
+ 8004a90:	2001      	movs	r0, #1
+ 8004a92:	4240      	negs	r0, r0
+ 8004a94:	b00b      	add	sp, #44	; 0x2c
+ 8004a96:	bdf0      	pop	{r4, r5, r6, r7, pc}
+ 8004a98:	2220      	movs	r2, #32
+ 8004a9a:	6809      	ldr	r1, [r1, #0]
+ 8004a9c:	430a      	orrs	r2, r1
+ 8004a9e:	6022      	str	r2, [r4, #0]
+ 8004aa0:	2278      	movs	r2, #120	; 0x78
+ 8004aa2:	4932      	ldr	r1, [pc, #200]	; (8004b6c <_printf_i+0x21c>)
+ 8004aa4:	9103      	str	r1, [sp, #12]
+ 8004aa6:	0021      	movs	r1, r4
+ 8004aa8:	3145      	adds	r1, #69	; 0x45
+ 8004aaa:	700a      	strb	r2, [r1, #0]
+ 8004aac:	6819      	ldr	r1, [r3, #0]
+ 8004aae:	6822      	ldr	r2, [r4, #0]
+ 8004ab0:	c920      	ldmia	r1!, {r5}
+ 8004ab2:	0610      	lsls	r0, r2, #24
+ 8004ab4:	d402      	bmi.n	8004abc <_printf_i+0x16c>
+ 8004ab6:	0650      	lsls	r0, r2, #25
+ 8004ab8:	d500      	bpl.n	8004abc <_printf_i+0x16c>
+ 8004aba:	b2ad      	uxth	r5, r5
+ 8004abc:	6019      	str	r1, [r3, #0]
+ 8004abe:	07d3      	lsls	r3, r2, #31
+ 8004ac0:	d502      	bpl.n	8004ac8 <_printf_i+0x178>
+ 8004ac2:	2320      	movs	r3, #32
+ 8004ac4:	4313      	orrs	r3, r2
+ 8004ac6:	6023      	str	r3, [r4, #0]
+ 8004ac8:	2710      	movs	r7, #16
+ 8004aca:	2d00      	cmp	r5, #0
+ 8004acc:	d1a9      	bne.n	8004a22 <_printf_i+0xd2>
+ 8004ace:	2220      	movs	r2, #32
+ 8004ad0:	6823      	ldr	r3, [r4, #0]
+ 8004ad2:	4393      	bics	r3, r2
+ 8004ad4:	6023      	str	r3, [r4, #0]
+ 8004ad6:	e7a4      	b.n	8004a22 <_printf_i+0xd2>
+ 8004ad8:	681a      	ldr	r2, [r3, #0]
+ 8004ada:	680d      	ldr	r5, [r1, #0]
+ 8004adc:	1d10      	adds	r0, r2, #4
+ 8004ade:	6949      	ldr	r1, [r1, #20]
+ 8004ae0:	6018      	str	r0, [r3, #0]
+ 8004ae2:	6813      	ldr	r3, [r2, #0]
+ 8004ae4:	062e      	lsls	r6, r5, #24
+ 8004ae6:	d501      	bpl.n	8004aec <_printf_i+0x19c>
+ 8004ae8:	6019      	str	r1, [r3, #0]
+ 8004aea:	e002      	b.n	8004af2 <_printf_i+0x1a2>
+ 8004aec:	066d      	lsls	r5, r5, #25
+ 8004aee:	d5fb      	bpl.n	8004ae8 <_printf_i+0x198>
+ 8004af0:	8019      	strh	r1, [r3, #0]
+ 8004af2:	2300      	movs	r3, #0
+ 8004af4:	9e04      	ldr	r6, [sp, #16]
+ 8004af6:	6123      	str	r3, [r4, #16]
+ 8004af8:	e7c0      	b.n	8004a7c <_printf_i+0x12c>
+ 8004afa:	681a      	ldr	r2, [r3, #0]
+ 8004afc:	1d11      	adds	r1, r2, #4
+ 8004afe:	6019      	str	r1, [r3, #0]
+ 8004b00:	6816      	ldr	r6, [r2, #0]
+ 8004b02:	2100      	movs	r1, #0
+ 8004b04:	0030      	movs	r0, r6
+ 8004b06:	6862      	ldr	r2, [r4, #4]
+ 8004b08:	f000 f858 	bl	8004bbc <memchr>
+ 8004b0c:	2800      	cmp	r0, #0
+ 8004b0e:	d001      	beq.n	8004b14 <_printf_i+0x1c4>
+ 8004b10:	1b80      	subs	r0, r0, r6
+ 8004b12:	6060      	str	r0, [r4, #4]
+ 8004b14:	6863      	ldr	r3, [r4, #4]
+ 8004b16:	6123      	str	r3, [r4, #16]
+ 8004b18:	2300      	movs	r3, #0
+ 8004b1a:	9a04      	ldr	r2, [sp, #16]
+ 8004b1c:	7013      	strb	r3, [r2, #0]
+ 8004b1e:	e7ad      	b.n	8004a7c <_printf_i+0x12c>
+ 8004b20:	0032      	movs	r2, r6
+ 8004b22:	6923      	ldr	r3, [r4, #16]
+ 8004b24:	9906      	ldr	r1, [sp, #24]
+ 8004b26:	9805      	ldr	r0, [sp, #20]
+ 8004b28:	9d07      	ldr	r5, [sp, #28]
+ 8004b2a:	47a8      	blx	r5
+ 8004b2c:	3001      	adds	r0, #1
+ 8004b2e:	d0af      	beq.n	8004a90 <_printf_i+0x140>
+ 8004b30:	6823      	ldr	r3, [r4, #0]
+ 8004b32:	079b      	lsls	r3, r3, #30
+ 8004b34:	d415      	bmi.n	8004b62 <_printf_i+0x212>
+ 8004b36:	9b09      	ldr	r3, [sp, #36]	; 0x24
+ 8004b38:	68e0      	ldr	r0, [r4, #12]
+ 8004b3a:	4298      	cmp	r0, r3
+ 8004b3c:	daaa      	bge.n	8004a94 <_printf_i+0x144>
+ 8004b3e:	0018      	movs	r0, r3
+ 8004b40:	e7a8      	b.n	8004a94 <_printf_i+0x144>
+ 8004b42:	0022      	movs	r2, r4
+ 8004b44:	2301      	movs	r3, #1
+ 8004b46:	9906      	ldr	r1, [sp, #24]
+ 8004b48:	9805      	ldr	r0, [sp, #20]
+ 8004b4a:	9e07      	ldr	r6, [sp, #28]
+ 8004b4c:	3219      	adds	r2, #25
+ 8004b4e:	47b0      	blx	r6
+ 8004b50:	3001      	adds	r0, #1
+ 8004b52:	d09d      	beq.n	8004a90 <_printf_i+0x140>
+ 8004b54:	3501      	adds	r5, #1
+ 8004b56:	68e3      	ldr	r3, [r4, #12]
+ 8004b58:	9a09      	ldr	r2, [sp, #36]	; 0x24
+ 8004b5a:	1a9b      	subs	r3, r3, r2
+ 8004b5c:	42ab      	cmp	r3, r5
+ 8004b5e:	dcf0      	bgt.n	8004b42 <_printf_i+0x1f2>
+ 8004b60:	e7e9      	b.n	8004b36 <_printf_i+0x1e6>
+ 8004b62:	2500      	movs	r5, #0
+ 8004b64:	e7f7      	b.n	8004b56 <_printf_i+0x206>
+ 8004b66:	46c0      	nop			; (mov r8, r8)
+ 8004b68:	08004d2d 	.word	0x08004d2d
+ 8004b6c:	08004d3e 	.word	0x08004d3e
 
-08005898 <memmove>:
- 8005898:	b510      	push	{r4, lr}
- 800589a:	4288      	cmp	r0, r1
- 800589c:	d902      	bls.n	80058a4 <memmove+0xc>
- 800589e:	188b      	adds	r3, r1, r2
- 80058a0:	4298      	cmp	r0, r3
- 80058a2:	d303      	bcc.n	80058ac <memmove+0x14>
- 80058a4:	2300      	movs	r3, #0
- 80058a6:	e007      	b.n	80058b8 <memmove+0x20>
- 80058a8:	5c8b      	ldrb	r3, [r1, r2]
- 80058aa:	5483      	strb	r3, [r0, r2]
- 80058ac:	3a01      	subs	r2, #1
- 80058ae:	d2fb      	bcs.n	80058a8 <memmove+0x10>
- 80058b0:	bd10      	pop	{r4, pc}
- 80058b2:	5ccc      	ldrb	r4, [r1, r3]
- 80058b4:	54c4      	strb	r4, [r0, r3]
- 80058b6:	3301      	adds	r3, #1
- 80058b8:	429a      	cmp	r2, r3
- 80058ba:	d1fa      	bne.n	80058b2 <memmove+0x1a>
- 80058bc:	e7f8      	b.n	80058b0 <memmove+0x18>
+08004b70 <memmove>:
+ 8004b70:	b510      	push	{r4, lr}
+ 8004b72:	4288      	cmp	r0, r1
+ 8004b74:	d902      	bls.n	8004b7c <memmove+0xc>
+ 8004b76:	188b      	adds	r3, r1, r2
+ 8004b78:	4298      	cmp	r0, r3
+ 8004b7a:	d303      	bcc.n	8004b84 <memmove+0x14>
+ 8004b7c:	2300      	movs	r3, #0
+ 8004b7e:	e007      	b.n	8004b90 <memmove+0x20>
+ 8004b80:	5c8b      	ldrb	r3, [r1, r2]
+ 8004b82:	5483      	strb	r3, [r0, r2]
+ 8004b84:	3a01      	subs	r2, #1
+ 8004b86:	d2fb      	bcs.n	8004b80 <memmove+0x10>
+ 8004b88:	bd10      	pop	{r4, pc}
+ 8004b8a:	5ccc      	ldrb	r4, [r1, r3]
+ 8004b8c:	54c4      	strb	r4, [r0, r3]
+ 8004b8e:	3301      	adds	r3, #1
+ 8004b90:	429a      	cmp	r2, r3
+ 8004b92:	d1fa      	bne.n	8004b8a <memmove+0x1a>
+ 8004b94:	e7f8      	b.n	8004b88 <memmove+0x18>
 	...
 
-080058c0 <_sbrk_r>:
- 80058c0:	2300      	movs	r3, #0
- 80058c2:	b570      	push	{r4, r5, r6, lr}
- 80058c4:	4d06      	ldr	r5, [pc, #24]	; (80058e0 <_sbrk_r+0x20>)
- 80058c6:	0004      	movs	r4, r0
- 80058c8:	0008      	movs	r0, r1
- 80058ca:	602b      	str	r3, [r5, #0]
- 80058cc:	f7fb fd18 	bl	8001300 <_sbrk>
- 80058d0:	1c43      	adds	r3, r0, #1
- 80058d2:	d103      	bne.n	80058dc <_sbrk_r+0x1c>
- 80058d4:	682b      	ldr	r3, [r5, #0]
- 80058d6:	2b00      	cmp	r3, #0
- 80058d8:	d000      	beq.n	80058dc <_sbrk_r+0x1c>
- 80058da:	6023      	str	r3, [r4, #0]
- 80058dc:	bd70      	pop	{r4, r5, r6, pc}
- 80058de:	46c0      	nop			; (mov r8, r8)
- 80058e0:	20000408 	.word	0x20000408
+08004b98 <_sbrk_r>:
+ 8004b98:	2300      	movs	r3, #0
+ 8004b9a:	b570      	push	{r4, r5, r6, lr}
+ 8004b9c:	4d06      	ldr	r5, [pc, #24]	; (8004bb8 <_sbrk_r+0x20>)
+ 8004b9e:	0004      	movs	r4, r0
+ 8004ba0:	0008      	movs	r0, r1
+ 8004ba2:	602b      	str	r3, [r5, #0]
+ 8004ba4:	f7fc faee 	bl	8001184 <_sbrk>
+ 8004ba8:	1c43      	adds	r3, r0, #1
+ 8004baa:	d103      	bne.n	8004bb4 <_sbrk_r+0x1c>
+ 8004bac:	682b      	ldr	r3, [r5, #0]
+ 8004bae:	2b00      	cmp	r3, #0
+ 8004bb0:	d000      	beq.n	8004bb4 <_sbrk_r+0x1c>
+ 8004bb2:	6023      	str	r3, [r4, #0]
+ 8004bb4:	bd70      	pop	{r4, r5, r6, pc}
+ 8004bb6:	46c0      	nop			; (mov r8, r8)
+ 8004bb8:	20000404 	.word	0x20000404
 
-080058e4 <memchr>:
- 80058e4:	b2c9      	uxtb	r1, r1
- 80058e6:	1882      	adds	r2, r0, r2
- 80058e8:	4290      	cmp	r0, r2
- 80058ea:	d101      	bne.n	80058f0 <memchr+0xc>
- 80058ec:	2000      	movs	r0, #0
- 80058ee:	4770      	bx	lr
- 80058f0:	7803      	ldrb	r3, [r0, #0]
- 80058f2:	428b      	cmp	r3, r1
- 80058f4:	d0fb      	beq.n	80058ee <memchr+0xa>
- 80058f6:	3001      	adds	r0, #1
- 80058f8:	e7f6      	b.n	80058e8 <memchr+0x4>
+08004bbc <memchr>:
+ 8004bbc:	b2c9      	uxtb	r1, r1
+ 8004bbe:	1882      	adds	r2, r0, r2
+ 8004bc0:	4290      	cmp	r0, r2
+ 8004bc2:	d101      	bne.n	8004bc8 <memchr+0xc>
+ 8004bc4:	2000      	movs	r0, #0
+ 8004bc6:	4770      	bx	lr
+ 8004bc8:	7803      	ldrb	r3, [r0, #0]
+ 8004bca:	428b      	cmp	r3, r1
+ 8004bcc:	d0fb      	beq.n	8004bc6 <memchr+0xa>
+ 8004bce:	3001      	adds	r0, #1
+ 8004bd0:	e7f6      	b.n	8004bc0 <memchr+0x4>
 
-080058fa <memcpy>:
- 80058fa:	2300      	movs	r3, #0
- 80058fc:	b510      	push	{r4, lr}
- 80058fe:	429a      	cmp	r2, r3
- 8005900:	d100      	bne.n	8005904 <memcpy+0xa>
- 8005902:	bd10      	pop	{r4, pc}
- 8005904:	5ccc      	ldrb	r4, [r1, r3]
- 8005906:	54c4      	strb	r4, [r0, r3]
- 8005908:	3301      	adds	r3, #1
- 800590a:	e7f8      	b.n	80058fe <memcpy+0x4>
+08004bd2 <memcpy>:
+ 8004bd2:	2300      	movs	r3, #0
+ 8004bd4:	b510      	push	{r4, lr}
+ 8004bd6:	429a      	cmp	r2, r3
+ 8004bd8:	d100      	bne.n	8004bdc <memcpy+0xa>
+ 8004bda:	bd10      	pop	{r4, pc}
+ 8004bdc:	5ccc      	ldrb	r4, [r1, r3]
+ 8004bde:	54c4      	strb	r4, [r0, r3]
+ 8004be0:	3301      	adds	r3, #1
+ 8004be2:	e7f8      	b.n	8004bd6 <memcpy+0x4>
 
-0800590c <_realloc_r>:
- 800590c:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
- 800590e:	0007      	movs	r7, r0
- 8005910:	000e      	movs	r6, r1
- 8005912:	0014      	movs	r4, r2
- 8005914:	2900      	cmp	r1, #0
- 8005916:	d105      	bne.n	8005924 <_realloc_r+0x18>
- 8005918:	0011      	movs	r1, r2
- 800591a:	f7ff fc49 	bl	80051b0 <_malloc_r>
- 800591e:	0005      	movs	r5, r0
- 8005920:	0028      	movs	r0, r5
- 8005922:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
- 8005924:	2a00      	cmp	r2, #0
- 8005926:	d103      	bne.n	8005930 <_realloc_r+0x24>
- 8005928:	f7ff fbd6 	bl	80050d8 <_free_r>
- 800592c:	0025      	movs	r5, r4
- 800592e:	e7f7      	b.n	8005920 <_realloc_r+0x14>
- 8005930:	f000 f81b 	bl	800596a <_malloc_usable_size_r>
- 8005934:	9001      	str	r0, [sp, #4]
- 8005936:	4284      	cmp	r4, r0
- 8005938:	d803      	bhi.n	8005942 <_realloc_r+0x36>
- 800593a:	0035      	movs	r5, r6
- 800593c:	0843      	lsrs	r3, r0, #1
- 800593e:	42a3      	cmp	r3, r4
- 8005940:	d3ee      	bcc.n	8005920 <_realloc_r+0x14>
- 8005942:	0021      	movs	r1, r4
- 8005944:	0038      	movs	r0, r7
- 8005946:	f7ff fc33 	bl	80051b0 <_malloc_r>
- 800594a:	1e05      	subs	r5, r0, #0
- 800594c:	d0e8      	beq.n	8005920 <_realloc_r+0x14>
- 800594e:	9b01      	ldr	r3, [sp, #4]
- 8005950:	0022      	movs	r2, r4
- 8005952:	429c      	cmp	r4, r3
- 8005954:	d900      	bls.n	8005958 <_realloc_r+0x4c>
- 8005956:	001a      	movs	r2, r3
- 8005958:	0031      	movs	r1, r6
- 800595a:	0028      	movs	r0, r5
- 800595c:	f7ff ffcd 	bl	80058fa <memcpy>
- 8005960:	0031      	movs	r1, r6
- 8005962:	0038      	movs	r0, r7
- 8005964:	f7ff fbb8 	bl	80050d8 <_free_r>
- 8005968:	e7da      	b.n	8005920 <_realloc_r+0x14>
+08004be4 <_realloc_r>:
+ 8004be4:	b5f7      	push	{r0, r1, r2, r4, r5, r6, r7, lr}
+ 8004be6:	0007      	movs	r7, r0
+ 8004be8:	000e      	movs	r6, r1
+ 8004bea:	0014      	movs	r4, r2
+ 8004bec:	2900      	cmp	r1, #0
+ 8004bee:	d105      	bne.n	8004bfc <_realloc_r+0x18>
+ 8004bf0:	0011      	movs	r1, r2
+ 8004bf2:	f7ff fc49 	bl	8004488 <_malloc_r>
+ 8004bf6:	0005      	movs	r5, r0
+ 8004bf8:	0028      	movs	r0, r5
+ 8004bfa:	bdfe      	pop	{r1, r2, r3, r4, r5, r6, r7, pc}
+ 8004bfc:	2a00      	cmp	r2, #0
+ 8004bfe:	d103      	bne.n	8004c08 <_realloc_r+0x24>
+ 8004c00:	f7ff fbd6 	bl	80043b0 <_free_r>
+ 8004c04:	0025      	movs	r5, r4
+ 8004c06:	e7f7      	b.n	8004bf8 <_realloc_r+0x14>
+ 8004c08:	f000 f81b 	bl	8004c42 <_malloc_usable_size_r>
+ 8004c0c:	9001      	str	r0, [sp, #4]
+ 8004c0e:	4284      	cmp	r4, r0
+ 8004c10:	d803      	bhi.n	8004c1a <_realloc_r+0x36>
+ 8004c12:	0035      	movs	r5, r6
+ 8004c14:	0843      	lsrs	r3, r0, #1
+ 8004c16:	42a3      	cmp	r3, r4
+ 8004c18:	d3ee      	bcc.n	8004bf8 <_realloc_r+0x14>
+ 8004c1a:	0021      	movs	r1, r4
+ 8004c1c:	0038      	movs	r0, r7
+ 8004c1e:	f7ff fc33 	bl	8004488 <_malloc_r>
+ 8004c22:	1e05      	subs	r5, r0, #0
+ 8004c24:	d0e8      	beq.n	8004bf8 <_realloc_r+0x14>
+ 8004c26:	9b01      	ldr	r3, [sp, #4]
+ 8004c28:	0022      	movs	r2, r4
+ 8004c2a:	429c      	cmp	r4, r3
+ 8004c2c:	d900      	bls.n	8004c30 <_realloc_r+0x4c>
+ 8004c2e:	001a      	movs	r2, r3
+ 8004c30:	0031      	movs	r1, r6
+ 8004c32:	0028      	movs	r0, r5
+ 8004c34:	f7ff ffcd 	bl	8004bd2 <memcpy>
+ 8004c38:	0031      	movs	r1, r6
+ 8004c3a:	0038      	movs	r0, r7
+ 8004c3c:	f7ff fbb8 	bl	80043b0 <_free_r>
+ 8004c40:	e7da      	b.n	8004bf8 <_realloc_r+0x14>
 
-0800596a <_malloc_usable_size_r>:
- 800596a:	1f0b      	subs	r3, r1, #4
- 800596c:	681b      	ldr	r3, [r3, #0]
- 800596e:	1f18      	subs	r0, r3, #4
- 8005970:	2b00      	cmp	r3, #0
- 8005972:	da01      	bge.n	8005978 <_malloc_usable_size_r+0xe>
- 8005974:	580b      	ldr	r3, [r1, r0]
- 8005976:	18c0      	adds	r0, r0, r3
- 8005978:	4770      	bx	lr
+08004c42 <_malloc_usable_size_r>:
+ 8004c42:	1f0b      	subs	r3, r1, #4
+ 8004c44:	681b      	ldr	r3, [r3, #0]
+ 8004c46:	1f18      	subs	r0, r3, #4
+ 8004c48:	2b00      	cmp	r3, #0
+ 8004c4a:	da01      	bge.n	8004c50 <_malloc_usable_size_r+0xe>
+ 8004c4c:	580b      	ldr	r3, [r1, r0]
+ 8004c4e:	18c0      	adds	r0, r0, r3
+ 8004c50:	4770      	bx	lr
 	...
 
-0800597c <_init>:
- 800597c:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 800597e:	46c0      	nop			; (mov r8, r8)
- 8005980:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 8005982:	bc08      	pop	{r3}
- 8005984:	469e      	mov	lr, r3
- 8005986:	4770      	bx	lr
+08004c54 <_init>:
+ 8004c54:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8004c56:	46c0      	nop			; (mov r8, r8)
+ 8004c58:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 8004c5a:	bc08      	pop	{r3}
+ 8004c5c:	469e      	mov	lr, r3
+ 8004c5e:	4770      	bx	lr
 
-08005988 <_fini>:
- 8005988:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
- 800598a:	46c0      	nop			; (mov r8, r8)
- 800598c:	bcf8      	pop	{r3, r4, r5, r6, r7}
- 800598e:	bc08      	pop	{r3}
- 8005990:	469e      	mov	lr, r3
- 8005992:	4770      	bx	lr
+08004c60 <_fini>:
+ 8004c60:	b5f8      	push	{r3, r4, r5, r6, r7, lr}
+ 8004c62:	46c0      	nop			; (mov r8, r8)
+ 8004c64:	bcf8      	pop	{r3, r4, r5, r6, r7}
+ 8004c66:	bc08      	pop	{r3}
+ 8004c68:	469e      	mov	lr, r3
+ 8004c6a:	4770      	bx	lr
diff --git a/code/Debug/radiosonda_m20.map b/code/Debug/radiosonda_m20.map
index eb301dd..d383b78 100644
--- a/code/Debug/radiosonda_m20.map
+++ b/code/Debug/radiosonda_m20.map
@@ -166,8 +166,66 @@ Discarded input sections
                 0x0000000000000000      0x160 ./Core/Src/adf7012.o
  .text.ADF_Reset
                 0x0000000000000000       0x38 ./Core/Src/adf7012.o
+ .text.myspi    0x0000000000000000       0xd4 ./Core/Src/adf7012.o
  .text.ADF_setfreq
                 0x0000000000000000       0x86 ./Core/Src/adf7012.o
+ .debug_info    0x0000000000000000      0x477 ./Core/Src/adf7012.o
+ .debug_abbrev  0x0000000000000000      0x1a1 ./Core/Src/adf7012.o
+ .debug_aranges
+                0x0000000000000000       0x38 ./Core/Src/adf7012.o
+ .debug_rnglists
+                0x0000000000000000       0x28 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x203 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0xa7e ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x131 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x2e ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x28 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x22 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x8e ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x51 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x103 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x6a ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x1df ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x1c ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x22 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0xaf ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x4da ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x11f ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000     0x8248 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x66 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000     0x3590 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x174 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x5c ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x8ae ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x625 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x190 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x13f ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x161 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x82 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x28e ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x1e9 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x4e1 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x65 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x128 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x2ab ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x22c ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x5b ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0xa5 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x180 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x16 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x22c ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x788 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0xc6 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x5cf ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000       0x44 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x146 ./Core/Src/adf7012.o
+ .debug_macro   0x0000000000000000      0x154 ./Core/Src/adf7012.o
+ .debug_line    0x0000000000000000      0x852 ./Core/Src/adf7012.o
+ .debug_str     0x0000000000000000    0x71800 ./Core/Src/adf7012.o
+ .comment       0x0000000000000000       0x44 ./Core/Src/adf7012.o
+ .debug_frame   0x0000000000000000       0x8c ./Core/Src/adf7012.o
+ .ARM.attributes
+                0x0000000000000000       0x2c ./Core/Src/adf7012.o
  .group         0x0000000000000000        0xc ./Core/Src/gps.o
  .group         0x0000000000000000        0xc ./Core/Src/gps.o
  .group         0x0000000000000000        0xc ./Core/Src/gps.o
@@ -410,7 +468,7 @@ Discarded input sections
  .text.HAL_ADC_MspDeInit
                 0x0000000000000000       0x50 ./Core/Src/stm32l0xx_hal_msp.o
  .text.HAL_UART_MspDeInit
-                0x0000000000000000       0x84 ./Core/Src/stm32l0xx_hal_msp.o
+                0x0000000000000000       0x80 ./Core/Src/stm32l0xx_hal_msp.o
  .text.HAL_SPI_MspDeInit
                 0x0000000000000000       0x40 ./Core/Src/stm32l0xx_hal_msp.o
  .text.HAL_TIM_Base_MspDeInit
@@ -1400,6 +1458,10 @@ Discarded input sections
                 0x0000000000000000       0x92 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
  .text.HAL_DMA_Start_IT
                 0x0000000000000000       0xcc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
+ .text.HAL_DMA_Abort
+                0x0000000000000000       0x80 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
+ .text.HAL_DMA_Abort_IT
+                0x0000000000000000       0x8e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
  .text.HAL_DMA_PollForTransfer
                 0x0000000000000000      0x154 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
  .text.HAL_DMA_RegisterCallback
@@ -3537,10 +3599,10 @@ Discarded input sections
                 0x0000000000000000       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_MspDeInit
                 0x0000000000000000       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
- .text.HAL_UART_Receive
-                0x0000000000000000      0x1cc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_Transmit_IT
                 0x0000000000000000       0xe0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+ .text.HAL_UART_Receive_IT
+                0x0000000000000000       0xbc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_Transmit_DMA
                 0x0000000000000000      0x120 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_Receive_DMA
@@ -3563,18 +3625,26 @@ Discarded input sections
                 0x0000000000000000       0xf0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_AbortReceive_IT
                 0x0000000000000000      0x190 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+ .text.HAL_UART_IRQHandler
+                0x0000000000000000      0x5c4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+ .text.HAL_UART_TxCpltCallback
+                0x0000000000000000       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_TxHalfCpltCallback
                 0x0000000000000000       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_RxCpltCallback
                 0x0000000000000000       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_RxHalfCpltCallback
                 0x0000000000000000       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+ .text.HAL_UART_ErrorCallback
+                0x0000000000000000       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_AbortCpltCallback
                 0x0000000000000000       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_AbortTransmitCpltCallback
                 0x0000000000000000       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_AbortReceiveCpltCallback
                 0x0000000000000000       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+ .text.HAL_UARTEx_RxEventCallback
+                0x0000000000000000       0x16 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_ReceiverTimeout_Config
                 0x0000000000000000       0x34 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_EnableReceiverTimeout
@@ -3597,6 +3667,8 @@ Discarded input sections
                 0x0000000000000000       0x24 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.HAL_UART_GetError
                 0x0000000000000000       0x16 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+ .text.UART_Start_Receive_IT
+                0x0000000000000000      0x194 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.UART_Start_Receive_DMA
                 0x0000000000000000      0x140 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.UART_EndTxTransfer
@@ -3611,6 +3683,8 @@ Discarded input sections
                 0x0000000000000000       0x42 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.UART_DMAError
                 0x0000000000000000       0x84 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+ .text.UART_DMAAbortOnError
+                0x0000000000000000       0x2e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.UART_DMATxAbortCallback
                 0x0000000000000000       0x6e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.UART_DMARxAbortCallback
@@ -3623,6 +3697,12 @@ Discarded input sections
                 0x0000000000000000       0xb2 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .text.UART_TxISR_16BIT
                 0x0000000000000000       0xbc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+ .text.UART_EndTransmit_IT
+                0x0000000000000000       0x56 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+ .text.UART_RxISR_8BIT
+                0x0000000000000000      0x1c4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+ .text.UART_RxISR_16BIT
+                0x0000000000000000      0x1c4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .debug_macro   0x0000000000000000      0xa7e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .debug_macro   0x0000000000000000      0x131 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .debug_macro   0x0000000000000000       0x2e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
@@ -3714,6 +3794,8 @@ Discarded input sections
  .bss           0x0000000000000000        0x0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
  .text.HAL_RS485Ex_Init
                 0x0000000000000000       0xe0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+ .text.HAL_UARTEx_WakeupCallback
+                0x0000000000000000       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
  .text.HAL_UARTEx_EnableClockStopMode
                 0x0000000000000000       0x64 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
  .text.HAL_UARTEx_DisableClockStopMode
@@ -3736,6 +3818,13 @@ Discarded input sections
                 0x0000000000000000       0x14 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
  .text.UARTEx_Wakeup_AddressConfig
                 0x0000000000000000       0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+ .debug_info    0x0000000000000000      0xda1 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+ .debug_abbrev  0x0000000000000000      0x2ba ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+ .debug_aranges
+                0x0000000000000000       0x80 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+ .debug_rnglists
+                0x0000000000000000       0x60 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+ .debug_macro   0x0000000000000000      0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
  .debug_macro   0x0000000000000000      0xa7e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
  .debug_macro   0x0000000000000000      0x131 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
  .debug_macro   0x0000000000000000       0x2e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
@@ -3779,6 +3868,12 @@ Discarded input sections
  .debug_macro   0x0000000000000000      0x5cf ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
  .debug_macro   0x0000000000000000       0x44 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
  .debug_macro   0x0000000000000000      0x146 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+ .debug_line    0x0000000000000000      0xc74 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+ .debug_str     0x0000000000000000    0x71892 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+ .comment       0x0000000000000000       0x44 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+ .debug_frame   0x0000000000000000      0x1b8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+ .ARM.attributes
+                0x0000000000000000       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
  .text          0x0000000000000000        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-exit.o)
  .data          0x0000000000000000        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-exit.o)
  .bss           0x0000000000000000        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-exit.o)
@@ -4134,7 +4229,7 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
                 0x0000000008000000                g_pfnVectors
                 0x00000000080000c0                . = ALIGN (0x4)
 
-.text           0x00000000080000c0     0x58d4
+.text           0x00000000080000c0     0x4bac
                 0x00000000080000c0                . = ALIGN (0x4)
  *(.text)
  .text          0x00000000080000c0       0x48 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o
@@ -4162,448 +4257,407 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
  .text          0x00000000080004b4       0x18 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/libgcc.a(_clzdi2.o)
                 0x00000000080004b4                __clzdi2
  *(.text*)
- .text.myspi    0x00000000080004cc       0xd4 ./Core/Src/adf7012.o
-                0x00000000080004cc                myspi
- .text.main     0x00000000080005a0      0x3a4 ./Core/Src/main.o
-                0x00000000080005a0                main
+ .text.main     0x00000000080004cc      0x354 ./Core/Src/main.o
+                0x00000000080004cc                main
  .text.SystemClock_Config
-                0x0000000008000944       0xf8 ./Core/Src/main.o
-                0x0000000008000944                SystemClock_Config
+                0x0000000008000820       0xf8 ./Core/Src/main.o
+                0x0000000008000820                SystemClock_Config
  .text.MX_ADC_Init
-                0x0000000008000a3c      0x108 ./Core/Src/main.o
+                0x0000000008000918      0x108 ./Core/Src/main.o
  .text.MX_LPUART1_UART_Init
-                0x0000000008000b44       0x5c ./Core/Src/main.o
+                0x0000000008000a20       0x5c ./Core/Src/main.o
  .text.MX_USART1_UART_Init
-                0x0000000008000ba0       0x60 ./Core/Src/main.o
+                0x0000000008000a7c       0x60 ./Core/Src/main.o
  .text.MX_SPI1_Init
-                0x0000000008000c00       0x70 ./Core/Src/main.o
+                0x0000000008000adc       0x70 ./Core/Src/main.o
  .text.MX_TIM21_Init
-                0x0000000008000c70       0xac ./Core/Src/main.o
+                0x0000000008000b4c       0xac ./Core/Src/main.o
  .text.MX_DMA_Init
-                0x0000000008000d1c       0x3c ./Core/Src/main.o
+                0x0000000008000bf8       0x3c ./Core/Src/main.o
  .text.MX_GPIO_Init
-                0x0000000008000d58      0x1ec ./Core/Src/main.o
- .text.HAL_UART_RxCpltCallback
-                0x0000000008000f44       0x30 ./Core/Src/main.o
-                0x0000000008000f44                HAL_UART_RxCpltCallback
+                0x0000000008000c34      0x1ec ./Core/Src/main.o
  .text.Error_Handler
-                0x0000000008000f74        0xa ./Core/Src/main.o
-                0x0000000008000f74                Error_Handler
- *fill*         0x0000000008000f7e        0x2 
+                0x0000000008000e20        0xa ./Core/Src/main.o
+                0x0000000008000e20                Error_Handler
+ *fill*         0x0000000008000e2a        0x2 
  .text.HAL_MspInit
-                0x0000000008000f80       0x28 ./Core/Src/stm32l0xx_hal_msp.o
-                0x0000000008000f80                HAL_MspInit
+                0x0000000008000e2c       0x28 ./Core/Src/stm32l0xx_hal_msp.o
+                0x0000000008000e2c                HAL_MspInit
  .text.HAL_ADC_MspInit
-                0x0000000008000fa8       0xb8 ./Core/Src/stm32l0xx_hal_msp.o
-                0x0000000008000fa8                HAL_ADC_MspInit
+                0x0000000008000e54       0xb8 ./Core/Src/stm32l0xx_hal_msp.o
+                0x0000000008000e54                HAL_ADC_MspInit
  .text.HAL_UART_MspInit
-                0x0000000008001060      0x15c ./Core/Src/stm32l0xx_hal_msp.o
-                0x0000000008001060                HAL_UART_MspInit
+                0x0000000008000f0c      0x14c ./Core/Src/stm32l0xx_hal_msp.o
+                0x0000000008000f0c                HAL_UART_MspInit
  .text.HAL_SPI_MspInit
-                0x00000000080011bc       0x88 ./Core/Src/stm32l0xx_hal_msp.o
-                0x00000000080011bc                HAL_SPI_MspInit
+                0x0000000008001058       0x88 ./Core/Src/stm32l0xx_hal_msp.o
+                0x0000000008001058                HAL_SPI_MspInit
  .text.HAL_TIM_Base_MspInit
-                0x0000000008001244       0x40 ./Core/Src/stm32l0xx_hal_msp.o
-                0x0000000008001244                HAL_TIM_Base_MspInit
+                0x00000000080010e0       0x40 ./Core/Src/stm32l0xx_hal_msp.o
+                0x00000000080010e0                HAL_TIM_Base_MspInit
  .text.NMI_Handler
-                0x0000000008001284        0xa ./Core/Src/stm32l0xx_it.o
-                0x0000000008001284                NMI_Handler
+                0x0000000008001120        0xa ./Core/Src/stm32l0xx_it.o
+                0x0000000008001120                NMI_Handler
  .text.HardFault_Handler
-                0x000000000800128e        0x6 ./Core/Src/stm32l0xx_it.o
-                0x000000000800128e                HardFault_Handler
+                0x000000000800112a        0x6 ./Core/Src/stm32l0xx_it.o
+                0x000000000800112a                HardFault_Handler
  .text.SVC_Handler
-                0x0000000008001294        0xa ./Core/Src/stm32l0xx_it.o
-                0x0000000008001294                SVC_Handler
+                0x0000000008001130        0xa ./Core/Src/stm32l0xx_it.o
+                0x0000000008001130                SVC_Handler
  .text.PendSV_Handler
-                0x000000000800129e        0xa ./Core/Src/stm32l0xx_it.o
-                0x000000000800129e                PendSV_Handler
+                0x000000000800113a        0xa ./Core/Src/stm32l0xx_it.o
+                0x000000000800113a                PendSV_Handler
  .text.SysTick_Handler
-                0x00000000080012a8        0xe ./Core/Src/stm32l0xx_it.o
-                0x00000000080012a8                SysTick_Handler
- *fill*         0x00000000080012b6        0x2 
+                0x0000000008001144        0xe ./Core/Src/stm32l0xx_it.o
+                0x0000000008001144                SysTick_Handler
+ *fill*         0x0000000008001152        0x2 
  .text.DMA1_Channel2_3_IRQHandler
-                0x00000000080012b8       0x18 ./Core/Src/stm32l0xx_it.o
-                0x00000000080012b8                DMA1_Channel2_3_IRQHandler
+                0x0000000008001154       0x18 ./Core/Src/stm32l0xx_it.o
+                0x0000000008001154                DMA1_Channel2_3_IRQHandler
  .text.TIM21_IRQHandler
-                0x00000000080012d0       0x18 ./Core/Src/stm32l0xx_it.o
-                0x00000000080012d0                TIM21_IRQHandler
- .text.LPUART1_IRQHandler
-                0x00000000080012e8       0x18 ./Core/Src/stm32l0xx_it.o
-                0x00000000080012e8                LPUART1_IRQHandler
- .text._sbrk    0x0000000008001300       0x6c ./Core/Src/sysmem.o
-                0x0000000008001300                _sbrk
+                0x000000000800116c       0x18 ./Core/Src/stm32l0xx_it.o
+                0x000000000800116c                TIM21_IRQHandler
+ .text._sbrk    0x0000000008001184       0x6c ./Core/Src/sysmem.o
+                0x0000000008001184                _sbrk
  .text.SystemInit
-                0x000000000800136c        0xa ./Core/Src/system_stm32l0xx.o
-                0x000000000800136c                SystemInit
- *fill*         0x0000000008001376        0x2 
+                0x00000000080011f0        0xa ./Core/Src/system_stm32l0xx.o
+                0x00000000080011f0                SystemInit
+ *fill*         0x00000000080011fa        0x2 
  .text.Reset_Handler
-                0x0000000008001378       0x50 ./Core/Startup/startup_stm32l051r6tx.o
-                0x0000000008001378                Reset_Handler
+                0x00000000080011fc       0x50 ./Core/Startup/startup_stm32l051r6tx.o
+                0x00000000080011fc                Reset_Handler
  .text.Default_Handler
-                0x00000000080013c8        0x2 ./Core/Startup/startup_stm32l051r6tx.o
-                0x00000000080013c8                ADC1_COMP_IRQHandler
-                0x00000000080013c8                TIM6_IRQHandler
-                0x00000000080013c8                PVD_IRQHandler
-                0x00000000080013c8                I2C1_IRQHandler
-                0x00000000080013c8                SPI1_IRQHandler
-                0x00000000080013c8                EXTI2_3_IRQHandler
-                0x00000000080013c8                I2C2_IRQHandler
-                0x00000000080013c8                RTC_IRQHandler
-                0x00000000080013c8                DMA1_Channel4_5_6_7_IRQHandler
-                0x00000000080013c8                EXTI4_15_IRQHandler
-                0x00000000080013c8                RCC_IRQHandler
-                0x00000000080013c8                DMA1_Channel1_IRQHandler
-                0x00000000080013c8                Default_Handler
-                0x00000000080013c8                TIM22_IRQHandler
-                0x00000000080013c8                EXTI0_1_IRQHandler
-                0x00000000080013c8                SPI2_IRQHandler
-                0x00000000080013c8                WWDG_IRQHandler
-                0x00000000080013c8                TIM2_IRQHandler
-                0x00000000080013c8                USART2_IRQHandler
-                0x00000000080013c8                FLASH_IRQHandler
-                0x00000000080013c8                USART1_IRQHandler
-                0x00000000080013c8                LPTIM1_IRQHandler
- *fill*         0x00000000080013ca        0x2 
+                0x000000000800124c        0x2 ./Core/Startup/startup_stm32l051r6tx.o
+                0x000000000800124c                ADC1_COMP_IRQHandler
+                0x000000000800124c                TIM6_IRQHandler
+                0x000000000800124c                PVD_IRQHandler
+                0x000000000800124c                I2C1_IRQHandler
+                0x000000000800124c                SPI1_IRQHandler
+                0x000000000800124c                EXTI2_3_IRQHandler
+                0x000000000800124c                I2C2_IRQHandler
+                0x000000000800124c                RTC_IRQHandler
+                0x000000000800124c                DMA1_Channel4_5_6_7_IRQHandler
+                0x000000000800124c                EXTI4_15_IRQHandler
+                0x000000000800124c                RCC_IRQHandler
+                0x000000000800124c                DMA1_Channel1_IRQHandler
+                0x000000000800124c                Default_Handler
+                0x000000000800124c                TIM22_IRQHandler
+                0x000000000800124c                EXTI0_1_IRQHandler
+                0x000000000800124c                SPI2_IRQHandler
+                0x000000000800124c                WWDG_IRQHandler
+                0x000000000800124c                LPUART1_IRQHandler
+                0x000000000800124c                TIM2_IRQHandler
+                0x000000000800124c                USART2_IRQHandler
+                0x000000000800124c                FLASH_IRQHandler
+                0x000000000800124c                USART1_IRQHandler
+                0x000000000800124c                LPTIM1_IRQHandler
+ *fill*         0x000000000800124e        0x2 
  .text.HAL_Init
-                0x00000000080013cc       0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
-                0x00000000080013cc                HAL_Init
+                0x0000000008001250       0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
+                0x0000000008001250                HAL_Init
  .text.HAL_InitTick
-                0x000000000800140c       0x68 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
-                0x000000000800140c                HAL_InitTick
+                0x0000000008001290       0x68 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
+                0x0000000008001290                HAL_InitTick
  .text.HAL_IncTick
-                0x0000000008001474       0x24 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
-                0x0000000008001474                HAL_IncTick
+                0x00000000080012f8       0x24 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
+                0x00000000080012f8                HAL_IncTick
  .text.HAL_GetTick
-                0x0000000008001498       0x14 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
-                0x0000000008001498                HAL_GetTick
+                0x000000000800131c       0x14 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
+                0x000000000800131c                HAL_GetTick
  .text.HAL_Delay
-                0x00000000080014ac       0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
-                0x00000000080014ac                HAL_Delay
+                0x0000000008001330       0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
+                0x0000000008001330                HAL_Delay
  .text.HAL_ADC_Init
-                0x00000000080014f4      0x2e8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
-                0x00000000080014f4                HAL_ADC_Init
+                0x0000000008001378      0x2e8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
+                0x0000000008001378                HAL_ADC_Init
  .text.HAL_ADC_ConfigChannel
-                0x00000000080017dc      0x10c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
-                0x00000000080017dc                HAL_ADC_ConfigChannel
+                0x0000000008001660      0x10c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
+                0x0000000008001660                HAL_ADC_ConfigChannel
  .text.ADC_DelayMicroSecond
-                0x00000000080018e8       0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
+                0x000000000800176c       0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
  .text.__NVIC_EnableIRQ
-                0x0000000008001928       0x34 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
+                0x00000000080017ac       0x34 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
  .text.__NVIC_SetPriority
-                0x000000000800195c       0xdc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
+                0x00000000080017e0       0xdc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
  .text.SysTick_Config
-                0x0000000008001a38       0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
+                0x00000000080018bc       0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
  .text.HAL_NVIC_SetPriority
-                0x0000000008001a80       0x2a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
-                0x0000000008001a80                HAL_NVIC_SetPriority
+                0x0000000008001904       0x2a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
+                0x0000000008001904                HAL_NVIC_SetPriority
  .text.HAL_NVIC_EnableIRQ
-                0x0000000008001aaa       0x20 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
-                0x0000000008001aaa                HAL_NVIC_EnableIRQ
+                0x000000000800192e       0x20 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
+                0x000000000800192e                HAL_NVIC_EnableIRQ
  .text.HAL_SYSTICK_Config
-                0x0000000008001aca       0x1a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
-                0x0000000008001aca                HAL_SYSTICK_Config
+                0x000000000800194e       0x1a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
+                0x000000000800194e                HAL_SYSTICK_Config
  .text.HAL_DMA_Init
-                0x0000000008001ae4       0xf0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
-                0x0000000008001ae4                HAL_DMA_Init
- .text.HAL_DMA_Abort
-                0x0000000008001bd4       0x80 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
-                0x0000000008001bd4                HAL_DMA_Abort
- .text.HAL_DMA_Abort_IT
-                0x0000000008001c54       0x8e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
-                0x0000000008001c54                HAL_DMA_Abort_IT
+                0x0000000008001968       0xf0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
+                0x0000000008001968                HAL_DMA_Init
  .text.HAL_DMA_IRQHandler
-                0x0000000008001ce2      0x15c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
-                0x0000000008001ce2                HAL_DMA_IRQHandler
- *fill*         0x0000000008001e3e        0x2 
+                0x0000000008001a58      0x15c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
+                0x0000000008001a58                HAL_DMA_IRQHandler
  .text.HAL_GPIO_Init
-                0x0000000008001e40      0x2ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
-                0x0000000008001e40                HAL_GPIO_Init
+                0x0000000008001bb4      0x2ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
+                0x0000000008001bb4                HAL_GPIO_Init
  .text.HAL_GPIO_WritePin
-                0x000000000800212c       0x3a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
-                0x000000000800212c                HAL_GPIO_WritePin
+                0x0000000008001ea0       0x3a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
+                0x0000000008001ea0                HAL_GPIO_WritePin
  .text.HAL_GPIO_TogglePin
-                0x0000000008002166       0x36 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
-                0x0000000008002166                HAL_GPIO_TogglePin
+                0x0000000008001eda       0x36 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
+                0x0000000008001eda                HAL_GPIO_TogglePin
  .text.HAL_RCC_OscConfig
-                0x000000000800219c      0x6d4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
-                0x000000000800219c                HAL_RCC_OscConfig
+                0x0000000008001f10      0x6d4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+                0x0000000008001f10                HAL_RCC_OscConfig
  .text.HAL_RCC_ClockConfig
-                0x0000000008002870      0x290 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
-                0x0000000008002870                HAL_RCC_ClockConfig
+                0x00000000080025e4      0x290 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+                0x00000000080025e4                HAL_RCC_ClockConfig
  .text.HAL_RCC_MCOConfig
-                0x0000000008002b00      0x108 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
-                0x0000000008002b00                HAL_RCC_MCOConfig
+                0x0000000008002874      0x108 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+                0x0000000008002874                HAL_RCC_MCOConfig
  .text.HAL_RCC_EnableCSS
-                0x0000000008002c08       0x1c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
-                0x0000000008002c08                HAL_RCC_EnableCSS
+                0x000000000800297c       0x1c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+                0x000000000800297c                HAL_RCC_EnableCSS
  .text.HAL_RCC_GetSysClockFreq
-                0x0000000008002c24      0x14c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
-                0x0000000008002c24                HAL_RCC_GetSysClockFreq
+                0x0000000008002998      0x14c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+                0x0000000008002998                HAL_RCC_GetSysClockFreq
  .text.HAL_RCC_GetHCLKFreq
-                0x0000000008002d70       0x14 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
-                0x0000000008002d70                HAL_RCC_GetHCLKFreq
+                0x0000000008002ae4       0x14 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+                0x0000000008002ae4                HAL_RCC_GetHCLKFreq
  .text.HAL_RCC_GetPCLK1Freq
-                0x0000000008002d84       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
-                0x0000000008002d84                HAL_RCC_GetPCLK1Freq
+                0x0000000008002af8       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+                0x0000000008002af8                HAL_RCC_GetPCLK1Freq
  .text.HAL_RCC_GetPCLK2Freq
-                0x0000000008002db0       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
-                0x0000000008002db0                HAL_RCC_GetPCLK2Freq
+                0x0000000008002b24       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+                0x0000000008002b24                HAL_RCC_GetPCLK2Freq
  .text.HAL_RCC_NMI_IRQHandler
-                0x0000000008002ddc       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
-                0x0000000008002ddc                HAL_RCC_NMI_IRQHandler
+                0x0000000008002b50       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+                0x0000000008002b50                HAL_RCC_NMI_IRQHandler
  .text.HAL_RCC_CSSCallback
-                0x0000000008002e08        0xa ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
-                0x0000000008002e08                HAL_RCC_CSSCallback
- *fill*         0x0000000008002e12        0x2 
+                0x0000000008002b7c        0xa ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+                0x0000000008002b7c                HAL_RCC_CSSCallback
+ *fill*         0x0000000008002b86        0x2 
  .text.HAL_RCCEx_PeriphCLKConfig
-                0x0000000008002e14      0x274 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o
-                0x0000000008002e14                HAL_RCCEx_PeriphCLKConfig
+                0x0000000008002b88      0x274 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o
+                0x0000000008002b88                HAL_RCCEx_PeriphCLKConfig
  .text.HAL_SPI_Init
-                0x0000000008003088      0x128 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o
-                0x0000000008003088                HAL_SPI_Init
+                0x0000000008002dfc      0x128 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o
+                0x0000000008002dfc                HAL_SPI_Init
  .text.HAL_TIM_Base_Init
-                0x00000000080031b0       0x80 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
-                0x00000000080031b0                HAL_TIM_Base_Init
+                0x0000000008002f24       0x80 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x0000000008002f24                HAL_TIM_Base_Init
  .text.HAL_TIM_IRQHandler
-                0x0000000008003230      0x1d0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
-                0x0000000008003230                HAL_TIM_IRQHandler
+                0x0000000008002fa4      0x1d0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x0000000008002fa4                HAL_TIM_IRQHandler
  .text.HAL_TIM_ConfigClockSource
-                0x0000000008003400      0x1a8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
-                0x0000000008003400                HAL_TIM_ConfigClockSource
+                0x0000000008003174      0x1a8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x0000000008003174                HAL_TIM_ConfigClockSource
  .text.HAL_TIM_PeriodElapsedCallback
-                0x00000000080035a8       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
-                0x00000000080035a8                HAL_TIM_PeriodElapsedCallback
+                0x000000000800331c       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x000000000800331c                HAL_TIM_PeriodElapsedCallback
  .text.HAL_TIM_OC_DelayElapsedCallback
-                0x00000000080035b8       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
-                0x00000000080035b8                HAL_TIM_OC_DelayElapsedCallback
+                0x000000000800332c       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x000000000800332c                HAL_TIM_OC_DelayElapsedCallback
  .text.HAL_TIM_IC_CaptureCallback
-                0x00000000080035c8       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
-                0x00000000080035c8                HAL_TIM_IC_CaptureCallback
+                0x000000000800333c       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x000000000800333c                HAL_TIM_IC_CaptureCallback
  .text.HAL_TIM_PWM_PulseFinishedCallback
-                0x00000000080035d8       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
-                0x00000000080035d8                HAL_TIM_PWM_PulseFinishedCallback
+                0x000000000800334c       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x000000000800334c                HAL_TIM_PWM_PulseFinishedCallback
  .text.HAL_TIM_TriggerCallback
-                0x00000000080035e8       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
-                0x00000000080035e8                HAL_TIM_TriggerCallback
+                0x000000000800335c       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x000000000800335c                HAL_TIM_TriggerCallback
  .text.TIM_Base_SetConfig
-                0x00000000080035f8       0xa8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x000000000800336c       0xa8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
  .text.TIM_TI1_ConfigInputStage
-                0x00000000080036a0       0x5c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x0000000008003414       0x5c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
  .text.TIM_TI2_ConfigInputStage
-                0x00000000080036fc       0x64 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x0000000008003470       0x64 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
  .text.TIM_ITRx_SetConfig
-                0x0000000008003760       0x32 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
- *fill*         0x0000000008003792        0x2 
+                0x00000000080034d4       0x32 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+ *fill*         0x0000000008003506        0x2 
  .text.TIM_ETR_SetConfig
-                0x0000000008003794       0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x0000000008003508       0x40 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
  .text.HAL_TIMEx_MasterConfigSynchronization
-                0x00000000080037d4       0xb0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o
-                0x00000000080037d4                HAL_TIMEx_MasterConfigSynchronization
+                0x0000000008003548       0xb0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o
+                0x0000000008003548                HAL_TIMEx_MasterConfigSynchronization
  .text.HAL_UART_Init
-                0x0000000008003884       0xa8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x0000000008003884                HAL_UART_Init
+                0x00000000080035f8       0xa8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+                0x00000000080035f8                HAL_UART_Init
  .text.HAL_UART_Transmit
-                0x000000000800392c      0x13e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x000000000800392c                HAL_UART_Transmit
- *fill*         0x0000000008003a6a        0x2 
- .text.HAL_UART_Receive_IT
-                0x0000000008003a6c       0xbc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x0000000008003a6c                HAL_UART_Receive_IT
- .text.HAL_UART_IRQHandler
-                0x0000000008003b28      0x5c4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x0000000008003b28                HAL_UART_IRQHandler
- .text.HAL_UART_TxCpltCallback
-                0x00000000080040ec       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x00000000080040ec                HAL_UART_TxCpltCallback
- .text.HAL_UART_ErrorCallback
-                0x00000000080040fc       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x00000000080040fc                HAL_UART_ErrorCallback
- .text.HAL_UARTEx_RxEventCallback
-                0x000000000800410c       0x16 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x000000000800410c                HAL_UARTEx_RxEventCallback
- *fill*         0x0000000008004122        0x2 
+                0x00000000080036a0      0x13e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+                0x00000000080036a0                HAL_UART_Transmit
+ *fill*         0x00000000080037de        0x2 
+ .text.HAL_UART_Receive
+                0x00000000080037e0      0x1cc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+                0x00000000080037e0                HAL_UART_Receive
  .text.UART_SetConfig
-                0x0000000008004124      0x508 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x0000000008004124                UART_SetConfig
+                0x00000000080039ac      0x508 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+                0x00000000080039ac                UART_SetConfig
  .text.UART_AdvFeatureConfig
-                0x000000000800462c      0x168 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x000000000800462c                UART_AdvFeatureConfig
+                0x0000000008003eb4      0x168 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+                0x0000000008003eb4                UART_AdvFeatureConfig
  .text.UART_CheckIdleState
-                0x0000000008004794      0x150 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x0000000008004794                UART_CheckIdleState
+                0x000000000800401c      0x150 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+                0x000000000800401c                UART_CheckIdleState
  .text.UART_WaitOnFlagUntilTimeout
-                0x00000000080048e4       0xd2 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x00000000080048e4                UART_WaitOnFlagUntilTimeout
- *fill*         0x00000000080049b6        0x2 
- .text.UART_Start_Receive_IT
-                0x00000000080049b8      0x194 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
-                0x00000000080049b8                UART_Start_Receive_IT
+                0x000000000800416c       0xd2 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+                0x000000000800416c                UART_WaitOnFlagUntilTimeout
+ *fill*         0x000000000800423e        0x2 
  .text.UART_EndRxTransfer
-                0x0000000008004b4c       0xc8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
- .text.UART_DMAAbortOnError
-                0x0000000008004c14       0x2e ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
- .text.UART_EndTransmit_IT
-                0x0000000008004c42       0x56 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
- .text.UART_RxISR_8BIT
-                0x0000000008004c98      0x1c4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
- .text.UART_RxISR_16BIT
-                0x0000000008004e5c      0x1c4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
- .text.HAL_UARTEx_WakeupCallback
-                0x0000000008005020       0x10 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
-                0x0000000008005020                HAL_UARTEx_WakeupCallback
- .text.sprintf  0x0000000008005030       0x40 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-sprintf.o)
-                0x0000000008005030                sprintf
-                0x0000000008005030                siprintf
- .text.memset   0x0000000008005070       0x10 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-memset.o)
-                0x0000000008005070                memset
- .text.__errno  0x0000000008005080        0xc /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-errno.o)
-                0x0000000008005080                __errno
+                0x0000000008004240       0xc8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+ .text.sprintf  0x0000000008004308       0x40 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-sprintf.o)
+                0x0000000008004308                sprintf
+                0x0000000008004308                siprintf
+ .text.memset   0x0000000008004348       0x10 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-memset.o)
+                0x0000000008004348                memset
+ .text.__errno  0x0000000008004358        0xc /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-errno.o)
+                0x0000000008004358                __errno
  .text.__libc_init_array
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  .rodata.APBPrescTable
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-                0x00000000080059e8                APBPrescTable
+                0x0000000008004cc0        0x8 ./Core/Src/system_stm32l0xx.o
+                0x0000000008004cc0                APBPrescTable
  .rodata.PLLMulTable
-                0x00000000080059f0        0x9 ./Core/Src/system_stm32l0xx.o
-                0x00000000080059f0                PLLMulTable
- *fill*         0x00000000080059f9        0x3 
+                0x0000000008004cc8        0x9 ./Core/Src/system_stm32l0xx.o
+                0x0000000008004cc8                PLLMulTable
+ *fill*         0x0000000008004cd1        0x3 
  .rodata.UART_SetConfig
-                0x00000000080059fc       0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+                0x0000000008004cd4       0x48 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .rodata._svfprintf_r.str1.1
-                0x0000000008005a44       0x11 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-nano-svfprintf.o)
+                0x0000000008004d1c       0x11 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-nano-svfprintf.o)
  .rodata._printf_i.str1.1
-                0x0000000008005a55       0x22 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-nano-vfprintf_i.o)
-                0x0000000008005a78                . = ALIGN (0x4)
- *fill*         0x0000000008005a77        0x1 
+                0x0000000008004d2d       0x22 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-nano-vfprintf_i.o)
+                0x0000000008004d50                . = ALIGN (0x4)
+ *fill*         0x0000000008004d4f        0x1 
 
-.ARM.extab      0x0000000008005a78        0x0
-                0x0000000008005a78                . = ALIGN (0x4)
+.ARM.extab      0x0000000008004d50        0x0
+                0x0000000008004d50                . = ALIGN (0x4)
  *(.ARM.extab* .gnu.linkonce.armextab.*)
-                0x0000000008005a78                . = ALIGN (0x4)
+                0x0000000008004d50                . = ALIGN (0x4)
 
-.ARM            0x0000000008005a78        0x8
-                0x0000000008005a78                . = ALIGN (0x4)
-                0x0000000008005a78                __exidx_start = .
+.ARM            0x0000000008004d50        0x8
+                0x0000000008004d50                . = ALIGN (0x4)
+                0x0000000008004d50                __exidx_start = .
  *(.ARM.exidx*)
- .ARM.exidx     0x0000000008005a78        0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o)
-                0x0000000008005a80                __exidx_end = .
-                0x0000000008005a80                . = ALIGN (0x4)
+ .ARM.exidx     0x0000000008004d50        0x8 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o)
+                0x0000000008004d58                __exidx_end = .
+                0x0000000008004d58                . = ALIGN (0x4)
 
-.rel.dyn        0x0000000008005a80        0x0
- .rel.iplt      0x0000000008005a80        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o
+.rel.dyn        0x0000000008004d58        0x0
+ .rel.iplt      0x0000000008004d58        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o
 
-.preinit_array  0x0000000008005a80        0x0
-                0x0000000008005a80                . = ALIGN (0x4)
-                0x0000000008005a80                PROVIDE (__preinit_array_start = .)
+.preinit_array  0x0000000008004d58        0x0
+                0x0000000008004d58                . = ALIGN (0x4)
+                0x0000000008004d58                PROVIDE (__preinit_array_start = .)
  *(.preinit_array*)
-                0x0000000008005a80                PROVIDE (__preinit_array_end = .)
-                0x0000000008005a80                . = ALIGN (0x4)
+                0x0000000008004d58                PROVIDE (__preinit_array_end = .)
+                0x0000000008004d58                . = ALIGN (0x4)
 
-.init_array     0x0000000008005a80        0x4
-                0x0000000008005a80                . = ALIGN (0x4)
-                0x0000000008005a80                PROVIDE (__init_array_start = .)
+.init_array     0x0000000008004d58        0x4
+                0x0000000008004d58                . = ALIGN (0x4)
+                0x0000000008004d58                PROVIDE (__init_array_start = .)
  *(SORT_BY_NAME(.init_array.*))
  *(.init_array*)
- .init_array    0x0000000008005a80        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o
-                0x0000000008005a84                PROVIDE (__init_array_end = .)
-                0x0000000008005a84                . = ALIGN (0x4)
+ .init_array    0x0000000008004d58        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o
+                0x0000000008004d5c                PROVIDE (__init_array_end = .)
+                0x0000000008004d5c                . = ALIGN (0x4)
 
-.fini_array     0x0000000008005a84        0x4
-                0x0000000008005a84                . = ALIGN (0x4)
+.fini_array     0x0000000008004d5c        0x4
+                0x0000000008004d5c                . = ALIGN (0x4)
                 [!provide]                        PROVIDE (__fini_array_start = .)
  *(SORT_BY_NAME(.fini_array.*))
  *(.fini_array*)
- .fini_array    0x0000000008005a84        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o
+ .fini_array    0x0000000008004d5c        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o
                 [!provide]                        PROVIDE (__fini_array_end = .)
-                0x0000000008005a88                . = ALIGN (0x4)
-                0x0000000008005a88                _sidata = LOADADDR (.data)
+                0x0000000008004d60                . = ALIGN (0x4)
+                0x0000000008004d60                _sidata = LOADADDR (.data)
 
-.data           0x0000000020000000       0x5c load address 0x0000000008005a88
+.data           0x0000000020000000       0x5c load address 0x0000000008004d60
                 0x0000000020000000                . = ALIGN (0x4)
                 0x0000000020000000                _sdata = .
  *(.data)
@@ -4629,11 +4683,11 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
                 0x000000002000005c                . = ALIGN (0x4)
                 0x000000002000005c                _edata = .
 
-.igot.plt       0x000000002000005c        0x0 load address 0x0000000008005ae4
+.igot.plt       0x000000002000005c        0x0 load address 0x0000000008004dbc
  .igot.plt      0x000000002000005c        0x0 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o
                 0x000000002000005c                . = ALIGN (0x4)
 
-.bss            0x000000002000005c      0x3bc load address 0x0000000008005ae4
+.bss            0x000000002000005c      0x3b8 load address 0x0000000008004dbc
                 0x000000002000005c                _sbss = .
                 0x000000002000005c                __bss_start__ = _sbss
  *(.bss)
@@ -4652,37 +4706,33 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
                 0x000000002000022c                hspi1
  .bss.htim21    0x0000000020000284       0x40 ./Core/Src/main.o
                 0x0000000020000284                htim21
- .bss.onebyte   0x00000000200002c4        0x1 ./Core/Src/main.o
-                0x00000000200002c4                onebyte
- .bss.rec       0x00000000200002c5        0x1 ./Core/Src/main.o
-                0x00000000200002c5                rec
- *fill*         0x00000000200002c6        0x2 
  .bss.__sbrk_heap_end
-                0x00000000200002c8        0x4 ./Core/Src/sysmem.o
- .bss.uwTick    0x00000000200002cc        0x4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
-                0x00000000200002cc                uwTick
- .bss.__sf      0x00000000200002d0      0x138 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-findfp.o)
-                0x00000000200002d0                __sf
- .bss.errno     0x0000000020000408        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-reent.o)
-                0x0000000020000408                errno
+                0x00000000200002c4        0x4 ./Core/Src/sysmem.o
+ .bss.uwTick    0x00000000200002c8        0x4 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
+                0x00000000200002c8                uwTick
+ .bss.__sf      0x00000000200002cc      0x138 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-findfp.o)
+                0x00000000200002cc                __sf
+ .bss.errno     0x0000000020000404        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-reent.o)
+                0x0000000020000404                errno
  .bss.__lock___malloc_recursive_mutex
-                0x000000002000040c        0x1 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-lock.o)
-                0x000000002000040c                __lock___malloc_recursive_mutex
- *fill*         0x000000002000040d        0x3 
+                0x0000000020000408        0x1 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-lock.o)
+                0x0000000020000408                __lock___malloc_recursive_mutex
+ *fill*         0x0000000020000409        0x3 
  .bss.__malloc_free_list
-                0x0000000020000410        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-mallocr.o)
-                0x0000000020000410                __malloc_free_list
+                0x000000002000040c        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-mallocr.o)
+                0x000000002000040c                __malloc_free_list
  .bss.__malloc_sbrk_start
-                0x0000000020000414        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-mallocr.o)
-                0x0000000020000414                __malloc_sbrk_start
+                0x0000000020000410        0x4 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-mallocr.o)
+                0x0000000020000410                __malloc_sbrk_start
  *(COMMON)
-                0x0000000020000418                . = ALIGN (0x4)
-                0x0000000020000418                _ebss = .
-                0x0000000020000418                __bss_end__ = _ebss
+                0x0000000020000414                . = ALIGN (0x4)
+                0x0000000020000414                _ebss = .
+                0x0000000020000414                __bss_end__ = _ebss
 
 ._user_heap_stack
-                0x0000000020000418      0x600 load address 0x0000000008005ae4
+                0x0000000020000414      0x604 load address 0x0000000008004dbc
                 0x0000000020000418                . = ALIGN (0x8)
+ *fill*         0x0000000020000414        0x4 
                 [!provide]                        PROVIDE (end = .)
                 0x0000000020000418                PROVIDE (_end = .)
                 0x0000000020000618                . = (. + _Min_Heap_Size)
@@ -4704,101 +4754,97 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
  .ARM.attributes
                 0x000000000000001e       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o
  .ARM.attributes
-                0x000000000000004a       0x2c ./Core/Src/adf7012.o
+                0x000000000000004a       0x2c ./Core/Src/main.o
  .ARM.attributes
-                0x0000000000000076       0x2c ./Core/Src/main.o
+                0x0000000000000076       0x2c ./Core/Src/stm32l0xx_hal_msp.o
  .ARM.attributes
-                0x00000000000000a2       0x2c ./Core/Src/stm32l0xx_hal_msp.o
+                0x00000000000000a2       0x2c ./Core/Src/stm32l0xx_it.o
  .ARM.attributes
-                0x00000000000000ce       0x2c ./Core/Src/stm32l0xx_it.o
+                0x00000000000000ce       0x2c ./Core/Src/sysmem.o
  .ARM.attributes
-                0x00000000000000fa       0x2c ./Core/Src/sysmem.o
+                0x00000000000000fa       0x2c ./Core/Src/system_stm32l0xx.o
  .ARM.attributes
-                0x0000000000000126       0x2c ./Core/Src/system_stm32l0xx.o
+                0x0000000000000126       0x22 ./Core/Startup/startup_stm32l051r6tx.o
  .ARM.attributes
-                0x0000000000000152       0x22 ./Core/Startup/startup_stm32l051r6tx.o
+                0x0000000000000148       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
  .ARM.attributes
-                0x0000000000000174       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
+                0x0000000000000174       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
  .ARM.attributes
-                0x00000000000001a0       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
+                0x00000000000001a0       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
  .ARM.attributes
-                0x00000000000001cc       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
+                0x00000000000001cc       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
  .ARM.attributes
-                0x00000000000001f8       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
+                0x00000000000001f8       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
  .ARM.attributes
-                0x0000000000000224       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
+                0x0000000000000224       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
  .ARM.attributes
-                0x0000000000000250       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+                0x0000000000000250       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o
  .ARM.attributes
-                0x000000000000027c       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o
+                0x000000000000027c       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o
  .ARM.attributes
-                0x00000000000002a8       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o
+                0x00000000000002a8       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
  .ARM.attributes
-                0x00000000000002d4       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+                0x00000000000002d4       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o
  .ARM.attributes
-                0x0000000000000300       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o
+                0x0000000000000300       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
  .ARM.attributes
-                0x000000000000032c       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
+                0x000000000000032c       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-findfp.o)
  .ARM.attributes
-                0x0000000000000358       0x2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+                0x0000000000000358       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-sprintf.o)
  .ARM.attributes
-                0x0000000000000384       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-findfp.o)
+                0x0000000000000384       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-memset.o)
  .ARM.attributes
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  .ARM.attributes
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  .ARM.attributes
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  .ARM.attributes
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  .ARM.attributes
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+                0x0000000000000584       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-memmove.o)
  .ARM.attributes
-                0x00000000000005b0       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-nano-vfprintf_i.o)
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  .ARM.attributes
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  .ARM.attributes
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  .ARM.attributes
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+                0x0000000000000634       0x2c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc_nano.a(libc_a-reallocr.o)
  .ARM.attributes
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  .ARM.attributes
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+                0x000000000000068c       0x1e /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/libgcc.a(_thumb1_case_shi.o)
  .ARM.attributes
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  .ARM.attributes
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  .ARM.attributes
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  .ARM.attributes
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  .ARM.attributes
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  .ARM.attributes
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+                0x000000000000075c       0x1e /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/libgcc.a(_clzsi2.o)
  .ARM.attributes
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  .ARM.attributes
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- .ARM.attributes
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- .ARM.attributes
-                0x00000000000007f0       0x1e /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtn.o
+                0x0000000000000798       0x1e /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtn.o
 OUTPUT(radiosonda_m20.elf elf32-littlearm)
 LOAD linker stubs
 LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/../../../../arm-none-eabi/lib/thumb/v6-m/nofp/libc.a
@@ -4808,7 +4854,6 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
 .comment        0x0000000000000000       0x43
  .comment       0x0000000000000000       0x43 /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/crtbegin.o
                                          0x44 (size before relaxing)
- .comment       0x0000000000000043       0x44 ./Core/Src/adf7012.o
  .comment       0x0000000000000043       0x44 ./Core/Src/main.o
  .comment       0x0000000000000043       0x44 ./Core/Src/stm32l0xx_hal_msp.o
  .comment       0x0000000000000043       0x44 ./Core/Src/stm32l0xx_it.o
@@ -4825,297 +4870,230 @@ LOAD /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-
  .comment       0x0000000000000043       0x44 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
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- .debug_macro   0x0000000000012555      0x1fb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o
- .debug_macro   0x0000000000012750      0x1ed ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
- .debug_macro   0x000000000001293d      0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o
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+ .debug_macro   0x0000000000000203      0x1fb ./Core/Src/stm32l0xx_hal_msp.o
+ .debug_macro   0x00000000000003fe      0x205 ./Core/Src/stm32l0xx_it.o
+ .debug_macro   0x0000000000000603       0xff ./Core/Src/sysmem.o
+ .debug_macro   0x0000000000000702      0x23c ./Core/Src/sysmem.o
+ .debug_macro   0x000000000000093e      0x1ec ./Core/Src/system_stm32l0xx.o
+ .debug_macro   0x0000000000000b2a      0x210 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
+ .debug_macro   0x0000000000000d3a      0x1fb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
+ .debug_macro   0x0000000000000f35      0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
+ .debug_macro   0x0000000000001121      0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
+ .debug_macro   0x000000000000130d      0x1f3 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
+ .debug_macro   0x0000000000001500      0x222 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+ .debug_macro   0x0000000000001722      0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o
+ .debug_macro   0x000000000000190e      0x1fb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o
+ .debug_macro   0x0000000000001b09      0x1ed ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+ .debug_macro   0x0000000000001cf6      0x1ec ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o
+ .debug_macro   0x0000000000001ee2      0x217 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
 
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- .debug_line    0x0000000000001b9e      0x799 ./Core/Src/stm32l0xx_it.o
- .debug_line    0x0000000000002337      0x486 ./Core/Src/sysmem.o
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- .debug_line    0x0000000000002f57       0x7b ./Core/Startup/startup_stm32l051r6tx.o
- .debug_line    0x0000000000002fd2      0xa3d ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
- .debug_line    0x0000000000003a0f     0x114b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
- .debug_line    0x0000000000004b5a      0xb1b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
- .debug_line    0x0000000000005675      0xc2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
- .debug_line    0x00000000000062a1      0xacb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
- .debug_line    0x0000000000006d6c      0xe74 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
- .debug_line    0x0000000000007be0      0xaa6 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o
- .debug_line    0x0000000000008686     0x1c6a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o
- .debug_line    0x000000000000a2f0     0x2f5a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
- .debug_line    0x000000000000d24a      0x7b7 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o
- .debug_line    0x000000000000da01     0x2d19 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
- .debug_line    0x000000000001071a      0xc74 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
+.debug_line     0x0000000000000000     0xfe83
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+ .debug_line    0x0000000000001aa0      0x486 ./Core/Src/sysmem.o
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+ .debug_line    0x00000000000026c0       0x7b ./Core/Startup/startup_stm32l051r6tx.o
+ .debug_line    0x000000000000273b      0xa3d ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
+ .debug_line    0x0000000000003178     0x114b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
+ .debug_line    0x00000000000042c3      0xb1b ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
+ .debug_line    0x0000000000004dde      0xc2c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
+ .debug_line    0x0000000000005a0a      0xacb ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
+ .debug_line    0x00000000000064d5      0xe74 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+ .debug_line    0x0000000000007349      0xaa6 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o
+ .debug_line    0x0000000000007def     0x1c6a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o
+ .debug_line    0x0000000000009a59     0x2f5a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+ .debug_line    0x000000000000c9b3      0x7b7 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o
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-.debug_str      0x0000000000000000    0x77639
- .debug_str     0x0000000000000000    0x714f7 ./Core/Src/adf7012.o
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- .debug_str     0x00000000000714f7     0x1041 ./Core/Src/main.o
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- .debug_str     0x0000000000072538      0x115 ./Core/Src/stm32l0xx_hal_msp.o
+.debug_str      0x0000000000000000    0x773ef
+ .debug_str     0x0000000000000000    0x724ca ./Core/Src/main.o
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                                       0x724ff (size before relaxing)
- .debug_str     0x000000000007264d       0xff ./Core/Src/stm32l0xx_it.o
-                                      0x71e81 (size before relaxing)
- .debug_str     0x000000000007274c     0x202f ./Core/Src/sysmem.o
+ .debug_str     0x00000000000725df       0xeb ./Core/Src/stm32l0xx_it.o
+                                      0x71c02 (size before relaxing)
+ .debug_str     0x00000000000726ca     0x202f ./Core/Src/sysmem.o
                                        0x5f54 (size before relaxing)
- .debug_str     0x000000000007477b       0x99 ./Core/Src/system_stm32l0xx.o
+ .debug_str     0x00000000000746f9       0x99 ./Core/Src/system_stm32l0xx.o
                                       0x7121d (size before relaxing)
- .debug_str     0x0000000000074814       0x34 ./Core/Startup/startup_stm32l051r6tx.o
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                                          0x6a (size before relaxing)
- .debug_str     0x0000000000074848      0x468 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
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                                       0x718ee (size before relaxing)
- .debug_str     0x0000000000074cb0      0x340 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
+ .debug_str     0x0000000000074c2e      0x340 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
                                       0x71909 (size before relaxing)
- .debug_str     0x0000000000074ff0      0x263 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
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                                       0x71652 (size before relaxing)
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                                       0x71591 (size before relaxing)
- .debug_str     0x000000000007546c       0xe6 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
+ .debug_str     0x00000000000753ea       0xe6 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
                                       0x713bd (size before relaxing)
- .debug_str     0x0000000000075552      0x27c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
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                                       0x7171e (size before relaxing)
- .debug_str     0x00000000000757ce      0x120 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o
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                                       0x7144b (size before relaxing)
- .debug_str     0x00000000000758ee      0x567 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o
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                                       0x71b1a (size before relaxing)
- .debug_str     0x0000000000075e55      0xd4a ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
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                                       0x724e5 (size before relaxing)
- .debug_str     0x0000000000076b9f       0x57 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o
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                                       0x7169a (size before relaxing)
- .debug_str     0x0000000000076bf6      0x84c ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
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                                       0x71fdd (size before relaxing)
- .debug_str     0x0000000000077442      0x1f7 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart_ex.o
-                                      0x71892 (size before relaxing)
 
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+.debug_frame    0x0000000000000000     0x37c8
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+ .debug_frame   0x0000000000000140      0x12c ./Core/Src/stm32l0xx_hal_msp.o
+ .debug_frame   0x000000000000026c       0xd4 ./Core/Src/stm32l0xx_it.o
+ .debug_frame   0x0000000000000340       0x30 ./Core/Src/sysmem.o
+ .debug_frame   0x0000000000000370       0x4c ./Core/Src/system_stm32l0xx.o
+ .debug_frame   0x00000000000003bc      0x394 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal.o
+ .debug_frame   0x0000000000000750      0x3c0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_adc.o
+ .debug_frame   0x0000000000000b10      0x2fc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_cortex.o
+ .debug_frame   0x0000000000000e0c      0x1b0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_dma.o
+ .debug_frame   0x0000000000000fbc      0x110 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_gpio.o
+ .debug_frame   0x00000000000010cc      0x1a8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc.o
+ .debug_frame   0x0000000000001274       0xfc ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_rcc_ex.o
+ .debug_frame   0x0000000000001370      0x6f0 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_spi.o
+ .debug_frame   0x0000000000001a60      0xef8 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim.o
+ .debug_frame   0x0000000000002958       0x50 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_tim_ex.o
+ .debug_frame   0x00000000000029a8      0x854 ./Drivers/STM32L0xx_HAL_Driver/Src/stm32l0xx_hal_uart.o
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+ .debug_frame   0x000000000000378c       0x3c /opt/stm32cubeide/plugins/com.st.stm32cube.ide.mcu.externaltools.gnu-tools-for-stm32.11.3.rel1.linux64_1.1.100.202309141235/tools/bin/../lib/gcc/arm-none-eabi/11.3.1/thumb/v6-m/nofp/libgcc.a(_udivmoddi4.o)
 
 .debug_line_str
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diff --git a/code/radiosonda_m20.ioc b/code/radiosonda_m20.ioc
index 494f988..98621bf 100644
--- a/code/radiosonda_m20.ioc
+++ b/code/radiosonda_m20.ioc
@@ -83,7 +83,6 @@ MxDb.Version=DB.6.0.100
 NVIC.DMA1_Channel2_3_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true
 NVIC.ForceEnableDMAVector=true
 NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
-NVIC.LPUART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
 NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false
 NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
 NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true