kopia lustrzana https://github.com/keenerd/rtl-sdr
r82xx: tejeez's if/bw filters
Kyle Keen
rodzic
3f2632dcaf
commit
a7caaac7a4
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@ -144,6 +144,10 @@ RTLSDR_API int rtlsdr_read_eeprom(rtlsdr_dev_t *dev, uint8_t *data,
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RTLSDR_API int rtlsdr_set_center_freq(rtlsdr_dev_t *dev, uint32_t freq);
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RTLSDR_API int rtlsdr_set_if_freq(rtlsdr_dev_t *dev, uint32_t freq);
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RTLSDR_API int rtlsdr_set_if_bandwidth(rtlsdr_dev_t *dev, int bw);
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/*!
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* Get actual frequency the device is tuned to.
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*
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@ -32,7 +32,8 @@
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#define R82XX_CHECK_ADDR 0x00
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#define R82XX_CHECK_VAL 0x69
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#define R82XX_IF_FREQ 3570000
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#define R82XX_DEFAULT_IF_FREQ 6000000
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#define R82XX_DEFAULT_IF_BW 2000000
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#define REG_SHADOW_START 5
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#define NUM_REGS 30
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@ -118,5 +119,7 @@ int r82xx_set_freq(struct r82xx_priv *priv, uint32_t freq);
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int r82xx_set_gain(struct r82xx_priv *priv, int set_manual_gain, int gain);
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int r82xx_set_nomod(struct r82xx_priv *priv);
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int r82xx_set_dither(struct r82xx_priv *priv, int dither);
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int r82xx_set_bw(struct r82xx_priv *priv, uint32_t bw);
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int r82xx_set_if_freq(struct r82xx_priv *priv, uint32_t freq);
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#endif
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@ -64,6 +64,7 @@ typedef struct rtlsdr_tuner_iface {
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int (*set_gain)(void *, int gain /* tenth dB */);
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int (*set_if_gain)(void *, int stage, int gain /* tenth dB */);
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int (*set_gain_mode)(void *, int manual);
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int (*set_if_freq)(void *, uint32_t freq /* Hz */);
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} rtlsdr_tuner_iface_t;
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enum rtlsdr_async_status {
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@ -123,6 +124,7 @@ struct rtlsdr_dev {
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int dev_lost;
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int driver_active;
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unsigned int xfer_errors;
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int tuner_initialized;
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};
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void rtlsdr_set_gpio_bit(rtlsdr_dev_t *dev, uint8_t gpio, int val);
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@ -238,7 +240,17 @@ int r820t_set_freq(void *dev, uint32_t freq) {
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rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
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return r82xx_set_freq(&devt->r82xx_p, freq);
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}
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int r820t_set_bw(void *dev, int bw) { return 0; }
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int r820t_set_bw(void *dev, int bw) {
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rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
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return r82xx_set_bw(&devt->r82xx_p, bw);
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}
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int r820t_set_if_freq(void *dev, uint32_t freq) {
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rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
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return r82xx_set_if_freq(&devt->r82xx_p, freq);
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}
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int r820t_set_gain(void *dev, int gain) {
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rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
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return r82xx_set_gain(&devt->r82xx_p, 1, gain);
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@ -251,37 +263,37 @@ int r820t_set_gain_mode(void *dev, int manual) {
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/* definition order must match enum rtlsdr_tuner */
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static rtlsdr_tuner_iface_t tuners[] = {
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{
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NULL, NULL, NULL, NULL, NULL, NULL, NULL /* dummy for unknown tuners */
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NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL /* dummy for unknown tuners */
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},
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{
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e4000_init, e4000_exit,
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e4000_set_freq, e4000_set_bw, e4000_set_gain, e4000_set_if_gain,
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e4000_set_gain_mode
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e4000_set_gain_mode, NULL
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},
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{
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_fc0012_init, fc0012_exit,
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fc0012_set_freq, fc0012_set_bw, _fc0012_set_gain, NULL,
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fc0012_set_gain_mode
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fc0012_set_gain_mode, NULL
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},
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{
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_fc0013_init, fc0013_exit,
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fc0013_set_freq, fc0013_set_bw, _fc0013_set_gain, NULL,
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fc0013_set_gain_mode
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fc0013_set_gain_mode, NULL
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},
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{
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fc2580_init, fc2580_exit,
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_fc2580_set_freq, fc2580_set_bw, fc2580_set_gain, NULL,
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fc2580_set_gain_mode
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fc2580_set_gain_mode, NULL
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},
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{
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r820t_init, r820t_exit,
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r820t_set_freq, r820t_set_bw, r820t_set_gain, NULL,
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r820t_set_gain_mode
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r820t_set_gain_mode, r820t_set_if_freq
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},
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{
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r820t_init, r820t_exit,
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r820t_set_freq, r820t_set_bw, r820t_set_gain, NULL,
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r820t_set_gain_mode
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r820t_set_gain_mode, r820t_set_if_freq
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},
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};
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@ -662,6 +674,7 @@ int rtlsdr_deinit_baseband(rtlsdr_dev_t *dev)
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rtlsdr_set_i2c_repeater(dev, 1);
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r = dev->tuner->exit(dev); /* deinitialize tuner */
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rtlsdr_set_i2c_repeater(dev, 0);
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dev->tuner_initialized = 0;
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}
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/* poweroff demodulator and ADCs */
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@ -693,6 +706,14 @@ int rtlsdr_set_if_freq(rtlsdr_dev_t *dev, uint32_t freq)
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tmp = if_freq & 0xff;
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r |= rtlsdr_demod_write_reg(dev, 1, 0x1b, tmp, 1);
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/* Tell the R820T driver which IF frequency we are currently using
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* so that it can choose the optimal IF filter settings.
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* Works for normal tuning as well as no-mod direct sampling! */
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if(dev->tuner_initialized && dev->tuner && dev->tuner->set_if_freq) {
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rtlsdr_set_i2c_repeater(dev, 1);
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dev->tuner->set_if_freq(dev, freq);
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rtlsdr_set_i2c_repeater(dev, 0);
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}
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return r;
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}
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@ -1144,6 +1165,7 @@ int rtlsdr_set_direct_sampling(rtlsdr_dev_t *dev, int on)
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rtlsdr_set_i2c_repeater(dev, 1);
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r = dev->tuner->exit(dev);
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rtlsdr_set_i2c_repeater(dev, 0);
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dev->tuner_initialized = 0;
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}
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}
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@ -1153,6 +1175,7 @@ int rtlsdr_set_direct_sampling(rtlsdr_dev_t *dev, int on)
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fprintf(stderr, "Tuning E4000 to 3708 MHz\n");
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rtlsdr_set_i2c_repeater(dev, 1);
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dev->tuner->init(dev);
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dev->tuner_initialized = 1;
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dev->tuner->set_freq(dev, 3708000000u);
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e4000_set_bw(dev, 15000000);
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rtlsdr_set_i2c_repeater(dev, 0);
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@ -1161,6 +1184,7 @@ int rtlsdr_set_direct_sampling(rtlsdr_dev_t *dev, int on)
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rtlsdr_dev_t* devt = (rtlsdr_dev_t*)dev;
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rtlsdr_set_i2c_repeater(dev, 1);
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dev->tuner->init(dev);
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dev->tuner_initialized = 1;
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r82xx_set_nomod(&devt->r82xx_p);
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rtlsdr_set_i2c_repeater(dev, 0);
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}
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@ -1190,11 +1214,12 @@ int rtlsdr_set_direct_sampling(rtlsdr_dev_t *dev, int on)
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rtlsdr_set_i2c_repeater(dev, 1);
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r |= dev->tuner->init(dev);
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rtlsdr_set_i2c_repeater(dev, 0);
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dev->tuner_initialized = 1;
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}
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if ((dev->tuner_type == RTLSDR_TUNER_R820T) ||
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(dev->tuner_type == RTLSDR_TUNER_R828D)) {
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r |= rtlsdr_set_if_freq(dev, R82XX_IF_FREQ);
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r |= rtlsdr_set_if_freq(dev, R82XX_DEFAULT_IF_FREQ);
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/* enable spectrum inversion */
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r |= rtlsdr_demod_write_reg(dev, 1, 0x15, 0x01, 1);
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@ -1585,7 +1610,7 @@ found:
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/* the R82XX use 3.57 MHz IF for the DVB-T 6 MHz mode, and
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* 4.57 MHz for the 8 MHz mode */
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rtlsdr_set_if_freq(dev, R82XX_IF_FREQ);
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rtlsdr_set_if_freq(dev, R82XX_DEFAULT_IF_FREQ);
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/* enable spectrum inversion */
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rtlsdr_demod_write_reg(dev, 1, 0x15, 0x01, 1);
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@ -1598,8 +1623,10 @@ found:
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break;
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}
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if (dev->tuner->init)
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if (dev->tuner->init) {
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r = dev->tuner->init(dev);
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dev->tuner_initialized = 1;
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}
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rtlsdr_set_i2c_repeater(dev, 0);
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@ -760,104 +760,29 @@ static int r82xx_sysfreq_sel(struct r82xx_priv *priv, uint32_t freq,
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return 0;
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}
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static int r82xx_set_tv_standard(struct r82xx_priv *priv,
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static int r82xx_init_tv_standard(struct r82xx_priv *priv,
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unsigned bw,
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enum r82xx_tuner_type type,
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uint32_t delsys)
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{
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/* everything that was previously done in r82xx_set_tv_standard
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* and doesn't need to be changed when filter settings change */
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int rc, i;
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uint32_t if_khz, filt_cal_lo;
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uint8_t data[5];
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uint8_t filt_gain, img_r, filt_q, hp_cor, ext_enable, loop_through;
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uint8_t data[5], val;
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uint8_t filt_gain, img_r, ext_enable, loop_through;
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uint8_t lt_att, flt_ext_widest, polyfil_cur;
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int need_calibration;
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if (delsys == SYS_ISDBT) {
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if_khz = 4063;
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filt_cal_lo = 59000;
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filt_gain = 0x10; /* +3db, 6mhz on */
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img_r = 0x00; /* image negative */
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filt_q = 0x10; /* r10[4]:low q(1'b1) */
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hp_cor = 0x6a; /* 1.7m disable, +2cap, 1.25mhz */
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ext_enable = 0x40; /* r30[6], ext enable; r30[5]:0 ext at lna max */
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loop_through = 0x00; /* r5[7], lt on */
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lt_att = 0x00; /* r31[7], lt att enable */
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flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
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polyfil_cur = 0x60; /* r25[6:5]:min */
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} else {
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if (bw < 6) {
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/* narrowest bandwidth? */
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if_khz = 3570;
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filt_cal_lo = 56000; /* 52000->56000 */
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filt_gain = 0x10; /* +3db, 6mhz on */
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img_r = 0x00; /* image negative */
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filt_q = 0x10; /* r10[4]:low q(1'b1) */
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hp_cor = 0x6a; /* 1.7m disable, +2cap, 1.25mhz */
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ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
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loop_through = 0x00; /* r5[7], lt on */
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lt_att = 0x00; /* r31[7], lt att enable */
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flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
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polyfil_cur = 0x60; /* r25[6:5]:min */
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} else if (bw == 6) {
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if_khz = 3570;
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filt_cal_lo = 56000; /* 52000->56000 */
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filt_gain = 0x10; /* +3db, 6mhz on */
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img_r = 0x00; /* image negative */
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filt_q = 0x10; /* r10[4]:low q(1'b1) */
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hp_cor = 0x6b; /* 1.7m disable, +2cap, 1.0mhz */
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ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
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loop_through = 0x00; /* r5[7], lt on */
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lt_att = 0x00; /* r31[7], lt att enable */
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flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
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polyfil_cur = 0x60; /* r25[6:5]:min */
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} else if (bw == 7) {
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#if 0
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/*
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* There are two 7 MHz tables defined on the original
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* driver, but just the second one seems to be visible
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* by rtl2832. Keep this one here commented, as it
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* might be needed in the future
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*/
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if_khz = 4070;
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filt_cal_lo = 60000;
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filt_gain = 0x10; /* +3db, 6mhz on */
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img_r = 0x00; /* image negative */
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filt_q = 0x10; /* r10[4]:low q(1'b1) */
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hp_cor = 0x2b; /* 1.7m disable, +1cap, 1.0mhz */
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ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
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loop_through = 0x00; /* r5[7], lt on */
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lt_att = 0x00; /* r31[7], lt att enable */
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flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
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polyfil_cur = 0x60; /* r25[6:5]:min */
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#endif
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/* 7 MHz, second table */
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if_khz = 4570;
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filt_cal_lo = 63000;
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filt_gain = 0x10; /* +3db, 6mhz on */
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img_r = 0x00; /* image negative */
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filt_q = 0x10; /* r10[4]:low q(1'b1) */
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hp_cor = 0x2a; /* 1.7m disable, +1cap, 1.25mhz */
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ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
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loop_through = 0x00; /* r5[7], lt on */
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lt_att = 0x00; /* r31[7], lt att enable */
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flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
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polyfil_cur = 0x60; /* r25[6:5]:min */
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} else {
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if_khz = 4570;
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filt_cal_lo = 68500;
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filt_gain = 0x10; /* +3db, 6mhz on */
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img_r = 0x00; /* image negative */
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filt_q = 0x10; /* r10[4]:low q(1'b1) */
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hp_cor = 0x0b; /* 1.7m disable, +0cap, 1.0mhz */
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ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
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loop_through = 0x00; /* r5[7], lt on */
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lt_att = 0x00; /* r31[7], lt att enable */
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flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
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polyfil_cur = 0x60; /* r25[6:5]:min */
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}
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}
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if_khz = R82XX_DEFAULT_IF_FREQ/1000;
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filt_cal_lo = 56000; /* 52000->56000 */
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filt_gain = 0x10; /* +3db, 6mhz on */
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img_r = 0x00; /* image negative */
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ext_enable = 0x60; /* r30[6]=1 ext enable; r30[5]:1 ext at lna max-1 */
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loop_through = 0x00; /* r5[7], lt on */
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lt_att = 0x00; /* r31[7], lt att enable */
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flt_ext_widest = 0x00; /* r15[7]: flt_ext_wide off */
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polyfil_cur = 0x60; /* r25[6:5]:min */
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/* Initialize the shadow registers */
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memcpy(priv->regs, r82xx_init_array, sizeof(r82xx_init_array));
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@ -881,72 +806,6 @@ static int r82xx_set_tv_standard(struct r82xx_priv *priv,
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}
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priv->int_freq = if_khz * 1000;
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/* Check if standard changed. If so, filter calibration is needed */
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/* as we call this function only once in rtlsdr, force calibration */
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need_calibration = 1;
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if (need_calibration) {
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for (i = 0; i < 2; i++) {
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/* Set filt_cap */
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rc = r82xx_write_reg_mask(priv, 0x0b, hp_cor, 0x60);
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if (rc < 0)
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return rc;
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/* set cali clk =on */
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rc = r82xx_write_reg_mask(priv, 0x0f, 0x04, 0x04);
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if (rc < 0)
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return rc;
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/* X'tal cap 0pF for PLL */
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rc = r82xx_write_reg_mask(priv, 0x10, 0x00, 0x03);
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if (rc < 0)
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return rc;
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rc = r82xx_set_pll(priv, filt_cal_lo * 1000);
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if (rc < 0 || !priv->has_lock)
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return rc;
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/* Start Trigger */
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rc = r82xx_write_reg_mask(priv, 0x0b, 0x10, 0x10);
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if (rc < 0)
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return rc;
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// usleep_range(1000, 2000);
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/* Stop Trigger */
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rc = r82xx_write_reg_mask(priv, 0x0b, 0x00, 0x10);
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if (rc < 0)
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return rc;
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/* set cali clk =off */
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rc = r82xx_write_reg_mask(priv, 0x0f, 0x00, 0x04);
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if (rc < 0)
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return rc;
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/* Check if calibration worked */
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rc = r82xx_read(priv, 0x00, data, sizeof(data));
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if (rc < 0)
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return rc;
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priv->fil_cal_code = data[4] & 0x0f;
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if (priv->fil_cal_code && priv->fil_cal_code != 0x0f)
|
||||
break;
|
||||
}
|
||||
/* narrowest */
|
||||
if (priv->fil_cal_code == 0x0f)
|
||||
priv->fil_cal_code = 0;
|
||||
}
|
||||
|
||||
rc = r82xx_write_reg_mask(priv, 0x0a,
|
||||
filt_q | priv->fil_cal_code, 0x1f);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* Set BW, Filter_gain, & HP corner */
|
||||
rc = r82xx_write_reg_mask(priv, 0x0b, hp_cor, 0xef);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* Set Img_R */
|
||||
rc = r82xx_write_reg_mask(priv, 0x07, img_r, 0x80);
|
||||
if (rc < 0)
|
||||
|
|
@ -985,11 +844,79 @@ static int r82xx_set_tv_standard(struct r82xx_priv *priv,
|
|||
/* Store current standard. If it changes, re-calibrate the tuner */
|
||||
priv->delsys = delsys;
|
||||
priv->type = type;
|
||||
priv->bw = bw;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int r82xx_set_if_filter(struct r82xx_priv *priv, int hpf, int lpf) {
|
||||
int rc, i;
|
||||
uint8_t filt_q, hp_cor;
|
||||
int cal;
|
||||
filt_q = 0x10; /* r10[4]:low q(1'b1) */
|
||||
|
||||
if(lpf <= 2500) {
|
||||
hp_cor = 0xE0; /* 1.7m enable, +2cap */
|
||||
cal = 16*(2500-lpf) / (2500-2000);
|
||||
} else if(lpf <= 3100) {
|
||||
hp_cor = 0xA0; /* 1.7m enable, +1cap */
|
||||
cal = 16*(3100-lpf) / (3100-2200);
|
||||
} else if(lpf <= 3900) {
|
||||
hp_cor = 0x80; /* 1.7m enable, +0cap */
|
||||
cal = 16*(3900-lpf) / (3900-2600);
|
||||
} else if(lpf <= 7100) {
|
||||
hp_cor = 0x60; /* 1.7m disable, +2cap */
|
||||
cal = 16*(7100-lpf) / (7100-5300);
|
||||
} else if(lpf <= 8700) {
|
||||
hp_cor = 0x20; /* 1.7m disable, +1cap */
|
||||
cal = 16*(8700-lpf) / (8700-6300);
|
||||
} else {
|
||||
hp_cor = 0x00; /* 1.7m disable, +0cap */
|
||||
cal = 16*(11000-lpf) / (11000-7500);
|
||||
}
|
||||
|
||||
if(hpf >= 4700) hp_cor |= 0x00; /* 5 MHz */
|
||||
else if(hpf >= 3800) hp_cor |= 0x01; /* 4 MHz */
|
||||
else if(hpf >= 3000) hp_cor |= 0x02; /* -12dB @ 2.25 MHz */
|
||||
else if(hpf >= 2800) hp_cor |= 0x03; /* -8dB @ 2.25 MHz */
|
||||
else if(hpf >= 2600) hp_cor |= 0x04; /* -4dB @ 2.25 MHz */
|
||||
else if(hpf >= 2400) hp_cor |= 0x05; /* -12dB @ 1.75 MHz */
|
||||
else if(hpf >= 2200) hp_cor |= 0x06; /* -8dB @ 1.75 MHz */
|
||||
else if(hpf >= 2000) hp_cor |= 0x07; /* -4dB @ 1.75 MHz */
|
||||
else if(hpf >= 1800) hp_cor |= 0x08; /* -12dB @ 1.25 MHz */
|
||||
else if(hpf >= 1600) hp_cor |= 0x09; /* -8dB @ 1.25 MHz */
|
||||
else if(hpf >= 1400) hp_cor |= 0x0A; /* -4dB @ 1.25 MHz */
|
||||
else hp_cor |= 0x0B;
|
||||
|
||||
|
||||
if(cal < 0) cal = 0;
|
||||
else if(cal > 15) cal = 15;
|
||||
priv->fil_cal_code = cal;
|
||||
|
||||
fprintf(stderr, "Setting IF filter for %d...%d kHz: hp_cor=0x%02x, fil_cal_code=%d\n", hpf, lpf, hp_cor, cal);
|
||||
|
||||
rc = r82xx_write_reg_mask(priv, 0x0a,
|
||||
filt_q | priv->fil_cal_code, 0x1f);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
/* Set BW, Filter_gain, & HP corner */
|
||||
rc = r82xx_write_reg_mask(priv, 0x0b, hp_cor, 0xef);
|
||||
if (rc < 0)
|
||||
return rc;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int r82xx_set_bw(struct r82xx_priv *priv, uint32_t bw) {
|
||||
priv->bw = bw;
|
||||
return r82xx_set_if_filter(priv, ((int)priv->int_freq - (int)bw/2)/1000, ((int)priv->int_freq + (int)bw/2)/1000);
|
||||
}
|
||||
|
||||
int r82xx_set_if_freq(struct r82xx_priv *priv, uint32_t freq) {
|
||||
priv->int_freq = freq;
|
||||
return r82xx_set_if_filter(priv, ((int)freq - (int)priv->bw/2)/1000, ((int)freq + (int)priv->bw/2)/1000);
|
||||
}
|
||||
|
||||
static int r82xx_read_gain(struct r82xx_priv *priv)
|
||||
{
|
||||
uint8_t data[4];
|
||||
|
|
@ -1127,9 +1054,9 @@ int r82xx_set_nomod(struct r82xx_priv *priv)
|
|||
|
||||
fprintf(stderr, "Using R820T no-mod direct sampling mode\n");
|
||||
|
||||
rc = r82xx_set_tv_standard(priv, 8, TUNER_DIGITAL_TV, 0);
|
||||
/*rc = r82xx_set_bw(priv, 1000000);
|
||||
if (rc < 0)
|
||||
goto err;
|
||||
goto err;*/
|
||||
|
||||
/* experimentally determined magic numbers
|
||||
* needs more experimenting with all the registers */
|
||||
|
|
@ -1275,11 +1202,14 @@ int r82xx_init(struct r82xx_priv *priv)
|
|||
rc = r82xx_write(priv, 0x05,
|
||||
r82xx_init_array, sizeof(r82xx_init_array));
|
||||
|
||||
rc = r82xx_set_tv_standard(priv, 3, TUNER_DIGITAL_TV, 0);
|
||||
if (rc < 0)
|
||||
goto err;
|
||||
rc |= r82xx_init_tv_standard(priv, 3, TUNER_DIGITAL_TV, 0);
|
||||
|
||||
rc = r82xx_sysfreq_sel(priv, 0, TUNER_DIGITAL_TV, SYS_DVBT);
|
||||
priv->bw = R82XX_DEFAULT_IF_BW;
|
||||
priv->int_freq = R82XX_DEFAULT_IF_FREQ;
|
||||
/* r82xx_set_bw will always be called by rtlsdr_set_sample_rate,
|
||||
so there's no need to call r82xx_set_if_filter here */
|
||||
|
||||
rc |= r82xx_sysfreq_sel(priv, 0, TUNER_DIGITAL_TV, SYS_DVBT);
|
||||
|
||||
priv->init_done = 1;
|
||||
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue