Fix for TR command (always clear accs), fix for high ISR rate (not sure why this changed, but now at 40.0218 ms.

feature/Issue_219_CMArcCommand
EmbeddedMan 2023-12-17 12:44:02 -06:00
rodzic aa23edb61b
commit c1afd7a8d8
3 zmienionych plików z 9 dodań i 4 usunięć

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@ -35,11 +35,14 @@
<word>Bitfield</word>
<word>bootup</word>
<word>breifly</word>
<word>codebase</word>
<word>comamnds</word>
<word>Fosc</word>
<word>init</word>
<word>microstep</word>
<word>paramters</word>
<word>Prescale</word>
<word>refactor</word>
<word>struct</word>
</spellchecker-wordlist>
</configuration>

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@ -3113,6 +3113,7 @@ void parse_TR_packet(void)
gSteps1 = TR_Pos1;
gSteps2 = TR_Pos2;
gHM_StepRate = TR_StepRate;
gClearAccs = 3; // Always clear accumulators for testing
process_simple_rate_move();
}
@ -3126,9 +3127,10 @@ void parse_TR_packet(void)
// 0x007FFFFF.
//
// This function uses these as input parameters:
// gHM_StepRate (not modified)
// gSteps1 (modified)
// gSteps2 (modified)
// gHM_StepRate (not modified)
// gSteps1 (modified)
// gSteps2 (modified)
// gClearAccs (not modified)
void process_simple_rate_move(void)
{
if(bittst(TestMode, TEST_MODE_DEBUG_COMMAND_BIT_NUM))

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@ -219,7 +219,7 @@ typedef struct
// The values here are hand tuned for 25KHz ISR operation
// 0xFE30 = 25.00 KHz
#define TIMER1_L_RELOAD 0x30
#define TIMER1_L_RELOAD 0x36
#define TIMER1_H_RELOAD 0xFE
#define HIGH_ISR_TICKS_PER_MS (25u) // Note: computed by hand, could be formula