kopia lustrzana https://github.com/pjalocha/esp32-ogn-tracker
Move towards LoRaWAN connectivity
Pawel Jalocha
rodzic
553baa500d
commit
b0c1f7f3e1
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@ -12,8 +12,8 @@ class FlightMonitor
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GPS_Position MaxAltitude; // est. positon at peak altitude
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// GPS_Position Recent;
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// const char *IGCpath;
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static const uint8_t MinHold = 5; // [sec] minimum hold time before takeoff declared
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static const uint16_t MinSpeed = 60; // [0.1m/s] minimum speed to trigger the takeoff
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static const uint8_t MinHold = 5; // [sec] minimum hold time before takeoff declared
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static const uint16_t MinSpeed = 50; // [0.1m/s] minimum speed to trigger the takeoff
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uint8_t HoldTime;
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// uint8_t TakeoffCount; // count take-off/landing cycles for the IGC file name
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@ -57,6 +57,7 @@ class FlightMonitor
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static int FlightThresh(const GPS_Position &Position, uint16_t MinSpeed) // does the GPS position meed the in-flight criteria ?
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{ if(!Position.isValid()) return -1;
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if(Position.Altitude>20000) return 1; // [0.1] Altitude above 2000m implies a flight
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uint16_t Speed=Position.Speed; // [0.1m/s] Horizontal speed
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int16_t Climb=Position.ClimbRate; // [0.1m/s] Vertical speed
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uint8_t DOP=Position.PDOP; if(DOP==0) DOP=Position.HDOP; // [0.1] Dilution of Precision
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@ -408,7 +408,7 @@ static void ProcessRxPacket(OGN_RxPacket<OGN_Packet> *RxPacket, uint8_t RxPacket
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}
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}
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static void DecodeRxPacket(RFM_RxPktData *RxPkt)
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static void DecodeRxPacket(RFM_FSK_RxPktData *RxPkt)
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{
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uint8_t RxPacketIdx = RelayQueue.getNew(); // get place for this new packet
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OGN_RxPacket<OGN_Packet> *RxPacket = RelayQueue[RxPacketIdx];
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@ -466,7 +466,7 @@ void vTaskPROC(void* pvParameters)
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for( ; ; )
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{ vTaskDelay(1);
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RFM_RxPktData *RxPkt = RF_RxFIFO.getRead(); // check for new received packets
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RFM_FSK_RxPktData *RxPkt = RF_RxFIFO.getRead(); // check for new received packets
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if(RxPkt) // if there is a new received packet
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{
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#ifdef DEBUG_PRINT
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23
main/rf.cpp
23
main/rf.cpp
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@ -27,7 +27,7 @@ static const uint8_t *OGN_SYNC = OGN2_SYNC;
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static uint32_t RF_SlotTime; // [sec] UTC time which belongs to the current time slot (0.3sec late by GPS UTC)
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FreqPlan RF_FreqPlan; // frequency hopping pattern calculator
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FIFO<RFM_RxPktData, 16> RF_RxFIFO; // buffer for received packets
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FIFO<RFM_FSK_RxPktData, 16> RF_RxFIFO; // buffer for received packets
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FIFO<OGN_TxPacket<OGN_Packet>, 4> RF_TxFIFO; // buffer for transmitted packets
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#ifdef WITH_FANET
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@ -58,15 +58,15 @@ static void SetTxChannel(uint8_t TxChan=RX_Channel) // default channel t
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TRX.WriteTxPower(Parameters.getTxPower(), Parameters.isTxTypeHW()); // set TX for transmission
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#endif
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#if defined(WITH_RFM95) || defined(WITH_SX1272)
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TRX.WriteTxPower(Parameters.getTxPower()); // set TX for transmission
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TRX.WriteTxPower(Parameters.getTxPower()); // set TX for transmission
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#endif
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TRX.setChannel(TxChan&0x7F);
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TRX.WriteSYNC(8, 7, OGN_SYNC); } // Full SYNC for TX
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TRX.FSK_WriteSYNC(8, 7, OGN_SYNC); } // Full SYNC for TX
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static void SetRxChannel(uint8_t RxChan=RX_Channel)
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{ TRX.WriteTxPowerMin(); // setup for RX
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TRX.setChannel(RxChan&0x7F);
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TRX.WriteSYNC(7, 7, OGN_SYNC); } // Shorter SYNC for RX
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TRX.FSK_WriteSYNC(7, 7, OGN_SYNC); } // Shorter SYNC for RX
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static uint8_t ReceivePacket(void) // see if a packet has arrived
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{ if(!TRX.DIO0_isOn()) return 0; // DIO0 line HIGH signals a new packet has arrived
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@ -76,7 +76,7 @@ static uint8_t ReceivePacket(void) // see if a pack
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uint8_t RxRSSI = TRX.ReadRSSI(); // signal strength for the received packet
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RX_Random = (RX_Random<<1) | (RxRSSI&1); // use the lowest bit to add entropy
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RFM_RxPktData *RxPkt = RF_RxFIFO.getWrite();
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RFM_FSK_RxPktData *RxPkt = RF_RxFIFO.getWrite();
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RxPkt->Time = RF_SlotTime; // store reception time
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RxPkt->msTime = TimeSync_msTime(); if(RxPkt->msTime<200) RxPkt->msTime+=1000;
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RxPkt->Channel = RX_Channel; // store reception channel
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@ -177,7 +177,7 @@ static uint8_t StartRFchip(void)
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// #ifdef WITH_RFM95
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// TRX.WriteDefaultReg();
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// #endif
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TRX.ConfigureOGN(0, OGN_SYNC); // setup RF chip parameters and set to channel #0
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TRX.OGN_Configure(0, OGN_SYNC); // setup RF chip parameters and set to channel #0
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TRX.WriteMode(RF_OPMODE_STANDBY); // set RF chip mode to STANDBY
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uint8_t Version = TRX.ReadVersion();
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#ifdef DEBUG_PRINT
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@ -342,8 +342,9 @@ extern "C"
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#if defined(WITH_FANET) && defined(WITH_RFM95)
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const FANET_Packet *FNTpkt = FNT_TxFIFO.getRead(0); // read the packet from the FANET transmitt queue
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if(FNTpkt) // was there any ?
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{ TRX.SetLoRa(); // switch TRX to LoRa
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TRX.ConfigureFNT(); // configure for FANET
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{ TRX.setLoRa(); // switch TRX to LoRa
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TRX.FNT_Configure();
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// TRX.setChannel(0); // configure for FANET
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TRX.WriteMode(RF_OPMODE_LORA_RX_CONT);
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vTaskDelay(2);
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for(uint8_t Wait=50; Wait; Wait--)
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@ -351,7 +352,7 @@ extern "C"
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uint8_t Stat = TRX.ReadByte(REG_LORA_MODEM_STATUS);
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if((Stat&0x0B)==0) break; }
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TRX.WriteMode(RF_OPMODE_LORA_STANDBY);
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TRX.SendPacketFNT(FNTpkt->Byte, FNTpkt->Len);
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TRX.FNT_SendPacket(FNTpkt->Byte, FNTpkt->Len);
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FNT_TxFIFO.Read(); // remove the last packet from the queue
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/*
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xSemaphoreTake(CONS_Mutex, portMAX_DELAY);
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@ -375,8 +376,8 @@ extern "C"
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{ vTaskDelay(1);
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uint8_t Mode=TRX.ReadMode();
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if(Mode!=RF_OPMODE_LORA_TX) break; }
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TRX.SetFSK();
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TRX.ConfigureOGN(0, OGN_SYNC);
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TRX.setFSK();
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TRX.OGN_Configure(0, OGN_SYNC);
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}
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#endif
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@ -16,7 +16,7 @@
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#include "fanet.h"
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#endif
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extern FIFO<RFM_RxPktData, 16> RF_RxFIFO; // buffer for received packets
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extern FIFO<RFM_FSK_RxPktData, 16> RF_RxFIFO; // buffer for received packets
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extern FIFO<OGN_TxPacket<OGN_Packet>, 4> RF_TxFIFO; // buffer for transmitted packets
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#ifdef WITH_FANET
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155
main/rfm.h
155
main/rfm.h
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@ -9,7 +9,81 @@
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#include "ogn.h"
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#include "fanet.h"
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class RFM_RxPktData // OGN packet received by the RF chip
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class RFM_LoRa_Config
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{ public:
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union
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{ uint32_t Word;
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struct
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{ uint8_t Spare :3;
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uint8_t LowRate :1; // 0..1
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uint8_t TxInv :1; // 0..1, invert on TX
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uint8_t RxInv :1; // 0..1, invert on RX
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uint8_t IHDR :1; // 0..1, implicit header (no header on TX)
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uint8_t CRC :1; // 0..1, produce CRC on TX and check CRC on RX
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uint8_t CR :4; // 1..4, Coding Rate
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uint8_t SF :4; // 6..12, Spreading Factor
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uint8_t BW :4; // 0..9, 7=125kHz, 8=250kHz, 9=500kHz
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uint8_t Preamble:4; // 0..15, preamble symbols
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uint8_t SYNC :8; // 0..0xFF, SYNC
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} ;
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} ;
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public:
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void Print(void)
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{ printf("RFM_LoRa_Config: SYNC:0x%02X/%d, BW%d, SF%d, CR%d, IHDR:%d, Inv:%d/%d, LR:%d\n", SYNC, Preamble, BW, SF, CR, IHDR, RxInv, TxInv, LowRate); }
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uint16_t getAirTime(uint8_t PktLen) // [ms] estimated time on the air for given packet length
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{ uint16_t Symbols = Preamble+2+3+8; // [symbols] preamble, SYNC and header
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uint8_t NibPerBlock = SF; if(LowRate) NibPerBlock-=2; // [nibbles/block] byte-halfs
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uint8_t SymbPerBlock = 4+CR; // [symbols]
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uint16_t Nibbles = 2*(PktLen+2); // [nibbles]
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uint8_t Blocks = (Nibbles+NibPerBlock-1)/NibPerBlock; // [FEC blocks] for the data part
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Symbols += (uint16_t)Blocks*SymbPerBlock; // [symbols]
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uint32_t SymbTime = 1<<(10-BW+SF); // [usec/symbol]
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uint32_t Time = SymbTime*Symbols; // [usec]
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return (Time+500)/1000; }
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} ;
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const RFM_LoRa_Config RFM_FNTcfg { 0xF1587190 } ; // LoRa seting for FANET
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class RFM_LoRa_RxPacket
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{ public:
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union
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{ uint8_t Flags;
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struct
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{ uint8_t CR:3; // Coding rate used (RX) or to be used (TX)
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bool hasCRC:1; // CRC was there (RX)
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bool badCRC:1; // CRC was bad (RX)
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bool Done:1;
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} ;
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} ;
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uint8_t Len; // [bytes] packet length
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static const int MaxBytes = 40;
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uint8_t Byte[MaxBytes+2];
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uint32_t sTime; // [ s] reception time
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uint16_t msTime; // [ms]
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int16_t FreqOfs; // [ 10Hz]
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int8_t SNR; // [0.25dB]
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int8_t RSSI; // [dBm]
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uint8_t BitErr; // number of bit errors
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uint8_t CodeErr; // number of block errors
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public:
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void Print(void) const
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{ char HHMMSS[8];
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Format_HHMMSS(HHMMSS, sTime); HHMMSS[6]='h'; HHMMSS[7]=0;
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printf("%s CR%c%c%c %3.1fdB/%de %+3.1fkHz ", HHMMSS, '0'+CR, hasCRC?'c':'_', badCRC?'-':'+', 0.25*SNR, BitErr, 1e-2*FreqOfs);
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for(uint8_t Idx=0; Idx<Len; Idx++)
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printf("%02X", Byte[Idx]);
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printf("\n"); }
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} ;
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class RFM_FSK_RxPktData // OGN packet received by the RF chip
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{ public:
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static const uint8_t Bytes=26; // [bytes] number of bytes in the packet
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uint32_t Time; // [sec] Time slot
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@ -118,7 +192,7 @@ class RFM_RxPktData // OGN packet received by the RF chip
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#include "sx1276.h"
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#define RF_IRQ_PreambleDetect 0x0200
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#define RF_IRQ_PreambleDetect 0x0200 //
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#endif // of WITH_RFM95
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@ -167,6 +241,7 @@ class RFM_TRX
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uint8_t (*TransferByte)(uint8_t); // exchange one byte through SPI
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#endif
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void (*Delay_ms)(void);
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bool (*DIO0_isOn)(void); // read DIO0 = packet is ready
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// bool (*DIO4_isOn)(void);
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void (*RESET)(uint8_t On); // activate or desactivate the RF chip reset
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@ -380,7 +455,7 @@ class RFM_TRX
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#endif // USE_BLOCK_SPI
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#ifdef WITH_RFM69
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void WriteSYNC(uint8_t WriteSize, uint8_t SyncTol, const uint8_t *SyncData)
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void FSK_WriteSYNC(uint8_t WriteSize, uint8_t SyncTol, const uint8_t *SyncData)
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{ if(SyncTol>7) SyncTol=7; // no more than 7 bit errors can be tolerated on SYNC
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if(WriteSize>8) WriteSize=8; // up to 8 bytes of SYNC can be programmed
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WriteBytes(SyncData+(8-WriteSize), WriteSize, REG_SYNCVALUE1); // write the SYNC, skip some initial bytes
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@ -391,7 +466,7 @@ class RFM_TRX
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// #ifdef WITH_RFM95
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#if defined(WITH_RFM95) || defined(WITH_SX1272)
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void WriteSYNC(uint8_t WriteSize, uint8_t SyncTol, const uint8_t *SyncData)
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void FSK_WriteSYNC(uint8_t WriteSize, uint8_t SyncTol, const uint8_t *SyncData)
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{ if(SyncTol>7) SyncTol=7;
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if(WriteSize>8) WriteSize=8;
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WriteBytes(SyncData+(8-WriteSize), WriteSize, REG_SYNCVALUE1); // write the SYNC, skip some initial bytes
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@ -441,14 +516,14 @@ class RFM_TRX
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void WriteTxPowerMin(void) { WriteTxPower_W(-18); } // set minimal Tx power and setup for reception
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int ConfigureOGN(int16_t Channel, const uint8_t *Sync, bool PW=0)
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int FSK_Configure(int16_t Channel, const uint8_t *Sync, bool PW=0)
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{ WriteMode(RF_OPMODE_STANDBY); // mode = STDBY
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ClearIrqFlags();
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WriteByte( 0x02, REG_DATAMODUL); // [0x00] Packet mode, FSK, 0x02: BT=0.5, 0x01: BT=1.0, 0x03: BT=0.3
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WriteWord(PW?0x0341:0x0140, REG_BITRATEMSB); // bit rate = 100kbps
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WriteWord(PW?0x013B:0x0333, REG_FDEVMSB); // FSK deviation = +/-50kHz
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setChannel(Channel); // operating channel
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WriteSYNC(8, 7, Sync); // SYNC pattern (setup for reception)
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FSK_WriteSYNC(8, 7, Sync); // SYNC pattern (setup for reception)
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WriteByte( 0x00, REG_PACKETCONFIG1); // [0x10] Fixed size packet, no DC-free encoding, no CRC, no address filtering
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WriteByte(0x80+51, REG_FIFOTHRESH); // [ ] TxStartCondition=FifoNotEmpty, FIFO threshold = 51 bytes
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WriteByte( 2*26, REG_PAYLOADLENGTH); // [0x40] Packet size = 26 bytes Manchester encoded into 52 bytes
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@ -498,35 +573,57 @@ class RFM_TRX
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void WriteTxPowerMin(void) { WriteTxPower(0); }
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int SetLoRa(void) // switch to LoRa: has to go througth the SLEEP mode
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int setLoRa(void) // switch to LoRa: has to go througth the SLEEP mode
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{ WriteMode(RF_OPMODE_LORA_SLEEP);
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WriteMode(RF_OPMODE_LORA_SLEEP);
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return 0; }
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int SetFSK(void) // switch to FSK: has to go through the SLEEP mode
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int setFSK(void) // switch to FSK: has to go through the SLEEP mode
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{ WriteMode(RF_OPMODE_SLEEP);
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WriteMode(RF_OPMODE_SLEEP);
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return 0; }
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int ConfigureFNT(uint8_t CR=1) // configure for FANET/LoRa
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{ WriteTxPower(0);
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WriteByte(0x00, REG_LORA_HOPPING_PERIOD); // disable fast-hopping
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WriteByte(0xF1, REG_LORA_SYNC); // SYNC for FANET
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WriteWord(0x0005, REG_LORA_PREAMBLE_MSB); // [symbols] minimal preamble
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WriteByte(0x80 | (CR<<1), REG_LORA_MODEM_CONFIG1); // 0x88 = 250kHz, 4+4, explicit header
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WriteByte(0x74, REG_LORA_MODEM_CONFIG2); // 0x74 = SF7, CRC on
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int LoRa_Configure(RFM_LoRa_Config CFG, uint8_t MaxSize=64)
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{ WriteByte(0x00, REG_LORA_HOPPING_PERIOD); // disable fast-hopping
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WriteByte(CFG.SYNC, REG_LORA_SYNC); // SYNC
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WriteWord(CFG.Preamble, REG_LORA_PREAMBLE_MSB); // [symbols] minimal preamble
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WriteByte((CFG.BW<<4) | (CFG.CR<<1) | CFG.IHDR, REG_LORA_MODEM_CONFIG1); // 0x88 = 250kHz, 4+4, explicit header
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WriteByte((CFG.SF<<4) | (CFG.CRC<<2), REG_LORA_MODEM_CONFIG2); // 0x74 = SF7, CRC on
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// WriteByte(CFG.InvIQ?0x67:0x26, REG_LORA_INVERT_IQ);
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// WriteByte(CFG.InvIQ?0x19:0x1D, REG_LORA_INVERT_IQ2);
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WriteByte((CFG.RxInv<<6) | 0x26 | CFG.TxInv, REG_LORA_INVERT_IQ);
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// Format_String(CONS_UART_Write, "REG_LORA_INVERT_IQ:");
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// Format_Hex(CONS_UART_Write, CFG.Word);
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// Format_String(CONS_UART_Write, ":");
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// Format_Hex(CONS_UART_Write, ReadByte(REG_LORA_INVERT_IQ));
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// Format_String(CONS_UART_Write, "\n");
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WriteByte(0xC3, REG_LORA_DETECT_OPTIMIZE);
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WriteByte(0x0A, REG_LORA_DETECT_THRESHOLD);
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WriteByte(0x04, REG_LORA_MODEM_CONFIG3); // LNA auto-gain ?
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WriteByte(0xFF, REG_LORA_SYMBOL_TIMEOUT); // 0x64 = default or more ?
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WriteByte(FANET_Packet::MaxBytes, REG_LORA_PACKET_MAXLEN); // [bytes] enough ?
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WriteByte(0x04, REG_LORA_MODEM_CONFIG3); // LNA auto-gain ?
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WriteByte(0xFF, REG_LORA_SYMBOL_TIMEOUT); //
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WriteByte(MaxSize, REG_LORA_PACKET_MAXLEN); // [bytes]
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WriteByte(0x00, REG_LORA_RX_ADDR);
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setChannel(0); // operating channel
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WriteWord(0x0000, REG_DIOMAPPING1); // 001122334455___D signals: 00=DIO0 11=DIO1 22=DIO2 33=DIO3 44=DIO4 55=DIO5 D=MapPreambleDetect
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// DIO0: 00=RxDone, 01=TxDone, 10=CadDone
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setChannel(0); // operating channel
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WriteWord(0x0000, REG_DIOMAPPING1); // 001122334455___D signals: 00=DIO0 11=DIO1 22=DIO2 33=DIO3 44=DIO4 55=DIO5 D=MapPreambleDetect
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// DIO0: 00=RxDone, 01=TxDone, 10=CadDone
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return 0; }
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int SendPacketFNT(const uint8_t *Data, uint8_t Len)
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int FNT_Configure(uint8_t CR=1) // configure for FANET/LoRa
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{ WriteTxPower(0);
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RFM_LoRa_Config CFG = RFM_FNTcfg; CFG.CR=CR;
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return LoRa_Configure(CFG, FANET_Packet::MaxBytes); }
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void LoRa_setCRC(bool ON=1) // LoRaWAN: uplink with CRC, downlink without CRC
|
||||
{ uint8_t Reg=ReadByte(REG_LORA_MODEM_CONFIG2);
|
||||
if(ON) Reg|=0x04;
|
||||
else Reg&=0xFB;
|
||||
WriteByte(Reg, REG_LORA_MODEM_CONFIG2); }
|
||||
|
||||
void LoRa_InvertIQ(bool ON=0) // LoRaWAN
|
||||
{ WriteByte(ON?0x66:0x27, REG_LORA_INVERT_IQ);
|
||||
WriteByte(ON?0x19:0x1D, REG_LORA_INVERT_IQ2); }
|
||||
|
||||
int LoRa_SendPacket(const uint8_t *Data, uint8_t Len)
|
||||
{ // WriteMode(RF_OPMODE_LORA_STANDBY);
|
||||
// check if FIFO empty, packets could be received ?
|
||||
WriteByte(0x00, REG_LORA_FIFO_ADDR); // tell write to FIFO at address 0x00
|
||||
|
|
@ -536,7 +633,11 @@ class RFM_TRX
|
|||
WriteMode(RF_OPMODE_LORA_TX); // enter transmission mode
|
||||
return 0; } // afterwards just wait for TX mode to stop
|
||||
|
||||
int ReceivePacketFNT(FANET_RxPacket &Packet)
|
||||
int FNT_SendPacket(const uint8_t *Data, uint8_t Len)
|
||||
{ return LoRa_SendPacket(Data, Len); }
|
||||
|
||||
template<class RxPacket>
|
||||
int LoRa_ReceivePacket(RxPacket &Packet)
|
||||
{ uint8_t Flags = ReadByte(REG_LORA_IRQ_FLAGS);
|
||||
if((Flags&LORA_FLAG_RX_DONE)==0) return 0;
|
||||
uint8_t Stat = ReadByte(REG_LORA_MODEM_STATUS); // coding rate in three top bits
|
||||
|
|
@ -552,7 +653,7 @@ class RFM_TRX
|
|||
Packet.FreqOfs = (FreqOfs*1718+0x8000)>>16; // [10Hz]
|
||||
Packet.BitErr = 0;
|
||||
Packet.CodeErr = 0;
|
||||
int Len=ReceivePacketFNT(Packet.Byte, Packet.MaxBytes);
|
||||
int Len=LoRa_ReceivePacket(Packet.Byte, Packet.MaxBytes);
|
||||
// printf("ReceivePacketFNT() => %d %02X %3.1fdB %+ddBm 0x%08X=%+6.3fkHz, %02X%02X%02X%02X\n",
|
||||
// Packet.Len, Stat, 0.25*Packet.SNR, Packet.RSSI, FreqOfs, 0.5*0x1000000/32e9*FreqOfs,
|
||||
// Packet.Byte[0], Packet.Byte[1], Packet.Byte[2], Packet.Byte[3]);
|
||||
|
|
@ -560,7 +661,7 @@ class RFM_TRX
|
|||
WriteByte(LORA_FLAG_RX_DONE | LORA_FLAG_BAD_CRC, REG_LORA_IRQ_FLAGS);
|
||||
return Len; }
|
||||
|
||||
int ReceivePacketFNT(uint8_t *Data, uint8_t MaxLen)
|
||||
int LoRa_ReceivePacket(uint8_t *Data, uint8_t MaxLen)
|
||||
{ uint8_t Len=ReadByte(REG_LORA_PACKET_BYTES); // packet length
|
||||
uint8_t Ptr=ReadByte(REG_LORA_PACKET_ADDR); // packet address in FIFO
|
||||
WriteByte(Ptr, REG_LORA_FIFO_ADDR); // ask to read FIFO from this address
|
||||
|
|
@ -577,7 +678,7 @@ class RFM_TRX
|
|||
// ReadData[0], ReadData[1], ReadData[2], ReadData[3]);
|
||||
return Len; }
|
||||
|
||||
int ConfigureOGN(int16_t Channel, const uint8_t *Sync, bool PW=0)
|
||||
int OGN_Configure(int16_t Channel, const uint8_t *Sync, bool PW=0)
|
||||
{ // WriteMode(RF_OPMODE_STANDBY); // mode: STDBY, modulation: FSK, no LoRa
|
||||
// usleep(1000);
|
||||
WriteTxPower(0);
|
||||
|
|
@ -588,7 +689,7 @@ class RFM_TRX
|
|||
WriteWord(PW?0x013B:0x0333, REG_FDEVMSB); // FSK deviation = +/-50kHz [32MHz/(1<<19)] (0x013B = 19.226kHz)
|
||||
// ReadWord(REG_FDEVMSB);
|
||||
setChannel(Channel); // operating channel
|
||||
WriteSYNC(8, 7, Sync); // SYNC pattern (setup for reception)
|
||||
FSK_WriteSYNC(8, 7, Sync); // SYNC pattern (setup for reception)
|
||||
WriteByte( 0x85, REG_PREAMBLEDETECT); // preamble detect: 1 byte, page 92 (or 0x85 ?)
|
||||
WriteByte( 0x00, REG_PACKETCONFIG1); // Fixed size packet, no DC-free encoding, no CRC, no address filtering
|
||||
WriteByte( 0x40, REG_PACKETCONFIG2); // Packet mode
|
||||
|
|
|
|||
|
|
@ -81,6 +81,8 @@ static int WriteLog(size_t MaxBlock=FIFOsize/2) // process th
|
|||
|
||||
// ============================================================================================
|
||||
|
||||
#ifdef WITH_SDLOG
|
||||
|
||||
const char *IGC_Path = "/sdcard/IGC";
|
||||
const int IGC_PathLen = 11;
|
||||
const uint32_t IGC_SavePeriod = 20;
|
||||
|
|
@ -276,6 +278,8 @@ static void IGC_Check(void) // check if
|
|||
}
|
||||
}
|
||||
|
||||
#endif // WITH_SDLOG
|
||||
|
||||
// ============================================================================================
|
||||
|
||||
#ifdef WITH_SDLOG
|
||||
|
|
|
|||
|
|
@ -136,9 +136,10 @@ Maintainer: Miguel Luis and Gregory Cristian
|
|||
#define REG_LORA_FREQ_ERR_MID 0x29
|
||||
#define REG_LORA_FREQ_ERR_LSB 0x2A
|
||||
#define REG_LORA_DETECT_OPTIMIZE 0x31 //
|
||||
#define REG_LORA_INVERT_IQ 0x33
|
||||
#define REG_LORA_INVERT_IQ 0x33 //
|
||||
#define REG_LORA_DETECT_THRESHOLD 0x37 // for SF6
|
||||
#define REG_LORA_SYNC 0x39 // 0xF1 for FANET, default = 0x12 (for old FANET)
|
||||
#define REG_LORA_INVERT_IQ2 0x3B //
|
||||
|
||||
// LoRa flags
|
||||
#define LORA_FLAG_TIMEOUT 0x80 // timeout in single packet reception ?
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue