esp-idf/components/freertos
Sachin Parekh 301dacfb33 Exception handlers for LoadStoreError and LoadStoreAlignmentError
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
2020-02-26 20:21:59 +08:00
..
include/freertos
test
xtensa
CMakeLists.txt
FreeRTOS-openocd.c
Kconfig
component.mk
croutine.c
event_groups.c
license.txt
linker.lf
list.c
queue.c
sdkconfig.rename
stdint.readme
tasks.c
timers.c