kopia lustrzana https://github.com/espressif/esp-idf
169 wiersze
5.7 KiB
C
169 wiersze
5.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "unity.h"
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#include "esp_log.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "driver/gptimer.h"
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#include "esp_rom_sys.h"
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#include "esp_adc/adc_oneshot.h"
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#include "test_common_adc.h"
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#include "esp_adc/adc_continuous.h"
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#include "esp_adc/adc_filter.h"
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const __attribute__((unused)) static char *TAG = "TEST_ADC";
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/*---------------------------------------------------------------
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ADC General Macros
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---------------------------------------------------------------*/
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//ADC Channels
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#if CONFIG_IDF_TARGET_ESP32
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#define ADC1_TEST_CHAN0 ADC_CHANNEL_4
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#else
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#define ADC1_TEST_CHAN0 ADC_CHANNEL_2
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#endif
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/*---------------------------------------------------------------
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ADC work with ISR
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---------------------------------------------------------------*/
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typedef struct {
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TaskHandle_t task_handle; //Task handle
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adc_oneshot_unit_handle_t adc_handle; //ADC handle
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bool level; //ADC level
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} test_adc_isr_ctx_t;
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static bool IRAM_ATTR s_alarm_callback(gptimer_handle_t timer, const gptimer_alarm_event_data_t *edata, void *user_data)
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{
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test_adc_isr_ctx_t *test_ctx = (test_adc_isr_ctx_t *)user_data;
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BaseType_t high_task_wakeup;
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int adc_raw = 0;
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/**
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* This test won't disable the cache, so having some code on Flash is OK.
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* If you copy this test callback with cache disabled, do remeber to put all code in internal RAM.
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*/
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esp_rom_printf("alarm isr count=%llu\r\n", edata->count_value);
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TEST_ESP_OK(adc_oneshot_read_isr(test_ctx->adc_handle, ADC1_TEST_CHAN0, &adc_raw));
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esp_rom_printf("adc raw: %d\r\n", adc_raw);
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if (test_ctx->level) {
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TEST_ASSERT_INT_WITHIN(ADC_TEST_HIGH_THRESH, ADC_TEST_HIGH_VAL, adc_raw);
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} else {
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TEST_ASSERT_INT_WITHIN(ADC_TEST_LOW_THRESH, ADC_TEST_LOW_VAL, adc_raw);
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}
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// check the count value at alarm event
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vTaskNotifyGiveFromISR(test_ctx->task_handle, &high_task_wakeup);
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return high_task_wakeup == pdTRUE;
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}
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TEST_CASE("ADC oneshot fast work with ISR", "[adc_oneshot]")
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{
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static test_adc_isr_ctx_t isr_test_ctx = {};
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isr_test_ctx.adc_handle = NULL;
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isr_test_ctx.task_handle = xTaskGetCurrentTaskHandle();
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//-------------ADC1 Init---------------//
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adc_oneshot_unit_init_cfg_t init_config1 = {
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.unit_id = ADC_UNIT_1,
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.ulp_mode = ADC_ULP_MODE_DISABLE,
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};
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TEST_ESP_OK(adc_oneshot_new_unit(&init_config1, &isr_test_ctx.adc_handle));
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//-------------ADC1 TEST Channel 0 Config---------------//
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adc_oneshot_chan_cfg_t config = {
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.bitwidth = ADC_BITWIDTH_DEFAULT,
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.atten = ADC_ATTEN_DB_11,
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};
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TEST_ESP_OK(adc_oneshot_config_channel(isr_test_ctx.adc_handle, ADC1_TEST_CHAN0, &config));
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//-------------GPTimer Init & Config---------------//
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gptimer_handle_t timer = NULL;
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gptimer_config_t timer_config = {
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.resolution_hz = 1 * 1000 * 1000,
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.clk_src = GPTIMER_CLK_SRC_DEFAULT,
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.direction = GPTIMER_COUNT_UP,
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};
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TEST_ESP_OK(gptimer_new_timer(&timer_config, &timer));
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gptimer_event_callbacks_t cbs = {
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.on_alarm = s_alarm_callback,
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};
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gptimer_alarm_config_t alarm_config = {
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.reload_count = 0,
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.alarm_count = 100000, // 100ms
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};
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TEST_ESP_OK(gptimer_set_alarm_action(timer, &alarm_config));
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TEST_ESP_OK(gptimer_register_event_callbacks(timer, &cbs, &isr_test_ctx));
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//ADC IO tile low
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test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 0);
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isr_test_ctx.level = 0;
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printf("start timer\r\n");
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TEST_ESP_OK(gptimer_enable(timer));
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TEST_ESP_OK(gptimer_start(timer));
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TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(1000)));
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TEST_ESP_OK(gptimer_stop(timer));
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//ADC IO tile high
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test_adc_set_io_level(ADC_UNIT_1, ADC1_TEST_CHAN0, 1);
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isr_test_ctx.level = 1;
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//Reset counter value to zero
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TEST_ESP_OK(gptimer_set_raw_count(timer, 0));
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printf("start timer\r\n");
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TEST_ESP_OK(gptimer_start(timer));
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TEST_ASSERT_NOT_EQUAL(0, ulTaskNotifyTake(pdFALSE, pdMS_TO_TICKS(1000)));
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TEST_ESP_OK(gptimer_stop(timer));
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//Tear Down
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TEST_ESP_OK(gptimer_disable(timer));
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TEST_ESP_OK(gptimer_del_timer(timer));
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TEST_ESP_OK(adc_oneshot_del_unit(isr_test_ctx.adc_handle));
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}
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#if SOC_ADC_DMA_SUPPORTED
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#if SOC_ADC_DIG_IIR_FILTER_SUPPORTED
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TEST_CASE("ADC filter exhausted allocation", "[adc_oneshot]")
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{
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adc_continuous_handle_t handle = NULL;
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adc_continuous_handle_cfg_t adc_config = {
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.max_store_buf_size = 1024,
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.conv_frame_size = 1024,
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};
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TEST_ESP_OK(adc_continuous_new_handle(&adc_config, &handle));
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adc_iir_filter_handle_t filter_hdl[SOC_ADC_DIGI_IIR_FILTER_NUM + 1] = {};
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adc_continuous_iir_filter_config_t filter_config = {
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.unit = ADC_UNIT_1,
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.channel = ADC_CHANNEL_0,
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.coeff = ADC_DIGI_IIR_FILTER_COEFF_2,
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};
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for (int i = 0; i < SOC_ADC_DIGI_IIR_FILTER_NUM; i++) {
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#if SOC_ADC_DIG_IIR_FILTER_UNIT_BINDED
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//On these chips, the unit and the filter_id should be the same
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filter_config.unit = i;
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#endif
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TEST_ESP_OK(adc_new_continuous_iir_filter(handle, &filter_config, &filter_hdl[i]));
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}
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filter_config.unit = ADC_UNIT_1;
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TEST_ASSERT(adc_new_continuous_iir_filter(handle, &filter_config, &filter_hdl[SOC_ADC_DIGI_IIR_FILTER_NUM]) == ESP_ERR_NOT_FOUND);
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for (int i = 0; i < SOC_ADC_DIGI_IIR_FILTER_NUM; i++) {
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TEST_ESP_OK(adc_del_continuous_iir_filter(filter_hdl[i]));
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}
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TEST_ESP_OK(adc_continuous_deinit(handle));
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}
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#endif //#if SOC_ADC_DIG_IIR_FILTER_SUPPORTED
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#endif //#if SOC_ADC_DMA_SUPPORTED
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