kopia lustrzana https://github.com/espressif/esp-idf
85 wiersze
2.5 KiB
C
85 wiersze
2.5 KiB
C
#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <freertos/FreeRTOS.h>
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#include <freertos/task.h>
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#include <freertos/semphr.h>
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#include <unity.h>
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#include <esp_spi_flash.h>
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#include <esp_attr.h>
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#include <esp_flash_encrypt.h>
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#include "../cache_utils.h"
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static QueueHandle_t result_queue;
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static IRAM_ATTR void cache_test_task(void *arg)
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{
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bool do_disable = (bool)arg;
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bool result;
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if(do_disable) {
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spi_flash_disable_interrupts_caches_and_other_cpu();
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}
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result = spi_flash_cache_enabled();
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if (do_disable) {
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spi_flash_enable_interrupts_caches_and_other_cpu();
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}
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TEST_ASSERT( xQueueSendToBack(result_queue, &result, 0) );
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vTaskDelete(NULL);
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}
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TEST_CASE("spi_flash_cache_enabled() works on both CPUs", "[spi_flash][esp_flash]")
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{
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result_queue = xQueueCreate(1, sizeof(bool));
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for(int cpu = 0; cpu < portNUM_PROCESSORS; cpu++) {
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for(int disable = 0; disable <= 1; disable++) {
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bool do_disable = disable;
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bool result;
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printf("Testing cpu %d disabled %d\n", cpu, do_disable);
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xTaskCreatePinnedToCore(cache_test_task, "cache_check_task",
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2048, (void *)do_disable, configMAX_PRIORITIES-1, NULL, cpu);
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TEST_ASSERT( xQueueReceive(result_queue, &result, 2) );
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TEST_ASSERT_EQUAL(!do_disable, result);
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}
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}
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vQueueDelete(result_queue);
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}
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static const uint32_t s_in_rodata[] = { 0x12345678, 0xfedcba98 };
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static void IRAM_ATTR cache_access_test_func(void* arg)
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{
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spi_flash_disable_interrupts_caches_and_other_cpu();
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volatile uint32_t* src = (volatile uint32_t*) s_in_rodata;
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uint32_t v1 = src[0];
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uint32_t v2 = src[1];
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bool cache_enabled = spi_flash_cache_enabled();
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spi_flash_enable_interrupts_caches_and_other_cpu();
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printf("%d %x %x\n", cache_enabled, v1, v2);
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vTaskDelete(NULL);
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}
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// These tests works properly if they resets the chip with the
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// "Cache disabled but cached memory region accessed" reason and the correct CPU is logged.
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TEST_CASE("invalid access to cache raises panic (PRO CPU)", "[spi_flash][ignore]")
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{
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xTaskCreatePinnedToCore(&cache_access_test_func, "ia", 2048, NULL, 5, NULL, 0);
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vTaskDelay(1000/portTICK_PERIOD_MS);
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}
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#ifndef CONFIG_FREERTOS_UNICORE
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TEST_CASE("invalid access to cache raises panic (APP CPU)", "[spi_flash][ignore]")
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{
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xTaskCreatePinnedToCore(&cache_access_test_func, "ia", 2048, NULL, 5, NULL, 1);
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vTaskDelay(1000/portTICK_PERIOD_MS);
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}
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#endif
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