Jiang Jiang Jian 3b48b7e663 Merge branch 'Fix/update_reset_reason' into 'master' ... update reset reason for c3/s3/h2 See merge request espressif/esp-idf!14747		2021-09-18 07:03:50 +00:00
..
usb	Fix length typo	2021-07-29 14:44:43 +08:00
aes.h	…
apb_backup_dma.h	light sleep: add wifi mac sleep support for esp32s3	2021-08-04 21:58:33 +08:00
bigint.h	…
cache.h	cache: Update cache.h and autoload api	2021-09-02 02:27:40 +08:00
crc.h	…
digital_signature.h	…
efuse.h	…
ets_sys.h	…
gpio.h	…
hmac.h	…
libc_stubs.h	newlib: Add ESP_ROM_HAS_RETARGETABLE_LOCKING capability for C3 and S3 chips	2021-06-07 12:53:45 +07:00
lldesc.h	…
md5_hash.h	…
miniz.h	…
opi_flash.h	spiflash: add octal spi psram support on 727	2021-06-25 19:41:57 +08:00
rom_layout.h	Support ESP32S3 Beta 3 target	2021-03-18 10:24:22 +08:00
rsa_pss.h	bootloader: Enable Secure boot V2 for ESP32-S3	2021-08-19 14:08:12 +05:30
rtc.h	update reset reason for c3/s3/h2	2021-08-13 17:45:53 +08:00
secure_boot.h	secure_boot: Secure Boot V2 verify app signature on update (without Secure boot)	2021-03-15 12:30:20 +00:00
sha.h	…
spi_flash.h	spi_flash: move the unlock patch to bootloader and add support for GD	2021-07-29 10:46:33 +08:00
tjpgd.h	…
uart.h	…