kopia lustrzana https://github.com/espressif/esp-idf
264 wiersze
8.8 KiB
C
264 wiersze
8.8 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Unlicense OR CC0-1.0
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*/
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#include "sdkconfig.h"
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#define MAX_ADDR_24BIT 0x1000000
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#define TEST_SPI_SPEED 10
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#define TEST_SPI_READ_MODE SPI_FLASH_FASTRD
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// #define FORCE_GPIO_MATRIX
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#if CONFIG_IDF_TARGET_ESP32
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#define EXTRA_SPI1_CLK_IO 17 //the pin which is usually used by the PSRAM clk
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#define SPI1_CS_IO 16 //the pin which is usually used by the PSRAM cs
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#define HSPI_PIN_NUM_MOSI HSPI_IOMUX_PIN_NUM_MOSI
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#define HSPI_PIN_NUM_MISO HSPI_IOMUX_PIN_NUM_MISO
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#define HSPI_PIN_NUM_CLK HSPI_IOMUX_PIN_NUM_CLK
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#define HSPI_PIN_NUM_HD HSPI_IOMUX_PIN_NUM_HD
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#define HSPI_PIN_NUM_WP HSPI_IOMUX_PIN_NUM_WP
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#define HSPI_PIN_NUM_CS HSPI_IOMUX_PIN_NUM_CS
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#define VSPI_PIN_NUM_MOSI VSPI_IOMUX_PIN_NUM_MOSI
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#define VSPI_PIN_NUM_MISO VSPI_IOMUX_PIN_NUM_MISO
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#define VSPI_PIN_NUM_CLK VSPI_IOMUX_PIN_NUM_CLK
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#define VSPI_PIN_NUM_HD VSPI_IOMUX_PIN_NUM_HD
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#define VSPI_PIN_NUM_WP VSPI_IOMUX_PIN_NUM_WP
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#define VSPI_PIN_NUM_CS VSPI_IOMUX_PIN_NUM_CS
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define SPI1_CS_IO 26 //the pin which is usually used by the PSRAM cs
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#define SPI1_HD_IO 27 //the pin which is usually used by the PSRAM hd
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#define SPI1_WP_IO 28 //the pin which is usually used by the PSRAM wp
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#define FSPI_PIN_NUM_MOSI 35
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#define FSPI_PIN_NUM_MISO 37
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#define FSPI_PIN_NUM_CLK 36
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#define FSPI_PIN_NUM_HD 33
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#define FSPI_PIN_NUM_WP 38
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#define FSPI_PIN_NUM_CS 34
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// Just use the same pins for HSPI
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#define HSPI_PIN_NUM_MOSI FSPI_PIN_NUM_MOSI
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#define HSPI_PIN_NUM_MISO FSPI_PIN_NUM_MISO
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#define HSPI_PIN_NUM_CLK FSPI_PIN_NUM_CLK
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#define HSPI_PIN_NUM_HD FSPI_PIN_NUM_HD
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#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
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#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
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#elif CONFIG_IDF_TARGET_ESP32S3
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#define SPI1_CS_IO 26 //the pin which is usually used by the PSRAM cs
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#define SPI1_HD_IO 27 //the pin which is usually used by the PSRAM hd
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#define SPI1_WP_IO 28 //the pin which is usually used by the PSRAM wp
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#define FSPI_PIN_NUM_MOSI 11
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#define FSPI_PIN_NUM_MISO 13
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#define FSPI_PIN_NUM_CLK 12
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#define FSPI_PIN_NUM_HD 9
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#define FSPI_PIN_NUM_WP 14
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#define FSPI_PIN_NUM_CS 10
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// Just use the same pins for HSPI
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#define HSPI_PIN_NUM_MOSI FSPI_PIN_NUM_MOSI
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#define HSPI_PIN_NUM_MISO FSPI_PIN_NUM_MISO
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#define HSPI_PIN_NUM_CLK FSPI_PIN_NUM_CLK
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#define HSPI_PIN_NUM_HD FSPI_PIN_NUM_HD
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#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
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#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
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#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C2
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#define SPI1_CS_IO 26 //the pin which is usually used by the PSRAM cs
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#define SPI1_HD_IO 27 //the pin which is usually used by the PSRAM hd
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#define SPI1_WP_IO 28 //the pin which is usually used by the PSRAM wp
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#define FSPI_PIN_NUM_MOSI 7
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#define FSPI_PIN_NUM_MISO 2
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#define FSPI_PIN_NUM_CLK 6
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#define FSPI_PIN_NUM_HD 4
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#define FSPI_PIN_NUM_WP 5
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#define FSPI_PIN_NUM_CS 10
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// Just use the same pins for HSPI
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#define HSPI_PIN_NUM_MOSI FSPI_PIN_NUM_MOSI
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#define HSPI_PIN_NUM_MISO FSPI_PIN_NUM_MISO
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#define HSPI_PIN_NUM_CLK FSPI_PIN_NUM_CLK
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#define HSPI_PIN_NUM_HD FSPI_PIN_NUM_HD
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#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
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#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
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#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
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#define FSPI_PIN_NUM_MOSI 7
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#define FSPI_PIN_NUM_MISO 2
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#define FSPI_PIN_NUM_CLK 6
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#define FSPI_PIN_NUM_HD 4
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#define FSPI_PIN_NUM_WP 5
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#define FSPI_PIN_NUM_CS 17
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// Just use the same pins for HSPI
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#define HSPI_PIN_NUM_MOSI FSPI_PIN_NUM_MOSI
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#define HSPI_PIN_NUM_MISO FSPI_PIN_NUM_MISO
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#define HSPI_PIN_NUM_CLK FSPI_PIN_NUM_CLK
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#define HSPI_PIN_NUM_HD FSPI_PIN_NUM_HD
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#define HSPI_PIN_NUM_WP FSPI_PIN_NUM_WP
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#define HSPI_PIN_NUM_CS FSPI_PIN_NUM_CS
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#endif
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#define TEST_CONFIG_NUM (sizeof(config_list)/sizeof(flashtest_config_t))
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typedef void (*flash_test_func_t)(const esp_partition_t *part);
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/* Use TEST_CASE_FLASH for SPI flash tests that only use the main SPI flash chip
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*/
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#define TEST_CASE_FLASH(STR, FUNC_TO_RUN) \
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TEST_CASE(STR, "[esp_flash]") {flash_test_func(FUNC_TO_RUN, 1 /* first index reserved for main flash */ );}
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#define TEST_CASE_FLASH_IGNORE(STR, FUNC_TO_RUN) \
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TEST_CASE(STR, "[esp_flash][ignore]") {flash_test_func(FUNC_TO_RUN, 1 /* first index reserved for main flash */ );}
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/* Use TEST_CASE_MULTI_FLASH for tests which also run on external flash, which sits in the place of PSRAM
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(these tests are incompatible with PSRAM)
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These tests run for all the flash chip configs shown in config_list, below (internal and external).
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*/
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#define IDF_LOG_PERFORMANCE(item, value_fmt, value, ...) \
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printf("[Performance][%s]: " value_fmt "\n", item, value, ##__VA_ARGS__)
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#if defined(CONFIG_SPIRAM)
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//SPI1 CS1 occupied by PSRAM
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#define BYPASS_MULTIPLE_CHIP 1
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#endif
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#if CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32C6
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//chips without PSRAM
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#define TEST_CHIP_NUM 2
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#elif CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
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#define TEST_CHIP_NUM 3
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#endif
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#define _STRINGIFY(s) #s
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#define STRINGIFY(s) _STRINGIFY(s)
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#define TEST_CHIP_NUM_STR STRINGIFY(TEST_CHIP_NUM)
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#if BYPASS_MULTIPLE_CHIP
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#define TEST_CASE_MULTI_FLASH TEST_CASE_MULTI_FLASH_IGNORE
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#else
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#if CONFIG_FREERTOS_SMP // IDF-5260
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#define TEST_CASE_MULTI_FLASH(STR, FUNC_TO_RUN) \
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TEST_CASE(STR", "TEST_CHIP_NUM_STR" chips", "[esp_flash_multi][test_env=UT_T1_ESP_FLASH][timeout=60]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
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#else
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#define TEST_CASE_MULTI_FLASH(STR, FUNC_TO_RUN) \
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TEST_CASE(STR", "TEST_CHIP_NUM_STR" chips", "[esp_flash_multi][test_env=UT_T1_ESP_FLASH][timeout=35]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
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#endif
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#define TEST_CASE_MULTI_FLASH_LONG(STR, FUNC_TO_RUN) \
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TEST_CASE(STR", "TEST_CHIP_NUM_STR" chips", "[esp_flash_multi][test_env=UT_T1_ESP_FLASH][timeout=120]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
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#endif
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#define TEST_CASE_MULTI_FLASH_IGNORE(STR, FUNC_TO_RUN) \
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TEST_CASE(STR", "TEST_CHIP_NUM_STR" chips", "[esp_flash_multi][test_env=UT_T1_ESP_FLASH][ignore]") {flash_test_func(FUNC_TO_RUN, TEST_CONFIG_NUM);}
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//currently all the configs are the same with esp_flash_spi_device_config_t, no more information required
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typedef esp_flash_spi_device_config_t flashtest_config_t;
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static const char TAG[] = "test_esp_flash";
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#define FLASHTEST_CONFIG_COMMON \
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/* 0 always reserved for main flash */ \
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{ \
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/* no need to init */ \
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.host_id = -1, \
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} \
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, \
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{ \
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.io_mode = TEST_SPI_READ_MODE,\
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.freq_mhz = TEST_SPI_SPEED, \
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.host_id = SPI1_HOST, \
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.cs_id = 1, \
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/* the pin which is usually used by the PSRAM */ \
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.cs_io_num = SPI1_CS_IO, \
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.input_delay_ns = 0, \
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}
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#if CONFIG_IDF_TARGET_ESP32
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flashtest_config_t config_list[] = {
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FLASHTEST_CONFIG_COMMON,
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/* current runner doesn't have a flash on HSPI */
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// {
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// .io_mode = TEST_SPI_READ_MODE,
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// .freq_mhz = TEST_SPI_SPEED,
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// .host_id = HSPI_HOST,
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// .cs_id = 0,
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// // uses GPIO matrix on esp32s2 regardless if FORCE_GPIO_MATRIX
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// .cs_io_num = HSPI_PIN_NUM_CS,
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// .input_delay_ns = 20,
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// },
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{
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.io_mode = TEST_SPI_READ_MODE,
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.freq_mhz = TEST_SPI_SPEED,
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.host_id = VSPI_HOST,
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.cs_id = 0,
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.cs_io_num = VSPI_PIN_NUM_CS,
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.input_delay_ns = 0,
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},
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};
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#elif CONFIG_IDF_TARGET_ESP32S2
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flashtest_config_t config_list[] = {
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FLASHTEST_CONFIG_COMMON,
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{
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.io_mode = TEST_SPI_READ_MODE,
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.freq_mhz = TEST_SPI_SPEED,
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.host_id = FSPI_HOST,
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.cs_id = 0,
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.cs_io_num = FSPI_PIN_NUM_CS,
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.input_delay_ns = 0,
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},
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{
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.io_mode = TEST_SPI_READ_MODE,
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.freq_mhz = TEST_SPI_SPEED,
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.host_id = HSPI_HOST,
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.cs_id = 0,
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// uses GPIO matrix on esp32s2 regardless of FORCE_GPIO_MATRIX
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.cs_io_num = HSPI_PIN_NUM_CS,
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.input_delay_ns = 0,
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},
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};
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#elif CONFIG_IDF_TARGET_ESP32S3
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flashtest_config_t config_list[] = {
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/* No SPI1 CS1 flash on esp32S3 test */
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{
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/* no need to init */
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.host_id = -1,
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},
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{
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.io_mode = TEST_SPI_READ_MODE,
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.freq_mhz = TEST_SPI_SPEED,
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.host_id = SPI2_HOST,
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.cs_id = 0,
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.cs_io_num = FSPI_PIN_NUM_CS,
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.input_delay_ns = 0,
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},
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};
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#else
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flashtest_config_t config_list[] = {
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/* No SPI1 CS1 flash on esp32c3 test */
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{
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/* no need to init */
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.host_id = -1,
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},
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{
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.io_mode = TEST_SPI_READ_MODE,
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.freq_mhz = TEST_SPI_SPEED,
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.host_id = SPI2_HOST,
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.cs_id = 0,
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.cs_io_num = FSPI_PIN_NUM_CS,
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.input_delay_ns = 0,
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},
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};
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#endif
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