kopia lustrzana https://github.com/espressif/esp-idf
121 wiersze
3.3 KiB
C
121 wiersze
3.3 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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/**
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* @file i2c_apll.h
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* @brief Register definitions for digital PLL (BBPLL)
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*
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* This file lists register fields of BBPLL, located on an internal configuration
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* bus. These definitions are used via macros defined in i2c_rtc_clk.h, by
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* rtc_clk_cpu_freq_set function in rtc_clk.c.
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*/
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#define I2C_BBPLL 0x66
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#define I2C_BBPLL_HOSTID 0
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#define I2C_BBPLL_IR_CAL_DELAY 0
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#define I2C_BBPLL_IR_CAL_DELAY_MSB 3
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#define I2C_BBPLL_IR_CAL_DELAY_LSB 0
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#define I2C_BBPLL_IR_CAL_CK_DIV 0
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#define I2C_BBPLL_IR_CAL_CK_DIV_MSB 7
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#define I2C_BBPLL_IR_CAL_CK_DIV_LSB 4
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#define I2C_BBPLL_IR_CAL_EXT_CAP 1
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#define I2C_BBPLL_IR_CAL_EXT_CAP_MSB 3
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#define I2C_BBPLL_IR_CAL_EXT_CAP_LSB 0
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#define I2C_BBPLL_IR_CAL_ENX_CAP 1
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#define I2C_BBPLL_IR_CAL_ENX_CAP_MSB 4
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#define I2C_BBPLL_IR_CAL_ENX_CAP_LSB 4
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#define I2C_BBPLL_IR_CAL_RSTB 1
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#define I2C_BBPLL_IR_CAL_RSTB_MSB 5
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#define I2C_BBPLL_IR_CAL_RSTB_LSB 5
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#define I2C_BBPLL_IR_CAL_START 1
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#define I2C_BBPLL_IR_CAL_START_MSB 6
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#define I2C_BBPLL_IR_CAL_START_LSB 6
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#define I2C_BBPLL_IR_CAL_UNSTOP 1
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#define I2C_BBPLL_IR_CAL_UNSTOP_MSB 7
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#define I2C_BBPLL_IR_CAL_UNSTOP_LSB 7
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#define I2C_BBPLL_OC_REF_DIV 2
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#define I2C_BBPLL_OC_REF_DIV_MSB 3
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#define I2C_BBPLL_OC_REF_DIV_LSB 0
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#define I2C_BBPLL_OC_DIV 3
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#define I2C_BBPLL_OC_DIV_MSB 5
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#define I2C_BBPLL_OC_DIV_LSB 0
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#define I2C_BBPLL_OC_CHGP_DCUR 4
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#define I2C_BBPLL_OC_CHGP_DCUR_MSB 2
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#define I2C_BBPLL_OC_CHGP_DCUR_LSB 0
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#define I2C_BBPLL_OC_BUFF_DCUR 4
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#define I2C_BBPLL_OC_BUFF_DCUR_MSB 5
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#define I2C_BBPLL_OC_BUFF_DCUR_LSB 3
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#define I2C_BBPLL_OC_TSCHGP 4
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#define I2C_BBPLL_OC_TSCHGP_MSB 6
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#define I2C_BBPLL_OC_TSCHGP_LSB 6
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#define I2C_BBPLL_OC_ENB_FCAL 4
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#define I2C_BBPLL_OC_ENB_FCAL_MSB 7
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#define I2C_BBPLL_OC_ENB_FCAL_LSB 7
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#define I2C_BBPLL_OC_LPF_DR 5
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#define I2C_BBPLL_OC_LPF_DR_MSB 1
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#define I2C_BBPLL_OC_LPF_DR_LSB 0
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#define I2C_BBPLL_OC_VCO_DCUR 5
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#define I2C_BBPLL_OC_VCO_DCUR_MSB 3
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#define I2C_BBPLL_OC_VCO_DCUR_LSB 2
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#define I2C_BBPLL_OC_DHREF_SEL 5
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#define I2C_BBPLL_OC_DHREF_SEL_MSB 5
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#define I2C_BBPLL_OC_DHREF_SEL_LSB 4
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#define I2C_BBPLL_OC_DLREF_SEL 5
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#define I2C_BBPLL_OC_DLREF_SEL_MSB 7
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#define I2C_BBPLL_OC_DLREF_SEL_LSB 6
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#define I2C_BBPLL_OR_CAL_CAP 8
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#define I2C_BBPLL_OR_CAL_CAP_MSB 3
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#define I2C_BBPLL_OR_CAL_CAP_LSB 0
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#define I2C_BBPLL_OR_CAL_UDF 8
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#define I2C_BBPLL_OR_CAL_UDF_MSB 4
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#define I2C_BBPLL_OR_CAL_UDF_LSB 4
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#define I2C_BBPLL_OR_CAL_OVF 8
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#define I2C_BBPLL_OR_CAL_OVF_MSB 5
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#define I2C_BBPLL_OR_CAL_OVF_LSB 5
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#define I2C_BBPLL_OR_CAL_END 8
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#define I2C_BBPLL_OR_CAL_END_MSB 6
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#define I2C_BBPLL_OR_CAL_END_LSB 6
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#define I2C_BBPLL_OR_LOCK 8
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#define I2C_BBPLL_OR_LOCK_MSB 7
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#define I2C_BBPLL_OR_LOCK_LSB 7
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#define I2C_BBPLL_DTEST 10
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#define I2C_BBPLL_DTEST_MSB 1
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#define I2C_BBPLL_DTEST_LSB 0
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#define I2C_BBPLL_ENT_PLL 10
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#define I2C_BBPLL_ENT_PLL_MSB 2
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#define I2C_BBPLL_ENT_PLL_LSB 2
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#define I2C_BBPLL_DIV_CPU 10
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#define I2C_BBPLL_DIV_CPU_MSB 3
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#define I2C_BBPLL_DIV_CPU_LSB 3
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