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adc_channel.h
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…
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apb_ctrl_reg.h
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apb_ctrl_struct.h
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bb_reg.h
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boot_mode.h
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can_periph.h
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can_struct.h
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clkout_channel.h
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dac_channel.h
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dport_access.h
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dport_reg.h
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esp_common: Add API for IPC to run small pieces of code on the other CPU, in the context of the level 4 interrupt
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2021-08-03 14:35:29 +08:00 |
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efuse_reg.h
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emac_dma_struct.h
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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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2021-08-30 13:50:58 +08:00 |
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emac_ext_struct.h
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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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2021-08-30 13:50:58 +08:00 |
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emac_mac_struct.h
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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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2021-08-30 13:50:58 +08:00 |
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fe_reg.h
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flash_encryption_reg.h
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frc_timer_reg.h
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gdma_channel.h
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gpio_pins.h
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gpio_reg.h
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gpio_sd_reg.h
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gpio_sd_struct.h
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gpio_sig_map.h
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mcpwm: update hal and soc naming
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2021-07-26 22:32:45 +08:00 |
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gpio_struct.h
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hinf_reg.h
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hinf_struct.h
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host_reg.h
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host_struct.h
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hwcrypto_reg.h
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i2c_reg.h
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i2c_struct.h
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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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2021-08-30 13:50:58 +08:00 |
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i2s_reg.h
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i2s_struct.h
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io_mux_reg.h
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ledc_reg.h
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ledc_struct.h
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mcpwm_reg.h
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mcpwm: update register file according to TRM
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2021-08-24 15:38:46 +08:00 |
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mcpwm_struct.h
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mcpwm: rename keyword 'operator' which is not valid in cpp
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2021-09-10 12:41:42 +08:00 |
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mmu.h
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nrx_reg.h
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pcnt_reg.h
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pcnt_struct.h
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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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2021-08-30 13:50:58 +08:00 |
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periph_defs.h
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pid.h
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reset_reasons.h
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soc: add reset reasons in soc component
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2021-07-13 10:45:38 +08:00 |
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rmt_reg.h
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rmt_struct.h
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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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2021-08-30 13:50:58 +08:00 |
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rtc.h
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esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator
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2021-09-16 14:40:46 +08:00 |
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rtc_cntl_reg.h
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rtc_cntl_struct.h
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rtc_i2c_reg.h
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rtc_io_channel.h
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rtc_io_reg.h
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rtc_io_struct.h
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sdio_slave_pins.h
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sdmmc_pins.h
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sdmmc_reg.h
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sdmmc_struct.h
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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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2021-08-30 13:50:58 +08:00 |
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sens_reg.h
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sens_struct.h
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slc_reg.h
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slc_struct.h
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soc.h
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components/doc: Update doc about high-level interrupt
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2021-09-09 20:40:09 +08:00 |
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soc_caps.h
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touch sensor: update copyright notice
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2021-10-08 11:45:57 +08:00 |
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soc_pins.h
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soc_ulp.h
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spi_pins.h
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spi_reg.h
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spi_struct.h
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syscon_reg.h
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syscon_struct.h
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timer_group_reg.h
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timer_group_struct.h
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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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2021-08-30 13:50:58 +08:00 |
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touch_sensor_channel.h
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twai_struct.h
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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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2021-08-30 13:50:58 +08:00 |
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uart_channel.h
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uart_pins.h
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uart: uart_set_pin function will now use IOMUX whenever possible
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2021-08-04 12:48:30 +08:00 |
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uart_reg.h
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uart_struct.h
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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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2021-08-30 13:50:58 +08:00 |
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uhci_reg.h
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uhci_struct.h
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soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one
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2021-08-30 13:50:58 +08:00 |
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wdev_reg.h
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