esp-idf/components/espcoredump
Angus Gratton 420aef1ffe Updates for riscv support
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
2020-11-13 07:49:11 +11:00
..
include Updates for riscv support 2020-11-13 07:49:11 +11:00
include_core_dump Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
src Updates for riscv support 2020-11-13 07:49:11 +11:00
test Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
CMakeLists.txt Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
Kconfig Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
component.mk Whitespace: Automated whitespace fixes (large commit) 2020-11-11 07:36:35 +00:00
espcoredump.py
linker.lf
sdkconfig.rename