kopia lustrzana https://github.com/espressif/esp-idf
![]() On riscv core, core cycle counter counts the clock cycles only when core is active (not sleeping). In spi_slave/sender example, it uses ccount (core cycle counter) to do a simple debounce. Therefore, when using spi_slave/sender and spi_slave/receiver, program will be stuck. This commit fix this issue by using esp_timer |
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CMakeLists.txt | ||
Makefile |