kopia lustrzana https://github.com/espressif/esp-idf
493 wiersze
19 KiB
C
493 wiersze
19 KiB
C
/*
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* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <sys/lock.h>
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#include "sdkconfig.h"
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#if CONFIG_GPTIMER_ENABLE_DEBUG_LOG
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// The local log level must be defined before including esp_log.h
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// Set the maximum log level for this source file
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#define LOG_LOCAL_LEVEL ESP_LOG_DEBUG
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#endif
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#include "freertos/FreeRTOS.h"
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#include "esp_attr.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "esp_check.h"
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#include "esp_pm.h"
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#include "driver/gptimer.h"
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#include "hal/timer_types.h"
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#include "hal/timer_hal.h"
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#include "hal/timer_ll.h"
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#include "soc/timer_periph.h"
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#include "esp_memory_utils.h"
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#include "esp_private/periph_ctrl.h"
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#include "esp_private/esp_clk.h"
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#include "gptimer_priv.h"
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static const char *TAG = "gptimer";
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typedef struct gptimer_platform_t {
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_lock_t mutex; // platform level mutex lock
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gptimer_group_t *groups[SOC_TIMER_GROUPS]; // timer group pool
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int group_ref_counts[SOC_TIMER_GROUPS]; // reference count used to protect group install/uninstall
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} gptimer_platform_t;
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// gptimer driver platform, it's always a singleton
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static gptimer_platform_t s_platform;
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static gptimer_group_t *gptimer_acquire_group_handle(int group_id);
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static void gptimer_release_group_handle(gptimer_group_t *group);
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static esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t src_clk, uint32_t resolution_hz);
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static void gptimer_default_isr(void *args);
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static esp_err_t gptimer_register_to_group(gptimer_t *timer)
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{
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gptimer_group_t *group = NULL;
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int timer_id = -1;
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for (int i = 0; i < SOC_TIMER_GROUPS; i++) {
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group = gptimer_acquire_group_handle(i);
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ESP_RETURN_ON_FALSE(group, ESP_ERR_NO_MEM, TAG, "no mem for group (%d)", i);
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// loop to search free timer in the group
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portENTER_CRITICAL(&group->spinlock);
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for (int j = 0; j < SOC_TIMER_GROUP_TIMERS_PER_GROUP; j++) {
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if (!group->timers[j]) {
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timer_id = j;
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group->timers[j] = timer;
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break;
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}
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}
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portEXIT_CRITICAL(&group->spinlock);
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if (timer_id < 0) {
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gptimer_release_group_handle(group);
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group = NULL;
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} else {
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timer->timer_id = timer_id;
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timer->group = group;
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break;;
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}
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}
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ESP_RETURN_ON_FALSE(timer_id != -1, ESP_ERR_NOT_FOUND, TAG, "no free timer");
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return ESP_OK;
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}
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static void gptimer_unregister_from_group(gptimer_t *timer)
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{
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gptimer_group_t *group = timer->group;
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int timer_id = timer->timer_id;
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portENTER_CRITICAL(&group->spinlock);
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group->timers[timer_id] = NULL;
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portEXIT_CRITICAL(&group->spinlock);
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// timer has a reference on group, release it now
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gptimer_release_group_handle(group);
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}
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static esp_err_t gptimer_destory(gptimer_t *timer)
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{
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if (timer->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_delete(timer->pm_lock), TAG, "delete pm_lock failed");
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}
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if (timer->intr) {
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ESP_RETURN_ON_ERROR(esp_intr_free(timer->intr), TAG, "delete interrupt service failed");
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}
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if (timer->group) {
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gptimer_unregister_from_group(timer);
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}
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free(timer);
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return ESP_OK;
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}
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esp_err_t gptimer_new_timer(const gptimer_config_t *config, gptimer_handle_t *ret_timer)
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{
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#if CONFIG_GPTIMER_ENABLE_DEBUG_LOG
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esp_log_level_set(TAG, ESP_LOG_DEBUG);
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#endif
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esp_err_t ret = ESP_OK;
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gptimer_t *timer = NULL;
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ESP_GOTO_ON_FALSE(config && ret_timer, ESP_ERR_INVALID_ARG, err, TAG, "invalid argument");
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ESP_GOTO_ON_FALSE(config->resolution_hz, ESP_ERR_INVALID_ARG, err, TAG, "invalid timer resolution:%"PRIu32, config->resolution_hz);
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timer = heap_caps_calloc(1, sizeof(gptimer_t), GPTIMER_MEM_ALLOC_CAPS);
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ESP_GOTO_ON_FALSE(timer, ESP_ERR_NO_MEM, err, TAG, "no mem for gptimer");
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// register timer to the group (because one group can have several timers)
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ESP_GOTO_ON_ERROR(gptimer_register_to_group(timer), err, TAG, "register timer failed");
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gptimer_group_t *group = timer->group;
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int group_id = group->group_id;
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int timer_id = timer->timer_id;
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// initialize HAL layer
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timer_hal_init(&timer->hal, group_id, timer_id);
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// select clock source, set clock resolution
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ESP_GOTO_ON_ERROR(gptimer_select_periph_clock(timer, config->clk_src, config->resolution_hz), err, TAG, "set periph clock failed");
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// initialize counter value to zero
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timer_hal_set_counter_value(&timer->hal, 0);
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// set counting direction
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timer_ll_set_count_direction(timer->hal.dev, timer_id, config->direction);
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// interrupt register is shared by all timers in the same group
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portENTER_CRITICAL(&group->spinlock);
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timer_ll_enable_intr(timer->hal.dev, TIMER_LL_EVENT_ALARM(timer_id), false); // disable interrupt
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timer_ll_clear_intr_status(timer->hal.dev, TIMER_LL_EVENT_ALARM(timer_id)); // clear pending interrupt event
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portEXIT_CRITICAL(&group->spinlock);
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// initialize other members of timer
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timer->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
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timer->fsm = GPTIMER_FSM_INIT; // put the timer into init state
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timer->direction = config->direction;
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timer->flags.intr_shared = config->flags.intr_shared;
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ESP_LOGD(TAG, "new gptimer (%d,%d) at %p, resolution=%"PRIu32"Hz", group_id, timer_id, timer, timer->resolution_hz);
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*ret_timer = timer;
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return ESP_OK;
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err:
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if (timer) {
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gptimer_destory(timer);
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}
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return ret;
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}
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esp_err_t gptimer_del_timer(gptimer_handle_t timer)
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{
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ESP_RETURN_ON_FALSE(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(timer->fsm == GPTIMER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "timer not in init state");
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gptimer_group_t *group = timer->group;
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int group_id = group->group_id;
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int timer_id = timer->timer_id;
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ESP_LOGD(TAG, "del timer (%d,%d)", group_id, timer_id);
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timer_hal_deinit(&timer->hal);
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// recycle memory resource
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ESP_RETURN_ON_ERROR(gptimer_destory(timer), TAG, "destory gptimer failed");
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return ESP_OK;
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}
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esp_err_t gptimer_set_raw_count(gptimer_handle_t timer, unsigned long long value)
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{
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ESP_RETURN_ON_FALSE_ISR(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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portENTER_CRITICAL_SAFE(&timer->spinlock);
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timer_hal_set_counter_value(&timer->hal, value);
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portEXIT_CRITICAL_SAFE(&timer->spinlock);
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return ESP_OK;
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}
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esp_err_t gptimer_get_raw_count(gptimer_handle_t timer, unsigned long long *value)
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{
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ESP_RETURN_ON_FALSE_ISR(timer && value, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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portENTER_CRITICAL_SAFE(&timer->spinlock);
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*value = timer_hal_capture_and_get_counter_value(&timer->hal);
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portEXIT_CRITICAL_SAFE(&timer->spinlock);
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return ESP_OK;
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}
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esp_err_t gptimer_get_captured_count(gptimer_handle_t timer, uint64_t *value)
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{
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ESP_RETURN_ON_FALSE_ISR(timer && value, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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portENTER_CRITICAL_SAFE(&timer->spinlock);
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*value = timer_ll_get_counter_value(timer->hal.dev, timer->timer_id);
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portEXIT_CRITICAL_SAFE(&timer->spinlock);
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return ESP_OK;
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}
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esp_err_t gptimer_register_event_callbacks(gptimer_handle_t timer, const gptimer_event_callbacks_t *cbs, void *user_data)
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{
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gptimer_group_t *group = NULL;
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ESP_RETURN_ON_FALSE(timer && cbs, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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group = timer->group;
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int group_id = group->group_id;
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int timer_id = timer->timer_id;
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#if CONFIG_GPTIMER_ISR_IRAM_SAFE
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if (cbs->on_alarm) {
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ESP_RETURN_ON_FALSE(esp_ptr_in_iram(cbs->on_alarm), ESP_ERR_INVALID_ARG, TAG, "on_alarm callback not in IRAM");
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}
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if (user_data) {
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ESP_RETURN_ON_FALSE(esp_ptr_internal(user_data), ESP_ERR_INVALID_ARG, TAG, "user context not in internal RAM");
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}
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#endif
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// lazy install interrupt service
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if (!timer->intr) {
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ESP_RETURN_ON_FALSE(timer->fsm == GPTIMER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "timer not in init state");
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// if user wants to control the interrupt allocation more precisely, we can expose more flags in `gptimer_config_t`
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int isr_flags = timer->flags.intr_shared ? ESP_INTR_FLAG_SHARED | GPTIMER_INTR_ALLOC_FLAGS : GPTIMER_INTR_ALLOC_FLAGS;
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ESP_RETURN_ON_ERROR(esp_intr_alloc_intrstatus(timer_group_periph_signals.groups[group_id].timer_irq_id[timer_id], isr_flags,
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(uint32_t)timer_ll_get_intr_status_reg(timer->hal.dev), TIMER_LL_EVENT_ALARM(timer_id),
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gptimer_default_isr, timer, &timer->intr), TAG, "install interrupt service failed");
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}
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// enable/disable GPTimer interrupt events
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portENTER_CRITICAL(&group->spinlock);
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timer_ll_enable_intr(timer->hal.dev, TIMER_LL_EVENT_ALARM(timer->timer_id), cbs->on_alarm != NULL); // enable timer interrupt
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portEXIT_CRITICAL(&group->spinlock);
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timer->on_alarm = cbs->on_alarm;
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timer->user_ctx = user_data;
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return ESP_OK;
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}
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esp_err_t gptimer_set_alarm_action(gptimer_handle_t timer, const gptimer_alarm_config_t *config)
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{
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ESP_RETURN_ON_FALSE_ISR(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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if (config) {
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// When auto_reload is enabled, alarm_count should not be equal to reload_count
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bool valid_auto_reload = !config->flags.auto_reload_on_alarm || config->alarm_count != config->reload_count;
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ESP_RETURN_ON_FALSE_ISR(valid_auto_reload, ESP_ERR_INVALID_ARG, TAG, "reload count can't equal to alarm count");
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portENTER_CRITICAL_SAFE(&timer->spinlock);
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timer->reload_count = config->reload_count;
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timer->alarm_count = config->alarm_count;
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timer->flags.auto_reload_on_alarm = config->flags.auto_reload_on_alarm;
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timer->flags.alarm_en = true;
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timer_ll_set_reload_value(timer->hal.dev, timer->timer_id, config->reload_count);
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timer_ll_set_alarm_value(timer->hal.dev, timer->timer_id, config->alarm_count);
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portEXIT_CRITICAL_SAFE(&timer->spinlock);
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} else {
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portENTER_CRITICAL_SAFE(&timer->spinlock);
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timer->flags.auto_reload_on_alarm = false;
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timer->flags.alarm_en = false;
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portEXIT_CRITICAL_SAFE(&timer->spinlock);
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}
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portENTER_CRITICAL_SAFE(&timer->spinlock);
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timer_ll_enable_auto_reload(timer->hal.dev, timer->timer_id, timer->flags.auto_reload_on_alarm);
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timer_ll_enable_alarm(timer->hal.dev, timer->timer_id, timer->flags.alarm_en);
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portEXIT_CRITICAL_SAFE(&timer->spinlock);
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return ESP_OK;
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}
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esp_err_t gptimer_enable(gptimer_handle_t timer)
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{
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ESP_RETURN_ON_FALSE(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(timer->fsm == GPTIMER_FSM_INIT, ESP_ERR_INVALID_STATE, TAG, "timer not in init state");
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// acquire power manager lock
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if (timer->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_acquire(timer->pm_lock), TAG, "acquire pm_lock failed");
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}
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// enable interrupt service
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if (timer->intr) {
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ESP_RETURN_ON_ERROR(esp_intr_enable(timer->intr), TAG, "enable interrupt service failed");
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}
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timer->fsm = GPTIMER_FSM_ENABLE;
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return ESP_OK;
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}
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esp_err_t gptimer_disable(gptimer_handle_t timer)
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{
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ESP_RETURN_ON_FALSE(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE(timer->fsm == GPTIMER_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "timer not in enable state");
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// disable interrupt service
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if (timer->intr) {
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ESP_RETURN_ON_ERROR(esp_intr_disable(timer->intr), TAG, "disable interrupt service failed");
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}
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// release power manager lock
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if (timer->pm_lock) {
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ESP_RETURN_ON_ERROR(esp_pm_lock_release(timer->pm_lock), TAG, "release pm_lock failed");
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}
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timer->fsm = GPTIMER_FSM_INIT;
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return ESP_OK;
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}
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esp_err_t gptimer_start(gptimer_handle_t timer)
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{
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ESP_RETURN_ON_FALSE_ISR(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE_ISR(timer->fsm == GPTIMER_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "timer not enabled yet");
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portENTER_CRITICAL_SAFE(&timer->spinlock);
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timer_ll_enable_counter(timer->hal.dev, timer->timer_id, true);
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timer_ll_enable_alarm(timer->hal.dev, timer->timer_id, timer->flags.alarm_en);
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portEXIT_CRITICAL_SAFE(&timer->spinlock);
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return ESP_OK;
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}
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esp_err_t gptimer_stop(gptimer_handle_t timer)
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{
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ESP_RETURN_ON_FALSE_ISR(timer, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
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ESP_RETURN_ON_FALSE_ISR(timer->fsm == GPTIMER_FSM_ENABLE, ESP_ERR_INVALID_STATE, TAG, "timer not enabled yet");
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// disable counter, alarm, auto-reload
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portENTER_CRITICAL_SAFE(&timer->spinlock);
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timer_ll_enable_counter(timer->hal.dev, timer->timer_id, false);
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timer_ll_enable_alarm(timer->hal.dev, timer->timer_id, false);
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portEXIT_CRITICAL_SAFE(&timer->spinlock);
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return ESP_OK;
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}
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static gptimer_group_t *gptimer_acquire_group_handle(int group_id)
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{
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bool new_group = false;
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gptimer_group_t *group = NULL;
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// prevent install timer group concurrently
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_lock_acquire(&s_platform.mutex);
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if (!s_platform.groups[group_id]) {
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group = heap_caps_calloc(1, sizeof(gptimer_group_t), GPTIMER_MEM_ALLOC_CAPS);
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if (group) {
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new_group = true;
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s_platform.groups[group_id] = group;
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// initialize timer group members
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group->group_id = group_id;
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group->spinlock = (portMUX_TYPE)portMUX_INITIALIZER_UNLOCKED;
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// enable APB access timer registers
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periph_module_enable(timer_group_periph_signals.groups[group_id].module);
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}
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} else {
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group = s_platform.groups[group_id];
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}
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if (group) {
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// someone acquired the group handle means we have a new object that refer to this group
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s_platform.group_ref_counts[group_id]++;
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}
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_lock_release(&s_platform.mutex);
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if (new_group) {
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ESP_LOGD(TAG, "new group (%d) @%p", group_id, group);
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}
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return group;
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}
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static void gptimer_release_group_handle(gptimer_group_t *group)
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{
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int group_id = group->group_id;
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bool do_deinitialize = false;
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_lock_acquire(&s_platform.mutex);
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s_platform.group_ref_counts[group_id]--;
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if (s_platform.group_ref_counts[group_id] == 0) {
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assert(s_platform.groups[group_id]);
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do_deinitialize = true;
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s_platform.groups[group_id] = NULL;
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// Theoretically we need to disable the peripheral clock for the timer group
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// However, next time when we enable the peripheral again, the registers will be reset to default value, including the watchdog registers inside the group
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// Then the watchdog will go into reset state, e.g. the flash boot watchdog is enabled again and reset the system very soon
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// periph_module_disable(timer_group_periph_signals.groups[group_id].module);
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}
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_lock_release(&s_platform.mutex);
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if (do_deinitialize) {
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free(group);
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ESP_LOGD(TAG, "del group (%d)", group_id);
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}
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}
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static esp_err_t gptimer_select_periph_clock(gptimer_t *timer, gptimer_clock_source_t src_clk, uint32_t resolution_hz)
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{
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unsigned int counter_src_hz = 0;
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esp_err_t ret = ESP_OK;
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int timer_id = timer->timer_id;
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// [clk_tree] TODO: replace the following switch table by clk_tree API
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switch (src_clk) {
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#if SOC_TIMER_GROUP_SUPPORT_APB
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case GPTIMER_CLK_SRC_APB:
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counter_src_hz = esp_clk_apb_freq();
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#if CONFIG_PM_ENABLE
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sprintf(timer->pm_lock_name, "gptimer_%d_%d", timer->group->group_id, timer_id); // e.g. gptimer_0_0
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ret = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, timer->pm_lock_name, &timer->pm_lock);
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ESP_RETURN_ON_ERROR(ret, TAG, "create APB_FREQ_MAX lock failed");
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ESP_LOGD(TAG, "install APB_FREQ_MAX lock for timer (%d,%d)", timer->group->group_id, timer_id);
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#endif
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break;
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#endif // SOC_TIMER_GROUP_SUPPORT_APB
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#if SOC_TIMER_GROUP_SUPPORT_PLL_F40M
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case GPTIMER_CLK_SRC_PLL_F40M:
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counter_src_hz = 40 * 1000 * 1000;
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|
#if CONFIG_PM_ENABLE
|
|
sprintf(timer->pm_lock_name, "gptimer_%d_%d", timer->group->group_id, timer_id); // e.g. gptimer_0_0
|
|
// PLL_F40M will be turned off when DFS switches CPU clock source to XTAL
|
|
ret = esp_pm_lock_create(ESP_PM_APB_FREQ_MAX, 0, timer->pm_lock_name, &timer->pm_lock);
|
|
ESP_RETURN_ON_ERROR(ret, TAG, "create APB_FREQ_MAX lock failed");
|
|
ESP_LOGD(TAG, "install APB_FREQ_MAX lock for timer (%d,%d)", timer->group->group_id, timer_id);
|
|
#endif
|
|
break;
|
|
#endif // SOC_TIMER_GROUP_SUPPORT_PLL_F40M
|
|
#if SOC_TIMER_GROUP_SUPPORT_AHB
|
|
case GPTIMER_CLK_SRC_AHB:
|
|
// TODO: decide which kind of PM lock we should use for such clock
|
|
counter_src_hz = 48 * 1000 * 1000;
|
|
break;
|
|
#endif // SOC_TIMER_GROUP_SUPPORT_AHB
|
|
#if SOC_TIMER_GROUP_SUPPORT_XTAL
|
|
case GPTIMER_CLK_SRC_XTAL:
|
|
counter_src_hz = esp_clk_xtal_freq();
|
|
break;
|
|
#endif // SOC_TIMER_GROUP_SUPPORT_XTAL
|
|
default:
|
|
ESP_RETURN_ON_FALSE(false, ESP_ERR_NOT_SUPPORTED, TAG, "clock source %d is not support", src_clk);
|
|
break;
|
|
}
|
|
timer_ll_set_clock_source(timer->hal.dev, timer_id, src_clk);
|
|
timer->clk_src = src_clk;
|
|
unsigned int prescale = counter_src_hz / resolution_hz; // potential resolution loss here
|
|
timer_ll_set_clock_prescale(timer->hal.dev, timer_id, prescale);
|
|
timer->resolution_hz = counter_src_hz / prescale; // this is the real resolution
|
|
if (timer->resolution_hz != resolution_hz) {
|
|
ESP_LOGW(TAG, "resolution lost, expect %"PRIu32", real %"PRIu32, resolution_hz, timer->resolution_hz);
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
// Put the default ISR handler in the IRAM for better performance
|
|
IRAM_ATTR static void gptimer_default_isr(void *args)
|
|
{
|
|
bool need_yield = false;
|
|
gptimer_t *timer = (gptimer_t *)args;
|
|
gptimer_group_t *group = timer->group;
|
|
gptimer_alarm_cb_t on_alarm_cb = timer->on_alarm;
|
|
uint32_t intr_status = timer_ll_get_intr_status(timer->hal.dev);
|
|
|
|
if (intr_status & TIMER_LL_EVENT_ALARM(timer->timer_id)) {
|
|
// Note: when alarm event happens, the alarm will be disabled automatically by hardware
|
|
gptimer_alarm_event_data_t edata = {
|
|
.count_value = timer_hal_capture_and_get_counter_value(&timer->hal),
|
|
.alarm_value = timer->alarm_count,
|
|
};
|
|
|
|
portENTER_CRITICAL_ISR(&group->spinlock);
|
|
timer_ll_clear_intr_status(timer->hal.dev, TIMER_LL_EVENT_ALARM(timer->timer_id));
|
|
// for auto-reload, we need to re-enable the alarm manually
|
|
if (timer->flags.auto_reload_on_alarm) {
|
|
timer_ll_enable_alarm(timer->hal.dev, timer->timer_id, true);
|
|
}
|
|
portEXIT_CRITICAL_ISR(&group->spinlock);
|
|
|
|
if (on_alarm_cb) {
|
|
if (on_alarm_cb(timer, &edata, timer->user_ctx)) {
|
|
need_yield = true;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (need_yield) {
|
|
portYIELD_FROM_ISR();
|
|
}
|
|
}
|
|
|
|
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
///// The Following APIs are for internal use only (e.g. unit test) /////////////////////////////////////////////////
|
|
////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
|
|
esp_err_t gptimer_get_intr_handle(gptimer_handle_t timer, intr_handle_t *ret_intr_handle)
|
|
{
|
|
ESP_RETURN_ON_FALSE(timer && ret_intr_handle, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
|
*ret_intr_handle = timer->intr;
|
|
return ESP_OK;
|
|
}
|
|
|
|
esp_err_t gptimer_get_pm_lock(gptimer_handle_t timer, esp_pm_lock_handle_t *ret_pm_lock)
|
|
{
|
|
ESP_RETURN_ON_FALSE(timer && ret_pm_lock, ESP_ERR_INVALID_ARG, TAG, "invalid argument");
|
|
*ret_pm_lock = timer->pm_lock;
|
|
return ESP_OK;
|
|
}
|