kopia lustrzana https://github.com/espressif/esp-idf
6dae5b206f
esp_reset_reason_init would check for reset reason hint, and unconditionally set RTC_RESET_CAUSE_REG (which is also RTC_ENTRY_ADDR_REG) to hint value 0, i.e. 0x80000000. However the ROM code treats this value as valid deep sleep wake stub entry point, and tries to jump to it. Clear RTC_RESET_CAUSE_REG only if it contained a valid reset reason hint, and simply set the register value to 0 when doing so. Also add a check to esp_get_deep_sleep_wake_stub function that deep sleep wake stub entry address must be in IRAM. Reported in https://esp32.com/viewtopic.php?f=13&t=6919. |
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| .. | ||
| component.mk | ||
| logo.jpg | ||
| test_ahb_arb.c | ||
| test_ahb_arb_asm.S | ||
| test_attr.c | ||
| test_delay.c | ||
| test_dport.c | ||
| test_esp32.c | ||
| test_esp_timer.c | ||
| test_ets_timer.c | ||
| test_fastbus.c | ||
| test_fastbus_asm.S | ||
| test_fp.c | ||
| test_header_files_md5.c | ||
| test_intr_alloc.c | ||
| test_libgcc.c | ||
| test_miniz.c | ||
| test_pm.c | ||
| test_reset_reason.c | ||
| test_sleep.c | ||
| test_spiram_cache_flush.c | ||
| test_stack_check.c | ||
| test_stack_check_cxx.cpp | ||
| test_tjpgd.c | ||
| test_tsens.c | ||
| test_unal_dma.c | ||
| test_wifi_lib_git_commit.c | ||
