Omar Chebib 8fae0f0753 G0: Support Xtensa targets for G0-only compilation ... G0-only example now supports Xtensa targets. This means that G0 layer does not depend on G1+ layers anymore		2022-06-20 11:34:20 +00:00
..
esp32	…
esp32s2	…
esp32s3	hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls	2022-06-14 14:40:03 +08:00
include	freertos: Xtensa FreeRTOS saves threadptr in solicited stack frame	2022-06-15 20:20:41 +08:00
trax	…
CMakeLists.txt	build-system: add property for architecture (riscv/xtensa)	2022-05-20 09:00:32 +08:00
eri.c	…
linker.lf	…
project_include.cmake	…
xt_trax.c	…
xtensa_intr.c	G0: Support Xtensa targets for G0-only compilation	2022-06-20 11:34:20 +00:00
xtensa_intr_asm.S	G0: Support Xtensa targets for G0-only compilation	2022-06-20 11:34:20 +00:00