Angus Gratton d40c69375c bootloader: Add fault injection resistance to Secure Boot bootloader verification ... Goal is that multiple faults would be required to bypass a boot-time signature check. - Also strengthens some address range checks for safe app memory addresses - Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32 Add some additional checks for invalid sections: - Sections only partially in DRAM or IRAM are invalid - If a section is in D/IRAM, allow the possibility only some is in D/IRAM - Only pass sections that are entirely in the same type of RTC memory region		2020-02-27 14:37:19 +05:30
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aes.h	…
bigint.h	…
cache.h	…
crc.h	sdspi: support crc16_be for esp32s2	2020-02-12 15:15:46 +08:00
digital_signature.h	…
efuse.h	…
ets_sys.h	…
gpio.h	…
hmac.h	…
libc_stubs.h	…
lldesc.h	…
md5_hash.h	…
miniz.h	…
opi_flash.h	…
queue.h	…
rsa_pss.h	…
rtc.h	…
secure_boot.h	bootloader: Add fault injection resistance to Secure Boot bootloader verification	2020-02-27 14:37:19 +05:30
sha.h	…
spi_flash.h	flash(esp32s2): fix setting address field in spi user mode.	2020-02-07 16:10:51 +01:00
tbconsole.h	…
tjpgd.h	…
uart.h	…