kopia lustrzana https://github.com/espressif/esp-idf
131 wiersze
3.3 KiB
C
131 wiersze
3.3 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* SAR related peripherals are interdependent. This file
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* provides a united control to these registers, as multiple
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* components require these controls.
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*
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* Related peripherals are:
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* - ADC
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* - PWDET
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* - Temp Sensor
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*/
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#include "sdkconfig.h"
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#include "esp_log.h"
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#include "freertos/FreeRTOS.h"
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#include "esp_private/sar_periph_ctrl.h"
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#include "hal/sar_ctrl_ll.h"
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#include "hal/adc_ll.h"
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static const char *TAG = "sar_periph_ctrl";
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extern portMUX_TYPE rtc_spinlock;
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void sar_periph_ctrl_init(void)
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{
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//Put SAR control mux to FSM state
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sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_FSM);
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//Add other periph power control initialisation here
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}
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void sar_periph_ctrl_power_enable(void)
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{
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portENTER_CRITICAL_SAFE(&rtc_spinlock);
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sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_FSM);
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portEXIT_CRITICAL_SAFE(&rtc_spinlock);
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}
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void sar_periph_ctrl_power_disable(void)
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{
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portENTER_CRITICAL_SAFE(&rtc_spinlock);
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sar_ctrl_ll_set_power_mode(SAR_CTRL_LL_POWER_OFF);
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portEXIT_CRITICAL_SAFE(&rtc_spinlock);
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}
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/*------------------------------------------------------------------------------
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* PWDET Power
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*----------------------------------------------------------------------------*/
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static int s_pwdet_power_on_cnt;
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void sar_periph_ctrl_pwdet_power_acquire(void)
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{
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portENTER_CRITICAL_SAFE(&rtc_spinlock);
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s_pwdet_power_on_cnt++;
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if (s_pwdet_power_on_cnt == 1) {
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sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_ON);
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}
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portEXIT_CRITICAL_SAFE(&rtc_spinlock);
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}
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void sar_periph_ctrl_pwdet_power_release(void)
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{
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portENTER_CRITICAL_SAFE(&rtc_spinlock);
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s_pwdet_power_on_cnt--;
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/* Sanity check */
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if (s_pwdet_power_on_cnt < 0) {
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portEXIT_CRITICAL(&rtc_spinlock);
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ESP_LOGE(TAG, "%s called, but s_pwdet_power_on_cnt == 0", __func__);
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abort();
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} else if (s_pwdet_power_on_cnt == 0) {
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sar_ctrl_ll_set_power_mode_from_pwdet(SAR_CTRL_LL_POWER_FSM);
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}
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portEXIT_CRITICAL_SAFE(&rtc_spinlock);
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}
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/*------------------------------------------------------------------------------
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* ADC Power
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*----------------------------------------------------------------------------*/
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static int s_saradc_power_on_cnt;
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static void s_sar_adc_power_acquire(void)
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{
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portENTER_CRITICAL_SAFE(&rtc_spinlock);
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s_saradc_power_on_cnt++;
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if (s_saradc_power_on_cnt == 1) {
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adc_ll_digi_set_power_manage(ADC_POWER_SW_ON);
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}
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portEXIT_CRITICAL_SAFE(&rtc_spinlock);
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}
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static void s_sar_adc_power_release(void)
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{
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portENTER_CRITICAL_SAFE(&rtc_spinlock);
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s_saradc_power_on_cnt--;
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if (s_saradc_power_on_cnt < 0) {
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portEXIT_CRITICAL(&rtc_spinlock);
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ESP_LOGE(TAG, "%s called, but s_saradc_power_on_cnt == 0", __func__);
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abort();
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} else if (s_saradc_power_on_cnt == 0) {
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adc_ll_digi_set_power_manage(ADC_POWER_BY_FSM);
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}
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portEXIT_CRITICAL_SAFE(&rtc_spinlock);
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}
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void sar_periph_ctrl_adc_oneshot_power_acquire(void)
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{
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s_sar_adc_power_acquire();
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}
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void sar_periph_ctrl_adc_oneshot_power_release(void)
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{
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s_sar_adc_power_release();
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}
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void sar_periph_ctrl_adc_continuous_power_acquire(void)
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{
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s_sar_adc_power_acquire();
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}
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void sar_periph_ctrl_adc_continuous_power_release(void)
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{
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s_sar_adc_power_release();
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}
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