kopia lustrzana https://github.com/espressif/esp-idf
310 wiersze
10 KiB
C
310 wiersze
10 KiB
C
#include "unity.h"
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#include "esp_system.h"
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#include "esp_task_wdt.h"
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#include "esp_attr.h"
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#include "soc/rtc_periph.h"
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#include "driver/timer.h"
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#include "esp32/rom/rtc.h"
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#include "esp_sleep.h"
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#define RTC_BSS_ATTR __attribute__((section(".rtc.bss")))
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#define CHECK_VALUE 0x89abcdef
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static __NOINIT_ATTR uint32_t s_noinit_val;
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static RTC_NOINIT_ATTR uint32_t s_rtc_noinit_val;
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static RTC_DATA_ATTR uint32_t s_rtc_data_val;
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static RTC_BSS_ATTR uint32_t s_rtc_bss_val;
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/* There is no practical difference between placing something into RTC_DATA and
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* RTC_RODATA. This only checks a usage pattern where the variable has a non-zero
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* initializer (should be initialized by the bootloader).
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*/
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static RTC_RODATA_ATTR uint32_t s_rtc_rodata_val = CHECK_VALUE;
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static RTC_FAST_ATTR uint32_t s_rtc_force_fast_val;
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static RTC_SLOW_ATTR uint32_t s_rtc_force_slow_val;
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static void setup_values(void)
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{
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s_noinit_val = CHECK_VALUE;
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s_rtc_noinit_val = CHECK_VALUE;
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s_rtc_data_val = CHECK_VALUE;
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s_rtc_bss_val = CHECK_VALUE;
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TEST_ASSERT_EQUAL_HEX32_MESSAGE(CHECK_VALUE, s_rtc_rodata_val,
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"s_rtc_rodata_val should already be set up");
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s_rtc_force_fast_val = CHECK_VALUE;
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s_rtc_force_slow_val = CHECK_VALUE;
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}
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/* This test needs special test runners: rev1 silicon, and SPI flash with
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* fast start-up time. Otherwise reset reason will be RTCWDT_RESET.
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*/
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TEST_CASE("reset reason ESP_RST_POWERON", "[reset][ignore]")
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{
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TEST_ASSERT_EQUAL(ESP_RST_POWERON, esp_reset_reason());
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}
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static void do_deep_sleep(void)
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{
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setup_values();
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esp_sleep_enable_timer_wakeup(10000);
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esp_deep_sleep_start();
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}
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static void check_reset_reason_deep_sleep(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_DEEPSLEEP, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_data_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_bss_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_force_fast_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_force_slow_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_DEEPSLEEP", "[reset_reason][reset=DEEPSLEEP_RESET]",
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do_deep_sleep,
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check_reset_reason_deep_sleep);
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static void do_exception(void)
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{
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setup_values();
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*(int*) (0x40000001) = 0;
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}
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static void do_abort(void)
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{
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setup_values();
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abort();
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}
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static void check_reset_reason_panic(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_PANIC, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_PANIC after exception", "[reset_reason][reset=LoadStoreError,SW_CPU_RESET]",
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do_exception,
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check_reset_reason_panic);
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_PANIC after abort", "[reset_reason][reset=abort,SW_CPU_RESET]",
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do_abort,
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check_reset_reason_panic);
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static void do_restart(void)
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{
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setup_values();
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esp_restart();
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}
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#if portNUM_PROCESSORS > 1
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static void do_restart_from_app_cpu(void)
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{
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setup_values();
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xTaskCreatePinnedToCore((TaskFunction_t) &do_restart, "restart", 2048, NULL, 5, NULL, 1);
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vTaskDelay(2);
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}
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#endif
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static void check_reset_reason_sw(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_SW, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_SW after restart", "[reset_reason][reset=SW_CPU_RESET]",
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do_restart,
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check_reset_reason_sw);
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#if portNUM_PROCESSORS > 1
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_SW after restart from APP CPU", "[reset_reason][reset=SW_CPU_RESET]",
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do_restart_from_app_cpu,
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check_reset_reason_sw);
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#endif
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static void do_int_wdt(void)
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{
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setup_values();
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portENTER_CRITICAL_NESTED();
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while(1);
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}
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static void do_int_wdt_hw(void)
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{
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setup_values();
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XTOS_SET_INTLEVEL(XCHAL_NMILEVEL);
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while(1);
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}
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static void check_reset_reason_int_wdt(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_INT_WDT, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_INT_WDT after interrupt watchdog (panic)",
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"[reset_reason][reset=Interrupt wdt timeout on CPU0,SW_CPU_RESET]",
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do_int_wdt,
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check_reset_reason_int_wdt);
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_INT_WDT after interrupt watchdog (hw)",
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"[reset_reason][reset=TG1WDT_SYS_RESET]",
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do_int_wdt_hw,
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check_reset_reason_int_wdt);
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static void do_task_wdt(void)
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{
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setup_values();
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esp_task_wdt_init(1, true);
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esp_task_wdt_add(xTaskGetIdleTaskHandleForCPU(0));
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while(1);
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}
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static void check_reset_reason_task_wdt(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_TASK_WDT, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_TASK_WDT after task watchdog",
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"[reset_reason][reset=abort,SW_CPU_RESET]",
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do_task_wdt,
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check_reset_reason_task_wdt);
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static void do_rtc_wdt(void)
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{
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setup_values();
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WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE);
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REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_SYS_RESET_LENGTH, 7);
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REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG0, RTC_WDT_STG_SEL_RESET_SYSTEM);
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WRITE_PERI_REG(RTC_CNTL_WDTCONFIG1_REG, 10000);
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REG_SET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
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while(1);
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}
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static void check_reset_reason_any_wdt(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_WDT, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_WDT after RTC watchdog",
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"[reset_reason][reset=RTCWDT_RTC_RESET]",
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do_rtc_wdt,
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check_reset_reason_any_wdt);
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static void do_brownout(void)
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{
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setup_values();
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printf("Manual test: lower the supply voltage to cause brownout\n");
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vTaskSuspend(NULL);
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}
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static void check_reset_reason_brownout(void)
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{
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TEST_ASSERT_EQUAL(ESP_RST_BROWNOUT, esp_reset_reason());
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_noinit_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_data_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_bss_val);
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TEST_ASSERT_EQUAL_HEX32(CHECK_VALUE, s_rtc_rodata_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_fast_val);
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TEST_ASSERT_EQUAL_HEX32(0, s_rtc_force_slow_val);
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}
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TEST_CASE_MULTIPLE_STAGES("reset reason ESP_RST_BROWNOUT after brownout event",
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"[reset_reason][ignore][reset=SW_CPU_RESET]",
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do_brownout,
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check_reset_reason_brownout);
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// The following test cases are used to check if the timer_group fix works.
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// Some applications use a software reset, at the reset time, timer_group happens to generate an interrupt.
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// but software reset does not clear interrupt status, this is not safe for application when enable the interrupt of timer_group.
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// This case will check under this fix, whether the interrupt status is cleared after timer_group initialization.
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static void timer_group_test_init(void)
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{
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static const uint32_t time_ms = 100; //Alarm value 100ms.
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static const uint16_t timer_div = 10; //Timer prescaler
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static const uint32_t ste_val = time_ms * (TIMER_BASE_CLK / timer_div / 1000);
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timer_config_t config = {
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.divider = timer_div,
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.counter_dir = TIMER_COUNT_UP,
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.counter_en = TIMER_PAUSE,
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.alarm_en = TIMER_ALARM_EN,
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.intr_type = TIMER_INTR_LEVEL,
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.auto_reload = true,
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};
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timer_init(TIMER_GROUP_0, TIMER_0, &config);
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timer_set_counter_value(TIMER_GROUP_0, TIMER_0, 0x00000000ULL);
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timer_set_alarm_value(TIMER_GROUP_0, TIMER_0, ste_val);
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//Now the timer is ready.
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//We only need to check the interrupt status and don't have to register a interrupt routine.
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}
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static void timer_group_test_first_stage(void)
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{
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RESET_REASON rst_res = rtc_get_reset_reason(0);
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if(rst_res != POWERON_RESET){
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printf("Not power on reset\n");
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}
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TEST_ASSERT_EQUAL(POWERON_RESET, rst_res);
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static uint8_t loop_cnt = 0;
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timer_group_test_init();
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//Start timer
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timer_start(TIMER_GROUP_0, TIMER_0);
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//Waiting for timer_group to generate an interrupt
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while( !(timer_group_intr_get_in_isr(TIMER_GROUP_0) & TIMER_INTR_T0) &&
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loop_cnt++ < 100) {
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vTaskDelay(200);
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}
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//TIMERG0.int_raw.t0 == 1 means an interruption has occurred
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TEST_ASSERT(timer_group_intr_get_in_isr(TIMER_GROUP_0) & TIMER_INTR_T0);
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esp_restart();
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}
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static void timer_group_test_second_stage(void)
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{
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RESET_REASON rst_res = rtc_get_reset_reason(0);
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if(rst_res != SW_CPU_RESET){
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printf("Not software reset\n");
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}
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TEST_ASSERT_EQUAL(SW_CPU_RESET, rst_res);
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timer_group_test_init();
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//After the timer_group is initialized, TIMERG0.int_raw.t0 should be cleared.
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TEST_ASSERT_EQUAL(0, TIMERG0.int_raw.t0);
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}
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TEST_CASE_MULTIPLE_STAGES("timer_group software reset test",
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"[intr_status][intr_status = 0]",
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timer_group_test_first_stage,
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timer_group_test_second_stage);
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/* Not tested here: ESP_RST_SDIO */
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