kopia lustrzana https://github.com/espressif/esp-idf
101 wiersze
6.6 KiB
ReStructuredText
101 wiersze
6.6 KiB
ReStructuredText
.. code-block:: none
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espefuse.py -p PORT summary
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Connecting...................
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Detecting chip type... ESP32-C2
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espefuse.py v4.1
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=== Run "summary" command ===
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EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
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----------------------------------------------------------------------------------------
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Adc_Calib fuses:
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ADC_CALIBRATION_0 (BLOCK2) = 0 R/W (0b0000000000000000000000)
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ADC_CALIBRATION_1 (BLOCK2) = 0 R/W (0x00000000)
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ADC_CALIBRATION_2 (BLOCK2) = 0 R/W (0x00000000)
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Config fuses:
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UART_PRINT_CONTROL (BLOCK0) Set UART boot message output mode = Force print R/W (0b00)
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FORCE_SEND_RESUME (BLOCK0) Force ROM code to send a resume cmd during SPI boo = False R/W (0b0)
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t
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DIS_DIRECT_BOOT (BLOCK0) Disable direct_boot mode = False R/W (0b0)
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Efuse fuses:
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WR_DIS (BLOCK0) Disables programming of individual eFuses = 0 R/W (0x00)
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RD_DIS (BLOCK0) Disables software reading from BLOCK3 = 0 R/W (0b00)
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Flash Config fuses:
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FLASH_TPUW (BLOCK0) Configures flash startup delay after SoC power-up, = 0 R/W (0x0)
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unit is (ms/2). When the value is 15, delay is 7.
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5 ms
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Identity fuses:
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SECURE_VERSION (BLOCK0) Secure version (anti-rollback feature) = 0 R/W (0x0)
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CUSTOM_MAC_USED (BLOCK0) Enable CUSTOM_MAC programming = False R/W (0b0)
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CUSTOM_MAC (BLOCK1) Custom MAC addr
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= 00:00:00:00:00:00 (OK) R/W
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MAC (BLOCK2) Factory MAC Address
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= 94:b5:55:80:00:d0 (OK) R/W
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WAFER_VERSION (BLOCK2) WAFER version = (revision 0) R/W (0b000)
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PKG_VERSION (BLOCK2) Package version = ESP32-C2 R/W (0b000)
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BLOCK2_VERSION (BLOCK2) Version of BLOCK2 = No calibration R/W (0b000)
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Jtag Config fuses:
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DIS_PAD_JTAG (BLOCK0) Permanently disable JTAG access via padsUSB JTAG i = False R/W (0b0)
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s controlled separately
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Ldo fuses:
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LDO_VOL_BIAS_CONFIG_LOW (BLOCK2) = 0 R/W (0b000)
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LDO_VOL_BIAS_CONFIG_HIGH (BLOCK2) = 0 R/W (0b000000000000000000000000000)
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Pvt fuses:
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PVT_LOW (BLOCK2) = 0 R/W (0b00000)
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PVT_HIGH (BLOCK2) = 0 R/W (0b0000000000)
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Rf fuses:
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RF_REF_I_BIAS_CONFIG (BLOCK2) = 0 R/W (0b000)
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Security fuses:
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DIS_DOWNLOAD_ICACHE (BLOCK0) Disables iCache in download mode = False R/W (0b0)
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DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Disables flash encryption in Download boot modes = False R/W (0b0)
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SPI_BOOT_CRYPT_CNT (BLOCK0) Enables encryption and decryption, when an SPI boo = Disable R/W (0b000)
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t mode is set. Enabled when 1 or 3 bits are set,dis
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abled otherwise
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XTS_KEY_LENGTH_256 (BLOCK0) Flash encryption key length = 128 bits key R/W (0b0)
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DIS_DOWNLOAD_MODE (BLOCK0) Disables all Download boot modes = False R/W (0b0)
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ENABLE_SECURITY_DOWNLOAD (BLOCK0) Enables secure UART download mode (read/write flas = False R/W (0b0)
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h only)
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SECURE_BOOT_EN (BLOCK0) Configures secure boot = Flase R/W (0b0)
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BLOCK_KEY0 (BLOCK3) BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryp
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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tion
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BLOCK_KEY0_LOW_128 (BLOCK3) BLOCK_KEY0 - lower 128-bits. 128-bit key of Flash
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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Encryption
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BLOCK_KEY0_HI_128 (BLOCK3) BLOCK_KEY0 - higher 128-bits. 128-bits key of Secu
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= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
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re Boot.
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Wdt Config fuses:
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WDT_DELAY_SEL (BLOCK0) RTC WDT timeout threshold = 0 R/W (0b00)
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To get a dump for all eFuse registers.
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.. code-block:: none
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espefuse.py -p PORT dump
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Connecting..............
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Detecting chip type... ESP32-C2
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BLOCK0 (BLOCK0 ) [0 ] read_regs: 00000000 00000000
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BLOCK1 (BLOCK1 ) [1 ] read_regs: 00000000 00000000 00000000
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BLOCK2 (BLOCK2 ) [2 ] read_regs: 558000d0 000094b5 00000000 00000000 00000000 00000000 00000000 00000000
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BLOCK_KEY0 (BLOCK3 ) [3 ] read_regs: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
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BLOCK0 (BLOCK0 ) [0 ] err__regs: 00000000 00000000
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EFUSE_RD_RS_ERR_REG 0x00000000
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espefuse.py v4.1
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=== Run "dump" command ===
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