kopia lustrzana https://github.com/espressif/esp-idf
177 wiersze
6.9 KiB
C
177 wiersze
6.9 KiB
C
/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include <stdio.h>
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#include "sdkconfig.h"
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#include "esp_log.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "driver/adc.h"
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#define TIMES 256
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#define GET_UNIT(x) ((x>>3) & 0x1)
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#if CONFIG_IDF_TARGET_ESP32
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#define ADC_RESULT_BYTE 2
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#define ADC_CONV_LIMIT_EN 1 //For ESP32, this should always be set to 1
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#define ADC_CONV_MODE ADC_CONV_SINGLE_UNIT_1 //ESP32 only supports ADC1 DMA mode
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#define ADC_OUTPUT_TYPE ADC_DIGI_OUTPUT_FORMAT_TYPE1
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define ADC_RESULT_BYTE 2
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#define ADC_CONV_LIMIT_EN 0
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#define ADC_CONV_MODE ADC_CONV_BOTH_UNIT
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#define ADC_OUTPUT_TYPE ADC_DIGI_OUTPUT_FORMAT_TYPE2
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#elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
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#define ADC_RESULT_BYTE 4
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#define ADC_CONV_LIMIT_EN 0
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#define ADC_CONV_MODE ADC_CONV_ALTER_UNIT //ESP32C3 only supports alter mode
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#define ADC_OUTPUT_TYPE ADC_DIGI_OUTPUT_FORMAT_TYPE2
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#elif CONFIG_IDF_TARGET_ESP32S3
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#define ADC_RESULT_BYTE 4
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#define ADC_CONV_LIMIT_EN 0
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#define ADC_CONV_MODE ADC_CONV_BOTH_UNIT
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#define ADC_OUTPUT_TYPE ADC_DIGI_OUTPUT_FORMAT_TYPE2
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#endif
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#if CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32C2
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static uint16_t adc1_chan_mask = BIT(2) | BIT(3);
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static uint16_t adc2_chan_mask = BIT(0);
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static adc_channel_t channel[3] = {ADC1_CHANNEL_2, ADC1_CHANNEL_3, (ADC2_CHANNEL_0 | 1 << 3)};
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#endif
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#if CONFIG_IDF_TARGET_ESP32S2
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static uint16_t adc1_chan_mask = BIT(2) | BIT(3);
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static uint16_t adc2_chan_mask = BIT(0);
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static adc_channel_t channel[3] = {ADC1_CHANNEL_2, ADC1_CHANNEL_3, (ADC2_CHANNEL_0 | 1 << 3)};
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#endif
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#if CONFIG_IDF_TARGET_ESP32
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static uint16_t adc1_chan_mask = BIT(7);
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static uint16_t adc2_chan_mask = 0;
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static adc_channel_t channel[1] = {ADC1_CHANNEL_7};
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#endif
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static const char *TAG = "ADC DMA";
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static void continuous_adc_init(uint16_t adc1_chan_mask, uint16_t adc2_chan_mask, adc_channel_t *channel, uint8_t channel_num)
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{
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adc_digi_init_config_t adc_dma_config = {
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.max_store_buf_size = 1024,
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.conv_num_each_intr = TIMES,
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.adc1_chan_mask = adc1_chan_mask,
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.adc2_chan_mask = adc2_chan_mask,
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};
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ESP_ERROR_CHECK(adc_digi_initialize(&adc_dma_config));
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adc_digi_configuration_t dig_cfg = {
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.conv_limit_en = ADC_CONV_LIMIT_EN,
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.conv_limit_num = 250,
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.sample_freq_hz = 10 * 1000,
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.conv_mode = ADC_CONV_MODE,
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.format = ADC_OUTPUT_TYPE,
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};
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adc_digi_pattern_config_t adc_pattern[SOC_ADC_PATT_LEN_MAX] = {0};
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dig_cfg.pattern_num = channel_num;
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for (int i = 0; i < channel_num; i++) {
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uint8_t unit = GET_UNIT(channel[i]);
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uint8_t ch = channel[i] & 0x7;
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adc_pattern[i].atten = ADC_ATTEN_DB_0;
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adc_pattern[i].channel = ch;
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adc_pattern[i].unit = unit;
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adc_pattern[i].bit_width = SOC_ADC_DIGI_MAX_BITWIDTH;
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ESP_LOGI(TAG, "adc_pattern[%d].atten is :%x", i, adc_pattern[i].atten);
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ESP_LOGI(TAG, "adc_pattern[%d].channel is :%x", i, adc_pattern[i].channel);
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ESP_LOGI(TAG, "adc_pattern[%d].unit is :%x", i, adc_pattern[i].unit);
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}
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dig_cfg.adc_pattern = adc_pattern;
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ESP_ERROR_CHECK(adc_digi_controller_configure(&dig_cfg));
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}
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#if !CONFIG_IDF_TARGET_ESP32
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static bool check_valid_data(const adc_digi_output_data_t *data)
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{
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const unsigned int unit = data->type2.unit;
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if (unit > 2) return false;
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if (data->type2.channel >= SOC_ADC_CHANNEL_NUM(unit)) return false;
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return true;
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}
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#endif
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void app_main(void)
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{
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esp_err_t ret;
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uint32_t ret_num = 0;
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uint8_t result[TIMES] = {0};
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memset(result, 0xcc, TIMES);
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continuous_adc_init(adc1_chan_mask, adc2_chan_mask, channel, sizeof(channel) / sizeof(adc_channel_t));
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adc_digi_start();
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while(1) {
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ret = adc_digi_read_bytes(result, TIMES, &ret_num, ADC_MAX_DELAY);
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if (ret == ESP_OK || ret == ESP_ERR_INVALID_STATE) {
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if (ret == ESP_ERR_INVALID_STATE) {
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/**
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* @note 1
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* Issue:
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* As an example, we simply print the result out, which is super slow. Therefore the conversion is too
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* fast for the task to handle. In this condition, some conversion results lost.
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*
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* Reason:
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* When this error occurs, you will usually see the task watchdog timeout issue also.
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* Because the conversion is too fast, whereas the task calling `adc_digi_read_bytes` is slow.
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* So `adc_digi_read_bytes` will hardly block. Therefore Idle Task hardly has chance to run. In this
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* example, we add a `vTaskDelay(1)` below, to prevent the task watchdog timeout.
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*
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* Solution:
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* Either decrease the conversion speed, or increase the frequency you call `adc_digi_read_bytes`
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*/
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}
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ESP_LOGI("TASK:", "ret is %x, ret_num is %d", ret, ret_num);
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for (int i = 0; i < ret_num; i += ADC_RESULT_BYTE) {
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adc_digi_output_data_t *p = (void*)&result[i];
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#if CONFIG_IDF_TARGET_ESP32
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ESP_LOGI(TAG, "Unit: %d, Channel: %d, Value: %x", 1, p->type1.channel, p->type1.data);
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#else
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if (ADC_CONV_MODE == ADC_CONV_BOTH_UNIT || ADC_CONV_MODE == ADC_CONV_ALTER_UNIT) {
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if (check_valid_data(p)) {
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ESP_LOGI(TAG, "Unit: %d,_Channel: %d, Value: %x", p->type2.unit+1, p->type2.channel, p->type2.data);
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} else {
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// abort();
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ESP_LOGI(TAG, "Invalid data [%d_%d_%x]", p->type2.unit+1, p->type2.channel, p->type2.data);
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}
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}
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#if CONFIG_IDF_TARGET_ESP32S2
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else if (ADC_CONV_MODE == ADC_CONV_SINGLE_UNIT_2) {
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ESP_LOGI(TAG, "Unit: %d, Channel: %d, Value: %x", 2, p->type1.channel, p->type1.data);
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} else if (ADC_CONV_MODE == ADC_CONV_SINGLE_UNIT_1) {
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ESP_LOGI(TAG, "Unit: %d, Channel: %d, Value: %x", 1, p->type1.channel, p->type1.data);
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}
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#endif //#if CONFIG_IDF_TARGET_ESP32S2
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#endif
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}
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//See `note 1`
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vTaskDelay(1);
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} else if (ret == ESP_ERR_TIMEOUT) {
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/**
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* ``ESP_ERR_TIMEOUT``: If ADC conversion is not finished until Timeout, you'll get this return error.
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* Here we set Timeout ``portMAX_DELAY``, so you'll never reach this branch.
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*/
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ESP_LOGW(TAG, "No data, increase timeout or reduce conv_num_each_intr");
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vTaskDelay(1000);
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}
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}
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adc_digi_stop();
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ret = adc_digi_deinitialize();
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assert(ret == ESP_OK);
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}
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