esp-idf/components/freertos
Angus Gratton 367ecc2d60 Merge branch 'refactor/timerg_in_test' into 'master'
timer_group: refactoring to avoid direct register access in the ISR

See merge request espressif/esp-idf!5656
2019-08-14 15:32:16 +08:00
..
include/freertos freertos: Rename CORE_ID_PRO/CORE_ID_APP macros to CORE_ID_REGVAL_xxx 2019-08-12 11:12:34 +10:00
test timer_group: use the LL 2019-08-09 13:46:31 +08:00
CMakeLists.txt cmake: some formatting fixes 2019-06-21 19:53:29 +08:00
FreeRTOS-openocd.c
Kconfig
component.mk
croutine.c
event_groups.c
license.txt
linker.lf
list.c
port.c tools: Mass fixing of empty prototypes (for -Wstrict-prototypes) 2019-08-01 16:28:56 +07:00
portasm.S
portmacro_priv.h
portmux_impl.h freertos: Rename CORE_ID_PRO/CORE_ID_APP macros to CORE_ID_REGVAL_xxx 2019-08-12 11:12:34 +10:00
portmux_impl.inc.h freertos: Rename CORE_ID_PRO/CORE_ID_APP macros to CORE_ID_REGVAL_xxx 2019-08-12 11:12:34 +10:00
queue.c
readme_xtensa.txt
sdkconfig.rename
stdint.readme
tasks.c Fix remaining -Wstrict-prototypes warnings 2019-08-01 16:28:56 +07:00
timers.c
xtensa_context.S
xtensa_init.c
xtensa_intr.c
xtensa_intr_asm.S
xtensa_overlay_os_hook.c
xtensa_vector_defaults.S
xtensa_vectors.S