esp-idf/components/espcoredump
Sachin Parekh 46dc36233a coredump: Parse backtrace info for RISCV
For RISCV, backtrace generation on device is not possible without
including and parsing DWARF sections. We extract the crash task stack
and let the host generate the backtrace
2021-05-17 11:43:25 +05:30
..
corefile feat(coredump): add esp32s2 and esp32c3 support 2021-04-26 20:44:23 +08:00
include coredump: Parse backtrace info for RISCV 2021-05-17 11:43:25 +05:30
include_core_dump coredump: Parse backtrace info for RISCV 2021-05-17 11:43:25 +05:30
src coredump: Parse backtrace info for RISCV 2021-05-17 11:43:25 +05:30
test feat(coredump): add esp32s2 and esp32c3 support 2021-04-26 20:44:23 +08:00
CMakeLists.txt espcoredump: On device core dump parsing to generate summary 2021-04-09 09:43:40 +05:30
Kconfig coredump: Parse backtrace info for RISCV 2021-05-17 11:43:25 +05:30
component.mk espcoredump: On device core dump parsing to generate summary 2021-04-09 09:43:40 +05:30
espcoredump.py feat(coredump): add esp32s2 and esp32c3 support 2021-04-26 20:44:23 +08:00
linker.lf ldgen: use uppercase keywords for flags 2021-03-01 14:19:34 +08:00
sdkconfig.rename espcoredump: remove ESP32 prefix from config options 2020-09-30 20:22:27 +05:30