esp-idf/components/soc
Marius Vikhammer 457ce080ae AES: refactor and add HAL layer
Refactor the AES driver and add HAL, LL and caps.

Add better support for running AES-GCM fully in hardware.
2020-12-10 09:04:47 +00:00
..
esp32 AES: refactor and add HAL layer 2020-12-10 09:04:47 +00:00
esp32c3 AES: refactor and add HAL layer 2020-12-10 09:04:47 +00:00
esp32s2 AES: refactor and add HAL layer 2020-12-10 09:04:47 +00:00
esp32s3 AES: refactor and add HAL layer 2020-12-10 09:04:47 +00:00
include/soc AES: refactor and add HAL layer 2020-12-10 09:04:47 +00:00
CMakeLists.txt
README.md
component.mk
linker.lf
lldesc.c
memory_layout_utils.c
soc_include_legacy_warn.c

README.md

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware