kopia lustrzana https://github.com/espressif/esp-idf
75 wiersze
1.9 KiB
C
75 wiersze
1.9 KiB
C
// Copyright 2015-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "soc/cpu.h"
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#include "soc/soc_memory_layout.h"
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#if __XTENSA__
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#include "xtensa/xtruntime.h"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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static inline void __attribute__((always_inline)) compare_and_set_native(volatile uint32_t *addr, uint32_t compare, uint32_t *set)
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{
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#if (XCHAL_HAVE_S32C1I > 0)
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__asm__ __volatile__ (
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"WSR %2,SCOMPARE1 \n"
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"S32C1I %0, %1, 0 \n"
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:"=r"(*set)
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:"r"(addr), "r"(compare), "0"(*set)
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);
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#else
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uint32_t old_value;
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#ifdef __XTENSA__
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// No S32C1I, so do this by disabling and re-enabling interrupts (slower)
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uint32_t intlevel;
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__asm__ __volatile__ ("rsil %0, " XTSTR(XCHAL_EXCM_LEVEL) "\n"
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: "=r"(intlevel));
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#else
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unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
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#endif
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old_value = *addr;
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if (old_value == compare) {
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*addr = *set;
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}
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#ifdef __XTENSA__
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__asm__ __volatile__ ("memw \n"
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"wsr %0, ps\n"
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:: "r"(intlevel));
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#else
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RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE);
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#endif
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*set = old_value;
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#endif
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}
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void compare_and_set_extram(volatile uint32_t *addr, uint32_t compare, uint32_t *set);
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#ifdef __cplusplus
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}
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#endif
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