kopia lustrzana https://github.com/espressif/esp-idf
142 wiersze
4.3 KiB
C
142 wiersze
4.3 KiB
C
/*
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* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <sys/param.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "sdkconfig.h"
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#include "esp_err.h"
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#include "esp_attr.h"
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#include "hal/assert.h"
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#include "hal/mmu_hal.h"
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#include "hal/mmu_ll.h"
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void mmu_hal_init(void)
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{
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mmu_ll_unmap_all(0);
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#if !CONFIG_FREERTOS_UNICORE
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mmu_ll_unmap_all(1);
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#endif
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}
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uint32_t mmu_hal_pages_to_bytes(uint32_t mmu_id, uint32_t page_num)
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{
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mmu_page_size_t page_size = mmu_ll_get_page_size(mmu_id);
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uint32_t shift_code = 0;
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switch (page_size) {
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case MMU_PAGE_64KB:
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shift_code = 16;
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break;
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case MMU_PAGE_32KB:
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shift_code = 15;
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break;
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case MMU_PAGE_16KB:
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shift_code = 14;
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break;
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default:
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HAL_ASSERT(shift_code);
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}
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return page_num << shift_code;
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}
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uint32_t mmu_hal_bytes_to_pages(uint32_t mmu_id, uint32_t bytes)
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{
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mmu_page_size_t page_size = mmu_ll_get_page_size(mmu_id);
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uint32_t shift_code = 0;
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switch (page_size) {
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case MMU_PAGE_64KB:
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shift_code = 16;
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break;
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case MMU_PAGE_32KB:
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shift_code = 15;
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break;
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case MMU_PAGE_16KB:
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shift_code = 14;
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break;
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default:
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HAL_ASSERT(shift_code);
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}
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return bytes >> shift_code;
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}
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void mmu_hal_map_region(uint32_t mmu_id, mmu_target_t mem_type, uint32_t vaddr, uint32_t paddr, uint32_t len, uint32_t *out_len)
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{
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uint32_t page_size_in_bytes = mmu_hal_pages_to_bytes(mmu_id, 1);
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HAL_ASSERT(vaddr % page_size_in_bytes == 0);
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HAL_ASSERT(paddr % page_size_in_bytes == 0);
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HAL_ASSERT(mmu_ll_check_valid_paddr_region(mmu_id, paddr, len));
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HAL_ASSERT(mmu_ll_check_valid_ext_vaddr_region(mmu_id, vaddr, len));
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uint32_t page_num = (len + page_size_in_bytes - 1) / page_size_in_bytes;
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uint32_t entry_id = 0;
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uint32_t mmu_val; //This is the physical address in the format that MMU supported
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*out_len = mmu_hal_pages_to_bytes(mmu_id, page_num);
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mmu_val = mmu_ll_format_paddr(mmu_id, paddr, mem_type);
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while (page_num) {
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entry_id = mmu_ll_get_entry_id(mmu_id, vaddr);
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mmu_ll_write_entry(mmu_id, entry_id, mmu_val, mem_type);
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vaddr += page_size_in_bytes;
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mmu_val++;
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page_num--;
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}
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}
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void mmu_hal_unmap_region(uint32_t mmu_id, uint32_t vaddr, uint32_t len)
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{
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uint32_t page_size_in_bytes = mmu_hal_pages_to_bytes(mmu_id, 1);
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HAL_ASSERT(vaddr % page_size_in_bytes == 0);
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HAL_ASSERT(mmu_ll_check_valid_ext_vaddr_region(mmu_id, vaddr, len));
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uint32_t page_num = (len + page_size_in_bytes - 1) / page_size_in_bytes;
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uint32_t entry_id = 0;
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while (page_num) {
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entry_id = mmu_ll_get_entry_id(mmu_id, vaddr);
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mmu_ll_set_entry_invalid(mmu_id, entry_id);
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vaddr += page_size_in_bytes;
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page_num--;
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}
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}
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bool mmu_hal_vaddr_to_paddr(uint32_t mmu_id, uint32_t vaddr, uint32_t *out_paddr, mmu_target_t *out_target)
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{
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HAL_ASSERT(mmu_ll_check_valid_ext_vaddr_region(mmu_id, vaddr, 1));
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uint32_t entry_id = mmu_ll_get_entry_id(mmu_id, vaddr);
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if (!mmu_ll_check_entry_valid(mmu_id, entry_id)) {
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return false;
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}
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uint32_t page_size_in_bytes = mmu_hal_pages_to_bytes(mmu_id, 1);
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uint32_t offset = (uint32_t)vaddr % page_size_in_bytes;
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*out_target = mmu_ll_get_entry_target(mmu_id, entry_id);
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uint32_t paddr_base = mmu_ll_entry_id_to_paddr_base(mmu_id, entry_id);
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*out_paddr = paddr_base | offset;
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return true;
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}
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bool mmu_hal_paddr_to_vaddr(uint32_t mmu_id, uint32_t paddr, mmu_target_t target, mmu_vaddr_t type, uint32_t *out_vaddr)
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{
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HAL_ASSERT(mmu_ll_check_valid_paddr_region(mmu_id, paddr, 1));
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uint32_t mmu_val = mmu_ll_format_paddr(mmu_id, paddr, target);
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int entry_id = mmu_ll_find_entry_id_based_on_map_value(mmu_id, mmu_val, target);
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if (entry_id == -1) {
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return false;
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}
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uint32_t page_size_in_bytes = mmu_hal_pages_to_bytes(mmu_id, 1);
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uint32_t offset = paddr % page_size_in_bytes;
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uint32_t vaddr_base = mmu_ll_entry_id_to_vaddr_base(mmu_id, entry_id, type);
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if (vaddr_base == 0) {
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return false;
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}
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*out_vaddr = vaddr_base | offset;
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return true;
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}
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