kopia lustrzana https://github.com/espressif/esp-idf
483 wiersze
25 KiB
C
483 wiersze
25 KiB
C
/*
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* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <string.h>
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#include "esp_log.h"
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#include "esp_err.h"
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#include "esp_check.h"
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#include "esp_intr_alloc.h"
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#include "freertos/FreeRTOS.h"
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#include "driver/timer_types_legacy.h"
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#include "hal/timer_hal.h"
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#include "hal/timer_ll.h"
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#include "hal/check.h"
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#include "soc/timer_periph.h"
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#include "esp_clk_tree.h"
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#include "soc/timer_group_reg.h"
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#include "esp_private/periph_ctrl.h"
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static const char *TIMER_TAG = "timer_group";
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#define TIMER_GROUP_NUM_ERROR "TIMER GROUP NUM ERROR"
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#define TIMER_NUM_ERROR "HW TIMER NUM ERROR"
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#define TIMER_PARAM_ADDR_ERROR "HW TIMER PARAM ADDR ERROR"
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#define TIMER_NEVER_INIT_ERROR "HW TIMER NEVER INIT ERROR"
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#define TIMER_COUNT_DIR_ERROR "HW TIMER COUNTER DIR ERROR"
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#define TIMER_AUTORELOAD_ERROR "HW TIMER AUTORELOAD ERROR"
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#define TIMER_SCALE_ERROR "HW TIMER SCALE ERROR"
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#define TIMER_ALARM_ERROR "HW TIMER ALARM ERROR"
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#define DIVIDER_RANGE_ERROR "HW TIMER divider outside of [2, 65536] range error"
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#define TIMER_ENTER_CRITICAL(mux) portENTER_CRITICAL_SAFE(mux);
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#define TIMER_EXIT_CRITICAL(mux) portEXIT_CRITICAL_SAFE(mux);
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#if SOC_PERIPH_CLK_CTRL_SHARED
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#define GPTIMER_CLOCK_SRC_ATOMIC() PERIPH_RCC_ATOMIC()
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#else
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#define GPTIMER_CLOCK_SRC_ATOMIC()
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#endif
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typedef struct {
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timer_isr_t fn; /*!< isr function */
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void *args; /*!< isr function args */
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timer_isr_handle_t timer_isr_handle; /*!< interrupt handle */
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timer_group_t isr_timer_group; /*!< timer group of interrupt triggered */
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} timer_isr_func_t;
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typedef struct {
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timer_hal_context_t hal;
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timer_isr_func_t timer_isr_fun;
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timer_src_clk_t clk_src;
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gptimer_count_direction_t direction;
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uint32_t divider;
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uint64_t alarm_value;
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bool alarm_en;
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bool auto_reload_en;
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bool counter_en;
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} timer_obj_t;
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static timer_obj_t *p_timer_obj[TIMER_GROUP_MAX][TIMER_MAX] = {0};
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static portMUX_TYPE timer_spinlock[TIMER_GROUP_MAX] = { [0 ... TIMER_GROUP_MAX - 1] = portMUX_INITIALIZER_UNLOCKED, };
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esp_err_t timer_get_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *timer_val)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_val != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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*timer_val = timer_hal_capture_and_get_counter_value(&p_timer_obj[group_num][timer_num]->hal);
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_get_counter_time_sec(timer_group_t group_num, timer_idx_t timer_num, double *time)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(time != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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uint64_t timer_val = timer_hal_capture_and_get_counter_value(&p_timer_obj[group_num][timer_num]->hal);
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uint32_t div = p_timer_obj[group_num][timer_num]->divider;
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// get clock source frequency
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uint32_t counter_src_hz = 0;
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ESP_RETURN_ON_ERROR(esp_clk_tree_src_get_freq_hz((soc_module_clk_t)p_timer_obj[group_num][timer_num]->clk_src,
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ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED, &counter_src_hz),
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TIMER_TAG, "get clock source frequency failed");
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*time = (double)timer_val * div / counter_src_hz;
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return ESP_OK;
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}
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esp_err_t timer_set_counter_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t load_val)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_hal_set_counter_value(&(p_timer_obj[group_num][timer_num]->hal), load_val);
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_start(timer_group_t group_num, timer_idx_t timer_num)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_ll_enable_counter(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, true);
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p_timer_obj[group_num][timer_num]->counter_en = true;
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_pause(timer_group_t group_num, timer_idx_t timer_num)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_ll_enable_counter(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, false);
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p_timer_obj[group_num][timer_num]->counter_en = false;
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_set_counter_mode(timer_group_t group_num, timer_idx_t timer_num, timer_count_dir_t counter_dir)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(counter_dir < TIMER_COUNT_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_COUNT_DIR_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_ll_set_count_direction(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, counter_dir);
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_set_auto_reload(timer_group_t group_num, timer_idx_t timer_num, timer_autoreload_t reload)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(reload < TIMER_AUTORELOAD_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_AUTORELOAD_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_ll_enable_auto_reload(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, reload);
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p_timer_obj[group_num][timer_num]->auto_reload_en = reload;
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_set_divider(timer_group_t group_num, timer_idx_t timer_num, uint32_t divider)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(divider > 1 && divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_ll_set_clock_prescale(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, divider);
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p_timer_obj[group_num][timer_num]->divider = divider;
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_set_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_value)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_ll_set_alarm_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, alarm_value);
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p_timer_obj[group_num][timer_num]->alarm_value = alarm_value;
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_get_alarm_value(timer_group_t group_num, timer_idx_t timer_num, uint64_t *alarm_value)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(alarm_value != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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*alarm_value = p_timer_obj[group_num][timer_num]->alarm_value;
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_set_alarm(timer_group_t group_num, timer_idx_t timer_num, timer_alarm_t alarm_en)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(alarm_en < TIMER_ALARM_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_ALARM_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_ll_enable_alarm(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, alarm_en);
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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static void IRAM_ATTR timer_isr_default(void *arg)
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{
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bool is_awoken = false;
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timer_obj_t *timer_obj = (timer_obj_t *)arg;
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if (timer_obj == NULL || timer_obj->timer_isr_fun.fn == NULL) {
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return;
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}
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uint32_t timer_id = timer_obj->hal.timer_id;
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timer_hal_context_t *hal = &timer_obj->hal;
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TIMER_ENTER_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
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uint32_t intr_status = timer_ll_get_intr_status(hal->dev);
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uint64_t old_alarm_value = timer_obj->alarm_value;
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if (intr_status & TIMER_LL_EVENT_ALARM(timer_id)) {
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// Clear interrupt status
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timer_ll_clear_intr_status(hal->dev, TIMER_LL_EVENT_ALARM(timer_id));
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// call user registered callback
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is_awoken = timer_obj->timer_isr_fun.fn(timer_obj->timer_isr_fun.args);
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// reenable alarm if required
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uint64_t new_alarm_value = timer_obj->alarm_value;
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bool reenable_alarm = (new_alarm_value != old_alarm_value) || timer_obj->auto_reload_en;
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timer_ll_enable_alarm(hal->dev, timer_id, reenable_alarm);
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}
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TIMER_EXIT_CRITICAL(&timer_spinlock[timer_obj->timer_isr_fun.isr_timer_group]);
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if (is_awoken) {
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portYIELD_FROM_ISR();
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}
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}
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esp_err_t timer_enable_intr(timer_group_t group_num, timer_idx_t timer_num)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_ll_enable_intr(p_timer_obj[group_num][timer_num]->hal.dev, TIMER_LL_EVENT_ALARM(timer_num), true);
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_disable_intr(timer_group_t group_num, timer_idx_t timer_num)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_ll_enable_intr(p_timer_obj[group_num][timer_num]->hal.dev, TIMER_LL_EVENT_ALARM(timer_num), false);
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_isr_register(timer_group_t group_num, timer_idx_t timer_num,
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void (*fn)(void *), void *arg, int intr_alloc_flags, timer_isr_handle_t *handle)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(fn != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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timer_hal_context_t *hal = &p_timer_obj[group_num][timer_num]->hal;
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return esp_intr_alloc_intrstatus(timer_group_periph_signals.groups[group_num].timer_irq_id[timer_num],
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intr_alloc_flags,
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(uint32_t)timer_ll_get_intr_status_reg(hal->dev),
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TIMER_LL_EVENT_ALARM(timer_num), fn, arg, handle);
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}
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esp_err_t timer_isr_callback_add(timer_group_t group_num, timer_idx_t timer_num, timer_isr_t isr_handler, void *args, int intr_alloc_flags)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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esp_err_t ret = ESP_OK;
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timer_disable_intr(group_num, timer_num);
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p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = isr_handler;
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p_timer_obj[group_num][timer_num]->timer_isr_fun.args = args;
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p_timer_obj[group_num][timer_num]->timer_isr_fun.isr_timer_group = group_num;
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ret = timer_isr_register(group_num, timer_num, timer_isr_default, (void *)p_timer_obj[group_num][timer_num],
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intr_alloc_flags, &(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle));
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ESP_RETURN_ON_ERROR(ret, TIMER_TAG, "register interrupt service failed");
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timer_enable_intr(group_num, timer_num);
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return ret;
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}
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esp_err_t timer_isr_callback_remove(timer_group_t group_num, timer_idx_t timer_num)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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timer_disable_intr(group_num, timer_num);
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p_timer_obj[group_num][timer_num]->timer_isr_fun.fn = NULL;
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p_timer_obj[group_num][timer_num]->timer_isr_fun.args = NULL;
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esp_intr_free(p_timer_obj[group_num][timer_num]->timer_isr_fun.timer_isr_handle);
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return ESP_OK;
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}
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esp_err_t timer_init(timer_group_t group_num, timer_idx_t timer_num, const timer_config_t *config)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
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ESP_RETURN_ON_FALSE(config->divider > 1 && config->divider < 65537, ESP_ERR_INVALID_ARG, TIMER_TAG, DIVIDER_RANGE_ERROR);
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ESP_RETURN_ON_FALSE(config->intr_type < TIMER_INTR_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, "only support Level Interrupt");
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if (p_timer_obj[group_num][timer_num] == NULL) {
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p_timer_obj[group_num][timer_num] = (timer_obj_t *) heap_caps_calloc(1, sizeof(timer_obj_t), MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num], ESP_ERR_NO_MEM, TIMER_TAG, "no mem for timer object");
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}
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timer_hal_context_t *hal = &p_timer_obj[group_num][timer_num]->hal;
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PERIPH_RCC_ACQUIRE_ATOMIC(timer_group_periph_signals.groups[group_num].module, ref_count) {
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if (ref_count == 0) {
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timer_ll_enable_bus_clock(group_num, true);
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timer_ll_reset_register(group_num);
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}
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}
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_hal_init(hal, group_num, timer_num);
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timer_hal_set_counter_value(hal, 0);
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timer_src_clk_t clk_src = TIMER_SRC_CLK_DEFAULT;
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if (config->clk_src) {
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clk_src = config->clk_src;
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}
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GPTIMER_CLOCK_SRC_ATOMIC() {
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// although `clk_src` is of `timer_src_clk_t` type, but it's binary compatible with `gptimer_clock_source_t`,
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// as the underlying enum entries come from the same `soc_module_clk_t`
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timer_ll_set_clock_source(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, (gptimer_clock_source_t)clk_src);
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timer_ll_enable_clock(hal->dev, timer_num, true);
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}
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timer_ll_set_clock_prescale(hal->dev, timer_num, config->divider);
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timer_ll_set_count_direction(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, config->counter_dir);
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timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(timer_num), false);
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timer_ll_clear_intr_status(hal->dev, TIMER_LL_EVENT_ALARM(timer_num));
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timer_ll_enable_alarm(hal->dev, timer_num, config->alarm_en);
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timer_ll_enable_auto_reload(hal->dev, timer_num, config->auto_reload);
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timer_ll_enable_counter(hal->dev, timer_num, config->counter_en);
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p_timer_obj[group_num][timer_num]->clk_src = clk_src;
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p_timer_obj[group_num][timer_num]->alarm_en = config->alarm_en;
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p_timer_obj[group_num][timer_num]->auto_reload_en = config->auto_reload;
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p_timer_obj[group_num][timer_num]->direction = config->counter_dir;
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p_timer_obj[group_num][timer_num]->counter_en = config->counter_en;
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p_timer_obj[group_num][timer_num]->divider = config->divider;
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
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esp_err_t timer_deinit(timer_group_t group_num, timer_idx_t timer_num)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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timer_hal_context_t *hal = &p_timer_obj[group_num][timer_num]->hal;
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// disable the source clock
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GPTIMER_CLOCK_SRC_ATOMIC() {
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timer_ll_enable_clock(hal->dev, hal->timer_id, false);
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}
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_ll_enable_intr(hal->dev, TIMER_LL_EVENT_ALARM(timer_num), false);
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timer_ll_clear_intr_status(hal->dev, TIMER_LL_EVENT_ALARM(timer_num));
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timer_hal_deinit(hal);
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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PERIPH_RCC_RELEASE_ATOMIC(timer_group_periph_signals.groups[group_num].module, ref_count) {
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if (ref_count == 0) {
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timer_ll_enable_bus_clock(group_num, false);
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}
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}
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|
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free(p_timer_obj[group_num][timer_num]);
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p_timer_obj[group_num][timer_num] = NULL;
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|
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return ESP_OK;
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}
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|
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esp_err_t timer_get_config(timer_group_t group_num, timer_idx_t timer_num, timer_config_t *config)
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{
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
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ESP_RETURN_ON_FALSE(timer_num < TIMER_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NUM_ERROR);
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ESP_RETURN_ON_FALSE(config != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_PARAM_ADDR_ERROR);
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num][timer_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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config->alarm_en = p_timer_obj[group_num][timer_num]->alarm_en;
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config->auto_reload = p_timer_obj[group_num][timer_num]->auto_reload_en;
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config->counter_dir = p_timer_obj[group_num][timer_num]->direction;
|
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config->counter_en = p_timer_obj[group_num][timer_num]->counter_en;
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config->divider = p_timer_obj[group_num][timer_num]->divider;
|
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config->intr_type = TIMER_INTR_LEVEL;
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
|
|
|
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esp_err_t timer_group_intr_enable(timer_group_t group_num, timer_intr_t en_mask)
|
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{
|
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
|
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
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timer_ll_enable_intr(p_timer_obj[group_num][0]->hal.dev, en_mask, true);
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
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}
|
|
|
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esp_err_t timer_group_intr_disable(timer_group_t group_num, timer_intr_t disable_mask)
|
|
{
|
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ESP_RETURN_ON_FALSE(group_num < TIMER_GROUP_MAX, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_GROUP_NUM_ERROR);
|
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ESP_RETURN_ON_FALSE(p_timer_obj[group_num] != NULL, ESP_ERR_INVALID_ARG, TIMER_TAG, TIMER_NEVER_INIT_ERROR);
|
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TIMER_ENTER_CRITICAL(&timer_spinlock[group_num]);
|
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timer_ll_enable_intr(p_timer_obj[group_num][0]->hal.dev, disable_mask, false);
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TIMER_EXIT_CRITICAL(&timer_spinlock[group_num]);
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return ESP_OK;
|
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}
|
|
|
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uint32_t IRAM_ATTR timer_group_get_intr_status_in_isr(timer_group_t group_num)
|
|
{
|
|
uint32_t intr_status = 0;
|
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if (p_timer_obj[group_num][TIMER_0] != NULL) {
|
|
intr_status = timer_ll_get_intr_status(TIMER_LL_GET_HW(group_num)) & TIMER_LL_EVENT_ALARM(0);
|
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}
|
|
#if SOC_TIMER_GROUP_TIMERS_PER_GROUP > 1
|
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else if (p_timer_obj[group_num][TIMER_1] != NULL) {
|
|
intr_status = timer_ll_get_intr_status(TIMER_LL_GET_HW(group_num)) & TIMER_LL_EVENT_ALARM(1);
|
|
}
|
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#endif
|
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return intr_status;
|
|
}
|
|
|
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void IRAM_ATTR timer_group_clr_intr_status_in_isr(timer_group_t group_num, timer_idx_t timer_num)
|
|
{
|
|
timer_ll_clear_intr_status(p_timer_obj[group_num][timer_num]->hal.dev, TIMER_LL_EVENT_ALARM(timer_num));
|
|
}
|
|
|
|
void IRAM_ATTR timer_group_enable_alarm_in_isr(timer_group_t group_num, timer_idx_t timer_num)
|
|
{
|
|
timer_ll_enable_alarm(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, true);
|
|
}
|
|
|
|
uint64_t IRAM_ATTR timer_group_get_counter_value_in_isr(timer_group_t group_num, timer_idx_t timer_num)
|
|
{
|
|
timer_ll_trigger_soft_capture(p_timer_obj[group_num][timer_num]->hal.dev, timer_num);
|
|
uint64_t val = timer_ll_get_counter_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num);
|
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return val;
|
|
}
|
|
|
|
void IRAM_ATTR timer_group_set_alarm_value_in_isr(timer_group_t group_num, timer_idx_t timer_num, uint64_t alarm_val)
|
|
{
|
|
timer_ll_set_alarm_value(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, alarm_val);
|
|
p_timer_obj[group_num][timer_num]->alarm_value = alarm_val;
|
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}
|
|
|
|
void IRAM_ATTR timer_group_set_counter_enable_in_isr(timer_group_t group_num, timer_idx_t timer_num, timer_start_t counter_en)
|
|
{
|
|
timer_ll_enable_counter(p_timer_obj[group_num][timer_num]->hal.dev, timer_num, counter_en);
|
|
p_timer_obj[group_num][timer_num]->counter_en = counter_en;
|
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}
|
|
|
|
bool IRAM_ATTR timer_group_get_auto_reload_in_isr(timer_group_t group_num, timer_idx_t timer_num)
|
|
{
|
|
return p_timer_obj[group_num][timer_num]->auto_reload_en;
|
|
}
|
|
|
|
/**
|
|
* @brief This function will be called during start up, to check that this legacy timer group driver is not running along with the gptimer driver
|
|
*/
|
|
__attribute__((constructor))
|
|
static void check_legacy_timer_driver_conflict(void)
|
|
{
|
|
// This function was declared as weak here. gptimer driver has one implementation.
|
|
// So if gptimer driver is not linked in, then `gptimer_new_timer()` should be NULL at runtime.
|
|
extern __attribute__((weak)) esp_err_t gptimer_new_timer(const void *config, void **ret_timer);
|
|
if ((void *)gptimer_new_timer != NULL) {
|
|
ESP_EARLY_LOGE(TIMER_TAG, "CONFLICT! driver_ng is not allowed to be used with the legacy driver");
|
|
abort();
|
|
}
|
|
ESP_EARLY_LOGW(TIMER_TAG, "legacy driver is deprecated, please migrate to `driver/gptimer.h`");
|
|
}
|