Jeroen Domburg 34372a091c Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.		2017-09-04 12:05:49 +08:00
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include/soc	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00
test	…
cpu_util.c	…
i2c_apll.h	…
i2c_bbpll.h	…
i2c_rtc_clk.h	…
rtc_clk.c	soc/rtc: round APB clock frequency to nearest MHz	2017-09-01 10:34:36 +08:00
rtc_init.c	…
rtc_pm.c	…
rtc_sleep.c	sleep: add light sleep, factor out APIs common for deep/light sleep	2017-09-01 10:36:14 +08:00
rtc_time.c	…
soc_log.h	…
soc_memory_layout.c	…