kopia lustrzana https://github.com/espressif/esp-idf
5276cd4f1d
Increase LP_UART_EMPTY_THRESH_DEFAULT value to 4. The original value could cause the FIFO become empty before filling next data into the FIFO when the buadrate is high. TX_DONE interrupt would raise before actual transmission complete in such case. |
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| .. | ||
| include/soc | ||
| ld | ||
| adc_periph.c | ||
| dedic_gpio_periph.c | ||
| gdma_periph.c | ||
| gpio_periph.c | ||
| i2c_periph.c | ||
| i2s_periph.c | ||
| interrupts.c | ||
| ledc_periph.c | ||
| mpi_periph.c | ||
| rmt_periph.c | ||
| sdm_periph.c | ||
| spi_periph.c | ||
| temperature_sensor_periph.c | ||
| timer_periph.c | ||
| twai_periph.c | ||
| uart_periph.c | ||