esp-idf/components/soc
Michael (XIAO Xufeng) 730ca0ea43 Merge branch 'bugfix/cpu_reset_perip_clk_disable_v4.4' into 'release/v4.4'
esp_system: change range comparsion for reset reason to specifc cpu reset reason comparison (backport v4.4)

See merge request espressif/esp-idf!15898
2022-02-10 10:32:09 +00:00
..
esp32 Merge branch 'feature/esp32s3_apptrace_v4.4' into 'release/v4.4' 2022-01-26 09:58:35 +00:00
esp32c3 Merge branch 'bugfix/gpio_pin_num_fix_v4.4' into 'release/v4.4' 2022-02-10 10:21:52 +00:00
esp32h2 esp_system: replace the range comparsion for reset reason in perip clk init with specific reset reason check, also add a test case in LEDC to check for the perip clk not being disabled after cpu reset 2022-01-27 09:51:00 +00:00
esp32s2 Merge branch 'bugfix/gpio_pin_num_fix_v4.4' into 'release/v4.4' 2022-02-10 10:21:52 +00:00
esp32s3 trax: Adds ESP32-S3 support 2022-01-05 19:34:28 +01:00
include/soc lcd: unify callback prototype 2021-10-02 14:23:31 +08:00
CMakeLists.txt Merge branch 'refactor/move_ldscript_to_soc' into 'master' 2021-07-23 11:54:56 +00:00
README.md
component.mk soc: move peripheral linker scripts out of target component 2021-07-22 12:55:01 +08:00
linker.lf
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
soc_include_legacy_warn.c

README.md

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware