esp-idf/components/soc
Cao Sen Miao f2fe0847d5 usb_serial_jtag: add initial support for S3 (including flashing, monitoring, writing, and reading) but console is not avaliable now 2021-06-18 12:42:41 +08:00
..
esp32 Merge branch 'bugfix/esp32_u4wdh_quad_io' into 'master' 2021-06-07 04:50:54 +00:00
esp32c3 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key() 2021-06-17 07:21:36 +08:00
esp32s2 efuse(esp32): Deprecate esp_efuse_burn_new_values() & esp_efuse_write_random_key() 2021-06-17 07:21:36 +08:00
esp32s3 usb_serial_jtag: add initial support for S3 (including flashing, monitoring, writing, and reading) but console is not avaliable now 2021-06-18 12:42:41 +08:00
include/soc Merge branch 'feature/bringup_esp32s3beta_cmake_sdmmc' into 'master' 2021-05-20 04:22:11 +00:00
CMakeLists.txt
README.md
component.mk
linker.lf
lldesc.c crypto: initial S3 Beta 3 bringup and testing for SHA/AES/RSA/flash enc 2021-05-18 11:25:41 +08:00
memory_layout_utils.c
soc_include_legacy_warn.c

README.md

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware