kopia lustrzana https://github.com/espressif/esp-idf
202 wiersze
6.5 KiB
C
202 wiersze
6.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2016-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdlib.h>
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#include <ctype.h>
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#include "sdkconfig.h"
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#include "esp_types.h"
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#include "esp_log.h"
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#include "soc/rtc_periph.h"
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#include "soc/rtc.h"
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#include "soc/periph_defs.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/semphr.h"
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#include "freertos/timers.h"
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#include "esp_intr_alloc.h"
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#include "sys/lock.h"
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#include "esp_private/rtc_ctrl.h"
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#include "esp_attr.h"
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#ifndef NDEBUG
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// Enable built-in checks in queue.h in debug builds
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#define INVARIANTS
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#endif
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#include "sys/queue.h"
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#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4// TODO: IDF-8008
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static const char *TAG = "rtc_module";
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#endif
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#if !CONFIG_IDF_TARGET_ESP32C6 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-8008
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#define NOT_REGISTERED (-1)
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portMUX_TYPE rtc_spinlock = portMUX_INITIALIZER_UNLOCKED;
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// Disable the interrupt which cannot work without cache.
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static DRAM_ATTR uint32_t rtc_intr_cache;
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static DRAM_ATTR uint32_t rtc_intr_enabled;
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static DRAM_ATTR int rtc_isr_cpu = NOT_REGISTERED; // Unused number
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static void s_rtc_isr_noniram_hook(uint32_t rtc_intr_mask);
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static void s_rtc_isr_noniram_hook_relieve(uint32_t rtc_intr_mask);
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/*---------------------------------------------------------------
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INTERRUPT HANDLER
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---------------------------------------------------------------*/
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typedef struct rtc_isr_handler_ {
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uint32_t mask;
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intr_handler_t handler;
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void* handler_arg;
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uint32_t flags;
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SLIST_ENTRY(rtc_isr_handler_) next;
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} rtc_isr_handler_t;
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static DRAM_ATTR SLIST_HEAD(rtc_isr_handler_list_, rtc_isr_handler_) s_rtc_isr_handler_list =
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SLIST_HEAD_INITIALIZER(s_rtc_isr_handler_list);
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static DRAM_ATTR portMUX_TYPE s_rtc_isr_handler_list_lock = portMUX_INITIALIZER_UNLOCKED;
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static intr_handle_t s_rtc_isr_handle;
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IRAM_ATTR static void rtc_isr(void* arg)
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{
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uint32_t status = REG_READ(RTC_CNTL_INT_ST_REG);
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rtc_isr_handler_t* it;
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portENTER_CRITICAL_ISR(&s_rtc_isr_handler_list_lock);
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SLIST_FOREACH(it, &s_rtc_isr_handler_list, next) {
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if (it->mask & status) {
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portEXIT_CRITICAL_ISR(&s_rtc_isr_handler_list_lock);
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(*it->handler)(it->handler_arg);
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portENTER_CRITICAL_ISR(&s_rtc_isr_handler_list_lock);
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}
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}
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portEXIT_CRITICAL_ISR(&s_rtc_isr_handler_list_lock);
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REG_WRITE(RTC_CNTL_INT_CLR_REG, status);
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}
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static esp_err_t rtc_isr_ensure_installed(void)
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{
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esp_err_t err = ESP_OK;
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portENTER_CRITICAL(&s_rtc_isr_handler_list_lock);
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if (s_rtc_isr_handle) {
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goto out;
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}
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REG_WRITE(RTC_CNTL_INT_ENA_REG, 0);
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REG_WRITE(RTC_CNTL_INT_CLR_REG, UINT32_MAX);
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err = esp_intr_alloc(ETS_RTC_CORE_INTR_SOURCE, ESP_INTR_FLAG_IRAM, &rtc_isr, NULL, &s_rtc_isr_handle);
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if (err != ESP_OK) {
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goto out;
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}
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rtc_isr_cpu = esp_intr_get_cpu(s_rtc_isr_handle);
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out:
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portEXIT_CRITICAL(&s_rtc_isr_handler_list_lock);
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return err;
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}
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#endif // !CONFIG_IDF_TARGET_ESP32C6 TODO: IDF-8008
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esp_err_t rtc_isr_register(intr_handler_t handler, void* handler_arg, uint32_t rtc_intr_mask, uint32_t flags)
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{
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#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-8008
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ESP_EARLY_LOGW(TAG, "rtc_isr_register() has not been implemented yet");
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return ESP_OK;
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#else
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esp_err_t err = rtc_isr_ensure_installed();
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if (err != ESP_OK) {
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return err;
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}
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rtc_isr_handler_t* item = heap_caps_malloc(sizeof(*item), MALLOC_CAP_INTERNAL);
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if (item == NULL) {
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return ESP_ERR_NO_MEM;
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}
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item->handler = handler;
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item->handler_arg = handler_arg;
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item->mask = rtc_intr_mask;
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item->flags = flags;
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portENTER_CRITICAL(&s_rtc_isr_handler_list_lock);
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if (flags & RTC_INTR_FLAG_IRAM) {
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s_rtc_isr_noniram_hook(rtc_intr_mask);
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} else {
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s_rtc_isr_noniram_hook_relieve(rtc_intr_mask);
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}
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SLIST_INSERT_HEAD(&s_rtc_isr_handler_list, item, next);
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portEXIT_CRITICAL(&s_rtc_isr_handler_list_lock);
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return ESP_OK;
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#endif
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}
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esp_err_t rtc_isr_deregister(intr_handler_t handler, void* handler_arg)
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{
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#if CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2 || CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-8008
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ESP_EARLY_LOGW(TAG, "rtc_isr_deregister() has not been implemented yet");
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return ESP_OK;
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#else
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rtc_isr_handler_t* it;
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rtc_isr_handler_t* prev = NULL;
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bool found = false;
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portENTER_CRITICAL(&s_rtc_isr_handler_list_lock);
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SLIST_FOREACH(it, &s_rtc_isr_handler_list, next) {
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if (it->handler == handler && it->handler_arg == handler_arg) {
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if (it == SLIST_FIRST(&s_rtc_isr_handler_list)) {
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SLIST_REMOVE_HEAD(&s_rtc_isr_handler_list, next);
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} else {
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SLIST_REMOVE_AFTER(prev, next);
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}
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found = true;
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if (it->flags & RTC_INTR_FLAG_IRAM) {
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s_rtc_isr_noniram_hook_relieve(it->mask);
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}
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free(it);
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break;
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}
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prev = it;
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}
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portEXIT_CRITICAL(&s_rtc_isr_handler_list_lock);
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return found ? ESP_OK : ESP_ERR_INVALID_STATE;
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#endif
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}
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#if !CONFIG_IDF_TARGET_ESP32C6 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-8008
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/**
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* @brief This helper function can be used to avoid the interrupt to be triggered with cache disabled.
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* There are lots of different signals on RTC module (i.e. sleep_wakeup, wdt, brownout_detect, etc.)
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* We might want some of them can be triggered with cache disabled, some are not. Therefore, this function
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* is created to avoid those which do not want to be triggered with cache disabled.
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*
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* @param rtc_intr_mask the mask of the rtc interrupt.
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*/
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static void s_rtc_isr_noniram_hook(uint32_t rtc_intr_mask)
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{
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rtc_intr_cache |= rtc_intr_mask;
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}
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static void s_rtc_isr_noniram_hook_relieve(uint32_t rtc_intr_mask)
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{
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rtc_intr_cache &= ~rtc_intr_mask;
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}
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#endif
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IRAM_ATTR void rtc_isr_noniram_disable(uint32_t cpu)
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{
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#if !CONFIG_IDF_TARGET_ESP32C6 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-8008
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if (rtc_isr_cpu == cpu) {
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rtc_intr_enabled |= RTCCNTL.int_ena.val;
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RTCCNTL.int_ena.val &= rtc_intr_cache;
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}
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#endif
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}
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IRAM_ATTR void rtc_isr_noniram_enable(uint32_t cpu)
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{
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#if !CONFIG_IDF_TARGET_ESP32C6 && !CONFIG_IDF_TARGET_ESP32H2 && !CONFIG_IDF_TARGET_ESP32P4 // TODO: IDF-8008
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if (rtc_isr_cpu == cpu) {
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RTCCNTL.int_ena.val = rtc_intr_enabled;
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rtc_intr_enabled = 0;
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}
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#endif
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}
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