kopia lustrzana https://github.com/espressif/esp-idf
157 wiersze
4.7 KiB
C
157 wiersze
4.7 KiB
C
/* Custom chip driver example
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This example code is in the Public Domain (or CC0 licensed, at your option.)
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Unless required by applicable law or agreed to in writing, this
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software is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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CONDITIONS OF ANY KIND, either express or implied.
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <sys/param.h> // For MIN/MAX
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#include "esp_log.h"
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#include "spi_flash_chip_generic.h"
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#include "spi_flash/spi_flash_defs.h"
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// Not for all the vendors
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#define CMD_ENTER_OTP 0x3A
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static const char chip_name[] = "eon";
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/* Driver for EON flash chip */
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esp_err_t spi_flash_chip_eon_probe(esp_flash_t *chip, uint32_t flash_id)
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{
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/* Check manufacturer and product IDs match our desired masks */
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const uint8_t MFG_ID = 0x1C;
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const uint16_t DEV_ID = 0x7000;
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if (flash_id >> 16 != MFG_ID || (flash_id & 0xFF00) != DEV_ID) {
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return ESP_ERR_NOT_FOUND;
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}
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return ESP_OK;
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}
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static esp_err_t spi_flash_chip_eon_enter_otp_mode(esp_flash_t* chip)
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{
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spi_flash_trans_t trans = {
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.command = CMD_ENTER_OTP,
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};
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return chip->host->driver->common_command(chip->host, &trans);
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}
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static esp_err_t spi_flash_chip_eon_exit_otp_mode(esp_flash_t* chip)
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{
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spi_flash_trans_t trans = {
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.command = CMD_WRDI,
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};
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return chip->host->driver->common_command(chip->host, &trans);
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}
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esp_err_t spi_flash_chip_eon_get_io_mode(esp_flash_t *chip, esp_flash_io_mode_t* out_io_mode)
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{
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esp_err_t ret;
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ret = spi_flash_chip_eon_enter_otp_mode(chip);
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if (ret != ESP_OK) {
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return ret;
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}
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// On "eon" chips, this involves checking
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// bit 1 (QE) of RDSR2 (35h) result
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// (it works this way on GigaDevice & Fudan Micro chips, probably others...)
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const uint8_t BIT_QE = 1 << 6;
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uint32_t sr;
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ret = spi_flash_common_read_status_8b_rdsr(chip, &sr);
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if (ret == ESP_OK) {
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*out_io_mode = ((sr & BIT_QE)? SPI_FLASH_QOUT: 0);
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}
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//unconditionally exit OTP mode
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esp_err_t ret_exit = spi_flash_chip_eon_exit_otp_mode(chip);
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if (ret != ESP_OK) {
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return ret;
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}
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return ret_exit;
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}
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esp_err_t spi_flash_chip_eon_set_io_mode(esp_flash_t *chip)
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{
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if (!esp_flash_is_quad_mode(chip)) {
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return ESP_OK;
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}
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esp_err_t ret;
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ret = spi_flash_chip_eon_enter_otp_mode(chip);
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if (ret != ESP_OK) {
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return ret;
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}
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// On "eon" chips, this involves checking
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// bit 6 (QE) of RDSR (05h) result
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const uint32_t BIT_QE = 1 << 6;
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ret = spi_flash_common_set_io_mode(chip,
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spi_flash_common_write_status_8b_wrsr,
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spi_flash_common_read_status_8b_rdsr,
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BIT_QE);
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//unconditionally exit OTP mode
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esp_err_t ret_exit = spi_flash_chip_eon_exit_otp_mode(chip);
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if (ret != ESP_OK) {
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return ret;
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}
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return ret_exit;
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}
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esp_err_t spi_flash_chip_eon_suspend_cmd_conf(esp_flash_t *chip)
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{
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return ESP_ERR_NOT_SUPPORTED;
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}
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spi_flash_caps_t spi_flash_chip_eon_get_caps(esp_flash_t *chip)
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{
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spi_flash_caps_t caps_flags = 0;
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// 32-bit-address flash is not supported
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// flash-suspend is not supported
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// flash read unique id is not supported.
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return caps_flags;
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}
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// The issi chip can use the functions for generic chips except from set read mode and probe,
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// So we only replace these two functions.
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const spi_flash_chip_t esp_flash_chip_eon = {
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.name = chip_name,
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.timeout = &spi_flash_chip_generic_timeout,
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.probe = spi_flash_chip_eon_probe,
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.reset = spi_flash_chip_generic_reset,
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.detect_size = spi_flash_chip_generic_detect_size,
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.erase_chip = spi_flash_chip_generic_erase_chip,
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.erase_sector = spi_flash_chip_generic_erase_sector,
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.erase_block = spi_flash_chip_generic_erase_block,
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.sector_size = 4 * 1024,
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.block_erase_size = 64 * 1024,
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.get_chip_write_protect = spi_flash_chip_generic_get_write_protect,
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.set_chip_write_protect = spi_flash_chip_generic_set_write_protect,
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.num_protectable_regions = 0,
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.protectable_regions = NULL,
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.get_protected_regions = NULL,
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.set_protected_regions = NULL,
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.read = spi_flash_chip_generic_read,
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.write = spi_flash_chip_generic_write,
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.program_page = spi_flash_chip_generic_page_program,
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.page_size = 256,
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.write_encrypted = spi_flash_chip_generic_write_encrypted,
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.wait_idle = spi_flash_chip_generic_wait_idle,
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.set_io_mode = spi_flash_chip_eon_set_io_mode,
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.get_io_mode = spi_flash_chip_eon_get_io_mode,
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.read_reg = spi_flash_chip_generic_read_reg,
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.yield = spi_flash_chip_generic_yield,
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.sus_setup = spi_flash_chip_eon_suspend_cmd_conf,
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.get_chip_caps = spi_flash_chip_eon_get_caps,
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};
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