kopia lustrzana https://github.com/espressif/esp-idf
76 wiersze
2.6 KiB
Plaintext
76 wiersze
2.6 KiB
Plaintext
menu "Cache config"
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choice ESP32S2_INSTRUCTION_CACHE_SIZE
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prompt "Instruction cache size"
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default ESP32S2_INSTRUCTION_CACHE_8KB
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help
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Instruction cache size to be set on application startup.
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If you use 8KB instruction cache rather than 16KB instruction cache,
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then the other 8KB will be added to the heap.
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config ESP32S2_INSTRUCTION_CACHE_8KB
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bool "8KB"
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config ESP32S2_INSTRUCTION_CACHE_16KB
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bool "16KB"
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endchoice
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choice ESP32S2_INSTRUCTION_CACHE_LINE_SIZE
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prompt "Instruction cache line size"
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default ESP32S2_INSTRUCTION_CACHE_LINE_32B
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help
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Instruction cache line size to be set on application startup.
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config ESP32S2_INSTRUCTION_CACHE_LINE_16B
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bool "16 Bytes"
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config ESP32S2_INSTRUCTION_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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choice ESP32S2_DATA_CACHE_SIZE
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prompt "Data cache size"
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default ESP32S2_DATA_CACHE_0KB if !SPIRAM
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default ESP32S2_DATA_CACHE_8KB if SPIRAM
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help
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Data cache size to be set on application startup.
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If you use 0KB data cache, the other 16KB will be added to the heap
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If you use 8KB data cache rather than 16KB data cache, the other 8KB will be added to the heap
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config ESP32S2_DATA_CACHE_0KB
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depends on !SPIRAM
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bool "0KB"
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config ESP32S2_DATA_CACHE_8KB
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bool "8KB"
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config ESP32S2_DATA_CACHE_16KB
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bool "16KB"
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endchoice
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choice ESP32S2_DATA_CACHE_LINE_SIZE
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prompt "Data cache line size"
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default ESP32S2_DATA_CACHE_LINE_32B
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help
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Data cache line size to be set on application startup.
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config ESP32S2_DATA_CACHE_LINE_16B
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bool "16 Bytes"
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config ESP32S2_DATA_CACHE_LINE_32B
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bool "32 Bytes"
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endchoice
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config ESP32S2_INSTRUCTION_CACHE_WRAP
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bool "Enable instruction cache wrap"
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default "n"
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help
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If enabled, instruction cache will use wrap mode to read spi flash (maybe spiram).
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The wrap length equals to INSTRUCTION_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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config ESP32S2_DATA_CACHE_WRAP
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bool "Enable data cache wrap"
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default "n"
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help
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If enabled, data cache will use wrap mode to read spiram (maybe spi flash).
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The wrap length equals to DATA_CACHE_LINE_SIZE.
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However, it depends on complex conditions.
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endmenu # Cache config
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