esp-idf/components/soc/esp32
Angus Gratton 367ecc2d60 Merge branch 'refactor/timerg_in_test' into 'master'
timer_group: refactoring to avoid direct register access in the ISR

See merge request espressif/esp-idf!5656
2019-08-14 15:32:16 +08:00
..
include Merge branch 'refactor/timerg_in_test' into 'master' 2019-08-14 15:32:16 +08:00
test
component.mk
cpu_util.c
emac_hal.c
gpio_periph.c
i2c_apll.h
i2c_bbpll.h
i2c_rtc_clk.h
rtc_clk.c
rtc_clk_common.h
rtc_clk_init.c
rtc_init.c
rtc_periph.c
rtc_pm.c
rtc_sleep.c
rtc_time.c
rtc_wdt.c
sdio_slave_periph.c
sdmmc_periph.c
soc_log.h
soc_memory_layout.c
sources.cmake
spi_periph.c