kopia lustrzana https://github.com/espressif/esp-idf
172 wiersze
8.8 KiB
ReStructuredText
172 wiersze
8.8 KiB
ReStructuredText
ESP SPI Slave HD (Half Duplex) Mode Protocol
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============================================
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.. only:: esp32
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.. warning::
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The driver for ESP32 hasn't been developed yet.
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.. _esp_spi_slave_caps:
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SPI Slave Capabilities of Espressif chips
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-----------------------------------------
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+--------------------+-------+----------+----------+
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| | ESP32 | ESP32-S2 | ESP32-C3 |
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+====================+=======+==========+==========+
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| SPI Slave HD | N | Y (v2) | Y (v2) |
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+--------------------+-------+----------+----------+
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| Tohost intr | | N | N |
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+--------------------+-------+----------+----------+
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| Frhost intr | | 2 \* | 2 \* |
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+--------------------+-------+----------+----------+
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| TX DMA | | Y | Y |
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+--------------------+-------+----------+----------+
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| RX DMA | | Y | Y |
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+--------------------+-------+----------+----------+
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| Shared registers | | 72 | 64 |
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+--------------------+-------+----------+----------+
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Introduction
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------------
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In the half duplex mode, the master has to use the protocol defined by the slave to communicate
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with the slave. Each transaction may consists of the following phases (list by the order they
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should exist):
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- Command: 8-bit, master to slave
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This phase determines the rest phases of the transactions. See :ref:`spi_slave_hd_supported_cmds`.
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- Address: 8-bit, master to slave, optional
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For some commands (WRBUF, RDBUF), this phase specifies the address of shared buffer to write
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to/read from. For other commands with this phase, they are meaningless, but still have to
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exist in the transaction.
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- Dummy: 8-bit, floating, optional
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This phase is the turn around time between the master and the slave on the bus, and also
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provides enough time for the slave to prepare the data to send to master.
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- Data: variable length, the direction is also determined by the command.
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This may be a data OUT phase, in which the direction is slave to master, or a data IN phase,
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in which the direction is master to slave.
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The *direction* means which side (master or slave) controls the MOSI, MISO, WP and HD pins.
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Data IO Modes
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-------------
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In some IO modes, more data wires can be use to send the data. As a result, the SPI clock cycles
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required for the same amount of data will be less than in 1-bit mode. For example, in QIO mode,
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address and data (IN and OUT) should be sent on all 4 data wires (MOSI, MISO, WP, and HD). Here's
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the modes supported by ESP32-S2 SPI slave and the wire number used in corresponding modes.
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+-------+------------+------------+--------------+---------+
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| Mode | command WN | address WN | dummy cycles | data WN |
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+=======+============+============+==============+=========+
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| 1-bit | 1 | 1 | 1 | 1 |
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+-------+------------+------------+--------------+---------+
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| DOUT | 1 | 1 | 4 | 2 |
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+-------+------------+------------+--------------+---------+
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| DIO | 1 | 2 | 4 | 2 |
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+-------+------------+------------+--------------+---------+
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| QOUT | 1 | 1 | 4 | 4 |
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+-------+------------+------------+--------------+---------+
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| QIO | 1 | 4 | 4 | 4 |
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+-------+------------+------------+--------------+---------+
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| QPI | 4 | 4 | 4 | 4 |
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+-------+------------+------------+--------------+---------+
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Normally, which mode is used is determined is determined by the command sent by the master (See
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:ref:`spi_slave_hd_supported_cmds`), except from the QPI mode.
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QPI Mode
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^^^^^^^^
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The QPI mode is a special state of the SPI Slave. The master can send ENQPI command to put the
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slave into the QPI mode state. In the QPI mode, the command is also sent in 4-bit, thus it's not
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compatible with the normal modes. The master should only send QPI commands when the slave is in
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the QPI mode. To exit form the QPI mode, master can send EXQPI command.
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.. _spi_slave_hd_supported_cmds:
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Supported Commands
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------------------
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.. note::
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The command name are in a master-oriented direction. For example, WRBUF means master writes
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the buffer of slave.
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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| Name | Description | Command | Address | Data |
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+==========+=====================+=========+==========+==========================================================+
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| WRBUF | Write buffer | 0x01 | Buf addr | master to slave, no longer than buffer size |
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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| RDBUF | Read buffer | 0x02 | Buf addr | slave to master, no longer than buffer size |
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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| WRDMA | Write DMA | 0x03 | 8 bits | master to slave, no longer than length provided by slave |
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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| RDDMA | Read DMA | 0x04 | 8 bits | slave to master, no longer than length provided by slave |
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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| SEG_DONE | Segments done | 0x05 | - | - |
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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| ENQPI | Enter QPI mode | 0x06 | - | - |
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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| WR_DONE | Write segments done | 0x07 | - | - |
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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| CMD8 | Interrupt | 0x08 | - | - |
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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| CMD9 | Interrupt | 0x09 | - | - |
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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| CMDA | Interrupt | 0x0A | - | - |
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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| EXQPI | Exit QPI mode | 0xDD | - | - |
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+----------+---------------------+---------+----------+----------------------------------------------------------+
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Moreover, WRBUF, RDBUF, WRDMA, RDDMA commands have their 2-bit and 4-bit version. To do
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transactions in 2-bit or 4-bit mode, send the original command ORed by the corresponding command
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mask below. For example, command 0xA1 means WRBUF in QIO mode.
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+-------+------+
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| Mode | Mask |
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+=======+======+
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| 1-bit | 0x00 |
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+-------+------+
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| DOUT | 0x10 |
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+-------+------+
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| DIO | 0x50 |
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+-------+------+
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| QOUT | 0x20 |
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+-------+------+
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| QIO | 0xA0 |
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+-------+------+
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| QPI | 0xA0 |
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+-------+------+
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Segment Transaction Mode
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------------------------
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Segment transaction mode is the only mode supported by the SPI Slave HD driver for now. In this
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mode, for a transaction the slave load onto the DMA, the master is allowed to read or write in
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segments. This way the master doesn't have to prepare large buffer as the size of data provided
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by the slave. After the master finish reading/writing a buffer, it has to send corresponding
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termination command to the slave as a synchronization signal. The slave driver will update new
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data (if exist) onto the DMA upon seeing the termination command.
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The termination command is WR_DONE (0x07) for the WRDMA, and CMD8 (0x08) for the RDDMA.
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Here's an example for the flow the master read data from the slave DMA:
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1. The slave loads 4092 bytes of data onto the RDDMA
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2. The master do seven RDDMA transactions, each of them are 512 bytes long, and reads the first
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3584 bytes from the slave
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3. The master do the last RDDMA transaction of 512 bytes (equal, longer or shorter than the total
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length loaded by the slave are all allowed). The first 508 bytes are valid data from the
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slave, while the last 4 bytes are meaningless bytes.
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4. The master sends CMD8 to the slave
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5. The slave loads another 4092 bytes of data onto the RDDMA
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6. The master can start new reading transactions after it sends the CMD8
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