esp-idf/components/esp_hw_support/dma
morris 595c3fe6a2 fix(async_memcpy): destination alignment check against cache line size
On ESP32P4, becasue we need to invalidate the destination buffer,
if the buffer is not aligned to cache line, then it might break
other date structure, randomly.
2023-08-15 17:40:17 +08:00
..
async_memcpy_cp_dma.c feat(async_memcpy): refactor driver code to support different DMA backen 2023-08-03 12:02:09 +08:00
async_memcpy_gdma.c fix(async_memcpy): destination alignment check against cache line size 2023-08-15 17:40:17 +08:00
esp_async_memcpy.c feat(async_memcpy): refactor driver code to support different DMA backen 2023-08-03 12:02:09 +08:00
esp_async_memcpy_priv.h feat(async_memcpy): refactor driver code to support different DMA backen 2023-08-03 12:02:09 +08:00
gdma.c fix(gdma): fixed compilation failure of gdma 2023-07-24 19:36:31 +08:00
gdma_etm.c
gdma_priv.h
linker.lf