kopia lustrzana https://github.com/espressif/esp-idf
65 wiersze
1.5 KiB
C
65 wiersze
1.5 KiB
C
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/*
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* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file DWARF Exception Frames parser header
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*
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* This file describes the frame types for RISC-V, required for
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* parsing `eh_frame` and `eh_frame_hdr`.
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*
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*/
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#pragma once
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#include "riscv/rvruntime-frames.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Define the Executionframe as RvExcFrame for this implementation.
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*/
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typedef RvExcFrame ExecutionFrame;
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/**
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* @brief Number of registers in the ExecutionFrame structure.
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*
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* This will be used to define and initialize the DWARF machine state.
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* In practice, we only have 16 registers that are callee saved, thus, we could
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* only save them and ignore the rest. However, code to calculate mapping of
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* CPU registers to DWARF registers would take more than the 16 registers we
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* would save... so save all registers.
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*/
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#define EXECUTION_FRAME_MAX_REGS (32)
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/**
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* @brief Reference the PC register of the execution frame.
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*/
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#define EXECUTION_FRAME_PC(frame) ((frame).mepc)
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/**
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* @brief Reference the SP register of the execution frame.
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*/
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#define EXECUTION_FRAME_SP(frame) ((frame).sp)
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/**
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* @brief Index of SP register in the execution frame.
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*/
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#define EXECUTION_FRAME_SP_REG (offsetof(RvExcFrame, sp)/sizeof(uint32_t))
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/**
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* @brief Get register i of the execution frame.
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*/
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#define EXECUTION_FRAME_REG(frame, i) (((uint32_t*) (frame))[(i)])
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#ifdef __cplusplus
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}
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#endif
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// #endif // _EH_FRAME_PARSER_IMPL_H
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